Dot matrix display design using fpga

2.
Objectives
• In this lab we will deal with the dot-matrix display which used
to display information on many devices requiring a simple display
device with limited resolution.
• We will write Verilog code to simulate how to drive dot-matrix
display then synthesis the code to run on FPGA board.

3.
Introduction
• Internally, the LEDs are organized in a matrix.
• Here's a 5x7 display internal wiring.
• Dot Matrix has two types:
• Common Cathode Type:
• a common anode for LEDs in a row - all of the anodes in
each row is common
• Common Anode Type:
• a common cathode for LEDs in a row – all the cathodes in
each row is common.

4.
Theory of LED dot matrix display
• In a dot matrix display, multiple LEDs are wired together in rows and columns. This is done to
minimize the number of pins required to drive them.
• For example, a 5×7 matrix of LEDs (shown below) would need 35 I/O pins. By wiring all the anodes
together in rows (R1 through R7), and cathodes in columns (C1 through C5), the required number
of I/O pins is reduced to 16. Each LED is addressed by its row and column number. In the figure
below, if R4 is pulled high and C3 is pulled low, the LED in fourth row and third column will be
tuned on. Characters can be displayed by fast scanning of either rows or columns.
Common Anode

5.
Theory of LED dot matrix display
• Suppose, we want to display the alphabet A.
• We will first select the column C1 (which means C1 is pulled low in
this case), and deselect other columns by blocking their ground paths
(one way of doing that is by pulling C2 through C5 pins to logic high).
• Now, the first column is active, and you need to turn on the LEDs in
the rows R2 through R7 of this column, which can be done by
applying forward bias voltages to these rows.
• Next, select the column C2 (and deselect all other columns), and
apply forward bias to R1 and R5, and so on.
• Therefore, by scanning across the column quickly (> 100 times per
second), and turning on the respective LEDs in each row of that
column, the persistence of vision comes in to play, and we perceive
the display image as still.
Common Anode

6.
Theory of LED dot matrix display
• The table below gives the logic levels to be applied to R1 through R7 for each of the columns in
order to display the alphabet ‘A’.

7.
Verilog implementation
• To run our code we have 4 Inputs and 5 Outputs.
• First, there are RESET and Clock can be entered by default in the FPGA,
• the KEY and Mode_Switch as an input to select Mode are needed to control the Dot-Matrix (same as previous labs
).
• Finally, the Dot-Matrix is used for the output.
• (LEDs and 7-Segments used same as the previous labs).
• Top Module of the Dot-Matrix example indicated the Input/Output Ports:
2 Dot-Matrix Display

12.
Verilog Behavioral Simulation
• To test the operation of the dot-matrix and the functionality of our
code we have to run behavioral simulation as following steps:
• Define the IOs for the Design Under Test (DUT) to provide inputs and
see the expected output on the ISim waveform.
• We define the input in the testbench as register type, so we can
provide our inputs for test.

15.
Homework
• Do the following exercise and explain your Verilog code with
simulation, and test on the FPGA.
• Run the Dot-Matrix Project and display the same numbers using 7-
Segments and Dot-Matrix.
• Run the Dot-Matrix Project and display different shapes.
• Run the Dot-Matrix Project and display your name moving character
by character. (Challenge)