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AR# 38672

Improved jitter immunity for XAPP855

Description

Some users have experienced trouble with the BIT_ALIGN_MACHINE code in XAPP855 in high noise environments when there is more jitter than usual on the clock and data inputs. This article describes a change to the code that can improve the immunity to this input jitter.

Solution

There is a three step process to define the data eye that is employed by this algorithm:

Increase the delay until a transition area is found.

Increase the delay until you are out of the transition area.

Increase the delay until you find the start of the next transition area.

The problem that is dealt with here is found in Step 2. If there is a significant amount of jitter on the inputs, Step 2 can miss the edge. If you decide you are out of the transition area, step the delay one increment; then, if a significant jitter "event" occurs, the algorithm can assume it has found the next transition. In effect, it has found the first transition twice and this causes misalignment. The fix that is implemented in the attached revision of the code is to disallow any second transition that is found within Ndelay increments of the end of the first transition. Nis contained in the parameter minimum_eye. It is up to the individual user to choose the value of Nthat fits his particular design (i.e., the amount of jitter that he is dealing with and the size of his data eye). Too small a value will not be robust, and too large a value runs the risk of stepping completely across the data eye into the next transition. A value of 4 is a suggested starting point.

Note: The attached code has the value set to 0 which essentially makes it a no-op until the user chooses a different value.

There are also some minor bug fixes included that will be updated in the next release of the code.

For a more detailed discussion of the original algorithm, refer to XAPP855. As discussed here, it is up to the user to select and qualify a particular value for his application and the normal disclaimer applying to all Xilinx application notes will apply to this update as well (see the header of the attached file).