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Power Instruction Set Architecture v2.06

Power.org released Version 2.06 of the Power Instruction Set Architecture (ISA) for server and embedded applications. The latest ISA improves performance and efficiency, and speeds design cycles. Power ISA Version 2.06 defines significant extensions for the embedded environment — including an enhanced memory management architecture, logical partitioning and hypervisor support, embedded page table support, and multi-threading. It contains a new vector-scalar floating-point facility that merges and extends existing vector and scalar floating-point operations; numerous new fixed-point, floating-point, and memory-management instructions; a new storage attribute in support of strong storage access ordering; new storage control features, and many other enhancements.

Power ISA Version 2.06 Enhancements for Embedded Designers

Support for virtualization and hypervisors — including a new guest mode and Memory Management Unit (MMU) extensions that enable the efficient implementation of hypervisors on the embedded Power Architecture platform. It allows a more efficient implementation of virtualization overall, partitioning of embedded systems, the isolation of applications and resource sharing, well-known techniques that previously were available only for the server market.

The high level memory management framework of previous architecture versions has been replaced by a detailed architecture based on the Freescale MMU model and extended to support virtualization and enhanced performance. This provides a single programming model to streamline future software development that formerly needed to cope with a variety of MMUs from multiple companies.

Page Table support has been added to the embedded architecture specifically to enhance the performance of the LINUX operating system running on embedded Power Architecture platforms. This provides a more natural way to perform address translation and can significantly speed up applications, where translation is a bottleneck.

Multi-threading for the embedded environment, while well-known on the server platform, Power ISA Version 2.06 includes explicit support for the execution of multiple threads on an embedded core. Multi-threading enables significant improvements in application throughput on the embedded platform.