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Abstract:

Method of making an electronic fuse blow resistor structure. In one
embodiment, the method includes forming an insulator film, depositing a
conductor on the insulator film, and after the depositing, etching the
conductor to form a plurality of spaced apart non-conductive regions and
a plurality of spaced-apart conductive regions. In another embodiment,
the method includes forming the insulator film, forming a conductive
sheet, and sub-dividing the conductive sheet into the plurality of
conductive regions.

Claims:

1. A method of making an electronic fuse blow resistor structure,
comprising:forming an insulator film;depositing a conductor on the
insulator film; andafter the depositing, etching the conductor to form a
plurality of spaced apart non-conductive regions and a plurality of
spaced-apart conductive regions.

2. The method of claim 1, further comprising forming a first fuse lead in
electrical communication with a first end of the plurality of
spaced-apart conductive regions and a second fuse lead in electrical
communication with a second end of the plurality of spaced-apart
conductive regions.

3. The method of claim 2, further comprising forming at least one
electrical contact in electrical communication with the first fuse lead
and at least one electrical contact in electrical communication with the
second fuse lead.

4. The method of claim 1, wherein the plurality of conductive regions
comprises a metal.

16. A method of making an electronic fuse blow resistor structure
comprising an insulating film and a plurality of spaced-apart conductive
regions arranged on the insulating film, the method comprising:forming
the insulator film;forming a conductive sheet; andsub-dividing the
conductive sheet into the plurality of conductive regions.

17. The method of claim 16, further comprising forming a first fuse lead
in electrical communication with a first end of the plurality of
spaced-apart conductive regions and a second fuse lead in electrical
communication with a second end of the plurality of spaced-apart
conductive regions.

18. The method of claim 17, further comprising forming at least one
electrical contact in electrical communication with the first fuse lead
and at least one electrical contact in electrical communication with the
second fuse lead.

19. The method of claim 16, wherein the plurality of spaced-apart
conductive regions comprises a metal.

Description:

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001]The present application is a divisional application of U.S. patent
application Ser. No. 11/004,846 filed Dec. 7, 2004, which is a divisional
application of U.S. patent application Ser. No. 10/707,282 filed Dec. 3,
2003, the disclosure of these applications is expressly incorporated by
reference herein in their entireties.

BACKGROUND OF INVENTION

[0002]1. Field of the Invention

[0003]The invention generally relates to the optimization of electronic
fuses, and more particularly to a method and apparatus for an electronic
fuse polysilicon resistor for high current applications and increase
resistance to ESD (electrostatic discharge) failure.

[0004]2. Background Description

[0005]Optimization of a polysilicon electronic fuse element is important
for fuse initiation and verification of such initiation, and prevention
of failure from ESD events. ESD events can lead to destructive failure of
fuse elements.

[0006]FIG. 1 illustrates an example of a related art electronic fuse
resistor 10 having a salicided polysilicon film 14 overlying a
polysilicon film 12. The related art fuse 10 also includes metal contacts
16 in electrical communication with the salicided polysilicon film 14. To
maintain a low resistance, the related art electronic fuse 10 is of a
relatively narrow width.

[0007]FIG. 2 illustrates a cross-section of the related art electronic
fuse 10 along line A-A' of FIG. 1. As can be seen in the cross-section,
the polysilicon film 12 and the salicided polysilicon film 14 of the
related art fuse 10 are about the same width.

[0008]Furthermore, the salicided polysilicon film 14 forms a single
continuous conductor providing a single current flow path which is
distributed over the entire the surface of the polysilicon film 12.

[0009]In the related art fuses, the width of the salicided polysilicon
film 14 is the same as the width of the polysilicon film 12.
Consequently, as the polysilicon film 12 is made larger to withstand
larger currents, the salicided polysilicon film 14 becomes larger and
requires higher current loads to blow. Conversely, as the salicided
polysilicon film 14 is reduced in size to blow at smaller currents, the
polysilicon film 12 becomes more susceptible to damage.

[0010]As a result, the window in which to blow the salicide film 14 and
maintain the integrity of the insulator 12 and related polysilicon line
is narrow. In other words, there is a small difference between the
minimum current necessary to blow the fuse and the amount of current
which will damage the insulator supporting the salicided film 12. As
such, the current pulse width to implement the fuse blow is limited to a
relatively narrow given time and current domain. Accordingly, a blown
fuse may be accompanied by a damaged insulator impairing functioning of
the associated circuit.

[0012]High current flow through the structure of related art fuses can
lead to cracking of the insulator films due to high thermal and
mechanical stress. Thermal gradients in the surrounding insulator which
may lead to mechanical stresses which exceed the yield stress can lead to
insulator cracking. Such cracking can cause loss of integrity of the
dielectric and semiconductor chip. Accordingly, related art fuses may
malfunction when blowing upon the application of high currents.

[0013]Hence, because related art fuses are susceptible to damage due to
high currents, a structure which can sustain high currents and maintain
structural integrity and yet lead to fuse initiation and removal of the
salicide during the fuse initiation is needed.

SUMMARY OF INVENTION

[0014]In a first aspect of the invention, an electronic fuse is provided.
The electronic fuse includes an insulating film and at least one
conductive region partially covering the insulating film. At least one
non-conductive region is provided on the insulating film adjacent the
conductive region.

[0015]In another aspect of the invention, the electronic fuse includes a
polysilicon film with a top surface and a conductive film disposed on the
top surface of the polysilicon film forming a plurality of separate
conductive regions. Non-conductive regions are provided between the
plurality of separate conductive regions.

[0016]In another aspect of the invention, a method is provided for forming
a fuse. The method includes forming and defining an insulator film, and
forming at least one conductive region adjacent to at least one
non-conductive region on a surface of the insulator film.

[0019]FIG. 3 illustrates an example of an embodiment of the electronic
fuse resistor structure;

[0020]FIG. 4 illustrates a cross-section taken along B-B' of FIG. 3;

[0021]FIG. 5 illustrates a cross-section of another embodiment of the
invention;

[0022]FIG. 6 illustrates a mask for depositing conductive regions on an
insulator;

[0023]FIG. 7 illustrates forming a conductive film into conductive strips;
and

[0024]FIG. 8 is a graph of resistance versus number of intact conductive
strips for an electronic fuse.

DETAILED DESCRIPTION

[0025]The invention relates to the optimization of electronic fuses, and
more particularly to a method and apparatus for an electronic fuse
polysilicon resistor for high current applications and increase
resistance to ESD (electrostatic discharge) failure.

[0026]In the invention, a conductive region is provided on the surface of
an insulator with a non-conductive region adjacent thereto. The insulator
may also be a resistor. By positioning a conductive region adjacent to a
non-conductive region on the insulator, thermal stress in the insulator
due to current flowing through the conductive region is spread over a
larger area, thus reducing the localized peak stress in the insulator.
With stress reduced in such a manner, higher currents may pass through
the conductive region without causing damage to the insulator.
Accordingly, the fuse structure tends to maintain its structural
integrity at high currents, making it suitable for some types of high
current applications.

[0027]The invention also divides current into localized flow-paths or
conductive regions, and those flow-paths are distributed across the
surface of an insulator or resistor. Such a distribution of current over
the surface reduces thermal stresses in the insulator or resistor, and
reduces the risk of damage to the underlying insulator or resistor
substrate in high current applications. Additionally, the structure has a
high tolerance to high current and maintains structural and material
integrity under high current applications which reduces the possibility
of failure due to ESD or high current. The invention also provides an
electronic fuse blow resistor structure where structure integrity remains
intact after the fuse blows and, additionally, has a well controlled
failure process to facilitate distinguishing between an "open" and a
"short" circuit. The invention also provides a high tolerance resistor
element for high current RF applications.

[0028]Referring now to the drawings, FIG. 3 illustrates an example of an
embodiment of the invention generally depicted at reference numeral 20.
The structure includes a polysilicon film or insulator 12 which supports
a fuse 18. The fuse 18 may be defined as including conductive regions or
strips 22 or may be the conductive strips in addition to the polysilicon
film. The conductive strips 22 are separated from one another by a
non-conductive region 24. The insulator 12 also supports fuse leads 26,
which are in electrical contact or communication with the conductive
strips 22. The structure 20 also includes metal contacts 16 which are in
electrical communication with the fuse leads 26. The fuse leads 26 are
located at opposite ends of each conductive region 22. The insulator 12
may also be a resistive film forming a resistive element. It should be
understood that the fuse may include only one conductive region adjacent
to only one non-conductive region.

[0029]Although FIG. 3 shows the conductive regions of uniform width and
approximately parallel to one another, other conductor patterns are
contemplated with use by the invention. For example, some applications
may benefit from the conductor having various widths or various lengths
relative to one another. Other applications may have the distance between
the conductors vary in a prescribed pattern or have a non-parallel
pattern. By way of one illustrative example, non parallel strips may be
provided.

[0030]FIG. 4 illustrates a cross-section of the embodiment of the
invention 20 shown in FIG. 3 taken along line B-B'. As can be seen in the
cross-section, conductive regions 22 are positioned on top of the
insulator 12. Each conductive region 22 is separated from adjacent
conductive regions 22 by a non-conductive region 24.

[0031]Where only one conductive region 22 is provided, only one
non-conductive region 24 may also be provided. The non conductive region
may include known insulation material or an air gap, for instance.

[0032]In addition to various the conductor patterns mentioned above,
certain embodiments may have conductors of 100 to 400 Å in thickness,
for example, with a width and lengths being a function of the
application, all depending on the resistance value desired. Additional
examples of materials from which to make the conductors include salicided
polysilicon and various metals, such as, for example, aluminum, copper,
titanium or other refractory materials.

[0033]In operation, current flows through metal contacts 16 and a fuse
lead 26. The current then flows through the conductive regions or strips
22 to the opposite fuse lead 26 and corresponding metal contact 16. By
having multiple conductive regions 22 separated by non-conductive regions
24, current flow is directed along discrete local paths distributed
across the top of the insulator 12. Such localized and separate paths of
current flow on top of the insulator 12 and reduce thermal stress within
the insulator 12. Thus, the insulator 12 can withstand higher levels of
current flow through the conductive regions 22 before being stressed to
failure. However, because the cross-sectional area of all the conductive
regions 22 is still relatively small, the fuse will blow at current
levels similar to the related art fuse.

[0034]Where the insulator 12 is a polysilicon film or resistor, allowing
for a wider polysilicon film or resistor can also lead to the prevention
of the polysilicon film or resistor failure. By allowing the polysilicon
film to be wider, the failure of the polysilicon film will be lessened
because the thermal stresses therein will be reduced. Such a molten
filamentation occurs in the polysilicon resistor element when the current
exceeds the Pcrit, i.e.; the critical power to failure of the
polysilicon film. Such failure can be calculated as follows:

V(a)2=(12goxTm/gldpdox)(1-F(a))/(30-F(a))
Eq. 1

F(a)=tan h(α(a-w)/2)/tan h(αa/2) Eq. 2

2=rSigox/dpdox Eq. 3

[0035]V is voltage, r is resistance, Tm is temperature of a metal, w
is width of a line, "a" is a parameter of constriction of the line,
gox is gate conductance, gl is film conductance, dp is the
thickness of the polysilicon and dox is the thickness of the oxide.

[0036]The failure of polysilicon film is also well determined from ESD
testing of unsalicided polysilicon resistor elements. ESD experimental
results show that the ESD robustness increases with the width of the
polysilicon strip. Hence, the ESD robustness of the element also
increases with the width of the polysilicon fuse or resistor. However, by
using a salicide block mask to form conductive regions, the current can
be limited to the salicide film or conductive regions leading to failure
of the conductor without rupture of the polysilicon film or resistor.

[0037]The ESD robustness of an individual wire is a function of the cross
sectional area. The smaller the cross sectional area of the wire, the
lower the ESD robustness, which can lead to improved accuracy of the
digitization. It should also be understood that the more strips, at a
smaller cross section will also provide more discrete digitization. For
example, 20 strips at 5 microns will have a more discrete digitization
than 10 strips at 10 microns, even though there is a same cross sectional
area. This is because there are more strips that can "blow" thus
increasing the stepwise digitization of a device.

[0038]The conductive regions of the electronic fuse or resistor are
configured so that the electrical resistances will be "digitized" and the
resistance will undergo step changes as the number of conductive regions
or fingers of the salicide film begins to fail. The digitation of the
conductor strips will allow digitized sensing levels which are helpful
for digital circuits to determine the failure of one or more of the
conductive regions or fingers. In electrical failure, damage can lead to
non-uniformities and irregularities in the resistance magnitude. Using
conductive regions such as a salicide finger set, the optimization of the
circuit and fuse resistance magnitudes will step through the failure
points as particular conductive regions rupture or fail. This method may
allow an improved sensing scheme well suited to digital circuits.

[0039]Referring to FIG. 5, another embodiment of the electronic fuse 30 is
shown, where an insulator 12 supports conductive regions 22. The
conductive regions 22 have non-conductive regions therebetween which are
at least partially filled with a solid, liquid, or semi-solid
non-conductive material 28. It should be understood that the
non-conductive material 28 may be porous, and in some cases may include a
combination of gas, liquid and solid. The non-conductive material 28 may
have good electrical insulating properties. In one aspect of the
invention, the non-conductive material 28 is resistant to damage due to
thermal and mechanical stresses.

[0040]FIG. 6 illustrates a mask on an insulator 12 for forming multiple
conductive regions or paths on the surface of the insulator. As in FIGS.
3 and 4, the insulator 12 may also be a resistive material forming a
resistive element. By using a salicide block mask, a plurality of
salicided regions can be formed on a polysilicon film.

[0041]By creation of narrow width parallel conductive regions, current can
be constricted to regions on the salicide region without the failure of
the underlying insulator or resistor.

[0042]In this fashion, the width of the polysilicon fuse or resistor width
can be increased as to avoid failure due to thermal stress.

[0043]As another example, a salicide block mask may be used to form a set
of conductive regions or comb fingers of salicided regions. Such a
structure will cause current to flow along narrow stripes of the
salicided region. As the current increases, the salicide fingers will
blow leading to opening of the fuse with minimized thermal stress in the
underlying substrate.

[0044]Referring to FIG. 7, an illustration of how a conductive sheet 15
can be sub-divided into multiple conductive regions 14 is shown. Thus, by
forming the conductive sheet 15 as multiple conductive regions 14,
current can be directed along discrete localized paths thereby reducing
thermal stresses on any underlining insulator or resistor. However,
because the total cross-section of the multiple conductive regions 14 is
similar to that of the conductive sheet 15, the current carrying capacity
of the multiple conductive regions 14 is comparable to that of the
conductive sheet 15. It should be noted that the conductive regions 14
are typically formed by depositing a conductor onto an insulator or
resistor on which a mask has been formed to produce the conductive
regions 14. The conductive regions 14 may also be formed by etching the
conductor to have non-conductive regions.

[0045]FIG. 8 illustrates the step response change in resistance of the
electronic fuse or resistor as conductive regions or strips are blown or
ruptured. As shown in the graph, the electronic fuse has the lowest
resistance when no conductive strip has been ruptured. When a single
conductive region or strip ruptures, the resistance of the fuse increases
by a pre-determine amount to a prescribed level. In like manner, as
further conductive regions are ruptured the resistance increases stepwise
until it reaches a maximum value when all the conductive strips have
blown. The change in resistance for each step, and the resistance value
for each step may be determined by forming the underlying insulator or
resistor film and the conductive regions of suitable materials and
dimensions.

[0046]By structuring the fuse to blow in discrete steps, the fuse blows in
a more predictable manner. Additionally, the fuse will have as many
blow-steps as there are conductive regions. The stepwise blowing of the
fuse reduces the chance that the fuse will malfunction by partially
blowing and still conduct some current. Such a failure mode is further
avoided because of the reduced thermal stress in the underlying insulator
or resistor film.

[0047]Also, because the fuse blows in discrete steps has prescribed
changes in resistance, the fuse described herein exhibits discrete
resistance values. The discrete resistance values make the device
amenable to digital sensing to determine whether it is in a blown or
intact state. Additionally, the fuse may function as a programmable
resistor having well-characterized resistor value options available to
the user.

[0048]It should also be understood that the fuse of the invention will be
used in a semiconductor environment and can be used in, for example, CMOS
technology, Si on Insulator technology or SiGe technologies, to name a
few. It is also well understood in the art that the insulator around the
structure can be of different thermal conductivities.

[0049]While the invention has been described in terms of various
embodiments, those skilled in the art will recognize that the invention
can be practiced with modification and still remain within the spirit and
scope of the appended claims. For example, multiple fuse elements may be
combined with multiple resistor elements to form a component which
reverts to a specified resistive value in the event of fuse rupture.

Patent applications by Steven H. Voldman, South Burlington, VT US

Patent applications by International Business Machines Corporation

Patent applications in class Using structure alterable to nonconductive state (i.e., fuse)

Patent applications in all subclasses Using structure alterable to nonconductive state (i.e., fuse)