Ask that question in any forum currently, and you are likely to receive one of two different popular (but not entirely correct) answers that everyone has been parroting:

“Power density is greater on Ivy Bridge than Sandy Bridge”
“Intel has problems with tri-gate/22nm”

The first answer is correct, but wrong at the same time – power density is greater, but it isn’t what is causing temperatures to be as much as 20 °C higher on Ivy Bridge compared to Sandy Bridge when overclocked. The second answer is jumping to conclusions without sufficient evidence. If you aren’t in the loop, there’s evidence of a considerable temperature difference nearly everywhere you look – we confirmed it by mirroring settings in our Ivy Bridge review, and we have read similar reports in solid testing at Anandtech as well as from other sites.

So why is Ivy Bridge hot?
Intel is using TIM paste between the Integrated Heat Spreader (IHS) and the CPU die on Ivy Bridge chips, instead of fluxless solder.

How does TIM paste generally compare with fluxless solder for conducting heat? Heat conductivity can be measured in watts per meter Kelvin. To be technically exact, we would need to know exactly what Intel is using for TIM paste/solder. When I went to Intel and asked, their polite answer may not surprise you – “Secret sauce”! Given that, we can use some rough approximations. A solder attach could have a heat conductivity in the range of 80 W/mK. A TIM paste could have a heat conductivity in the range of 5 W/mK. That’s your problem right there! Note that these values are not exact, as we don’t know the exact heat conductivity of Intel’s “Secret sauce”. However, these are values representative of solder or TIM paste, and there is a giant gap between how TIM paste and solder perform in regards to conducting heat. They are in different leagues.

Demonstrating the Problem

Most importantly here, if Intel is using TIM paste between the IHS and CPU die, the IHS effectively becomes a heat barrier rather than a heat spreader. Here is a rough diagram of the current heat transfer on Ivy Bridge:

CPU Die -> 5 W/mK TIM -> IHS -> 5 W/mK TIM -> Heatsink

It would be far more beneficial for temperatures to take a more direct route such as:

CPU Die -> 5 W/mK TIM -> Heatsink

Extra heat interfaces are a bad thing, especially when they have relatively low thermal conductivity. On a fundamental level, it doesn’t make much sense to do things this way from the perspective of optimal cooling. However, it could make sense from a die-protection standpoint.

In contrast, a fluxless solder attach like that described in Intel patents was invented for the specific purpose of quickly and effectively radiating heat away from the CPU die. In this situation with a solder that can conduct heat in the range of 80 W/mK and in light of tighter and tighter power densities as Intel continues to shrink its processor die, you can start to see on a fundamental level how quickly getting the heat from a very small area to a slightly larger area may be helped by the design of a soldered IHS. This still leaves the problem of a 5 W/mK TIM paste interface between IHS and heatsink, but before you get there you have a high conductivity solder attach between die and IHS that radiates the die heat to a larger area.

Ivy Bridge Power Density

Power density likely became a popular answer because Intel has referenced the challenges it presents with process shrinks, and it just makes sense on basic level. Very hot die, smaller area to conduct heat away from. Blaming power density for the heat issues is easy! However, Ivy Bridge has approximately 75% the die size of Sandy Bridge, which is a big difference certainly, but not enough to explain the stark contrast in temperatures obtained by our peers across review sites and the forums. Where Sandy Bridge would often be around the 60 °C range at a 4.5 GHz overclock, Ivy Bridge has been tested to be in the 80-90 °C range. How can we blame power density for a difference that large? That dog just doesn’t hunt!

In light of this contrast, we can gain further insight as well from what history has taught us. If you’ve been paying attention, we saw similar issues between the E6XXX and E4XXX processor lines. The E6XXX used a solder attach under the IHS and were far easier to keep cool. The E4XXX used a TIM paste under the IHS and ran hot! Those aren’t the only examples, and I’m certain enthusiasts in the community with better memories than myself can lend further supporting evidence from our past experience. Given hindsight, it is hard to explain why Intel would make a return to TIM paste for Ivy Bridge.

Bottom Line

So based on what evidence we could find from our own investigation, as well as what experience has taught us, Ivy Bridge is running hot when overclocked because of TIM paste between the IHS compared to solder attach used on Sandy Bridge. Why Intel made this choice we aren’t yet sure. We also aren’t sure if they will continue using TIM paste on the Ivy Bridge line, or if this will only be seen on the Engineering Samples like the units sent out for review. However, we’ve put word out again to Intel and are waiting to hear back if they have any further insight or comment to offer. If nothing else, we can hope their reply will again be in good humor… “Secret Sauce” did give us a laugh!

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