The design currently just diode 'OR's' the supplies together before the main switching regulator.

The problem is that when there is no external power, but there are batteries and USB, the current is drawn from the batteries as they are a higher voltage. I'd really like to be able to isolate the batteries completely when on USB power.

I've been looking at high side and low side switches etc, but have yet to come up with a good solution.

I don't want to redesign the power supply - too much risk, and I'm limited for board space. I also don't want to introduce any significant losses that will limit run time on the batteries.

looks like you are looking for some circuitry to control switches (MOSFET would work).

Unfortunately Analog Devices doe not have a dedicated IC for what you are trying to do.

A collection of comparators and op-amps will probably do it.

In the meantime for inspiration you may want to look at this example (AKA the BORing), although it just replicates an ideal diode behavior (highest voltage wins) it may be possible to tweak this design to select the power source you would like to instead of the batteries.

I am the author of the ORing power selector article. Please see the attached which predates any editing by other parties.

1) I think that with 2 back-back FETs (adding one reversed polarity in series) in the battery fed input leg (gates tied together) and with some simple detection of USB power, the battery leg could be shut down when USB is present. I am thinking of no more than perhaps 2 transistors to implement this part of the "fix". If 12V power supply is connected then the circuit should work fine as originally intended without modification.

2) However my "article" design relies on MOSFET drain body diodes for startup. In other words you have diode oring before turning on any FET so that the op amp can initially get power. Now we are adding a reversed FET in series in the battery leg, so with battery only then the op amp will not get power and the whole shabang might not work. The solution would be to bridge the two back-back FETs with a 4V7 or 5V1 zener so that the op amp will get 4V during battery only startup.

3) You would need to have an op amp which can work from 4V0 to 12V0 and probably Pch MOSFETS which can take a similar range of gate drive. Alternatively you could add zener clamps to the MOSFETs in case they are limited to 8V max Vgs for example.

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I am sorry to respond to a semi-old thread, abd I hope I dont bother someone with this, but I wanted to ask Mr. Zwicker about his article.

I read your awesome article, and it was very insigthful. However, I wanted to ask you how the Op-Amp are powered up. I am implementing a system which can be powered by a battery or by a wall plug. I would like to use your article a a base for my design, but the only thing I do not understand is if the OpAmp are powered by the "output" of the circuit. Maybe the use of a large capacitance may be used to maintain voltaje in the opamps between conmutation? Or does this suppose another source of power for the OpAmps?

Keep in mind that the MOSFETs have drain body diodes. The FETs are applied in what would normally be the reversed connection, with positive current coming out of the source of the Pch MOSFETs. For this reason they end up being polarized to conduct positive current from input to output through a diode drop even when the FETs are off. So for the Pchannel design, even if none of the FETs are turned on, you get diode OR'ing initially and could theoretically get a little bit less output voltage until the correct FET is turned on. I don't think you will typically see this delay in practice. Another point; until the op amps are powered on they are most likely to drive the Pch MOSFET gates with a low voltage; that would tend to turn them on.

If you wanted to do so, you could place schottky diodes in parallel with the MOSFETs but this would only help a very unlikely startup issue. I cannot quite imagine where you would need those. And when I tested the design I could not find any way to fool the circuit into misbehavior.

For the Nchannel design, there is a seperate bias supply powering the op amps.

I think if you design it properly for the right offset biasing, you will be very pleased with the way this circuit works.

The schematics as published in the article on EDN shows the power connection of the AD8618 at the source of the MOSFETs (output ORed node). The AD8619 is a quad op-amp, so only 1 power connection is shown.

In the case you want to use 4 single op-amps then each one is powered by the same node (the output of the ORing function) which as Bob described always has a voltage on it as long as one of the inputs is plugged in.