The is a low operating current 1048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power supply voltage from to 3.6V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for power down and a device enable and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V.