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After years of offering "just" four CPU cores in mainstream client processors, Intel may finally be ready to up that number to eight in its upcoming Cannonlake CPU family.

For many years now, Intel (NASDAQ:INTC) has offered CPUs with between two and four CPU cores for its client CPUs. Typically, the low-power CPUs aimed at Ultrabooks and 2-in-1 convertibles have two CPU cores while the processors aimed at higher-performance laptops as well as mainstream desktops feature between two and four cores depending on the particular chip and power envelope.

That being said, there is substantial evidence that Intel's upcoming Cannonlake client processors, which will be built on the company's next generation 10-nanometer manufacturing technology, will come with between four and eight cores.

Here's the proofTake a look at the following LinkedIn profile from an Intel engineer:

Source: LinkedIn.

The engineer claims to be working on a system-on-chip that integrates between four to eight cores. Now, we know that this is a client processor and not, say, a server processor because Intel already fields chips with much greater core counts in the server market.

The only uncertainty in my mind is whether the chip that this engineer is working on will go into both thin-and-light Ultrabooks as well as full-power notebooks and desktops or if it's just for the latter two categories of devices only.

If I had to guess, though, I'd wager that both high-performance client processors as well as "thin-and-light" devices will be derived from the chip that the engineer claims to be working on. Thin-and-light devices will see maximum core counts of four, while desktops and potentially high-performance notebooks get up to eight cores.

Why is Intel increasing core counts now?For many generations, Intel has kept its CPU core counts at between two and four, spending the majority of the increased transistors afforded to it by new manufacturing technologies on beefing up graphics. Why, then, is Intel choosing the 10-nanometer generation to increase its core counts?

There are several reasons that I can think of.

First of all, at the 10-nanometer node, it should become quite economically feasible to include eight CPU cores onto a reasonably sized die thanks to the significant area shrink that 10-nanometer brings relative to 14-nanometer.

To illustrate, note that a four core Skylake CPU with GT2 graphics takes up about 122 square millimeters of die area. At 10-nanometers, assuming a 0.5x shrink, this chip would be able to fit into an area of just 61 square millimeters. There is definitely area headroom for Intel to stick more cores in, especially for high-performance notebooks and desktops.

Further, at the 10-nanometer manufacturing node, Intel may have realized enough of a power efficiency improvement from the 14-nanometer generation that it can actually fit a bunch of cores, in addition to an integrated graphics engine, into a chip that fits neatly into mainstream notebook/desktop power envelopes.

That being said, "just because Intel can" isn't enough of a reason for the company to go ahead and spend that additional silicon area. Intel could potentially just use the area savings to make a smaller silicon die and pocket improved margins.

I suspect that increased core counts will be attractive to Intel's customers and could help catalyze upgrade activity by virtue of a large improvement in performance relative to the chips that Intel currently sells.

Indeed, since Intel appears to have hit a frequency wall with its chips, and since OEMs and/or end users are likely only willing to pay so much for incremental graphics performance, offering Cannonlake SKUs with additional CPU cores might be an interesting way for the company to try to improve demand for its chips and/or average selling prices.

Author

Ashraf Eassa is a technology specialist with The Motley Fool. He writes mostly about technology stocks, but is especially interested in anything related to chips -- the semiconductor kind, that is. He can be reached on Twitter -- follow him there: Follow @tmfchipfool