A dual mode amplifier for photodiode output reads a photodiode providing a current input. An integration capacitor is connected to receive the current input and connected to a voltage output node. An input capacitor is also connected to receive the voltage input and drives an operational amplifier having an output connect to the voltage output node. A correlated double-sample (CDS) capacitor is connected to the voltage output node and a sample and hold circuit incorporating a sample and hold capacitor for sampling the CDS capacitor. A log function on (LOGON) switch is connected between the operational amplifier output and the voltage output node and a reset switch connected to short the photodiode. The LOGON switch sequentially operates in conjunction with the reset switch at the end of an integration time allowing the integration capacitor to retain an integrated current plus a log voltage by closing of the reset switch shorting the detector photodiode and offsetting the voltage on the integration capacitor into the negative voltage direction.

A Read-In Integrated Circuit scene generator incorporates an array of unit cells, with each cell having a switching control circuit. An array of emitting elements is associated with the unit cells and each element is connected with a lead to the switching control circuit of the associated cell. A first electrically conducting overlayer is deposited substantially covering the array of unit cells and connected for current supply. Each emitting element is connected to the first conducting overlayer and the first conducting overlayer includes vias through which each connecting lead from the emitting element to the switching control circuit extends. A second electrically conducting overlayer is deposited substantially covering the array of unit cells and connected for current return. Each switching control circuit is connected to the second conducting overlayer. The second conducting overlayer also has vias through which each lead from the emitting element extends to the switching circuit.

A dual speed Read-Out Integrated Circuit employs a native pixel array with associated high resolution integration circuits for each pixel and a superpixel array created within the native pixel array by combination of native pixels for charge sharing integration in reduced resolution integration circuits simultaneously with the integration of the high resolution integration circuits. Switching control for readout of the high resolution integration circuits is accomplished at a first frame rate and switching control for readout of the reduced resolution integration circuits is accomplished at a second higher frame rate.

A method for super resolution enhancement of infrared imaging data employing an image array having simultaneous, high speed, randomly addressable windows of pixels for small regions of interest (ROI) within a large imaging sensor field of view. Data is retrieved from the ROI window pixels at an increased data rate and the array is dithered to produce sub-pixel motion consistent with the increased data rate. A selected super resolution (SR) algorithm is then applied to the data retrieved from the ROT window pixels at the increased data rate. The reduced data set substantially relieves the computational load on the processor compared with the requirement of performing SR processing on the entire frame of image data. The output from the SR algorithm is either used to replace the LR frame data in the image or is displayed as a separate image to the user.

An armor plate includes at least four layers configured to generate a compression wave that is dissipated in a fracture player. The armor plate includes a deformable layer of a material having an elongation before failure of 20% or more; a transparent ceramic layer adjacent the deformable layer; a transparent fracture layer adjacent the ceramic layer; and a transparent spall liner backing the fracture layer.

An infrared camera system for low contrast employs a focal plane array (FPA) of a plurality of detector diodes. A read out integrated circuit (ROIC) including a plurality of integration switches is connected to the plurality of detector diodes. A frame mean calculator receives raw data from the FPA and an integration time servo receives a frame mean from the frame mean calculator and a preprogrammed target mean. The integration time servo compares the frame mean and target mean and provides an integration time output to the ROIC responsive to the comparison for control of the integration switches.

A unit cell for a Read-In Integrated Circuit employs a signal sampling circuit with a voltage input controlled by a first switch, a capacitor charged by the voltage input and a linear amplifier connected to the capacitor. An output through a second switch samples the capacitor as the input signal for a transistor cascade for emitter current supply incorporating a first transistor receiving the input signal and a second transistor serially connected to the first transistor with a parallel resistor. The second transistor is maintained in saturation for a first portion of the input signal range with the first transistor acting as a source follower for that range. Linear current flow through the resistor results allowing high resolution control in the low current range. The second transistor departs saturation in a second portion of the range for the input signal resulting in saturation mode square-law behavior dominating the first transistor which, in turn, causes a rapid increase in current through its channel in response to higher input signal level thereby allowing a lower resolution but higher current for emitter drive at higher temperatures.

A composite armor plate includes a fracture layer placed adjacent to a ceramic layer. The ceramic layer provides a ballistic resistant layer that receives a ballistic impact and propagates a compression wave. The fracture layer is placed behind the ceramic layer and absorbs a portion of the compression wave propagating out in front of the ballistic impact. The absorbed compression wave causes the fracture layer to at least partially disintegrate into fine particles, which dissipates energy in the process. To cause a higher degree of fracturing (and thus larger dissipation of compression wave energy) the fracture layer includes a plurality of resonators embedded in a fracture material.