QuickLogic touts products resistant to reverse engineering

With increasing amounts of intellectual property being put into FPGAs, QuickLogic Corp. is attacking the question of design security on two fronts.

Touting its antifuse-based FPGAs and Embedded Standard Products as resistant to reverse engineering, QuickLogic has set up a Website to promote awareness and offer potential solutions to IP theft.

Additionally, the Sunnyvale, Calif., company this week released a hardware encryption engine to safeguard network data. Using the core in its antifuse parts gives customers the added assurance that their encryption key will not be hacked, QuickLogic said.

Long considered a niche product, antifuse-based FPGAs are getting a second look by OEMs concerned about protecting their IP. Like Actel Corp.--which offers a different flavor of antifuse as well as flash-based parts--QuickLogic is seeking new interest from users of SRAM-based FPGAs.

"There's recent awareness at top levels of organizations that SRAM-based FPGAs are funda- mentally an open book," said Tom Hart, president and chief executive of QuickLogic.

SRAM-based FPGAs use a separate chip to store program data. As data is fed into the FPGA during system bootup, the code can be intercepted and copied.

Antifuse FPGAs, on the other hand, don't use a boot chip.

What's more, Hart said, QuickLogic's Vialink antifuse technique is "bulletproof," because out of more than 4 million fuses, less than 2% are programmed when logic resources are fully utilized.

"If you try to reverse engineer what's going on in there, you're going to have to figure out which fuses are programmed. It's not impossible, but it's going to be damned difficult," Hart said. "Our estimate is, it will take 23 years."

QuickLogic's IP security portal is located at www.quicklogic. com/ip_security.

Meanwhile, to protect data streams over wireless and public networks, the company is offering a 128-bit Advanced Encryption Standard engine, designed to be used in its FPGAs and ESPs. ESPs consist of a Vialink-based FPGA fabric with a fast interconnect to fixed functions on the same die, such as a 32-bit MIPS processor.

The AES128 core delivers 300Mbit/s full-duplex throughput. Offered free of charge to customers, the core is available for the QuickMIPS QL901M ESP, and will be available at the end of this quarter for all QuickLogic products.