Compared to some of the most recent posts in this series, this one is a pretty basic example of a redundancy. This redundancy applies to the bit shifting instructions of: RCL, RCR, ROL, ROR, SAL, SAR, SHL, and SHR.

These instructions can take an 8-bit immediate value, but there is also dedicated encoding for the operand to just be the value ‘1’. This is a very common operand for these type of instructions anyway, so it makes sense.

So the thing is, if we ‘rcl eax, 1’, there are two ways to encode this, but our assembler will only pick one of them. It sensibly picks the form where the encoding bakes in the implied ‘1’ operand; the other form would require an extra byte of machine code (0x01) for the immediate value.

landdealcho: Intel Manual Vol 2, Chapter 4 (Instruction Set Reference, N-Z). for the encodings (and where one of those screenshots came from). As far as my knowledge of which encoding the assembler is going to pick, I just find these things out by actual assembling them and reviewing the produced machine code. I use NASM as my assembler. Other Assemblers may do it differently (but probably shouldn’t if they did).