EUVL Focus

Insertion of EUVL into fab: Challenges for 7nm insertion

While two chipmakers are reported to be working on inserting EUVL into fabs for manufacturing at the 10nm node, many others expect to insert EUVL into manufacturing at the 7nm node or later. It takes a large infrastructure to make EUVL a manufacturing technology. So many tool suppliers, large and small, want to know when EUVL will be inserted into fabs for production and how and how much it will be used. Their business depends on these answers and some, especially smaller suppliers, are getting cold feet as delays in EUVL readiness continue. The answers to these questions mostly depend on knowing what we can expect from sources in the short- and near term, but there are many additional questions one must ask as well.

To help us develop more clarity on EUVL readiness, we are asking panelists in the upcoming 2014 EUVL Workshop (June 23-27, 2014) to respond to the following questions on whether EUVL can deliver patterning solutions for 7nm:

What is the latest status for source power available for NXE 3300B? What is your opinion on source power requirements for the 7nm and 5nm nodes?

Will EUV double patterning be required at 7nm? What will be required at 5 nm? Do you expect any OPC-related issues?

Mask: What will be the new material requirements and mask size requirements to accommodate higher NA patterning? Do you expect mask etch complexity with new materials? How ready are masks to support 7nm manufacturing? What is the status of mask defect inspection and repair tools?

Pellicle: Is a no-pellicle approach a show-stopper for HVM insertion of EUVL? What additional restrictions do you expect on inspection due to pellicle issues?

What are the different device types and lithography needed at various nodes, e.g., 3D NAND, III-V Logic, post FinFET era, etc.

Dr. Sushil Padiyar of Applied Materials (AMAT) helped me prepare these questions for the panel discussion, as he has done in previous years. I look forward to a good exchange of opinions during the panel and will report the results in this blog, in addition to summarizing the many excellent papers that I look forward to hearing. The agenda for the workshop can be downloaded at my website, www.euvlitho.com.

5 thoughts on “Insertion of EUVL into fab: Challenges for 7nm insertion”

I am starting to feel downeat about EUV as the future looks darker and darker for EUV.
Despite Mr. Wennik` s claims that ASML will have a production ready machine this year or next year, I have heard no good news in the last few motnhs about light source power and we are still stuck at few tens of Watts at best when more than one hundreds are needed for HVM.
Mask defectivity and photoresist are other issues.