MIPS continues network solutions with LTE modems, IoT

The original MIPS CPU architecture was introduced in the mid 80s and throughout its history, the MIPS CPU intellectual property has found its way into a number of network-oriented System on Chips (SoCs) and applications. From mobile networks to mobile devices, MIPS has been used in a variety of network infrastructure, gateway, base station, and user equipment applications. As mobile infrastructure transitions from 3G to LTE and 5G, MIPS is continuing to find its role. I talked with Saraj Mudigonda, Director of Segment Marketing, MIPS about the recent announcement about the MIPS LTE/5G modem CPU.

LTE trends

LTE brings with it an all-IP Evolved Packet Core (EPC) with an increasing end-to-end IP packet data environment between mobile devices and the internet. These new advances toward an all-IP network is driving a substantial increase in subscriber bandwidth use. 5G standards are under development with a goal of driving capacity to enable Internet of Things (IoT) use cases and applications. This in turn is driving requirements that need solutions:

Multiple radio access technologies (RATs) for LTE+ and 5G are needed for compatibility across generations and for fast context switching.

Up to five component carriers for LTE and especially for 5G can be aggregated to increase downlink bandwidth needed to support LTE/5G applications.

Pre-standard 5G is targeted for the 2018 Winter Olympics, putting incredible time to market pressure on the mobile operators and ecosystem.

MIPS and LTE/5G

The MIPS IP portfolio and the enabling ecosystem make MIPS a good choice for an integrated SoC solution. The solution needs the physical modem stack, the RF stack, plus a crypto engine. The focus is on the physical layer control and L2/L3 protocol stack, which requires a combination of performance to handle the total data bandwidth, plus fast context switching in support of features like carrier aggregation. The MIPS multi-threaded, multi-core CPU facilitates this. The physical layer itself is typically on a DSP/hardware accelerator and is available from ecosystem partners, although some manufacturers integrate their own physical layer.

The result is that a variety of base stations and UE equipment use MIPS. Customers have deployed products from narrowband IoT to LTE and LTE advanced with some working on 5G.

Fine-grained multithreading

One of the key features in the MIPS cores used in this application area is what Saraj called “fine-grained multithreading”. Traditional CPU multithreading involves a thread running until it’s interrupted by an event that results in a longer latency stall. MIPS implements a hardware-based fine-grained multithreading capability where the CPU core is checking every cycle whether the current thread is stalled. If stalled, the hardware scheduler will change execution to another thread that is ready to run. By utilizing this capability in hardware, even single cycle stalls can be dealt with, resulting in higher overall instruction per cycle (IPC).

The MIPS fine-grained multithreading capability provides for extremely fast context switching: when implementing LTE products, using four threads for four component carriers enables the implementer to store the context of each component carrier within a thread and the hardware takes care of the context switching, which allows concurrent simultaneous operation of the four components. There are also additional cores or threads available to run applications with a larger OS like Linux.

5G requirements

3GPP categorizes 5G into three parts:

5G enhanced mobile broadband (eMBB) – This is characterized by data rates, and carrier aggregation. 5G uses extended mmWave frequencies, but can give you increased performance and data rates. This is where the fine-grained multi-threading capabilities and multi-core support of the MIPS CPUs is important.

The same picture with the MIPS capabilities is shown in the figure below. MIPS multi-core, multi-threading capability, power, integration, and virtualization/security features can help each area in the diagram achieve the requirements.

Security

Saraj also mentioned the Omnishield feature in MIPS. Omnishield provides security through separation of memory and I/O spaces used by each functional component. MIPS extends this notion by providing multiple domains that can be created within the system. MIPS allows for up to 255 domains which provides the ability for applications to be isolated between each other in separate domains as opposed to these applications residing in a single area.

This is accomplished by using what appears “logically” as a second MMU which is a characteristic of the MIPS Virtualization architecture footprint.

Malicious or accidental software execution that could cause a system crash.

A type I hypervisor that supports full virtualization of the CPU is needed to implement Omnishield. The hypervisor then manages the resource/privilege to access of one or more of these domains or Guests. A Guest can be defined by as little as a single application or as broad as an entire operating system or multiple OSes.

Secure boot

Another important issue with 5G and IoT is how to perform software downloads and updates in a secure, reliable way. MIPS implements a secure boot and chain of trust capability to address this. A level-0 boot loader, Root of Trust, is where it all starts. The level-0 boot loader authenticates the next boot loader, then loads and transfers control to that boot loader. This level-0 boot loader is programmed at the OEM and can’t be changed after manufacture. In this way, it cannot be changed and as a result can be trusted to authenticate and transfer control to the follow-on agents performing the software update.

The level-1 boot loader deals with authentication of the image. The authentication typically involves confirming that the payload (code, data, secrets, etc.) hasn’t been tampered with. Once authenticated, the decryption of the payload may also be performed (if required).

The level 1 boot loader then gives way to a level-2 boot loader which authenticates the hypervisor image, establishing a chain of trust. Once the trusted hypervisor is launched, it can perform the initial configuration of the system, set up memory domains, and authenticate Guests.

Summary

LTE and 5G define a rich feature set and a variety of applications which require a unique mix of low latency, high reliability, and security features. Virtualization for low end IoT devices where security is important coupled with the availability of DSP extensions opens up a wider market for voice controlled speakers, modems, VoLTE, and surveillance cameras to name a few. The features and capabilities of the MIPS architecture and ecosystem partners provide an effective means for meeting these new demanding requirements to realize new and emerging IoT applications on the horizon.

According to Saraj, “We are very excited by the range of applications – from bandwidth-hungry applications to dense IoT nodes to low latency automotive applications – that 5G promises to deliver with its vast spectrum support from sub-GHz to mmWave. With proven technologies such as MIPS hardware multi-threading and hardware virtualization which are demonstrated in a wide range of LTE and networking products, companies can create high-performance, highly optimized and trusted solutions for 5G.”

About the Author

Curt Schwaderer is a Technology Trends Specialist at OpenSystems Media. With over 25 years of development experience in the embedded industry, Curt has R&D experience in RTOS, WAN/LAN communications, and deep packet inspection software development for networked embedded systems from industrial control to smart devices, IoT, and set top boxes. For more information, contact Curt at cschwaderer@opensystemsmedia.com.