The AMBA AHB bus from ARM Cambridge was widely used: but is quite complex
and was intolerant of additional pipeline stages being inserted between initiator and responder (i.e. had no temporal decoupling).

The OCP BVCI supports temporal decoupling, but requests and responses must
not overtake: hence it can cross clock domains and tolerate pipeline
stages.
But it cannot tolerate reordered responses (e.g. from a DRAM).

One ARM AXI protocol includes tags on each operation for out-of-order request/response
association: hence it is suitable for pipelined, on-chip networks where message sequencing may vary.