What is TINKER?

Since 1994, the TINKER project at NC State has removed traditional
of layers of abstraction to uncover new techniques for high performance
microprocessors.
The project has focused on breaking down the layers between the microarchitecture, the instruction set, the compiler and the operating system. The first
direction of the project was the creation of an
EPIC/VLIW test bed for both general-purpose and embedded applications,
the study of very wide EPIC machines, and the study of variable grainsize parallel
processing. This now includes a rich suite of simulators, a compiler, synthesizable HDL designs, and
custom-silicon implementations of example designs. The project also addresses new
techniques for solving some of the traditional problems of statically-scheduled machines. These problems include
poor memory usage, the practicality of profile-driven scheduling, and lack of object-code
compatibility between generations.

The core semantics of the TINKER processor testbed were initally taken from the HP Laboratories PlayDoh architecture (which
in turn had a large influence on the HP/Intel IA-64 instruction set). PlayDoh (now
officially called HPL-PD) is a set of VLIW semantics developed by Vinod Kathail,
Mike Schlansker and B. Ramakrishna Rau of Hewlett-Packard's Compilers and Architecture
Research group. The specification defines a class of instruction sets with the following
properties, among others:

Current research directions include dynamic compilation by merging the compiler with the operating system, ultra low power designs using microarchitecture / ISA / compiler collaborations, enhanced micro threading to hide memory latencies, and new techniques for global instruction scheduling.