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Engineers at Stanford University have constructed a computer built using transistors made of carbon nanotubes instead of silicon after working out kinks that for years have kept similar projects from succeeding. "People have been talking about a new era of carbon nanotube electronics moving beyond silicon," said Subhasish Mitra, one of two researchers who led the project. "But there have been few demonstrations of complete digital systems using this exciting technology. Here is the proof."

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The first computer to be based on ICs made with carbon nanotubes has been realized at Stanford University. Commercial use of the technology may be a decade away, however. "People have been talking about a new era of carbon nanotube electronics moving beyond silicon," Stanford scientist Subhasish Mitra said in a statement. "But there have been few demonstrations of complete digital systems using this exciting technology. Here is the proof."

Researchers at Stanford University have fashioned a functioning computer with transistors made of carbon nanotubes, instead of silicon. Finding a suitable successor to silicon in electronics has consumed scientists in recent years, as silicon-based semiconductor manufacturing approaches physical limits on its continuing miniaturization. "Of all the candidates that have been considered as a successor to silicon, carbon nanotubes remain the most promising," IBM's Supratik Guha said.

Engineers are preparing for a post-silicon world by experimenting with new materials designed to meet the needs of ever-increasing processing speeds that will one day make standard processing technology obsolete. Researchers at the College of Engineering at Oregon State University have made a breakthrough using metal-insulator-metal, or MIM, diodes that rely on "tunneling" to eliminate electron resistance and can be produced on a mass scale with low-cost materials.

Carbon nanotubes could replace silicon-based chips in the next decade because they use less energy and are faster, Stanford researchers say. "The bottom line is you can expect an order of magnitude in power saving at the system level," said Subhasish Mitra of Stanford who also is a director at Robust Systems Group.

To deal with the power consumption issues in verifying IC designs, Lawrence Loh of Jasper Design Automation recommends adopting formal methods in this technical article. "Formal methods are used throughout the design flow from architectural validation, through RTL implementation, to post-silicon debug -- and this applies to power-aware verification, too," he writes.