Electronica: Micron memory to skip a node

MUNICH, Germany Ė U.S. memory chip maker Micron Technology Inc. is looking at a so-called 2X-nm process manufacturing node for its next generation of phase-change memory (PCM). This will be a production node at roughly the same minimum geometry that Micron is investigating for the introduction of vertical-NAND flash memory, said Jeff Bader, vice president of marketing at the embedded systems group of Micron, speaking at the Electronica exhibition here.

Micron (Boise, Idaho) skipped a generation of PCM before. It introduced a couple of 128-Mbit memories in a 90-nm process in December 2008 before launching a 45-nm 1-Gbit PCM in July 2012. Now Micron has said it will jump the 3X-nm node.

The term 2X-nm node is the nomemclature being adopted by the memory industry to denote a manufacturing process with minimum geometries of somewhere between 20-nm and 29-nm. At such fine geometries old fashioned measurements of transistor gate width, line width and the half-pitch of repeated structures become hard to measure.

Bader did not indicate that a PCM introduction at 2X-nm is certain or at what level of memory capacity Micron would be aiming. Micron already produces NAND flash at 256-Gbit using a 2X-nm process and moves to vertical-NAND will take capacity even higher.

However, Micron continues to pioneer the introduction of PCM, a form of non-volatile memory that makes use of change in the phase, and hence in resistance, of a thin layer of chalcogenide material. PCM claims advantages over traditional memory devices in areas such as boot time, simplified software development, performance and overwrite capability. However, the memory has been more than 40 years coming to market and detractors argue that it will never be cost competitive with other types of memory, and there are also concerns about PCM's temperature sensitivity.

Bader said that Micron will ship tens of millions of units of 1-Gbit PCM in 2012 in 45-nm process in its leading-edge component, which combines a 1-Gbit PCM die with a 512-Mbit SDRAM and provides a LPDDR2 interface. The product is targeted at high-end feature phones and low ends smartphones, which can benefit from the speed of the read in PCM and simplified software development.

Micron's volume comes from a couple of cell phone design wins. One is the Nokia Asha phone (see www.nokia.com/global/products/asha). The other has not been disclosed, said Bader.

Bader added: "We're also looking at opportunities for the 1-Gbit PCM generation in other embedded applications." He said that the replacement of smaller NOR- and NAND-flash memories with same-pin-out phase-change memories showed promise, because Micron would be able to save die area and therefore cost. "Things like 128-Mbit 90-nm NAND, 256-Mbit NAND might be lower cost production in the 45-nm phase-change process," Bader said.

Bader said that the first PCM products Micron brought to market, parallel- and serial-NOR 128-Mbit made using 90-nm, are only selling in very low volumes. However, the memories are finding their way in to some interesting applications with potential, replacing battery-backed SRAM. "Smart metering is one potential activity," Bader said.

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