By default, each timer is clocked internally by SCLK. The PULSEHI bit controls only the polarity of the pulses produced. The timer interrupt may occur slightly before the corresponding edge on the TMR pin. The TMR output pin can be disabled in PWMOUT mode through the TIMER_TMR_CFG.OUTDIS bit. The PWMOUT mode supports 2 sub modes, continuous PWMOUT and single-pulse PWMOUT.

In continuous PWMOUT mode, the timer generates repetitive pulses with well-defined period, duty cycle and pulse position. The TIMER_TMR_DLY, TIMER_TMR_PER and TIMER_TMR_WID registers are programmed with the values of the required PWM pulse. Initially, the TMR pin remains in a de-asserted state. It toggles to an asserted state when TIMER_TMR_CNT=TIMER_TMR_DLY. The assertion sense of the TMR pin can be controlled with the TIMER_TMR_CFG.PULSEHI bit. The TMR pin holds this value for the number of clock cycles specified in TIMER_TMR_WID, after which it de-asserts and holds this value until the completion of the programmed period. The same waveform is generated repeatedly until the timer is disabled.

Before you can use the gptimers functions, you must first make sure to allocate and portmux the pins. This can be accomplished via the portmuxing API. Once you've taken the peripheral for yourself, you enable the IRQ for it. Finally you setup the timer and enable it. Once the timer starts receiving valid wave forms, you'll receive an IRQ for them.