TOTAL RECALL: Advanced Memory Technologies Panel 2012 (February 1)

Mobile computing is now everywhere, enabled by faster and more capable smart phones, tablets, and laptops than ever before. Universal mobility and instant-on connectivity may herald a new era in computing, but improvements in key technologies are necessary to keep up with the constant demand for higher performance and power efficiency from ever smaller form factors.

Join us for a lively discussion with innovators in the advanced memory technology field, as we explore what comes next after SRAM, DRAM, and NAND. Will evolutionary advancements in current memory types satisfy? Or will the future of memory belong to emerging devices enabled by new classes of data storage and recall such as PCM, SST-MRAM, RRAM and CBRAM? The ultimate answers to these questions, which our esteemed panelists promise to address head-on, have the potential to significantly impact the ways in which we interface to an increasingly e-connected world.

H.-S. Philip Wong joined Stanford University as Professor of Electrical Engineering in September, 2004. From 1988 to 2004, he was with the IBM T.J. Watson Research Center. He held various positions from Research Staff Member to Manager, and Senior Manager. While he was Senior Manager, he had the responsibility of shaping and executing IBM’s strategy on nanoscale science and technology as well as exploratory silicon devices and semiconductor technology. His present research covers a broad range of topics including carbon nanotubes, biosensors, self-assembly, exploratory logic devices, nanoelectromechanical relays, device modeling, and novel memory devices such as phase change memory and metal oxide resistance change memory. He is a Fellow of the IEEE and served on the Electron Devices Society AdCom as elected member (2001 – 2006). He served as the Editor-in-Chief of the IEEE Transactions on Nanotechnology in 2005 – 2006, sub-committee Chair of the ISSCC (2003 – 2004), General Chair of the IEDM (2007), and is currently a member of the Executive Committee of the Symposia of VLSI Technology and Circuits (2007 – 2010). He received the B.Sc. (Hons.), M.S., and Ph.D. from the University of Hong Kong, Stony Brook University, and Lehigh University, respectively. He currently holds the Chair of Excellence of the French Nanosciences Foundation.

Rob Aitken, ARM Fellow, spends his days in the technology trenches with nanometer scale devices and picosecond timing, looking at the circuits that eventually get put together to make smart phones or mildly clever toasters. He is a fan of all aspects of chip design, from transistors on up, and also of the various tools and methods that enable efficient, productive and successful design and manufacturing.

Ishai Naveh is a co-founder and the Vice President of Marketing and Business Development for Adesto Technologies. In his role, he is responsible for forging partnerships as well as positioning the company in growing, lucrative markets. Previously Mr. Naveh, was the VP of Marketing for Non-volatile Memories and Mixed Signal Technologies at Tower Semiconductor USA. Prior to arriving in the USA, he was Senior Director for foundry technologies at Tower. Mr. Naveh began his career at National Semiconductor, holding several positions in the USA and Israel. Mr. Naveh holds a B.Sc. from the Hebrew University and MBA from Heriott-Watt University. He has published several papers and issued over 10 patents.

Rajiv Ranjan co-founded and has served as Chief Technology Officer at Avalanche Technology since August 2006. Prior to Avalanche Technology, Dr. Ranjan served as the Executive Director of R&D at Seagate where he led the technology development which fueled a doubling of revenue to over $10B. His technology pioneering efforts have led to the productization of low-noise media, perpendicular media and laser texturing. These technologies are now widely used in devices which revolutionized the data storage industry. Dr. Ranjan was recognized by both the United States Congress and the Prime Minister of India for his outstanding research in the field of magnetic recording, where he holds over 75 patents. Earlier in his career, Dr. Ranjan directed Komag's R&D team, which under his direction pioneered the granular and oriented media technology, enabling revenue grow to over $600M. Dr. Ranjan received his PhD. in Material Science and Engineering from Iowa State University on a full United States Department of Energy scholarship. He received the prestigious SIMS-86 award from the Instrument Society of America for his design of a transducer for magneto-acoustic detection. Rajiv graduated from the India Institute of Technology, Kharagpur as a Silver medalist in the field of Metallurgical Engineering. He has published over 60 papers in the magnetic recording field and has lectured at UC Berkeley, Stanford University and Carnegie Mellon University on magnetic recording technologies.

Jon Slaughter directs R&D efforts for Everspin’s Spin-Torque MRAM. Previously, he was manager of MRAM Process and Magnetic Materials for Freescale, where his team was responsible for developing the magnetic materials used to bring the first MRAM to volume production in 2006, including the magnetic tunnel junction (MTJ) bits that are at the heart of MRAM technology. Jon’s numerous technical contributions have resulted in 40 issued patents. His honors include being named a Freescale distinguished member of the Technical Staff in 2007 and receiving the Motorola Distinguished Innovator Award in 2001. Before joining Freescale, Jon was an associate research professor at the University of Arizona's Optical Sciences Center, specializing in the effects of film growth and microstructure on the properties of ultra-thin metallic films and multilayers. Jon earned a doctorate in physics from Michigan State University in 1988 where he was awarded the Sherwood K. Haynes Award for his research on the structure and electronic properties of magnetic multilayers. He has more than 90 publications in scientific/technical journals and is active in IEEE, technical conferences and select university collaborations.

Steve Hudgens is former Director of Research and Chief Technical Officer at Ovonyx, Inc. His research interest is primarily in the electrical properties of amorphous tetrahedral and chalcogenide alloy semiconductors and he has been involved in commercialization of a number of amorphous semiconductor based technologies including thin film amorphous silicon solar cells and photoreceptor drums and chalcogenide alloy non-volatile memory devices. Steve received his PhD in solid-state physics from the University of Chicago in 1976. He was a post-doctoral fellow at MIT and a senior research physicist at Eastman Kodak Research Labs, prior to joining the staff of Energy Conversion Devices in 1980. He was Director of Research at Energy Conversion Devices in 1999 when Ovonyx was formed.

Dr. Parrillo joined Unity Semiconductor, a memory technology company developing an innovative non-volatile memory to replace NAND flash, in 2011 as Chief Technology Officer. Before joining Unity, he was Executive Vice President of Research and Development at Spansion, Inc. where he was responsible for technology development and strategic technical alliances. He was with Motorola Inc. for much of his career and held various executive management roles, including Division General Manager and Semiconductor Chief Technology Officer. Earlier in his career, he led leading-edge technology development groups at AT&T Bell Laboratories. He is a member of the US National Academy of Engineering and a recipient of professional awards including the IEEE Frederik Philips Award and the J. J. Ebers Award from the IEEE Electron Devices Society. Dr. Parrillo received his PhD. and MS from Princeton University and a BS in Electrical Engineering from the University of Connecticut.