AMD to Use Half-Node Process Technologies for Low-Power APUs.

Advanced Micro Devices has disclosed its process technology roadmap and revealed that it would use so-called half-node process technologies for its low-power accelerated processing units (APUs). While the company admitted that going forward it is obliged to move a substantial part of its graphics chip and APU production to Globalfoundries, it did not reveal any exact plans.

"We are going to move to half-node cadence, which means 28nm, 20nm and 14nm. That allows us to be more industry-standard and support all our APU products. [...] The move to 28nm will allow us to [release new APUs every year]," said Chekib Akrout, senior vice president of technology group at AMD, during his speech at the company's analyst day.

The roadmap, which AMD presented at its conference, reflects various process technologies offered by Globalfoundries and Taiwan Semiconductor Manufacturing Company as well as the plans of the chip developer to use them.

Based on the slide, AMD intends to obtain first samples of its Krishna and Wichita APUs set to be made using a 28nm HKMG process technology already in the first half of 2011 and initiate their production in the first half of 2012. When asked whether AMD plans to utilize Globalfoundries' or TSMC's 28nm process technology for the new APUs, Mr. Akrout refused to respond. However, he did say that the 28nm technology that AMD would use for those chips is a "gate-first" tech and presently Globalfoundries is one a few companies that are developing 28nm HKMG gate-first fabrication process, whereas TSMC and others are working on 28nm HKMG gate-last technology.

Unfortunately for AMD, production of chips using 20nm process is only expected to commence in the second half of 2013, which is more than 1.5 years later than Intel's initiation of production using 22nm fabrication technology.

Even though the roadmap includes Globalfoundries 32nm silicon-on-insulator process technology, which AMD will use to make its Bulldozer-based microprocessors in the next two years, the plan lacks the next-generation 22nm SOI process as well as 16nm SOI technology. Potentially, this may mean that the Sunnyvale, California-based designer of chips plans to dump SOI in the coming years and switch to more affordable bulk wafers. Since such scenario is not very likely - as SOI gives a number of benefits to AMD processors - it is possible that the company simply has no solid CPU roadmap for 22nm and 16nm nodes that it can demonstrate to the public.

Even though Mr. Akrout calls 28nm, 20nm and 14nm fabrication processes as "half-node" technologies, it should be noted that neither Globalfoundries nor TSMC have "full-node" bulk 32nm, 22nm and 16nm manufacturing processes even in plans.