Category Archives: XCell Articles

FPGAs are unlike many classes
of components in that the
power they will require on their
core, auxiliary and I/O voltages
depends upon the implementation of
the design. Determining the power dissipation
of the FPGA in your application
is thus a little more complicated
than just reading the datasheet. It can
therefore be challenging to ensure you
have the correct power architecture—
one that takes into account not only the
required quiescent currents, ramp rates
and sequencing, but also has the ability
to suitably power the end application
while remaining within the acceptable
junction temperature of the device.

Because of its unique mix of ARM processing
clout and FPGA logic in a single device, the
Zynq™-7000 All Programmable SoC requires a
twofold configuration process, one that takes into
account both the processor system and the programmable
logic. Engineers will find that the configuration
sequence differs slightly from that of traditional
Xilinx® FPGAs. Nevertheless, the methodology is
familiar and it’s not at all difficult to generate a boot
image and program the configuration memory.
Where standard FPGA configuration practices normally
require only the FPGA bit file, you will need to
add a second type of configuration file to get the maximum
benefit from your Zynq SoC: the SW Executable
and Linakble Format (ELF) file. The FPGA bit file
defines the behavior of the programmable logic section
of your design, while ELF file is the software program
that the processing system will execute.
So let’s have a look at how to implement a baremetal
(no operating system) software application on
your Zynq SoC.

To many engineers and project
managers, implementing
the functionality within an
FPGA and achieving timing
closure are the main areas of focus.
However, actually designing the FPGA
onto the printed-circuit board at the
hardware level can provide a number
of interesting challenges that you must
surmount for a successful design.

FPGAs are often called upon to perform
sequence- and control-based actions such as
implementing a simple communication protocol.
For a designer, the best way to address
these actions and sequences is by using a state
machine. State machines are logical constructs that transition
among a finite number of states. A state machine will be in
only one state at a particular point in time. It will, however,
move between states depending upon a number of triggers.

One of the many benefits of an FPGA-based solution
is the ability to implement a mathematical
algorithm in the best possible manner for the
problem at hand. For example, if response time
is critical, then we can pipeline the stages of mathematics.
But if accuracy of the result is more important, we can use
more bits to ensure we achieve the desired precision. Of
course, many modern FPGAs also provide the benefit of
embedded multipliers and DSP slices, which can be used to
obtain the optimal implementation in the target device.
Let’s take a look at the rules and techniques that you can
use to develop mathematical functions within an FPGA or
other programmable device.

Once it’s performed the task it
was designed to do, an FPGAbased
system next has to interface
with the real world, and as every
engineer knows, the real world tends
to function around analog as opposed
to digital signals. That means conversion
is going to be required to and from
the digital domain from the analog
realm. Just as you face a plethora of
choices in selecting the correct FPGA
for the job at hand, so too will you find
an abundance of riches when choosing
the correct ADC or DAC for a system.

Invented by Jack Volder while designing a new navigation
computer at Convair for the B-58A Hustler program
in 1959, CORDIC—it stands for Coordinate Rotation
Digital Computer—is a simple algorithm designed to calculate
mathematical, trigonometric and hyperbolic mathematical
functions.

Filters are a key part of any signal-
processing system, and as
modern applications have
grown more complex, so has
filter design. FPGAs provide
the ability to design and implement filters
with performance characteristics that
would be very difficulty to re-create with
analog methods. What’s more, these digital
filters are immune to certain issues that
plague analog implementations, notably
component drift and tolerances (over temperature,
aging and radiation, for high-reliability
applications). These analog effects
significantly degrade the filter performance,
especially in areas such as passband ripple.

Designers traditionally build switchmode
DC/DC converters using analog
components (bespoke ICs, operational
amplifiers, resistors, capacitors and
the like) to control the feedback loop
and to generate the pulse-width modulation
required for switching. When
using analog components like these,
you must consider a number of factors,
taking tolerances, electrical
stresses, aging drift and temperature
drift into account to ensure the stability
of the design. Now, the availability
of affordable low-powered FPGAs
coupled with analog-to-digital converters
allows the FPGA to replace the traditional
analog approach.