Tag Archives: Cadence

As of today, you can start to develop application software for the Xilinx Zynq-7000 family of Extensible Processing Platforms (EPP) using a virtual prototyping platform announced today and jointly developed by Xilinx and Cadence. The virtual platform provides an accurate … Continue reading →

Later this month, you have the opportunity of attending the ARM TechCon 2011 conference being held in the Santa Clara Convention Center in California. Tuesday, October 25 is dedicated the many different aspects of advanced to SoC design and the … Continue reading →

This week at the Embedded Systems Conference (ESC) in San Jose, Cadence rolled out the System Development Suite and one of the products in that suite is the Cadence Virtual System Platform, which you can use to get high-level system … Continue reading →

EDA360 defines System Realization as the development of complete hardware/software platforms ready for applications development even before the chip is designed. Cadence offers many free Webinars—both live and archived—that you might find useful. Here are a few Webinars related to … Continue reading →

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About the author:

Steve Leibson has appeared on television with Leonard Nimoy (Star Trek's Mr. Spock), however he's not a TV star (although he's always open to offers). He is the Cadence EDA360 Evangelist and a Marketing Director at Cadence Design Systems, the leading EDA vendor for system and chip-level design tools, design IP and IP design platforms, and verification IP. Steve’s written some of the key books about IP-based SOC design including “Designing SOCs with Configured Cores,” published in 2006 and “Engineering the Complex SOC,” co-authored with Dr. Chris Rowen and published in 2004. An experienced design engineer, Steve has been evangelizing advanced, IP-centric SOC design since 2001.