Let The IP Wars Begin

y Ed Sperling
Nature abhors a vacuum. Customers abhor a monopoly. It appears both problems are now being solved in the EDA world—assuming approval by regulatory agencies, of course.

There have been two concerns facing chipmakers in regards to third-party IP. One is political. Most large companies spent millions of dollars and thousands of frustrating man-hours developing their own internal IP. It’s hard to justify throwing that away in favor of commercially developed IP, and for several process nodes engineering teams have managed to tweak the heck out of it and make it work, even if the result isn’t optimal.

This approach is like patching a pair of jeans over and over again. Pretty soon they look more like patches than jeans. Now even the patches are wearing thin. For most ICs, the internally developed IP is inferior to what’s on the market, meaning the only differentiation is negative.

That’s one of the reasons that commercial IP sales are on the rise. They’re now approaching 50% of all standard IP in an SoC for some companies, and the projection is that number could rise as high as 80%. Commercial IP saves time. Most of it is extremely well tested and characterized across a large base of diverse customers, and much of it is even proven in silicon. Over the next few years, it’s likely there will be a bigger push into subsystems, as well, and while the concept isn’t new the reality is that adoption has been very limited.

Commercial IP was created to fill this vacuum, speed up time to market and focus precious engineering resources where chips really can be differentiated—software, analog/mixed signal and integration. While there has been plenty of competition in the IP processor world—total sales are now above 10 billion units per year, according to Semico Research—there has been far less traffic in the standard IP market. That’s about to change.

The reason is competition. No one likes one company to have the lion’s share of anything. In fact, it can stall a market faster than anything else. New tools are great, but it’s really tough to find any chipmaker that uses a single vendor’s integrated flow from start to finish—particularly a company with enough resources to really pick and choose what they want. Even IDMs that traditionally developed their own EDA tools have a mix of in-house and commercial tools.

In the standard IP market, Synopsys has done well so far without much direct competition from other EDA companies. As competition increases—Cadence has made its intentions rather obvious over the past couple months—the amount of commercial IP used in designs should increase dramatically. Even Mentor Graphics, which has kept a hand in the software and memory IP markets, is likely to benefit greatly from this competition, and so are companies that offer IP around the edges such as the developers of network-on-chip IP.

Customers certainly like being able to play off one company against another on price, of course, but far more important is having a reference point for IP quality from companies they can trust. One company can’t provide that, no matter how good the data. Chipmakers already are comfortable with the big EDA companies, because they rely each day on EDA tools to develop incredibly complex chips at advanced process nodes. As those EDA companies ramp up their IP capabilities, the likelihood that they also will now feel more comfortable with standard IP, and offer suggestions about how to tweak it to make it even better, is extremely high.

So let the IP wars begin. It’s the best way to grow this side of the industry, improve quality, and reduce the cost and time it takes to bring complex SoCs to market.