Course Objective: Introduction to hardware description languages and associated methodologies for digital system design. In-depth coverage includes applications to the simulation and synthesis of digital systems. While the course focuses on the use of VHDL, the use of other languages such as C and Java will also be covered.

Text: Class NotesCourse Materials: CAD Environments will be made available in class

Grading:

Quiz I

10%

Date:TBD

Quiz II

10%

Date: TBD

Five Projects

50%

Dates: TBD

Final Project

30%

Due end of day the last day of classes. Presentations during the final exam period.

Quizzes: Quizzes will be 55 minutes.

Attendance: Students are responsible for all material covered in class, including changes in exam schedules announced in class. Make-up exams will be considered only if the student informs the instructor of the absence prior to the exam date, or, when prior information was not possible, immediately following the exam. Make-up exams are not guaranteed to be the same as the exam given in class.

WebCT: We will be using an online course management system known as WebCT. It will host a bulletin board and will be repository for your grades. The site and the access will be described in class.

Academic Honesty: Although students are encouraged strongly to work together to learn the course material, all students are expected to complete assignments individually unless otherwise noted (for example the final project). All conduct in this course will be governed by the Georgia Tech honor code. Additionally, it is expected that students will respect their peers and the instructor such that no one takes unfair advantage of anyone else associated with the course. Any suspected cases of academic dishonesty will be reported to the Dean of Students for further action.

Final Project: The final project will have an associated project report that will be web based. Minimal format requirements for the project web pages will be provided in class.