i.MX7 PCIe h/w clock

We are working on a i.MX7 product. We noticed that the PCIe hardware has a 100M clock generator in Sabre board. Is it a must? Could we use the processor internal pll instead? We did not add this clcok gen at our i.MX6 product. We could work fine by using the internal pll in our i.MX6 product. We would like to know if this clock gen is a must. Thanks.

It is possible to use the processor's internal clock source/PLL as a reference clock for the PCIe bus. This can be controlled by the IOMUXC_GPR_GPR12[PCIE_PHY_REFCLK_SEL] bit. For more information, please refer to the i.MX7Dual Reference Manual document, available on the processor's Documentation web page: