Synchronous enable signal. When LOW the core ignores all its inputs and all its outputs must be ignored.

RESET

Input

HIGH level asynchronously resets the core

READ

Input

Read signal for the interface

WRITE

Input

Write signal for the interface

DONE

Output

HIGH level indicates a completion of computation

D[ ]

Input

Input Data

A[ ]

Input

Address

Q[ ]

Output

Output Data

Function Description

The core implements the exponentiation operation of the RSA cryptography Q = Pk. The operands for the exponentiation: k and P as well as the modulus are programmed through the microprocessor interface and the calculation is started. Once the operation is complete, the result Q can be read through the interface.