Author

Date of Graduation

Document Type

Degree Name

Master of Science in Electrical Engineering (MSEE)

Degree Level

Graduate

Department

Electrical Engineering

Advisor

Alan Mantooth

Committee Member

Randy Brown

Second Committee Member

Jia Di

Abstract

The potential of silicon carbide (SiC) for modern power electronics applications is revolutionary because of its superior material properties including substantially better breakdown voltage, power density, device leakage, thermal conductivity, and switching speed. Integration of gate driver circuitry on the same chip, or in the same package, as the power device would significantly reduce the parasitic inductance, require far less thermal management paraphernalia, reduce cost and size of the system, and result in more efficient and reliable electrical and thermal performance of the system.

The design of a gate driver circuit with good performance parameters in this completely new under-development SiC process is the key to realization of this ultimate goal of integrating a SiC gate driver with a SiC power MOSFET. The objective of this joint undertaking is integration of the designed gate driver into the electronic battery charger onboard the new plug-in hybrid Toyota Prius. The ultimate goal of the project is in-vehicle demonstration and commercialization. This high frequency charger will be five times more powerful with a 10 times size reduction and significant cost reduction on the long run.

This thesis presents the design, layout, simulation, testing and verification of a gate driver circuit implemented and fabricated in the Cree SiC process. The gate driver has a rise time and fall time of 45 ns and 41 ns, respectively, when driving a SiC power MOSFET with peak current reaching around 3 A. At a switching frequency of 500 kHz, the gate driver power dissipation was around 6.5 W. The gate driver was operable over a temperature range between 25 °C and 420 °C with only slight degradation in performance parameters. This thesis will provide a comprehensive overview of gate driver design and testing phases with relevant background.