CLK_SET_RATE_PARENT flag is added to definitions of clocks on a pathstarting from CLK_SCLK_I2S1 up to AUD_PLL in order to allow settingrequired audio root clock frequency for the I2S1 block. This is nowonly done for the I2S1 block, related CMU_TOP, CMU_PERIC clockdefinitions are changed.