Power-saving processor strategy is a tough call

The obvious solution may not be the best, but the analysis is also tricky

We all know that the most-obvious answer to a problem may not be the best one. For example, consider a handheld medical instrument that must capture a burst of data, and then execute a complex, numerically intensive algorithm.

The first approach might be to use a lower-power MCU, since that's the obvious way to reduce power. But maybe it's better from a power perspective to use a more advanced processor that can execute the algorithm more quickly and then spend lots of time in idle/quiescent mode. Yes, it may consume more power doing the calculations, but it gets the job done in less time, so the total power consumption may be less. (Of course, this discussion ignores BOM and cost, board space, and other design issues, but that's a discussion for another time.)

The tradeoff analysis doesn’t stop there, either. You have to look at the efficiency of the power supply for each processor class when running full-output, and also the efficiency at lower power levels when the processor is in reduced-operation mode. In addition, there are considerations of supply start-up time when going from lower-power mode to higher-power mode, which affects efficiency and processing time.

Assessing and evaluating the choices–and the tradeoffs that each brings–is not easy, and requires data, perspective, and engineering experience. It also requires the system designer to look beyond just the processor and supply situation, because there's always the law of unintended consequences to worry about. ♦