10 LM555/NE555/SA555 Figure 1 illustrates a monostable circuit. In this mode, the timer generates a fixed pulse whenever the trigger voltage falls below Vcc/3. When the trigger pulse voltage applied to the #2 pin falls below Vcc/3 while the timer output is low, the timer's internal flip-flop turns the discharging Tr. off and causes the timer output to become high by charging the external capacitor C1 and setting the flip-flop output at the same time. The voltage across the external capacitor C1, VC1 increases exponentially with the time constant t=ra*c and reaches 2Vcc/3 at td=1.1ra*c. Hence, capacitor C1 is charged through resistor RA. The greater the time constant RAC, the longer it takes for the VC1 to reach 2Vcc/3. In other words, the time constant RAC controls the output pulse width. When the applied voltage to the capacitor C1 reaches 2Vcc/3, the comparator on the trigger terminal resets the flip-flop, turning the discharging Tr. on. At this time, C1 begins to discharge and the timer output converts to low. In this way, the timer operating in the monostable repeats the above process. Figure 2 shows the time constant relationship based on RA and C. Figure 3 shows the general waveforms during the monostable operation. It must be noted that, for a normal operation, the trigger pulse voltage needs to maintain a minimum of Vcc/3 before the timer output turns low. That is, although the output remains unaffected even if a different trigger pulse is applied while the output is high, it may be affected and the waveform does not operate properly if the trigger pulse voltage at the end of the output pulse remains at below Vcc/3. Figure 4 shows such a timer output abnormality. Figure 4. Waveforms of Monostable Operation (abnormal) 2. Astable Operation +Vcc RESET TRIG 8 Vcc DISCH THRES 7 6 RA RB Capacitance(uF) M 1MΩ 1M 1M 10M 10MΩ 10M 10M 10k 10kΩ 10k 10k 100k 100kΩ 100k 100k 1k 1kΩ 1k 1k (R +2R ) A B RL 3 OUT GND 1 CONT 5 C2 C E-3 100m k Frequency(Hz) 10k 100k Figure 5. Astable Circuit Figure 6. Capacitance and Resistance vs. Frequency 5

11 LM555/NE555/SA555 Figure 7. Waveforms of Astable Operation An astable timer operation is achieved by adding resistor RB to Figure 1 and configuring as shown on Figure 5. In the astable operation, the trigger terminal and the threshold terminal are connected so that a self-trigger is formed, operating as a multi vibrator. When the timer output is high, its internal discharging Tr. turns off and the VC1 increases by exponential function with the time constant (RA+RB)*C. When the VC1, or the threshold voltage, reaches 2Vcc/3, the comparator output on the trigger terminal becomes high, resetting the F/F and causing the timer output to become low. This in turn turns on the discharging Tr. and the C1 discharges through the discharging channel formed by RB and the discharging Tr. When the VC1 falls below Vcc/3, the comparator output on the trigger terminal becomes high and the timer output becomes high again. The discharging Tr. turns off and the VC1 rises again. In the above process, the section where the timer output is high is the time it takes for the VC1 to rise from Vcc/3 to 2Vcc/3, and the section where the timer output is low is the time it takes for the VC1 to drop from 2Vcc/3 to Vcc/3. When timer output is high, the equivalent circuit for charging capacitor C1 is as follows: R A R B Vcc C1 Vc1(0-)=Vcc/3 dv c1 V cc V0- ( ) C = ( 1) 1 dt R A + R B V ( 0+ ) = V 3 ( 2) C1 CC t V C1 () t V CC 1 2 ( R 3 --e A + R B )C1 = ( 3) Since the duration of the timer output high state(th) is the amount of time it takes for the VC1(t) to reach 2Vcc/3, 6

13 LM555/NE555/SA555 Figure 8. Waveforms of Frequency Divider Operation 4. Pulse Width Modulation The timer output waveform may be changed by modulating the control voltage applied to the timer's pin 5 and changing the reference of the timer's internal comparators. Figure 9 illustrates the pulse width modulation circuit. When the continuous trigger pulse train is applied in the monostable mode, the timer output width is modulated according to the signal applied to the control terminal. Sine wave as well as other waveforms may be applied as a signal to the control terminal. Figure 10 shows the example of pulse width modulation waveform. +Vcc 4 8 R A Trigger 2 RESET TRIG Vcc 7 DISCH 6 Output 3 OUT GND 1 THRES Input CONT 5 C Figure 9. Circuit for Pulse Width Modulation Figure 10. Waveforms of Pulse Width Modulation 5. Pulse Position Modulation If the modulating signal is applied to the control terminal while the timer is connected for the astable operation as in Figure 11, the timer becomes a pulse position modulator. In the pulse position modulator, the reference of the timer's internal comparators is modulated which in turn modulates the timer output according to the modulation signal applied to the control terminal. Figure 12 illustrates a sine wave for modulation signal and the resulting output pulse position modulation : however, any wave shape could be used. 8

15 LM555/NE555/SA555 When the trigger starts in a timer configured as shown in Figure 13, the current flowing through capacitor C1 becomes a constant current generated by PNP transistor and resistors. Hence, the VC is a linear ramp function as shown in Figure 14. The gradient S of the linear ramp function is defined as follows: V p p S = ( 14) T Here the Vp-p is the peak-to-peak voltage. If the electric charge amount accumulated in the capacitor is divided by the capacitance, the VC comes out as follows: V=Q/C (15) The above equation divided on both sides by T gives us V --- T Q T = ( 16) C and may be simplified into the following equation. S=I/C (17) In other words, the gradient of the linear ramp function appearing across the capacitor can be obtained by using the constant current flowing through the capacitor. If the constant current flow through the capacitor is 0.215mA and the capacitance is 0.02µF, the gradient of the ramp function at both ends of the capacitor is S = 0.215m/0.022µ = 9.77V/ms. 10

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