2.
embedded ﬂash chip should occupy only a small space combined NVC as well as given target workloads.
within the disk drive. The other, more ﬂexible approach is to This paper proposes a two-level NVC management
use an SLC/MLC combined ﬂash chip, which has both SLC scheme for SLC/MLC combined ﬂash memory that ef-
blocks and MLC blocks in a single chip. By programming fectively exploits the characteristics of the heterogeneous
only the LSB of a cell in the MLC ﬂash memory, the cell can regions. The scheme utilizes the SLC region as a ﬁrst-level
be used as an SLC [5], [6]. By programming only LSBs into buffer and the MLC region as a second-level buffer. The
a particular block (i.e., SLC mode), the effective properties proposed scheme is compared with other possible alternative
of that block become similar to those of an SLC ﬂash schemes. We also provide a design technique which can
memory block. Conversely, if both the LSB and MSB are identify the optimal fraction of the SLC region within the
programmed (i.e., MLC mode), the high capacity provided NVC. The design scheme is based on the evaluation on three
by the MLC ﬂash memory is able to be utilized. Therefore, metrics, i.e., performance, lifespan and energy consumption
the SLC/MLC combined ﬂash provides dual modes, SLC of the hybrid HDD while varying the fraction of SLC region.
mode and MLC mode. The dual mode programming allows From simulation-based evaluations using various synthetic
two different types of blocks to exist simultaneously in the and real workloads, we show that performance, lifespan, and
same ﬂash chip. The MLC block using SLC mode has a energy consumption of hybrid HDD can change signiﬁcantly
shorter write latency than does the MLC block using MLC depending upon the proportion of each region.
mode. The rest of the paper is organized as follows. Section 2
For the SLC/MLC combined ﬂash memory chip, the ﬂash introduces related works and their drawbacks, and Section
memory blocks can be divided into two regions for ease 3 describes the overall storage architecture for hybrid HDD.
of management, an SLC region and an MLC region [7]. Section 4 explains the garbage collection technique for each
Depending on the size of each region, the total storage region within the NVC. Section 5 describes the design
capacity of the ﬂash memory is determined. For example, technique used to ﬁnd the optimal partition of the SLC and
if there are 1024 blocks in a ﬂash memory chip where half MLC regions. Section 6 presents the experimental results,
of the blocks use the SLC mode and the other half of the and Section 7 concludes this paper with a summary and
blocks use the MLC mode, then the total capacity is 393 description of future works.
MB (i.e., 131 MB + 262 MB) when the block sizes in SLC
II. R ELATED W ORKS
mode and MLC mode are 256 KB and 512 KB, respectively.
Therefore, as we increase the number of MLC mode blocks, A. Hybrid HDD
the total size of the NVC also increases. There are several researches on NVC management for
The proportion of the SLC region size to the MLC region hybrid HDD. Bisson et al. proposed an I/O redirection
size needs to be carefully determined since it directly affects algorithm [8], NVC ﬂushing polices [9], and disk spin-
performance, lifespan, and energy consumption of a hybrid down algorithms [10] for hybrid HDD. The SmartSaver
HDD. The performance and energy consumption of a hybrid technique [11] partitioned the NVC into a caching area,
HDD depend upon the miss rate of the NVC since the miss prefetching area, and writeback area and then proposed the
penalty (i.e., access cost of HDD) is signiﬁcantly higher than caching and prefetching techniques. The caching technique
the access cost of ﬂash memory. Generally, as the size of selects cache-critical data which can signiﬁcantly extend
the NVC becomes larger, the miss rate decreases, therefore, disk idle time if it is in the NVC. Hsieh et al. [12] proposed
a smaller number of disk drive accesses are invoked causing a hash-based lookup strategy, an LRU replacement policy,
high performance and low energy consumption. However, and an energy-efﬁcient ﬂushing strategy for NVC. If the disk
in order to implement a large capacity NVC, more blocks is spinning down, all data is kept in the cache whenever
should be used in MLC mode, which will reduce the lifespan possible. Their scheme also divides the NVC into primary
of the NVC. and overﬂow blocks in order to efﬁciently handle the ﬂash
To exploit the SLC/MLC combined ﬂash for NVC, an memory. Kim et al. [13] proposed a data pinning policy that
effective management scheme is required for the hetero- can provide fast access times for hot data, and the pinning
geneous ﬂash memory regions. The goal is to produce a technique can also be applied to reduce the system boot
longer lifespan for the SLC/MLC combined NVC compared time as well as the application launching time. The EXCES
to that of an MLC-only NVC, while providing a higher technique [14] identiﬁes the hot data to be prefetched,
performance and lower energy consumption than those of cached and buffered in order to increase disk inactivity
an SLC-only NVC. More speciﬁcally, we must determine periods. It tracks the popularity of the page accessed by
how the SLC and MLC regions are managed in order to applications and continuously adapts to workload changes.
maximize the advantage of the SLC/MLC combined NVC However, the technique does not address the management
and to minimize hard disk accesses. We must also determine scheme for ﬂash memory, such as garbage collection.
the optimal proportion of the SLC region size to the MLC While these previous works consider only single-type
region size for the total number of blocks of SLC/MLC ﬂash memory, the paper by Kgil et al. [15] focuses on
22

3.
hybrid HDD using SLC/MLC combined ﬂash memory. They the combined ﬂash memory used for NVC embedded within
proposed a density control technique which dynamically a hybrid HDD, while considering the affects on hard disk
switches every page from MLC to SLC. When the working behavior.
set size is small, MLC pages are changed into SLC pages in
III. OVERALL A RCHITECTURE
order to improve the latency of ﬂash storage, assuming that
the increased miss rate due to a reduction in density is small. Fig. 1 shows the proposed overall storage architecture.
However, if the SLC block is reconﬁgured into an MLC The ﬂash chip, targeting to hybrid HDD rather than an on-
block, it is difﬁcult to estimate the remaining P/E cycles board NVC, is located between the internal DRAM buffer
of the block, which is required for wear-leveling. The ﬂash and the hard disk. The ﬂash chip is divided into an SLC
memory chip venders do not provide detailed test results for region and an MLC region. If the combined ﬂash memory
block reconﬁguration because it is impossible to test all of is used for on-board NVC, it should be located below the
the potential reconﬁgurations. The venders provide only the buffer cache of the host system in the storage hierarchy.
available P/E cycles of the SLC and MLC blocks, assuming
no reconﬁguration. Therefore, this technique is impractical. DRAM
Moreover, depending upon the HDD access cost relative c Flash Chip
to that of ﬂash memory, a small amount of change in the d f
miss rate of NVC may invoke a large difference in the overall
SLC Flash e MLC Flash
performance, as we will demonstrate in the experiments.
One proposed effective strategy is to split the NVC into b
read and write regions, since only the write region generates a g
invalid pages, the garbage collection will require only a write to SLC
small overhead. write to MLC
In comparison to the technique proposed in [15], we Disk write to disk
assume a static partition between the SLC region and the
MLC region. We focus on how to determine the proportions Figure 1. Overall architecture of the proposed hybrid HDD.
of the two regions to optimize performance, lifespan, and
energy consumption at design time. For read requests from the host, the system searches the
requested data in the DRAM buffer, ﬂash memory (NVC),
B. SLC/MLC Combined Flash Memory and hard disk in the order of hierarchy. If the data is found in
Several studies have been performed on SLC/MLC com- the ﬂash memory or hard disk, it is copied into the DRAM
bined ﬂash memory. Park et al. [16] proposed a Flash buffer in order to provide shorter latency for the following
Translation Layer (FTL) called MixedFTL for an SLC/MLC read requests. When the data is found in the MLC region or
combined ﬂash chip. The MixedFTL sends all write requests the hard disk, it is also copied into the SLC region (i.e., the
to the SLC region and then moves the cold data into the arrows marked by a and b).
MLC region if there are no updates over a long time period. For write requests from the host, all data is ﬁrst written
Since it allocates an SLC mode block for each logical block to the DRAM buffer and is sent to the SLC region by
(i.e., block-level mapping), the SLC mode blocks have low a replacement policy of the DRAM buffer (c). The data
utilizations and thus invoke frequent garbage collection. evicted from the DRAM buffer may be written directly to the
Lee et al. [17] proposed a ﬁle system called FlexFS for hard disk if the disk status is spin-up, as proposed in [11].
SLC/MLC combined ﬂash memory, which determines the However, we only consider the case in which all the write
target region for a ﬁle depending on the storage sizes of the requests are sent to the NVC, while the disk status-aware
SLC and the MLC regions, rather than the hotness of the redirection algorithm can be applied to our scheme.
ﬁle. That is, if there are many free spaces, it sends most The update requests for the data in the NVC will generate
of the ﬁle write requests to the SLC region even though several invalid pages since the ﬂash memory does not
the ﬁle will not be frequently updated. FlexFS exploits the support the update operation. If the SLC region needs more
hotness/coldness of the ﬁle only to determine whether or not free space, the garbage collection (GC) for the SLC region
to move it into the MLC region. Similar to the technique in is invoked in order to reclaim the invalid pages. The GC
[15], MixedFTL and FlexFS are unrealistic solutions since ﬁrst ﬁnds the victim block and then moves valid pages of
they assume that the block mode can be reconﬁgured at run the block into another space. The block can be reused for
time. future write requests by erasing the victim block after valid
Our previous work [18] proposed a management tech- page migrations. The GC moves the valid data into other
nique for SLC/MLC combined ﬂash memory. However, it blocks in the SLC region (d) or the MLC region (e). The
focused on the management of SLC/MLC combined ﬂash MLC region GC moves the valid data within the MLC region
memory as an independent storage device. This paper targets (f) or into the hard disk (g).
23

4.
TS
invalid page
GS logical page
on
0 1 number 1 3
i
2
eg
3 0
B0
co
B9
tr
35 B9 B0 4 35
ho
ld
4
HS
34
3
0
reg
B1
33
B8 GS
33
1
B8 HS B1
43 44 22 23 3 2
io n
4 3 44 22 23 3 2
4 8
hot region
SLC SLC
B2 GC
B2
9 3 11 1
B7 circular B7 circular
buffer buffer
12
27
27
TS
2 1
CS B6 B3
13
26
B6 B3
26
3
13
4
13
4
11 11
12
12 B5 B4 B5 B4 12
9 22
12 9
2 3 30 2 7 8
22
io n
eg
23 30 2 7 8
r
o ld
valid page CS
c
Figure 2. Migration within the SLC region.
Consequently, the SLC region and the MLC region con- TS
invalid page
tain hot data and cold data, respectively. Therefore, we can GS
logical page
consider the SLC region and the MLC region as a ﬁrst-level 0 1 number
2
3
NVC and a second-level NVC, respectively. This scheme B9 B0
co
4
35
ld
34
can exploit the higher performance and endurance of the
0
re g
33
1
SLC region. B8 HS B1
4 3 44 22 23 3 2
4 8
ion
hot region
SLC MLC
circular
9 3 11 1
IV. G ARBAGE C OLLECTION B7 circular B2
buffer buffer
The SLC and MLC regions are maintained as circular
27
2 1
B6 B3 CS
26
buffers, which are useful in handling ﬂash memory pages
3
13
9
as the circular buffers simplify the garbage collection. Each
10
B5 12
12
43B4
circular buffer has four pointers: a tail pointer (TS or TM ),
22
23 30 5 4 1 4 2
valid page
a head pointer (HS or HM ), a cold pointer (CS or CM ),
and a GC pointer (GS or GM ). Figures 2 and 3 show
Figure 3. Migration to the MLC region.
the garbage collection on an SLC region with 10 blocks
(B0 ∼ B9 ), each of which has four pages. The tail pointer
of the circular buffer points to the oldest page, while the head
pointer points to the youngest page. For a write request, the The size of the cold region within the MLC region is
data is appended to the page pointed to by the head pointer. larger than that of the SLC region since the MLC region
If the write request updates the data which is already written GC can invoke write requests on the hard disk. It is probable
at the NVC, its old version becomes invalidated. that the hard disk is in the spin-down state due to the NVC
The GC pointer for each region is located prior to the tail when the GC sends write requests to the hard disk. Then,
pointer in the circular buffer structure in such a way that the there is an additional overhead for spinning-up the hard disk.
number of free pages between the GC pointer and the tail Therefore, once the GC is invoked within the MLC region,
pointer is 10% of the total pages within the region. This is to it is better to move as many pages as possible to the hard
reserve free space that garbage collector uses to move valid disk so as to amortize the overhead.
pages. When the head pointer becomes the same as the GC The cold region in the circular buffer may have many
pointer, the GC is then invoked. In order to reclaim invalid invalid pages. The valid pages in the cold region can be
pages, the GC erases all the blocks in the cold region which regarded as cold data since they are not updated until the
is located between the tail pointer (TS ) and the cold pointer corresponding ﬂash blocks are inserted into the cold region.
(CS ). The cold pointer is located after the tail pointer in the If there are only a small number of valid pages within the
SLC region in such a way that the number of pages between cold region, the valid pages are then moved into other blocks
TS and CS is 30% of the number of pages between TS and within the SLC region, as shown in Fig. 2, in which pages
GS . In the MLC region, the size of the cold region is 40% 0, 1 and 3 are moved into bock B9 . This provides the
of the number of pages between TM and GM . cold pages with more of a chance to be in the SLC region
24

5.
if sufﬁcient free space can be obtained through garbage V. NVC R EGION PARTITIONING
collection. However, if there are too many valid pages within In order to use SLC/MLC ﬂash memory for the NVC of
the cold region, they migrate to the MLC region, as shown a hybrid HDD, the optimal proportions of the SLC region
in Fig. 3. In order to increase the read hit ratio of the SLC and the MLC region must be determined. For given ﬂash
region, a cold page migrates within the SLC region if it is memory parameters (P ES , P EM , P and B) and the input
marked with read hit (the pages 0 and 1) even when the workload WH , the optimal value for region ratio r which
number of valid pages is large. minimizes access latency and energy consumption while
Fig. 4 shows the detailed GC algorithms. If the number guaranteeing the lifespan constraint Lc should be calculated.
of invalid pages in the cold region is larger than 70% of the P ES and P EM are the available P/E cycles of the SLC
total number of pages, then the valid pages migrate within ﬂash block and the MLC ﬂash block, respectively. The
the SLC region at the threshold ratio of 0.7. If a valid page values of P ES and P EM of the current products are 50
is marked with read hit and the portion of invalid pages is K and 10 K, respectively. P is the size of one block when it
larger than 0.4, the page is moved within the SLC region, is conﬁgured as an SLC block, B is the total number of ﬂash
otherwise, it migrates to the MLC region. The read hit mark blocks in an SLC/MLC combined ﬂash memory chip, and
is set when a page is read, and reset again when it is moved r is the region ratio, which is the ratio between the number
by GC. After garbage collection, the tail pointer and the of SLC blocks and the number of MLC blocks. There are
GC pointer are updated. The cold pointer is also updated to a ﬁnite number of candidate values for r. If r is 0, then
maintain its position relative to the tail and GC pointers. the SLC/MLC combined ﬂash chip functions as an MLC
chip. Therefore, when we assume that the MLC mode cell
GC algorithm for SLC region can contain two bits and the region ratio is r, P · B · r
1: if (0.7 < portion of invalid pages in cold region ) then and 2P · B · (1 − r) are the storage capacities of the SLC
2: all valid pages migrate within SLC region; region and the MLC region, respectively. By multiplying
3: else if (0.4 < portion of invalid pages in cold region < 0.7 ) the available P/E cycle by the capacity of each region, we
4: only read-hit valid pages migrate within SLC region determine the total data size writable to the region before
and other valid pages migrate to MLC region;
its lifespan is expired as follows:
5: else /* portion of invalid pages in cold region < 0.4 */ DS = P ES · P · B · r (1)
6: all valid pages migrate to MLC region;
DM = P EM · 2P · B · (1 − r) (2)
GC algorithm for MLC region We are to represent the lifespan of ﬂash memory with the
1: if (HDD is spin-up) then maximum write amount for the repetitive input workload.
2: if (0.6 < portion of invalid pages in cold region ) then When the input workload writes WH amount of data at
3: all valid pages migrate within MLC region; SLC/MLC combined ﬂash memory, WS and WM amounts
4: else of data will be written to the SLC and MLC regions,
respectively, as follows:
5: all valid pages are flushed into HDD;
6: else /* HDD is spin-down */ WS = WH + WS→S + WM→S + WD→S (3)
7: if (0.4 < portion of invalid pages in cold region )
WM = WS→M + WM→M (4)
8: all valid pages migrate within MLC region;
9: else where WS→S , WM→S , and WD→S are the data amounts
10: all valid pages are flushed into HDD; written by the page migrations within the SLC region, the
page migrations from the MLC region to the SLC region (via
Figure 4. Garbage collection algorithms. the read hit at the MLC region), and the page migrations
from the disk to the SLC region (via the read hit at the
The threshold ratio that determines migration within the hard disk), respectively. WS→M and WM→M are the data
MLC region or migration to the hard disk depends upon the amounts written by the page migrations from the SLC region
HDD power state. If HDD is in a spin-down status, we use to the MLC region and the page migrations within the MLC
0.4 for the threshold value, and if it is in a spin-up status, a region, respectively. The values of WS and WM depend on
higher value is used for the threshold ratio in order to send the region ratio since the data migrations from the garbage
more cold pages to the hard disk. The MLC region uses collection are affected by each region’s size.
tighter threshold values than does the SLC region in order Since the proposed scheme manages the SLC region and
to reduce the write requests on the hard disk since the write the MLC region as circular buffers, it can be regarded to use
cost of the hard disk is signiﬁcantly larger than that of the a perfect wear-leveling technique. Using WS and WM , the
MLC region. lifespans of both the SLC region and the MLC region, LS
25

6.
and LM , can be represented under perfect wear-leveling as capacity capacity
follows: WS WM
DS DM
WS_only WM_only
LS = WH · NS (where NS = DS /WS ) (5)
LM = WH · NM (where NM = DM /WM ) (6) WS
NM WS DS
Depending on the region size and the workload behavior, DM WM NSWM
one of the two regions will exhaust all of its P/E cycles
before the other, i.e., NS = NM . Then, the remaining region NM NNVC NS lifespan NS NNVC NM lifespan
alone will serve host requests. From Equations (1), (2), (5) (a) NS > NM (b) NS < NM
and (6), we can derive that NS ≥ NM if r ≥ 2WS /(5WM +
2WS ) as follows. Figure 5. The lifespans of the SLC and MLC regions.
NS ≥ NM
P ES · P · B · r P EM · 2P · B · (1 − r) change in lifespan is nearly monotonic for the region ratio,
⇔ ≥
WS WM as the experiments show, we can ﬁnd the optimal value with
5r 2 − 2r a few number of simulations.
⇔ ≥ (∵ P ES = 5 · P EM )
WS WM
VI. E XPERIMENTS
2WS
⇔ r≥ In order to evaluate the efﬁciencies of the proposed
5WM + 2WS
techniques, we implemented a hybrid HDD simulator which
If NS > NM , the MLC region expires before the SLC uses SLC/MLC combined ﬂash memory as an NVC. We
region. The amount of data that is written to the SLC-only used four workloads as simulator inputs, bonnie++, desk-
chip or to the MLC-only chip, WS only or WM only , can be top, ﬁnancil1 and ﬁnacial2. bonnie++ is a popular storage
represented as follows: benchmark program. Since it is generally used to evaluate
the performances of storage systems, the inter-arrival times
WS only = WH + WS→S + WD→S (7) between requests are too short and, thus, it is not suitable
WM = WH + WM→M + WD→M (8) for examining hybrid HDDs that exploit idle intervals. We
only
therefore modiﬁed the timing values of the I/O requests so
As shown in Fig. 5, if NS > NM , the SLC region that there would be sufﬁcient idle times between requests.
consumes NM ·WS of capacity among DS when the lifespan Desktop is a real I/O trace collected executing desktop
of the MLC region expires. Therefore, the remaining storage applications. Financial1 and ﬁnancial2 are OLTP application
capacity is DS − NM · WS , which will be consumed at a traces used in [15].
rate of WS only . For the case of NS < NM , the lifespan of We use the power state transition model shown in Fig. 6.
the NVC can be estimated using a similar model. Then, the The hard disk is modeled based on Samsung’s HM080H1
lifespan of the overall NVC, LN V C , can be represented as product and has three power states, active, idle and standby.
follows: The threshold-based power management (TPM) technique
is used to spin-down the hard disk if there are no requests
during a predeﬁned idle time. Then, the hard disk is changed
LN V C = WH · NN V C (9)
into the stand-by state, which consumes less energy.
2WS
if (r ≥ ) // NS ≥ NM When the hard disk is servicing read/write requests, its
5WM + 2WS state is active, which requires 2.55 W of power consumption.
DS − NM · WS
NN V C = + NM (10) If there are no more requests from the host after one second,
WS only the state of HDD changes to idle, which consumes 0.8 W.
2WS Switching between the active state and the idle state takes
if (r < ) // NS < NM
5WM + 2WS 0.5 seconds and consumes 1.15 J of energy. Additionally,
DM − NS · WM if there are no requests for 3.38 seconds, then the HDD
NN V C = + NS (11)
WM only stops spinning, and the HDD state changes to standby, which
consumes only 0.25 W. The change into standby state takes
Therefore, for the given workload WH and the region r, 2.3 seconds and consumes 2.94 J of energy. When a request
the lifespan of the NVC can be calculated by measuring comes from the host, the standby state is changed into the
the values of WS , WM , WS only and WM only . Then, we active state to service the request, which invokes time and
can search the minimum value rmin which satisﬁes the energy overheads of 1.6 seconds and 5.0 J.
constraint LN V C ≥ LC by simulating several candidate We used the timing and endurance parameters of NAND
values. Since we have ﬁnite number of candidates and the ﬂash memory as shown in Table I. The SLC and MLC
26

7.
The differences between the maximum and minimum
active
(2.55W) value of the miss rate are 27%, 21%, 19%, and 7% for
5J s
.1 : 1
bonnie++, desktop, ﬁnancial1 and ﬁnancial2, respectively.
s/1 old
0 .5 esh
1.
The GC overheads show little difference depending on the
6s
J
r
/5
.15
th
.0J
SLC region size. The overheads for all of the workloads
/1
5s
0. threshold: 3.38s
except ﬁnancial1, which is write-intensive, are smaller than
idle standby
(0.8W) (0.25W) 15% of the total I/O cost. For the ﬁnancial1 workload, when
2.3s/2.94J
the total size of the NVC is small due to the allocation
of many blocks to the SLC region, the number of HDD
Figure 6. The power state transition diagram of an HDD. accesses increases and, thus, the GC overhead increases. The
GC overheads of SLC-only chips and MLC-only chips are
Table I
NAND FLASH PARAMETERS .
small in comparison to those of mixed conﬁgurations since
they do not invoke page migrations between the two regions.
Block type read write erase P/E cycles Fig. 8 shows the normalized average read latency, lifespan
SLC mode 409 431 872 50K of NVC, and energy consumption when varying the size of
MLC mode 403 994 872 10K the SLC region. As the size of the SLC region increases, the
total size of the NVC decreases. Therefore, the read latency
and energy consumption increase due to higher NVC miss
mode blocks have similar read performances but their write rates. However, the lifespan of the NVC increases since the
performances are quite different. number of P/E cycles of an SLC block is ﬁve times that of an
MLC block. The energy consumptions of most workloads,
except bonnie++, show very small differences depending on
A. Performance of the Hybrid HDD
the SLC region size. This is because the changes in miss
In order to show the effectiveness of NVC, we ﬁrst rate cause no signiﬁcant change in the idle intervals that are
compared the hybrid HDD with a normal hard disk without above the TPM threshold value.
NVC. The NVC is composed of 2048 ﬂash blocks, each of As we assumed at Section V, these results for the three
which is 256 KB in SLC mode and 512 KB in MLC mode. metrics increase monotonically as the proportion of the SLC
Therefore, the size of NVC is 512 MB when all the blocks region increases. Using Fig. 8, we can explain why the
are SLC mode while the size is 1 GB when all the blocks SLC/MLC combined ﬂash memory is useful for NVC. For
are MLC mode. We measured three metrics of the hybrid example, if we have the constraint that the lifespan of NVC
HDD while varying the size of the SLC region in the NVC: should be more than twice the lifespan of MLC-only NVC,
the read latency, the lifespan of the NVC, and the energy the minimum SLC region size for the ﬁnancial1 workload
consumption of the hard disk. We focused only on the read is identiﬁed as 336 MB from the result in Fig. 8(b). By
performance since all the write requests are ﬁrst sent to the selecting the SLC region size, the read latency is reduced
DRAM buffer and, thus, the write latencies are the same. by 67% in comparison to the SLC-only NVC. Consequently,
However, the read latency depends on the location of the we can implement an SLC/MLC combined NVC which
requested data. The lower the read-miss rate of NVC is, the provides better performance than an SLC-only NVC and
better read performance the hybrid HDD provides. a longer lifespan than an MLC-only NVC.
Fig. 7 (a) shows the average read latency and energy In order to determine the minimum size of the SLC region
consumption of a hybrid HDD with NVC, normalized by satisfying the lifespan constraint, we should measure the
those values of the normal HDD. Figures 7 (b) and (c) values of WS , WM , WS only , and WM only and estimate
show how the read-miss rate and the GC overhead of the the NVC lifespan for each conﬁguration. Fig. 9 shows these
NVC change when the number of SLC mode blocks varies. values for each SLC region size. As the SLC region size
The GC overhead means the page migration cost by GC. increases, WS→S increases since the GC victim block has
The read latencies are reduced by 52∼97%, and the energy many invalid pages. WM→S decreases as the size of MLC
consumptions are reduced by 4∼71%. The reduction in region decreases, and WD→S increases since a signiﬁcant
read latency depends on the read-miss rates. Depending amount of data is evicted to HDD when the size of the SLC
on the localities of the workloads, the read-miss rates are region is large. WM→M and WS→M decrease as the MLC
signiﬁcantly different. Since ﬁnancila1 and ﬁnancial2 have region decreases.
low read-miss rates in the NVC, their read latencies are
signiﬁcantly reduced. However, their energy reductions are B. Comparison with alternative policies
small since the reduced miss rates do not increase the To ensure that the proposed NVC management policy
hard disk idle times above the threshold time for power (Policy 0) is better than other alternative policies, we com-
management. pared it with the following three alternative policies:
27