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When you're dealing with Richard Tobias, life is no joking matter. He's serious, intelligent, and focused - which is probably as it should be for the Vice President of the ASIC & Foundry Business Unit at Toshiba America Electronic Components, Inc. (TAEC). Tobias is also a walking encyclopedia of the technology and nuances around designing electronic devices and the CAD tools used to facilitate that process. And, he's a man with a mission - he's hoping to promote additional sophistication in the IP market and to persuade the EDA vendors, through whatever means necessary, to clean up their act and get their business models aligned at long last with their customers' business models. His

message is a serious one, well worth heeding.

Tobias' own career was launched amidst CAD tools. He started at Honeywell followed by Medtronic, both in Minneapolis, MN, then moved to California to work with AMD, and then Data General. With each of these stints, he was involved in the development of CAD tools. Yet over time, Tobias found himself evolving more and more into the design side of things, with particular emphasis on DSPs. That led him to the founding of WhiteEagle Systems Technology and a vigorous stretch of years heading up a team that successfully developed “lots” of SoC designs.

The WhiteEagle guys were obviously master craftsmen. They did both software and IC design, as well as board development for their product line. Everything that was easy or hard about a project, including the math algorithms for real-time computing, the WhiteEagle guys prevailed upon. Tobias says, “We didn't worry at WhiteEagle about how to implement a project - whether to implement in silicon or in software - we would just choose the best way to do it. We had a very versatile team and that was the reality for us.”

Eventually Tobias and his fellow WhiteEagle founders sold the company to QuickSilver Technology. Tobias was with WhiteEagle from 1992 to 2000, but after the sale to QuickSilver, lost interest in the effort and found greener pastures wherein to practice his craft and highly developed management skills.

He's now sitting in a VP's chair at TAEC, facing a tough economy, a stiff field of competitors and, by his own description, a less-than-satisfying set of CAD tool offerings from his friends in the EDA industry. He says, “It's not surprising that I know a lot about the CAD industry - I've designed tools and I've designed chips. More importantly, at WhiteEagle, we had a huge number of successful SoCs under our belts, some of the very first in the ASIC world. I really know this industry.”

Tobias on IP

Tobias says that companies like ARM, with their processor cores, were just starting to emerge as players in his early years with WhiteEagle: “At that time, a lot of processors were built as small pieces of silicon. That always presented quite an interesting challenge trying to incorporate them into a design. I was really happy when ARM came along. They helped us with our microcontrollers and [began to prove their worth as an IP provider].”

He adds, “Designing complex chips was an interesting challenge back then. It wasn't exactly obvious how to go about getting these things done - we were dealing with 10,000 to 100,000 gates on an SoC in the early 1990's (the equivalent of 1 million to 10 million gate designs today) - or how to get the tools to do the job. Developing the necessary tools could take over a year, which is why the attitudes towards [commercially available] CAD tools changed and the concept of IP began to change significantly, as well.”

Tobias is quick to point out that although things were challenging in the 'before time,' things aren't much better today: “I would say that the IP industry is still in its infancy. You still get commercial IP that doesn't work and until folks come up with a way to buy IP that's as robust a process as buying a chip and building a board - until folks get more assurance from the IP vendors that this stuff will work - it will never be a mature industry. It's never surprising that a piece of IP will work in the vendor's tests; however it's never obvious how it should work in my system, the customer's system.”

“Clearly today, we need standards. VSIA is trying, but it's such a hodge-podge, 'Do whatever you want.' There are de facto standards like AMBA, and smaller ones from IBM. Of course, Toshiba has its own internal standards that we're moving to make into external standards. Without standards, you simply can't connect all of this IP together.”

Referring to the history of PCB design, Tobias says, “If you look at a board and look at how the industry builds good boards, it wasn't so long ago that you had TTL parts and other NAND/NOR gates that you could buy, and there was a standard in voltage levels and how signals were handled [that helped put it all together on the board]. Basically, there were two kinds of bus structures - one defined by Intel and one by Motorola, to put it in simple terms. Then we had Multibus, VME and PCI, and all of these other kinds of protocols to connect boards together, or component sub-systems. The only way the board industry made all of this happen was to have standards. Twenty years

ago,

it was harder to build a board, but today with standards on power and behavior, it's possible to [design more successfully].”

“It's the same situation on a chip - without standards you can't connect the IP together. In a sense, using IP in a chip today is like the early stages [in board design]. Most IP today doesn't even consider if there's other IP on the bus and certainly I wouldn't say that ARM has been granted the de facto standard for the industry. Here at Toshiba, we've found a lot of deficiencies in the ARM standard. It's not the worst thing in the world, but there's still a lot to be improved upon.”

“In doing verification, the main flaw with every bus technology is that it doesn't consider how you can hook up 100 or 200 pieces of IP on the same bus. When you use any of the bus standards available today, you've got a mass of nets on top of a chip, which forces you to deal with the timing. I actually see this as a problem with every bus standard out there. Most busses can only hook up 10 pieces of IP, or less, before they start breaking.”

Tobias says that wiring ends up being a huge issue: “Basically, we keep saying that we have Moore's law, with our transistors getting smaller and smaller, but there's no Moore's law for capacitance on a wire. As we make our devices smaller, we don't have a corresponding Moore's law for wiring on a chip - the capacitance of the wire on the chip hasn't changed. It's true we are beginning to have different materials that can help, but we're still a long way from solving the problem.”

As a result of his obvious frustration with the current state of affairs in the IP industry, Tobias is pleased that TAEC is spending a lot of time working on the OCP-IP (Open Core Protocol International Partnership) standards project. He says, “One of the things we're doing here at TAEC is to put together a standard for the way IP should look when you purchase it - what kind of documentation, what kind of coding style, what kind of specifications need to be provided to the customer. Sonics put OCP-IP together, but we've always believed strongly in these types of interfaces. The issues around IP are not just about having a standard bus. A standard does allow you to test

pieces of IP

in a system in an orthogonal way, but the critical aspect of designing and verifying a system quickly is that you want to determine in advance of tape-out if the IP is going to work on that bus. The nice thing about the OCP-IP standards and the Sonics tools is that they create that kind of orthogonal testing environment.”

“One of the big issues with bus standards is that you have to spend a lot of time testing the arbiter. With an AMBA standard, for instance, you have to read/write to every register and be sure that it doesn't make a mistake. You have to design your device selector so that you don't write to two places at the same time. The other important thing about a bus is that you should be able to lay it out. We're getting to the point today where you've got anywhere from 5 to 100 pieces of IP on the bus. You don't want to have a big MUX on the bus that will make it difficult to lay out, as in the

AMBA bus. These are some of the factors that are going into the OCP-IP standard - doing the layout quickly,