Problem with JTAG_SIM_VIRTEX4

i have a problem using the JTAG_SIM_VIRTEX4 block from Xilinx. I am
able to send data to the BSCAN block in the design but cannot readout
data from the BSCAN block. I discoverd that the jtag_instruction_name
is set to IDCODE in the beginning, after shifting some bits into the
register always switches to UNKNOWN.
Did anyone use this function successfully?

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