Thank you for respond but either I m don't understand basic things or I m missing something. Can tg68 core work as standalone version of core with provided clock. There should be some movements by the signals and there is nothing there. Signaltap just can't detect anything even when I use basic version of TG68 core. There is nothing. For the start I just want to get TG68 core running. If its so complex what is the point of usage? Only for those who created core. There is nothing to compare, no info no tutorials, manuals anything, and yet generated signals are so simple to implement to something. So anyone how did you started damn thing.Where I m going wrong please check that top level design file I provided in previous pages.

If its so complex what is the point of usage? Only for those who created core. There is nothing to compare, no info no tutorials, manuals anything,

Remember that TG68 is a spare-time project for someone who was generous enough to share his work, in the hope that others would find it useful. It's not a "supported" product - those generally cost money!

I'm only just starting out in FPGA programming myself, so I can't be a lot of help - but if I were getting absolutely no response from the core, I'd be looking at the reset signal and the clock signal.

At least person other than Tobiflex has successfully used the TG68 in a project, though - http://code.google.com/p/fpgagen/ - maybe reading the source of that project will help you?

I know about that project and have information that 3 people integrated TG68 into something. I know that this is spare-time project but code without any explanations or anything again I said what's the point. It is easier for me to start my own project of emulated MC68K and finish it in 3 years than to understand everything in TG68 core. I just don't understand why everyone hides information's regarding anything related to Amiga just like they think that days will come and then they will be prepared to earn lot of money and no one will ever know what they know right now. Complete story regarding to this is stupid, regardless my ignorance related to this topics, but looking at this like person who spend past 20 years or so in the PC world where you can find anything, anytime, and in every second more than 100 of people who wants to help you no matter what. Again back to reading and need to prepare myself for next 2 years of going nowhere, and then when I found out solutions should I do the same and not share my work to everyone. Hm don't think so... I ll post everything online with tutorials so that someone like me don't spend 2 years on nothing, just because someone who knows didn't told me read that, and that go to that address. I just cant beleve that only code on the all internet regarding TG68 and tristate bus is mine and noone wanted to post that to save me time, and I posted for someone to use it. Stupid thing that I didn't understand for 4 month, yes because I m stupid but found solution and posted complete code, and now see that number of sites copied that code for someone to use it. So in this case I was the first idiot who shared 4 months on his work to everyone. But someone could create that for 5 minutes to save me that 4 month of work so I can focus on something else to finish my projects.

Every other information's I got is nothing for me because I don't understand single thing you are talking. I need examples to learn from it I m not an engineer and never will be. But want to provide people like me examples so they can continue my work. So unless someone contact me and give me step bu step information's or examples there is no point of talking. Understand that I m stupid and that I ll never get any smarter and help me if you want.

It is easier for me to start my own project of emulated MC68K and finish it in 3 years than to understand everything in TG68 core. I just don't understand why everyone hides information's regarding anything related to Amiga just like they think that days will come and then they will be prepared to earn lot of money and no one will ever know what they know right now.

I can certainly understand your frustration - and I've found the same thing myself when trying to figure out Amiga-related problems. But I don't think it's a deliberate hiding - just a symptom of it being what is now a vanishingly small market, and one that had its heyday before Google existed!. For instance, the number of people worldwide who are (a) fluent enough in both VHDL and Verilog to comprehend and work on the DE1 Minimig port and (b) are remotely interested in the Minimig can probably be counted on the fingers of two hands, if not one!

the TG68 core is certainly lost executing some invalid instructions.That's why you see nothing.To see what's going on, you need to setup a trigger with signaltap on the reset line so you can capture what's happening just after reset. You should see the 4 16-bit word fetches at addresses 0x000000 - 0x000006 and the execution of the first instruction (which is certainly invalid since there is no working bridge between the TG68 and the A600).The TG68 does not fully implement the 68k exceptions, illegal instructions have undefined effects.You must execute some test code from an internal ROM inside the FPGA first.

There is also another hypothesis about why you see nothing : it is possible that Quartus II had simplified the design since the TG68 is not connected to anything externally.What is the number of LEs for the TG68 ? it should be ~3500. If it is less than that, it got simplified by the tool.IIRC, non existing signals appear in red under SignalTap and you should have some warnings during compilation.

...Oh wait You have used TG68 for your weak Minimig core and closed the sources Way to go!

If you were as good as with verilog than you are with sarcasms, Minimig source would make a lot of progress...

@majsta:if you can send me the qpf file, I can send to you a test design in verilog code that uses the J68 core.Ideally, it would be good if you have some spare pins connected to a header on the PCB.I just need 2 pins to connect Rx and Tx from the UART.

The source code is not ready, what's the point in publishing WIP ?The 68k is done (somebody on this forum already has it), Agnus is almost done.Then, I have to change Gary and maybe add a cache to the 68k.Things take time, especially when you want to simulate the whole system.

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