Designers work at the “interface” and not “signal” level of abstraction when making connections between IP, greatly increasing productivity. Often times this is using industry standard AXI4 interfaces, but dozens of other interfaces are also supported by IP integrator.

Working at the interface level, design teams can rapidly assemble complex systems that leverages IP created with Vivado HLS, System Generator, Xilinx SmartCore™ and LogiCORE™ IP, Alliance Member IP as well as your own IP. By leveraging the combination of Vivado IPI and HLS customers are saving up to 15X in development costs versus an RTL approach.

Vivado IP Integrator benefits include:

Tight integration within the Vivado Integrated Design Environment

Seamless inclusion of IPI hierarchical subsystems into the overall design

Rapid capture and packaging of IPI designs for reuse

Support for both graphical and Tcl-based design flows design

Rapid simulation and cross-probing between multiple design views

Support for all design domains

Support for processor or processor-less designs

Integration of algorithmic (Vivado HLS and System Generator) and RTL-level IP

As the leading provider of Electronic System Level Design tools for All Programmable solutions, Vivado Design Suite System Edition provides Vivado High-Level Synthesis for C, C++ and SystemC, and MATLAB™/Simulink™ based System Generator for DSP. These solutions enable high-level IP specifications to be directly synthesized into VHDL and Verilog accelerating IP verification over 100X and RTL creation by up to 4X. The highly integrated tools can be used individually or in combination with the result being reusable IP for use in the Vivado Design Suite.