CEA-Leti and Docea Power to Combine Expertise in 3D Silicon Integration and Thermal and Low-Power Design

Published on June 14, 2010 at 7:43 AM

CEA-Leti and Docea Power announced today
that they will combine their expertise in 3D silicon integration and thermal
and low-power design. Under the terms of the common laboratory agreement, CEA-Leti
will use EDA tools provided by Docea Power to build 3D-IC designs and methodologies
for developing advanced applications consumer and wireless. CEA-Leti is the
leading global research center committed to creating innovation in micro- and
nanotechnologies. Docea Power, the design-for-low-power company, delivers software
for power and thermal analysis at the architectural level.

The collaboration aims at improving design quality and validating a new generation
of high-level design tools, like Docea’s Aceplorer, for 3D-IC wireless
and consumer applications.

“Thermal management and power-efficiency are key factors for success
in nowadays designs. Through our cooperation, the thermal and low-power design
Aceplorer platform from Docea Power will help to improve the overall design
flow, reduce costs and improve the quality of our 3D-IC design,” said
Laurent Malier CEO of CEA-Leti. “This collaboration with Docea Power will
also help us build a new generation of 3D-IC for Leti and our industrial partners.”

“With its specific dynamic compact thermal models for 3D packaging and
dies, our Aceplorer platform will enable power and thermal modeling of stacked
dies, including the 3D interconnect using through-silicon vias (TSVs) and re-distribution
layers (RDLs) and the power distribution across multiple layers,” said
Ghislain Kaiser, CEO of Docea Power. “Collaborating in a common lab with
Leti, and benefitting from its broad and deep expertise in 3D-IC technology,
gives us the opportunity to validate and improve our platform for addressing
the fast-growing 3D stacked-IC market.”

The More than Moore roadmap offers tremendous opportunities but also challenges
for both optimizing the power consumption of new systems and securing their
thermal behavior. In order to seize these opportunities and tackle the challenges
of stacking ICs, an efficient architectural modeling solution is needed that
takes into account the physical effects of heterogeneous integration, while
allowing fast exploration of the design space. Docea’s Aceplorer is an
architectural-level platform for exploring power and thermal behavior of electronic
systems that takes into account the power–temperature coupling effect
at the earliest stage of a design.

About CEA-Leti

CEA is a French research and technology public organization, with activities
in four main areas: energy, information technologies, healthcare technologies
and defense and security. Within CEA, the Laboratory for Electronics & Information
Technology (CEA-Leti) works with companies in order to increase their competitiveness
through technological innovation and transfers. CEA-Leti is focused on micro
and nanotechnologies and their applications, from wireless devices and systems,
to biology and healthcare or photonics. Nanoelectronics and microsystems (MEMS)
are at the core of its activities. As a major player in MINATEC Campus, CEA-Leti
operates 8,000-m² state-of-the-art clean rooms, on 24/7 mode, on 200mm
and 300mm wafer standards. With 1,200 employees, CEA-Leti trains more than 150
Ph.D. students and hosts 200 assignees from partner companies. Strongly committed
to the creation of value for the industry, CEA-Leti puts a strong emphasis on
intellectual property and owns more than 1,500 patent families.

About Docea Power

Docea Power develops and commercializes a new generation of methodologies and
solutions for enabling faster and more reliable power and thermal modeling at
system level. Docea Power’s Aceplorer platform offers a consistent approach
for executing architecture exploration and optimizing power and thermal behaviour
of electronic systems at an early stage of the project.