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AR# 34149: LogiCORE FIR Compiler - When I build a reloadable Transpose FIR structure, why do I see a difference between my behavioural and post-par simulation results when targeting a Spartan-3A DSP device?

AR# 34149

LogiCORE FIR Compiler - When I build a reloadable Transpose FIR structure, why do I see a difference between my behavioural and post-par simulation results when targeting a Spartan-3A DSP device?