FLASH Reprogramming on S12X

Are there any plans for a FLASH programming utility app note (much like AN2720) to be created and released specific to the S12X. I am working with a MC9S12XDP512 and would like to have the capability of reprogramming a few pages of FLASH that contain data tables.

I think I understand the basic setup of the FLASH registers along with address and data lines but don't fully understand the assembly code in AN2720. Is the stack being used to basically check the CBEIF for the flash complete signal because the FLASH cannot be read from at this time meaning RAM has to be used. Can this assembly code be used as is on an S12X core?

Also, if the XGATE is configured to run out of RAM, could 1 of the 8 software trigger interrupt routines be used after the FLASH command is sent to the fcmd register. This would eliminate the need to specifically use the stack. Any feedback on any of these questions is appreciated.

Application note AN2548 describes a HCS12-based serial monitor with some basic debugging operations and writing to flash. Probably overkill for you, but still an excellent source of information. The source code is in two separate archive files and is in assembly, but is heavily commented. I'm going to attach these files here to save you the trouble of tracking them down.

In regard to your other questions:

1) The HC12S instructions should run on a S12X core, but you may have to modify the programming logic to make it work with the S12X's memory map.

2) I don't know anything about the XGATE and so can't answer to that.

3) When you're programming Flash, it's usually a really good idea to disable interrupts, since an interrupt is going to take the CPU to a routine in Flash, which happens to be what you're trying to modify. Barring that, the interrupt can also disrupt the precise sequence of writes required to program the Flash.

I guess I should have qualified the use of the XGATE as saying the XGATE code, data, and vector table are all loaded into RAM coming out of reset. Because I believe it fully runs out of RAM, that is why I thought it could be used but I will look at the app. note you provided.

I am trying to step through AN2720 currently. I think the problem I am having is that I want to use the global addressing scheme provided on the S12X but the routines were written for the S12 core and make use of the FLASH paging scheme.

Also, if the XGATE is configured to run out of RAM, could 1 of the 8 software trigger interrupt routines be used after the FLASH command is sent to the fcmd register. This would eliminate the need to specifically use the stack. Any feedback on any of these questions is appreciated.

Using the XGATE wouldn't solve the basic problem of the CPU having a valid program store. As soon as the XGATE enabled the flash programming state machine the CPU would lose its program space and disappear into the void. The CPU has to be running in an unaffected block when the FSTAT register is written.

S12X does have some benefits that can be brought to bear but they would impact the overall simple structure here. Specifically, you can move the CPU's vector table and/or have XGATE handle the interrupts while the reprogramming is taking place. The best approach in using these features would depend on how much functionality you needed to have while reprogramming was taking place.

Looking to the future we will have another option on the S12XE which allows the XGATE to reprogram the flash too. Obviously again the CPU would have to be operating in a known safe condition before this could be used.

Thanks, Technoman for your reply. The information of being able to reprogram one block while accessing code from another block is what I needed. I read in the Data Sheet that a FLASH couldn't be accessed while a FLASH command was executed in that block but didn't think about how there are 4 blocks on the DP512 part.

i'm using trying to program a p-flash sector of 1024 bytes on a s12xet256.

all works well in the adddress space (0x00780000-0x0079FFFF),(0x007E0000-0x007F3FFF) and (0x007F8000-0x007FBFFF) but if I try to program and erase sectors in the spaces (0x007F4000-0x007F7FFF) and (0x007FC000-0x007F7F00) the program jumps to strange address and don't program the memory

Flash block is not readable while any flash command is in progress (in this flash block). Also not readable while you are applying backdoor unsecure key (KEYACC bit is set). This means CPU can't read memory and runs away. Also CPU can't read interrupt vectors from flash block being programmed.

I am trying to write some code in C to do a mass erase and program of the flash for a 9S12X.

I have declared a pointer to the flash:

typedef uint16_t * far Flash_TAddress;

During the process I increment this address to point to the next block. The Code W\rrior compiler treats it as a 14-bit effective address, so when I try to add 0x4000 to it it effectively adds 0 and produces no code. This is presumable becuse it teats the address as an effective address used with the PPAGE register.

I have done some experiments to see what code the compiler produces, and it seems to use a mixture of GPAGE and PPAGE, as shown in the following snippet: