Hazard in pipeline - computer architecture, Computer Engineering

Hazard in pipeline - computer architecture:

A hazard in pipeline.-removing a hazard frequently need that some instructions in the pipeline to be permitted to proceed as others are delayed. When the instruction is stalled, all of the instructions issued afterward than the stalled instruction are stalled also. Instructions issued prior than the stalled instruction ought to be continuing, or else the hazard will never remove.

Due to hazard pipeline bubbles is inserted. Following table shows how the stalls are really implemented. As a result, there no new instructions will be fetched during clock cycle 4, no instruction will finish during clock cycle 8.