Fast high yield dicing of 4 and 6 inch SiC-wafer

Zuehlke, Hans-Ulrich
Market Development Manager
3D-Micromac AG

AbstractThe paper will present details on current evaluation results for TLS-Dicing™ for SiC wafers. After development of the basic principle [Lewke, et al., 2014] and the demonstration of high separation quality [Dohnke, et al., 2015] current work is focused on yield improvement. First we investigated the influence of structures inside dicing street on the TLS process. These results we applied to thin 100 mm SiC wafers and observed very high geometrical yield of 96%. Finally we also tested comparable 150 mm wafer. Additional bending strength evaluations of the diced chips are currently in progress and results will be presented during the presentation.
TLS-Dicing™ is a kerf free laser based separation technology. A controlled crack is guided through brittle material like SiC or Silicon using thermally induced mechanical stress. Resulting separation quality of backside metallization layers and chip’s side wall is very high. For higher separation straightness an additional shallow continuous surface scribe was used. In order to improve yield the influence of metal structures inside the dicing street to the scribe process was investigated. Therefore two different laser wave lengths were tested. Besides the influence of metal structures on the scribe process minimization of particles and heat affected zones in combination with high straightness of the TLS separation was in focus of this evaluation. A stable parameter field with constant energy input per unit length could be described as base for optimal cleaving results.
After a short overview on the basic principles and the technology, the presentation will focus on results of the laser scribe investigations, the current application results for SiC-dicing and achieved performance indicator values like yield, throughput and chip quality. Observed potential risks of yield loss will be discussed and transferred in design rules and best practice based dicing rules.

BiografieDr. Hans-Ulrich Zuehlke works as Marked Development Manager Semiconductor at 3D-Micromac AG. He joint 3D-Micromac in January 2014. After studying scientific instrument engineering he received his PhD in the field of computer architectures.
Since twenty years H.-U. Zühlke is active in the field of laser processing tools, last ten years with a focus on laser processes for the semiconductor and PV industry.

microDICE - Laser System for Semiconductor Industry

AbstractTLS-Dicing™ is a laser based cleaving method to separate brittle materials. TLS (Thermal Laser Separation) uses thermal induced mechanical stress. A combination of heating (by laser) and cooling (by a very small amount of DI water spray) induces mechanical stress pattern into the wafer. This mechanical stress field guides a well-defined crack through the brittle material. The cleave needs for initiation a small local defect, called I-Scribe. This scribe can also be used, to extend the range of applicable products, e.g. by removing metal from the street [1].
TLS-Dicing™ shows manifold advantages in comparison to mechanical sawing and ablative laser processes: The cleaving speed is up to 300 mm/s (mechanical sawing speed for SiC is 7 mm/s). The material is not affected by chipping - consecutively no particles are generated. The process causes no negative residual thermal impact or stress pattern on the device. In opposite to stealth dicing TLS separates the material completely in one pass over the whole vertical thickness. Even thin backside metal is separated at the same time without any delamination. TLS requires no limiting design rules and can also be applied with metal in the street by using a preparing laser step.
These benefits make TLS the perfect dicing method for SiC-based products [2]. Hence the focus for process development was first on SiC.
The presentation will give an introduction in TLS-dicing™ in general, followed by a case study for the dicing costs of a given SiC-wafer. It will be concluded with an introduction of the new generation of the dicing tool microDICE™.
[1] H.-U. Zuehlke, “Thermal laser separation for wafer dicing,” in Solid State Technology, 2009.
[2] K. O. e. A. Dohnke, “Comparison of different novel chip separation methods for 4H-SiC (Infineon Technologies AG),” in ECSCRM, Grenoble, 2014.

BiografieHans-Ulrich Zuehlke studied instrument engineering at Friedrich Schiller University Jena. In 1998 he received his PhD from the university. Afterwards he worked at JENOPTIK, last ten years in the field of laser applications for the semiconductor industry. In 2014 Hans-Ulrich Zuehlke started as Market Development Manager Semiconductor at 3D-Micromac.

AbstractWith the Internet of Things (IoT) been labeled as "the next Industrial Revolution", focus is centered on integration and wafer level packages (WLP) to deliver greater functionality, improved cost, and higher performance, all in the smallest form factor. System integration on package level known as System-in-Package (SiP) is higly adapted for IoT devices since it offers the capability of heterogeneous integration (several dies/component in the same package). However, compared to System-on-Chip approach (SoC), SiP suffers from performance loss due to long connections between components (dies, passives, etc.).
3DiS Technologies tackles the problems of integration for IoT by providing solutions for wafer-level 3D system packaging and for integration of high performance, ultra-compact 3D IPD (Integrated Passive Device). These solutions, based on patented conformal peripheral 3D interconnects technology, promise to reduce package size and interconnect length as well as to enhance SiP performance through native 3D integration. The 3D interconnection is performed through routing of high density (15µm L/S) vertical copper interconnects at the edge of a chip (or chip stack) as well as on top of the chip and substrate, be it a package structure, a board, a wafer or a flex substrate. Therefore, it doesn’t use wire-bonds, bumps nor Through Silicon Vias (TSV) for chip to package connection, nor PoP for 3D integration. Additionally, since IoT are communicating devices, high performance 3D inductive devices (coils, transformers, antennas,…) can be integrated simultaneously in the SiP, using the same metallization step. This enables further size and cost reduction of SiP. 3DiS technologies also offers standalone 3D IPD products integration capability that are 2 to 5 times smaller than conventional IPD.

BiografieAbout the Presenter:Ayad Ghannam received Ph.D degree in Microwave, Electromagnetism and Optoelectronic from University of Toulouse III, France, in 2010.
During Ph.D, he worked as a research engineer at Freescale Semiconductors, France branch, and LAAS-CNRS where he designed high-Q power inductors and developed an Above-IC process for their integration. After graduation, he continued working in LAAS-CNRS as a research engineer where he developed an innovative 3D interconnect technology. He co-founded 3DiS Technologies in 2014 and he is now its CEO and CTO.
About 3DiS Technologies:3DiS Technologies was founded by Ayad GHANNAM, Thierry PARRA and David Bourrier the 29th of April 2014 (100% privately owned). 3DiS is developing innovative, peripheral 3D interconnection-based, advanced IC 3D packaging & 3D IPD technologies to help electronic device manufacturers miniaturize and improve the performance of their systems, cost-effectively, without using wire-bonds, TSV nor PoP. Current technology development level is demonstrator-prototyping (TRL 6). The company is already prototyping its technologies with clients from the aerospace and defense market.

AbstractAs more flexible electronics products enter large-scale production, focus is increasingly moving from simply demonstrating technological capability towards higher yields, longer lifetimes, and superior performance. To improve profitability and market size of offerings, critical features that can affect performance must be monitored, including surface roughness, defect density, defect size and slope. Ideally, in-situ metrology can be employed in roll-to-roll equipment to allow real-time process control of these key parameters. Barrier film permeability, circuit performance, and overall yield may all be better controlled via real-time measurements from within the roll-to-roll processing equipment.
This paper will present a compact, low-cost, large-field 3D metrology module for in-situ measurements of flexible electronic substrates. The module is capable of sub-nanometer vertical resolution and micrometer-scale lateral resolution for accurate roughness and defect height determination. More than 17 cm^2 per minute of surfaces can be measured with 2 um lateral resolution. Modules are very compact, slightly larger than a mobile phone, and can be arrayed to provide scalable areal coverage based on each customer’s specific needs. Modules are vacuum compatible, vibration-immune, and are unaffected by the film backside or roller characteristics and thus ideal for placement within coating machines. While primarily designed for metrology of flexible electronics substrates, particularly barrier films, this metrology system also can perform high-speed 3D characterization of glass panels, semiconductor wafers and other smooth surfaces.
This paper will present data from a variety of samples measured these metrology modules, and correlate results with other precision measurement techniques. Flexible substrates will be measured on a roller in a roll-to-roll systems. Additional flat samples will be shown as measured with the metrology modules mounted over an XY stage.

BiografieDr. Erik Novak is Director of Business Development at 4D Technology. He has been developing instrumentation for precision metrology for more than 19 years in applications including displays, optical components, plastic films, MEMS, telecommunications, photovoltaics, and medical devices. He received his PhD from the University of Arizona Optical Sciences College in 1998. Erik has received four R&D 100 awards, holds numerous patents, and has more than sixty publications and book chapters related to surface measurement and industrial process control.

Affordable isolated DC current measurement based on optocouplers

Geissmann, Silvan
Principal Engineer
ABB Semiconductors

Abstractn high voltage reliability tests (HTRB, THB HVDC, ..) the devices under test (DUT) are subjected to a high voltage (usually 80..100% of VCEmax) for a prolonged period of time. Since the DUTs are connected in parallel a failure of one DUT would remove the voltage stress from the other DUTs. To prevent this a common solution is to put a (rather expensive) fuse in series with the DUT. Those fuses could be replaced by relays, but for this the leakage current of each DUT needs to be monitored. Monitoring each channel individually and making it switchable also brings additional benefits like being able to measuring VI-Curve of each element.
Since the leakage current is in the mA-range and DC, common decoupled solutions do not work. One approach would be to introduce a shunt resistor and isolate the ADC. This solution is rather expensive as it requires isolated voltage supplies for the ADC.
The solution presented here is based on a current mirror realized with two optocouplers.The use of optocoupler replaces the resistor with a diode. This change makes the circuit robust against pulse currents. This pulse currents will occur when a DUT is connected to the DC source. With a resistor this would result in an over voltage which could damage the ADC.
This paper presents the findings of using this circuit for measuring leakage currents in a new reliability test setup and the changes which had to be made.

BiografieAfter doing a four year apprentice ship at ABB Silvan Geissmann studied Electronic Engineer at the FHNW in Brugg. He then started working in 2007 at ABB Semiconductors in Lenzburg. In 2008 he started a Master of Science in Engineering which he finished in 2011.

Challenges in Manufacturing of optical and EUV Photomasks

AbstractThe presentation will discuss some selected challenges in photomask manufacturing that arise along the technology development from 14nm down to 10nm or 7nm. As somewhere along this way the volume application of EUV technology is expected both optical and EUV masks will be discussed.
For optical masks topics under review here will be: balancing of resolution vs. LWR vs. write time under the constraints of capacity, the impact of mask topography on lithographic performance and a review of mask corrections methods applied prior to mask manufacturing as well as such that can be done after the mask was manufactured.
EUV photomasks share with their optical counterparts the quest of balancing of resolution vs. LWR vs. write time. Additionally, the status of multilayer defects, inspection strategies and pellicles will be discussed.

BiografieMartin Sczyrba graduated at the Technical University of Dresden/Germany with a Diploma in Physics and a Master of Science by the University of Bristol/Great Britain in 1999. He received a PhD degree by the University of Dresden/Germany in 2003. Subsequently he has joined the Advanced Mask Technology Center in Dresden. There he was responsible for mask unit process and mask lithography simulations in process integration and R&D department. Now, Martin Sczyrba works as a Senior Member of Technical Staff in process integration, being responsible for special mask manufacturing such as e.g. alternating phase-shift masks, special aspects of mask manufacturing and projects in mask-to-wafer integration.

Deep Silicon Etch Technology for Advanced MEMS Applications

AbstractThe fast growing IoT industry triggers explosive demand of MEMS devices. Meanwhile the technical requirements become more and more stringent for plasma etch in the fabrication of advanced MEMS sensors. For example, in gyroscope silicon trench etch application, requirement for near perfect vertical profile (tilting angle<0.1) is needed. Another critical requirement for plasma etch in MEMS application is sidewall roughness control. For example, less than 50nm of sidewall roughness is required in advanced MEMS trench etch. Since callop is formed because of the intrinsic behavior of alternating deposition and etch process in Bosch process, how to eliminate or minimize the scallop has been the major challenge for Bosch process. Bottom notch control at inter-layer is another common issue encountered in high aspect ratio MEMS etch application, when there is a stop layer underneath the silicon film. Bottom notch issue has also been widely studied, and charge up on bottom dielectric layer is the most likely root cause in majority of cases. How to minimize the charge up during plasma etch, while maintaining other process requirement such as profile and etch rate, is the main challenge in Bosch process.
AMEC has developed a new revolutionary plasma etcher, to provide solutions to all technical challenges in MEMS etch applications. The details will be explained in details in may talk.

BiografieDr. Shenjian Liu is managing director and deputy general manager of ICP etch technology group in AMEC. He has over 25 years of experience in semiconductor industry, particularly in plasma etch. Before joining AMEC, he had worked in Lam Research, and owned key positions in conductor etch department focusing on process development, productivity solution development and customer technical support.
Dr. Shenjian received his Bachelor Degree from Beijing Institute of Technology in China, and Doctorate Degree in Engineering from Nagoya University in Japan.

Universal pin architecture for efficient test of power analog ICs

AbstractThe ongoing integration trend in the semiconductor industry, especially in the emerging IoT sector, sensor, power management, embedded power and automotive markets, leads to complex devices with a high mix of digital, mixed signal, analog and power functionalities in one device.
Due to cost savings and device miniaturization the number of package pins are often limited and lead to complex test requirements where multiple functional blocks are internally routed to the same I/Os.
Shrinking supply voltages for extended battery life in mobile applications are driving the need for precision trimming of power management devices in the sub 100µV area. Latest wireless charger technologies and sensors are requiring proprietary protocols based on Vcc modulated digital I/O schemes. Efficient battery management technologies are driving the need towards higher voltages and precise voltage measurement capabilities.
To overcome such high diversity of requirements a universal pin architecture is a key element for efficient test methodologies.
The single ATE instrument covers the following functionality:
• Per-pin high precision, high voltage VI
• Per-pin AWG & Digitizer
• Per-pin high voltage digital I/O
• Per-pin high voltage TMU
• Floating high-current unit + differential voltmeter + internal matrix
As all functions are seamless controlled by a pattern ensuring 100% synchronization between the digital and analog/power domain. This enables stable measurements and high throughput optimized test setups where e.g. an ATE stimulus has to react in real time to a device response typically seen in overcurrent detection tests or threshold searches.
The availability of every function behind every pin simplifies load board designs and offers a slim attractive platform solution which covers the test for a wide range of diverse IC in the markets mentioned above.

BiografieToni Dirscherl holds a degree as Electronic Engineer from the University of Applied Science in Munich, Germany and joined SZ Testsysteme as Development Engineer for Analog DSP frontends in 1997. After serving 3 year as Senior Application Engineer for SZ Inc and Credence in San Jose/California from 2001 to 2003, Toni Dirscherl took over the position as Product Marketing Engineer for Credence-SZ GmbH. Since the acquisition of Credence-SZ by Advantest Europe in 2008, Toni Dirscherl acts as the Product Manager for Advantest’s Analog and Power Solutions. He has published numerous articles.

Electrode and Electrolyte Ink Development for Printed Batteries

Durstock, Michael
Chief, Soft Matter Materials
Air Force Research Lab

AbstractPrintable energy storage facilitates innovation in the manufacture of flexible electronics in that it will enable direct integration of a power source into a device during the fabrication process. To enable such advancement, we demonstrate a universal approach to develop free-standing and flexible electrodes for printable, high-performance Li-ion batteries. This simple approach utilizes a well-dispersed and directly castable mixture of active material, carbon nanofibers, and polymer to make printable electrode inks. The unique composite properties are mainly attributed to the formation of a 3D nanofiber network that acts as the conductive additive, embedded charge collector, and porous, structural scaffold to facilitate Li+ diffusion. Free-standing electrodes of three common Li-ion battery active materials (Li4Ti5O12, LiFePO4, LiCoO2) are prepared, each showing excellent cyclability and rate capability. To complement this component, we demonstrate a dry phase inversion technique representing a step toward controlled, printed porosity in Li-ion battery electrolytes. Our approach utilizes a solvent/weak non-solvent system to generate porosity within a polymer matrix and a ceramic Al2O3 filler to fine tune the pore size distribution to impart desirable tortuosity within the membrane. These electrolytes offer electrochemical performance on par with commercial separator films even at current rates as high as 5C, with better thermal stability and electrolyte wetting. This material can also be printed directly over an electrode layer without sacrificing performance in either layer. Additionally, the phase inversion process is applicable to composite electrode inks, yielding electrodes with increased electrochemical properties and better flexibility over those prepared with good solvent alone. This technology for both electrolyte and electrode inks is an enabling step toward direct integration of flexible power in confined areas or on non-planar device surfaces.

BiografieDr. Michael F. Durstock currently works in the Materials and Manufacturing Directorate of the Air Force Research Laboratory. He is the Chief of the Soft Matter Materials Branch and his research focuses on flexible hybrid electronic materials and devices. He leads research activities focused on materials and process development for energy harvesting and storage systems, flexible and printed hybrid electronics, and integrated device concepts. He is responsible for the coordination of and advocacy for the in-house research portfolio and external development programs. Specific areas of interest include next-generation energy harvesting technologies with a focus on lightweight and flexible devices, nanostructured materials for high performance batteries, nanodielectrics for capacitors, direct write and other printing approaches for integrated device concepts, and flexible/stretchable electronics.
Dr. Durstock received his Bachelor of Science degree in the field of Materials Science and Engineering from the University of Cincinnati, Summa Cum Laude. He obtained his Ph.D. from the Massachusetts Institute of Technology (MIT) as a National Science Foundation Fellow in the field of Electronic Materials within the Materials Science and Engineering Department. While there he examined self-assembly techniques, organic light-emitting diodes, and the dielectric properties of thin polymer films. Prior to joining the Air Force Research Lab, Dr. Durstock worked for the Dow Chemical Company performing a variety of different functions including work at the Ceramics & Advanced Materials Research Group, the Latex Technology Center, Engineering Thermoplastics, and the Analytical Lab. In addition, he worked in the research division of NKK Corporation in Kawasaki, Japan, performing polymer synthesis.

Flexible Hybrid Electronics for Aerospace Applications

Leever, Benjamin
Materials Engineer
Air Force Research Laboratory

AbstractFlexible Hybrid Electronics (FHE) are expected to impact a range of aerospace applications including: wearable electronics and sensors for monitoring airman health/performance; conformal electronics and antennas for maximizing space efficiency and reducing aerodynamic drag; and inherently more durable circuits that will withstand the extreme strain, shock, and vibration environments typical of aerospace missions. The presentation will highlight our work in the development flexible devices as well as their integration with both rigid and flexible components through FHE packaging concepts. Our work includes the development of flexible and foldable lithium ion batteries based on carbon nanotube current collectors, which have been shown to be compatible with both roll-to-roll and direct-write fabrication approaches. We will show that these batteries offer the potential to significantly reduce electrode weight while maintaining equivalent electrochemical performance and dramatically improving mechanical resiliency.
In addition, the presentation will discuss strategies for improving the survivability of electronics in high-shock environments. This work includes innovative packaging schemes for protecting traditional electronic components on PCBs such as encasing them in elastomers as well as investigating the deposition of flexible Si integrated circuits with stretchable interconnects on soft substrates. Finally, the presentation will detail our work in liquid gallium alloys for stretchable and reconfigurable electronics. Recent work has focused on aerosol jet and extrusion-based approaches for printing liquid gallium alloys as well as approaches to mitigate gallium oxide formation to improve opportunities for the development of reconfigurable antennas.

BiografieBenjamin Leever is currently a Senior Materials Engineer in the Air Force Research Laboratory (AFRL) Soft Matter Materials Branch. His primary roles are Portfolio Lead for Airman Performance Monitoring and Government Chief Technology Officer of NextFlex, America’s Flexible Hybrid Electronics Innovation Institute. In support of AFRL’s investments in Airman Performance Monitoring & Aeromedicine, Dr. Leever determines technical strategy, manages AFRL contracts, and establishes industrial, academic, and governmental collaborations. He also leads the directorate’s Energy Integrated Product Team and respresents the directorate on numerous domestic and international power & energy and additive manufacturing working groups.
Prior to assuming his current duties, Dr. Leever led a research team focused on the development and modeling of multifunctional materials for structural power applications. Dr. Leever began his career at AFRL in the Manufacturing Technology Division, where he managed programs related to electro-optics systems. He earned a B.S. in Chemical Engineering from the University of Cincinnati and a Ph.D. in Materials Science & Engineering from Northwestern University.

Environmentally Friendly Innovative Etch Solutions

Misra, Ashutosh
CTO Electronics
Air Liquide

AbstractTo be completed

BiografieAs the CTO of Air Liquide Electronics, Ashutosh is responsible for defining the global technical vision and product development strategies of the Electronics Business Line. Prior to his current position, he was the Worldwide Director of ALOHA™ Electronics Performance Materials, where he oversaw Air Liquide’s advanced precursor business that supplies leading edge materials for CVD and ALD processes. From 2001-2008, as Director of Materials Development, Ashutosh lead the accelerated development and screening of advanced precursors and surface preparation products for semiconductor applications. He holds a Ph.D. in Physical Chemistry and was nominated as Air Liquide Group Fellow in 2013.

Advanced materials processing with ALD and CVD precursors

AbstractChemical vapor deposition and its more recent offspring Atomic Layer deposition are workhorse technologies for thin film deposition in the semiconductor industry. The critical dimension shrinkage and the move to ever more aggressive wafer topography is further accelerating the adoption of CVD and more particularly of ALD processes, owing to its capability to deposit perfectly conformal films, whether conductive or dielectric. The versatility of the technology has also enabled the introduction of multiple elements and materials in advanced chips, and of multiple flavors of well know material like SiO or SiN to meet specific integration needs.
While hardware engineers worked on tool improvements to extend CVD capabilities and make ALD production worthy, a new breed of process chemists started designing molecules to meet process and integration challenges from the chemistry angle. Such challenges were generally related to at least one of the following aspect: a- decreasing thermal budgets, b- the need for highly conformal films, c- the need for films with more extreme electrical properties (higher k, lower k, lower resistivity, better EM barriers), and the need for ancillary and sacrificial films to support complex lithography schemes.
Addressing these challenges means resolving a multivariable equation of finding in time a molecule that meets all requirements related to process performance, scalability, safety, and affordability.
The presentation will illustrate through a few examples how chemical innovation has enabled recent advances in chip manufacturing, such as the tuning the ligands of a molecule to facilitate it’s delivery, or the design of a brand new substance to double the throughput of SiO2 ALD in multiple patterning schemes.

BiografieJean-Marc Girard graduated from the Ecole Normale Superieure de Lyon in 1992 and holds a PhD in plasma physics from the CEA (French nuclear research institute). Joining Air Liquide in 1995, he held different R&D management positions in Europe and Japan, all related to semiconductor materials and applications. In 2002 he became Marketing Manager for Advanced Semiconductor Materials, and founded in 2005 the ALOHA™ ALD/CVD precursor product line, which he managed until 2010. Thereon, as CTO of the Electronics World Business Line and Air Liquide Fellow, Jean-Marc contributed to the acquisition and merger of Voltaix with the ALOHA organization to create Air Liquide Advanced Materials. Now CTO and Director of R&D, Jean-Marc's role is to define the technology roadmap, the IP and the collaboration strategy of Air Liquide Advanced Materials, to drive the associated R&D and to manage the product development execution.

Smart Manufacturing meets Industry 4.0 at AIS

AbstractOptimization of efficiency, higher quality products, improve productivity are main goals of smart manufacturing. Big data, cloud services and full integration are aspects of smart manufacturing. AIS provides solutions for smart manufacturing by involving the ideas German initiative I4.0.

BiografieFrank Geissler studied electrical engineering in Dresden (Germany) and graduated in 2004 with focus on equipment automation. He started his professional career in the semiconductor industry joining Brooks Automation (Germany) in 2004. After working for one year in Jena he served as Production and Outsourcing Manager from 2005-2006 in Tainan (Taiwan). In 2009 he joined AIS Automation in Dresden (Germany). Also in 2009 he finished his MBA from HHL in Leipzig (Germany). As Director Sales he is leading the sales and marketing department.
AIS Automation is a leading provider of factory and equipment control solutions in the semiconductor, LED and photovoltaic industry. AIS MES solutions are the backbone of solar Fabs around the world, while providing latest technologies like Advanced Process Control (APC). Equipment control solutions from AIS incl. SEMI compliant interfaces are used in hundreds of batch, inline and cluster tools.

BiographyHaving obtained his master degree in electrical engineering from University of Karlsruhe in 1993 Juergen held several executive positions in international companies serving the flat panel display and electronics industry for optical systems, metrology, automation, and other capital goods. Juergen holds a second master degree in economics.
In 2010 he joined AIXTRON SE, a leading supplier of MOCVD equipment. In his capacity as Director Business Development is he responsible for Sales and Marketing of AIXTRON’s products related to the manufacturing of organic electronic devices. He has produced several publications and papers about characterization of electro-optical devices, design of optical components, numerical optimization of displays, process automation, gas phase processes et al.

Development of block copolymers to create complex

AbstractThe development of block copolymer self-assembly techniques as on-chip lithographic masks can provide methods to form regular nanopatterned substrates. Block copolymer (BCP) lithography is nearing a point where it could be transferred into industrial fabrication and complement traditional UV and E(xtreme)UV lithographies. As feature sizes decrease, pattern transfer from an etch mask to the substrate is becoming more critical. Thus, whilst BCP based methods can yield ultra-small feature sizes, can they be used to create hi-fidelity, hi-quality silicon features? Here we show that BCP methods can be used to create patterns of inorganic oxides on a substrate that can act as hard masks. These materials should have high etch contrast (to silicon) and so allow high aspect, high fidelity pattern transfer whilst being readily integrateable in modern semiconductor fabrication (FAB friendly). Here, we show that ultra-small dimension hard masks can be used to develop large areas of densely packed vertically and horizontally orientated Si nanowire arrays. Ni, NiO and ZnO hard masks of different morphologies and dimensions were formed using microphase separated polystyrene-b-poly(ethylene oxide) (PS-b-PEO) block copolymer (BCP) thin films. The self-assembled polymer patterns were solvent processed and metal ions included into chosen domains via a selective inclusion method and subsequent inorganic oxide nanopatterns were developed using standard techniques. It is shown by high resolution transmission electron microscopy studies that high aspect pattern transfer could be affected by standard plasma etch techniques. The masking ability of the different materials was compared in order to create the highest quality uniform and smooth sidewall profile of the Si nanowire arrays. Notably, good performance of metal masks were seen and this could impact the use of these materials at small dimension sizes where conventional methods are severely limited.

BiografieProf Michael Morris is the Director of AMBER and Professor of Surface and Interface Chemistry at Trinity College Dublin. AMBER is the national material research centre and is co-funded by government and industry to provide disruptive science into industry partners. Prof. Morris was at University College Cork for over 20 years before moving to Trinity and he retains a research group in Cork and the Tyndall National Institute. He has worked in the area of self-assembly for over 20 years and has published over 200 papers in this area. These self-assembly methods have been used to generate ultra-low dielectric constant thin films and create nanowires and nanowire arrays. His current work focuses on the development of block copolymer techniques to nanopattern surfaces for electronic device applications. Prof. Morris has also applied some of these techniques to the development of food packaging materials in both film and membrane form where nanopatterns can improve antimicrobial and hydrophobic properties of polymers. Prof. Morris is a partner on the EU sponsored PLACYD programme aiming to insert block copolymer lithography into device fabrication. Prof. Morris has worked closely with collaborators at Intel both in Ireland and in Components Research in Portland. He also works with a number of other industrial partners including, Alcatel-Lucent, Merck Millipore and Glantreo in examining how inexpensive nanopatterning and nanostructure may be used in other applications which include advanced surface cooling and antimicrobial surfaces.

AbstractAdvanced processors require large amounts of memory to save programs and data on-the-fly. There is however a huge latency gap between the processor, clocked at multi-GHz, and the main (DRAM) memory, which requires a complex memory hierarchy involving multiple (SRAM) caches. A memory technology that would be fast enough to be embedded within the processor core, yet non volatile to retain data when the power is turned off would be a big step forward.
Antaios' proprietary "SOT" memory technology is the only emerging memory technology that combines non volatility, sub-nanosecond speed and infinite endurance, at a smaller footprint (e.g. cost) then SRAM, with a similar core technology (materials, process) then as the recently developed MRAM, therein providing an easy industrialization path.
As a technology provider, Antaios will provide memory turn-key solutions, from core technology to licensed IP blocks,in return for licensing fees and royalties.
Antaios SOT technology will be king for applications where speed and endurance are key, such as high end Micro Processor Units, from processor cores in PC and servers, to advanced System-On-Chip (SoC) in mobile applications (tablets, cell phones, ...). Antaios embedded memories will first replace SRAM at a lower cost (e.g. silicon area) with the added value of non volatility (e.g. zero standby power), then, if density allows, potentially DRAM as well.
With the key cornerstone technology patents in hand, a team of worldwide experts in the field, an seasoned management having already experienced multiple start-ups in France and abroad, a frugal business model relying on key technology partnerships and a fast growing market with no competing solutions in sight, Antaios offers tremendous opportunities, both for internal development and exit strategy.

BiografieFrom permanent magnets to MRAM, Dr. Jean-Pierre Nozières has been involved in magnetics research and development since the late 80’s. After graduating with an Electrical Engineering Degree and a PhD in Physics, he has equally split his career between industry and research, from IBM (USA) where he pioneered the work on “spin valves” to Spintec, one of spintronics premier research laboratory, through Laboratoire Louis Néel, one of France’s major magnetism research lab, Applied Magnetics Corporation, a disk-drive head company, PHS, a french MEMS start-up and Crocus Technology, an MRAM start-up which he founded and acted as the CTO for 4 years. In the past few years, Dr.Nozières has launched eVaderis, a fabless memory IPs company and Antaios, a memory technology company. He is also involved in Hprobe, an test equipment company, to be launched early next year.

AbstractFor the realization of next generation Ultra High Definition Televisions (UHD-TVs) both quantum dots (QDs) and organic light emitting diodes (OLEDs) will play a crucial role. Both materials are extremely sensitive to the presence of water vapor, so high grade barrier encapsulation films (down to 10-6 g/m2 day) are mandatory to achieve the 10 years lifetime at room temperature required by commercial products. In this paper the latest advances in R2R CVD processing will be illustrated, showing the impact on optical and barrier performance of substrate type, single layer and fully integrated multilayer CVD based film stacks. Architectural solutions to challenges inherent in moving from lab & pilot scale manufacturing to high volume production will be illustrated. Particular attention will be given to defect detection & mitigation, critical for achieving high production yields and enabling the upcoming wave of flexible electronic devices. Further developments will also be discussed in terms of infrastructure & process development for patterning of micron level features & devices.

BiografieDr. Fabio Pieralisi received his degree in Electronic Engineering from La Sapienza University of Rome and his Doctoral Degree in Electrical Engineering from the University of Stuttgart. As a researcher, he worked on LTPS integrated analogue and digital display drivers. After joining Applied Materials, he developed advanced sheet-to-sheet (S2S) PVD processes for UHD displays and chip packaging applications. He currently develops roll-to-roll (R2R) CVD processes for ultra-high (UH) barrier films for QD, OLED and OPV applications. He manages defect reduction activities for large-area vacuum coating equipment.

Mature Product and End Markets: Strategies to Optimize Fab Operations

Boyle, Dan
AGS NA VP/GM
Applied Materials

AbstractIn today's markets, the industry is seeing continued expansion and wafer fab lifetime extension of the MTM (More than Moore) production sites with the continued growth in Mobility, Automotive, IoT, VR, Al and Robotics.
This lifetime extension is driving new requirements in Hardware, Services, Automation, Data Management and Waferfab control requirements as well as industry life time support with aging tools, supply chain and workforce.
Dan Boyle will share how Applied Materials continues to invest in technology, skills and services to enable the customer and market requirements and keep our customers operations vital for future business demands.

BiografieDan Boyle is the Vice President of Field Services for the Europe and North America Regional Accounts within the Applied Global Services Organization.
He has customer account management for service, spares and overall customer factory support with the regional accounts. Since joining Applied Materials in 1998, Mr. Boyle has held various positions in Service Management, Sales Management, Business Operations Support as well as overall Customer Account Support and Management.
Prior to Applied Materials, he worked for Texas Instruments as well as TwinStar (TI/Hitachi JV) for fourteen years in various Equipment, Process and Manufacturing wafer fabrication engineering and management roles.
Mr. Boyle holds a bachelor degree in Manufacturing from Bradley University and an MBA from the University of Dallas.

More Than Moore (MTM): Market Trends and Opportunities

Cummings, John C
Managing Director
Applied Materials

AbstractThe specialty equipment market, or More-Than-Moore market as it is often called, is growing rapidly. There are considerable technical challenges – opportunities – in power/analog devices, CMOS Image Sensors, Micro-machines, and more to support the many growing market segments like Smart Phones, Automotive, and Industrial end markets. Applied Materials remains committed to the success of our customers in these markets. We continue to invest in technology development to enable these technical advances, and we are able to provide new and refurbished equipment for both 200mm and 300mm customers.

BiografieJohn has been with Applied Materials for 21 years, performing in roles of increasing responsibility from Sales to Account General Manager to Region General Manager in three field offices before coming to headquarters in Santa Clara, CA. He has spent most of his career working with semiconductor customers and a few years supporting solar customers. In his current role these past 5 years, he is focused on the specialty equipment, or More Than Moore, segment of semiconductor customers.
Before joining Applied Materials, John served as a US Navy officer and aviator for 9 years. His flying experience includes many types of jets, props, helicopters, and gliders with three operational deployments in the P-3C Orion anti-submarine warfare aircraft during the Cold War.
John holds a Bachelor of Science degree in Physics from the Virginia Military Institute and an MBA from the University of West Florida.

From wafer scale graphene production to 2D-materials foundry

van Rijn, Richard
CTO
Applied Nanolayers

AbstractApplied Nanolayers (ANL) is the foundry for the development and fabrication of product based on 2D materials such as graphene. ANL has developed its own production platform and production process for high quality graphene and other 2D materials on semiconductor standard wafer scale (200mm). This, combined with a proprietary wafer to wafer transfer technique allows ANL to start integrating the materials it produces with regular semiconductor production processes in a fully automated way. This places ANL in a unique position to reliably develop applications based on graphene such as Hall sensors, optical modulators and thin membranes.

BiografieApplied Nanolayers (ANL) is the foundry for the development and fabrication of product based on 2D materials such as graphene. ANL has developed its own production platform and production process for high quality graphene and other 2D materials on semiconductor standard wafer scale (200mm). This, combined with a proprietary wafer to wafer transfer technique allows ANL to start integrating the materials it produces with regular semiconductor production processes in a fully automated way. This places ANL in a unique position to reliably develop applications based on graphene such as Hall sensors, optical modulators and thin membranes.

Lift-off by AP&S - Exceptionally no magic, but close to!

AbstractMetal lift-off processes in semiconductor industry commonly and as state-of-the-art process are done using different solvent applications as well in batch as in singlewafer equipment. By combination of powerful solvents like e.g. Acetone or NMP (n-methyl-2-pyrrolodone) and mechanical impact by high-pressure spray metal layers are lifted from patterned wafers.
Used solvents often have negative characteristics which legitimate their application in the future due to chemical and equipment safety regulations or general process performance.
Looking for alternatives to critical solvents and further process optimization AP&S International GmbH provides a patent-pending lift-off process. The usage of Dimethylsulfoxide (DMSO) together with MegPie system combines an uncritical solvent with the advantage of megasonic agitation within a flexible singlewafer tool platform with capability up to 300mm wafer.
Uncritical solvent, throughput optimization, cost efficient and field proven process solution are the main benefits compared to current process technologies. No need of expensive stainless-steel tools and a wide range of hardware configuration are the possibilities in the AP&S SpinLift-off tool. These are all characteristics which show how we combine our lift-off with customer benefits.

BiografieStefan Zuercher studied process engineering in Furtwangen with exam as B.Sc. in 2011.
Thesis Topic "Development of a pilot plant for electroless galvanic deposition of nickel on crystalline silicon".
Start working as process engineer for wet chemical batch processes (etching, cleaning, eless-plating, drying) at AP&S International GmbH in march 2011. Within 2012 start of working in R&D department for batch/singlewafer equipment and in application laboratory at AP&S Headquarter.
Becoming manager of the new AP&S Democenter in January 2015, he is working very close with customers on optimization of current processes or research of alternative process solutions within the in-house democenter. In parallel different tasks in R&D department for process and application engineering are handled.

Directed Self Assembly: Where are we? Where do we go?

Cayrefourcq, Ian
Director of Emerging Technologies
ARKEMA

AbstractDirected Self Assembly (DSA) lithography has been a very hot topic these last years. Its use in various applications including contact repair, contact shrink and multiplication, line and space patterning, has been heavily studied and tremendous progresses have been made. After a few years of great (over?) excitement on DSA, we are now back to real world and work. While key achievements have been demonstrated in pattern fidelity (i.e. CDU, Placement error…) many challenges, such as defectivity, remain to be overcome before that DSA can become a viable patterning solution. In this presentation, after an overview on the DSA state of the art we will discuss the latest results and show that despite the remaining challenges, DSA is still a unique and promising technology that will complement classical lithography.

BiografieDr Ian Cayrefourcq is currently Director of Emerging Technologies at Arkema. He is leading both Renewable Energies and Electronics R&D portfolios. Before joining Arkema, he has been leading various organisation such as R&D departments, international project teams and New Business Development department in various high tech companies such as Thales, Corning and Soitec.
Dr Ian Cayrefourcq owns an engineering degree in Material Science, A master Degree in Solid Physics and a PhD in microelectronics. He is author or Co-author of more than 70 publications and 20 patents in the semi-conductor field.

How to build an "Optic" e-nose

Rousselle, Tristan
CEO
Aryballe Technologies

AbstractBecause of the specific "chemical" nature of gas, most sensors including electronic noses have been developed based on electrochemical technologies. Among the few optic technics which can be applied to the detection of volatile compounds, one of them may revolutionize the analysis of odors. The capacity to precisely detect and qualify odorant molecules is highly expected in different industrial markets. For examples there is a strong need in the environment field for the analysis of olfactory pollution, but also in the food, flavour, fragrance and cosmetic markets to better analysis the products’ sensorial quality.
Surface Plasmon Resonance has been evaluated for its ability to analyse gas more than 40 years ago but was at the time not further developed. Very recently a scientific team of the CEA in Grenoble and a start-up decided to resuscitate this technology by combining it with the use of specific biochemical sensors to develop the first universal and portable electronic nose.

BiografieTristan Rousselle holds a Ph.D. in cell biology from the University Joseph Fourier in Grenoble. He did part of his post graduated studies in Sussex University (Brighton-UK) and La Jolla Institute for Allergy and Immunology (San Diebo-CA) He co-founded in 2000 the company Protein’eXpert now called PX'Therapeutics. This biotechnology company is specialized in the engineering, pre-clinical and clinical development of therapeutic proteins. In 2011 PX'Therapeutics had more than 60 employees in Grenoble and Lyon and was realizing nearly 50% of its Turn Over outside Europe.
In July 2013, a few months after the Acquisition of PX Therapeutics by the “Laboratoire Aguettant” Tristan decided to launch a new venture with a lead innovative project in the field of Biosensors named “Aryballe”. He confounded the company with Delphine Pau, Thierry Livache, Sam Guilaumé and Sissel Tolaas in March 2014. Since then Tristan holds the position of CEO at Aryballe Technologies SA which main objective is to develop the first universal and portable electronic Nose. In July 2016 the company raised 3 M € with investors and industrial partners. The first products are expected to be launched at the beginning of the year 2017

Enabling low cost IoT ICs with lithography systems made in Europe

AbstractThe internet of things (IoT) is the network of physical devices, vehicles, buildings and other items embedded with electronics, software, sensors, actuators, and network connectivity that enable these objects to collect and exchange data. In 2013 the Global Standards Initiative on Internet of Things (IoT-GSI) defined the IoT as "the infrastructure of the information society." The number of connected devices within the IoT semiconductor market was 17.7B in 2015 and is projected to be 74.8B in 2025, with a CAGR of 15.5%. This huge IC unit growth will not only drive silicon demand out of 300 mm- but also from 200 mm-factories, since a large variety of analog & power devices as well as sensors are produced in such factories. In these markets, European companies held a strong position and several of them are currently considering increasing the capacity of their 200 mm factories. One efficient way to achieve this goal is by exchanging older semiconductor manufacturing equipment by new state-of-the-art equipment able to deliver a 2 to 3 times higher silicon output per square foot of factory floor, as compared to tools built 15 to 20 years ago. During the presentation, we will explain using a comparative CapEx/OpEx-model for lithography equipment why the equipment retrofit approach could help to improve the competitiveness of European chip makers while minimizing CapEx investments.

BiografieAntonio (Toni) Mesquida Küsters holds both Spanish and German nationalities and earned his master degree in Electrical Engineering (1990) as well as a PhD-degree in Semiconductor Science (1994) from the RWTH Aachen in Germany. Between 1995 and 2001, he held various management positions at Siemens AG (later Infineon Technologies AG) in Munich in the areas of IC development, technology transfer, product marketing and corporate venturing. As one of the founding members of Infineon Ventures, he served on the supervisory board of various high-tech start-ups around the world. Between 2002 in 2006, he held the position of Head of Corporate Strategy at the German MOCVD equipment provider AIXTRON SE. In 2006, he joined ASML in Veldhoven as Director of Market Intelligence, where he significantly contributed to the management directions and priorities of the Dutch company. Between 2011 and 2014, he served as Sourcing Director as well as Managing Director of the ASML German Operations in Alsdorf (former Xtreme Technologies), in the area of EUV DPP Sources. Since beginning of 2015, Toni is in charge of product marketing for all TWINSCAN dry lithography products.

BiographyMarcus is Co-Founder and Managing Director of aSpect Systems.
aSpect is a vendor for image sensor test services (wafer- & final test), test- and illumination equipment, prototype package- and camera development, as well as production equipment for lens adjustment.
Marcus started his professional career as a lab assistant in 1987 at Spectro Analytical Instruments, a vendor for optical spectrometers. He studied physics at the University of Wuppertal. From 1998 he headed for five years the semiconductor test floor of Silicon Vision. In 2003 Marcus founded together with Philipp Gottesleben aSpect Systems GmbH.

Innovative plating system for an embedded packaging concept of power modules.

AbstractThe current paper will explore some of the challenges of the growing power electronics market and how to overcome them with a novel approach to embedding packaging, using an innovative electroplating tool. Embedding technology refers to the integration of components (IGBTs, MOSFETs and dies) into PCB to build up a compact and dense package. Therefore the new plating system enables simultaneous double side Cu plating for improved efficiency and cost effective manufacturing, both of which are necessary to address the future requirements for power device manufacturing.
This work is part of Catrene's EMPower project that houses leading automotive suppliers (Continental, ST Microelectronics), PCB manufacturer (AT&S), technical universities, and Atotech as equipment and process supplier for semiconductor advanced packaging technologies.
The targets of the EMPower project are to lower costs and enable higher reliability and smaller form-factor, which are expected to have a potential impact of up to 10% on automobile manufacturing by 2035.
The paper presents the results of double sided Cu plating in terms of warpage, stress, uniformity and process time that have been successfully fulfilled, according to the specification of the EMPower project.

Advanced Die Attach Platform for Advanced Packages

Pristauz, Hugo
VP Technical Development & Advanced Technology
Besi

AbstractThe Internet of Things comes with a variety of new challenges in the More-than-Moore domain, driving enhancement for advanced semiconductor packages which are demanding for more advanced die attach machine technology.
While still seeing flip chip as the dominant advanced package there are GPU and HPC applications requesting 2.5D/3D packaging technology. For form factor driven low/mid end IoT package stuff advanced SiP packages and wafer/panel level fan-out & embedded packages are becoming popular.
On die attach side Besi is responding to this new advanced packaging trends with the "8800 advanced" platform which supports die attach technology for flip chip, fan-out packages, 2.5D/3D packages and advanced SiP's.
The simple world of a 10µ flip-chip/dipping process has to be enhanced by substrate/wafer/panel level formats, wafer/tape&reel presentations, face-up/face-down placement with substrate/bond head pulse heat options, requiring placement accuracies down to 2µ@3sigma and enhanced bond control for thermo compression processes.

BiografieSince begin of the millennium Dr. Hugo Pristauz has been working in equipment business for emerging semiconductor packaging technologies.
After making his PhD in the field of control science at TU Graz in 1990 and starting his industrial career in an automation company he entered semiconductor business by joining Datacon in 1999, soon being assigned to a product manager position in order to manage the development and marketing of the successful 8800 Flip Chip platform, followed by a VP R&D position for Datacon's entire R&D activities.
After acquisition of Datacon by Besi Hugo Pristauz was assigned in VP position to emerging business responsibilities for RFID Assembly (2005+), the entire Besi Flip Chip product line (2009+), and Besi Thermo Compression Bonding & Wafer Level Fan-Out business (2014+).
Since begin of 2016 Hugo Pristauz is focusing on technology scouting and networking in order to support Besi's roadmap alignment process for advanced die attach equipment, supervising equipment key technology developments while coaching top flight R&D teams.

Inline Wafer Edge Inspection System for Yield Enhancement of Thin Wafer Production

Jerman, Thomas
CEO
Bright Red Systems GmbH

AbstractIn 2015 the semiconductor's thin wafer market was valued at USD 6.76 Billion and is projected to reach USD 9.17 Billion by 2022, at a CAGR1 of 3.7% between 2016 and 2022. This market affects MEMS, CMOS Image Sensors, Memory, RF Devices, LEDs, as well as Logic Devices2.
While this market is growing, problems have increased because wafers are getting thinner and thus more likely to break. This breakage is caused by broken and chipped wafer edges which may result in functional failure or total wafer breakage during production or at the customer's site. Production processes as well as production equipments responsible for these kinds of defects have to be identified and improved.
Hence, Thomas Jerman raised the following question: “What if I could develop a technology which identifies damaged wafers automatically and simultaneously keeps throughput high?”.
Based on the patented Ranging Edge Detection Technology of BRS, now the company focuses on yield enhancement for thin wafer production by providing their contactless screening LED- and laser-micrometers called Screeners. Therefore BRS-Screeners profile the wafer edge thickness during a common wafer pre-alignment process to quantify upper and lower wafer edge defects while saving precious inspection time. They also determine wafer alignment parameters as well as wafer bow.
With that introduced, BRS-Screeners help semiconductor manufacturers to increase yield, save precious inspection time and help to deliver only the best wafers to semiconductor customers.
However, developing measurement technologies is only half of the story, because successful quality assurance can only be achieved by essential system integration services, which BRS also passionately provides.
1 Compound Annual Growth Rate2 Thin Wafer Market by Wafer Size, Process, Application and Region - Global Trend and Forecast to 2022, Publisher: marketsandmarkets.com, Publishing Date: January 2016.

BiografieThomas Jerman has a master's degree in electrical engineering from Graz University of Technology. He focused on information technologies and optical metrology while he was gaining experience in the semiconductor industry (ams AG and Infineon Technologies Austria AG). After graduation he founded the company Bright Red Systems GmbH, supported by the academic business incubator Science Park Graz and the Austrian research promotion agency FFG. Together with Dr. Tatiana Strapacova and Dr. Robin Priewald he has been running BRS for five years now. Today Thomas Jerman can already look back on fourteen years of experience within the semiconductor industry.

Infra-red emitters and detectors using a common CMOS MEMS technology platform

Udrea, Florin
Professor
Cambridge University

AbstractAmbient air quality sensors are among the most desirable sensors in the context of smart devices such as phones, watches, accessories and wearable, and could form an important class of devices for well-being and E-health applications as well as remain popular in industrial and automotive applications.
The talk will give an introduction to smart sensor technologies with particular emphasis on gas sensors and Infra-red devices, and will continue with details of Infra-red technology using standard CMOS and MEMS steps. The talk also covers the use of Non-dispersive Infrared systems and their particular use in industrial and consumer applications. Among the targeted gases are CO2, methane as well as CO and H2S.

BiografieFlorin Udrea is a professor in semiconductor engineering and head of the High Voltage Microelectronics and Sensors Laboratory at University of Cambridge. He received his PhD degree in power devices from the University of Cambridge, Cambridge, UK, in 1995. Since October 1998, Prof. Florin Udrea has been an academic with the Department of Engineering, University of Cambridge, UK. He is currently leading a research group in power semiconductor devices and solid-state sensors that has won an international reputation during the last 20 years. Prof. Udrea has published over 400 papers in journals and international conferences. He holds 70 patents with 20 more patent applications in power semiconductor devices and sensors.
Prof. Florin Udrea co-founded three companies, Cambridge Semiconductor (Camsemi) in power ICs – sold to Power Integrations, Cambridge CMOS Sensors (CCS) in the field of smart sensors and Cambridge Microelectronics in Power Devices. Cambridge CMOS Sensors has been recently acquired by ams. Prof. F. Udrea is now a senior director in ams.
Prof. Florin Udrea is also a board director in Cambridge Enterprise. For his ‘outstanding personal contribution to British Engineering’ he has been awarded the Silver Medal from the Royal Academy of Engineering. In 2015 Prof. Florin Udrea was elected a Fellow of Royal Academy of Engineering

Progress of Nanoimprint System Development for High Volume Manufacturing of Semiconductor Devices

Wada, Hideyuki
Staff Engineer
Canon Inc.

AbstractImprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash Imprint Lithography* (J-FIL*) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate.
Previous studies have demonstrated J-FIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. Additional considerations for inserting the technology into high volume manufacturing of semiconductor devices include overlay, throughput, defectivity, and mask infrastructure. Canon designs nanoimprint lithography tools by creating production infrastructure which includes resist production, collaborations with mask vendors, and close collaborations with the end user. This approach has resulted in the advancement of the technical requirements for high volume manufacturing mentioned above.
In this presentation, we will review the technology advancements made and introduce the new imprint systems that will be applied for the fabrication of advanced devices such as NAND Flash memory and DRAM. Cost of Ownership and future plans will also be discussed.
*Jet and Flash Imprint Lithography and J-FIL are trademarks of Molecular Imprints, Inc.

BiografieHideyuki Wada received his B.S. degree in physics from Osaka University in Japan, in 1990, and then started his career in semiconductor industry when he joined IBM Microelectronics Division where he was engaged in the semiconductor manufacturing process development as a photolithography engineer and process integration engineer. After 12 year experience with semiconductor device manufacturing, he entered a graduate school at the University of California at Los Angeles and then received his M.S. degree in electrical engineering in 2004. He had been working as a director of applications engineering to support customers for their nanoimprint technology developments in Japan and other countries in Asia, after he joined Molecular Imprints, Inc. in 2004. When the semiconductor business of Molecular imprints, Inc. was acquired by Canon Inc. in April 2014, he moved to newly established Canon Nanotechnologies, Inc., and then moved to Canon Inc.

BiographyDr. Jérôme GAVILLET received his PhD on material physics & surface processing from l’Ecole des Mines de Nancy (F) in 1996. As a researcher, he worked on hydrogen embrittlement of stainless steels for the petrol industry at the Federal University of Rio de Janeiro (B), on zircaloy alloy coatings for the French nuclear industry and on copper interconnects for the semiconductor industry at the University of York (UK). He spent 7 years in microelectronics working as a process engineer for equipment suppliers in Cardiff (UK), Sunnyvale (US) and Grenoble (F). He joined CEA-Liten in 2005 as a project manager in the field of Renewable Energies and Nanomaterials, working on surface energy and thermal management topics. Since 2012, he works as an European program manager, contributing to the management of CEA-Liten’s EU projects portfolio and setting up new business opportunities in the fields of materials, renewable energies, energy efficiency and information & communication technologies. He has authored 10 patents and over 40 publications (H-index=9, August 2015).

Printed Circuits Prototyping Platforms for Flexible Sensor Systems

Fischer, Vincent
Research Engineer
CEA

AbstractThis paper presents the methodologies developed at CEA-LITEN for design of flexible sensor systems. In order to evaluate the potential of printed devices for innovative system and drive technology accordingly to application requirements, 4 prototyping platforms have been set-up focusing efforts all-along the chain of skills.
Focus will be given on the “Design platform for Circuit & System prototyping” enabling evaluation of technology upon flexible sensor systems requirements. For this purpose silicon methodologies have been adapted to provide a Design Kit available in Cadence Virtuoso format. It includes Sensor and N/P-type Organic Transistors compact models for DC and transient mode, as well as standard EDA tools (DRM, LVS, DRC). Characterization of fabricated analog and digital circuits is presented (logic gates, flip-flops, amplifiers, ADC, RFID circuits, multiplexing circuits, active matrix with embedded gate drivers). A focus on the expected functions for sensor interfacing and pertinent segmentation with silicon IC will be discussed. The talk will also illustrate how prototyping at system level drives the specifications on material development. The choice between PMOS and CMOS technology will be discussed regarding application and integration challenges. Simulation on relevant application case will also highlight performance requirements (reproducibility, current, speed, operation voltage). The impact for the choice of semiconductor and dielectric and the solution under study on the R&D platform for “Integration of Advanced materials” will be presented.
Finally the challenges towards industrialization will be discussed with an overview on the tools and methods employed respectively on the “PICTIC printing Pilot line” dedicated to scale-up of printing process at GEN1 and on the “Characterization Platform and Reliability Lab” dedicated to evaluation of device performance, yield and ageing stability in order to support Technology Readiness scale-up (TRL4-7).

BiografieVincent Fischer obtained an MS degree in Electrical Engineering in 2001 and a PhD degree in Electrical Engineering in 2004, both from the Grenoble National Institute of Technology (INPG). He has been working in the field of silicon microelectronics, holding various positions at design houses and EDA supplier companies, before moving to printed and organic electronics since 2010. He is currently working in the Printed Electrical Component Laboratory, focusing on device physics, electrical characterization, compact modeling and design kit production. He is also interested in the field of volatile and non-volatile memories, and more specifically SRAMs. He is co-author of more than 30 papers in international publications and conference proceedings.

AbstractThe Internet of Things (IoT) is the network of physical objects—devices, vehicles, buildings and other items—embedded with electronics, software, sensors, and network connectivity that enables these objects to collect and exchange data. The number of applications in the fields of industrial and environmental monitoring, energy management, building and home automation is growing exponentially. The powering of all these objects is then a major concern, their autonomy is a requirement. The solutions to get these objects autonomous is closely linked to the energy harvesting from the surroundings.
Organic photovoltaic (OPV) is one of this energy harvesting technology from light. This emerging technology offers numerous advantages, beginning with the ability to produce lightweight, flexible and coloured modules with an incomparable ease of processing. This technology with more than 10% efficiency and several years of lifetime is mature enough to be integrated into objects. Moreover, the possibility to use digital techniques (laser patterning, inkjet printing) allows the customization of OPV modules to the desired design for a successful integration. Their good module ratio at low light makes them good candidate for indoor applications.
In the present work, we will present the results we obtained on inverted OPV modules with more than 5% efficiency, their behavior under low light conditions and different indoor light sources (white LED, fluo). We will demonstrate the ability of this technology to give the autonomy of indoor home automation sensors.

BiografieNoëlla Lemaître graduated in chemistry engineering from “Ecole Supérieure de Chimie Organique et Minérale” (Cergy-Pontoise) and received her Ph.D. in physical chemistry of polymer in 2001. During her Ph.D., she worked in ONERA on liquid crystal molecules and polymers for non linear optics. After two post-doctorial positions, she joined in 2003 the “Laboratoire Cellules et Composants” of CEA Saclay, where she worked on organic electroluminescent devices for full color devices or lighting. In 2006, she joined the “Laboratory of Organic Photovoltaic Modules” of INES (Institut National de l’Energie Solaire of CEA Grenoble) and deals with the development of bulk heterojunction organic photovoltaic solar cells.

CEA Tech innovations in the fields of sensors, computing and communication solutions for highly dependable and secured system.

COLLETTE, THIERRY
VP DIVISION
CEA

AbstractContributing to the Automotive industry goal for autonomous vehicles, CEA Tech is accelerating its innovations in the fields of sensors, computing and communication solutions for highly dependable and secured system.

BiografieThierry Collette is VP division of CEA Leti, wellknown research technology organisation in France. This division (DACLE) is in charge of design of integrated components and embedded systems, represents 300 people and is a joint division between Leti and List. Previously he was deputy director of CEA LIST, the academic French laboratory of technology research on smart systems. He has obtained an Electrical Engineering Degree in 1988 and a Ph.D in Microelectronics of the University of Grenoble in 1992. He wrote, as author and co-author, several papers in conferences and journals on technologies for embedded parallel and reconfigurable computing and holds several patents too. He teaches computer architectures in master degree at Ecole Centrale of Paris and University of Paris XI. He is expert CEA senior and had evaluated several international and national projects (MEDEA, ANR, OSEO, etc) and is member of evaluation committee of the French National Research Agency.

AbstractThe lifetime of organic photovoltaic devices is a critical point limiting their marketability. In order to improve it, the devices rely on barrier encapsulation to prevent their oxidation by oxygen and moisture. A common technique is the lamination between two glued gas-barrier films. Water and oxygen ingress occurs as a result of the orthogonal permeation and the lateral permeation. In order to elaborate a suitable protection versus atmosphere, it appears important to be able to assess the complete encapsulation scheme. In this communication, we will describe the tools we have developed to characterize the encapsulation: gas barrier measurements methods allowing a rapid screening of gas barrier properties; and optical calcium test mimicking the real device geometry and allowing to measure the lateral permeation through adhesives and interfaces after lamination.
This overall assessment of the encapsulation scheme helps to choose the material set, the encapsulation process, and the optimal geometry. A straightforward link between encapsulation materials characterization and device lifetime can be made and will be presented.
However, encapsulation cannot account by itself for device lifetime. Further improvements in device lifetime can also be brought by optimization of device architecture. In particular, the interfaces within the device or between glue and device play a major role. We will show the influence of interfaces optimization on device ageing, along with mechanical and opto-electronic characterizations. Peeling tests coupled to physico-chemical characterization of the peeled devices are a powerful method to identify the weakest interfaces within the stack.
As a conclusion, we demonstrate flexible encapsulated organic photovoltaics devices able to reach a T80 of at least 1000 h in damp heat conditions (85°C 85% RH) and after 200 thermal cycles (-40°C +85°C). Outdoor ageing were also tested.

BiografieDr Solenn Berson (F) graduated from CPE Lyon, France (Lyon school of Chemistry, Physics and Electronics) with a master degree in Polymer Materials and Composites in 2004. She got her PhD degree in organic photovoltaic field at the Laboratory of Molecular, Organic and Hybrid Electronics, CEA Grenoble, France. After an industrial postdoctoral fellowship at the LIPHT in Strasbourg, she joined the Organic Photovoltaic group, CEA, INES, Le Bourget du Lac, France in 2008 as a postdoctoral researcher and since 2010 as a project manager for architectures and processes of organic/hybrid photovoltaic devices. Since 2013 she is managing the OPV group and since 2014, she is the Head of the Organic Photovoltaic Modules Laboratory.

BiographyLea Di Cioccio received a degree in engineering physics from the Institut National des Sciences Appliquées, Rennes, France, an M.S. degree in metallurgy and material science from Paris VI University in 1985, and a Ph. D. degree in Material and Semiconductor Physics from the Institut National Polytechnique de Grenoble, France in 1988.
In 1990 she joined the CEA-LETI (Commissariat à l’Energie Atomique et aux Energies Alternatives in the Laboratoire d’Electronique et de Technologies de l’Instrumentation) in Grenoble, where she was first engaged in physical-chemical characterization such as Transmission Electron Microscopy.
In 1992, she joined the silicon carbide team to develop epitaxy, devices
In 2003 she was a research project leader in semiconductor heterostructures and 3D integration using various processes such as epitaxy, wafer bonding and thinning.
Since 2011 she is back to power device technology with a focus on GaN devices.
She is author and co author of more than 160 publications, 6 book chapters and 30 patents, with a h-index of 22.
She is now a director of research at CEA, LETI for microelectronics and power electronics, and advanced substrates.

BiographyLaurent Pain is graduated from the Ecole Nationale Supérieure de Physique de Grenoble in 1992. He received his Ph D after his work on DUV resists study. He joined CEA-LETI in 1996 to work on infra-red technology, and then came back to microelectronics in 1999 working on 193nm and e-beam lithography technologies.
From 2008 to 2014, Laurent Pain leaded the lithography laboratory of the silicon technology division of CEA-LETI. He was also managing in parallel the industrial consortium IMAGINE dedicated to the development of multibeam lithography with MAPPER lithography BV.
Within the LETI Silicon Technology Division, he is now the manager of Patterning Programs including the business development around this activity.

MIRPHAB: A Pilot Line offering fabrication of Mid-IR sensors

Nicoletti, Sergio
MIRPHAB Pilot Line Coordinator
CEA-LETI

AbstractMIRPHAB (MidInfraRed Photonics devices fAbrication for Chemical sensing and spectroscopic applications) is an EC funded project, in a public-private partnership with Photonics21, with the ambitious goal of creating a commercially viable pilot line for the fabrication of Mid-IR sensors that is ready for business by 2020. This result will be achieved by setting up and operating a fabrication platform with open access for fast Mid-IR device prototyping to European industry. The application process for the access of the technology of MIRPHAB, as well as the deadlines for submission (starting 31 December 2016) will be presented.
Spectroscopic sensing in the Mid-IR wavelength band (3 - 12 μm) is a powerful analytical tool. Chemicals exhibit in this wavelength band, so-called “fingerprint region”, intense adsorptions features allowing superior detection capabilities and unambiguous identification. MIRPHAB’s target is to enable the widespread use of laser-based Mid-IR-spectroscopic sensors to strengthen the competitiveness of the European industry in this field.
The aim of the MIRPHAB project is to setup and run a dedicated pilot line based on a Mid-IR photonics platform. This initiative will support the emergence of laser-based spectroscopic chemical sensing in the Mid-IR wavelength band, providing services for device design and fabrication from chip processing on wafer level to packaging and testing. Based on a massive use of IC/MEMS technologies, the pilot line will enable a variety of new key functionalities for next generation chemical sensing and spectroscopy, allowing cost, power consumption and size reduction. Where required, the development of novel process modules exploiting the capability of a mixed Si/III-V technology will bring unexplored capabilities to sensors, enabling a number of applications not addressable with the technologies and components available today.

BiografieSergio Nicoletti (Business Development Manager) is a Senior Sensing & Photonics specialist with extensive background in technology and working since late ‘90s to the development of Smart Sensors/Systems for indoor and outdoor air quality monitoring. Owning more than 20 patents and more than 75 publications in peer reviewed he has contributed to several proposals for EC and national founded programs, now part of the projects portfolio of CEA-LETI activity.

AbstractSince few years, there has been an increasing interest and demand in flexible electronics.
Standard imaging system consists of an optical module and an image sensor. For wide field of view applications, the flat image after being propagated through the optical system is not flat but curved. This problem is called Petzval Field Curvature Aberration. It is generally fixed by additional complex lenses to flatten the image plane. We propose another approach with a hemispherical curved sensor technology. It allows eliminating FCA at the sensor level and thus makes it possible to simplify the optical system.
First, a brief state of the art on curved detectors will be detailed for different application fields.
Then, CEA-LETI curving technologies will be explained to address fixed and tunable curvature packaging applications, included modeling and technical process steps. Characterization of curved sensors prototypes have been performed to understand mechanical and electro-optical bending limits Based on an existing fisheye flat sensor optical design, a curved focal plane can drastically simplify the standard optical system. The benefits of a curved sensor will be summarized into two categories: those related to the optical system and those related to the image quality.
Optical system:
» Miniaturization of optical devices;
» Lenses alignment process simplification;
» Suppression of aspheric lenses;
» Wide field of view enhancement.
Image quality:
» More homogeneous image quality (reduced noise);
» Improved resolution and higher sensitivity;
» Corrected distortion occurring along the image edges.
Finally, curved CMOS image sensor roadmaps and perspectives will be discussed: from a market point of view, application field surveys have been done on mass market applications (mobile, consumer…), photography, automotive… From a technical aspect, a curving technologies roadmap will be proposed, leaded by applications needs, on single chip, collective, and wafer level processes.

BiografieBertrand CHAMBION, 29 years old, research engineer at Univ. Grenoble Alpes, CEA-LETI, MINATEC campus. He received the Ph.D. degrees from the “Université de Bordeaux” in 2014. He carries out his research activities in the packaging and assembly team (LPA laboratory) of CEA-LETI. He specifically works on imaging system packaging based on curved or flexible image sensors, and is in charge of innovative packaging for high power pixelated devices. He holds 2 publications in international journals, 5 communications in conferences and 7 patents.

BiographyBruno MoureyGraduate from Ecole Supérieure de Physique et Chimie (Paris) and PhD in Electronic and Instrumentation (Université de Paris VI).
Bruno Mourey had different positions in relation with display applications from research to manufacturing in the Thomson group. He was Managing Director of Thomson LCDs for more than 10 years.
He joined CEA-Leti in 2003 as Program manager for multimedia applications (display, optical recording….)
In 2006 He was in charge of the start of a 200mm technological platform for Microsystems applications
From 2009 to 2014 He was Vice president, managing Mems division followed by Photonics division
Since 2015 he is CTO of CEA-Leti

Comparison of electrothermal constraints on semiconductor power modules in photovoltaic DC/AC inverters

AbstractThe semiconductor power modules using Silicon carbide SiC are used more often regarding their high switching speed, and in the case of a photovoltaic system, this will mean a more compact system and a cheaper one. The DC/AC inverter is the first component to fail, and only few studies exist on the reliability of this inverter, especially for the one using MOSFETs SiC power modules.
The junction temperature of the transistors and its variations with time accelerate the ageing of these modules.
This paper presents a comparative study between Si IGBTs, Si IGBTs with an anti-parallel SiC Schottky diode (hybrid IGBTs) and SiC MOSFETs with respect to the variations of the junction temperature of the semiconductor, in the case of a photovoltaic DC/AC inverter, and using a suitable heat sinker for each power module.
The estimation of these variations were done using the current measurements data issued from multiple photovoltaic power stations during several years.
Those measurements are used as an input for power losses estimation model coded with Matlab, then the resulting power losses are used to estimate the corresponding junction temperature using another Matlab model serving to estimate this temperature.
Rainflow counting algorithm and other methods are used to compare the variations of the junction temperature in the 3 cases, and to estimate the lifetime of these 3 power modules.
Results showed that the electrothermal coupling of the on-state resistor RdsON in the case of the MOSFET SiC has a positive effect on its lifetime in some conditions, and the same effect has the use of the anti-parallel Schottky diode in the case of the hybrid IGBT module.

600V MISHEMT recessed gate technology at CEA, LETI

Escoffier, René
reserchear
CEA, LETI

AbstractWide bandgap materials have demonstrated a great potential in high-power electronics due to their high device breakdown voltage and high current density, which are two key parameters industrial motors and electrical vehicles. Recent improvements in the growth of wide bandgap semiconductor materials provide the opportunity now to design and fabricate transistors that demonstrate performance in terms of low on-resistance and capability to work at high temperature.
We have implemented a 600V enhancement mode AlGaN/GaN high mobility transistor with a fully CMOS compatible technology using a silicon substrate.
To guarantee the safety of systems in off-mode a U shape recessed gate was employed to cut the 2DEG. The GaN-based recessed MIS-gate structure in conjunction with a P doped GaN layer located under the gate allows to achieve positive threshold voltage. The low on-state resistance is maintained by the 2-D electron gas remaining in the channel (and low access resistances) except for the recessed MIS-gate region. The desired device breakdown voltage was achieved with the addition of several gate, source and drain field plates.
This 600V transistor exhibits a threshold voltage close to 1V and specific resistance lower than 6 mohm.cm².
The main advantage of wide band gap devices is that they can be operated at temperatures above 150°C. If we consider that interest of wide band gap devices like GaN/Si HEMT is the low Ron resistance, they should be the best candidates for power applications.
We used room-temperature 2DEG density ns to extract the electron mobility. The reduction in µch with decreasing value of ns was usually explained by polar-optical-phonon scattering, ionized impurities and trapped charges in or close to the 2DEG. We have measured the electrical characteristics of Leti’s Hemt in temperature up to 175°C. In addition to static measurements, we will present and discuss dynamic Ron behavior of this device in temperature.

BiografieRene ESCOFFIER, engineer of research entered the CEA-LETI in 2010 in the wide bandgap component technology laboratory. He worked in the modelling of components from 1992 till 1998 then joined the Motorola Company until 2004 to design structures for the safety of integrated circuits. He specialized himself for the Freescale company (2004-2010), in the design and the test of power components from the chip to its integration into module. He is now a project leader of power module optimizations in terms of cost and electric efficiency and their use in battery-driven vehicles.

Strategy to address key MEMS challenges

Polizzi, Jean-Philippe
Microsystems Program Manager
CEA Leti

AbstractWith the huge deployment of MEMS sensors in consumer products, this industry has experienced exponential growth in the last decade, but is now facing commoditization of its products. That means market saturation and shrinking margins.
To overcome the "commodization paradox", Yole has identified 3 key factors: innovation, technology platforms and added value through software.
This presentation will show how Leti with its 30 years’ experience in the field of MEMS is helping addressing these issues to continue supporting its industrial partners in this highly competitive environment.

BiografieJean-Philippe Polizzi holds an engineering degree from French Ecole Nationale Supérieure des Arts et Métiers and a master degree from Clemson University, USA, where he studied fabrication and modeling of micromachined silicon beam components in the frame of his thesis. He has been involved for more than 20 years in the field of microsystem based products developments in different companies. At SAGEM, he participated to micromachined pressure sensors and accelerometers development for the automotive market. He joined Auxitrol in 1997 as the pressure sensor group manager, where he developed a variety of MEMS based aerospace sensors for clients such as Airbus or Boeing. From 2002 to 2004, he was the head of the MEMS group in Thales corporate research centre, where he worked on RF switches and piezo-electric sensors and actuators. He is currently in charge of strategy and business development for the MEMS sensors and actuator activity at CEA Leti.

MEMS sensors for cells, and exosomes characterization, a new paradigm for cancer diagnosis

Agache, Vincent
Researcher
CEA/LETI

AbstractCancers figure among the leading causes of mortality worldwide, with approximately 8.2M cancer related deaths in 2012. The Circulating Tumor Cells (CTCs) and exosomes are among the circulating biomarkers accessible from bodily fluids that could be used for early diagnosis of cancer. Today, existing techniques either suffer from lack of specificity or resolution to detect these objects in body fluid while preserving their integrity.
In this talk, I will illustrate the developments undertaken at LETI for the implementation of MEMS sensors compatible with measurement in fluid medium, and allowing the mechanical flow-through sensing of these objects individually. The concept is based on SMRs (Suspended Microchannel Resonators) enabling individual counting and weighing of particles in a fluid , without any labeling. The SMR, pioneered by Scott Manalis at MIT, consists of a micromechanical resonator with a buried channel so that the fluid circulates inside the device while the resonator is oscillating in a dry surrounding medium. With this configuration, the mass of individual particles can be measured by continuously monitoring the SMR frequency fluctuations as a particle flows through the channel. This measurement is not destructive so that the particle can be routed to other measurement methods and complete the information on their nature.
Different incarnations of SMRs will be exposed in this talk, including plate and cantilever types (jointly developed with the Manalis Lab at MIT), as well as examples of application to illustrate their potential for point of care applications: characterization of cells, and exosomes.

BiografieDr Vincent Agache is a senior R&D engineer with experience in the sensors and MEMS/NEMS for Microfluidics, Biology, environmental and Healthcare applications. He received his M.Sc. degree in EE from ISEN at Lille (France) in 2000, and a Ph.D. degree in electrical engineering from the Université des Sciences et Technologies de Lille, France, in 2003. In 2016, he received the "Habilitation à Diriger les Recherches" in Physics from University of Grenoble Alpes. From 2003 to 2006, he was appointed as a Japan Society for Promotion of Science post-doctoral Fellow at the University of Tokyo. In 2006, he joined the CEA-LETI, where he is currently in charge of MEMS/NEMS sensors development for life sciences and environmental applications. He has authored and co-authored more than 50 peer-reviewed publications in international journals and conference proceedings, and is an inventor on 8 issued patents.

BiographyDr. Wilfried Lerch (m) holds a Diploma and a PhD in physics both from Westfälische Wilhelms-University Münster. After working on the basic diffusion mechanism during rapid thermal annealing he joined ast electronic GmbH in 1994 which later became Mattson Thermal Products GmbH. Until 2008 he was responsible for process technology at customer sites but also for the advanced, next generation technology and equipment development of lamp-based systems (RTP and Flash). Since 2009 he joined centrotherm photovoltaics AG and is responsible for R&D and technology of all front-end and back-end semiconductor products (furnaces, lamp-based and low-temperature microwave based equipment as well as soldering tools).

Integration of Nano imprint R2R into the production processes for printed electronic products

Kolbusch, Thomas
Vice President
Coatema Coating Machinery GmbH

AbstractIntegration of Nano imprint R2R into the production processes for printed electronic products
Full abstract will be submited shortly.

BiografieCurriculum Vitae
Thomas Kolbusch, Coatema Coating Machinery GmbH
Thomas Kolbusch is Vice President of Coatema Coating Machinery GmbH, an equipment manufacturing company for coating and printing solutions located in Dormagen, Germany. Since 1999 he is working for Coatema Coating Machinery GmbH in different positions. His responsibilities are marketing, sales and business development.
He is member of the board of directors of the OE-A (Organic Electronics Association). In the OE-A he leads a working group which is dedicated to “Up-scaling Production – from Lab to Fab” and is chairman of the Lopec exhibition which is world largest event on printed electronics.
He is member of the board of directors of COPT.NRW which is a local association in Germany on printed electronics.
Since March 2014 he is also in the board of directors of Printocent, an association of VTT Finland, where 35 partners are working on topics in printed electronics.
He is chair of the advisory board of the OPE journal and organizes the Coatema Coating Symposium, an international coating and printing seminar which takes place in Dormagen since 13 years. He has spoken on over 200 conferences worldwide.
He was a member of several European and German funded projects like Diginova, Facess and Flexlas.
Thomas studied Business Economics at the Niederrhein University of Applied Sciences and got his degree as business economist in 1997. He worked for 3M, Germany and the alpi GmbH in Germany, before starting at Coatema GmbH.

Neural Networks for Industry 4.0 : Analytics at the edge of the network

LAMBINET, Philippe
CEO
Cogito Instruments SA

AbstractToday’s most publicized applications of Neural Networks are handled in the Cloud, using software accelerated on extremely powerful CPU+GPU combinations.
At the same time, less visible deployments are happening in embedded applications where pure hardware neural networks implementations demonstrate superior performance/power ratios, especially for machine vision.
Cogito Instruments has decided to focus on such embedded applications for the industrial markets, bringing intelligence to a wide range of machines.
Embedded intelligence is not about connectivity, it is about being able to interpret sensor data and make decisions locally thanks to efficient recognition of memorized patterns.
Cogito products benefit from the National Instruments LabVIEW environment to capture and format data and leverage General Vision’s NeuroMem technology to learn and analyse this data. This is particularly true for Machine Vision which is the most challenging analytics application.
The presentation will cover a few application example and outline the benefit of this approach vs alternative technologies. It will also list the key characteristics of efficient machine learning and pattern recognition and will compare the different possible implementations.

BiografiePhilippe LAMBINET is a former Executive Vice President at STMicroelectronics where he was the company's Chief Strategy Officer as well as the General Manager of the Digital Sector. Prior to ST, he was CEO of Advanced Digital Broadcast, a leader in Digital Television interactive platforms. After leaving ST, Philippe has been helping entrepreneurs create and develop technology companies and has himself created startups. His latest endeavour is Cogito Instruments which brings advanced neural network computing capability to Smart Machines for IoT and Industry 4.0 applications.

Democratization of optical spectroscopy for material analysis

Goldring, Damian
CTO
Consumer Physics Inc.

AbstractOptical spectroscopy is a widely used tool for material analysis. Starting from food to pharmaceuticals, plastics, oil and many more can be analyzed by optical spectrometers providing people with valuable information. Traditionally, optical spectrometers were bulky and expensive, used mainly in laboratories by professionals. In the last years, gradually, we are witnessing a process of democratization of optical spectroscopy. Leveraging low cost hardware, advanced algorithms and highly available software infrastructure, optical spectrometers are now becoming a widely spread in the “field” opening many new opportunities for existing and new users of optical spectroscopy.
In this talk we shall review some aspects and implication of this democratization process. Particularly, novel enabling technologies (spectrometers) and potential applications.

BiografieDamian Goldring is co-founder, CTO and VP of R&D at Consumer Physics (CP) since its inception. Prior to starting CP at 2011, Damian served for six years as project manager in the Israeli air force running several multi-disciplinary projects. Damian also served as director of project management in Tessera Inc, bringing new optics and signal processing products to cell phone cameras.
Damian holds a BSC in EE from the Technion institute in Israel (1997) and MSC & PhD degrees in EE from Tel-Aviv university (2004, 2009). Damian is the author of more than 20 peer-reviewed papers and patents in the field of optics.

Hard Materials Deep Etching: Novel Solutions For MEMS

UVAROV, Andrei
R&D Manager
CORIAL

AbstractIntroduction of new materials – glass, quartz, sapphire – for MEMS and micromachining applications demands development of novel technologies for their processing.
One of the bottlenecks becomes creation of deep structures with high aspect ratio using conventional DRIE approaches.
This presentation will outline CORIAL latest hardware and process advancements regarding ICP-DRIE of hard materials, as well as will demonstrate capabilities of PECVD systems to deposit thick (up to 100 µm) SiN films that are considered to be promising candidates as masks for DRIE.

BiografieAndrei Uvarov is an R&D manager at CORIAL, France. His responsibility covers development of both hardware and process.
Andrei Uvarov joined the CORIAL team in 2015. Previously, he worked in the field of plasma based processes and hardware development in Russia and Japan. Andrei holds a PhD in CVD of PTFE films from Saint-Petersburg State Polytechnical University.

SMART STEEL - PRINTED ELECTRONIC DEVICES ON METAL

Guaino, Philippe
Specialist - Senior project Leader
CRM group - AC&CS

AbstractFlexible electronic become an integrate part of the internet of Things (IoT), by making smart system displays, sensors and active functional surfaces. Most of these printed devices are currently integrated on plastic foils, papers, and more recently on thin glass “foils”. Nevertheless, metallic foil appears to be a promising alternative for several raisons. First, metal can overcome important arising technological difficulties due to the shortcomings durability, moisture barrier properties (particularly for organic material) and heat dissipation. Moreover, metal will allow very original smart applications in Building, Appliance and Automotive. It makes possible a future generation of printed and low cost electronic devices in the metallurgy world.
CRM group (previoulsy ArcelorMittal Research Laboratory) has developed a new advanced steel substrate dedicated to organic and more generally to flexible or conformable electronic devices. Metal will be flexible, rigid, or even formable devices. It will have very good oxygen and water barrier properties if properly used. It is an electrical and thermal conductor, which can greatly improve the lifetime of the device thanks to heat dissipation. Indeed, such substrates can be very helpful for integrated system in “extreme” environment (pressure, temperature conditions and so on). Moreover, smart steel systems can be manufactured in a roll to roll process, which is the key of a low cost, competitive process and compatible with flexible electronic manufacturing.
During this presentation, smartsteel (/metal) applications will be outlined, dedicated to large area device integration. Special focus will be addressed on steel surface treatment to reach exigent physical properties (roughness, planarization, dielectric and conductive materials…) and low cost manufacturing process. At last, example of smart steel products will be presented, based on “printed circuit board “ and interconnected Back/Front side metal foils devices.

BiografiePhilippe Guaino studied solid-state physics at the Faculty of “Sciences and Techniques” at Saint-Jérôme University, Marseille. In 2001, he obtained his PhD thesis. From 2001 to 2006, he was a post-doc researcher in surface science at ‘National Center for Sensor Research’ in Dublin, Ireland, and other micro- and nano-electronic institutes , in France. Since 2006, he has obtained a permanent position at ArcelorMittal research center, now CRM group, in Belgium. He is responsible of the smart coating activities and printing electronic processes on steel

Event-Driven Sensing and Processing for Vision

Linares-Barranco, Bernabe
Reseacher
CSIC

AbstractEvent-driven sensors are a new disruptive way of sensing visual scenes much in the same way biology does:
biological eyes do not take sequences of snapshots, but each "pixel" in the retina sends a nervous spike to the cortex
whenever there is meaningful information found by this pixel (motion, change of light, ...). In event-driven sensors, each
pixel sends its address (x-y coordinate, or a pixel ID) whenever it computes something meaningful, generally a given change
in relative light. Each pixel sends out its event with sub-micro-second resolution. This way, when something meaningful
is happening (represented by a few hundreds of events), the information is out of the sensor within some micro-second delay,
ready to be post-processed by related event-driven hardware. This way, it is possible to build event-driven coordinated sensing and processing systems capable of performing sensing-and-recognition with overall millisecond (or fractions of ms) latencies.
Unfortunately, these new sensors have their own drawbacks, such as larger pixel sizes and consequently lower resolutions.
In this talk we present a summary of event-driven vision sensor working principles with prototype examples, together with post-processing capabilities for recognition tasks.

BiografieBernabé Linares-Barranco received the B. S. degree in electronic physics in June 1986 and the M. S. degree in microelectronics in September 1987, both from the University of Seville , Sevilla , Spain . From September 1988 until August 1991 he was a Graduate Student at the Dept. of Electrical Engineering of Texas A&M University. He received a first Ph.D. degree in high-frequency OTA-C oscillator design in June 1990 from the University of Seville, Spain, and a second Ph.D deegree in analog neural network design in December 1991 from Texas A&M University , College-Station, USA.
Since June 1991, he has been a Tenured Scientist at the National Microelectronics Center , (IMSE-CNM-CSIC ) Sevilla , Spain . From September 1996 to August 1997, he was on sabbatical stay at the Department of Electrical and Computer Engineering of the Johns Hopkins University . During Spring 2002 he was Visiting Associate Professor at the Electrical Engineering Department of Texas A&M University , College-Station, USA. In January 2003 he was promoted to Tenured Researcher, and in January 2004 to Full Professor.
He has been involved with circuit design for telecommunication circuits, VLSI emulators of biological neurons, VLSI neural based pattern recognition systems, hearing aids, precision circuit design for instrumentation equipment, bio-inspired VLSI vision processing systems, and VLSI transistor mismatch parameters characterization.
Dr. Linares-Barranco was corecipient of the 1997 IEEE Transactions on VLSI Systems Best Paper Award for the paper "A Real-Time Clustering Microchip Neural Engine", and of the 2000 IEEE Transactions on Circuits and Systems Darlington Award for the paper "A General Translinear Principle for Subthreshold MOS Transistors". He organized the 1995 Nips Post-Conference Workshop "Neural Hardware Engineering ". From July 1997 until June 1999 he has been Associate Editor of the IEEE Transactions on Circuits and Systems Part II , and from January 1998 until December 2009 he was also Associate Editor for IEEE Transactions on Neural Networks . Since April 2010 he is Associate Editor for the new journal "Frontiers in Neuromorphic Engineering", as part of the open access "Frontiers in Neuroscience" journal series (http://www.frontiersin.org/).
He is co-author of the book "Adaptive Resonance Theory Microchips ". He was Chief Guest Editor of the IEEE Transactions on Neural Networks Special Issue on 'Hardware Neural Networks Implementations '. He is an IEEE Fellow since January 2010, and co-founder of Chronocam Ltd (www.chronocam.com).

AbstractAn important aspect of the environmental impact of semiconductor manufacturing, and especially of photovoltaic solar cell manufacturing, are global warming related emissions. These consist of gases directly emitted from the production process and CO2-equivalent energy consumption. Commonly used gases for dry etching, such as SF6 or NF3, have a high global warming potential and require abatement technology. This itself consumes energy and produces waste water that again needs to be treated. For specific processes elemental fluorine has been suggested as an environmentally friendly alternative because of its zero global warming potential. We investigated the feasibility and energy saving potential of wet scrubbers for the treatment of F2-containing waste gases.

BiografieDr. Andreas Frenzel
Innovation Manager, Business Unit Gas Treatment
Since October 1999 Dr Andreas Frenzel has been employed by DAS Environmental Expert in a variety of positions including Director of Product Development. He is now holding the position of Innovation Manager evaluating future market developments. Alongside his professional commitment, he graduated as Master of Business Administration at the Donau-University Krems/Austria In 2011.
Previously he worked as a Postdoc at the Université des Sciences et Technologies de Lille/France and the National Institute of Resources and Environment in Tsukuba/Japan.
He completed his Doctorate in Natural Sciences in 1997 at the University of Hannover and a diploma degree in Physics at the University of Heidelberg in 1993.

Silicones: a key material to support innovation in the Semiconductor Packaging industry

AbstractThe constant search for a smaller package form factor, higher integration (2.5D and 3D) and higher device density raises some questions about the impact on the reliability due to generation of thermal stress and mechanical stress on the device. This paper presents some of the innovations developed by Dow Corning in order to meet some of today’s semiconductor packaging industry challenges. A variety of products, targeting the different phases of the assembly process are being developed: die-attach adhesives, lid-seal adhesives and thermally conductive interface materials.
The intrinsic properties of silicones bring key benefits for the reliability of microelectronic devices: high thermal resistance over the operating temperature range and very low modulus to release the stress induced during the process steps or the operation of the device in the field.
The presentation will detail the reliability results achieved on last generation die-attach adhesives with very thin bond line thickness; thermal interface materials with a high thermal conductivity (4.3W/mK) and low thermal impedance (6mm²°C/W); and a lid-seal adhesive developing adhesion on a broad variety of substrates (metals, plastics, cured silicones and others) and curing quickly at low temperature (15 minutes at 100°C).
Smaller form factors, higher device density and vertical integration of devices are technology trends which are all pointing in the same direction: the need of a stress release material will become more and more a requirement to meet the reliability standards and silicones are probably one of the best candidates to meet these challenges.

BiografiePrimary ResponsibilitiesDr. Thomas Seldrum is a member of the Application Engineering group in the Electronics Solutions division at Dow Corning. Based at the company’s European headquarter in Seneffe, Belgium, he is responsible for the technical support of European customers using Dow Corning’s Compound Semiconductor Solutions (SiC substrates) and Silicone Solutions.
Experience and ExpertiseThomas joined Dow Corning in 2011 as an application engineer, bringing the technical expertise needed to initially develop the silicon carbide business in Europe. Over the next years, his field of responsibilities has been extended to microelectronics and power electronics applications where silicones are used as protective and assembly materials. He is providing technical support to implement disruptive technologies developed by Dow Corning. More recently he extended his responsibilities further and joined the Automotive Electronics team to develop and implement innovative technologies in the design of next generation electronics modules.
Thomas’ ability to understand customer needs and drive new technology to market will help Dow Corning to support the electronics industry in addressing the challenges created by world’s major societal trends.
EducationThomas holds a Master degree and PhD in Physics and a Master degree in Economics from the University of Namur, Belgium.

Polyester Films for the Next Generation of Flexible Electronics

MacDonald, Bill
Business Research Associate
DuPont Teijin Films

AbstractRecent Flexible Electronics advances have required material suppliers to deliver improved functionality to the device developers in broad applications such as electrophoretic displays, TFT backplanes, barrier films, photovoltaics, medical diagnostics, and sensors. The next generation of flexible electronics may require a different set of material specifications to enable flexible hybrid systems, foldable displays, and wearable devices.
DuPont Teijin Films has supported this industry from the start with commercially available polyester film solutions that are both innovative and cost effective. These bi-axially oriented, semi-crystalline films provide the end users a unique combination of high stiffness, dimensional stability, optical transparency, solvent resistance, and low cost as compared to several other polymer film types. Demands on polyester film suppliers now typically include: smooth surfaces with low surface defects, low haze, near zero thermal shrinkage, low iridescence, UV stability, and the ability to tailor the surface chemistry to meet the end user’s requirements.
This presentation will include an update on the latest clear, hazy, and white PET (polyethylene terephthalate) and PEN (polyethylene naphthalate) polyester film developments, while discussing the likely requirements and issues associated with meeting the film requirements for emerging applications. Past, present, and future PET / PEN polyester films can provide a balance of cost, processing temperature, and performance that enable cost effective solutions to the OEMs.

BiografieBill MacDonald graduated B.Sc and Ph.D in chemistry from the University of St Andrew. He is a Business Research Associate in DuPont Teijin Films (DTF), a 50:50 joint venture between DuPont and Teijin. He is currently actively involved in developing substrates for flexible electronic and PV applications and in understanding the material requirements required for these emerging industries. He has coauthored over 40 papers, several book chapters and regularly presents on the flexible electronic and PV conference “circuit”. He is a Visiting Professor in the Department of Pure and Applied Chemistry, University of Strathclyde.

Why image quality KPIs are a must for digital camera tuning

Touchard, Nicolas
VP Marketing
DxO Labs

AbstractOptimizing camera image quality (IQ) requires first, finding the best trade-off between lens, sensor and image signal processing (ISP) performances; and then tuning the ISP in consideration all possible use cases of the camera for its market.
In the past few years, the complexity of ISP has been increasing exponentially, leading to a situation where tuning is extremely challenging and can literally take months to reach image quality targets.
To ensure that their ISPs can handle as many sensor and camera applications as possible, chip vendors deliver their image processing pipeline with a huge set of parameters that need to be set according to best trade-offs. The usual approach to reaching best results requires following a lengthy heuristic path, with lots of trials and errors on the way forward. Digital camera makers find themselves facing this tuning challenge while under pressure to continuously reduce time-to-market.
In light of this problem, we have developed a sophisticated camera image quality scoring system. This system comprises a well-defined set of objective and perceptual measurement protocols, to help camera designers optimize the tuning process for achieving best image quality, given sensor and lens limitations.
The paper describes the challenges that camera designers face when tuning. We will then explain how we designed the image quality scoring system, give details about the methodology, and then show the kinds of results that people can achieve, based on real world examples of camera modules available on the market whose architecture incorporates the most powerful image processing chipset for the considered application.
This talk is aimed at camera design teams who want to understand the optimum path forward in achieving their image quality goals by using the most up-to-date tools available. Product planners and R&D managers will also find it useful for understanding the implications of make-or-buy decisions when planning new camera products.

BiografieNicolas Touchard is Vice President of Marketing, Image Quality Evaluation at DxO. Nicolas has been with DxO since 2005, leading and contributing to strategic and operational marketing activities across all business lines of the company. Prior to joining DxO, Nicolas spent 15+ years at Kodak managing international R&D and innovation teams, where he initiated and headed the company's worldwide mobile imaging R&D program. He and his team pioneered the mobile imaging field starting in the late 90's, developing technologies for the deployment of new imaging services over mobile phones and networks. He is a graduate of the Institute of Optics in Paris.

AbstractThis article will address the application of advanced Wafer Level CSP process technology applied on CMOS Image Sensors for demanding industrial applications. Full assessment of the WLCSP solution will be presented including : Electro-Optical results, Reliability, Supply Chain, as well as comparison with other standard packaging solution. New challenges linked to the introduction in industrial market will be emphasised, as well as the evolution in market applications.

BiografieJérôme Vanrumbeke, e2v Semiconductors, France, Professional Imaging Sensors Project Manager
Biography – Jérôme has over 15 years of experience in the packaging & assembly of imaging sensors. He started his career working for the Atmel group before joining the e2v Professional Imaging Division at Grenoble France. Jérôme graduated with a Masters Degree in Microelectronic in 2001 at EUDIL / Polytech’Lille France.

Technology Advances and New Applications for Flexible Electrophoretic Displays

McCreary, Michael
Chief Technology Officer
E Ink Corporation

AbstractFlexible electrophoretic displays (EPD) are now being implemented for a broad variety of new applications beyond the already prevalent electronic reader markets. The characteristics of these latest generations of displays will be described and how characteristics such as low power, bistability, daylight readability, light weight, and bendability characteristics are enabling specific new product applications such as fitness tracker wearables, secondary displays on mobile phones, signage, active furniture, and architecture. Very recent advances in large area flex displays, bright color, and module systems using printed antennas, photovoltaics, and wireless communication of “pixels” will be described along with the opportunity to further integrate printed electronics, thin silicon chips, and alternate thin power sources with these flexible, plastic displays.

BiografieMichael McCreary is the Chief Technology Officer of E Ink Corporation where he leads a team of scientists in the creation of advanced reflective electronic displays. This innovation has helped enable broad acceptance of daylight readable electronic readers today and is also now being used for fitness wearables, electronic shelf labels, and signage. Dr. McCreary received his Ph.D. in Physical Organic Chemistry from the Massachusetts Institute of Technology, a B.S. in Chemistry from Principia College, and additional training in solid-state physics and electronics at the Rochester Institute of Technology. Prior to joining E Ink in 2000, he was the general manager of the Microelectronics Technology Division at Eastman Kodak that developed high performance solid state image sensors for astronomy, space, industrial inspection and other applications. Dr. McCreary serves on the Advisory Board of FlexTech Alliance, an industry consortium related to the development and application of flexible electronics.

Managing Condensable Gases

O'Rourke, Chris
Applications Manager
Edwards

AbstractThe range of CVD process precursor materials and associated reaction by-products vulnerable to condensation in dry pump foreline and exhaust systems is expanding. To some extent, the tendency for materials to condense in pipes can be reduced by diluting the exhaust with inert gas, as is done to control flammability. If, however, dilution rates are reduced to lower cost and improve abatement efficiency, an alternative strategy is needed to control condensation of liquids and solids in the process exhaust stream. Clearly, the major perceived risk associated with condensation is blockage of the exhaust pipe and a consequent process interruption caused by excessive dry-pump exhaust pressure or breach of seal integrity due to high pipe internal pressure. However, there are also other serious hazards that may result from condensed materials in exhaust pipes. To counter the condensation threat and improve system safety and productivity, thermal management systems control operating temperatures of forelines and exhaust pipes. Typically, these systems comprise electrical heater mats in close contact with the process pipe wall, enclosed by high-efficiency thermal insulation material. However, these systems are really only fully effective if they are carefully installed on the pipes to avoid cold spots, and their operation controlled in real time to ensure correct pipe operating temperature at all times. Temperature management is critical to prevent condensation of process materials and byproducts in vacuumm pump forlines and exhaust lines. The new thermal management systems address many of the shortcomings of previous generations to reduce equipment downtime and health and safety risks to operating and service personnel. The systems also provide increased functionality with programmable remote controllers that interface readily to fab control software, and better energy efficiency.

BiografieChris O'Rourke has worked in the semiconductor industry for over 20 years in various technical service and project management roles.
Previously working for Rolls Royce and Wood group in Instrument control, he currently works as Applications Manager for thermal management systems at Edwards Vacuum.

N2O: Global Warming or Acid Rain?

AbstractNitrous oxide has many uses in the manufacture of semiconductor chips. However, it is also one of the gases that are responsible for climate change. Simple combustion of this gas is possible, but readily results in the formation of mono-nitrogen oxides (NOx) which are harmful to humans and contribute to acid rain. These issues will be discussed, together with abatement solutions that avoid excessive NOx creation by careful tailoring of the combustion chemistry.

BiografieMike Czerniak: Environmental Solutions Business development Manager
Starting his professional career with Philips, initially in their UK R+D labs & subsequently in the fab in Nijmegen, Holland, Mike has worked in the semiconductor business since gaining his PhD in 1982. He had subsequent marketing roles at UK-based OEMs Cambridge Instruments, VSW and VG Semicon before joining Edwards 19 years ago. He has held various technical and marketing roles before starting his current role 2 years ago.

Deep submicron CMOS for novel types of smart image sensors

AbstractOver the past six decades, semiconductor technology has progressed at a relentless pace: Minimum feature size was being reduced by a factor of two about every four years. During the past 10 years it has become more difficult to keep up this unremitting progress, and a large variety of novel materials had to be introduced into advanced semiconductor processes. This is a superb opportunity for sensing applications because many novel sensor modalities have become possible in deep submicron CMOS processes: Silicon-based photodetectors with extended sensitivity in the mid-infrared, the far infrared and even the THz spectral range were demonstrated, either by new co-doping approaches or by exploiting nanometer-scale charge confinement effects. Unusual mechanical properties of newly employed materials can be exploited for acoustic transducers and on-chip high-Q resonators. Uncommon thermal properties can be used for new kinds of low-cost CMOS-compatible thermal infrared image sensors.
The rich variety of materials required for today’s deep submicron CMOS processes is a treasure trove for the developers of novel types of smart image sensors, combining sensing transducer, analog and digital signal processing on the same chip and even in each pixel of an image sensor.

BiografiePeter Seitz received his M.Sc. degree in experimental physics and his Ph.D. in biomedical engineering both from ETH. From 1984 to 1987 he was a staff member of the RCA Research Laboratories in Princeton, New Jersey (David Sarnoff Research Center) and in Zurich, Switzerland, performing applied research in optics and image processing. In 1987 he joined the Paul Scherrer Institute (PSI), where he created and led the Image Sensing research group. From 1997 to 2012 he worked for CSEM, the Swiss Center for Electronics and Microtechnology, first as a group leader and then as Vice President Photonics, heading CSEM’s photonics division. From 2006 to 2011, he was CSEM’s Vice President Nanomedicine.
Since 2012 Peter Seitz has been concurrently head of the Hamamatsu Photonics Innovation Center Europe, adjunct professor of optoelectronics at EPFL, and innovation sherpa at the Innovation and Entrepreneurship Lab (ieLab) of ETH Zurich.
Peter Seitz has authored and co-authored about 200 publications in the fields of applied optics, semiconductor image sensing, machine vision, optical metrology and in the MedTech domain. He holds 50 patents, and he has won more than 20 national and international awards together with his teams, of which the most prestigious is the IST Grand Prize 2004 of the European Commission. He is a Fellow of the European Optical Society EOS, member of the Swiss Academy of Engineering Sciences SATW, and he is a member of the Executive Board of the ETP Photonics21, chairing the workgroup on sensors, metrology and security.

BiographyCarlos Lee is director general at EPIC, Europe’s photonics industry association. As part of the EPIC mission, Carlos works closely with industrial photonic companies to ensure a vibrant and competitive ecosystem by maintaining a strong network and acting as a catalyst and facilitator for technological and commercial advancement. He brings with him a strong background in microelectronics which was acquired through several management positions held at the international association SEMI. He has been responsible in Europe for the SEMI International Standards program, managed technical and executive programs, and together with the advisory board advocated for a more competitive semiconductor and photovoltaic manufacturing industry.

System simulation – The answer to ADAS requirements for holistic simulations of heterogeneous systems

Kehrer, Christian
Head of Sales DACH
ESI ITI GmbH

AbstractThroughout the last couple of years, “autonomous driving” has grown from a buzzword describing a far future to the next big thing in today’s automotive world. In the wake of this evolution, the main challenges are shifting accordingly: What is the best way to combine two worlds that have been separated so far, at least to a certain extent, with sensors and corresponding electronics on the one hand and “classical” physical components on the other? The separation of these two worlds is mainly based on their specific development processes and the tools used within these processes.
Sensors are often developed with proprietary software tools that have their own language and no standardized interfaces. The development of mechanical or hydraulic components on the other hand is still based on physical prototypes most of the time, although frontloading (i.e. virtualization and simulation) becomes more and more relevant.
To meet the requirements of next-generation autonomous driver assistance systems (ADAS), simulations need to incorporate all of these aspects as sensors and mechatronic components with all their interdependencies play a crucial role. Such a scenario calls for tool-independent standards for both the modeling approach to the entire system and the exchange of functional models between different tools.
In our presentation, we will give an overview of the latest developments with system simulation in the automotive industry. Based on that, we will outline the next necessary steps, from the development of new model elements to the utilization of standardized interfaces for the co-simulation of different tools, in order to meet the requirements for the efficient development of ADAS.

BiografieChristian Kehrer, born in 1981, has been responsible for accounts in the German speaking regions as Head of Sales DACH at ESI ITI GmbH since 2014. He finished his studies of Mechanical Engineering at the Dresden University of Technology specializing in automotive engineering. From 2006 to 2009, Christian Kehrer worked for TESIS DYNAware GmbH at the BMW Group in Munich as a simulation engineer in charge of overall vehicle energy efficiency and customer behavior. Afterwards, he started his career at ITI GmbH in Dresden, Germany, as Key Account Manager for the automotive sector exploring and developing business opportunities also for new applications.

PRE-PROCESSING OF IMAGER DATA FOR 3D TOF IMAGING

De Coi, Beat
CEO
ESPROS Photonics AG

Abstract3D TOF imaging is is one of the preferred technologies for the Internet of Things (IoT), Industry 4.0 and Autonomous Driving Assistance Systems (ADAS). It generates a 3D representation of the environment. Or shall we better say, should provide a 3D representation? 2D imaging is nowadays a technology which is widely mastered. Many engineers all over the world are able to deal with imager chips, lenses, imaging processing and the like. However, 3D TOF imaging offers not only the 3rd dimension of the scenery. It also comes along with many new challenges for the system designers and system integrators. The massive deployment of 2D color cameras started about ten years ago only with the introduction of the smart phone. But the history of digital imaging goes back into the seventies of the last century. It took 40 years from it's birth to become something standard not just for the endusers but also for the design engineer. The technology is mastered. However, if we compare the maturity of 3D TOF imaging with 2D imaging, we are maybe one quarter only on the whole way to perfectness. Many technological innovations compete with each other to become the standard. This paper addresses the challenges involved by using continuous wave modulated TOF (cwTOF). One of a preferred technologies for 3D TOF.

BiografieBeat De Coi is the founder of the CEDES Group, established in 1986. The company designs and manufactures optoelectronic devices, e.g. elevator light curtains. De Coi sold CEDES in the year 2016, after 30 years successful business development from a garage company to an international group of companies, to the Swedish ASSA ABLOY Group. In autumn 2006, De Coi founded the company ESPROS Photonics Corporation in Switzerland. ESPROS does fundamental semiconductor research and development and manufactures high performance imagers. In 1998, De Coi became Entrepreneur of the Year in Switzerland. In 1999, he was awarded as the most innovative entrepreneur in the Canton Graubunden. In 2004, he won the «European ICT-Grand Prize», which is the most distinguished prize for innovative products and services in the field of ICT because of his pioneering research in the field of time-of-flight cameras. De Coi was nominated with ESPROS for the 2015 Prism Award, the most prestigious award in the photonics industry. De Coi helds an engineering degree in electronics and is member of the board of the University of Applied Sciences in Chur, member of IEEE, IAEE and member of the committee of the Swissmem Photonics Group.

EU's activities to support research and innovation

AbstractThe EU supports the development of flexible and hybrid electronics technologies and products and has a prioritised this as an area for public financial support under the EU Horizon 2020 funding program. During this presentation, the European Commission, who manages the manages the allocation of EU funding, will outline the EU's activities to support research and innovation in the area of 'Thin, Organic and Large Area Electronics' and provide insight on how companies can benefit from the public funding that is available.

Heterogeneous Material Integration Enabled by Advanced Wafer Bonding

Uhrmann, Thomas
Business Development Director
EV Group (EVG)

AbstractCombining compound semiconductors with different materials as well as integrating compound semiconductors with CMOS circuits or integrated photonics are growing trends to produce higher-performance electronic devices as well as enable many new applications. Wafer bonding has proven to be an enabling technology to achieve high-quality and cost-efficient production of such devices. For instance, low temperature plasma activated wafer bonding is now considered a core technology for III-V CMOS integration. Today, the rising demand for product applications, such as vertical SiC and GaN power devices as well as multi-junction solar cells, is driving the need for new developments in direct wafer bonding that allow for electrically conductive interfaces. Such developments can also open the door for implementing novel device concepts. Furthermore, new concepts like wafer-level die transfer bonding can bring compound semiconductor manufacturing into 200-mm and 300-mm production lines and enable greater integration of compound semiconductor manufacturing into the silicon world. This presentation will review plasma activated wafer bonding for compound semiconductor integration and a novel approach to oxide-free direct wafer bonding that demonstrates the ability to achieve an interface that has sufficient bond strength and electrical conductivity between materials of different properties—making heterogeneous integration of compound semiconductors a reality.

BiografieDr. Thomas Uhrmann is director of business development at EV Group (EVG) where he is responsible for overseeing all aspects of EVG’s worldwide business development. Specifically, he is focused on 3D integration, MEMS, LEDs and a number of emerging markets.
Prior to this role, Uhrmann was business development manager for 3D and Advanced Packaging as well as Compound Semiconductors and Si-based Power Devices at EV Group. He holds an engineering degree in mechatronics from the University of Applied Sciences in Regensburg and a PhD in semiconductor physics from Vienna University of Technology.

AbstractThe trends expected to drive growth for the semiconductor industry during the next decade are also driving increased importance for manufacturing on 200mm or smaller wafer formats. The sensor solutions required for the Internet of Things (IoT), assisted and autonomous driving cars and industry 4.0, the communication infrastructure required to cope with exponentially growing data traffic and data storage needs as well as the sensors enabling the revolution of healthcare to support aging populations are demanding more as well as more advanced MEMS devices, RF Filters and Photonics chips – to name just a few – all of which are manufactured using 200mm or smaller wafers.
EVG remains committed to supporting our customers in these market segments with reliable and state of the art equipment sets. We continue to invest into further developing and updating our equipment platforms for these markets. In this presentation, we will discuss some of the unique approaches that enable EVG to support a wide range of markets as well as wafer sizes ranging from 2” to 300mm.

BiografieMarkus Wimplinger is the director of EV Group’s (EVG) business unit for technology development and intellectual property. In this role, Markus oversees EV Group’s global process engineering team. Additional responsibilities include the management of R&D partnerships and contracts with third-party organizations such as companies or government-related entities, as well as intellectual property affairs associated with EVG’s process technology development efforts and 3D integration-related projects.
Prior to his current role, Wimplinger held positions within EVG with increasing responsibilities. Most recently, he was director of technology for EV Group North America. He began his career with EVG as a project manager at the company’s headquarters in Austria in 2001 where he was focused on customer-specific projects. Wimplinger’s past work includes involvement in design, development, process technology and many other aspects of capital equipment manufacturing both at EVG and at his former position at a capital equipment supplier for non-semiconductor related industries.
Wimplinger received his educational background in electrical engineering from HTL Braunau, Austria.

AbstractThere is a growing trend in the medical device industry toward wirelessly connected and automated devices, showing great benefits for the patients and all stakeholders in general. This presentation will review recent technological trends and new products in the market, as well as challenges that need to be tackled to develop such devices. An entrepreneurial point of view will be given on these subjects, as Eveon address unmet needs of patients, doctors and nurses, by automating the preparation of treatments, facilitating the administration of drugs, and enabling the patients to stay connected.

BiografieRemy Vomscheid, Ph.D., has been working in the healthcare industry for the last 14 years, mostly with Johnson & Johnson, as Business Development Manager, EMEA, Medical Devices & Diagnostics, and as Regional Business Manager for LifeScan, J&J’s diabetes franchise. Prior to this, he was Business Development Manager for Genopole, the largest French incubator dedicated to Life Sciences. As Development Director for Eveon, he leads a cross-functional team of people with different technological competencies (electronics, software, fluidics, polymer engineering & mechanics) dedicated to the development of innovative medical devices.

200-mm G-FET™ GaN-On-Silicon power switch enabling new generation of power converter applications

Moreau, Eric
Director of Product & Application
Exagan

AbstractGaN-on-Silicon power devices are recognized as a key technology to sustain future power converter systems roadmaps in the field of IT electronics, renewable solar and emission free automotive applications. Exagan is implementing proprietary G-Stack™ 200-mm’s GaN-on-Silicon and G-FET™ technologies into high volume production to enable higher integration and improved efficiency. The advantage of its unique expertise in GaN-on-silicon material fabrication while leveraging on its attractive fab-lite business model, allows Exagan to provide GaN-on-Silicon power switches solutions to meet future market performance, reliability and cost targets. This paper will present the latest developments achieved and potential products to be released using a unique G-Stack™ 200-mm’s GaN-on-Silicon and G-FET™ technologies.

BiografieEric Moreau is responsible for the New Product Introduction (NPI) & Product Applications organization at Exagan with the objective to provide GaN-on-Silicon solutions to embedded E/E Systems for the aerospace, automotive and industrial markets.
With more than 25 years in semiconductor industry at Motorola/Freescale, Eric served as Global Automotive Standard Products Business Development Manager, EMEA Product Definition and Applications Manager for the Analog, Mixed Signal and Power Product Division and more recently as Global Functional Safety Manager for the Analog and Sensor Freescale Group. As Leading the global Functional Safety Manager team, the ISO26262 certification on all applicable parts was obtained for ASIL-D Smart Power Analog solutions.
Eric was instrumental to introduce for the Automotive and Industrial markets, intelligent Smart Power Switches, Smart MosFET pre-drivers, diverse smart combination of low & high side drivers for actuators/motor controls, advanced System Basis Chip for safety critical micro-controllers.
Eric has a graduate degree in Electrical Engineering from France’s Ecole Centrale de l’ Electronique de Paris, France in 1989.

Fabmatics – About the new specialist for material handling automation

Stegemann, Burkhard
Sales Director
Fabmatics GmbH

AbstractSince September 1, 2016, the merged companies HAP Handhabungs-, Automatisierungs- und Präzisionstechnik GmbH Dresden and Roth & Rau - Ortner GmbH have been operating under the new name Fabmatics GmbH. The company is an experienced specialist for the automation of material flows and handling processes in semiconductor manufacturing plants and other high-tech production environments. Both predecessor companies have been implementing automation projects with great success for more than 20 years. One of the focal points of Fabmatics is retrofitting 200mm factories with automation solutions in order to make these fabs fit for the future. Currently, there are some two-hundred 200mm factories world-wide. In light of rising global cost pressure, a majority of semiconductor manufacturers is expected to modernise their factories and to automate processes significantly as a result.
The presentation will show best practice automation projects, focused on material handling and production logistic applications, even at positions where automation previously seemed impossible. Learn how a smart integration and combination of automated systems for cassette transportation and storage, lot identification & localization as well as carrier and wafer handling can retrofit older 200 mm fabs in order to increase their competitiveness. Older does not mean obsolete!

BiografieBorn in 1969, Burkhard Stegemann studied Physical Technics at the FH Aachen and completed his final year at Coventry University. In 1996 he joined Carl Zeiss in Jena in the department of microscopic wafer inspection. After two years in R&D/ application, he changed to product and project management. As part of the acquisition of the Zeiss business field “optical wafer inspection” by HSEB Dresden GmbH in 2004, Burkhard Stegemann joined HSEB. His responsibilities were sales and service. Since May 2014 Burkhard Stegemann is sales director of HAP GmbH Dresden and due to the merger of HAP and Roth & Rau - Ortner, since September 2016 sales director of Fabmatics GmbH.

Silicon carbide 1200V and 650V Schottky rectifies with ruggedness and reliability comparable to silicon power products

Konstantinov, Andrei
Design Engineer
Fairchild Semiconductor

AbstractConcerns for reliability are one of major roadblocks for widespread adoption of SiC high voltage power devices. In the talk we will present the new SiC Schottky-barrier diode (SBD) technology recently developed at Fairchild Semiconductor in order to meet or exceed the standards for reliability and ruggedness applied to high voltage silicon devices.
Inherent issues of SiC SBDs with reverse leakage and avalanche and surge-current ruggedness are overcome with optimized Junction-Blocked Schottky (JBS) rectifier design with improved Schottky-metal shielding. This not only suppresses high-temperature reverse currents but also improves SBD avalanche ruggedness. Very high mean specific avalanche energies have been achieved, 20 W/cm2 for 650V rectifiers and 12 W/cm2 for 1200V. No pronounced parameter drift upon repetitive avalanche or surge-current test occurs until the destructive energy is reached. Fairchild SiC SBDs are 100% avalanche-tested.
Some makes of SiC power devices are currently limiting the field lifetime of PV modules to 3 to 4 years because of anode corrosion. Excessive temperature-humidity-bias tests were performed with Fairchild SBDs and the corrosion acceleration factors due to temperature, humidity and bias were established. The new SBD technology was also compared to existing products. With the acceleration factors established we can expect the 1200V SBD anode corrosion time in PV modules be increased by a factor of 100.
The approach of Fairchild to manufacturing strategy is to entirely bypass 4” production. Production was started at a high-volume 6” silicon fab. Dedicated SiC-specific tools included a high temperature implanter and an implant anneal tool, while other tools are shared with silicon manufacturing. The combination of much larger size of 6” wafers with cost sharing between silicon and SiC manufacture has an important contribution to improved cost structure of SiC power devices at Fairchild.

BiografieAndrei Konstantinov received the MS degree in electrical engineering from Department of Optoelectronics, St. Petersburg Electrotechnical University, St. Petersburg, Russia, in 1979, and the PhD degree in semiconductor physics from the Ioffe Institute, Russian Academy of Sciences, St. Petersburg, in 1984. Dr. Konstantinov was active in multiple semiconductor startups including AMDS/Intrinsic Semiconductor, Genesic and Transic AB. His research interests include silicon carbide device phenomena and device process technologies.

Fast 3D imager system on chip

Florin, Claude
CEO
Fastree3D SA

AbstractFastree3D SA imaging 3D Time-of-Flight (ToF) sensors help recognize and measure the distance to fast moving objects in real-time. Fastree3D is a fabless semiconductor company based in Lausanne, Switzerland
Applications
ADAS (automotive driving assistance)
Autonomous navigation
Machine Vision, metrology
Robotics, people and objects detection
We provide fast motion sensing based on 3D imaging at low cost (CMOS). The technology relies on a measurement of time of arrival of the reflected illumination from infrared lasers (VCSELs) detected by single photon avalanche diodes. Our 3D imaging sensors are characterized by
high resolution
accuracy
range
speed
strong background illumination resistance
size
price
Why solid-state Lidar
Recently, it has been shown a demand for solid-state Lidar in automotive driving assistance (ADAS) to complement existing sensors like radar, mono & stereo camera or ultrasonic.
Solid-state sensors offer a very attractive price as well as a reasonable size thanks to the standard CMOS technology. The combination of SPAD sensors and VCSEL Laser illumination helps to reach an accuracy close to 10mm @ 30m. Fastree3D is today developing a 160x120 pixels SoC.

Is there anything beyond? Terahertz imaging: potential and perspectives

Perenzoni, Matteo
Senior Researcher
FBK

AbstractImaging has been extensively pursued across almost the whole electromagnetic spectrum: from x-rays to UV, visible to infrared, microwaves to millimeter waves. Interestingly enough, however, there is a region ranging in the terahertz (THz) frequencies where still imaging technologies are lagging, despite being a wavelength range of undoubtedly high potential.
At frequencies from 100GHz up to 10THz, the electromagnetic radiation has interesting penetration properties, it is not ionizing, it causes several molecules to resonate, and so on. A potential like this can enable a number of applications in the security, biomedical, and industrial fields.
In this talk, challenges in the THz waves generation, detection and realization of integrated THz imaging systems will be addressed and current state-of-the-art in THz technologies will be reviewed. A specific focus will be given to THz imaging technologies enabled by mainstream CMOS processes, as well as a perspective on future emerging devices employing graphene-based detectors.

BiografieMatteo Perenzoni studied Electronics Engineering at the University of Padova, Italy, until 2002. Since January 2004, he has been with the Center for Materials and Microsystems of the Fondazione Bruno Kessler (FBK-CMM), Trento, Italy, as a Researcher working in the Integrated Radiation and Image Sensors (IRIS) research unit. He has been collaborating on teaching courses of electronics and sensors for the NanoMicro Master, Trento, from 2006 to 2010. In 2011, he has been director of the bi-annual Optoelectronics and Photonics Winter School coorganized with the University of Trento. During 2014, he has been visiting research scientist in the THz Sensing Group in the Technical University of Delft. He is member of the technical program committee of the European Solid-State Circuit Conference (ESSCIRC) since 2015. Within the IRIS research unit he is responsible of the multispectral and terahertz research line.

AbstractThere is little doubt that the cost of packaging and testing of PIC devices will need to come down in order to foster market expansion and thus high volume manufacturing. To achieve this, advanced automation is required. ficonTEC has been consistently focusing on automated photonics assembly machines since the early days of photonics. The talk will use the complex assembly of hybrid photonics transceivers to illustrates topics like flexibility vs speed, machine capital costs, cost of ownership and cost per assembled part and how this scenario will change with the increase of production volumes, and hopefully with the introduction of ‘design for manufacturing rules’.
ficonTEC is a company entirely devoted to the manufacturing of automated PIC assembly equipment, with some 350 machines installed worldwide.

BiografieTorsten Vahrenkamp is CEO and one of the founders of the company ficonTEC which is located in Germany, close to Bremen. When founding the company in 2001, the goal was to provide automatic and semi-automatic assembly and test solutions for the photonics industry. Torsten holds a diploma for Applied Laser Technologies which he got in 1998 at the University of Applied Sciences in Emden, Germany. During his further work at the Institute of Laser Technology in Emden and University of Loughborough he built a fully automatic laser lithography system for rapid generation of micro structures in submicron dimensions and developed a process to generate the world’s first in-glass diffractive optics using ion exchange processes in gradient refractive index glass which is used today for generation of waveguides in glass.

AbstractFlexEnable has pioneered a flexible electronics technology platform that allows electronics to be manufactured on flexible plastic film, the thickness of a sheet of paper. It can be used for the manufacture of glass-free, flexible displays and sensors that enable game-changing products. The versatile applications of flexible displays and sensors across markets such as wearables, automotive, digital signage, medical and security, lead to an end-user market opportunity of $33Bn by 2020. We are working with leading consumer brands who want flexible displays and sensors to bring surfaces to life for the next wave of hardware products.
FlexEnable offers a solution that breaks through the constraints of glass and amorphous silicon – the materials found in most displays and sensor arrays today. Our approach uses organic transistors that are fundamentally flexible, and lower cost than any other flexible transistor because of the low temperature (<100°C) process. We have replaced the glass substrate with plastic to enable flexible displays and sensors that are ultra-thin, light and shatterproof. FlexEnable’s technology brings unique benefits to products and manufacturing processes that simply aren't possible with silicon thin-film transistors. We have already achieved several breakthroughs with flexible colour and video-rate plastic displays (LCD and OLED) and flexible X-ray image and fingerprint sensors.
Organic thin-film transistors (OTFTs) are now widely acknowledged as the lowest cost and most flexible transistor technology - and FlexEnable is the world leader in OTFT industrialization. The technology is already de-risked and proven to be reliable and high-yield in production, and now has higher performance than amorphous silicon. By re-purposing existing display factories across Asia, this technology can be quickly scaled to high volumes, achieving a high margin business through licensing and royalties for mass market and fabless supply for high value niche markets.

BiografieDr Rouzet Agaiby is Senior Business Development Engineer at FlexEnable. She has over ten years’ experience in a variety of technologies including semiconductor manufacturing, solar cells and flexible electronics with special focus on sensors. Rouzet is responsible for growing the implementation of FlexEnable’s flexible electronics technology in X-ray detectors and fingerprint sensors. She also sets up and manages key strategic developments in sensors applications with major market players to bring products to market that have added value both for OEMs and for the end user. Rouzet leads the work on integrating graphene and other 2D materials in FlexEnable’s flexible electronics technology in order to bring these wonder materials from Lab to Fab.
Rouzet has a PhD in semiconductor technology from University of Newcastle and an MBA from Manchester Alliance Business School.

FeFET - The ideal semiconductor memory for the age of IoT

Müller, Stefan
CEO
FMC / NaMLab gGmbH

AbstractThe Ferroelectric Memory Company – FMC solves one of the most important hardware challenges in the age of Internet-of-Things. Fabless companies as well as semiconductor manufacturers are nowadays looking for embedded nonvolatile memory solutions (eNVM) that enable products like microcontrollers (MCU) to follow Moore’s law. However, legacy eNVM solutions like eFlash cannot provide cost effective solutions that are so in need for the age of IoT. FMC commercializes a disruptive material innovation that will solve this problem for current and future technology nodes, i.e. eNVM based on ferroelectric hafnium oxide (FE-HfO2). The unexpected physical effect of ferroelectricity in HfO2 allows for the transformation of classical high-k metal-gate (HKMG) transistors into nonvolatile ferroelectric field effect transistors (FeFET). In this way, MCUs can easily be scaled from e.g. 65 nm down to 28 nm and beyond enabling tremendous advantages for the overall system: SoC cost reduction of around 80%, per bit write energy reduction by a factor of 1000 and an overall performance gain of the system of around 70% due to the transition to advanced process nodes. The FeFET concept has already matured significantly since single cell proof was demonstrated in 2012. First 64 Kbit active arrays have successfully been manufactured and characterized in close collaboration with the Dresden R&D consortium GLOBALFOUNDRIES, NaMLab gGmbH and Fraunhofer IPMS-CNT. Moreover, FMC has recently taped-out a 28 nm SoC prototype in collaboration with design partners RacyICs GmbH and Contronix GmbH that will enable the demonstration of a fully functional 28 nm SoC with 8 Mbit embedded FeFET memory by Q4/2016. Due to the close relation of FeFET and CMOS baseline, there is no roadblock for FMC’s technology to be applied also to alternative technology nodes like 22 nm FDSOI, 1X nm FinFET and beyond. FMC plans to enter into technology qualification by 2017 and is currently looking for Series A investment.

BiografieDr. Stefan Müller received the joint master’s degree in Microelectronics from Technical University Munich, Germany, and Nanyang Technological University Singapore in 2011. He also holds a German diploma degree in Mechatronics and Information Technology as well as a bachelor’s degree in Mechanical Engineering both from Technical University Munich, Germany (2011/2008). In 2011, he joined NaMLab gGmbH, a research institute originally founded as joint-venture between DRAM manufacturer Qimonda and the University of Technology Dresden. In 2015, he received his PhD degree from Dresden University of Technology for his work on HfO2-based ferroelectric devices. He then became project leader of the publicly funded research transfer project “EXIST Forschungstransfer” aiming at the commercialization of ferroelectric hafnium oxide. Since 2016, he is CEO of FMC – The Ferroelectric Memory Company.

Hybrid Integration for Plastic Film Electronics

AbstractPolymer foils are an increasingly attractive substrate for several electronic applications. They are matchless for the fabrication of very thin and highly flexible electronic systems and rather inexpensive substrates for large-area applications. In combination with functional materials like the organic semiconductor and printing technologies there was big hope that electronic systems can be fabricated directly by coating and patterning steps without any assembly steps, a big vision for volume production of integrated systems.
Despite the achievements obtained in this area, especially for photonic systems, there has been a considerable drawback regarding the realization of integrated circuits. Although there has been a lot of success in organic semiconductor research and related demonstration of applications, no realistic approach for a larger scale circuit integration is available that can compete by performance and economically with state-of-the-art silicon ICs.
The difficulties in realization of organic integrated circuits lead to the concept of hybrid integration. In principle hybrid means bringing together the world of large-area coating, patterning and printing with the world of assembly and interconnect of components. On a first view, this is rather similar with the conventional approach of electronics packaging, however there are also large differences related to the plastic film substrate and the specifics of foil electronics. Dimensional instability, shrinkage and wrinkling, low temperature processing, bending and folding reliability play a much more pronounced role in plastic film technology.
The different approaches for hybridisation on plastic films and corresponding challenges are discussed by means of different development examples from several application fields. In detail the impact of above mentioned critical properties are investigated application-oriented for packages of consumer goods.

BiografieChristof Landesberger received the diploma degree in physics from Ludwig Maximilian University in Munich. He joined Fraunhofer Institute in Munich in 1990 and is now heading the research group “Thin Silicon” within the department “Flexible Systems” at Fraunhofer EMFT. He has been working in the field of ultra-thin silicon since more than 15 years and prepared more than 20 patent applications in the field of handling and processing techniques for ultra-thin semiconductors. His current research topics are focusing on packaging technologies for ultra-thin semiconductor devices, including self-assembly and flexible chip foil packages.

PI-Scale – a European pilot line for flexible OLEDs

Keibler, Claudia
european project leader
Fraunhofer FEP

AbstractPI-SCALE is a Horizon2020 project, which is an European collaboration to create an open access pilot line service offering world class capability in customised flexible organic light-emitting diodes (OLEDs) in order to accelerate the commercial adoption of this technology. The project brings together Europe’s experts and state-of-the-art infrastructure for flexible OLED fabrication, and enables companies to quickly and cost effectively test and scale up their flexible OLED lighting or signage concepts and bring them to a level where they are ready to be transferred to a mass production facility.
Flexible OLEDs are ultra-thin (<0.2 mm), highly bendable, very lightweight, and even transparent energy efficient large area, patternable light sources. They can be made or cut to any shape or size, and can be integrated into formed components or seamlessly bonded onto curved surfaces. The commercialisation of this technology will open up a host of exciting design opportunities to create new value adding lighting and signage products in many different application areas such as architectural lighting, automotive, aerospace and consumer electronics.
The pilot line is positioned to bridge the gap between R&D and mass production, and provides independent, open access services including:
• Prototyping and pilot production of customised flexible OLED devices (up to 5000 m2 of OLEDs/year)
• Up-scaled materials, process and equipment testing
• System-level integration of flexible OLEDs into products
• Application-specific operational testing
• Advice and “hands-on” workshops to introduce companies to flexible OLED technology

BiografieClaudia Keibler studied mechanical engineering with the focus on manufacturing engineering at Technische Universität Dresden. After her studies she graduated in the field of adhesive bonding as European Adhesive Engineer. She has been working at the Fraunhofer since 2010 in the field of flexible organic electronics. Claudia Keibler has a strong expertize in atomic layer deposition technique and in adhesive bonding technologies. Since 2013 she is working as a European project leader and coordinator at Fraunhofer FEP.

Towards Zero Power – Smart Systems Make All the Difference

AbstractMicro-/nanoelectronics and MEMS have become the most important key enabling technologies for all branches. Sensors, actuators and electronic signal processing are used everywhere. Communication has become an important part of daily life, and a dramatic increase in machine-to-machine communication is expected by introduction of “industry 4.0”. However, power consumption of information technologies is now becoming a major issue in a world where an upcoming shortage of resources is expected and sustainability has become a need.
Fraunhofer Microelectronics has just decided to focus its strategy on this power issue and to concentrate research and development efforts on the reduction of energy consumption. Combining the technological expertise of the 18 member institutes, the development of smart systems with ultra-low power consumption and energy harvesting as well as of highly efficient power electronics will help to solve the power issue, one of the major societal challenges of today.

BiografieDr. Joachim Pelka is the Managing Director of the business office for the Fraunhofer Group for Microelectronics. He studied electrical engineering, with an emphasis on semiconductor technology, at Berlin's Technical University and was awarded a doctorate there for his work on semiconductor components. He has been with the Fraunhofer-Gesellschaft since 1983.
Today, following many years in the organization, Dr. Pelka is the Managing Director of the Fraunhofer Group for Microelectronics. His previous position was as the Fraunhofer ISIT's department head responsible for the simulation of semiconductor patterning processes. He also spent two years in the JESSI coordination office (also located at the ISIT). As managing director he is responsible for strategic planning and for the coordination of work in the microelectronic institutes of the Fraunhofer-Gesellschaft.
Under his directorship, the business office carries out studies on current areas of research that form the basis for the Group's strategic planning. In the past, this included for example the “MST fireside chats”, a series of workshops conducted on behalf of the project sponsor, Mikrosystemtechnik VDI/VDE IT and a study concerning road mapping activities of microelectronics on behalf of the CATRENE Scientific Committee.
In keeping with deepening European integration, Dr. Pelka today functions more and more as a contact person for other European research facilities such as CEA-Leti, CSEM, IMEC and VTT. He represents the Group, complementing the Chairman of the Group, in the Heterogeneous Technology Alliance HTA. He is also involved in the AENEAS Management Committee and Scientific Council.

III-V Semiconductor Devices – Full Potential to be Unleashed by Heterogeneous Integration

AbstractIII-V compound semiconductors offer unique physical properties which allow to realize electronic and also optoelectronic devices with properties far superior to those of their silicon based counterparts. This includes ultra-high-frequency (up to almost 1 THz) low-noise amplifiers, high-power broadband amplifiers and switches, high-efficiency light emitters as well as MEMS devices exploiting the piezoelectric properties of certain III-V materials.
On the other hand, processing technology for III-V materials is less advanced than for e.g. silicon CMOS and, furthermore, the maximum wafer size of III-V substrates is limited to 6 inch the most. To combine III-V technologies and devices with e.g. silicon CMOS, heterogeneous integration is an attractive approach.
Here we present examples of the integration of GaN-based power electronics with silicon, either by direct growth of GaN on silicon or by heterogeneous integration via transfer printing of GaN power transistor chips onto silicon. Furthermore, we report on high-performance mm-wave Radar modules based on metamorphic GaInAs high-electron-mobility transistors (HEMTs) and a 3D mm-wave MIMO camera based thereon. This mm-wave Radar technology will benefit greatly from advanced heterogeneous integration concepts, which will allow to integrate GaN-based transmitter with GaInAs receiver chips onto silicon in order to reduce size, weight and also cost. As a third example we will report on the integration of InP-based quantum cascade lasers with silicon-based optical MEMS scanning gratings, which allows the realization of a compact and fast scanning MIR laser source for spectroscopic sensing, diagnostics and process analysis.

BiografieJoachim Wagner received the Ph.D. degree in physics from the University in Stuttgart, Germany, in 1982. From 1982 to 1984 he worked at the “Max-Planck-Institut für Festkörperforschung”, Stuttgart, Germany, in the group of Prof. M. Cardona before joining the Fraunhofer-Institute for Applied Solid State Physics, Freiburg, Germany, in 1985. There he is currently Deputy Director and Division Director, responsible for the institute´s business units. He is also Professor at the Institute of Physics of the University of Freiburg and an associated member of the Materials Research Center Freiburg (FMF). His current research interests include III/V-semiconductor based optoelectronic devices in particular for the infrared spectral range, as well as their integration into modules and sensing systems. He is author or coauthor of 470 scientific publications including several review papers and book chapters.

Goehlich, Andreas
Head of the Department CMOS and Microsystem Technology
Fraunhofer Institute for Microelectronic Circuits and Systems IMS

AbstractIn view of the upcoming challenges and opportunities of the internet of things (IoT), the industry 4.0 and the social challenges as the aging society an increasing number and diversity of sensors and actors will be used in future in electronic smart systems. These will require suitable cost effective and flexible technological platforms.
CMOS-integrated microsystems can be the perfect basis for such future applications, connecting intelligence to functionality.
The monolithic integration of micro- or nanostructures i.e. MEMS or NEMS (micro/nano-electromechanical systems) on pre-processed CMOS-substrates is a promising approach for the next generation of intelligent sensors and actuators. Post-CMOS-processing allows the 3D-integration of sensors and actuators on top of the read-out circuitry thus enabling a considerable reduction of chip area. The decoupling of the complex manufacture of the CMOS-substrate from the processing of the functional MEMS/NEMS-device allows to concentrate the development efforts on the functionality. In this way short and cost effective development cycles for new sensors and actuators are made possible.
In the Fraunhofer Alliance Microelectronics a multitude of complementary competences of different institutes is bundled, that target to the integration of MEMS and NEMS on intelligent CMOS-substrates as a technological platform for the next generation of sensors and actors.
Some examples of ongoing technology developments are presented that cover different applications such as sensors for industrial application in harsh environment, integrated energy harvesters, CMOS-integrated optical devices and integrated nanostructures on CMOS.

Requirements & Challenges for Heterogeneous System Integration

AbstractTraditional single packaging solutions are not able to deal with the required system specifications related to high functionality, miniaturization, high speed data transmission, and multi-device integration. There is a need of highly miniaturized and flexible systems solutions that can be applied in various sectors and meet the requirements of current application trends especially in the realms of Internet of Things (IoT), Cyber Physical Systems (CPS), Ambient Assisted Living (AAL) as well as information & communication, logistics, security, automotive, health care and industrial electronics (Industry 4.0). Heterogeneous integration of multiple electronic devices is a key enabling technology which covers wafer level e.g. CSP, 3D, 2.5 integration as well as board level approaches. The presentation will give an overview of current heterogeneous integration technologies under the perspective of “More Than Moore” through Heterogeneous System Integration. 3D integration with Through-Silicon-Vias (TSV) is one of the most important topics in current packaging and interconnection.

BiografieM. Juergen Wolf received a M.S. degree in Electrical Engineering. In 1994, M. Juergen joined Fraunhofer Institute for Reliability and Microintegration IZM and worked e.g. as group & project manager in the field of wafer level packaging and system in package. Since 2011 he is head of the department Wafer Level System Integration and also coordinates and manages “ASSID - All Silicon System Integration Dresden” with its 300 mm WL process line. He manages as well as participates in a number of research projects on European and international level. Wolf is European representative in the technical working group Assembly & Packaging of ITRS, board member of EURIPIDES as well as member of IEEE and SMTA. He has (co) authored numerous scientific papers and reports in the field of microelectronic packaging and holds a number of patents.

Modules and Systems for Improved Smart and Healthy Living

AbstractSmart and Healthy Living at Fraunhofer Group for Microelectronics means doing research into all the ways that technology can support our lives and our work in a modern world.
Fraunhofer research covers the whole chain starting with developing new materials for getting functional or easily cleanable and clean remaining surfaces, the development of Silicon based ICs and of electronic modules made by using heterogeneous integration and hybrid electronics methods, means the combination of traditional Silicon manufacturing or PCB soldering combined with new techniques like organic, flexible electronics. High 3D integration, wafer level fan out packaging and encapsulation are now on their way to be proved and qualified for mass production. Electronics substrates are no longer consisting only of rigid PCBs - today all kinds of conductive and non-conductive foil materials, stretchables and textiles are assembled and even being printed or coated by electronics parts, sensors, light and energy sources as well as by suited encapsulation or barrier layers.
With these techniques amazing new products can and have already been created: For instance Fitness T-Shirts and functional sensor insoles for obtaining health parameters like heart rate, motion and gait analysis are only few examples. But only getting data is not enough: Visual, acoustic and even haptic feedbacks are provided instantly for supplying the user with valuable data of his actual performance and how to improve it by intuitive learning.
This presentation provides an actual overview of Fraunhofer Microelectronics research in Smart & Healthy Living and focuses on all electronic assistance as a symbiotic cooperation between humans and technology.

BiografieThomas Knieling studied physics at the Max-Planck Institut für Strömungsphysik in Göttingen, Germany in the field of particle optics. Afterwards he prepared his PhD thesis at the University of Bremen (IMSAS), Germany, in the areas of microtechnology, microoptics and surface science. Next he worked as a scientist at the Fraunhofer IPMS in Dresden, covering topics in microoptics and display technologies. Since 2009 he is deputy department chief of the module integration group at the Fraunhofer ISIT in Itzehoe, Germany, where he is working on quality and reliability issues of PCBs and MEMS as well as on printed electronics for medical and sports applications. Moreover he is leading the business field of Wearables and Printed Electronics.

Large area printed piezosensors for wearable applications

Grunemann, Timo
PhD student
Fraunhofer ISC

AbstractDue to demographic changes the number of older employees, who want or have to work but are already physically limited, increases. At the same time the number of workers in medical care is insufficient to meet the demand as the society gets older. In consequence, there is strong interest in sensor technologies by employers and medical professionals in terms of safety-at-work and point of care technologies which can measure, support and guide the movement of body parts with simple-to-use techniques. Camera-based technologies however can be used at pre-defined locations, only, and, might cause difficulties regarding data protection.
In this contribution, we present a sensor technology which can be integrated on textiles in order to measure movements of a human body by wearing a special shirt. At first, the sensors are designed to measure the bending and twisting of elbow and wrist joints. The technology is based on printable piezoelectric sensors realised by PVDF derivatives and PEDOT:PSS electrodes and processed by simple screen-printing techniques at low temperatures. The freedom to design the size and the shape of the sensors result in the feature that the sensors can be optimally tuned to the measuring task. Due to the fact that the sensors are designed as integrating large-area sensors, it is not necessary to position the sensors exactly.
Printing the sensors on textiles instead of foils causes some difficulties in terms of quality and stability of the sensors. Measures to tackle that are pointed out. Technologies to realise a hybrid assembly technology and electronics for read-out of the sensor signals are sketched. Finally, measurements of bending signals, which are in the size of mVs and show linear characteristics, are discussed.

FUJIFILM’s Color Filter Technology for Image Sensors and beyond

Ezoe, Toshihide
Senior R&D Manager
FUJIFILM Corporation

AbstractPhotosensitive color filter materials which can cut the light of targeted wavelengths are today well established as key components of CCD and CMOS image sensors. Such image sensors can be found in standard capturing devices, such as digital cameras and mobile phones as well as in other imaging applications.
In order to materialize superior performance as a micro color filter offering high resolution, low noise, and precise color reproduction, our original photosensitive polymer technology, color materials technology for dyes and pigments with special design capabilities, were integrated along with special dye and pigment dispersion technologies.
Now, we are expanding these color filter materials technologies, which have been cultivated in the image sensor market, to new materials which are useful for much longer wavelength applications such as infrared sensors which will be used for autonomous vehicles, security cameras, and robots for factory automation etc.
This talk will address the fundamental technologies relating to photosensitive color filter materials and future evolution of these technologies.

BiografieToshihide Ezoe received his Master of Engineering from Osaka University, Japan in 1990, and joined Fuji Photo Film Corporation in the same year. He worked as a chemical engineer for the development of silver halide photosensitive materials for over 10 years. In 2013, he transferred to Electronic Materials Research Laboratories in the FUJIFILM Corporation, and has responsibility for the development of photosensitive materials for various sensors.

BiographyBIOGRAPHY GUY DUBOIS
GDCL MANAGEMENT
Guy Dubois, graduated from the French Engineering school Conservatoire National des Arts et Métiers, started his career in 1968 and embodies more than 40 years of worldwide level Management experience on Manufacturing and Research and Development in semiconductor industry.
After 10 years spent on process and components research with CII and Thomson Central research Laboratory, he took the lead of the process engineering development of EFCIS, then Thomson Semiconducteurs.
Then, within STMicroelectronics, he is successively Divisional Quality Director, Rennes plant Manager, Grenoble Operation Manager in charge of a major site restructuring.
In 1997 he is promoted Group vice-President and creates the Wafer Foundry organization, then in 2005 takes in charge the Manufacturing Strategic Projects.
From early 2007 to mid 2008 he is the Office Director of the cluster EUREKA MEDEA where he actively participates to the definition of CATRENE and to the ENIAC launching.
In April 2008 he came back to STMicroelectronics as Technology R&D Group Vice-President, Alliances and Technologies Intelligence and IP & Licensing Group Vice-President.
In June 2009 he starts his own consulting company: GDCL Management, now GD Technology where he supports several semiconductors and equipment companies.
Guy is a technical/economical expert for European Community and for the French support to SME organization BPI.
He is one of the writers of European Commission study SMART 2010/0062 on 450mm.
Guy Dubois holds several patents, including the VIAS patent used in all semiconductors processes with critical dimensions below 0.5µ.
July 2016

Optical gas & pressure sensing for process control of vacuum based industrial processes

Stanley, Steven
Technical Sales & Marketing Manager
Gencoa Ltd

AbstractSome form of monitoring of the vacuum environment is essential for the efficient operation of any vacuum processes. This can be achieved through a variety of sensors; from simple total pressure sensors, to highly sensitive quadrupole mass spectrometers. In particular, residual gas analysis (RGA) can be performed with quadrupole mass spectrometers. Residual Gas Analysis allows for detection and identification of individual species within the vacuum. This can result higher process yields through faster troubleshooting, scrappage reduction through contamination detection, more efficient use of pumping time, or a more controlled vacuum environment.
The limiting factor for Quadrupole RGAs is the pressure range over which they can operate. Above 1x10-4 mbar damage will occur to the sensor’s filament – restricting its use above this pressure. An alternative residual gas monitoring sensor that operates directly at pressures above 1x10-4 has been built around plasma emission monitoring. A small “remote” plasma can be generated inside a sensor that is part of the main vacuum. Consequently, species that are present within the vacuum will become excited in the sensor’s plasma, emitting light at certain wavelengths, which can then be used to identify the emitting species. Advances in miniature spectrometers in combination with advanced spectrum identification software has resulted in a robust, lower-cost, multi-purpose vacuum sensor.
Presented are a number of examples of its use in monitoring a variety of vacuum conditions such as contaminant detection, water vapour outgassing, etching process monitoring, pump down analysis and reactive deposition control.

BiografieSteven Stanley is the recently appointed Technical Sales and Marketing Manager at Genoca Ltd with a PhD in Surface Physics and Degree in Engineering Physics from Loughorough University. Steven has previously held Process Development and Project Scientist roles at the European Space Tribology Lab, Qioptiq, Power Vision and Applied Multilayers involving a wide range of coating applications from VIS - FIR optical coatings to solid lubrication coatings and deposition technologies including E-Beam, Magnetron Sputtering, Evaporation, PECVD and ALD.

Advanced Laminate Substrate with Ultra-fine Wiring and High Density Interconnects

AbstractThe established and widely used configuration for the lateral integration of multiple mid to large size silicon dies into a single package is based on conventional build up laminate substrates. Although a cost effective solution, the achievable routing and interconnect density is limited. On the other end of the spectrum, Silicon Interposer based consumer products were recently introduced to the market. These high performance products take advantage of the very high density interconnect and routing capabilities of Silicon technology to achieve a leading edge system-performance-to-power ratio and packaging density. To bridge the gap between these two technologies, SHINKO developed the “i-THOP®” (integrated Thin film High density Organic Package) technology.
The “i-THOP®” substrate is based on the robust SHINKO laminate build up technology and combines this with newly developed fine line routing layers. By keeping the large size panel technology and using established processes and materials as well as existing supply chains, “i-THOP®” can provide significant cost advantages compared to Silicon Interposer. The new fine line layers offer a minimum 2 µm line/space (L/S) which is significantly better than conventional substrate technology. For many consumer and networking applications this routing capability is sufficient.
A collaboration project between SHINKO, Amkor and GLOBALFOUNDRIES was established. The goal of this collaboration is to understand the feasibility of an “i-THOP®” based multi-chip module packaging technology and to prove the concept with an early reliability assessment (ERA).
In support of the project, the partners developed a test vehicle (TV) consisting of a 15 mm x 21 mm “i-THOP®” substrate and two identical 9 mm x 9 mm silicon top dies. The substrate features two fine line top layers (FL) with L/S = 3/3 µm (FL1) and L/S = 2/2 µm (FL2). The substrate and the top dies are connected by Cu micro pillars manufactured at AMKOR at a 40µm pitch.

BiografieJeannette Koernert started her career at AMD’s (Advanced Micro Devices) wafer fabrication facility (Fab36) in Dresden, Germany. After various positions in Manufacturing Operations and the transition of the site to GLOBALFOUNDRIES Fab1, she is now the Principal Technician of the Packaging Development group. As such, she is the GLOBALFOUNDRIES project lead for the joint development project between GLOBALFOUNDRIES, SHINKO ELECTRIC INDUSTRIES and Amkor Technology, to proof feasibility of SHINKO’s i-THOP® technology.

Lithography efficiency: a cost comparison model

AbstractThe presentation shows a calculation model and conclusions with focus on the comparison of low-throughput and high-throughput lithography clusters via an analysis of the Cost of Ownership and applied data of the Overall Equipment Efficiency. Published documents up to today are not sufficient to prove that a higher throughput at a single lithography cell (consisting of linked Coater/Exposure/Developer) necessarily leads to an advantage of the manufacturing effectiveness. If the required conditions are given the calculated COO will show that it is efficient to operate with slower but with more cells.
The conditions will be shown as well as the metrics and the methodology to calculate the needed cell throughput and the corresponding count of lithography cells. The model enables to optimize the COO before the toolset will be bought. It will be possible because the COO and OEE are calculated the first time from the whole toolset point of view. This allows to add and to compare the influence of a new metric, the count of recipe changes. Known lithography throughput analyses excluded this naturally existing parameter in the past because the parameter is not visible if the throughput is calculated for a single lithography cell like usually done and propagated.
Furthermore, the calculation model presents a flexible method to identify not only the key drivers to run an efficient production but also easily to compare different scenarios. Two examples are shown, with models evaluated with real data.

BiografieSven Grünzig received his degree in Computer Science from the Dresden University of Technology in 1994. Past roles include Service Engineer/Product Specialist at Tokyo Electron and Lithography Consultant Equipment Engineering/Senior Staff Engineer at INFINEON/Qimonda. He supported Nemotek Technologie in Rabat as a Lithography Engineering Expert from 2010 and changed in 2012 to GLOBALFOUNDRIES Dresden. He now works as a Principal Equipment Engineer Bump Engineering.
Sven was a member of the team that was setting up the litho cell, printing the first 300mm wafer outside of a laboratory on December 18th, 1997 in the MOTOROLA/SIEMENS Pilotfab SC300. Thenceforth he focused on equipment reliability and productivity improvement. With an experience of more than 20 years by now in equipment analysis and optimization on both sides, equipment and chip maker, he acquired the expertise for an unique but plausible approach to analyze equipment conditions to enable an optimized set up, specifically for lithography cells and their production efficiency.

2D and graphene - Status of the Graphene Flagship and the potential applications

Hjelt, Kari
Head of Innovation
Graphene Flagship / Chalmers University

AbstractWith a budget of €1 billion, the Graphene Flagship forms Europe's biggest ever research initiative. The Graphene Flagship is tasked with bringing together academic and industrial researchers to take graphene from the realm of academic laboratories into European society in the space of 10 years, thus generating economic growth, new jobs and new opportunities. The core consortium consists of over 150 academic and industrial research groups in 23 countries. The Graphene Flagship is implemented as four divisions and a total of 15 research Work Packages. A brief overview of these work packages and the related innovation activities is given. The most promising application areas are also discussed.
The excellency in science and technology for graphene and related 2d materials developed within the Graphene Flagship pave the way for future innovations and applications. While the main graphene applications are still several years into the future, there are already a number of promising emerging application areas and concrete advances towards commercialization. These include the latest developments in the work packages for electronic devices, photonics and optoelectronics, flexible electronics and wafer-scale system integration.

BiografieKari Hjelt, Head of Innovation, Graphene Flagship
PhD (Eng.), MBA
Kari Hjelt has extensive experience in ICT and over 15 years career in corporate venturing and research. At Nokia he established a number of ventures and two research laboratories. His last tenure at Nokia was Director, Research Innovations. Since then he has been a co-founder and advisor to several high-tech SMEs. He currently works in Graphene Flagship as the Head of Innovation and is a member of the Management Panel and the Executive Board.
He received his PhD in 1997 with “Photoluminescence and growth of compound semiconductors” from Helsinki University of Technology. He earned his Executive MBA from London Business School in 2010. Kari holds 7 patents and has published 40+ reviewed publications.

AbstractIn order to truly make thin flexible systems smart the integration of ultra-thin Si-based chips is essential. This however requires the development of novel processes for the manufacturing and handling of such chips. Much progress has been made towards the reliable thinning of chip-wafers down to thicknesses of 20 µm. Nevertheless, picking the delicate chips from the adhesive foil used for wafer processing plus transportation without damaging and subsequently placing them on substrates remains challenging since conventional approaches for pick-and-place are unsuitable.
Here we present a novel approach that relies on an optimized pick-and-place tool in combination with the use of thermo-release foils. We show that chips as thin as 20 µm can be quickly picked with little strain and hence be subsequently processed reliably.

Biografie2003 – 2009 study of physics at the University of Leipzig, Germany
2005 – 2006 stay at university of Lancaster, UK
2009 – 2013 doctorate at the University of Leipzig in the field of experimental solid state physics > development of an experimental setup to investigate materials under extreme pressure conditions
2013 – 2015 research scientist at Hahn-Schickard Stuttgart > focus on sensor development for medical applications
Since 2016 head of micro assembly at Hahn-Schickard Stuttgart > focus on development of novel packaging concepts

AbstractWi-Fi and Bluetooth modules, power amplifier modules, memory systems and other wireless transceiver chipsets enable innovative and optimal user experiences largely influenced by the growth of Internet of Things (IoT) applications. However, these radio-frequency (RF) emitting devices require effective isolation to limit the propagation of their interference to neighboring components to protect the end device from performance degradation. Consequently, advancement in electromagnetic interference (EMI) shielding technology is continuing to become a critical factor in electronics design as various industries move toward miniaturization, lighter weight and higher speeds than the previous generation.
So far, the industry norm has been to use custom designed metallic cans. However, due to its drawback of consuming large, valuable space and requiring complex and inflexible board layouts, alternative solutions to metallic cans are increasingly gaining interest, including sputtering and spraying. While metal sputtering can be used for conformal coating, package designers are finding out that this physical vapor deposition method presents an inherent challenge as it always requires pre-treatment on organic surfaces, temperature control and substantial capital for to its large vacuum chamber machine and supporting materials.
To address these challenges, Henkel has developed a unique, organic silver coating-based material with rheological properties that provide reliable performance in stressful electronic conditions. The thinly coated material (as low as 3 um thick) provides high shielding effectiveness, uniform coating coverage, excellent adhesion to untreated organic surfaces and is applied at room temperature. Furthermore, this novel material technology allows easy production scalability and design flexibility with minimal cost of ownership.

BiografieJinu Choi is a Market Development Manager at Henkel Electronics responsible for global product strategy and business development of advanced materials. He has extensive experience in engineering and product management driving innovative solutions to market in various technology industries including mobile communications, consumer electronics, and telecommunications with products ranging from semiconductors to end user devices. He is based in Henkel Electronics headquarters in Southern California, and holds a BS degree from KAIST and an MBA from Paul Merage School of Business at University of California, Irvine.

BiographyFormerly head of CSEM Zurich Replicated Micro-Optical Elements, Markus became CTO of Heptagon after CSEM’s microoptics division was acquired by Heptagon in 2000. He is an expert on design and fabrication of diffractive and refractive micro-optic components as well as miniature optoelectronic sensing systems. Markus holds a Ph.D. from the University of Neuchatel, Switzerland and a master’s degree in physics from ETH Zurich.

Hprobe - A magnetic field wafer-level tester for MRAM

Lebrun, Laurent
CEO
Hprobe

AbstractHprobe offers the missing test and monitoring solution for MRAM manufacturers and researchers with our 3D magnetic field wafer-level electrical test prober.
To test and design the MRAM stacks, people have to make measurements under perpendicular and planar magnetic fields. In case of Perpendicular MRAM, strength of the field must reach up to 0,5 Tesla.
For Semicon Europa, Hprobe and Spintec, associated laboratory, manufacture an alphatool on an existing prober to be able to make demos and sample tests.
Since 2003, Spintec develops probers with magnetic field generation. For the perpendicular MRAM, Spintec designs a special magnetic head to generate high fields on wafer. This magnetic head is implemented on standard probers and Spintec develops specific softs for testing and analysing MRAM.
Hprobe designs a magnetic head able to generate 3D vectorial magnetic field with a maximum of 0,5 T in perpendicular. This head is patented by CNRS in january 2016. Moreover, Hprobe offers softwares for testing protocols and for physics analysis of statistics measurements.
First application is for MRAM R&D Laboratories.
When Foundries would launch production, they need to have production test system with good throughout and Hprobe develops this tests system.

Online Scheduling applied to 8-inch fabs

Gosselin, Vincent
Director - Optimization Solutions
IBM

AbstractAfter being the pioneer during the early 2000s in developing Optimization based schedulers to replace Rules-Based Dispatch in South Korea’s memory (12-inch fabs) and TFT fabs, IBM Analytics have tuned the technology to provide even greater benefits in high-mix fabs such as foundries in Taiwan, Singapore and the US.
Some of our customers have used our “packaged” software solution FPO (aka FAS: Fab Area Scheduler). Others have opted for our core optimization software to develop their own scheduler themselves adopting concepts similar to FPO’s.
More recently, a few 8-inch fabs have implemented successfully FPO for their Photo-litho and Diffusion processes.
While we expected a much bigger challenge in terms of the acceptance of technology, we have found that 8-inch fabs have as much to gain as their 12-inch counter parts.
A few 8-inch specific requirements had to be modelled/added to the software in particular when certain fabs operate with few operators.
Some simplifications have also been warranted in the face of less specific information being provided by 200mm MES or other external IT systems.
We will share with the audience these experiences in deploying FPO in 8-inch environments:
initial pushbacks, technical and human related challenges, lessons learnt and results/benefits etc.

BiografieDirector Optimization Solutions – IBM Analytics
Act as Optimization & Industry Expert involved with large customer accounts.
Provides consulting to customers in the field of discrete Manufacturing, logistics & transportation with a strong experience in the domain of Semiconductor/Electronics. He spent 15 years in Asia bringing the benefits of optimization technology to large players.
In the early 2000s, his first involvement with Semicon manufacturing was for Samsung with the development of Monthly Production Planning software for the early generation of TFT Plants and later for memory Fabs.
Then his main focus was to propose Optimization-based Software to improve the productivity of Lot Dispatching for front-end Fabs. He designed several versions of ever more sophisticated online Schedulers from RTS (Real Time Scheduler for Samsung Memory) to FPO (Fab Power Ops). The software has since replaced RTD in many 300mm fabs for keys sectors such as Photo Litho and Diffusion. More companies have now embrassed this solution: TSMC, UMC, NTC, ST Micro, Global Foundry etc.
His current mission is to propagate the benefits of “online Optimization” beyond the world of 300mm plants” in particular with 200mm fabs but also in other industries in areas like disruption management for airlines or railways.
Other Positions:
Ilog Asia Pacific – Consulting Director
In charge of the Consulting activities for ILOG’s regional customers with a strong focus on semicon front-end and back-end players: Scheduling Testing Dpt (Back-end), Production Planning, Supply Chain Planning.
HoneyWell Australia - Principal Consultant - Strategic Business Department
Management of several optimization projects for the Australian’s Public Transportation Corporation (PTC) which showed an improved utilization of the client's resource and a better integration between the planning department and the control centre.
Other Information
Author of 12 technical papers on resource optimization in the Manufacturing sectors, Railways and Logistics.

Market trends in printed and flexible electronics

Chansin, Guillaume
Technology analyst
IDTechEx

AbstractIDTechEx has been tracking the progress in printed, organic, and flexible electronics since 2001. This presentation will give an overview of the key market segments which include flexible displays but also sensors and wearables.
Since sensors typically have a much simpler structure than displays or logic circuits, the manufacturing learning curve can be less steep compared to other devices. In most cases, these sensors can also be made on plastic substrates, offering the advantages of mechanical flexibility, thinness and light weight. Recently, there has been a lot of interest in integrating electronics in textiles (e-textiles), where flexibility is essential.

BiografieDr Guillaume Chansin is a senior analyst for IDTechEx Research. Based in Cambridge (UK), he interprets the latest trends and market data in printed electronics, sensors, flexible displays and wearable electronics. He is fluent in French and English and gives presentations in both languages. Guillaume obtained a degree in Physics Engineering from INSA Toulouse, followed by a PhD in Chemical Physics at Imperial College London. Before joining IDTechEx, he worked on flexible e-paper displays at Plastic Logic.

AbstractAesthetics is one of the key factors that determine the evolution of the automotive sector, which need to correspond to visual appearance as well as to ergonomic functionality and utility features. Nowadays, the vehicle interior market demands both visual and functional renovation as well as its integrated electronic devices. Actually, the needs of the driver are covered by a technology based on mechatronic concepts, which has with limited functionality and makes difficult that the aesthetic evolves at the same pace as the market.
Organic and Large Area Electronics (OLAE) is able to trigger innovation in different sectors, such as traditional industries (paper, plastic, printing and textile) to delivers novel cost-effective integration solutions to the traditional electronics sector.
In this context, Roll-Out project (funded by H2020 TOLAE program, 2015-2017) is developing a new concept of automotive door-handle based on OLAE, which will enable enormous value addition to European Automotive industry without adding any significant extra cost. In particular, pressure sensors patented by IK4-CIDETEC (RTD partner), mostly based on interdigitated metal electrodes with several functional layers on top, have been scaled up to R2R process. The printing process has been developed by the Maxi Printed Intelligence R2R pilot line at VTT (RTD partner). The first functional prototype consists of a resistive sensor matrix formed by a 2x4 array with a tactile unit of 1 cm2. After printing process and sensor assembled, resistors have been bonded by an automated pick-and-place system (hybrid integration).
The final step is focused on heterogeneous integration by overmolding process. MAIER (End-User, TIER-1 automotive supplier partner) with the support of VTT has design and developed the new mold, according to automotive manufactures requirements. Different thermoplastics have been tested and injection parameters have also been optimized (pressure, temperature, speed, etc).

BiografieDr. Jaime Herrán received his first class honours degree in Physics at the University of Cantabria in 2004 and his PhD at the University of Navarra in 2008.
He was working at the communication engineering department of the University of Cantabria (2003-2004), the Microsystems unit of the CEIT and Tecnun, University of Navarra (2005-2010) and in 2008, he was working as a postdoc research & development scientist at the Microsystems Technology division of the CSEM in Neuchâtel (Switzerland). Since 2010, he is a researcher and a project manager of the Sensors Unit at IK4-CIDETEC, San Sebastián, Spain.
He is specialized in solid-state microsystems (physical and chemical sensors), coatings technology (PVD, CVD and printing processes) and nanotechnology. He is co-author of more than 45 articles in international journal and conferences (h-index=8). He has taken part in both industrial and research projects under national and international programs.

BiographyJohan Dekoster received the M.S. degree in Exact Sciences (Physics) in 1988 from the KU Leuven, Belgium. In 1993 he received the Ph.D. degree (Physics), also from the KU Leuven. From 1993 till 1999 he held postdoctoral fellowships from the Research Council and the Fund for Scientific Research at the Institute of Nuclear and Radiation Physics of the KU Leuven. In 1999 he joined the OTN business unit of Siemens. He was project leader for several development projects for data, voice, video and LAN. In 2007 he became program manager OTN at Nokia Siemens Networks. In April 2008 he joined imec as R&D manager of the Epitaxy group with responsibility on epitaxial deposition of group IV and III-V semiconductor materials. Since November 2012 he is program manager of the equipment and materials suppliers collaborations within the Semiconductor Technology and Systems unit at imec.

III-V selective area growth on Si: from Logic to Photonic applications

Merckling, Clement
Principle Scientist
imec

AbstractDriven by fabrication cost reduction and device performance improvement, the Silicon semiconductor industry continues its never-ending pursuit of new approaches for fabricating integrated circuits. In this context, the monolithic integration of III-V semiconductors epitaxially grown on Si substrate have been attracting much attention as building blocks for next-generation electronics and photonics due to their potential intrinsic properties.
Direct heteroepitaxy of III-V compound semiconductors on Si has traditionally represented a formidable challenge, due to the high material mismatch (lattice parameter, polarity, thermal coefficient, ...) between Si and III-V semiconductors generating high density of defect density during the epitaxial process. To overcome this, selective area growth of III-Vs in a pre-patterned Si substrate by Selective Area Metal-Organic Vapor Phase Epitaxy allow the possibility to obtain high quality and reduced defect density III-V based active layers onto standard Si(001) substrate.
Using this approach we integrate III-V materials monolithically on Si while focusing on both ultimate trench widths (W < 20 nm) scaling as well as relaxed trench dimension in function of the targeted application. We report here on the heteroepitaxy of InP buffer on initiated from a < 111 > V-groove Si surface and discuss the unique relaxation mechanism of such compound with respect to Si substrate. We derived a fundamental understanding and theoretical modeling of the growth mechanisms in STI trenches as well as the determining role of the InP nucleation layer. The subsequent growth approach of InGaAs active layer, used for both nFET or Laser applications, is further studied.
Finally, III-V based electronic and photonic devices realized using selective area growth technique are presented and benchmarked to the current state of the art.

BiografieClement MERCKLING received the Dipl.-Ing. degree in Microelectronics in 2004 from the Superior Institute of Electronic and Numeric (ISEN) and the M. S. degree in Material Sciences in 2004 from the University of Lille. He obtained his Ph. D. graduation in Material Sciences from the Ecole Centrale de Lyon in 2007. His researches were focused on the Molecular Beam Epitaxial (MBE) growth of High-k dielectrics on Si for CMOS devices. In 2007, as postdoctoral research associate from the Katholieke Universiteit of Leuven, he joined IMEC Ge/III-V program. During the period 2008 - 2013, he was research and then senior scientist at IMEC, driving the Molecular Beam Epitaxy (MBE) activities including III-V semiconductors epitaxy, high-k oxides growth and high- channels (Ge, III-As, III-P & III-Sb) passivation studies. Since 2013, as a principle scientist, he took responsibility of all Group III-V epitaxy activities, focusing on selective area growth of III-V compounds by Vapor Phase Epitaxy (MOVPE), key step for future CMOS technology nodes. He is the author or co-author of more than 100 papers in scientific journals and more than 120 contributions to international conferences. He received in 2008 the “Young Scientist Award” from the City of Lyon as well as the Researcher (CR2) CNRS entrance exam from France.

AbstractConnected sensing technologies and heterogeneous communication networks will transform our communication devices, personal gear, cars, homes, appliances, building and city infrastructures into even smarter systems. Systems that adapt to our personal needs by sensing and interpreting the environment in which they operate, through their own sensor information as well as cloud connectivity. This brings huge opportunities for innovation, for designing new applications and even creating whole new markets.
At imec and the Holst Centre, we create the building blocks for the IoE of tomorrow. On the one hand these are ultrasensitive, compact and energy-efficient sensor modules, e.g. image sensors, chemical sensors, and body monitoring sensors. But we also work on the communication: multistandard radio chips, integrated solutions, 60GHz high-datarate communication, and even on-chip optical solutions to help manage the enormous quantity of data in the cloud. We have also developed a thin-film technology that allows the realization of NFC, RF-ID, and a multitude of other electronic functions, in a low cost way and with very thin and flexible form factors. Using this technology, electronic circuits and devices can be made and integrated in a way that they ‘disappear’ in the environment, enabling ‘electronics everywhere’.
In the imaging space, we are working on novel TDI approaches based on CCD pixels within CMOS technology, we are also working on hyperspectral image sensors and we are doing work on ultrasound and radar imaging and start to combine these image modalities in sensor fusion projects. This talk will address the different technologies we are working on and give an overview of the results we have reached so far.

BiografiePiet De Moor received his PhD in Physics from University of Leuven in 1995. After joining imec in 1998 he consecutively lead different sections and groups in the areas of MEMS packaging, 3D Integration and Pixel Design and Test. The last years he was Program Manager Imagers. He has been technically coordinating several bilateral, EC, ESA, and nationally funded projects on advanced imaging systems. Recently he is appointed Senior Business Development Manager Imagers.

EUV lithography industry status: progress and challenges

Hendrickx, Eric
Program manager
imec

AbstractEUV lithography has seen rapid progress over the last 2 years. The first ASML NXE:3300 production tools have now been installed at the main chipmakers and can be tested for pilot production. Most importantly, the rapid improvement in EUV source power has restored credibility to the source roadmap and is a key enabler of the technology. Some important improvements remain to be demonstrated, but overall the technology is now getting closer to production.
Imec started work on EUV lithography in 2006, and from 2008 to 2011 was one of the 2 sites that had an EUV alpha-demo tool operational. Subsequently, Imec was one of the first 2 sites to install an ASML NXE:3100 EUV pre-production scanner, and in July of 2015 completed the installation of the ASML NXE:3300 EUV production scanner. In this presentation we will review the main progress that was made industry-wide over the last years, give current status of the EUV resists, masks, and scanner, and conclude with the main challenges that still lie ahead before EUV can become fully production worthy.

BiografieEric Hendrickx graduated from the University of Leuven in 1996, and subsequently from 1996 to 2001 was a postdoctoral research scientist at the University of Arizona (Optical Sciences Center) and the University of Leuven. In 2001 he joined the lithography department at imec, focusing on imaging and the characterization and on the introduction of the first 193nm high-NA immersion scanners into the imec cleanroom. In 2008, he started work on EUV lithography, and worked subsequently on ASML EUV Alpha-Demo tool, ASML NXE:3100 preproduction scanner, and ASML NXE:3300 scanner at imec. He currently is program manager at imec, and team lead of the imaging and reticles team.

Semiconductor Technologies for Smart Mobility

Beckers, Steve
Vice President
IMEC IC-link

Abstract80% of the key innovations in cars today are enabled by semiconductor technologies. An average car contains about 7000 semiconductor components and that number will strongly increase over the next decade. Intelligent sensing and connectivity technologies are paving the way to change driving a car into a smart mobility experience that will be offered as a service. It will also tremendously increase the average duty cycle of car usage and will put challenges to the reliability requirements for this use case. The connected car will also need to keep pace with the rapid innovations in multimedia technologies and will need earlier access to advanced CMOS nodes, but also to new semiconductor technologies that enable advanced sensing and energy management. This presentation will cover new semiconductor technology developments that will enable smart mobility for the next decade driven by progress in radar, lidar, image sensing technologies, connectivity, power electronics and solid state battery technology.

BiografieSteve Beckers accumulates 34 years of experience in the semiconductor industry.
He started his career as ASIC Design Engineer in Alcatel, and subsequently occupied positions as Product Engineering Manager and Quality Manager in Alcatel Microelectronics.
In 1995 Steve started working at Alcatel Headquarters, and in 2002 he joined STMicroelectronics where he developed the ST Connectivity Products Business.
Since 2013 Steve works at imec where he is Vice President and General Manager of imec IC-link.

Continuous monitoring of manufacturing processes dedicated to PE

POPOVIC, Michel
GENERAL MANAGER
IN-CORE Systèmes

AbstractContinuous inspection is the key point to maintain yield targets and to ensure the repetitiveness in printed electronics manufacturing processes. Among the inspection techniques, the real time control based on visual inspection 2D and 3D is the most comprehensive solution. The multipurpose sensors (cameras) with adequate light source are used above all to run properly the process. The positions, overlap, registration of all printed/coated features are controlled with very high resolution. The process defect such as printing, coating defects which have the functionality impact on the elements (circuits, cells, sensors) are detected and localized to be removed in downstream process. This inspection solution offers also a huge flexibility which is essential for the processes which are in permanent modification toward the new ways and standards.
The implementation of visual inspection into printing electronics process flows is demonstrated on two case studies:
• circuit components from printing processes
• organic photovoltaic manufactured in coating process.
Image acquisition conditions are discussed as a function of used substrate and ink properties. It is shown for both examples that it is feasible to highlight crucial defects such as short circuits and circuit breaks, lack and excess of inks and inclusions of foreign particles and thus directly relate optical impact to electrical yield. “

BiografieMichel POPOVIC received his degree in Electrical Engineering (CUST University, Clermont-Ferrand France) and obtained his Phd Thesis in Electronics in 1993 at "UFR de Recherche Scientifique et Technique"-University Blaise Pascal in Clermont-Ferrand France. From 1988 to 1998, he worked as the R&D project leader at Centralp Automatism (Vénissieux- France) being in charge of the systems architecture development integrating automatic real-time inspection dedicated to industrial applications. In 1998 he co-founded IN-CORE SYSTEMES, an established technology company known in the field of vision inspection whose expertise focuses on designing imaging systems line-scan camera based and providing optical methods for high-valueadded surfaces inspection and measurementS solutions for quality control and process characterization oriented - meant for Printed Electronics applications among many other fields

Automotive Packaging - Growing Importance of System Integration

Pressel, Klaus
Senior Manager
Infineon Technologies

AbstractIn automotive vehicles more than 80% of the innovations are created by electronics. These innovations contribute to growing applications like comfort, security, safety including autonomous driving, energy efficiency and different kinds of sensor and lighting systems. High-end cars already today include several thousands of semiconductor devices. The standard gasoline and gas automotive vehicles, hybrid cars as well as in the long term full electric cars tackle the CO2 problem and ask for less energy consumption. For all these new applications we need more and more system integration, which means integration of more functionality into a smaller volume. By these facts assembly and packaging is getting of growing importance. Today typically standard leadframe based packages like QFP or DSO are applied in automotive, but this will change.
In this contribution we introduce into automotive packaging where especially the chip-package interaction plays a major role. This is e.g. the case for mm-wave radar devices for autonomous driving, for sensors including MEMS devices, which become ever more important, as well as for different kinds of power devices like drivers for LEDs. We introduce into the fan-out WLP possibly with integrated antennas, 3D technologies, new dedicated MEMS and sensor technologies, as well as chip embedding technologies. We especially highlight the importance of materials, which are the key for the requested long-term automotive reliability. In the last 10 years most package materials changed and this trend will proceed for the next 10 years. This includes wire bond materials, mold compound, die-attach materials e.g. for sintering and diffusion soldering, as well as dielectrics and bump materials. 3D technologies and different interfaces must be better understood in system in package components. We conclude the contribution with highlighting the importance of chip-package-system co-design on the way moving to system integration.

BiografieDr. Klaus Pressel studied physics at the University of Würzburg and with a scholarship of the German DAAD (“Deutscher Akademischer Austauschdienst”) at S.U.N.Y. Albany (N.Y., U.S.A.). He received his doctoral degree (PhD) from the University of Stuttgart on “Optical Spectroscopy of 3d and 4f Transition Metal Elements in III/V Semiconductors”. He then joined IHP Frankfurt (Oder) for 8 years where he focused on both Si CMOS and SiGeC R&D. He was a department head for „Material, Diagnostics, Foundry” and also worked on design methodology, modelling and simulation. In 2001 Klaus joined Infineon Technologies at Regensburg, where he now focuses on innovations in assembly and packaging technology. His special interests are system in package (SiP) solutions, high frequency applications, and chip-package-system co-design. Klaus is representing Infineon in the technical committees of the European EUREKA programs CATRENE and EURIPIDES. He recently was project leader of one of the largest European ENIAC JU projects entitled ESiP (Efficient SiP: Reliability, Failure Analysis and Test), which had 41 partners from 9 European countries. This project achieved the European ENIAC JU 2013 Innovation Award. Klaus represents Infineon in various technical committees of international conferences, e.g. SEMI Advanced Packaging (in Europe), 3D IC, ESTC, and EMPC. Klaus is author/co-author of more than 150 papers in semiconductor physics and technology, circuit design, assembly and interconnect technology and owns/co-owns more than 15 patents.

Smart Sustainability

Pophal, Christian
Senior Director
Infineon Technologies

AbstractAt Infineon we see the objective of sustainability as leaving future generations a world worth living in – a truly great responsibility. Similar to achieving of economic targets, sustainability is absolutely key to the way we operate.
Our products and innovations enable savings of approximately 36.5 million tons of CO2 emissions during their useful lives in end-user products – a net reduction of approximately 35 million tons more than the CO2 emissions generated during the manufacture of those products. We offer products that make our lives easier, safer and greener.
This goes hand in hand with optimizing our own ecologic footprint. Under the umbrella of our global Energy Efficiency Program we continuously assess energy efficiency potentials under ecologic and economic considerations. In 2015 we have implemented measures that saved an annual volume of 14.31 gigawatt hours of electricity and district heating at our frontend sites.
In recognition of our achievements, in 2015 we were listed in the prestigious Dow Jones Sustainability Index for the sixth year in succession and, for the first time, we were the only European semiconductor manufacturer to be listed in the Dow Jones Sustainability™ World Index.
The ongoing identification and realization of further potentials for resource conservation in manufacturing requires new and innovative concepts towards smartification. Innovative approaches – such as big data analysis and industry 4.0 concepts – provide new opportunities. The initial results we gained from those approaches are very promising.

BiografieProfessional Career
Since 2004 Infineon Technologies AG, Munich
Current Position Senior Director Business Continuity
Global Head of Sustainability and Business Continuity Planning
■ Energy Management
■ Corporate Social Responsibility and Sustainability
■ Environmental Protection and Technical Safety
■ Business Continuity Planning
Member of the Board Committee for Energy Efficiency, Climate Protection and Environmental Protection of the German Electrical and Electronics Industry Association (ZVEI)
Member of the Committee Environment, Technology and Sustainability of the German Industry Association (BDI)
1999 – 2004 German Electrical and Electronics Industry Association (ZVEI)
1998-1999 Institute for Mikrotechnologie Mainz (IMM)
1998 PhD. in Material Science at the Technical University Darmstadt and the Sophia Universität Tokio,
Japan
1994-1998 Studies of Chemistry at the Technical University Darmstadt

Lifetime modeling for packages with galvanic isolation

Schaller, Rainer
Development Engineer
Infineon Technologies AG

AbstractIn More-than-Moore applications, the number and complexity of those micro devices increases, which are directly integrated into control units of power electronic systems that typically operate at working voltages in the range of 220-1000Vrms.
This paper describes the methodology for finding a lifetime (LT) model of such semiconductor devices. In focus is design for reliability as well as keeping test time short to reduce time to market.
A model function is presented based on a physical description of fail modes and the effects of environmental conditions.
The investigated device is a magnetic field current sensor.
The methodology explains the way from laboratory test to LT calculation. To reduce test time accelerated stress tests are used.
Occurring physical effects and their relevancy for the product have to be understood. One example is partial discharge. Voids in material layers are of great concern as they strongly contribute to the isolation behavior.
The acceleration stress is a high temperature, high humidity and voltage biased test e.g. Ttest=85°C, r.H.test=85%, Vtest=1400V DC.
The current sensor has a galvanic isolation between sensor IC and a portion of the leadframe (measurement path).
The device is specified with functional isolation 600Vp and a measurement current up to 50A.
The acceleration drivers voltage, relative humidity and temperature have various physical influences on the aging effects and are therefore represented in different acceleration terms in the model function.
The LT of our device is given by the equation:
tlife=ttest*eβ(Vtest-Venv)*(rHtest/rHenv)n*e Ea/kBT(1/Tenv-1/Ttest)The LT tlife is calculated by multiplication of the test time ttest with the acceleration factors. The parameters β, n and Ea stand for certain failures.
A statistical distribution of failure rate can finally be calculated. Folding with mission profiles from applications an accumulated degradation can be derived as well as definitions for test setup to proof a quality target.

Biografiestudy of physics in Würzburg
received diploma degree in 2011
diploma thesis: "Transport phenomenons in Quantum-Hall and Quantum-Spin-Hall-Regime" at the chair of Experimental Physics for Low Temperature physics, quantum transport and spintronics
since 2011 with IFX
2.5 years as process engineer for optical wafer inspection in Front End production
since march 2014 development engineer at Sensor Package Development
Working on Ph.D. thesis "Insulation Coordination and Lifetime Modeling for Current Sensors" in parallel.

The Right Security for Smart Cities

AbstractA smart city is based on the vision to connect a multitude of information and communication (ICT) technology solutions with physical devices in order to manage a cities assets in an intelligent way. These assets can include schools, hospitals, local governmental information systems, waste management, power plants and water supply networks, all of which are managed through an ICT network. This comes along with vast amounts of data being collected and then transferred, processed and analyzed, including data on individual citizens and critical infrastructure data. To protect this data and therefore enable the operation of the different systems and services, data security and system integrity are essential for the successful implementation of the Internet of Things in city infrastructures.
Smart Cities with their complexity come with a large amount of attack surfaces and one of the main weaknesses that could be turned around is the current lack of smart technology including strong security functionalities. Current technology often comes without security functionality or is based on pure software-based security.
Unfortunately, software - due to its nature - bears several significant weaknesses.
Software is written code, and code can be read and analyzed. And once it is analyzed, it can be modified to the requirements of an attacker and system integrity can be broken.
However, software can be protected by hardware: hardware protects the processing and storage of code by using encryption, fault and manipulation detection, and by providing secured data storage. This has been proven by extensive experience from the areas of trusted computing and the use of secure elements in mobile phones.
Following the same principles, hardware-based security tailored to ICT requirements provides a trust anchor for digitized and connected cities and helps to secure citizens privacy, efficient operations and public safety as well as economic stability.

BiografieJuergen Spaenkuch
Division Vice President Chip Card & Security (CCS)
Infineon Technologies AG
- born on April 22, 1969
- in Rastatt, Germany
- married, 2 children
Juergen Spaenkuch studied at the University of Applied Sciences in Karlsruhe from 1991 to 1997 and holds a Master degree in informatics.
He started his professional career at Siemens AG in the Memory Products division of the semiconductors business unit, which later became Infineon Technologies AG.
In the years thereafter, Mr. Spaenkuch held various positions in logistics, technical marketing and product management and also had managerial responsibilities for the Automotive and Chip Card Divisions of Infineon.
In 2008, Juergen Spaenkuch became the head of the Embedded Security product segment of the Chip Card
Division.
Since July 1, 2011, he is the Vice President and General Manager of the business line Platform Security
within the Chip Card & Security (CCS) Division.

Advanced silicon devices - Applications and Trends

Deboy, Gerald
Sr. Principal
Infineon Technologies Austria AG

AbstractSwitch mode power supplies for eg telecom and server applications show a continuous increase of efficiency over the last decade. Reviewing major conferences such as APEC or calls for funding creates the impression that progress in power electronics can only be brought by wide band-gap devices such as SiC- or GaN based power switches. This presentation will hence highlight how silicon based power devices are responding to these requirements. Choosing the right topology and control method helps to overcome material limitations. Typically these solutions require more complex control but offer the benefit of well-established technologies. Furthermore future generations will continue to push the boundaries of today devices to even better performance.
The presentation will take an unbiased view on silicon based power devices versus their wide band-gap fellows both from a device as well as application perspective.

BiografieDr. Gerald Deboy received the M.S. and Ph.D. degree from the Technical University Munich in 1991 and 1996 respectively. He joined Siemens Corporate Research and Development in 1992 and the Semiconductor Division of Siemens in 1995, which became Infineon Technologies later on, contributing mainly to optical investigation methods for ICs and power devices during this period. His research interests were later focused on the development of new device concepts for power electronics, especially the revolutionary COOLMOS(TM) technology. From 2004 onward he was heading the Technical marketing department for power semiconductors and ICs within the Infineon Technologies Austria AG. Since 2009 he is leading a business development group specializing in new fields for power electronics. He is a Sr. member of IEEE and has served as a member of the Technical Committee for Power Devices and Integrated Circuits within the Electron Device Society. He has authored and coauthored more than 70 papers in national and international journals including contributions to three student text books. He holds more than 60 granted international patents and has more applications pending.

BiographyJoerg Recklies has been in the semiconductor industry for 23 years with responsibilities ranging from Chip design to IDM productuin. He is currently in charge of Senior Director of Production at Infineon Technologies. Prior to that, Joerg Recklies held several positions in Automation and Productions at Infineon. These positions contributed to his excellent experience in terms of operation,equipment, processes and automation. Earlier in his carrier at Diehl he has made contributions in digital and analog Chip design. Joerg Recklies holds a graduate engineer for Semiconductor.
Highlight during the time with Infineon:
- Establish high automation at IFD 1995-1997 as project leader software Integration
- Lead world wide cost reduction project within Infineon Frontends Productions from 1999 –2003
- Section Manager Plasma Etch / Wafer Inspection 2003- 2007
- Director Maintenance Engineering and Facility Management 2007 – 2013
- Enable 300 mm Line for Power and qualify the first products 2011-2013
- FAB Manager of 200/300 mm Lines 2014-today

BiographyDr. Oliver Pyper (m) holds a Diploma in chemistry and a PhD in natural science. After investigating basic principles of electrochemical effects in thin film oxides at the Technical University of Berlin, he joined Infineon Technologies Dresden in 2000. Until 2005 he was responsible for a module of the DRAM-technology and managing several projects for optimising current technologies and fast ramp of new technologies. In 2005 he took new challenges in the field of semiconductor production by managing several projects to improve the manufacturing landscape. Since 2007 he is responsible for programmes for research, development and innovation at Infineon Dresden. Beside this, he is leading several R&D-projects funded by national and EU bodies.

High Dynamic Range (HDR) stereo camera system for applications in robotics

AbstractIn modern manufacturing lines the use of robotics will further increase in the future. In traditional e.g. automobile production the robot working area is separated and secured from direct contact to workers for safety reasons. But in fabrication processes where an interaction between the worker and the robot is desired, sensor systems must give the robot systems their senses to establish a secure human-machine-collaboration. Sensors can be placed on the robot at the point of interaction or be installed distantly to remotely monitor both man and robot. The visual information from an imaging system is the most important information to recognize, navigate and interact with humans and objects. In addition nonverbal communication can be perceived in order to react accordingly.
A 3D-sensor system consisting of a High Dynamic Range (HDR) stereo camera board combined with an embedded processor board for real time depth map calculation was developed for human-robot-interaction. HDR image acquisition with a logarithmic opto-electronic conversion function (OECF) is well suited for image processing algorithms based on edge detection operators especially under uncontrolled lighting conditions, like depth calculation from stereo images and object recognition. For robotic applications where a small form factor und low weight is required at the robot’s point of interaction a HDR stereo camera head with serialized stereo data transmission has been build up.

BiografieMarkus Strobel received a degree in Electrical Engineering (Dipl.-Ing.) from the University Stuttgart, Germany, and heads the Department Vision Sensors at the Institute for Microelectronics Stuttgart (IMS CHIPS). He has been with IMS CHIPS since 1997 and focuses on CMOS Imaging, namely development of high dynamic range CMOS (HDRC) image sensors, optical characterization, optical and electrical test environments as well as camera system integration for automotive, industrial and custom specific applications.

Towards Smart and Connected Urban centres

Mc Carthy, Jessica
TBA
Intel

AbstractWe are experiencing the largest demographic population shift in history of mankind, driven by the mass movement of people from rural to urban
centres. This mass movement to urban centres shall drive the requirement for adaptive and responsive infrastructure which will be paramount for capacity, prosperity and liveability of our future cities
A key technology trend which shall enable these future urban centres is the Internet of Things (IoT) driven by the explosion in growth of connected things / devices, projected to reach 50 billion+ devices by 2020.
This talk shall cover the future challenges, technology trends and opportunities for technology companies with these new Urban IoT centres of the future.

BiografieJessica McCarthy is a senior research scientist with Intel Labs Europe. She is currently with the Internet of things system research Lab where her focus it on the future of IoT technologies and research. Jessica is currently driving a future cities research program with Trinity College Dublin. Jessica has been actively involved in the European Framework Program (FP) working on various projects such as SLA@SOI and PLANTCockpit.
Jessica has been with Intel since 2005 and brings with her over 15 years of IT Industry experience.
Jessica others areas of interest include IOT, sensing, cloud computing, infrastructure management, enterprise architecture amongst others.
Jessica graduated with a B.Sc. in Computer Science and Mathematics from the National University of Ireland Maynooth 1999, she was awarded an honours M.Sc. in Computing (IT) from the Dublin Institute of Technology 2008 and is currently pursuing her PhD with Trinity College Dublin. She holds a number of patents in the field of IoT.

AbstractWith a strong track record of sustainability leadership Intel Corporation continually seeks to increase the handprint of its products while reducing the footprint of its operations. The strategies employed by Intel to reduce its carbon footprint include
..Taking into account the environmental impact when selecting sites, designing buildings, setting performance levels for manufacturing tools, and establishing goals for new production processes
..Continually seeking to reduce the environmental impact of the manufacturing operations by incorporating green design standards into the construction of facilities.
..In the past two decades Intel has reduced its direct emissions by 60% on an absolute basis while expanding its manufacturing capacity. Furthermore Intel has made a commitment to reduce direct emissions by an additional 10% on a per unit basis from 2010 levels.
..Manufacturing semiconductors is an energy intensive process and reducing energy use at manufacturing sites is a key component of Intel’s strategy to reducing its overall carbon footprint.
..Another key component to reducing its carbon footprint is continued support of the alternate energy market. Since 2008 Intel has been the largest voluntary corporate purchaser of green power in the U.S. according to the U.S. EPA. In 2015 as part of the U.S. White House Climate Pledge Intel adopted two new alternate energy goals to reduce our carbon footprint.
..Intel maintains a multi-site, 3rd party verified ISO14001 registration, and ISO 50001 certification (at 4 manufacturing sites). The ISO14001 registration helps Intel to evaluate the effectiveness of its environmental management system while the 50001 ensures that there is a robust energy management system in place.
This presentation will outline Intel’s achievements in the areas of LEED certification, energy efficiency, alternate energy and also include an overview on the implementation of ISO 50001.

BiografieManager of Intel's Corporate Services Energy Conservation Program. The Energy Conservation Program seeks to design, procure, build, & operate Intel’s operations for optimal energy efficiency. Between 2012 - 2015 Intel has invested more than $120M on resource conservation and efficiency projects to reduce energy usage in its operations and reduce its carbon footprint.

Capraro, Bernie
Research Manager, Silicon Technology
Intel Research and Development Ireland Ltd

BiographyBernie Capraro graduated with a Masters Degree in Engineering with distinction from Newcastle upon Tyne Polytechnic in 1990. Bernie has worked in the semiconductor industry since 1987. He worked in Telefunken in Germany developing a liquid phase epitaxial growth process for GaAs based laser diodes. With Northern Telecom (Nortel), Bernie worked on the development, transfer and sustaining of numerous process technologies to manufacture state-of-the-art laser diodes and photo detectors based on GaAs and InP. In 1994, Bernie became a Customer Engineer for Applied Materials (AMAT), supporting AMAT toolsets (metal etch) located in various Customer fabs in Northern Europe. In 1995, Bernie moved from AMAT to Newport Wafer Fab (NWL) in Wales, where he became a Shift Engineer supporting all areas of the fabrication process. In 1997, Bernie moved to Intel Ireland and became the metal etch tool owner. Since that time, Bernie has held many roles within Process Engineering including Chemical Mechanical Polish (CMP) Equipment Engineer, Fab24 Non Copper and Copper CMP Process Engineering Group Leader. In January 2006, Bernie transitioned to a new Project Management role supporting EU collaborative Research, specifically in the Nanotechnology field. In this role, Bernie successfully developed and managed more than 20 collaborative projects in the region involving many partners from Research Centres, Academia and Industry. Since 2015, Bernie has been the Research Manager at Intel Research and Development Ireland responsible for all silicon nanotechnology research involving Intel in Ireland, helping to deliver potential solutions to Intel for materials, devices, equipment and processing techniques required for the future technology nodes.

CMOS Image Sensor Scaling Enabled by Direct Bond Technology

Cook, Kathy
Director of Business Development
Invensas

AbstractCMOS image sensors (CIS) have experienced substantial growth over the last 20 years due to the ability of their fabrication technology to scale. Although much of this growth has come from traditional node scaling, pixel sensitivity has required the implementation of a new volume manufacturable fabrication technology to support further image sensor scaling. These requirements have been met with a direct bond technology that has enabled multiple generations of 3D image sensor manufacturing and lucrative commercial success for its adopters. The first generation used a low distortion insulating direct bond of a front side CMOS wafer to a silicon handle wafer. This enabled backside illuminated pixels which improved light absorption and facilitated pixel scaling below 1.75um. The second generation also used a low distortion insulating direct bond of a front side CMOS wafer to another CMOS wafer front side in addition to TSVs exterior to the pixel array to interconnect the stacked CMOS. This stacking enabled a substantial improvement in die size, process and CMOS cost, and pixel heating by introducing a vertical scaling component. The third generation replaced the low distortion insulating direct bond used in the first two generations with a low distortion hybrid direct bond enabling submicron scalable per pixel 3D electrical interconnections interior to the pixel array and the elimination of expensive TSVs.
This presentation will describe insulating and hybrid direct bond variants invented and developed at Ziptronix and now available from Invensas which have been registered and are known as ZiBond® and DBI®, respectively. Realized CIS scaling and potential further improvements in CIS enabled by use of direct bond technology will also be discussed.

BiografieKathy Cook has over twenty years of experience in the semiconductor industry. Prior to joining Ziptronix, which was acquired by Tessera last year, she held engineering, technical sales and business development positions with companies such as Applied Materials, Millipore Corporation, ULVAC Technologies and SUSS MicroTec. For the past ten years, she has focused on 3D integration. She holds a Bachelor of Science degree in Mechanical Engineering from the University of Texas Austin and a Master of Materials Engineering degree from Auburn University.

Next Generation Human Activity Sensing For Smart Buildings

CROZET, Guillaume
VP Sales & Marketing
IRLYNX

AbstractIRLYNX develops and manufactures human activity sensing modules for Smart Cities, Smart Buildings and Smart Homes.
We use thermal infrared technology to deliver advanced data about people activity. In particular, our sensing modules are able to detect presence or absence, count people, evaluate location, assess motion direction, distinguish human from animal and recognize posture.
IRLYNX all-in-one sensing modules include optical lens, pyroelectric sensor, microcontroller and dedicated firmware. They deliver already processed data and are ready for integration into end-user products (intelligent sensors, smart lights, connected objects...).
IRLYNX products enable an increase in comfort, energy savings, enhance home security and assist elderly people in their day-to-day living.
A disruptive technologyIRLYNX designed a passive infrared detection array that uses the heat that any human is emitting and transform it into electric signals.
To do so, we acquired an exclusive, all markets license of a specific infrared technology based on CMOS, and that has already been industrialized for thermal fingerprint sensors. This technology is compatible with mass-market and allows very low cost, hence shifting a paradigm in the IR sensors market.
Another innovation is our module approach: we combined our unique thermal technology with radically new IR optics, along with state-of-the-art embedded algorithms. This module approach brings several advantages:
- The product is plug & play. One just needs to put it into a casing and to add a power supply and communication module to build an end-user product.
- The IR signal is processed directly inside the module, allowing real-time data processing, low power consumption, along with guaranteeing people's privacy.
ConclusionIRLYNX’s sensing modules offer an unparalleled price-performance ratio, delivering the right level of advanced human activities information for the best, affordable and consumer market compatible cost.

BiografieGuillaume CROZET
VP Sales & Marketing
Graduated from the EDHEC Business School, 15 years of experience in the technology and software markets
Joined IRLYNX in January 2016 to accelerate business development and accompany IRLYNX’s customers in their product launches.

How Semiconductors Firms Can Address their Documentation Challenges Using the IXIASOFT DITA CMS

Kerzreho, Nolwenn
Technical Account Manager for Europe
IXIASOFT

AbstractThe intellectual property contained within semiconductor documentation is high-value and often expensive to create and maintain. If your engineers are spending too much time searching for and updating content and your end-users cannot find the accurate content on your information portals, then IXIASOFT can help. You’ll be able to create, reuse and deliver content to your customers and partners through portals and traditional channels while also reducing costs.
With the IXIASOFT DITA CMS, our Semiconductor customers can:
• Rapidly deliver accurate information on-time – even with short product cycles
• Reduce the amount of time required to update information
• Deliver tailored content that is consistent and accurate
• Make your information easier for your users to find
• Increase brand consistency
• Translate content for a global marketplace, while reducing translation costs
The IXIASOFT DITA CMS provides organizations with a solution to manage their entire DITA technical documentation process. As part of this offering, DITA CMS provides various tools that are tailored to different types of users that participate in the process, including technical writers, engineers, chip designers and other members of your engineering teams.
Want to hear why Qualcomm, Ericsson, ARM, Altera and others are now using the IXIASOFT DITA CMS? Meet us at Booth 352.Founded in 1998, IXIASOFT is a trusted global leader in the XML content management software industry. Its signature product, the DITA CMS, is an award winning, end-to-end component content management solution (CCMS) deployed by industry leaders. From authoring to reviewing, localizing and publishing, DITA CMS provides all the tools required for large, global organizations to support their entire information development process. IXIASOFT solutions are accessed by thousands of users worldwide in hi-tech, heavy machinery, semiconductor, and medical device manufacturing industries.
For more info and use cases, please visit ixiasoft.com.

BiografieNolwenn Kerzreho is the Technical Account Manager for Europe at IXIASOFT and has more than a decade years of experience in the technical communication industry, from information development, to knowledge management, localization and delivery. Nolwenn holds a Master’s degree in Technical Communication, Translation, Terminology and Project Management from the University of Rennes (France).
Based in France, Nolwenn has international experience in the chemical, Telecom, language, and software industries.

AbstractAutomotive, Security, Consumer – cameras have found their way into many areas. Whether it is technical gadgets like action cameras, drones, Array Cameras, mobile phone cameras, 3D-imaging- and gesture recognition systems; or assistance systems like surveillance cameras, parking assistance, and advanced driver assistance systems (ADAS) – the spectrum of applications is broad and will become even broader in the future.
And with each application there is a different demand on design and manufacturing. For instance, production of a miniaturized camera with high performance but at low cost alone has its challenges. Add ‘in high volumes’ to the list and you start discussing cycle time, yield, and process stability.
Using an existing product as an example this talk will illustrate how camera performance, yield, and cost are linked to assembly technology amongst other factors.
This talk will touch on topics such as: ∙ camera technology challenges ∙ assembly technologies, with focus on Active Alignment ∙ testing and automated test equipment ∙ market trends

BiografieThomas Maack started his career at Fraunhofer IOF Jena in 1993 and received his Ph. D. in physics at Friedrich Schiller University Jena. After five years of research in the field of coherent optics, he entered the “Digital Projection” business division of Carl Zeiss Jena, which later merged into Jabil Optics Germany (former Sypro Optics). Jabil is a technology-driven design and manufacturing service provider with headquarters in St. Petersburg, USA. Thomas Maack is part of the product development department focussed on system architecture.

BiographyJoe Mai is founder and managing director of JEM Europe, the European subsidiary of Japan Electronic Materials, a global leader in wafer-probing technologies. For more than 20 years, he's held both technical and business-development positions in the US and Europe, including R&D, design and production management, and applications engineering. During these two decades, he has worked closely with hundreds of customers around the world to improve their test capabilities and to develop JEM’s technologies.

Getting Self-Driving Cars on the Road

AbstractThere is a revolution growing in the automobile industry: the self-driving car. Today, the car manufacturers have research and development teams working around the clock to get this technology on the road. However, in order for the general public to embrace this disruptive technology, one major hurdle remains: automotive electronics must provide the performance and safety required for ADAS (Advanced Driver Assistance System).
To input the information necessary for keeping a vehicle and its passengers safe, an autonomous car will deploy at least 16 sensors, including cameras, radar, Lidar, ultrasonic and other wireless sensor technologies. For cars to be able to drive themselves, these all of the inputs from the sensors must be fused, resulting in the creation of multiple Giga Bytes (GBs) worth of data. The ability to compute this enormous amount of data requires centralized data and demand “supercomputers” or, rather, much higher performance ECUs than currently available. These so-called “number crunchers” must be able to carry out multiple, diverse tasks.
By introducing its MPPA manycore processor, Kalray hopes to help the automobile industry overcome this hurdle. Kalray’s processing device is well-suited for performing the various electronics tasks needed by automakers to manufacture autonomous vehicles. The device can also be used for other processing tasks that require standard software programmability, high performances, low power consumption and the support of functional safety.

BiografieStéphane is a successful executive with a combined 20 years of experience in business (Sales; Marketing; Business development; BU Mgr) in the semiconductor industry around wireless, video and embedded applications.
Prior to his role at Kalray, Stéphane held various business and management positions at STMicroelectronics and ST-Ericsson, where he worked in business development with major OEMs and platform-makers for mobile applications and the multimedia industry.

Automated wafer-level testing of high voltage devices and structures

Cejer, Mark
Marketing Director
Keithiley Instruments / Tektronix

AbstractAs demand increases for semiconductor devices with breakdown voltages greater than 1kV and leakage currents under 1nA, yield optimization becomes a more critical issue for the fab. To ensure adequate yield at these higher production volumes, Engineers have considered adding new workflow steps such as process control monitoring (PCM) and die sort for identifying process failures at the wafer level, thus improving overall profitability and time-to-market.
However, due to the complexities typically associated with wafer-level testing over 1000V — such as instrumentation setup, cabling, probing, automation, and safety — high voltage wafer-level testing has not been widely adopted.
The new Keithley S540 Power Semiconductor Test System addresses these issues and reduces overall test time by enabling fully automatic, sub-nA parametric measurements up to 3kV in a single probe touch-down.
In addition, the S540 eliminates the time needed to manually change the test setup when moving from low voltage (< 200V) to high voltage ( >200V) wafer-level tests by automatically switching across a maximum of 48 pins.
Come learn how the Keithley S540 can help improve overall yield by performing fully automated wafer-level tests, including high voltage breakdown, capacitance, and low voltage measurements, in a single probe touch-down.

BiografieMark Cejer is responsible for Keithley's Parametric Test System business. During his 25 year tenure at Keithley, he has held a variety of Marketing and Sales roles, and has led the development and launch of many Keithley products, including SourceMeter SMU Instruments, DMMs, and more.

Automated 3kV Wafer Level Testing

PRONIN, ALEXANDER
Lead Applications Engineer
Keithley Instruments

AbstractDue to the complexities typically associated with high voltage (HV) wafer-level testing — such as instrumentation setup, cabling, probing, automation, and safety — on-wafer HV testing is usually limited to characterization labs or manual benchtop setups that are separate from a fab’s standard production workflow. This paper gives practical examples on how to plan for very high voltage wafer testing, as well as implementation details on how to integrate high voltage testing in a production environment.
Keithley has developed several measurement techniques and approaches that enable automated HV wafer level characterization on multiple pins without sacrificing low voltage performance or throughput requirements. These techniques include integration methods that allow sensitive transistor characterization and low current leakage tests to run in the same process flow as HV breakdown and HV capacitance tests. For example, in one automated test sequence we first measure the transistor Ioff current in the pA range and the threshold voltage Vth. Next, we measure the drain current Ion when both the gate and drain are biased above 1kV. Then, we perform capacitance measurements with a 2kV bias level. Last, we run breakdown tests at 3kV levels.
Keithley has also developed a run-time open/short/load impedance compensation technique that enables accurate HV capacitance measurements on-wafer. We will explore these and other HV measurement issues, as well as share our results and experiences in the developing field of HV wafer-level testing.

BiografieAlexander Pronin is a lead applications engineer at Keithley Instruments. He received his PhD in material science from Dartmouth College. Alex has been with Keithley for over 20 years and has been involved in the definition, development, and support of various projects in test and measurement, including wafer level reliability (WLR) packages, characterization techniques of various non-volatile memory (NVM) devices, and integration of RF S-parameter testing with wafer level process control monitoring (PCM) using Keithley parametric test systems. His recent interests are in the field of HV testing.

Reducing TSV integration cost using F.A.S.T. deposition solution

VITIELLO, Julien
Director
KOBUS

AbstractAs one of the key enabler of 3D integration, Through Silicon Via (TSV) has been widely studied but not largely adopted by advanced packaging industry. The main factor that has limited its adoption is the higher overall integration cost when compared to standard packaging solution.
Based on PECVD and PVD deposition system, TSV key films, i.e. isolation, barrier and Cu seed layer, are the cost lever. Those deposition methods are not able to answer actual TSV needs: thick and conformal layers obtained at a throughput in line with production constraints. They have forced engineers to compensate with other TSV fabrication steps while degrading fabrication cost: longer etch process step to limit scalloping effect; increased CMP process time to remove the thick top Cu layer from PVD.
Alternative solutions are already being studied and evaluated. Based on electroless processes or ALD deposition method, they successfully overcome the conformal issue introduced by PECVD and PVD actual reactors. But they also introduce new chemistries and low throughput processes that do not improve the TSV integration cost issue.
Originally developed by Altatech, the alternative Fast Atomic Sequential Technology (F.A.S.T.), a unique combination of optimized CVD reactor with ALD pulsing capability, has been extensively evaluated to answer the thick and conformal layer request of TSV integration scheme:
- Based on well-known precursor molecules and standard reactor architecture, actual Isolation, Copper barrier and Cu Seed materials can be layered in TSV with aspect ratio up to 20:1;
- Conformity closed to 100% in 10:1 and up to 20:1 is obtained while offering deposition rate higher than 100nm/min.
Those 3 deposited layer based on the alternative F.A.S.T. technology have been computed in the whole TSV integration cost and compared to standard PECVD/PVD solution and other alternatives. A fabrication cost comparison between the different deposition solutions will be presented during the talk.

BiografieJulien VITIELLO (PhD) joined Altatech in 2007 as Process Manager. Since 2011, he has held the position of Director of the Deposition Product Line. He is responsible for the R&D as well as the development of the new Deposition applications.
Julien began his career at Philips Semiconductor in 2003 where he held several positions in the front end and back end R&D department.
Julien studied Material Engineering at INSA Lyon and earned his doctoral degree in Integrated Electronics from the INSA Lyon in 2006.

Developing competitiveness of Manufacturing in Europe

POITRENAUD, Erik
Senior Client Partner
Korn Ferry - Hay Group

AbstractMost semiconductors operators have maintained a balance in their production footprint between Western Countries and Asia so far.
Confronted to megatrends such as an ageing population in Europe, digitalization and technology convergence, they face the challenge of keeping on developing the competitiveness of their European sites if they are to maintain a significant production capacity in their historic cradle.
Helping our clients develop their performance through organizational and human levers is Core to Korn Ferry Hay Group activities. Through our projects and client discussions, we could identify some patterns, philosophies and actions developed in other industries who started facing this kind of issues earlier than semiconductors.
Each industry is specific and first critical thing is defining the nature of the problematic. It is different when people account for 10% of production costs vs. 30% or more. Transportation costs are also a factor, such as scarcity of Know-How and expertise in some geographies is.
A lot of companies in the automotive, chemical, utilities... industries (amongst other) developed innovative ways to increase competitiveness of their western hemisphere production sites. Relocalization is an emerging reality which roots in a series of factors where productivity is one of the most impactful.
With our clients, we have been developing programs such as process redefinition, continuous improvement, performance management, reorganizations, culture change, leadership development... We have also been observing the impact of technical training on new work habits, when it comes to developing usage of digital tools or reducing accidents at work.
During the keynote, we will share experiences and develop our point of view that being disruptive not only in technology implementation but also in Organization, Culture and Leadership changes is critical to develop competitiveness.

BiografieErik Poitrenaud has been a consultant at Korn Ferry Hay Group for 20 years. He focuses on developing companies' performance by implementing innovative programs in the fields of organization and talent management, mainly at large global players.
Before joining Hay Group, he was Product Manager at Sybel, a French software publisher now part of the Sage Group.
Mr. Poitrenaud holds a diploma of the Ecole des Hautes Etudes Commerciales du Nord (EDHEC).

Molecular self-assembly from liquids on atomically flat surfaces: from fundamentals to applications

Hirsch, Brandon
postdoctoral researcher
KU Leuven

AbstractNanostructured monolayers of molecules can be formed at a variety of interfaces. At a liquid-solid interface, such two-dimensional (2D) molecular assemblies can be created by depositing a solution of the compound of interest on top of the substrate (drop casting) or by immersing the substrate into a solution (dip coating). Advanced interfacial analysis methods such as scanning tunneling microscopy (STM) and atomic force microscopy (AFM) provide nanoscale structural information of the assemblies.
In this presentation, we focus on several aspects of molecular self-assembly at the interface between liquid or air, and surface substrates such as highly oriented pyrolytic graphite and graphene. Highly oriented pyrolytic graphite can be considered as excellent model surface for adsorption and self-assembly of molecules on graphene. We will reveal novel concepts of 2D crystal engineering including the effects of solvent, solute concentration, temperature, and other external stimuli. Self-assembly controlled under nanoconfinement conditions also delivers insight into thermodynamic and kinetics aspects of these systems.
We will demonstrate molecular self-assembly based functionalization of graphite and graphene. Various applications will also be presented.

BiografieBrandon E. Hirsch obtained his Ph.D. in physical and materials chemistry in 2016 from Indiana University (USA) under the supervision of Professor Steven L. Tait and Amar H. Flood. His doctoral work focused on the investigation of stimuli-dependent surface confined supramolecular self-assemblies. Currently, he is a post-doctoral fellow at KU Leuven in the De Feyter group where his research involves chemisorption on graphene surfaces.

Title is coming soon

Bastide, Bernard
Marketing Manager
Legrand

AbstractThe indoor built environment plays a critical role in our overall well-being, due to both the amount of time we spend indoors (90%) and the ability of buildings to positively or negatively influence our health. In fact, a recent US study has demonstrated that the Cognitive function scores were significantly better in Green building conditions compared to the Conventional building. It was suggested that the office workers productivity could undergo more than a 30% increase.
Thus sustainable buildings bring everywhere substantial benefits in comparison to non sustainable building.
The building consumes 40% of the global energy : this constitutes a high exploitation cost, and needs management solutions. According to various studies, the use in buildings of any system with energy management and lighting control with advanced sensors increases their energy performances.
The idea is to find solutions improving both building performance, and the user well-being.
Green buildings with advanced sensors provide a dynamic environment that responds to occupants’ changing needs and lifestyles.
As information and communication expectations become more sophisticated, networking solutions converge and automate the technologies to improve responsiveness, efficiency, and performance.
To achieve this, all systems (security systems, HVAC, lighting, and other electronic controls must converge in the sustainable buildings) on a single network platform that facilitates users management, space utilization, energy conservation, well-being, and systems improvement.

BiografieBernard has more than 30 yrs experiences in selling and marketing in building automation, and is now Marketing Manager at Legrand
For the SBU Building Systems, his major responsibility is to analyze, define and implement the strategic marketing approach (new opportunities, new business models, new value chain,..) applied on Smart Building applications.
He coordinates and stimulates internally the Innovation and technology activity, in coordination with R&D and the corporate department Innovation & System.
He contributes to identify and qualify partnerships, cooperation, acquisitions opportunities.
He is in charge of market intelligence, ad-hoc studies, strategic analysis, and advisory.
He works with the Products manager for next-generation building solutions like New Sensors Generation, Smart home & building automation, connected objects and Internet of things (IoT

Next level of productivity in Europe's semiconductor fabs

Burkacky, Ondrej
Partner
McKinsey & Company

AbstractEurope's semiconductor fabs have always been challenged in terms of cost by competition from lower cost locations in terms of wages and energy cost. Several companies have undertaken a large effort to transform its productivity to a higher lever to compensate for these cost disadvantages.
Our fab benchmarking, however, indicates that there is still some room for improvement.
Complementing the typical lean levers we see the emergence of new approaches like advanced analytics as key enabler for further productivity increase.
For Europe to remain competitive as a location for semiconductor fabs, there is need for action for the governments as well. Here a clear commitment and an answer to subsidies received in many other countries is needed.
Finally given the expected new demand for IoT driven technologies, we see a clear opportunity for Europe's fabs to immediately leverage the increased productivity to attract additional volume.

BiografieOndrej Burkacky is a partner at McKinsey and part of its semiconductor leadership. He supports global clients on issues related to operational improvements and transformations as well as R&D and software-related topics.
Since joining McKinsey in 2007, Ondrej has served integrated-device manufacturers (IDMs), foundries, and fabless players. He also serves original-equipment manufacturers (OEMs) in the high-tech and automotive industries.

Promote a passive thin film to intelligent implant

Young, Edward
senior principal engineer
Medtronic

AbstractPromote a passive thin film to intelligent implant
Edward Young, Peter Knapen, Albert Gootzen, Juan Ordonez Orellana
In this presentation, the Medtronic thin film device technology for medical implants will be discussed. The merits of embedding intelligence in the thin film will be illustrated with examples.
Medtronic has developed a biostable and biocompatible thin film technology. The manufacturing process is wafer based and applies standard semiconductor manufacturing technologies, high resolution structures can easily be manufactured.
As a demonstrator, a high resolution brain stimulation probe for Parkinson’s disease was developed in this thin film technology. In this well-known treatment for Parkinson’s disease, a probe delivers electrical pulses in the brain. The device is powered by a battery driven pulse generator. The generator is located in the chest.
The current demonstrator consists of 40 electrodes. All electrodes can be individually addressed to provide a tailored stimulation field to the brain of the patient. In this steering brain stimulation application the beneficial effect of the stimulation can be optimized and side effects can be suppressed.
The addressing of the individual electrodes requires intelligence. Currently, this intelligence, a switch matrix ASIC, is integrated into a classical hermetic Titanium can. This hermetic can, with a multi-pin feedthrough connection, connects to the pulse generator at one hand side with few contacts and the thin film brain probe at the other hand side it with its 40 contacts.
The next level of maturity of thin film technology for implants will be an integration of the electronics in a biocompatible and bio-stable package directly on the thin film. The film becomes the device.

Redundant sensor architectures for safety critical applications

Sacco, Vincenzo
Global Functional Safety Manager
Melexis

AbstractOver the last decades, the industry has provided a steady improvement in the safety of automobiles. Advances in modern electronics have accelerated the number and features of safety systems.
Semiconductor devices, sensors, actuators and computer controlled systems with complex software are integral to these system designs.
This increasing complexity drives the need for a new paradigm for safety systems development and engineering to achieve their function. ISO-26262 "Road vehicles — Functional Safety" provides appropriate standardized requirements, processes and an automotive-specific risk-based approach to determine integrity levels, also known as Automotive Safety Integrity Levels or ASILs. ASILs are used to specify applicable requirements of the ISO-26262 standard so as to avoid unreasonable residual risk;
Smart integrated sensors in particular, are used extensively in automotive safety-critical applications (throttle valve position, braking and acceleration pedal angle, object distance detection for emergency braking, ignition key switch and many others …). In vision of the increase complexity and application scenario, the functional and safety requirements allocated to these sensors demand therefore innovative architectures.
This paper/presentation will review some of the existing redundant sensor architectures and improvements proposals needed to meet the new stringent safety targets in vision of the autonomous driving era.

BiografieDr. Vincenzo Sacco Granted his PhD in 2006 jointly from University of Catania (Italy) and LIRMM in Montpelier (France) with a thesis on magnetic micro-sensors in MEMS and CMOS technologies. He has authored 45 papers and 3 patents. He has developed his career in Melexis as Analog Design Engineer (1y), Project Manager (3y), Senior Project Manager / Team Leaders (3y), and finally Global Functional Safety Manager (3y). Today He is leading the Functional Safety Competency Centre (FSCC) in Melexis, responsible to implement ISO26262 and to develop Functional Safety competencies across Melexis. He is also responsible to enhance System Engineering competencies and methods

Challenges Facing the Secondary Market Segment in Europe

Connock, Peter
Chairman
memsstar Limited

AbstractThe use of fully depreciated equipment is a key cost control tool in the manufacture of MEMS, sensors and “IoT” related devices – indeed any technology that does not require the latest “State-of-the- Art” capability. At the same time, these devices are becoming increasingly sophisticated, thereby requiring new process technologies and increasingly advanced production techniques.
The recent increase in 200mm demand has resulted in significant increases in 200mm manufacturing capacity – but this has put a strain on the conventional supply chain for secondary equipment. Donor tools are in short supply, and there are increasing instances of the loss of supply of spares and other key components. Skilled engineers with experience in these technologies are also becoming a scarce resource.
The SEA group in Europe seek to highlight these issues and help look for industry solutions to the issues facing SEMI members. The presentation will seek to highlight these issues and suggest potential routes froward for this key industry segment.

BiografiePeter Connock has been working in the semiconductor industry for over 35 years with positions in development, customer service, marketing and management. He has held long-term positions at Edwards, Applied Materials and memsstar in locations around the world. In his latest role, PENTA Director at AENEAS, he is responsible for the development, implementation and management of a new EUREKA cluster – focussed on catalysing activity in the micro and nanoelectronics enabled systems and applications sector in Europe. PENTA will operate for 5 years, and launched its first call in January 2016.
This complements his role at memsstar, Europe's premier semiconductor equipment remanufacturer and services provider. It also serves the global MEMS marketplace, offering etch and deposition expertise, experience, proprietary and remanufactured systems and know-how to deliver innovative products and services for research, commercial R&D and production.
He has further augmented his operational activities by establishing a long-term relationship with industry representative bodies such as SEMI serving on SEMICON, ISS and now the Secondary Equipment committees in Europe for many years. These activities are complemented by his appointment to the nmi Board in the UK – representing the UK microelectronics industry .
Peter also specialises in working with SME's at Board level in strategic marketing and business development.

Organic Electronics: Photolithography or Printing?

Lloyd, Giles
Senior Manager, Marketing
Merck

AbstractProduction processes for large area electronics are traditionally dominated by photolithography. This is obviously driven by the huge markets for displays and photovoltaics and hence significant investment has been made into the manufacturing infrastructure. For new technologies to gain any sort of foot hold in these markets, they will need to tap into this infrastructure and show compatibility. Printing is now emerging as a candidate for lower cost manufacturing with potential for greater customisation, particularly in digital printing. Recent activity in printed OLEDs for displays is an excellent example. For the transistors and by example, the backplanes of displays, there is also interest in both processes. Photolithography processes to enable access to the existing manufacturing infrastructure but also printing processes to ultimately realise the dream of fully printed roll-to-roll electronics that will drive the mega trends of ubiquitous electronics and the Internet of Things. In this paper we present formulation and process development for photolithography of OTFTs for integration in display application and fully printed OTFTs for Printed Electronics. The photolithography process includes optimised ink formulations and processes using standard commercially available photoresists, as used in FPD manufacture. This represents a clear step forward in compatibility with the existing manufacturing infrastructure and hence, is closer to real commercial production. The printing process includes optimised semiconductor and dielectric inks for gravure printing. All layers are developed for print performance, compatibility with previous layers (orthogonality, wetting etc.), and electronic performance. We present our latest data on development of both processes which clearly demonstrates that Merck materials are ready.

BiografieDr. Giles Lloyd has worked in the field of organic electronics for 20 years. He received a PhD from the University of Liverpool in solid state electronics. For the last 14 years he has worked on Organic Electronic material and process development at Avecia and more recently, Merck. His role involved material development and device optimization which led on to international customer project management. He has led the global business development activities in organic electronics and photovoltaics and his current role involves leading the Strategic Marketing activities in the field of Hybrid Electronics at Merck.

Hot-Wire Assisted ALD: From Idea to Realization

AbstractAtomic Layer Deposition (ALD) was conventionally developed as a purely thermal process to deposit two-element films such as oxides and nitrides. ALD of single-element films (metals and semiconductors), with a few exceptions, is still a difficult task. Plasma-enhanced ALD (PEALD) can enable deposition of certain single-element films but has a reduced step coverage compared to thermal ALD, can cause damage to the wafer under treatment and involve a large variety of chemical reactions. As a result, the wafer surface may be exposed to many ions, radicals and atoms, as well as UV photons. This makes the composition and structure of the growing film not trivial to predict and control.
This work explores alternative techniques to generate radicals without plasma. We choose processes where dissociation of a certain precursor, to form radicals, can be achieved by collisions with a hot tungsten wire heated up to a temperature in the range of 1600-2000 oC. We use in situ real-time spectroscopic ellipsometry in combination with ex-situ techniques, to characterize deposition. The successful generation of atomic hydrogen (at-H) by the hot wire and its delivery to the substrate over a distance of 70 cm have been confirmed by etching of tellurium (Te) films at room temperature.
In this presentation, the concept will be explained and discussed; several examples of the radical-enhanced processes, enabled by utilizing a hot wire instead of using a plasma, will be given. The main example concerns hot-wire atomic layer deposition (HWALD) of tungsten (W) films. The films were grown on a 100-nm thick thermal SiO2 with a proper seed layer. Two different reactor configurations were employed: a large-volume reactor (70 cm distance between the HW and the substrate) and a small-volume reactor (3-5 cm distance between the HW and the substrate). In my presentation, I will further look into the chemistry behind these and other examples.

BiografieAlexey Y. Kovalgin obtained the M.Sc. degree in Physics in 1988 and the Ph.D. degree in Electronic Materials Technology in 1995. He is currently an Associate Professor with the Chair of Semiconductor Components, University of Twente, The Netherlands. His fields of expertise include Chemical Vapor Deposition (CVD), Plasma Enhanced CVD, Atomic Layer Deposition (ALD), Hot-wire ALD, growth and investigation of 2D materials (silicene, graphene), properties of ultra-thin (metallic) films, chemical modelling of plasma reactors containing silane, semiconductor device fabrication at low temperatures; CMOS post-processing, contact resistance of metal-to-semiconductor junctions, and low-power hot-surface silicon devices for chemical sensors and micro-reactors. He has contributed to over 160 reviewed international journal and conference papers.
Dr. Kovalgin has been a reviewer of 20 international journals, leader of 6 scientific projects, member of the editorial board of The Open Electrical & Electronic Engineering Journal, Journal of Recent Patents on Electrical Engineering, jury member of STW VENI 2010 program and two Open Technology Programs (NL), international jury member of Romanian Evaluation Process in 2012, International Board Member of EUROCVD conference and Technical Program Committee member of ICMTS conference. He is the main lecturer of 2 Master courses at the University of Twente, and is strongly involved into the Problem-Based Learning approach of the bachelor education since last 2 years.

Energy Filter for Ion Implantation - A major Improvement in Semiconductor Power Device Manufacturing

Krippendorf, Florian
CEO
mi2-factory GmbH

Abstractmi2-factory GmbH from Jena/Germany develops, distributes and uses an innovative tool named “Energy Filter for Ion Implantation“ (EFII). The application field of EFII is the processing of semi-conductor wafers. Amongst our customers are major semiconductor companies which use this novel, unique and very precise technology for the production of power devices. At the moment the EFII technology focuses on the doping of silicon carbide (SiC) devices, such as SiC-Schottky-diodes and SiC-Superjunction-MOSFETs. Another application field is the doping of Si-IGBTs.
Power devices based on the semi-conductor material SiC have superior properties over those consisting of silicon. In today’s chip production one can not exploit the advantages of SiC completely, since the epitaxially grown drift layer - which is the core element of all SiC power devices - has usually a relatively high doping inaccuracy of 20-25%. This directly translates into larger and therefore more expensive power chips. Another problem with doping via epitaxy is the lack of possibilities to produce doped trench-structures in the epitaxial layer. Therefore, Superjunction-MOSFETs can not be produced in SiC.
Fortunately, mi2-factory offers a solution for the above described problems. The main feature is the usage of high-energy ion implantation in combination with our innovative, in-house developed EFII. This tool, which is matched for every customer application, consists of a microstructured membrane which enables a highly precise distribution of foreign atoms in any semi-conductor material. Doping inaccuracy is only about 1%. EFII is the only evident technology which is scalable to production volume for SiC-SJ-MOSFETs.
mi2-factory offers EFII to semiconductor power device manufacturers, high-energy ion implantation foundries, ion beam accelerator manufacturers and end-station manufacturers. If you want to learn more about EFII, please contact us: info@mi2-factory.com.

Unique and cost effective ultrasonic ceramic motors

Meyer, Jean-Michel
CEO
miniswys SA

Abstractminiswys is a technology provider of specific and patented cost effective ultrasonic ceramic micro motor, optimized for mid to high mass production applications.
miniswys provides custom solutions for OEM applications in highly challenging B2B markets.
The miniswys motors are very well adapted for application as :
- autofocus for telecommunication system ( camera module )
- optical image stabilization system for telecommunication and automotive
- zoom applications
- micro dosing pumps
- optics ( no backlash ) & tracking system
- security devices ( locking systems )
Compared to other technology providers, the miniswys ultrasonic ceramic motors have an extremely simple structure and have some excellent key features :
- High force or torque density
- Simple & compact design
- High-speed ( linear or rotary )
- Direct drive with high resolution
- Very small current consumption ( constant over the full stroke for linear version )
- Self-locking without current
- Very low settling time
- Excellent thermal dissipation
The miniswys ultrasonic ceramic motors are manufactured only using existing and mature technologies, such as stamping or injection molding.
The business model is based on selling licenses to manufacturing companies. The technology transfer and the support for the process engineering are part of the activities provided by miniswys to its partners.
miniswys SA
Zentralstrasse 115
CH 2503 Biel / Bienne
Switzerland
Tel. +41 32 366 64 98
Email : info@miniswys.com
Website : www.miniswys.com
August 2016

BiographyDipl.-Ing. Steffen Kröhnert received his Master of Science degree in Electrical Engineering and Microsystem Technology at Technical University of Chemnitz, Germany, in 1997. In the same year he started his professional career as Development Engineer in the Corporate Package Assembly, Interconnect and Test Development Center for Semiconductors of Siemens AG in Regensburg, Germany. After carve out of the Semiconductors Business Unit to Infineon Technologies AG in 1999, he worked as Project Manager and moved to Infineon Dresden GmbH & Co. OHG in 2002 to support local setup of Package Development Department for Memory Products. He became R&D Area Manager Component Development and took over Technology Platform ownership for FBGA products. From 2006 he was working as Senior Manager in Qimonda Dresden GmbH & Co. OHG, the carve out of the Memory Products Business Unit of Infineon Technologies. Begin 2007 he was assigned to Qimonda Portugal S.A. to setup and lead Package Development team at volume production site. Since 2009 he is Director of Technology at NANIUM S.A. in Vila do Conde, Portugal. Steffen is author and co-author of 23 patent filings in the area of Packaging Technology. He is member of IEEE CPMT, IMAPS, MEPTEC, SMTA, VDI, VDE and GPM. He actively contributes as Co-Chair to SEMI Europe’s Advanced Packaging Conference (APC), as Technical Committee member to IEEE Electronic Components and Technology Conference (ECTC), IEEE Electronics System-Integration Technology Conference (ESTC) and IMAPS European Microelectronics Packaging Conference (EMPC), and as Assistant Technical Co-Chair (Europe) to IMAPS Device Packaging Conference and International Symposium on Microelectronics. Begin of 2016 he became chair of the SEMI Special Interest Group ESiPAT (European SEMI integrated Packaging, Assembly and Test).

AbstractAs a result of significant scientific research and progress over the past, the commercialization of graphene material has attracted tremendous attentions from various industries seeking new materials. When graphene was first introduced, it was immediately recognized as the “wonder material” of the future, as it has multifunctional and unrivalled combination of tensile, electrical, thermal, and optical properties. Opportunities and potentials for commercializing graphene technologies are extensive however there are many technological challenges to overcome. The process of mass producing graphene technology is called Roll to Roll CVD graphene. Nanotech Digital GmbH has introduced the foremost advanced method of Roll to Roll CVD graphene production

BiografieAbout the presenter:The founder/CEO of the company has a Master’s Degree in semiconductor and display engineering as well as an AICPA MBA degree. He has worked as an OLED mass production and micro mass production engineer. He has extensive knowledge in the thin film process, and equipment process. With his expertise in various display and semiconductor equipment process, he established “Nanotech Digital GmbH,” to develop various Roll to roll CVD graphene and applied graphene technology products.
About Nanotech Digital GmbH: “Nanotech Digital GmbH” is a startup company headquartered in Nanocenter Dresden, Germany. Our goal is to make mass production of Roll to Roll CVD graphene possible by utilizing our deep experience in semiconductor and display equipment engineering and integrating our extensive networks. We are now seeking for partners and investors to capitalize on our roll to roll CVD grapheme technology in developing new products and applications.

Bridging Semiconductor Test from the Lab to Production

NOXON, Heath
Semiconductor Account Manager
National Instruments

AbstractNational Instruments welcomes you to Semicon Europa 2016. From IC characterization to wafer sort and final test, or for streamlining characterization to production - come learn about why NI’s platform based Smarter Test Systems approach puts you, the engineer ultimately in charge of solving the test challenges of today and tomorrow – join us at booth #650. If you are working on issues that transcend across design to test disciplines under higher device complexity and time to market pressure, we would like to invite you to NI’s Design to Test presentation on Tuesday October 25th from 3:00 to 5:00 pm (Room "Le Bans").

BiografieHeath Noxon is a business development manager for National Instruments that has worked with semiconductor test applications for the past 8 years in both the lab and in manufacturing. Heath has a bachelor’s degree in chemical engineering from the University of Colorado at Boulder.

AbstractSpeaker will provide a forward looking vision for how flexible, stretchable and conformable electronics can change the way we live by putting intelligent devices in places they have never existed before in ways that do not interfere with our comfort or daily lives. The focus will include novel substrate materials needed to enable these form factors, including flexible materials, textiles, thermos-formable materials and non-planar structures. Characterization of the challenges ahead will be highlighted alongside several of the creative processing approaches being developed today to realize the NextFlex vision.

BiografieJason Marsh is the director of technology at NextFlex – America’s Flexible Hybrid Electronics Manufacturing Institute. Jason has worked in operations and engineering roles for Kyocera in the US, Japan, India, Germany, Mexico, Malaysia and China. As a materials science and automation engineer with a focus on machine vision, Jason has worked on a variety of technologies from satellite applications to factory automation. He has served on advisory boards and consulted for companies in a wide range of industries from artificial intelligence to outdoor equipment to solar power to agriculture. He is passionate about seeing manufacturing companies thrive and is focused on the requirements needed to keep US-based manufacturing operations differentiated and globally competitive.

IJD technique: a new approach to pulsed electron deposition

Tedeschi, Gianpiero
CEO
Noivion Srl

AbstractA new thin film deposition method – Ionised Jet Deposition (IJD) – based on pulsed energy delivered by ionized gas jet to a solid target (material source) is presented.
A pulsed electron plasma beam is extracted from a gas jet and used to transfer energy to a material source (target) causing its ablation. The plasma is created by high voltage (up to 30 kV) vacuum discharge within the spatially free gas stream formed by a metallic nozzle. The electron and energetic plasma stream is generated and subtracted from spatially free equipotential space biased negatively with respect to the target. As the whole process of energetic particle generation from initial discharge up to the target ablation is performed in the free space overcoming the limitations of comparable techniques. The whole equipment is build from metallic parts for a simple and rugged construction well suited for industrial applications. IDJ is enabling the electronic manufacturing industry to access the benefits of techniques like Pulsed Laser Deposition and Pulsed Electron Deposition that are not suitable for mass manufacturing due to high costs, complex system geometry, low yield or reliability. The last generation of IJD electron sources from Noivion are extremely compact (CF40 mounted) and thanks to the advanced electrode geometry can be mounted on the side or under the target allowing the design of large area and multi-source deposition systems. IJD more relevant advantages are target composition conservation and low temperature deposition at high deposition rate thanks to high plasma ionization and ion energy. IJD works well with metals, event high melting point ones, semiconductors, insulating and optically transparent materials; operates in both in reactive or non-reactive mode allowing a wide level of flexibility.

BiografieNoivion is startup company devoted to the design and construction of thin film deposition equipment and components based on the new Ionized Jet Deposition technology. Located in Rovereto, Italy, in the Alps region, in the heart of Europe, Noivion is currently incubated at Progetto Manifattura – the Green Innovation Factory.
Noivion is built on a solid team with deep mutual trust gained in previous work experience. The team presents strong multi-disciplinary competences and many years of experience in respective fields.
Noivion's CEO Gianpiero Tedeschi is an engineer with over fifteen years of experience in industrial automation and project management mainly matured in the industrial production of photovoltaic manufacturing equipment and devices (cells and modules). Prior to founding Noivion with a group of trusted fellows he served as managing director of a start-up in thin film photovoltaics.

Driving by numbers

Bramley, Richard
Safety Architect
NVIDIA

AbstractComputer vision processing is a key technology for autonomous driving. Raising the bar on performance while imposing strict functional safety criteria in a limited power envelope is a challenging scenario for the semiconductor industry.
As devices grow in performance to enable new functionalities and paradigms such as deep learning, failure rates increase and must be managed. Which trade-offs can be made ?
The paper will consider the state of the art and then look behind the numbers at the progress that must be made from semiconductor resilience to fault tolerant system design.

BiografieRichard Bramley, PhD is currently safety manager for GPU computing products at NVIDIA based in Santa Clara, California. His background in signal processing and hardware silicon systems architecture has encompassed a wide range of product developments. From the first MPEG2 devices through highly integrated consumer electronics devices to mobile telecom platforms via automotive infotainment and finally to autonomous driving. His current interests revolve around how to meet the requirements of ISO 26262 without sacrificing too much performance and power.

Application-Driven Challenges in Automotive Packaging

AbstractThe automobile is in the middle of a transition. Seamless connectivity within and towards other cars enable a seamless entertainment and advanced safety. Increasing transition to advanced driver assistance and ultimately self-driving cars make driving less stressful and much more save. While increases in energy efficiency reduce CO2 emissions significantly.
Making these transitions poses high requirements on the performance, quality and reliability of electronics, ICs and ultimately packaging. Must-haves in automotive are zero defect from day one together with meeting extended robustness and temperature ranges for the lifetime of cars.
The presentation motivates the requirements on packaging resulting from automotive applications and provides examples how to meet them. This touches on material choices and processing capabilities for classical packages, solutions for additional optical inspection to safeguard zero defect, mastering Cu bonding for zero defect AEC-Q100 Grade 0 products, driving package size reductions and meeting highest performance requirements for automotive radar applications.

BiografieTobias Helbig is Senior Director Innovation Management & Programs with NXP Semiconductors BU Automotive CTO. He is responsible for steering the innovation and technology roadmapping and program definition of NXP’s automotive business. NXP is market leader in automotive semiconductors and active in automotive ICs for sensors, entertainment, advanced analog, microcontrollers and advanced driver assistance.
Prior to that, Tobias was in Philips Research leading teams as well as program definition in the short-range and cellular communications domain. He managed the global development of NXP’s car entertainment business. And he lead NXPs product line audio amplifiers as general manager.
Tobias holds a Master and PhD degree in Computer Science from University of Stuttgart, Germany.

AbstractSince 2009 the ITRS (International Technology Roadmap for Semiconductors) includes the concept of “wait-time-waste” (WTW), dealing with the systematic identification and elimination of time waste at critical points in the lifecycle of a product. The SEMATECH activities concentrate on the 300mm and 450mm roadmap. However, significant gains can also be expected in existing legacy 200mm fabs, an arena widely ignored by industrial standards and solutions. To raise the equipment (and fab) efficiency in legacy high-mix fabs, one needs to 1) integrate modern IT-solutions into the existing Factory Information and Control System (FICS) and 2) increase the industrial engineering effort to enable wait-time-waste methodology to identify hidden efficiency losses.
In our high mix fab in Nijmegen (NXP-ICN8) we have created ‘smart manufacturing solutions’ which make use of available SECS/GEM events from legacy 200mm equipment. As expected, the integration of modern IT-solutions on top of existing IT-tooling in legacy high mix fabs is a daunting task but not impossible. Additional tweaking and tuning is required to make the ‘smart solutions’ compatible with current way-of-working (partial implementation, island solutions, self-made elements)
The lack of standards to measure time with 200mm SECS/GEM events requires extra resources to configure the data-collection and determine the effective analytical model(s). A raised level of manufacturing science (high-mix compatible) and a robust data-collection (synchronization, detection missed events) are essential for a successful implementation and acceptance by the end-user. The intensive collaboration through INTEGRATE provided many examples (different tool-sets, issues with hardware/software versions) which lowered the threshold for ‘copy-paste’ actions. The results demonstrate that significant gains can be expected by developing ‘smart solutions’ and integrating them into the IT-architecture of existing semiconductor fabs.

BiografieJan Driessen received his Ph.D. in Physics from Eindhoven University of Technology in 1989, The Netherlands. From 1990-1996 he continued fundamental research at various scientific institutes in the USA and NL. Since 1997 he works in industry. During 4 years in Display Manufacturing (many visits for Display fabs in Asia) he learned to appreciate the importance of industrial engineering (data-collection, problem-solving, creating enablers for efficiency improvement). Since 2000 he works at NXP Semiconductors, where he initiated successfully with IT-colleagues various data-collection programs (APC, OEE & wait-time-waste). In his current role as principal industrial engineer he is responsible for driving the equipment efficiency improvement program at NXP-ICN8. Since 2012 he has presented and published this efficiency improvement activity at various conferences (APCM, ASMC) and papers (IEEE proceedings).

Design strategies for low cost infrared cameras

DRUART, Guillaume
Research Scientist
ONERA

AbstractToday huge efforts are made in the research and industrial areas to design compact and cheap uncooled infrared optical systems for low-cost imagery applications. In the past, infrared cameras were too expensive to be widespread. But thanks to the recent advances in microelectronics, the cost of some infrared devices is expected to be reduced and new types of markets to be addressed. A recent report written by Yole Développement in 2015 mentioned 30% growth in uncooled infrared imaging market driven by three rapidly expanding commercial markets: thermography, automotive and surveillance. They identified several low-cost and low-resolution sensors: pyroelectric detectors, thermopiles, and microbolometers. In the field of microbolometers, their prices are cut by reducing the size of the pixels, the size of their format and by using wafer level technologies. The price of the electronics is reduced by using ASIC technologies. Now, the budget of the optical part in the price of the whole camera is not anymore negligible compared to the price of the detector and frugal innovation in the optical design is now required to cut the price of the lens: limit the number of optics, make the optics compatible to replication process, either molding of photolithography, explore low cost materials, some being absorbent in the long infrared bandwidth at important thicknesses (chalcogenide, silicon, polyethylene). In this presentation, we will recall some current strategies for designing low cost optics and we will revisit the Fresnel lens to design a thin infrared optic for an expected cheap broadband microimager. Up to now, Fresnel lenses have not been used for broadband imagery applications because of their disastrous chromatic properties. However, we show that working in a high diffraction order can significantly reduce chromatism. A prototype has been made and the performance of our camera will be discussed.

BiografieGuillaume DRUART, Ph. D. since 2009 and research scientist at ONERA in optical design.
In particular, he's working on new designs for micro-cameras in the infrared spectral range. His field interests are non conventional optical designs, diffractive optics, multichannel designs, co-design with image processing and multispectral imagery.

Smart Glasses Devices and their Applications in The Industry

Sarayeddine, Khaled
CTO
Optinvent SA

AbstractSmart Glasses devices are attracting large interest in the B to B Business segment for several applications and use cases.
The author will describe first the Smart Glasses device as an Opto-electronic and imaging device and depicts existing display technologies and products that allow Augmented Reality and Hands Free operation. The author will also present Optinvent Optical technology behind the ORA Product line.
The author will then describe the applications that Smart Glasses address, from Medical, Industry, such as Logistic, Maintenance, Remote control, Check list, etc.

BiografieRecognized expert in worldwide Display industry and leading figure in the field of Microdisplay based projection systems, compact projection systems, and near to eye optics. Chaired several industry consortium such as SID/IDW. Holds more than 20 patents in optics for projection and wearable displays. Inventor of new display systems and disruptive technologies with a vision on the consumer market. Proven experience as a Start-Up CTO driving innovation and multidisciplinary product development. Strong problem solving approach and ability to drive highly skilled development teams to reach challenging company goals.
Hold Phd in Optics from the University of Franche Comté, Besançon, France and a "Diplome d'Ingenieur" from Ecole Supérieur d'Electronique et Electrotechnique; ESIEE, Paris in Semiconductor physics.
Currently CTO and Co-Founder of Optinvent a French Start-up that offer the best technology for see-through video glasses for consumer market

OLED for Automotive Applications: Status and Future Trends

Lang, Erwin
Senior Key Expert OLED Technology
OSRAM OLED GmbH

AbstractIn the past few years substantial progress has been made in the development of organic light-emitting diodes for general illumination and for automobile applications. In this talk, the main drivers for OLED automotive lighting as well as its main differentiators from other automotive lighting solutions will be discussed. To take advantage of these differentiators, technology barriers for OLED need to be overcome. In this regard the requirement profile for automotive applications is compared to the requirements for general illumination. Rigid, glass-based OLED now meet entry level automotive reliability requirements and are entering the automotive market as tail lights in first series production vehicles.
In the future, flexible OLED is expected to be the main differentiator for OLED in automotive applications, since the integration in 3D-shaped OLED modules enables completely new design possibilities for automotive lighting. We will highlight examples for innovative 3D-shaped OLED designs and present the recent progress on flexible OLED technology. Last but not least, the results of the latest development towards sophisticated 3D-OLED for tail lights will be discussed.

BiografieDr. Erwin Lang is Senior Key Expert for OLED Technology at OSRAM OLED GmbH with more than 10 years of experience on OLED technology for lighting applications. He has successfully led various development projects covering many aspects of OLED device and processing technology. Moreover he has been work-package leader in several completed and ongoing German and EU-funded projects.

AbstractAtomic Layer Etching (ALE) is a plasma etch technique for delivering ultra low damage, ultra high selectivity and ultra controllable etch depth. Pushed by device performance there is an ever increasing demand for thinner layers and smaller critical dimensions. This means that the traditional methods of processing these layers are reaching their limit and new technologies are required to realise the control required. ALE is an exciting technology that provides a method to etch an atomic layer of material from the surface of a layer in a controlled manner. It enables excellent depth control and also offers exciting new possibilities for etch selectivity between different materials, truly a technique to enable tomorrow's technology.

BiografieDr Mark Dineen graduated from Cardiff University with a PhD on ‘Plasma etching of Gallium Nitride’ and joined Oxford Instruments in 2000. Firstly as a Process Engineer working on etching of III-V materials, and more recently as Product Manager (Optoelectronics and Discrete Devices), Mark has a wealth of experience related to Wide Band Gap device manufacturing.

Plasma Dicing 4 Thin Wafers

AbstractRecently many issues came up when using conventional dicing methods. Such conventional methods are mechanical sawing (blade dicing) or laser dicing or stealth dicing. Relevant applications are thin wafers, brittle materials and wafer singulation for very small devices or LED or discretes. Plasma dicing is a recommended method to overcome many challenges of wafer separation. Damage free, water free, particle free and high throughput dicing can be realized by using plasma trench etch (dry etch) technology for dicing. Several technical and equipment aspects will be presented and discussed accordingly. Plasma dicing technology can provide solutions for high rate dicing, beautiful chip shape without any chipping and high bonding strength.
Cost aspects:
The throughput of a plasma chamber depends mainly on wafer thickness and is quite independent from wafer size or chip size. By using plasma for dicing the throughput can achieve more than 4 or 5 wafers per hour. Such cannot be achieved by any line-by-line dicing method as long as small chips are required. Significant cost savings can be expected.
Advantages of plasma dicing are described in detail such as
a. Damage Free / Chipping Free.
b. Increase quantity of chips per wafer
c. Water Free process
d. Flexible Chip Shape
e. Etching speed and characterisation
f. Total Dicing Process Flow
New materials for semiconductor devices are recently coming up on the market. Such as SiC base material and GaN-on-Silicon for power devices and discretes. Future challenges such as SiC dicing or GaN-on-Silicon dicing will be discussed.
Typical topics on Plasma Dicing equipment are explained

BiografieDegree of Diplom-Ingenieur in Process Engineering on Technical University in Munich / Germany in 1988. Since then Project Management & Sales for different kinds of Industy, mainly in chemical Industry. Since 1998 Sales & Project management in Microelectronics & Semiconductor Industry for F&K Delvotec, Wirebonding and Diebonding Technology. Profund experience in handling packaging projects in both Semiconductor and Device-Manufacturing Industry. Since 2006 Sales Director for Microelectronics Equipment at Panasonic Factory Solutions Europe (PFSE). Main target is to establish new PFSE business fields in the Backend and Frontend Industry in Europe: Dieattach, Flipchip, Plasma Cleaning and Plasma Etch Technolgies.

AbstractReal time monitoring of particles as small as 20 nm in critical wafer cleaning chemicals is important for high yield of critical process technology devices. High purity chemical delivery systems are necessary to control and protect the purity of critical process fluids from the source, through distribution, to the wafer fab cleaning tools. Carefully-implemented monitoring strategies are important to ensure that the purity process chemicals is sufficiently-high to meet wet process defect-density goals. This paper provides examples and data of continuous real-time measurement of particles at 20 nm for process chemicals.

BiografieJohn Davis is the Global Applications Engineering Manager at Particle Measuring Systems. He is responsible for a global team who works directly with customers to provide contamination monitoring solutions.

AbstractReal time monitoring of particles as small as 20 nm in critical wafer cleaning chemicals is important for high yield of critical process technology devices. High purity chemical delivery systems are necessary to control and protect the purity of critical process fluids from the source, through distribution, to the wafer fab cleaning tools. Carefully-implemented monitoring strategies are important to ensure that the purity process chemicals is sufficiently-high to meet wet process defect-density goals. This paper provides examples and data of continuous real-time measurement of particles at 20 nm for process chemicals.

BiografieKeith Dillenbeck is Product Line Manager for Particle Measuring Systems, from Boulder, Colorado, USA. Keith has over 30 years experience in high purity process chemicals and semiconductor wafer cleaning processes, in both technology development and product management. He has a Bachelor of Science degree in Chemical Engineering.

BiographyDr. Michael Arnold, Managing Director at PEER Group, has over 25 years industrial experiences in high-tech industries.
From 1981 - 1986 he studied Physics at the Friedrich-Schiller-University in Jena, Germany, where he obtained his PhD in 1994.
Michael gained broad experiences in system simulations, software design and development, optical inspection systems, and product development for the aerospace and defense industry.
Michael has been involved with factory automation software solutions for the semiconductor and solar industry since 2001 in the Operations Manager position of TRW and since in 2003 as Managing Director of PEER Group GmbH in Dresden.

AbstractIn today’s connected world, smart manufacturing initiatives make it possible for semiconductor device makers to leverage data, gain insights into their processes, and make manufacturing decisions and processing modifications that will improve fab productivity. Data collection has always been an essential part of semiconductor manufacturing and now, successful big data solutions enable intelligent analysis and allow manufacturers and suppliers to turn their collected data into action. As the cost of adding more sensors and data sources to equipment continues to become more affordable, it’s important to consider how to broker high volumes of sensitive data at high speeds from disparate sources, how to consolidate the data on a single tool or across multiple tools to enable data analytics, and how to segregate IP and share information securely across business partners. Interconnecting equipment and process data provides new opportunities to fabs and OEMs to feed efficiency gains back into the manufacturing process. OEMs can analyze the data near-tool or even remotely and make equipment adjustments, ensure optimal equipment performance during production, and provide a higher standard of service to the fab through more efficient and cost-effective tool support. The fab will benefit from more efficient, autonomous manufacturing as it leverages equipment data to remove production inefficiencies, reduce costs, and improve uptime and yield. Join us in the TechLOUNGE as we explore the concept of data brokering through a secure pipe to enable a new generation of OEM and fab collaboration, central to smart manufacturing.

BiografieDoug Suerich, Product Evangelist, PEER Group
Doug Suerich is the Product Evangelist at The PEER Group, Inc., the semiconductor industry’s leading supplier of automation software. Mr. Suerich focuses on big data and remote connectivity solutions that help OEMs and fabs collaborate securely on tools (and tool data) in a production environment.
Suerich has over 20 years of experience leading software teams for a variety of industries including semiconductor, manufacturing, and transportation. Most recently, he was involved in architecting PEER Group’s remote connectivity solution, Remicus™, and he was a champion in promoting the use of cloud computing and latest-generation web technologies to serve global users.
Prior to joining PEER Group, Mr. Suerich was a software development manager, automation engineer, information systems specialist, and consultant. He has extensive experience designing and integrating robust automation software solutions.
Suerich holds a Bachelor of Science with Honours in System Design Engineering and an option in Management Science from the University of Waterloo.

gas sensing on chip

Klootwijk, Johan
Senior Scientist
Philips Group Inovation, Research

AbstractAt Philips, we strive to make the world healthier and more sustainable through innovation. Improve the quality of people’s lives through technology-enabled meaningful innovations – as co-creator and strategic partner for the Philips businesses and complementary open innovation ecosystem participants.
Today, Philips is a diversified health and well-being company. This diversity is also reflected in our organization, and allows us to address the challenges and needs of people in a unique way. We touch so many aspects of people’s lives that the true impact of our innovations is in the combination of our solutions.
An important example is Indoor Air Quality. Philips has developed products for air purification, in particular in the developing countries to improve IAQ. One of the initial challenges in order to introduce the air purifiers amongst local population was creating the awareness of the IAQ problem. The most logical way to do this is by showing the VOC problem. This requires devices that can actually show the dangerous VOC levels, i.e. monitoring IAQ. When considering commercial solutions, we find sensors that are either sensitive or selective. However, sensors with combination of sensitivity and selectivity that can be integrated are not available yet.
Philips has worked on nanowire sensor, in cooperation with TUD (Prof. Ernst Sudholter), Yale University (prof. Mark Reed) and WIMS2 center (Prof. Y. Giachandani) in order to develop a nanowire platform for sensitive and selective detection of VOCs, in particular Formaldehyde. In parallel other solutions are considered as well.
Now the question arises whether these sensor platforms can be modified such that they can be used for breath analysis? Like cantilevers, E-Noses or Miniaturize gas chromatographs?
Standard GC is already used, but is far too expensive. Can we therefore further miniaturize existing platforms/technologies to use for gas/breath detection to measure/predict human health: gas detection on chip?

BiografieDr. Johan H. Klootwijk received his M.Sc. and Ph.D. degrees in electrical engineering from the University of Twente, Enschede, The Netherlands, in 1993 and 1997, respectively. In October 1997, he joined the Philips Research Laboratories, Eindhoven, The Netherlands.
Johan’s research activities have included development and characterization of Si and SiGe bipolar transistors, non volatile memories (EEPROMs), SOI/SOA technologies, reliability of thin dielectrics, development of InP based HBTs wideband RF applications, development, characterization and integration of high-density 3D devices, in particular capacitors and all solid-state batteries, EUV spectral purity filters, new materials for direct conversion CT scanners, nanowire sensors and miniaturized GC.
Currently, he is responsible for technology and teststructure development of several projects in the Micro Systems and Devices group, where part of his work is on (nano-)sensors and part of his work is leading a project on EUV membranes.
Johan has authored or co-authored several scientific publications and conference contributions, holds several patents and he is a senior member of the IEEE. He has been a senior lecturer on semiconductor devices at the CTT from 1999 to 2008. He received the Best Paper Award for his contribution on the ESSDERC Conference in 2001 and a best poster award on the NATO-ASI summercourse on ALD in 1995. For part of this work he received a Bronze Award for the ‘NXP Invention of the Year 2007’ and a Bronze invention award in 2015. He served as the Tutorial Chairman of the International Conference on Measurement and Teststructures, ICMTS, 2002, 2008 and 2011 and as the Technical Chairman in 2014.

Towards the Next Generation Smart Catheters

Dekker, Ronald
Research
Philips Research

AbstractSmart catheters and instruments add “eyes and ears” to minimally invasive instruments. Many clinical studies have underlined their value in improving the outcome of interventions, and in reducing cost. However, originating from traditional catheter manufacturers, these devices are without exception made with outdated 20th century technology, requiring extensive costly manual assembly.
The next generation Smart Catheters will be characterized by: digitization at the tip, best in class sensors and (ultra-sound) transducers and lower cost. Furthermore they will use open platform technologies that are steered by roadmaps and implemented on dedicated pilot lines.
The Flex-to-Rigid (F2R) interconnect technology is an example of such an open platform. It was developed in the ENIAC project “INCITE” and is designed to squeeze complex electronic functionality like AD conversion, integrated passives and (ultra-sound) MEMS devices into extremely small form factors such as in the tip of catheters, guide-wires or implants.
The INCITE project is the first in a row of initiatives aimed at realizing an open pilot line infrastructures for medical devices, in particular smart catheters. The ECSEL project “InForMed” connects essential technologies from many European manufacturers in an integrated pilot line to bring the concepts developed in INCITE to a higher TRL level. The new project “POSITION” that is under preparation at the moment, brings together a number of European catheter manufacturers and technology providers to develop smart catheter applications using the platform technologies and the pilot line manufacturing infrastructure.

BiografieRonald Dekker received his MSc in Electrical Engineering from the Technical University of Eindhoven and his PhD from the Technical University of Delft. He joined Philips Research in 1988 where he worked on the development of RF technologies for mobile communication. Since 2000 his focus shifted to the integration of complex electronic sensor functionality on the tip of the smallest minimal invasive instruments such as catheters and guide-wires. In 2007 he was appointed part time professor at the Technical University of Delft with a focus on Organ-on-Chip devices. He published in leading Journals and conferences and holds in excess of 50 patents

Organosiloxane and metal oxide materials for optical, hard mask and and dielectric applications

Gädda, Thomas
Director
PiBond

AbstractPibond is a specialty materials company with a focus on the development, commercialization, and manufacturing of advanced siloxane and metal oxide monomers and polymers. The company specializes in the development of polymers for the Micro-electronics and Semiconductor markets.
PiBond has developed a chemistry platform (termed SAP) consisting of extremely etch resistant hard mask coating for fluorine based etch chemistries. SAP products addresses specific requirements and demand for components (e.g. sensors, 3D packaging) that global megatrends such as IoT, Industrial&Automotive sensing generate. These unique, etch resistant SAP metal-oxide based hard masks enable process simplification and lower cost of ownership, while delivering improved dimensional control and smaller feature sizes. SAP can significantly contribute to miniaturization of MEMS components and TSVs, as SAP products have been demonstrated to exhibit etch selectivity to Si up to 1:100,000 at coating thicknesses of 100nm or less. With this performance, we can eliminate the challenges currently faced with the use of >10 µm thick photoresist or many micrometers thickness of SiO2 and similar CVD materials. The thin coating contributes to minimal sidewall angle variation and profile control yielding extremely good CD control.
Other products the company markets – pattern transfer layers for lithography, optical dielectrics for ambient light sensors, and power IC passivation dielectrics – will also be outlined in brief.
PiBond’s technology platform includes materials that are in the latest semiconductor devices used for ultra-high definition and portable gadgets. PiBond is a global player that has a proven and audited track record at producing and monitoring specialty materials at PPT (parts per trillion) purity level at our Clean Room production facility in Helsinki.

BiografieDr Thomas M. Gädda functions as Director at PiBond. He has held various positions at VTT, Silecs and AIST, Japan. Dr. Gädda has participated in the development of siloxane and metal oxide chemistries for hard masks, dielectrics and optoelectronic materials applied in the semiconductor industry. He holds a PhD in Chemistry from University of Southern California and an MS in Chemical Engineering from Helsinki University of Technology. He has authored ~40 patents, book chapters, scientific and technical articles.

Carriers for temporary bonding and thin wafer handling

Wesselkamp, Carsten
Sales Manager
Plan Optik AG

AbstractFor thin wafer handling, support carriers are needed which should fulfil various properties such as adaption of thermal expansion coefficient, heat and chemical resistance and transparency. Glass is the best candidate for this task.
Semiconductor wafers undergo a wide range of process steps. Due to progressing thickness reduction of the wafers, handling in standard semiconductor processes requires carrier substrates supporting them.
Various Thin Wafer Handling systems are already established in the semiconductor market. Depending on the used bonding and de-bonding technique, the carriers need adapted properties.
High end carriers from glass and silicon meet these requirements excellently. High temperature and chemical resistance, incredible low tolerances (down to 1 micron thickness variation), thermal expansion adjusted to the used semiconductor material are just a few examples for this. Different carrier types such as for silicon and gallium arsenide wafer handling are available.
Unique marking by QR codes for easy back tracing make them suitable for a huge number of re-use cycles. Glass carriers could be strengthened to make them virtually unbreakable. Alkaline free glass is available as well.
Blank carriers for fast laser release, perforated carriers for chemical release and carriers with recessed pockets are available for various support systems such as laser de-bonding, chemical and thermal de-bonding. Carriers are available for 2” to 300 mm wafer handling.

BiografieMr. Carsten Wesselkamp got a degree (Dipl.-Ing. (FH) in Industrial Engineering with a study emphasis on operating technology and production engineering.
He additionally achieved a certificate in work system and process organization by REFA (organization for work study and company organisation).
After working as assistant production manager for a multinational steel and aluminum producer he joined Plan Optik AG, one of the leading manufacturers of wafers for MEMS and carriers for semiconductor applications in 1996 as one of their sales engineers.
Nowadays Mr. Wesselkamp acts as the international sales manager of Plan Optik AG and (together with his team) manages the accounts of Plan Optik AG including technical and commercial tasks.

Plasma-based process solutions for Packaging

Lazerand, Thierry
Director of Business Development
Plasma-Therm

AbstractThe convergence of SoC and SiP (more More and more than Moore) is becoming both a focus and a challenge not only for device designers but to packaging specialists.
At the manufacturing level, this convergence generates a bridge between the Front End and Backend environments and makes transitioning some Front End processing solutions into Back End attractive. Although Front End processing equipment using plasma technology is very mature, it is not always easy to directly transfer it into packaging facilities. Reluctance in the Back End environment to avoid unfamiliar technology and one they might consider relatively too expensive, limits acceptance. Concerns regarding thermal budget, plasma interactions and new potential sources of contamination, are slowing down the adoption of technologies which can bring extreme gains even when well-proven as accepted as enabling and productive technologies in both fab and packaging environments. This describes the current dilemma for equipment vendors introducing existing plasma-based equipment into advanced packaging.
Plasma-Therm, along with Disco, offer a complete suite of solutions for wafer singulation. In addition to the fundamental singulation step using saws, lasers, and plasma, a comprehensive process flow and integration addresses optimum wafer preparation, street clearing, and post dicing cleaning.
This presentation reviews the pros and cons of various singulation methods and provides an overview of technology and market drivers pulling device manufacturers to adopt plasma dicing.
Process integration flows that show pre-plasma etch wafer preparation and post-plasma etching cleaning will be shown along with results for final die quality.

BiografieThierry Lazerand
Director Business Development, Plasma-Therm
Thierry Lazerand experience spans over 30 years with lead roles in front end device manufacturing, technical marketing and business development responsibilities for device manufacturers and equipment vendors in Europe and USA. He received his Master in Material Sciences and MBA from universities in France.
His current role at Plasma-Therm is to drive strategic marketing along with product marketing, and business development in served and new markets.

AbstractIn recent years, time-of-flight technology has evolved from simple devices which require additional off chip components like CPLDs, ADCs and microcontrollers into form factor optimized fully integrated SoC solutions. Today, sensor configurations ranging from one single pixel only up to arrays with several hundred of thousand pixels are available with pixel pitches ranging from a few hundred micrometers down to ten micrometers or less. The increasing level of integration and the variety of possible pixel configurations in terms of both size and count, combined with options to additionally tailor a given sensor device to specific system level constrains, make ToF technology a scalable solution for a wide range of applications. This talk will cover quite obvious as well as emerging applications related to depth sensing in the automotive, industrial and consumer markets.

BiografieStephan Böhmer graduated in microelectronics from the Technische Universität Dresden in 2005. He obtained his PhD in 2009 from Technische Universität Dresden where he was working on neural network based self-learning image processing algorithms. He joined pmdtechnologies in 2010, designing integrated ToF image sensors. Today he is directing the department of product development.

Zero delay Focus with poLight TLens

Dumarest, Jacques
System Principal Engineer
poLight

AbstractpoLight first product, the TLens Silver, is not just a replacement of traditional VCM technology for Auto Focus, it enables a range of totally new experiences, use cases and ways to build innovation and hence strengthen the differentiation for mobile phone maker.
Indeed, thanks to the extreme focus speed, the poLight technology enables instant focus that will dramatically enhance the user experience, enabling image capture of events always in focus in almost any conditions. poLight will present its innovative way of implementing the technology that will enable always sharp image without the need of running traditional autofocus algorithm or using specific distance measurement system.
Beside the unique capabilities of the TLens (the Tuneable Lens) such as: extremely quick autofocus, Constant field of view, High optical axis stability, extremely low power consumption that can enable instant image acquisition always in focus, the TLens is a key enabler for Multicamera solution. Due to its small footprint the cameras can be placed close together (good for high resolution, extended dynamic range, optical zoom etc), the constant field of view and high optical axis stability (improve image stitching/bracketing computation process) and no electromagnetic cross talk between cameras and surrounding electronics like loudspeakers, antennas etc. which in turn reduce implementation & calibration cost.

BiografieThe author has more than 30 years’ experience in image processing. From Computer Graphics at Getris Images, to STmicroelectronics: Image compression (MPEG decoder for Set top box) division, then architect for Mobile platform and Imaging division before joining poLight 4 years ago. Jacques has a deep knowledge of imaging technology and mobile ecosystem. He is in charge of Software and System development in poLight R&D team

POLLEN METROLOGY

Foucher, Johann
CEO
POLLEN Metrology

AbstractPOLLEN METROLOGY is a technology startup specialist in metrology and nanotechnologies. We are offering Nanometrology software suited for different industrial domains and interoperable with any type of metrology equipment & data format.
Today, nanomaterials are present in many daily life products: electronics, cosmetics, textiles, food, …Production yield becomes more difficult to contain because of the use of nanomaterials & their tight specifications. Regulation is becoming more and more restrictive and requires both control & traceability of Nanometrology data.
The measurements done today at the nanoscale are not accurate enough. The measurement accuracy can affect the value chain of industrials using nanomaterials due to a false analysis.
Market needs more efficient metrology tools to comply with regulation, reduce time to market & increase production yield
Nanomaterials become so complex and difficult to analyze that decision makers need to use the benefits of various complementary metrological tools (microscopes) to support them.
Current metrology software have many limitations to answer to these requirements:
- Specific to one metrology technique
- No Data aggregation & fusion
- Measurement process takes longer time
- No traceability
- No automatic reporting related to process
Our technology consists in a universal software which is composed of 3 independent layers that can handle and fusion any type of data coming from any metrological equipments. This unique software architecture which embed state of the art algorithms allows the aggregation of the strengths of each individual metrology technique in order to virtually create a perfect metrological tool which is mandatory for advanced nanoprocesses control
PLATYPUS software can be used in different development cycles of the product: R&D, production, quality control, certification & end of life. The software has been designed to cope with various industrial segments (semiconductor, health, transport...)

BiografieAfter receiving his PhD in 2003 from Grenoble University with a specialization in plasma physics and his usage for advanced semiconductor CMOS gate etching, Johann Foucher worked until 2012 for CEA/LETI institute as a researcher and project manager in the field of nanometrology for semiconductor industry. He has contributed to major AFM3D and CD-SEM enhancements for IC Manufacturing. From 2008 to 2012, he was assignee at IBM Fishkill where he has jointly developed new metrology methodologies for sub-30nm node technologies. It leads to the introduction of the hybrid metrology concept for the industry in order to get the best from each metrology technique to reduce R&D cycle time and increase yield ramp. In 2014, he has co-founded and is currently the CEO of the start-up POLLEN METROLOGY which develops and commercializes software solutions dedicated to hybrid metrology based on data fusion methodology. Such platform can be applied to any type of industry which produce or integrate nanomaterials in order to reduce drastically cycle time and produce sustainable nanotechnologies

AbstractOptical metrology provides versatile tools for the solution of many measurement and inspection tasks. Applications in many fields benefit from the non-contact nature, the non-destructive working principle, the fast response and from high sensitivity, resolution and accuracy. In the field of MEMS optical measurement can provide a convenient access to both static and dynamic mechanical properties of a device thus providing complementary information to just electrical testing. These measurement data are necessary for the verification of new MEMS prototypes, the validation of FE models, and for MEMS reliability testing. A general technology and application overview with special emphasis on Laser-Doppler-Vibrometry will be concluded with the most recent progress as optical (sub-) pm 3D vibration analysis and ultra-high-frequency vibrometry.

BiografieHeinrich Steger studied Physics at Bonn University and got a PhD in Molecular Physics from Freiburg University. Since 2003 he is with Polytec GmbH and responsible for Strategic Product Marketing in the Business Unit Optical Measurement Systems.

Semiconductor Test: A moving target cost, A changing landscape

Mayor, Cedric
Chief Technology Officer
PRESTO ENGINEERING

AbstractTraditionally, semiconductor test cost has been viewed as a quality component that tracked COGS reduction like transistor cost shrink. With adoption of connected and smart automotive applications and the internet of everything, new test requirements will drive the cost portion of COGS up; those requirements include secure chip testing, new RF connectivity transcievers, millimeter wave, etc. We will discuss how those costs component goes up and how they can be managed.

BiografiePrior his inception as Chief Technology Officer at Presto Engineering, Cedric served as corporate program manager for Philips Semiconductor and then NXP semiconductor where he was responsible for Silicon New Product Introduction in advanced process nodes. In charge of product line yield maturity, he managed external foundries transfer of front-end specialty options for RFBiCMOS, and BCD in high volume manufacturing. Cédric holds a MS-EE from Ecole Centrale in France, four patents in the area of chip design and DFX, and contributed to several publications in the field of design and semiconductor product test.

E-Thread™: Using MEMS technology for Inserting Electronics in Textile Yarns.

ARENE, EMMANUEL
CEO
PRIMO1D

AbstractE-Thread™ is a 3D microelectronic assembly technology that allows for a direct connection between a chip die and external conducting wires, without using the classical leadframe-package scheme. It allows for an extremely dense assembly, so small it can be inserted inside a textile yarn. The current application is using RFID as functional die and work in progress aims at using sensor nodes. The presentation will describe the E-Thread™ technology and its extension to the MEMs and sensor field.

BiografieEmmanuel Arène has over 25 years of experience in industrialization of innovative technologies and international management. Holder of an engineering degree from Supelec Paris, he has worked for major corporations like IBM Microelectronics, and contributed to the development of Soitec during 15 years as VP Industrial Operations, CEO of the company’s Singapore branch and GM of the solar business unit. He co-founded Primo1D in 2013 and acts as CEO and Chairman of the Board.

Directly produced semiconducting carbon nanotubes and their application

Bezugly, Viktor
CRO, co-founder
ProNT GmbH

AbstractFor the development of the semiconductor industry and applications, there is an urgent need of new materials which allow further miniaturization of active elements and enable increased energy efficiency and reliability of devices operation.
Carbon nanotubes (CNTs) are nanoscopic tubular objects consisting of carbon atoms. Single-walled nanotubes (SWCNTs) have extraordinary electronic and thermal conductivities and are very attractive materials for the use in innovative electronic devices like computer chips, sensors, displays, photodetectors and other.
However, conventional processes to produce SWCNTs are not optimal, they yield a mixture of metallic and semiconducting SWCNTs, having also admixture of other chemical substances like catalysts. This induces failures and dysfunctions when integrated in the SWCNT-based applications.
Start-up company ProNT GmbH is engaged in the production of carbon nanotubes. Our know-how is a new method of catalyst-free production of high-quality SWCNTs with defined electronic properties, either semiconducting or metallic. This technology solves the problem of the direct production of SWCNTs with specified electronic properties. This will finally allow using the high potential of SWCNTs in electronic and photonic applications. Moreover, compared to SWCNTs obtained by sorting-out the raw mixture, nanotubes produced with our methods are defect-free, have no rests of catalyst particles or other chemicals. Such kind of SWCNTs was not available on the market up to now.
Our production procedure yields ready-to-use SWCNTs allowing their direct application by customers without a pre-treatment. The obtained products are materials and components which have a high potential in the application in innovative electronic and photonic devices. We provide optimally designed SWCNTs and SWCNT monolayers on different substrates for the individual needs of customers from academia, R&D and industry.
Several applications of semiconducting SWCNTs are presented.

BiografieViktor Bezugly studied Physics at Kharkov National University (Ukraine) and got his Master in Physics in 1998. In 2004 he obtained his PhD in Physics at the Max-Planck-Institute for the Physics of Complex Systems, Dresden (Germany). After this he worked as a research associate at the Max-Plank-Institute for Chemical Physics of Solids, Dresden. In 2010 he joined the chair of Prof. Cuniberti at TU Dresden where he heads a research group "Nano- and Mesoscopic Systems". There he works on structural and electronic properties of carbon nanotubes, effects at the nanotube-lead interface, synthesis and chemical functionalization of CNTs for their application in organic solar cells, gas sensors, biosensors, thermoelectric and nanophotonic devices. He is CRO and a co-founder of ProNT GmbH.

A scientific HDR Multi-spectral imaging platform

Dupont, Benoit
Business Development
Pyxalis

AbstractIn many fields of applications, noise floor has been the key parameter to choose or develop a new instrument. Especially in astronomy, medical, and space application, the look for the lowest possible noise floor led to the development of interesting technologies. However low noise detector have usually a limited dynamic range, unacceptable in the context of multispectral imaging where the contrast between band can be very high. In this paper we present a new scienctific detector, HDPYX dedicated to high contrast imaging applications, such as, for instance, hyper spectral or multi-spectral applications and we will present applications of this detector in those fields.

BiografieBenoit Dupont received his PhD in physics from the University of Paris-Sud in 2008 and an IC design engineering degree from PolyTech Montpellier in 2002. He worked as digital system engineer and cmos image sensor designer at FillFactory until 2005. He made his PhD research in partnership with the LETI and ULIS in Grenoble, France, in the field of readout circuits for bolometer infrared image sensors. He was design leader and business developer at Caeleste until 2015 when he joined Pyxalis as head of Business Development.

AbstractWith the ever scaling trend of pixel in the CMOS Image Sensor (CIS) industry, the challenge of overcoming limited Full Well Capacity remains to achieve adequate Dynamic Range in various industry applications. For consumers, the challenge remains to match the dynamic range of the human eye in capturing high dynamic range motion video. For automotive and industrial applications, high dynamic range is a must to ensure all details are captured in both high light and low light with good signal to noise ratio.
Traditionally, multi-exposure capture, in varying exposure time, is implemented to achieve wide dynamic range. This can lead to problems with motion artifacts as well as poor low light signal to noise ratio.
Variable Temporal multi-sampling with up to four sub-frame exposures combined with partial transfer has been proposed to address low light sensitivity and yield superior stop-motion performance.
However, there hasn’t been a method that combines all these beneficial aspects together to offer best of all technologies proposed in the past.
We report on a threshold based method that predicts the result of a short sub-frame partial charge transfer between the transfer gate to the floating diffusion in a standard four-transistor (4T) pixel, CMOS Image sensor (CIS) in a variable temporal multi-sampled imaging system to achieve improvement in low light signal to noise ratio by up to 21dB, enable stop motion capability without compromising Dynamic Range performance.
The model is verified in silicon using TSMC 65nm 1.1um pixel technology 1MP test chip array. We demonstrate side by side comparison of Dynamic Range and Low Light Signal to Noise Ratio between partial transfer technique against the traditional full transfer technique of a variable temporal multi-sampled high dynamic range system.

BiografieSalman Kabir is currently part of the Emerging Solution Division of Rambus, California working on Binary Pixel Technology and Lensless Smart Sensors. He has been working in the Imaging division for over 5 years, working mostly with image sensors used for consumer applications. Prior to Rambus, Salman was a Pixel Design and Characterization Engineer at ON Semiconductor, formerly Aptina. Salman Kabir has received his Masters of Applied Sciences from the University of Waterloo, Canada and his Bachelors of Applied Sciences with honors, from the University of Toronto, Canada both in Electrical and Computer Engineering.

BiographyJean-Luc Jaffard was born in Alès (France) in 1956
He has been graduated from Ecole Supérieure d’Electricité of Paris in 1979.
He started his career 1980 joining Thomson- Semiconductor Bipolar Integrated Circuits Division as Chip Designer for Consumer applications.
In 1987 after the creation of SGS Thomson Microelectronics (merger of Thomson Semiconductor and SGS Microelectronica) he became Video Division - TV Design Manager coordinating the development of the entire product family dedicated to Analog TV and VCR.
From 1996 to 1999 Jean-Luc Jaffard paved the way of Imaging activity at STMicroelectronics managing the first internal projects and being at the forefront of the acquisition and integration of VLSI Vision Limited.
He was then appointed Imaging Division Research Development and Innovation Director managing a large multidisciplinary and multicultural team spreaded around the world. His responsabilities were covering imager technology coordination and image sensors, image processing controllers and camera module development and industrialisation. In 2007 Jean-Luc Jaffard was promoted STMicroelectronics Imaging Division Deputy General Manager and Advanced Technology Director in charge of identifying, selecting, sourcing or developing the breakthrough Imaging Technologies and Applications In 2010 he moved to STMicroelectronics Headquarter to develop a new business line exploiting the wide range of Intellectual Assets. Multiple Licensing agreements have been concluded demonstrating the benefits of such business model
Jean-Luc Jaffard owns multiple patents in semiconductor and Imaging domains and has been invited speaker in many conferences worldwide.
In January 2014 he created the Technology and Innovation branch of Red Belt Conseil, to support High Tech actors like SME, Research Institutes, Start-ups, Analyst, Investors and public authorities
and he has also be appointed SEMICON Europa Imaging conference chairman

Application of Flex Substrate in Subretinal Implant

Rudorf, Sandra
Deputy Manager R&D
Retina Implant AG

AbstractSome people suffer from blindness due to a hereditary disease, retinitis pigmentosa. It results in the gradual degeneration of the photoreceptor cells. The remaining retinal network, however, stays intact. In the case of the presented implant, the function of the degenerated photoreceptors is replaced by a microchip, consisting of a 2-dimensional array of photodiodes and electrodes. The subretinal implant resumes the same place as the degenerated photoreceptors. Hence, the remaining retinal network is employed for natural signal processing.
Mounted on a carrier, the retinal chip is placed intra-ocularly. To provide the chip with energy, the chip carrier is connected to a subcutaneous supply unit. It contains a coil for inductive coupling to an external unit. All implant components have to be biocompatible. A further requirement of the chip carrier is flexibility, due to the implantation procedure and the curvature of the eye. Further-more, the chip carrier has to be long-term stable in a saline environment: a low water vapor permeability is essential as well as good adhesion of the carrier layers.
The material of the presented chip carrier is polyimide with gold traces. The signal assignment is chosen such that neighboring potential differences are kept low. Additionally, intermediate conducting traces with high impedance are implemented, which significantly improves the long-term stability of the implant.
Though polyimide represents a good barrier, conductive electrolyte solution from the human body permeates the metallic structures beneath the polyimide after a prolonged period of operation. This leads to the seemingly sudden failure of the implant in the patient. Hence, the topic of permanent implant functionality in clinical practice has to be addressed. Based on the international standard ISO 5841, the product failures observed during clinical use are analyzed statistically. The implemented procedure provides the cumulative survival rate as key figure.

BiografieSandra Rudorf received the Dipl.-Ing. and Dr.-Ing. degree in electrical engineering from the University of Stuttgart, Germany, in 2005 and 2012, respectively. At the end of 2011, she joined Retina Implant AG, Reutlingen, Germany, as Project Manager for Medical Electronics. Since April 2016, she is Deputy Manager of the R&D department.

BiographyThomas Richter, since July 2015 Vice President of the Wafer Fab 150/200 mm & MEMS at BOSCH Reutlingen, was born 1974 in Chemnitz. Working for SIEMENS, INFINEON, QIMONDA and MELEXIS he now has about 20 years of experience in the semiconductor industry. He holds a Diploma in Micro Technology of the University of Applied Sciences Zwickau (WHZ).

Rapid introduction of new technologies for future automotive systems

Ernst, Gabriele
Engineering Director
Robert Bosch GmbH

AbstractAdvanced driver assistance systems, automated driving features, and comprehensive vehicle connectivity are key selling features for current and future automobiles as they have direct impact on the driver’s perception, comfort and safety. The race of car manufacturers towards smart mobility is both, a major challenge and an opportunity for the automotive electronics industry.
Smart mobility requires highly integrated solutions with technology and packaging features and performance known from consumer electronics, but designed and approved for safety-relevant automotive applications under harsh conditions. Heterogeneously integrated packaging solutions will significantly increase technical complexity, although longer development cycles are not acceptable.
At the same time automotive quality standards and lifetime requirements for the entire system have to be fulfilled, knowing that trends in automotive electronics will push the limits for certain applications to even higher levels than today. Therefore future packaging solutions in the automotive environment will be most probably not a “one fits all” but a tailored approach. The increasing number of packaging solutions with dramatically growing complexity rise the question of an economically viable qualification strategy.
Key capabilities to be successful are a profound knowledge of technology features, the related failure modes, and quantitative characterization of materials and interfaces. Those will be the basis for improved simulation-based engineering already in early design phases.
Different aspects of this methodology will be discussed, giving some examples and an outlook on future areas of improvement.

BiografieGabriele Ernst has studied physics in Tübingen, Grenoble and Cologne.
She joined the group of Prof. von Klitzing in Stuttgart for her PhD specializing in semiconductor physics. For her thesis, she received the Otto-Hahn-Medal of the Max-Planck-Society.
After her PhD she worked in the material science research lab of Bell Labs in Murray Hill, New Jersey before joining Bosch in 1998.
At Bosch she held several positions in ASIC product engineering, manufacturing and development.
Currently she is director for semiconductor technologies, assembly and EDA tools in IC engineering.

Non-Equilibrium Gas-Dynamic Effects in Inertial Sensors

Nagel, Cristian
Ph.D. Student
Robert Bosch GmbH

AbstractMEMS acceleration sensors have been systematically analyzed across a wide temperature range [1]. Failure mechanisms such as offset drift (TCO) and sensitivity drift (TCS) induced by the thermal mismatch of different materials are mostly understood [2]. However, in complex electronic devices (e.g. smartphones) the distances between adjacent components are small. Thus, power intensive (hot) components like microprocessors can create non-equilibrium temperature distributions in small components in their vicinity. [3]
The influence of those temperature gradients on MEMS sensors has never been investigated before. Therefore, a measurement system has been developed to apply a static temperature difference (ΔT=T2-T1) between the bottom and top side of a sensor. The temperatures T1 and T2 are controlled by two Peltier elements that are connected to copper inserts. The sensor (soldered onto a PCB) is placed between those copper inserts and clenched with soft thermally conductive pads on the top side of the sensor and the bottom side of the PCB. The system rotates in the earth’s gravitational field to investigate the signal offset and sensitivity.
Detailed analysis were carried out using a LGA-type inertial sensor (BMI160 provided by Bosch Sensortec). The temperature gradient ΔT across the stack sensor/PCB was varied between 0 K and ±5 K, representing maximum values for smartphones [3]. The offset of the z-axis shows a linear dependency on the temperature gradient with a maximum offset deviation of 100 mg.
The CTE mismatch of different materials can be excluded as root cause for this effect. Presumably, the effect must be attributed to the temperature distribution of the gas within the MEMS cavity. Different physical hypothesizes including classical momentum transfer, heat induced fluid motion and non-continuum effects (such as Knudsen forces or thermal creep forces) are presented and their correlation with experimental results discussed.

BiografieCristian Nagel is a Ph.D. student at the Applied Research Department of Robert Bosch GmbH in Renningen, Germany. He has joined the team in January 2015 and is since working on gas dynamic effects in MEMS (micro-electromechanical systems) acceleration sensors and advanced interconnects for MEMS on foil and MEMS embedding in foil.
Cristian Nagel was born in Zwickau, Germany on 18th December 1990. After college in 2009 he started his Bachelor's studies in mechatronics at TU Chemnitz. Before graduating in 2012, Cristian engaged in electronic nanosystems at Frauenhofer Institute (ENAS) and invented and simulated microfilters for blood filtration. In the same year he started his Master´s studies in micro- and nanoelectronics while working on DSMC gas flow simulations and reduced order modeling of MEMS accelerometers. In 2014, Cristian successfully graduated from University of Chemnitz with a Master of Science.

I4.0 @ Bosch: People as key player

AbstractI4.0 technology is a sozio-technical system, which has strong interdependencies between people and technology. People not only invent I4.0 technology they use it as well. Their creativity and interventions are important to develop and perform a high standard. That is why one of the 7 important features of I4.0 @ Bosch is “People as key player”.
Within the next decade, work in shopfloor will change tremendously and we believe that this change is no destiny but can (and must!) be shaped. In the presentation first examples of this change will be shown together with a description of the main action fields for management and HR.

BiografieJens Knut Fabrowsky has been Executive Vice President Automotive Electronics of Robert Bosch GmbH since April 2012. He was born on 13th August 1968 in Esslingen (Germany) and is married. He studied mechanical engineering and industrial engineering at the University of Stuttgart (Germany) and the Technical University of Munich (Germany). Career stages in the Bosch Group: 1999 Director Chassis Systems, Blaichach, Germany - 2000 Technical Plant Manager Gasoline Systems, Rutesheim, Germany - 2004 Plant Manager Gasoline Systems, Eisenach, Germany - 2007 Executive Vice President Manufacturing Starter Motors and Generators Division, Schwieberdingen, Germany - 2012 Executive Vice President Automotive Electronics Division, Reutlingen, Germany

i4.0 - semiconductor and "traditional" industry on a similar track

Schuler, Thomas
senior expert
Robert Bosch GmbH

AbstractAs the methods and technologies of manufacturing are getting more complex, less transparent and closer to the edge of feasibility, the "traditional" industry is facing similar challenges as the semiconductor industry. Therefore tools like MES, material tracking (e.g. with RFID) and other enablers of connectivity become more important and widespread in the industry. The presentation will show the Bosch-strategy on i4.0 with examples of mass production as well as manufacturing of very diverse products in small quantities. Furthermore the dual strategy of Bosch as a lead operator and a lead provider will be highlighted.

BiografieThomas Schuler is senior expert at the "innovation cluster connected industry" at Bosch in Stuttgart. After recieving a doctorate degree in Physics from University of Stuttgart in 1998 he started his industrial career at the Bosch semiconductor production in Reutlingen (Germany). After several positions he was in charge of automation projects in the 200mm-wafer-fab which started production in 2010. After 6 years dealing with automation and connectivity in the semiconductor production he joined the "innovation cluster connected industry" in 2015.

AbstractThe double trench MOSFET technology, featured in the new 3rd generation SiC MOSFETs from ROHM has already been introduced in previous conferences. A review of this structure and its main advantages compared to the traditional planar MOSFET structure will be outlined, including static and dynamic characteristics of both device types. It features a lower on-state resistance RDSon (from 8.5 mΩcm2 to 4.1 mΩcm^2 for 1200V devices) and lower turn-on losses (about 45% less).
The core of the presentation will be centered in reliability and robustness test results of this new device. For a discrete device operating at temperatures up to 175°C this comprises:
-Lifetime estimations in blocking state and of gate oxide
-Gate-Source threshold voltage shift (High temperature gate bias test for positive and negative VGS values)
-Body-diode reliability (DC and pulse test)
-High-humidity, high-temperature reverse bias test
-Avalanche ruggedness and typical breakdown voltage
-Short circuit withstand time
The results indicate that the 3rd gen. MOSFETs achieve a better performance than the previous one without compromising device reliability. However, due to the reduction of the on-state resistance RDSon, the short circuit saturation current is larger than in the previous generation. This leads to a reduced short circuit withstand time (5 ms), roughly 50% of the one achieved before.

BiografieFelipe Filsecker was born in Viña del Mar, Chile. He received the Electrical Engineering degree from the Pontificia Universidad Católica de Valparaíso, Chile, in 2009. After this he worked in the Chair of Power Electronics of the Technische Universität Dresden, Germany, where he specialized in the area of characterization and application of high power semiconductor devices. Currently he is working as an application engineer at ROHM Semiconductor.

Looking on Modern Automotive Aspects for Chip Assembly, Chip Testing, and Chip Qualification

Kusterer, Joachim
Technical Manager SCM
RoodMicrotec

AbstractIn recent years demands on quality and reliability of electron devices for automotive applications have increased significantly. Depending on particular applications, device failure rates are often as low as 1 to 5 ppm for 0km and field rejects. Hence, qualification procedures according to AEC Q100/101/200 are in most cases not sufficient any more. Therefore, state of the art are application targeted qualification methods based on principles of “Robustness Validation”. The heart of such investigations are “Mission Profiles” describing specific device application.
In this presentation critical aspects of chip assembly will be discussed such as tight lead pitches, thermal mechanical stress and fatigue, multiple row QFNs, cracks and voids in solder joints, and wettable flanks for sidewall metallisation.
Furtheron, we will show potential qualification routines based on statistical analysis of failure modes of sufficient numbers of devices from different fabrication lots in order to specify margins of a device used in a certain application.
Finally, aspects of device test will be presented such as wafer test and final test under different ambient temperatures, stress tests at high voltage and high frequency, statistical analyses like PAT or Good Die Bad Neighborhood.
All parts of the discussion will include results of our failure analysis lab for illustrations of different failure types and failure mechanisms.

AbstractIn semiconductor, the age of 3D is expanding in all market segments. In power electronics, vertical devices have always exploited the 3rd dimension and most recently non-volatile memories migrated from planar to 3D-NAND in HVM. The same transition is proceeding in MEMS and advanced logic devices with the possibility of forming monolithic stacks at each level of logic and/or sensors.
One common bottleneck in this transition has been the temperature limitation in the manufacturing process of the top layer. For standard annealing techniques, this temperature is uniform inside the wafer and has a similar limitation (typically on the order of 500°C or less) to the ones in BEOL. SCREEN is providing a unique solution which is able to treat the top layer selectively and independently from the buried stack. Using UV laser annealing technology we are able to bypass all temperature limitations achieving a surface temperature at, or in excess of, the melting point of the silicon on the top layer but minimizing the annealing effect in buried layers and substrate.
In power electronics the efficacy of the approach has been demonstrated over a significant period of time for Si based devices, and now has extended to emerging SiC-based devices. Possible value has been shown for memory. In MEMS, the top sensitive layer can be formed without temperature limitation on top of buried CMOS technology. Finally, the surface localized annealing enables electronics on alternative substrates such as low-cost, flexible, organic plastic materials, often having poor robustness to high temperature.

BiografieElectronic engineer and specialized in nanotechnology, Fulvio Mazzamuto started his career as researcher at Paris University XI. In 2008, fascinated by the interactions of multiple physics he started modeling and engineering the interactions between electrons, phonons and photons in emerging materials and devices. Starting his Ph.D. during the boom of two-dimensional materials, he applied his multi-physics experience to explore thermal and electrical transport in graphene nanoribbon, up to design the first graphene-based thermoelectric generator.
Obtained his Ph.D in 2011 in Paris University XI, he join EXCICO, company specialized in laser annealing system for semiconductor manufacturing process. He has been working two years as field application manager, for the adoption and the integration of laser anneal in manufacturing process of Si-based power device, backside CMOS illuminated sensor and MEMS.
In 2014 he started developing new processes solutions around laser annealing technology to open new market opportunities for LASSE, (former EXCICO), new subsidiary of SCREEN semiconductor group. Today he is deeply involved in power electronics for laser annealing integration in next generation devices, including Si-based, but especially the emerging SiC and GaN-based devices.

200mm Fabs Re-awaken!

AbstractSpurred mainly by increasing content in mobile devices but also by IOT, 200mm fabs make a return, signaling a new hope of growth for the industry. 200mm fabs are striking back with new fabs being built and capacities expected at levels seen back in 2006. This presentation gives a glimpse into the past, present and resurgence of 200mm fabs. The data are derived from a soon to be release update of the SEMI Global 200mm Fab report that provides insights to fab activities and capacity trends through 2020 .

BiografieCHRISTIAN GREGOR DIESELDORFF
Director Industry Research & Analysis
Chris has 30 years of industry experience. He earned an engineering degree in chemistry at the University of Applied Science in the German Alps.
In 1986, he began as process and development engineer for 1Mb DRAM on 4- and 5-inch wafers at the new pilot line at the Siemens R&D center in Munich, Germany.
In 1990 Chris moved to the US as one of the first members of the “Development Alliance Team” at IBM in East Fishkill, New York, at the world’s first 200mm facility.
From 1996 to 1999 he held the positions of engineering manager and director of the world’s first 300mm beta line at International Sematech in Austin, Texas.
In 1999, he became the quality assurance manager for Memory and Graphics chips for North America at Infineon in San Jose, California.
Chris joined Strategic Marketing Associates in California as senior analyst and director of industry research in 2001.
Since 2007, he conducts worldwide fab database research and forecasts in the Industry Research and Statistics group at SEMI headquarters in San Jose, California.

Welcome

Guillou, Yann
Membership Manager EMEA, Russia and CIS
SEMI

AbstractSEMI is welcoming you.

BiografieYann joined SEMI in 2011 and is managing the Membership Services of SEMI Europe.
He started his career at STMicroelectronics as a New Technology Marketing engineer. He then worked in the CTO Office and Back End Sourcing organizations of ST-Ericsson, responsible for TSV and Advanced Packaging activities.
Yann received a master degree on Materials and NanoTechnologies from the National Institute of Applied Sciences (INSA) as well as a specialized master on Innovation and Technology Management for Grenoble Business School(GEM).

AbstractSustainability not only makes business sense, it is also often a legal obligation. Companies wishing to do business on different markets need to navigate the local and international regulatory environment and make sure they are working with their upstream supply chains and their customers to comply with the law.
This presentation will provide an overview of the EU regulatory environment, looking at the laws that companies from across the supply chain (from materials to manufacturing equipment and device manufacturers) must comply with when manufacturing in Europe or placing their products on the EU market. Issues addressed include REACH, RoHS, Ecodesign, Machinery Directive, F-Gas regulation, the EU Circular Economy policy package and how SEMI is voicing the industry’s views and helping members comply.

BiografieRania (Ourania) Georgoutsakou is Director of Public Policy for Europe with SEMI, the global industry association representing the manufacturing supply chain for the semiconductor and related industries. Her role is to support SEMI’s global membership in evaluating and complying with European policies and legislation and to liaise with decision-makers to promote Europe’s global competitiveness. Rania’s areas of activity include EU institutional law, innovation, regional policy, health and social policy, Environment Health & Safety and EU market access rules.
She was previously Director for Lobbying and Thematic Coordination for the Assembly of European Regions, the largest European network of regional politicians, where for over 10 years she led the AER’s work on the European Lisbon Treaty, health and social policy and e-innovation.
Rania holds a LL.M in European Law and a MSc.Econ in European policy making. She lives with her family in Brussels.

Welcome

Altimime, Laith
President
SEMI Europe

AbstractWe would like to welcome you to the 2016FLEX Europe conference during SEMICON Europa.

BiografieLaith Altimime joins SEMI as president of SEMI Europe, as of October 1, 2015. He has more than 25 years of international experience in the semiconductor industry. Most recently, Laith held a senior director position in business development at imec. Prior to that, he held leadership positions at Infineon/Altis, Qimonda, KLA-Tencor, Communicant Semiconductor AG, and NEC Semiconductors. Laith holds a Honors Bachelor's Degree in Applied Physics and Semiconductors Electronics from Heriot-Watt University in Scotland.

BiographyMichael Ciesinski is President of FlexTech Alliance, SEMI’s first Strategic Association Partner. FlexTech is an R&D consortium chartered with building the infrastructure for flexible electronics manufacturing. Ciesinski’s prior executive positions include President/CEO of US Display Consortium, and Vice-President and Director of North American Operations for SEMI. Prior to joining SEMI, Ciesinski was appointed Director, New York State Labor-Management Committee.
FlexTech sponsors and conducts a multi-million dollar technology development program. In February 2012, FlexTech created the Nano-Bio Manufacturing Consortium (NBMC), focused on human performance monitoring. In August 2015, FlexTech was awarded a $75M US Government grant to form and manage a Flexible Hybrid Electronics Manufacturing Innovation Institute (Next Flex).
Ciesinski is a graduate of the State University of New York at Albany. He is a member of the Dean’s Advisory Council (Engineering) at the California Polytechnic State University at San Luis Obispo.

0ppm failure rate for automotive microelectronics- no chance without extensive and proactive physical and chemical analysis.

AbstractSystem and chip qualification and production release procedures are based today on the AEC Q100 standard. These documents describe a set of tests which are specific to certain failure mechanisms, induced f.e. by higher temperature. However, these tests are today very limited for the estimation of failure rates or even to demonstrate a zero failure rate, as required by the automotive industry. First, the tests are performed on a very limited number of samples (e.g. 77) not allowing to show a low ppm failure level. Second, the tests assume a certain failure mode acceleration by f.e. high application temperature. These models are very often not known and failures show a fully other behavior and acceleration in the field (due to combination of technology excursions, defects, combined voltage, current, temperature, humidity and mechanical stress). Third, the component validation after test is performed only by electrical testing. Physical failure analysis after the test is not required and mostly not performed by the chip and system manufacturers. Very often degradation and aging processes occur, not leading to the chip failure at the end of the test, f.e. formation of intermetallic phases in bonds, formation of cracks, delamination and corrosion. So these issues are not detected and not analyzed and can lead to field failures.
The physical and chemical analysis methods and tools (like XPS, AES, TOF-SIMS) are highly developed to analyze materials and failure modes in semiconductor and system level technologies. The application of these analysis techniques after climate, voltage or mechanical stress application can create a much deeper view inside chip and system weaknesses and failure modes.
The talk shows some typical failure mechanisms found in a lab as service provider for many different companies. Some weak spots are discussed with recommendations for improvements.

Sustainable wet processing using resource and cost saving technology

Klaushofer, Thomas
Product Manager
Siconnex

AbstractIn the modern semiconductor technology resource consumption is getting more and more important.
Ecological and economical processes are a necessity in order to be competitive and to meet the environmental obligations.
For wet processes, huge possibilities are given to reduce consumption or even replace chemicals with efficient and low cost substitutes.
A cost efficient an ecological way is to utilize ozone for various processes.
As example, ozone can be used for stripping a broad bandwidth of various resists or to enhance cleaning processes.
Another big topic is to optimize processes for low DI water consumtion.

BiografieI'm Product Manager at Siconnex. In this role I’m responsible to find and evaluate new possibilities for Siconnex as well as define specifications for our systems.
Prior to this role I was in the Project Development Department of Siconnex.
I'm holding a master’s degree in mechatronics from the University in Linz.

AbstractThe enormous growth of bandwidth will fuel the data center equipment market growth and the demand for optical components and interconnects. Besides new approaches to network architectures, this requires disruptive optical interconnect technologies using highly integrated components and scalable manufacturing processes.
The most viable way to reduce costs tremendously lies in on-chip integration. Sicoya and its foundry IHP GmbH have, over 10 years, developed a process that is capable of manufacturing both the analog electronics and the optics on the same silicon chip with no loss of performance. This has been for 15 years the holy grail of silicon photonics. It means that cost of electronics is vastly reduced, power loss by the on-chip electronics is significantly reduced, and high-speed performance is significantly enhanced.
There is a comprehensive library of photonic and electronic components available, that has reached an advanced product maturity for 100Gb/s optical interconnect solutions. Furthermore the design platform enables a fast transition to 200Gb/s and 400Gb/s transceiver chips.

BiografieStefan Meister is Chief Technology Officer and Founder of Sicoya GmbH. He has a strong background in Silicon Photonics design and integration. At Berlin Institute of Technology he builds up and leads a silicon photonics group from 2008 to 2015. He holds Diploma degrees in engineering and physics and received a Ph.D. degree in Fiber Optics at Berlin Institute of Technology.

High-end low-cost Radar-chips (MMICs) for a broad spectrum of established and emerging sensor applications for crash avoidance and obstacle detection –robotics, automation, UAVs and process industry

Bölicke, Anja
CEO
Silicon Radar

AbstractCurrently, various conventional technologies of short range distance measurement are too costly, consume too much power, place and material, are too heavy, are not robust and reliable enough to enable precise measurements. Advanced sense and avoid applications for power limited systems like drones and robots are simply not feasible.
Silicon Radars 120GHz radar frontend is a miniaturized, mixed signal SiGe chip that consumes significantly less power than conventional radars. As silicon based component it is a true low cost solution at high volumes and it is the first of its kind on the market. It provides high accuracy distance measurements (<1mm resolution). It is satisfying a huge un-met technical need coming from emerging markets (robotics, drones, autonomous transportation).
Silicon Radar - that's a German-based SME with long year expert knowledge in high frequency chip design. Silicon Radar designs and delivers Millimeter Wave Integrated Circuits (MMICs) on a technologically advanced level, manufactured in affordable Silicon-Germanium- Technology (SiGe). We offer high frequency circuits for radar solutions, phased-array-systems and wireless communications. As a so called fabless chip design company Silicon Radar provides both custom specific ASIC design services and supply of standard circuits in frequency range from 10GHz (X-band) up to 200GHz and above. Currently Silicon Radar primarily distributes its ready to use radar chips operating at 24GHz and 120GHz ISM band, radar front ends working at 60GHz are coming soon.
Development, testing, assembly and sales - all from one source - Silicon Radar.

BiografieIn January 2010 Mrs. Anja Bölicke (40) joined the team of Silicon Radar – a premier technology startup designing first class high performance RF-chips. As CEO she oversees the operational and sales aspects bringing in her long year experience in managing RF-projects. She completed her studies of economics and engineering at University of Marburg with excellence and began her professional career as head of sales controlling department of Dresdner Druck- und Verlagshauses (DD+V), part of the Gruner+Jahr publishing group. In 2001 she joined the team of lesswire AG in Frankfurt (Oder) and worked as technical project manager. Among the projects she managed are a location based guiding solution for New Mercedes-Benz Museum Stuttgart, the official CeBit FairGuide for mobile devices as well as the development of a smart-metering device for the German market leader of metering services. In 2008 and 2009 Mrs. Bölicke worked as the sales director of Acoustiguide Germany.

Challenges of Ultra-thin LGA Package for Fingerprint Sensors

AbstractBiometric features, such as Fingerprint, Face and etc, are good and convenient personal identifications for the mobile electronics application. Fingerprint recognition is one of the mature and popular detection methods. Its applications include not only smart phones but also banking card, credit card and wearable devices. Since the space is very limited inside Cards and wearable devices, ultra-low profile will be a Must for those applications. Therefore, a Land Grid Array (LGA)package with ultra-thin profile is employed for the assembly packaging. By using an ultra-thin substrate, thin molding and accuracy mold clearance control, it provides low profile and high sensitivity for the Fingerprint sensor. With thin substrate and the big sensor die, the major challenges of this ultra-thin LGA come from the warpage during the package assembly process. In order to diminish the warpage, lots of experiments were conducted extensively to reduce the package warpage, including molding compound selection (which focus on its CTE and Tg adjustments), post-mold cure optimization, and so on. In this paper, a test vehicle (10x10mm2 body size) with ultra-low profile (0.3mm package total height) was evaluated. Stress simulation was conducted to determine the package construction and work out the bill of material. Screen and corner DOEs which includes molding compound selection and post-mold cure parameters were performed to come out the optimal material and process window. Functional test and Reliability test have been passed as well. This ultra-thin LGA package has been proven to be a feasible and reliable packaging for the Fingerprint sensors.

“Trash 2 Cash”

Drescher, Wolfram
CEO
Siltectra GmbH

AbstractEvery year, material losses from the wafer manufacturing process are in the billions.
The conventional wafer production process uses a wire saw to separate them from the raw material. This leads to a loss of 50% of the valuable material through the resulting material loss and the necessary finishing steps.
Cold Split will change this!
The Cold Split process, developed by Siltectra, allows the processing of semiconductor materials such as silicon, gallium arsenide, germanium, silicon carbide, gallium nitride, and sapphire, as well as bulletproof glass and display glass. A defined layer is first introduced by laser into the material volume. Using a special polymer that tightly shrinks at low temperatures, the wafer is then divided along the pre-defined level.
There are little to no material losses in this process. The wafer characteristics are also better than those of comparable wafers produced by using a wire saw. Additionally, wafers can be made thinner using the Cold Split method. This process allows for up to 50% more yield from the raw materials than with the conventional sawing process. The yield even increases to as much as 95% more when thinning wafers, compared to conventional production methods.
Due to the higher raw material yield and the simultaneous reduction of process costs, the Cold Split method results in huge potential profits.

BiografieDr. Wolfram Drescher received his doctorate at Dresden Technical University's Faculty of Electrical Engineering. He gained his initial experience in industry at Applied Materials Inc. of Santa Clara, California. In 1999, he founded Systemonic AG Dresden, which was later acquired by Philips Semiconductors (now NXP). There, Dr. Drescher held the position of Advance Development Director, and made major contributions to the research, development and market placement of a wide variety of commercial chip sets in the field of mobile communications systems. In 2008, he established the start-up Blue Wonder Communications GmbH, where he held the position of the managing director. The fast growing LTE-chipset developer was acquired by Infineon Technologies AG, respectively Intel Corp. By end of 2012 Dr. Drescher joined Siltectra GmbH, Dresden, as CEO. Under his leadership Siltectra's "Cold Split" process evolved beyond PV application towards utilization in the optoelectronics and high-power semiconductors industries.

The Influence of Repetitive UIS on Electrical Properties of Advanced Automotive Power Transistors

Marek, Juraj
post-doc
Slovak University of Technology in Bartislava

AbstractMOSFETs in automotive systems can be subjected to events of unclamped inductive switching (UIS) over the lifetime of their application [1-2]. UIS occurs when the MOSFET is connected to some kind of inductance (a lumped element or parasitic), and there is a rapid change in current [3-4]. When a power MOSFET is used in circuit application an unclamped inductive load or parasitic elements present an extremely stressful switching condition for the power MOSFET since all energy stored in the inductor during the on state is dumped directly into the device during its turn off, causing the impact ionization within which avalanche conduction is enabled. Repetitive avalanching to which device is subjected for several millions of pulses generates high concentrations of electron–hole pairs that become hot carriers (HC) and can be injected into the gate dielectric [5-6] . Main effects of hot carrier injection (HCI) are change of threshold voltage VTH, drain-source leakage current IDleak, breakdown voltage VBR and ON-resistance RON. These changes during the lifetime operation of the device pose considerably risks against the requirement of a long-term reliability of automotive power MOSFETs [7]. Three different types of automotive grade MOSFETS were used for investigations: vertical DMOS rated to 24 V and two Trench MOS transistors rated to 24 V and 90V. Degradation of capacitances CDG and Cin was observed in all three types of structures. However degradation (shift) of I-V curves was observed only in Trench MOS devices. From analysis it is clear that DMOS transistors are less vulnerable to HCI in case of repetitive avalanching then Trench MOS devices and that breakdown voltage in modern high voltage Trench MOS devices is more affected by repetitive avalanching than in standard low voltage TrenchMOS devices. Dramatic decrease of breakdown voltage for 90V rated transistor from VBR = 118V to VBR = 98 V and increase of on-resistance for 200% was observed after 108 stress pulses.

BiografieDr. Juraj Marek, received his MSc. and PhD degrees in Electronics, both from Slovak University of Technology in Bratislava (STUBA), Slovakia, in 2007, and 2011, respectively. Since 2006 he is employed as a researcher at Institute of Electronics and Photonics. His main areas of expertise are oriented mainly to Si and GaN based semiconductor power devices characterization, TCAD modeling
and simulation, and analysis of energetic capability - UIS test. The results of his scientific work were published in 11 current content journals, several papers in peer reviewed journals and many international conference proceedings.

AbstractSmart Force Technologies (SFT) develops and provides affordable, user friendly and table-top equipment for actors working in the fields of micro and nanotechnologies.
SFT has a strong expertise in nanoparticle handling and more widely in micro/nanofabrication. It especially provides the world first commercial equipment – SF-Research – dedicated to nanoparticles controlled depositing and organization. This equipment has been designed to take advantage of the enormous potential of synthesized nanoparticles in aqueous solution. Indeed, it gives access to their systematic study and their use as building blocks, in order to develop nano-components of the future and integrate them in end products. Application fields are optics, life sciences, communication & microelectronics and nano-manufacturing.
In addition, SFT will soon extend its product portfolio with a new lithography equipment based on a disruptive approach and designed for rapid micro-prototyping.
SFT is a young “Hi-Tech” company born from a joint project between the CNRS and CEA (Grenoble, France). It is supported by the French National Research Agency (ANR), the SATT-LINKSIUM (Business incubator for innovative entrepreneurship) and the competitiveness clusters Minalogic and Lyon Biopole.

BiografieJulien Cordeiro received a master degree in Nanotechnologies and Nanobiosciences from the University of Burgundy, Dijon, France. He joined the Laboratory of Technologies of Microelectronics (LTM), Grenoble, France, as a PhD student working on 3D colloidal architectures for photonics and plasmonics applications. He then co-founded the company Smart Force Technologies where he works as CEO and as manager of marketing and sales.

Opportunities in Photonics

Visser, Richard
CEO
SMART Photonics BV

AbstractSemiconductor Photonics have been around for a long time and shows an increased popularity lately. The technology was typically dominated by III-V materials but today it’s Silicon all over. What’s going on in photonics and why is this technology all of sudden so popular? What technology is to be preferred and for what reason? What are the opportunities in photonics and who can profit from them?

BiografieRichard Visser (CEO and Founder SMART Photonics B.V.) has a background in electronics and business processes and started his career in 1981 as a service engineer on marine and aviation equipment and later on medical equipment for companies like General Electric and Toshiba. He switched in 1991 from a technical position into a commercial position and worked in the industrial inkjet printer market before entering the semiconductor equipment industry in 1997 where he worked for Silicon Valley Group and ASML. In 2007 he moved to Philips Research and was involved with the start and growth of MiPlaza, a research service supplier.
In 2012 Richard founded SMART Photonics, a Pure Play Foundry offering production-services for making photonic components on Indium Phosphide (InP). Next to the uniqueness of the business model in the InP-industry, it’s the newly introduced generic integration technology for monolithically integrating photonic components in InP that’s making SMART Photonics a fast growing enterprise.

AbstractSmoltek specializes in development of nanostructure fabrication technology to solve advanced materials engineering problems, primarily within the Advanced Semiconductor Packaging space.
The company has developed the SMOLTEK TigerTM smart assembly platform - a platform for proprietary nanostructure fabrication and integration. SMOLTEK TigerTM is based on catalytic low temperature growth processing, resulting in formation of nanostructures and optimized for a particular Advanced Packaging applications such as:
• 2.5D & 3D Interconnects
• Integrated solid state mini-supercapacitors
• Thermal Interface Material
A key technology building block for next generation of 2.5D and 3D Advanced Semiconductor Packaging applications involves chip stacking technology facilitated by fabrication of microbump arrays, used for electrical and thermal interconnect between integrated circuits (ICs) and a substrate or an adjacent IC.
The SMOLTEK Tiger™-process utilizes patterned arrays of Carbon Nanofibers (CNFs) to enhance existing Cu-based pillar technology, and eventually replace Cu-based pillars in 2.5D and 3D packaging process flows. Smoltek’s CNF technology can provide near term benefits such as improved electrical, mechanical and thermal performance and reliability, and provides a high confidence development path to scale microbump pitches down to sub-micron level. Other promising application areas for Smoltek’s patented CNF technology within the advanced packaging space includes integration of extreme low-profile solid state mini-supercapacitors and thermal interface solutions.

BiografieSmoltek is a privately held company based in Gothenburg Sweden. Smoltek was spun out from Chalmers University of Technology in 2005 with a vision to see conductive nanostructures improve the efficiency and performance of integrated circuits and other semiconductors. Since then we specialize in development of nanostructure fabrication technology to solve engineering problems in the advanced semiconductor packaging space.
Smoltek has now launched SMOLTEK Tiger™ - a proprietary nanostructure based assembly platform that enables fabrication of optimized and integrated conductive nanostructures for significant improvements of advanced semiconductor packaging application areas such as interconnects, integrated energy storage and thermal dissipation.
Smoltek protects its innovative nanomaterials technology with an IP portfolio of more than 60 patents granted and pending globally, as well as a significant body of know-how and trade secrets. Smoltek offers a commercial licensing model to its extensive IP, this model also includes knowledge transfer and test projects.

AbstractInternet of Things, cloud computing and big data drives the rapid growth of data communication through the internet network as well as within the data centers. In consequence, there is a strong need to increase the interconnection data rate within data centers to limit data flow congestion. Optical communication technology is an answer but faces specific cost/high volume constraints in data centers. The microelectronics industry is now able to provide Silicon Photonics solution to answer theses needs.
At the heart of this technology is the specific silicon substrate that embedded the material structure to guide light: Silicon on Insulator (SOI). The optical physics imposes technical challenges to the SOI specifications such as thickness uniformity. Furthermore, the technology has to be compatible with microelectronics standards for high volume manufacturing to guarantee high yield, in both 200mm and 300mm wafer size.
We present the latest technical results of SOI wafers showing the compatibility with the technical requirements and the compatibility with industrial standards.
In conclusion, the silicon photonics industry that is emerging has the long term substrate roadmap compatible with future low cost mass production of high data rate optical transceivers.

BiografieArnaud Rigny has been Business Development Manager since 2011 for Analog and Power application as well as silicon photonics application..
He joined Soitec in 2006 and was managing R&D program between Soitec and CEA-Leti. For several years, he led the customer technical interface for non-digital applications and managed customers in developping new products on SOI and engineered substrates, including imagers, RF, Power and Photonics, working closely with key customers worldwide..
Prior to joining Soitec, he was Product Line Manager at Avanex (prior Alactel Optronics) where he was involved in optoelectronics devices such as pump lasers and Optical add-drops modules. His experience also includes project leader at Corning in optoelectronics device.
Arnaud Rigny holds a PhD and a Master degree in Electronic and Communication from Ecole National Supérieur des Telecomunications at Paris (France).

Development of a sensitive End Point Detection method for wafer etching applications

Dine, Sebastien
CEO
SOLAYL SAS

AbstractSOLAYL is a provider of R&D and process control solutions for wafer etching applications in the microelectronics industry. New process control solutions are needed because the new generations of chips require the development of new wafer etching steps to manufacture devices smaller than before at the nanometer level, with complicated 3D structures and new materials.
Problem
The same processing time cannot be used for every wafers because of the inevitable wafer-to-wafer variability. The processing time must be adjusted in real-time. Proper detection of the endpoint, known as End Point Detection (EPD), is therefore essential. The traditional optical method (called OES) doesn’t work anymore in some critical applications. We want to provide an alternative EPD solution using our proprietary electrical method.
Technology
Our solution in development is compatible with the existing etching tools. We use an electrical probe to monitor in real time the delivery of the radiofrequency electrical current to the wafer processing area. Our solution detects the appearance of small electrical signals to adjust the processing time. This technique is known since the eighties and has seen very little use in production because the optical method was cheaper and good enough... until now. We introduced multiple proprietary innovations to increase dramatically the sensitivity of this electrical method for End Point Detection.
We are already commercializing a first version of that probe called the “Vigilant Power Monitor” for various R&D applications: PECVD, etching, troubleshooting of etching tools.
Applications
We target the "hard to control" etching steps that can ruin the fabs yield. They are two types of etching applications used in both memory and logic for which the traditional optical EPD method is getting less and less reliable or don’t work anymore: "low open area" etch and/or "high aspect ratio" etch.
Visit us at our booth to discuss about potential partnerships to try our technology!

BiografieM. Dine is the founder and manager of SOLAYL SAS. Before founding the company, M. Dine worked several years in Silicon Valley for Lam Research Corp as a Process Engineer and R&D engineer for plasma etching applications. He managed many R&D projects dealing with RF power engineering and process control. He is convinced that in-situ RF metrology solutions will be needed inside the plasma etchers to manufacture the next generations of silicon chips. He founded SOLAYL SAS in october 2011 to develop and comemrcialize such metrology solutions.

CMOS Image Sensor Evolution: Past, Present, and Future

AbstractCMOS image sensor is dominant at an image sensor market in now, however, until early 2000s, CCD was mainly used in video cameras and digital still cameras, because the image quality of CMOS image sensor was inferior to that of CCD. Through development of its improvement technology and utilization of its benefits including original high-speed, low power consumption, and digital output, CMOS image sensor was widely used in smart phones and replaced CCD at an image sensor market in the late 2000s. CMOS image sensor is also extending function taking advantage of stacked structure. In addition to video cameras, digital still cameras and smartphones, use of CMOS image sensor has spread to such areas as security-monitoring, in-vehicles, and medical. In these fields, it is needed to utilize photon information such as infrared light, distance, polarization etc. which weren't used so much for the video cameras and digital still cameras. I will talk about the key point to expand image sensor market and show three future directions the development of image sensors may take.

BiografieTeruo Hirayama received a bachelor’s degree in Electrical Engineering from Waseda University, Tokyo, Japan in 1981, the same year he joined Sony Corporation. He started in the research division of the semiconductor group, where he worked on SRAM, CMOS LSI and then developed stacked wide band DRAM on LOGIC chip. He joined the image sensor division in 2002 and soon started developing back-illuminated CMOS image sensor and launched it into the market in 2009 and stacked image sensor in 2012. He became senior general manager of the semiconductor technology development division in 2010, and led the development of semiconductor devices. He became senior vice president in June 2013 and he was appointed as president of device and material R&D group on April 1, 2014, and has the responsibility for R&D of displays, batteries and material adding to semiconductor devices.

Increasing Die Strength & Device Yields Using Plasma Dicing

Carpenter, Jo
Etch Product Management Engineer
SPTS Technologies Ltd

AbstractPlasma dicing promises significant benefits to device manufacturers and packaging houses, including increased wafer throughput and die per wafer, which contribute to lowering the cost per die. Recent work has also proved that the low damage plasma processing can also significantly increase die strength, which may be a primary concern for devices which have to operate in harsh environments or subject to regular impact or vibrations. In this work we have investigated the hypothesis in greater detail to quantify the difference in die strength across a range of plasma dicing processes to compare the effects of notch size and sidewall roughness which occur to some degree in all dicing techniques.
Many users will wish to avoid an additional and relatively costly photolithography step, or have non-silicon layers in the dicing lanes which need to be removed before plasma dicing. Therefore techniques using both mechanical saw and laser etching to pre-define the dicing lane prior to plasma etching were also investigated. Neither technique requires an additional masking step, but the user would compromise some of the potential benefits of the new technology, e.g. limiting ultimate minimum dicing lane width, restricting use of the more flexible die shapes and some of the potential for increased throughput.
It was found that there is approximately two times improvement in die strength gained from employing plasma dicing techniques than from conventional blade or laser methods. There is some variation due to the patterning method adopted, but not overly significant. However, if the plasma processing is not controlled correctly, resulting in “notching” under the die at the tape interface, then the die strength is lower than that from the conventional singulation techniques. This presentation will introduce how the effective use of end-point control and pulsed-bias is essential to manage the overetch and notching of the die to deliver stronger die and more good die per wafer.

BiografieJoanne Carpenter is Etch Product Management Engineer at SPTS, and has over 15 years’ experience in the semiconductor and electronics manufacturing industries. Prior to her current role, Joanne has worked for European Semiconductor Manufacturers Ltd (ESM) and ZBD displays Ltd. Joanne joined Surface Technology Systems (STS) in 2007 as an Etch Process Engineer and when STS and Aviza merged in 2009 to form SPTS, she joined the etch samples division as a Senior Etch Engineer. Specialising in development of innovative etch process solutions and supporting SPTS customers on critical advanced packaging technologies in China, Taiwan and North America. In recent years Joanne has been closely involved in the development of SPTS plasma dicing technology.

Leveraging Technology in Manufacturing Automation of Legacy Fabs

Ho, Eng Keong
Director of Photo & IT
SSMC

AbstractSingapore’s Semiconductor Front End Manufacturing started >30 years ago in 1984 with 5-inch progressing towards 6 inch, 8 inch and finally state of the art 12 inch. Although the legacy fabs were expected to phase out gradually, recent technology developments in the “More than Moore” for IoT(Internet of Things) has breathe new life into the 5,6,8 inch factories. Hence, to improve the productivity and cost competitiveness, it is paramount to leverage new automation technologies to improve the manufacturing processes in these fabs. This will help to reduce the gap in manpower requirements required in the legacy fabs against the 12 inch factories. This presentation will share the challenges and how the new technologies can improve factory automation in a cost competitive manner.

BiografieMr Ho is the Department Director of Photo Lithography and Information Technology working in SSMC(A joint venture between NXP and TSMC) for more than 15 years. Much of his work focuses on leveraging information technology to drive manufacturing automation to improve Productivity in SSMC. He also represents SSMC in the working committee of robotics automation in SEMICONSG Vision2020. Mr Ho holds a Master of Technology(Knowledge Engineering) from Institute of Systems Science(NUS) and a Honours Degree in Mechanical Engineering from National University of Singapore. He is also a Spring Singapore Business Excellence assessor.

BiographySerge Nicoleau began his career at STMicroelectronics 18 years ago starting in Production management in their 200mm fab at Crolles near Grenoble in 1998. After various positions in Manufacturing and in Process & Equipment Engineering he was assigned to the newly starting 300mm fab “Crolles2 Alliance” with Motorola/Freescale and Philips/NXP Semiconductors in 2004. This role lead to being Device Engineering Director in 2007 before taking the responsibility of the Crolles 200/300mm Engineering Competence Center as Deputy Director of Operations in 2012. This role includes a specific responsibility for the industrial challenges of Automotive and IoT products in technologies ranging from 0.5µm down to 28nm critical dimensions with their multiple variants and options.
Serge Nicoleau holds an Engineering Degree of the Ecole Polytechnique (Paris), a Master’s Degree in Theoretical Physics of the Ecole Normale Supérieure (Lyon) and a PhD in Particle Physics.

Smart, Green and Lean Facilities: A competitive advantage

Dobson, Edwin
Senior Director, ESH and Facilities
STMicroelectronics

AbstractIn today’s world of rapidly changing technology & product mix juxtaposed upon a complex and demanding legislative framework, it is already a challenge to manage our sites and operations. In addition, customers are also becoming more demanding with higher expectations of the Sustainability performance of the factories used to make their products. Can we, in this context, transform our Facilities from being a “difficulty” into being a competitive advantage?
STMicroelectronics with its 6 FrontEnd and 5 BackEnd sites has historically been a leader in driving the Environmental performance of its Facilities. This has been done through a corporate & local approach and through using a metric, the Environmental Footprint, as a driver to allow prioritization between sites both to address the most pertinent projects for continuous Environmental improvement.
Locally, our sites work hand in hand with the authorities to optimize performance; one example being our site in Agrate, Italy, who have a complete water management program which focused on local community specific needs; the ST site optimized its water treatment process in order to eliminate the withdrawal from the deep aquifer used by the Agrate citizens as drinkable water, in favor of the more salted and not drinkable shallow aquifer. This win win approach gave the advantage for the Company of not having limitation for the next 15 years on the use of the water and the advantage for the Community of the drinkable sources preservation.
More recently, Lean management practices are being deployed throughout our Manufacturing, including in our Facilities. These methodologies change fundamentally the way we work and provide new tools to help us to reduce consumptions, improve the efficiency, safety and motivation of our people and overall give us more effective and sustainable infrastructures.
This presentation will include practical examples showing how smart, green and lean facilities are a way to achieve competitive advantage.

BiografieEdwin started his career in 1984 at Inmos in the UK as a Process Engineer after graduation with an honours degree in Physics from the University of Durham.
After the acquisition of Inmos by SGS-Thomson (which later became STMicroelectronics) he moved to France in 1991 to start-up the Lithography section of ST’s first 200mm fab at Crolles. After several Engineering Management positions he was subsequently made responsible for the Facilities & Infrastructure of the Crolles 2 300mm fab built in 2002. Since then he has held management positions at national and international levels in the fields of Facilities and ESH.
Currently Edwin has a double responsibility for STMicroelectronics; at Corporation level as Director of Environment, Safety and Health (ESH) and for Front End Manufacturing as Director of Facilities & ESH.

AbstractMission profiles for specific automotive applications are becoming more and more demanding from reliability
point of view. Translating this challenging requirements into reliability targets, it means performing trials for longer duration, or using more accelerated conditions (increasing temperature or voltage, etc…).
This study is focused on the failure mechanism understanding and characterization of a thin copper wire over Aluminum pad submitted to a very long stress duration at high temperature: more than 5000hrs @150°C.
Going beyond AEC-Q100 (1000hrs @150°C) and AEC-Q006 (2000hrs @150°C) specified conditions for copper wires, it has been possible to observe the effects of the isothermal stress experienced by the Cu/Al
bonding system, until the wearout.
After thousand hours at high temperature a crack between Cu ball and CuxAlx intermetallic propagates from the ball edge to the ball center, affecting all the bonding area, causing an open contact.
Crack propagation has been evaluated as second order effect of intermetallic growth and evolution, so its
appearing is predictable by the Arrhenius law.
Starting from the electrical results and the experimental evidences, the activation energy for the failure rate prediction has been estimated.

BiografieAlberto Mancaleoni has 22 years of experience at ST in the field of integrated circuits reliability and qualification. From 2005 he has been working in ST Automotive Product Group, developing a specific know-how in plastic package failure mechanisms and reliability interactions between package and silicon technology.
Riccardo Enrici Vaion received the M.Sc. degree in Electronic Engineering from Cagliari University, Italy, in 2009. Since 2011 he has been working in STMicroelectronics, Automotive Product Group, as product quality and reliability engineer. His activity is focused on the failure mechanism understanding of the microcontroller products,both from package and silicon point of view.

The path towards autonomous driving

Duncan, Martin
Business Unit Director
STMicroelectronics

AbstractThe complexity of the requirements for automotive applications is increasing at an astonishing pace, none more so than autonomous driving. The acceleration driven by advancing global safety standards (NCAP) calls for a rigorous step by step approach. Concepts from other domains are being introduced in order to address these increasing demands. For example we are now need to cover fault tolerant and failsafe systems. The functional safety of systems, products and processes increases with every day and with every new development and we must maintain a grasp of the risks during every phase: from the first concept through development and from operation through shutdown. With the increased connectivity and complexity there are serious security challenges for the design of automotive hardware/software architectures due to attacks. With the immense processing power that is being unlocked with multi-processor systems we are now able to address complex issues such as a complete inspection of the vehicle’s environment. In this paper we will discuss the challenges of implementing a safe, secure, complex driver assistance system that paves the way towards autonomous driving.

BiografieDr. Martin DUNCAN is currently ADAS Business Unit Director in the Automotive & Discrete Product Group of STMicrolectronics and is based in Agrate-Brianza near Milan in Italy. In this role he drives the whole business line in the fast growing area for partially and fully autonomous vehicles. He has been in charge to drive the strategy and implementation for those advanced products and applications since the humble beginnings in 2005. The main products are radar and machine vision sensing & processing. He joined STMicroelectronics in 1990 and has held various positions in R&D before moving into the automotive business arena in 1998 holding marketing roles before serving a two year period in the field (2001-2003) as head of technical marketing in the automotive business unit in Livonia, MI, USA. He has published many papers as Principle author on ADAS, High Voltage CMOS, NVM cell and test structure development. He holds both a B.Sc. (honors) in Microelectronics (1987) and a Ph.D. in Microelectronics from Edinburgh University (1992).

AbstractThe opportunities identified for European leadership in the electronics industry (i.e. Smart Mobility, Smart Society, Smart Energy, Smart Health and Smart Production) typically address markets where volumes will range from several thousands to several millions of pieces with heavy customized products for each targeted application. Mass customization and flexibility thus represent the keys to the future of Semiconductor Manufacturing in Europe and companies will have to adapt their organizations, structures and systems to this new speed of market changes.
One of the main challenges there is that due to their size and history, European Fabs face problems and complexity that higher volume facilities largely ignore, even when in high mix, thanks to scaling. This means that standard, off the shelf, solutions do not exist and that existing solutions have to be so heavily customized that there cost of deployment is very often overwhelming. That’s where the development of “Industrie 4.0” should be an opportunity. As most semiconductor fabs have already deployed state-of-the-art solutions in terms of Manufacturing Execution System, Automation, Advanced Process Control, etc. they experience today “second stage challenges”, i.e. those linked to interoperability, complex decision making, advanced diagnostic or global optimization.
Various industrial use cases from STMicroelectronics Crolles300 wafer fab will be presented to illustrate both visions of the current status of European semiconductor manufacturing and evidence the interest of collaborative projects hence the need for developing a “Manufacturing Science” framework to propose standard interfaces, services and smart solutions easily adaptable to other industries.

BiografiePhilippe Vialletelle is Senior Member of Technical Staff at STMicroelectronics Crolles, France. After receiving an Engineering degree in Physics from the Institut National des Sciences Appliquees in 1989, he entered the semiconductor industry by working on ESD and physical characterization. His next experience was in Metrology before enlarging his scope of activities to Process Control. He finally integrated the Factory Integration world, through Industrial Engineering and is now responsible for the definition of advanced methodologies and tools for the Crolles 300mm production line. Expert in Manufacturing Sciences for Process and Production Control, he is now in charge of driving collaborative projects at European level. His email address is philippe.vialletelle@st.com.

An innovative handheld system for qPCR based on Lab on chip technologies

Bianchessi, Marco
R&I Manager
STMicroelectronics

AbstractLab On Chip is not a new concept: the idea first appeared before the end of last century. The name is quite evocative and conveys implicitly a promise of miniaturization, simplicity of use and low-cost, as its electronics counterpart.
Despite the fact that in the past two decades many lab on chip has been designed and produced (few of them also with great success, specifically for biology research and DNA sequencing) they remain quite expensive and require expert to be used. Regarding miniaturization, it is true that the chips are quite small, but to be used they normally require bulky instrumentation that limits their use in dedicated laboratories. For these reason today Lab on Chips are a just a powerful tool in the laboratories rather than being a true alternative to them.
Here is presented a platform for Molecular biology, based on realtime PCR reaction, to identify and quantify the presence of specific DNA sequences in a biological sample. Beside the miniaturization of the consumable, based on a lab-on-chip, the whole instrumentation required to operate it has been optimized for portability and ease of use.
The basic functions required for Realtime PCR are illustrated and their implementation in the platform, either on chip or on instrument, are shown, discussing the advantages and the limitations.
In conclusion, a few examples of application where the advantages of the system becomes crucial to open completely new scenarios are demonstrated.

BiografieMarco Bianchessi received the degree in Electronic engineering at “Politecnico di Milano” in 1993. He joined STMicroelectronics where, from 1994 to 1998, has been the system engineer in the team that introduced the first family of digital audio devices in STM, developing A/D D/A converters, dedicated DSP and digital audio interfaces. In 1998 he took the responsibility of the development of the Bluetooth system and since then he became the official representative of STM in the Bluetooth SIG. Among other task he actively contributed to the definition of the Bluetooth 2.0 standard. Since 2004, his activities broaden, covering also application of MEMS sensors and Biomedical applications. He is currently leader of an R&D team, located in Milan and Lecce, with competences in system architectures, SW development, HW design, Optics and microfluidic. His main target is the development of innovative platforms, based on biochemical MEMS, to implement tests of DNA and other biological molecules. He is co-authors of several papers published on scientific journals and owner of more than ten patents in the fields of signal processing and microelectronics.

Silicon Photonics: an Industrial Perspective

Fincato, Antonio
Senior Photonic Designer
STMicroelectronics

AbstractSilicon Photonics is the more active discipline in the field of integrated optics but in spite of his rapid gain of importance as a platform for a wide range of applications in datacom, telecom, optical interconnect and sensing, after 25 years of research only recently this technology seems to reach an industrial maturity for mass production.
The comparison with the evolution of electronics CMOS technologies is natural but the hope that Silicon Photonics will follow the same path may be disappointed.
The challenges still to be overcome are many, and loss reduction, thermal control and compatibility with different standards written mainly for other technologies are just a few of them.
In recent years there has been a great number of breakthroughs in Silicon Photonics and among them an interesting solution is the separation of electronics functions by the photonics function with 3D assembly of two different chips through the use of copper pillars.
This platform is targeting markets applications in the field of active optical cables, optical Modules, Backplanes and Silicon Photonics Interposers, with Electronics and Photonics technologies not limiting each other as in a monolithic integration.
Data center market is the main driver for the next 5 years, through 100G, 200G and 400G products, and electro-optical transceivers will be the first real test for an industrial application of Silicon Photonics allowing the required size and cost reduction.
Just thanks to the possibility offered by the integration of numerous material, integrated Photonics on Silicon substrate has the great potential to address future applications allowing to compensate its intrinsic weaknesses.

BiografieAntonio Fincato is a senior photonic designer and since 1986 he is working in optics and photonics mainly for fiber optical telecommunications on Silicon Photonics, Glass on Silicon and Microoptics, participating in many European and national research projects. In 2000 he joined STMicroelectronics, Milan Italy, where is responsible for the design of advanced optics and photonics devices within the R&D of Digital and Mixed processes ASIC Division. Until 2000 he was working at Italtel and previously at AT&T Bell Labs, University of Milan and CERN.
He obtained his Degree in Physics in 1984 from Pavia University with a Specialization in Elementary Particle Physics and holds several Patents in the field of Optoelectronics and is author or co-author of several papers and Conference contributions.

How flexible electronics will improve patient's daily life? SUBLIMED, end user point of view.

Karst, Nicolas
CEO
SUBLIMED

AbstractSUBLIMED develops a medical device, actiTENS, targeting the chronic pain market, which concerns 1.5 billion people worldwide. actiTENS is based on a proven non-drug therapy, transcutaneous electrical nerve stimulation (TENS).
Conventional TENS devices take the shape of a voluminous casing (hand carried, attached to the belt or worn around the neck), tied with cutaneous electrodes through long cables causing physical and psychological embarrassment which highly compromises the adoption of the TENS by patients. actiTENS® offers a miniaturized, thin and flexible device, which is directly worn on the body adapting itself perfectly to the morphology of each patient. Easily hidden under clothes, wirelessly monitored by smartphone, actiTENS® discreetly supports patients in their daily activities.
In order to better adress patient's needs in terms of discretion and ergonomics, the next generation of wearable medical devices should be as thin and as flexible as possible. Conventional electrical components (printed circuit boards, batteries...) do not fulfil end user requirements and therefore should be revolutionized. Through a concrete example, SUBLIMED will expose some of the end user needs in the field of wearable medical devices to turn conventional devices into Band-Aid like devices.

BiografieNicolas Karst is graduated with a PhD in process engineering from Grenoble INP. After a first professional experience at STMicroelectronics, he joined the CEA where he supervised the innovative STIMFLEX project leading to the creation of SUBLIMED. Nicolas has been awarded by several innovation contests (including the National Contest for “Assistance to the Creation of Innovative Technology Companies” organized by French Ministry of Higher Education and Research). He also followed several entrepreneurial trainings including the famous training dispensed by HEC (HEC Challenge+).

Rapid prototyping of nanodevices with the NanoFrazor

Holzner, Felix
CEO
SwissLitho AG

AbstractThermal scanning probe lithography (t-SPL) [1] has recently entered the lithography market as alternative to electron beam lithography (EBL). By 2016, the first commercial t-SPL systems, called NanoFrazor®, have been installed at research facilities throughout Europe, America and Asia by SwissLitho - a spinoff company from ETH Zurich.
The technology has its origins at IBM Research and their Millipede project. At its core is a heatable probe tip which is used for creating and simultaneous inspection of nanostructures. The tip creates high-resolution (<10 nm half-pitch) features by local decomposition and evaporation of resist materials. The depth can be controlled for every pixel individually with about 1 nm accuracy, enabling arbitrary 3D nanopatterns in a single run. The speed of t-SPL is comparable to that of high-resolution Gaussian shaped EBL: 20 mm/s with a pixel rate of 500 kHz has been demonstrated [2]. The simultaneous inspection capability significantly improves accuracy and reliability and enables process turnaround times of mere seconds, because no resist development step is required. Furthermore, new stitching and overlay methods achieve sub-5 nm accuracy without the use of artificial markers.
Various pattern transfer methods like reactive ion etching, lift-off, electroplating, directed self-assembly have been demonstrated: Parallel lines with 18.5 nm half-pitch were etched 65 nm deep into Si, and various high resolution metal structures were fabricated using lift-off. The t-SPL process avoids high-energy, charged particles like electrons or ions which are known to damage or charge up certain materials while patterning which for delicate nanoelectronic devices can result in superior device performance. For example, top gates for InAs nanowire devices were made without trapped charge in the thin gate oxide under the electrodes.
[1] Pires, D. et al. Science 328, 732–735 (2010)
[2] Paul, P. C. et al. Nanotechnology 22, 275306 (2011)

BiografieFelix Holzner studied physics in New Zealand and Germany and received a PhD from ETH Zurich.
In 2009, he joined the Nanofabrication Group at the IBM Research Laboratory in Zurich where he started to work on Thermal Scanning Probe Lithography. After several technological breakthroughs, Felix shortened the name of the technology to “NanoFrazor” and founded SwissLitho in 2012 with the clear vision to enable superior nanofabrication for everyone. He strongly believes that the unique capabilities of the NanoFrazor enable new science and eventually even products not conceivable today.
Felix has a complete overview over all possible nanolithography technologies and a very deep understanding of the NanoFrazor technology and its applications. He is a regular invited speaker at international conferences.
Felix received the IBM Plateau Invention Achievement Award and the ETH Pioneer Fellowship in 2012 and 2013, respectively. With SwissLitho and the NanoFrazor, he won numerous of the most prestigious startup and technology awards exceeding prize money of 500’000 CHF. In 2013, he was part of the Swiss national startup team in the ventureleaders program in Boston and recently received a scholarship for the Advanced Management Program at the University of St. Gallen (HSG).
Felix lives his vision and leads SwissLitho as CEO.

Si, SiC or GaN: technology and cost comparison

Barbarini, Elena
Senior Cost Engineer
System Plus Consulting

AbstractThe presentation proposes an overview of the latest innovations in power devices showing the differences of Si, SiC and GaN transistors from the technical and economical point of view.
The objective of the presentation is to define which are the cost drivers of the new technologies in power devices, understand the reason of the success of the different technologies for different application and estimate a cost evolution.
Different devices have been opened and analyzed to understand the different technology innovations and a breakdown cost analysis of the manufacturing process has been developed. The presentation includes deep technical analysis of technology supported by optical and SEM pictures. The cost analysis are the results of description of production process and software calculation of all the parameters which have an impact on final manufacturing cost.
Silicon transistors are well established devices which will still have a future: in the latest years the improvement of manufacturing process and decreased production cost will drive toward a standardization and popularization of these devices.
Starting from 2010 new products are entering the market to compete with silicon: SiC MOSFETs and GaN on Si HEMT are one of them.
SiC is a good candidate for high power devices of 1200V and more while GaN on Si HEMT offers new capabilities, such as the possibility to work at higher frequencies.
But from the cost point of view it is still not appealing on the market. A single SiC component could reach a price almost 5 times higher than a standard Silicon transistor and on GaN devices the presence of a GaN epitaxial structure can double the final wafer manufacturing steps cost.
To conclude GaN and SiC are the good candidates to enter the respective power devices sector but at the same time their cost will be the factor which will define their effective application.

BiografieAfter a bachelor’s degree in Electronic Engineer from Politecnico di Torino, Elena obtained a master's degree in Nanotechnologies for the ICT from Politecnico di Torino, EPF Lausanne and INP Grenoble. Subsequently she got a PhD in Electronic Devices in collaboration with Vishay Semiconductors.
After some years in Italy, where she had different significant experience in research and manufacturing of electronics components, she moves to France.
Elena is actually Senior Cost Engineer at System Plus Consulting where she in charge of the Power Electronics division.

AbstractStrong production capacity growth is a reality, especially for 200 mm fabs. This trend leads to dramatically increased requirements for production information systems. State-of-the-art applications (Business Intelligence) are typically fed via extracts out of operational systems. Such extracts are aggregated by ETL batch jobs (ETL: Extract, Transform, Load the data). It is a big challenge to enable robust and performant ETL data aggregation. Another major draw-back is, that such applications do not integrate the fab operational, engineering, and strategic layer. This reflects the need for a conceptually new approach, which
a) is capable of continuously processing information and therefore eliminates the need for complicated ETL processes;
b) is capable to handle a deep-structured information model, which enables and guarantees best informational granularity for real-time analysis (operational data), as well as for detailed root cause analysis (engineering and strategic data); and which enables from a mathematical perspective optimal algorithmic efficiency throughout those data layers;
c) is capable to support standard hw and sw infrastructure (i.e. standard db-system, messaging system, analysis services).
To overcome this strategic gap, and based on own research activities, SYSTEMA, XFAB and other partners are executing a research project. The goal is to enable the factories to continuously process real-time data for each production step, and thereby enriching the engineering and strategic data level at the same time.
As a first outcome of this research project, we present a) a real-time analysis of dynamic production bottlenecks (operational level), and b) a detailed engineering analysis of production gain potentials as caused by dynamic bottlenecks (engineering level). This analysis will show unplanned vacancies of downstream equipment, as caused by moving dynamic production bottlenecks.
SYSTEMA is developing this solution as based on its new “Xation” Technology.

BiografieGerhard holds a Ph.D in engineering science from the University of Erlangen-Nuremberg (Germany). He has more than 25 years of experience in semiconductor manufacturing and information science. Currently, he is leading the innovation management at SYSTEMA GmbH, Dresden. His research activities are pointing toward
a new, mathematically grounded method of Real-Time information processing, including large data volumes.
Gerhard previously worked as team leader / program manager and research fellow for Infineon/Dresden and Siemens/Munich. He also held various positions in France with Siemens / IBM joint venture in Essonnes; and ST Microelectronics in Crolles.

Injection Molded Electronics: Mass Manufactured Smart Plastics

Keränen, Antti
CTO
TactoTek

AbstractTactoTek Injection Molded Electronics (IME) is a solution that integrates printed electronics (circuitry, sensors, and antennas) and discrete electronic components (LEDs, ICs, etc.) inside of 3D plastic structures, thus changing the 100 years old picture of electronics as “components in a box” into 3D smart plastic surfaces.
TactoTek IME integrates building blocks of lighting, sensors and active control electronics to deliver a wide range of functions in high visual quality 2D and 3D plastic structures that are 2-4 mm thick. The TactoTek IME manufacturing process consists of five steps: 1) Print decoration on plastic film, 2) Print wiring, electrodes, antennas and other printable electronics on IML film, 3) Mount standard SMT electronics on film using standard 2D SMT, 4) Thermoform the assembled film into desired 3D form and 5) Use the assembled and formed film as an insert in standard injection molding process. Steps 1, 2, and 3 take place when the structure is 2 dimensional using existing high speed mass manufacturing equipment and processes.
IME solutions reduce space and weight and simplify assembly while creating differentiating design opportunities. Some specific technology benefits worth highlighting include: using the plastic structure itself as a light guide instead of external assemblies, and placing sensors and antennas extremely close to part surface to improve signals and reduce noise.

BiografieDr. Antti Keränen is a co-founder and technology leader at TactoTek. He directs R&D innovation activities, develops and maintains the IP portfolio, and communicates the company technology vision and practical applications. Antti has been a major contributor to advancing in-mold electronics technology since 2005, when he joined the VTT Technical Research Center of Finland printed electronics team. In addition to his work at TactoTek, he is an Adjunct Professor of theoretical physics at the University of Oulu where he also earned his PhD.

Semi Market & Materials Trends for the Millenial Era

Shon-Roy, Lita
President / CEO
TECHCET

AbstractElectronic end use devices and applications drive the consumption of semiconductor devices and the market for process materials. If there is no Killer-app out there, then what is going to drive the semiconductor industry over the next 5-10 years? And what materials will be needed to support those devices? TECHCET will present global and local trends driving the overall semiconductor market and focus-in on those materials that are growing at a higher than average rate, in addition to new materials required to support future devices.

BiografieLita Shon-Roy, President/CEO of TECHCET, has worked in the electronics materials industry in business development and technical marketing for more than 30 years. Her work experience spans from business development, marketing and sales of semiconductor devices, equipment and materials, to process development of flat panel displays (TFTs). She has developed new business opportunities for companies such as RASIRC/Matheson Gases and IPEC/Speedfam and helped establish marketing and sales proficiency in companies such as Air Products/Schumacher, Brooktree/Rockwell, and IPEC/Speedfam. Lita facilitated the transition of the Critical Materials Council from SEMATECH to TECHCET’s business in January 2016 and continues to build upon the organization by inviting additional fab members to the CMC. She has authored and co-authored various articles and texts focused on the semiconductor materials markets, industry forecasting, and the world economy and is a recognized expert in electronic materials marketing and business development. Lita holds a Master’s Degree in Electrical Engineering, with a specialty in Solid State Physics from USC and a Bachelor’s Degree in Chemical Engineering from UCSD. She is currently completing her MBA at California State University, Dominguez Hills.

Atomic Layer Deposition and Etching of Thin Films - Research and Application

Hossbach, Christoph
Senior Scientist
Technische Universität Dresden

AbstractThe continuing down-scaling of dimensions in modern microelectronics as well as a huge number of applications beyond semiconductor technology lead to an increasing need for advanced deposition and etching technologies. Atomic Layer Deposition (ALD) is a method for thin film deposition, which is based on self-limiting monolayer by monolayer growth. ALD offers outstanding process properties like excellent step-coverage, film thickness control in the sub-nm range, pore-free deposition as well as a high thickness uniformity over large area substrates. Complementary to ALD, Atomic Layer Etching technology (ALE) removes material monolayer by monolayer. Like in ALD, sequential self-limiting surface reactions play a crucial role and potentially result in sub-nm etch depth control and a high anisotropy of etching.
In our presentation we will give an overview of research and applications for both ALD and ALE technology. Based on experiences and possibilities at IHM and ALD Lab Saxony we will present selected results on ALD or ALE for e.g. device encapsulation, through silicon via, organic field effect transistors, 3D structures or memory devices. Thereby, a key component is the application of in situ and in vacuo metrology, which enables a detailed understanding of growth or etching processes.

BiografieChristoph Hossbach obtained the M.Sc. degree in Electrical Engineering in 2005 and the Ph.D. degree in Electrical Engineering in 2013. He is currently a Senior Scientist at the Institute of Semiconductors and Microsystems of Technische Universität Dresden, Germany. His fields of expertise include Atomic Layer Deposition (ALD), Plasma Enhanced ALD, Molecular Layer Deposition (MLD), Chemical Vapor Deposition (CVD), Plasma Enhanced CVD, process, film and growth characterization with in situ and ex situ metrology, as well as tool and component design. Dr. Hossbach is co-founder and university representative of science network ALD Lab Saxony. He is author or co-author in more than 30 publications and involved in organization of workshops, teaching and consulting.

AbstractExisting AMHSs are facing ever rising requirements through higher flexibility demands, smaller lot sizes in production, etc. This paper focusses on the subsequent challenges for AMHS and presents approaches developed in close cooperation between GLOBALFOUNDRIES Dresden and Technische Universität Dresden improving overall performance by optimizing different areas of AMHS control:
As routing in these systems is mostly conducted based on some sort of shortest paths, adjusting the length parameters (or link weights) is an intuitive approach for manipulating traffic flows. A systematic approach balancing traffic in a large overhead hoisting transport network is presented. Its performance is demonstrated in an application where it was able to provide an increase in maximum throughput of 20% without negative impact to delivery times.
Additionally, the fact that transport systems may be a bottleneck in production has to be accepted. Therefore, their limitations have to be incorporated into scheduling / dispatching. One such approach is presented especially suitable to limit the number of transports through bottlenecks linking definable production areas like bridges between different buildings or lifts between different levels. In a use case this method has proven success by decreasing transport load through such bottlenecks by up to 28%, again without negative impact to production.
Finally a potential combination of different approaches will be sketched providing the ability to further improve system performance and to empower the system to handle new demands with little or no hardware manipulations.
Jointly presented by Christian Hammel (Technische Universität Dresden) and Jörg Lübke (GLOBALFOUNDRIES Dresden)

BiografieChristian Hammel is a member of the scientific staff and head of applications in semiconductor industry at the Chair of Logistics Engineering at Technische Universität Dresden. Having received his Diploma (similar to M.S. degree) in Applied Mathematics (Technomathematik) in 2007 from Technische Universität Dresden he worked on various semiconductor projects since 2010 (both industrial and research) regarding analysis, simulation and optimization of AMHS control and related areas. His research interests include the application of analytical methods to optimize existing AMHS as well as to support the design phase.
Jörg Lübke is Senior Member of Technical Staff with GLOBALFOUNDRIES in Dresden and responsible for the AMHS Control Systems at the Dresden site. He holds a degree as Diplomingenieur for Electrical Engineering from the Technische Universität Dresden with a major in Automation and Control. He joined AMD in 1998 for the startup of AMD’s first Fab in Europe in Dresden. He worked ever since in the Factory Automation department responsible for the AMHS Control Software from requirements definition, supplier selection to implementation and deployment of AMHS software as well as day-to-day operation and continuous improvement. From September 2011 to December 2013 he was with GLOBALFOUNDRIES’ Fab 8 startup team in Malta, NY to support the implementation and ramp of the Automated Material Handling System in Fab 8.

AbstractElectronic content in automotive applications has increased dramatically over the past few years. Automobiles are on the threshold of a radical change in technology. Vehicles have increased connectivity, improved self-diagnostics, a greater number of safety features including crash avoidance technology and advanced driver assistance. Mobile devices, including smartphones continue to drive unit volume growth and semiconductor packaging developments. While today’s WLPs, PoPs, and stacked die CSPs will remain popular—along with a number of other packages such as QFNs and FBGAs, can these packages meet the strict requirements of automotive electronics? Will the new mobile phone on wheels be able to leverage the technology developments and the economies of scale introduced by the mobile device era? This presentation explores the drivers for automotive packaging and examines the potential use of packaging and assembly technology from mobile devices.

BiografieJan is the editor of Surface Mount Technology: Recent Japanese Developments, co-author of How to Make IC Packages (published in Japanese by Nikkan Kogyo Shinbun), a columnist with Circuits Assembly Magazine, and the author of numerous publications on emerging trends in semiconductor packaging and assembly. She served on the NSF-sponsored World Technology Evaluation Center study team involved in investigating electronics manufacturing in Asia and on the US mission to study manufacturing in China. She is a member of IEEE CPMT, IMAPS, SMTA, and SEMI. She was elected to two terms on the IEEE CPMT Board of Governors. She received her BA in Economics and Business from Mercer University in Macon, Georgia in 1979 and her MA in Economics from the University of Texas at Austin in 1981. Before founding TechSearch International, she served on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the electronics industry’s first pre-competitive research consortium.

Innovating the world of high-speed 2D & 3D sensing for robotics, drones, automation and more!

Ruffo, Max
CEO
Terabee

AbstractThis session highlights the innovations Terabee has made in high-speed 2D and 3D distance and object sensing and the impact on Industry 4.0. In collaboration with CERN, Terabee has developed high performance, modular and lightweight sensing solutions that can be utilised in applications and locations not previously viable. Where other solutions are physically heavy, these are light. Where other solutions are data-heavy, these are not. The differences and benefits are many. You'll discover the opportunities these breakthrough solutions create and why this top-30 start-up organisation is fast gaining recognition for innovation.

BiografieMax Ruffo is founder and CEO of Terabee - a dynamic organisation transforming the way drones and robots perceive and navigate complex, cluttered environments. Prior to Terabee, Max was a pioneer of the 3D printing industry and headed a Boeing R&D centre department for Advanced Manufacturing. With a PhD in innovation and new technology introduction, Max is always at the forefront of disruptive new technologies and high-growth businesses. He is an energetic and well-received public speaker and holds a black belt in the Six Sigma and Lean process methodologies. He also coaches skiing and skydiving!

Industry 4.0 and the influence on the work environment

Holland, Martina
EMEA HR Operations Director
Texas Instruments

AbstractIndustry 4.0 is not only changing the way production processes are organized but also influences the working environment for employees. The presentation will cover how the 4th industrial revolution affects the different aspects of resource development within the manufacturing sphere. It will discuss the topics of which tools can be effective in the field of recruiting, how employer branding needs to be adapted and how this impacts the work environment for employees.

BiografieMartina Holland began her career at Texas Instruments in 1997 as a trainee located in Germany. After the trainee program she started in the HR department and since then has held various positions. In 2004 Martina Holland transferred to the US covering various roles within Compensation supporting multiple businesses for 6 years.
In March 2010 she returned back to Germany to take the role as the HR Director for EMEA Sales & Applications. In addition to that she took on the leadership of the EMEA Staffing team in January 2014.
Since September 2015 she is the HR Director for EMEA HR Operations managing all operational aspects of HR in EMEA for Texas Instruments.

Remote service with smart glasses

Riester, Benrhard
Engineering Manager
Texas Instruments GmbH

AbstractWorldwide collaboration and knowledge transfer is a key differentiator in today’s industry and especially in manufacturing.
Collaboration is not something new. We did it already in the past, however with less efficiency. Years ago knowledge transfer was mainly done by telephone or by travelling, which is by the way the most costly way to do it. Video conferencing was used in the 90th . Web based applications like Webex, Skype followed in the next decade with the broadening of the internet. With the high speed internet becoming available in all regions of the world we can now make the next step and make use of recent developments: the smart glasses. Widely known as “Google Glas”. These smart glases are no longer IT gadgets. They can help in our daily business. Easy to use and flexible. In this paper we will show how smart glases can be used for remote maintenance and therefor help to maintain and repair our tools much faster and in a more efficient way.

AbstractThis case study describes a comprehensive approach to Fab staffing modeling which is based on combining two different methods. The first is based on the transaction records (lot track in) from the MES system and It provides a quick evaluation of the impact of staffing levels on the productivity of different areas. The second one uses data collected by following and observing operators on the floor and timing their activities; this evaluation provides more details on how the operators spend their time, and it provides insight on improvement opportunities for direct labor. This dual approach generates both quick guidelines for optimization of staffing levels and long term guidance for improvement plans. This method has been successfully tested in two different fabs and it has generated up to 15% improvement in output per operator.

BiografieMr. Meyuhas is a co-founder and COO of the MAX Group, a global consulting firm transforming the semiconductor industry’s operational landscape. The firm provides a unique range of operational solutions that increase factory and supply chain delivery performance – More product out of installed capital, faster cycle times, higher yields and lower cost of operation. With over 20 years of experience in the semiconductor industry, Ariel brings vision, innovation, a very strong relationship portfolio with leading semiconductors companies, and steers for perfect execution at MAX.

Constraints and possibilities for direct printing of stretchable electronics on thermoplastic polyurethanes

Rubingh, Eric
Project manager
TNO

AbstractStretchable electronics have gained much interest in the industrial and academic world. Recent developments provide routes to integrate stretchable electronics on textiles and thermoplastic materials allowing applications in fabric and clothing (comfort electronics), formable plastics (formable electronics, 3D printing) and medical applications (skin patches, artificial muscles).
The unique properties of thermoplastic polyurethanes (TPU), such as stretch- and ability to be laminated onto textiles will be shown and complemented by the unique stress/strain characteristics of the polymer.
The talk explains constraints for direct printing of stretchable electronic pastes on TPU. Various stretchable pastes applied by screen printing of conductive structures in a flat-bed setup will be presented and our approach in compensating intrinsic shrink, strain-hardening and re-orientation of the polymeric chains upon printing will be discussed. Constraints are complemented by mechanical and electrical characterization will be provided, resulting in a stretchable electronics measurement protocol, including electrical properties under strain, conductivity loss upon stretching, cyclic tests, lamination and washability.
The talk will be complemented by presenting the latest stretchable electronics demonstrators that are created at the Holst Centre.

BiografieEric Rubingh graduated from the Technical College in Eindhoven in Applied Physics in 1997. After two years working with ultra-high powered lasers at Eldim, he joined Philips Research Laboratories in 1999. Next to working on developing the Blu-ray technology he has been the project leader of the team for the inkjet printing of the PolyLED television demonstrator for the SID 2004. In 2007 he joined the Holst Centre as a scientific specialist on printing technologies, developing both S2S and R2R compatible printing processes for functional structures for applications such as OLED lighting, OPV, Smart Packaging and Wearables.

Keely, Chris
Senior Business Development Manager
Trinity College, The University of Dublin

AbstractTrinity College researchers have a strong history and continued commitment to proactively seeing their research commercialized, and impacting society.
In tandem, the Higher Education institute itself must proactivity and responsibly develop a talent pipeline to ensure economic success, aligning our graduates to industry needs. Companies engage with Trinity College to access our talent pipeline, license our technologies, collaborate to develop new products or processes, access our world class research infrastructure and expertise to provide technology and business solutions. Trinity engages with over 400 companies, nationally and internationally. Our industry partners are as varied and diverse as our research themes, ranging from well-known multinationals such as Intel, Google, IBM and Pfizer to innovative Irish SMEs like Sigmoid Pharma, Vitalograph and Welocalize. Innovation at Trinity connects with society at many levels developing a vibrant start-up and entrepreneurial culture. The excellence of our graduates and staff is reflected in the success of our spin-outs and leading companies who employ them. The talk will dissimilate best practices and identify programmes that significantly support Industry access to high quality graduate and research excellence.

BiografieChris Keely brings 20 years of experience working in and with, technology-focused multinational and indigenous Irish companies in the areas of new business generation and industry/academic engagement. In his current positon as the Senior Business Development Manager at the Office of Corporate Partnership and Knowledge Exchange (OCPKE) at Trinity College Dublin, he champions and is responsible for the successful delivery of the college’s industry strategy; enabling and supporting the linking and commercial exploitation of academic research with industry. Whilst working in industry, Chris has led large-scale international programmes in product development, advanced materials engineering, manufacturing technologies integration and reliability engineering. Chris graduated with a first class joint honours degree in Physics and Mathematics from the National University of Ireland, Maynooth. He continued his professional education at Trinity College and was awarded a PhD in Experimental Physics in 1996. Chris is a passionate advocate of the use of technology in society and of lifelong learning.

BiographyFor more than 15 years, Karl Biasio has been involved at both technical and business levels in the field of innovative technologies, mainly for listed B2B companies. He holds a Technology University Degree in Physical Measurements from the Université Joseph Fourier of Grenoble, and joined ASM in 2001 as Field Service Engineer, where he installed and sustained epitaxy equipments worldwide for key customers such as Intel, AMD, and Soitec, starting the first 300mm epitaxy tool in the world. After completion of a Master Degree in Marketing from Grenoble Ecole de Management, he moved to Soitec from 2010 to 2014 as Business Intelligence Analyst, in charge of building the global market vision for the company, covering Electronics, Solar and LED activities. Then he held various Sales & Marketing consulting positions for high tech Startups and SMEs, in particular for McPhy Energy, where he structured the IPO strategy deployment at global level. Since 2014, he has been managing Tronics Microsystems’ Marketing strategy, addressing the challenges of both the MEMS ecosystem and the financial markets in terms of communication and market positioning.

BiographyMart Graef is strategic program manager at the faculty of Electrical Engineering, Mathematics and Computer Science at Delft University of Technology (TU Delft) in The Netherlands. In this position, he develops technology partnerships with companies, institutes and universities, often within the framework of national and European cooperative projects. He participated in initiatives aimed at defining strategies and technology roadmaps in nanoelectronics, such as NANO-TEC, ENI2 and the ITRS. He is a member of the International Roadmap Committee, which guides the International Roadmap for Devices and Systems (IRDS). He is the chair of the AENEAS Scientific Council.

How understanding application-based challenges centered around ICT leads to pinpointing challenges and opportunities for the semiconductor industry.

Grosa, Patrick
Project Manager "fast techtransfer"
TU Dresden

AbstractMaking cities smarter means a great deal to the communications industry. Thousands, even millions, of devices and a changing paradigm from content consumption, and recently content generation, towards the control and steering era will change the face of cities around the globe. Smart Grids, V2X communications, 5G, (mobile edge) clouds, Big Data, Industry 4.0, IoT, IoE, and many more, are only a few buzzwords wandering around these times. However, the next step in ICT is not limited to the communication industry but rather a convergence of multiple, previously separate, industry fields centering around ICT. Upcoming visions, ideas and business models of the future will change routines, daily life and finally the society. The understanding of these applications and their challenges, especially from communications point of view, will lead to the separation of wheat from the chaff for industries and companies, which is in particular true for the semiconductor industry. The better the challenges of others are understood, the better the semiconductor industry can prepare and define their own challenges. Different application yield to different requirements in terms of costs, energy consumption, speed, latency, environmental aspect, supported technologies and so on.
This talk should clarify the vision of smart cities in the near and far future and should help to foster innovation through the identification of challenges but more importantly opportunities technology- and business-wise.

BiografiePatrick Grosa graduated in Information Systems Engineering from Technische Universität Dresden in 2009. Afterwards, he joined the Vodafone Chair for Wireless Communications, where he wrote his PhD thesis on protograph-based LDPC convolutional codes under the supervision of Prof. Gerhard Fettweis. During his time at the chair, he was working in German government funded and industry projects. He was also the major organizer of the IEEE Vehicular Technology Conference (VTC2013-Spring in Dresden), the semi-annual flagship conference of the IEEE Vehicular Technology Society. Since July 2015, he is involved in the management of the cluster project “fast – fast actuators sensors and receivers” within the framework program “Twenty20 – Partnership for Innovation” of the German Federal Ministry of Education and Research (BMBF), which is funded with 45 Mio EUR. Besides being involved in the strategical advancement of the cluster, his main focus is the innovation management and technology transfer in the cluster. fast, which is coordinated by Prof. Ellinger and Prof. Fettweis, deals with basic research on real-time systems and their applications in the field of connectivity, manufacturing, traffic, and health.
Furthermore, Patrick is pursuing an Executive MBA in the part-time MBA program from HHL Graduate School of Management, Leipzig, Germany.

New architectures for OLED Displays: increase lifetime and resolution

Hack, Mike
VP of Business Development
Universal Display Corporation

AbstractPreviously we have presented a novel phosphorescent AMOLED display architecture that enables the fabrication of AMOLED displays using only two low resolution masking steps, and consumes comparable power, and has significantly improved lifetime, as compared to an equivalent RGB side-by-side AMOLED display using three high resolution patterning steps. This architecture can be designed to enable the mask resolution to be only half that of the resultant display in both x and y directions. This new architecture also increases sub-pixel aperture ratios by only requiring one emissive color layer change per pixel, and therefore only one mask tolerance per pixel. The increased fill factors further improve device lifetimes.
Based in part on the architectures discussed above we will also disclose a new pixel layout which allows the user to selectively limit the amount of deep blue content in the display to mitigate the potential health issues associated with deep blue emission.
In this talk we will present further advances on this topic including steps to increase display lifetime and a further modification to this architecture to render very high pixel resolutions necessary for virtual reality (VR) applications.

BiografieDr. Michael Hack, is Vice-President of Business Development at Universal Display Corporation. He is responsible for developing and commercializing advanced high efficiency next generation OLED products, with a special focus on flexible display applications and solid-state lighting. Prior to joining UDC in 1999, he was associated with dpiX, a Xerox Company, where he was responsible for manufacturing flat panel displays and digital medical imaging products based on amorphous silicon TFT technology. Dr. Hack received his Ph. D. degree from Cambridge University, England in 1981 and in 2007 Dr. Hack was elected a Fellow of the Society for Information Display. In 2014 Dr. Hack was nominated to serve on the board of the U.S. OLED Lighting Coalition to promote the advancement and commercialization of OLED lighting.

Neuromorphic Event-based time oriented vision and Computation: the future of machine vision?

Benosman, Ryad
Professor
Université Pierre et Marie Curie

AbstractThere has been significant research over the past two decades in de- veloping new systems for spiking neural computation. The impact of neuromorphic concepts on recent developments in optical sensing, display and artificial vision is presented. State-of-the-art image sensors suffer from severe limitations imposed by their very principle of operation. These sensors acquire the visual information as a series of ’snapshots’ recorded at discrete point in time, hence time-quantized at a predetermined frame rate, resulting in limited temporal resolution, low dynamic range and a high degree of redundancy in the acquired data. Nature suggests a different approach: Biological vision systems are driven and controlled by events happening within the scene in view, and not — like image sensors — by artificially created timing and control signals that have no relation whatsoever to the source of the visual information. Translating the frameless paradigm of biological vision to artificial imaging systems implies that control over the acquisition of visual information is no longer being imposed externally to an array of pixels but the decision making is transferred to the single pixel that handles its own information individually. It is demonstrated that bio-inspired vision systems have the potential to outperform conventional, frame-based vision acquisition and processing systems in many application fields and to establish new benchmarks in terms of redundancy suppression/data compression, dynamic range, temporal resolution and power efficiency to realize advanced functionality like 3D vision, object tracking, motor control, visual feedback loops and even allow us to rethink our current paradigm of computation. The ultimate goal is to develop brain-inspired general purpose computation architectures that can breach the current bottleneck introduced by the von Neumann architecture.

BiografieRyad Benosman is a full Professor with University Pierre and Marie Curie, Paris, France, leading the Natural Computation and Neuromorphic Vision Laboratory, Vision Institute, Paris. He received the M.Sc. and Ph.D. degrees in applied mathematics and robotics from University Pierre and Marie Curie in 1994 and 1999, respectively. His work covers neuromorphic visual computation and sensing and event based computation. He is currently involved in the French retina prosthetics project and in the development of retina implants and cofounder of Pixium Vision a french prosthetics company. He also actively works on retina stimulation using optogenetics with Gensight Biologics. He is also a cofounder of Chronocam a company developing Event based cameras and event driven computation systems. He is an expert in complex perception systems, which embraces the conception, design, and use of different vision sensors covering omnidirectional 360 degree wide-field of view cameras, variant scale sensors, and non-central sensors. He is among the pioneers of the domain of omni-directional vision and unusual cameras and still active in this domain. He has been involved in several national and European robotics projects, mainly in the design of artifcial visual loops and sensors. His current research interests include the understanding of the computation operated along the visual systems areas and establishing a link between computational and biological vision. Ryad Benosman has authored more than 100 scientific publications and holds several patents in the area of vision, robotics, event-based sensing and prosthetics. In 2013 he was awarded with the national best French scientific paper by the Journal La Recherche for his work on neuromorphic retinas and their applications to retina stimulation and prosthetics.

Large-Area Electronics: a new way of making electronics, to enable the IoT and wearable electronics industry

Occhipinti, Luigi G.
Principal Research Associate, Outreach and Business Development Manager
University of Cambridge

AbstractLarge-Area Electronics, including printed, plastic, organic and flexible electronics, is a new way of making electronics that: i) is enabled by new materials that can be processed at low-temperatures; ii) enables the use of new manufacturing processes for electronics such as printing and digital fabrication; iii) enables products having new form factors, the potential for customisation and new cost structures and iv) includes integration with silicon in non-traditional form-factors.
Since Oct. 2013 the EPSRC has funded a Centre for Innovative Manufacturing in Large-Area Electronics within its portfolio of “Manufacturing the future” initiatives, to work with industry and academia, which is led by the University of Cambridge, in collaboration with the University of Manchester, Imperial College London and Swansea University .
The mission of the EPSRC Centre is to tackle the technical challenges of multi-functional system integration of large-area electronics (LAE) in high growth industrial sectors through an innovative programme of manufacturing research, in a strong partnership with both industry and academia.
The EPSRC Centre is up and running and, so far, has a total of 27 projects in its Technical Programme portfolio of both Centre-funded and externally funded projects.
The talk will give an overview of the innovation activities and latest results achieved in the EPSRC Centre, with main focus on manufacturing technologies for IoT and smart wearables, including a new class of power-efficient energy harvesting and storage.
The talk will also outline recent activities developed in Department of Engineering at Cambridge in the field of bioelectronics and fibre-based electronics, towards a new generation of e-textile based products, which led to the recently awarded €9 million H2020 project 1D-NEON “1D Nanofibre Electro-Optic Networks”, involving 14 European partners and coordinated by the University of Cambridge.

BiografieSince April 2014 Dr. Luigi G. Occhipinti is member of the University of Cambridge, Electrical Engineering Division, and National Outreach Manager of the EPSRC Center of Innovative Manufacturing for Large Area Electronics (www.largeareaelectronics.org). He is also Founder and Director of Engineering at Cambridge Innovation Technologies Consulting Limited (www.citc-ltd.co.uk), a start-up company built to innovate the healthcare and medical sector.
He has 20 years of experience driving research and innovation in the semiconductor industry, pioneering the field of post-silicon technologies, including development and applications of: organic and printed electronics, MEMS and bio-MEMS devices, graphene-based flexible electronics, smart sensors and systems heterogeneous integration, chemical and bio-sensors for personalized diagnostics and therapeutics.
Prior to moving to the UK, Luigi was R&D Programs Director and Senior Group Manager at STMicroelectronics (www.st.com), a global semiconductor company, where he was in charge of multidisciplinary research teams and new business development based on Heterogeneous Integrated Smart Systems, Flexible and Disposable Electronics and New Sensors technologies.
He has authored and co-authored over 85 scientific publications and 37 patent families (H-index 18).
He is recognized expert in the field of printed, organic and large-area electronics and integrated smart systems, and has been Principal Investigator of multiple EC-funded programs in the areas of Information and Communication Technologies (ICT) and Nanotechnologies, advanced Materials and Production (NMP). Dr. Occhipinti has been member of 2 IEEE (P1620, P1620.1) and 3 IEC standardization technical committees (TC105, TC111, TC113), and served: i) as executive committee member, the Italian District for Polymeric and Nanocomposite materials (IMAST) from 2010 to 2014, ii) as scientific committee and advisory board member, 3 EC-funded European projects in the field of micro and nano-robotics and Organic and Large-Area Electronics, iii) as external expert, assisting the EC in progress review of funded projects in the area of large-area electronics and solid-state lighting, and iv) as non-executive director and scientific committee member, innovative startups in the field of printed electronic materials and energy storage.

Analogue and Digital Pixels for Time Resolved SPAD Sensors

Henderson, Robert
Professor
University of Edinburgh

AbstractThis presentation will review progress in CMOS single photon avalanche diode sensors towards achieving high fill-factor, array resolution and picosecond timing performance. Recently proposed analogue and digital pixel structures will be compared. Examples of these pixel circuits will be given in applications such as Positron Emission Tomography, time of flight ranging and low light microscopy. The performance trends of CMOS SPAD detectors will also be highlighted. Prospects of applying advanced CMOS image sensor manufacturing technology to future SPAD arrays will be discussed.

BiografieRobert Henderson is a Professor in the School of Engineering at the University of Edinburgh. He obtained his PhD in 1990 from the University of Glasgow. From 1991, he was a research engineer at the Swiss Centre for Microelectronics, Neuchatel, Switzerland. In 1996, he was appointed senior VLSI engineer at VLSI Vision Ltd, Edinburgh, UK where he worked on the world’s first single chip video camera. From 2000, as principal VLSI engineer in STMicroelectronics Imaging Division he developed image sensors for mobile phone applications. He joined Edinburgh University in 2005, designing the first SPAD image sensors in nanometer CMOS technologies in MegaFrame and SPADnet EU projects. In 2014, he was awarded a prestigious ERC advanced fellowship. He is the author of 145 papers and holds 20 patents.

Drivers for Vision based Applications in the Automotive Environment

Gotzig, Heinrich
Valeo Master Expert
Valeo Schalter und Sensoren GmbH

AbstractIn recent years more and more Vision / Image based Applications are seen in cars. This trend will continue. While in the past image sensor technologie and signal processing enabled only informing systems this is changing. The complexity of the vehicular environment has increased from a world of infrequent low-speed vehicles with low speed manoeuvres and forgiving hazards, to one of dense high-speed transport environments with a diversity of low error-margin behaviours among all road users, car companies, in tandem with national legislators have sought to use advanced driver assistance system (ADAS) technology to enhance the safety and driving experience of vehicle occupants. While a suitable technology toolbox is the basis for functional components, additional Silicon IP and sophisticated assembly technology are drivers for future vision based applications in the automotive environment.

GaN-Si MOCVD advancements from Single Wafer Reactor technology for improved power device performance

Morgan, Ray
Product Lead
Veeco

AbstractContinued growth in mid and high voltage applications in consumer power supplies, alternative energy and data centers are requiring improved power efficiency, operating frequencies and system size reductions. GaN devices are being introduced in market at a higher pace, that deliver on these parameters over traditional Si devices. In order to produce these devices in volume at yield, reliability and cost targets, GaN-Si MOCVD is required for the next generation. The MOCVD process now has to deliver superior film quality with a tight run to run control, low defectivity and high uptime. In response to these high volume production requirements, Veeco has developed the next generation MOCVD system based on single wafer architecture that has demonstrated industry leading performance at multiple customers. In this talk we will discuss the latest results as relevant to high volume production requirements.

BiografieRay Morgan is a Lead Product Marketer in the MOCVD business unit at Veeco Instruments, focused in the GaN on Si power segments. With more than 13 years of industry experience at ON Semiconductor, Texas Instruments and NXP, he has held marketing, product and engineering positions. Ray earned his bachelors of science in electrical engineering from Arizona State University with a focus on semiconductors and an Executive MBA from Thunderbird School of Global Management. He can be contacted at rmorgan@veeco.com.

AbstractvivaMOS is a recent technology start-up from the Rutherford Appleton Laboratory in the Science and Technology Facilities Council (STFC), a world-leading multi-disciplinary R&D organisation.
vivaMOS's focus is on the commercialisation of the wafer-scale CMOS image sensors from STFC, originally developed for X-ray detection.
The presentation will provide a short overview of how vivaMOS is innovating wafer-scale CMOS image sensors, addressing some of the issues that current technologies are unlikely to be able to overcome long-term. It will also review the market today and the current state-of-play for their business.

BiografieDan Cathie is an experienced professional within the semiconductor industry, having worked in many different parts of the semiconductor supply chain. His career started at Philips Semiconductors (now NXP) in Southampton as an IC designer, then took him to work within one of the wafer fabs in East Fishkill, NY (USA), and eventually to the vertically integrated business line in Stockport near Manchester (UK), a leader in PowerMOS devices. More recently he acted as Managing Director for a Quartz glass fabrication business in Manchester, a key supplier to the semiconductor industry.
Dan was appointed CEO for vivaMOS in July 2015. He lives in Stockport with his wife and their 5 children. He is passionate about how technology is continually changing the world we live in, and enjoys seeking to exploit the blurring of boundaries between fields in order to bring new innovative products to market.

Fabless trends in photonic integration

Artundo, Iñigo
CEO
VLC Photonics S.L.

AbstractPhotonic integration has matured in the last years, allowing it to be applied not only in telecom, but also in datacom, microwave photonics, metrology, quantum optics, biophotonics or sensing systems. Successful market validation is pushing advances in the technology and attracting investment in its development and commercialization.
Following the success story of electronic integration, it has given birth to an ecosystem of optical chip design houses, foundries and packagers that mimics the fabless business model of CMOS.
Moreover, there are also generic multi-project wafer platforms organizing shuttle runs for several materials like silicon photonics, indium phosphide, and silicon nitride, enabling low-cost and easy access to photonic integration for SMEs and large corporations alike.
And recently, valuable design IP is starting to be licensed through modules and libraries of building blocks offered by software process design kits adapted to each foundry. This talk will review and roadmap all these topics, with special focus on main trends for the upcoming years.

BiografieObtained the M.Sc. in Telecom Engineering at the Universidad Publica de Navarra (Pamplona, Spain) in 2005, and received his Ph.D. in Applied Physics and Photonics at the Vrije Universiteit Brussel (Brussels, Belgium) in 2009. He has been involved in several national and European research projects and networks of excellence focused on reconfigurable optical interconnects, the design, fabrication and characterization of micro-optic devices, and on flexible access and in-building fiber network architectures. He has worked as a reviewer for several scientific journals and national funding agencies. He holds specializations in Business Financing, Commercial Management and Research, and Strategic Marketing. He is a member of IEEE, SPIE and COIT.

BiographyAntti Kemppainen is currently working as Key Account Manager for VTT Technical Centre of Finland in the field of Printed and Hybrid Manufacturing. He has worked in the field of printed and hybrid electronics and its applications since 2001 as researcher, project manager and team leader at VTT. He has been actively working with various globally leading printed electronics technology companies as well as end user companies in contact R&D and joint research projects. His research interests are focused mainly in large area sensing and silicon – printed hybrid solutions.

Packaging Technologies for Power Microtransformer Devices

AbstractRecent developments in power electronics are driven by two major trends: increasing power density and higher level of integration (eg. power system in package).
As a consequence the requirements on power magnetic components (transformers, inductors) are tremendously changing. Device size, profile height and inductance value has to be reduced while switching frequency increases.
This requires not only the further development of magnetic materials but also new packaging concepts for passive components to shrink devices size and profile height, reduce parasitics and enable the integration into power system in package solutions.
New developments in the field of passive power devices are focused on miniaturization and on integration. Power inductors and transformers should provide smaller inductance and smaller size. Decreasing of the inductance value causes the decreasing of the device size and profile height.
Thin-film technology shows good potential to fulfill all of these requirements on power devices. New kinds of micro power devices are aired in many research works developed and tested at high switching frequencies, but the development of adequate packaging technology for micro magnetic devices is still open issue.
In our work we will show the implementation of two packaging technologies applied on housing of power microtransformer device.
As first option a BGA (ball grid array) type package was developed using a wafer level packaging technology (eWLB: embedded wafer level ball grid array).
Alternatively investigations on a LGA (land grid array) type package were conducted using embedding technology based on FR4 laminate.
The feasibility study of both technologies show good results and based on requirements, these technologies can be applied to the packaging of power micro magnetic devices.

BiografieDr.-Ing. Dragan Dinulovic (m) studied precision engineering at University of Nis (Serbia). He received his PhD from Leibniz Universität Hannover on microtechnology and MEMS in Year 2007. From 2000 to 2010 he did research at Instuute for Microtechnology (imt) in Hannover. His research area was a development of magnetic MEMS devices.In 2010 Dragan jointed Würth Elektronik eiSos as R&D engineer, where he focusses now on development of thin-film passive components, on integration of passive and active power devices into one package (Power System in Package (PSiP)) or on chip (Power System on Chip (PwrSoC)), and on Energy Harvesting devices. He is author of more than 30 papers.

Micro-Transfer-Printing for Flexible Passive Matrix Displays based on Inorganic LEDs

Trindade, António José
Research Scientist
X-Celeprint, Limited

AbstractInorganic light-emitting diodes (iLEDs) are amongst the longest lived and most energy efficient light-emitters available for an extensive range of applications. Direct-emission displays using these types of light sources have been around as an established technology and are typically known as ‘Jumbotron’ displays. Recently, there is a growing interest in the miniaturization of such displays where pixels can be tightly packed (>30 per inch) in a multitude of substrates.
To achieve the desired level of scale reduction, disruptive technologies are required to handle miniature wafer-fabricated components in high-density arrays and transfer these onto a new display substrate at high-speed, precision and low cost. Since control circuits, light emitters, sensors are usually sourced from different wafer-based material systems (Si, GaN, InP, GaAs…), this introduces added complications for integration onto display panels. Invented at the University of Illinois with over ten years of continuous development, micro-Transfer-Printing (µTP) effortlessly enables the heterogeneous integration of devices based from disparate material systems onto various substrates. By use of an elastomer stamp to release and transfer the devices arrays onto non-native substrates, µTP has a proven record in iLED displays, magnetic storage, Silicon Photonics, Photovoltaics and compound semiconductor integration. Here we present a display prototype using miniaturized iLEDs as fully functional pixel emitters.
Standard transfer yields typically exceed 99.9% and the emitting pixels can be printed by a single print step (total of 3 prints for RGB displays). Due to the reduced emitter size (3x10µm2), displays have a high degree of transparency due to the low fill-factor that emitters and metal tracks occupy on the overall display area.
µTP can therefore be a platform to fully functional rigid or flexible displays with high throughput, efficiency and reliability.

BiografieDr. António José Trindade is a Research Scientist at X-Celeprint. António José is an expert in Organic Light Emitting Devices (OLEDs), Organic Photovoltaics (OPVs) and micro-LEDs. He has worked extensively on different architectures and taken multiple devices from concept to fabrication/integration and final assembly onto rigid and flexible substrates.
He has a wide background on several optoelectronic devices as well as transfer-printing technologies and device-level integration. His main interests include heterogeneous integration, device prototyping, novel assembly techniques, light-emitting semiconductors, light propagation and micro-displays.

Smart Defect Density Monitoring solutions in multi-product waferfabs

AbstractSemiconductor manufacturers are constantly confronted by growing customer requirements in terms of product quality, in particular the Defect Density. The focus is mainly on the achievement of "Zero-Defect-Rate". This objective is even more challenging due to the complexity in a multi-product wafer fab and their varied and extensive product mix. The challenges continue to grow through a combination of CMOS and MEMS processes. Ultimately, are our everyday efforts, customer satisfaction, creating a trusting and open customer relationship as important goal.
The resulting needs are major challenges for an appropriate Defect Density Monitoring. On the one hand it is necessary to efficiently combine the respective process specifics of both the CMOS production and MEMS production together and on the other hand to meet the challenges of a semiconductor foundry. An equally important aspect is the understandable and comprehensible description of the methods and systems to our discerning customers.
“Zero-Defect-Rate" for a semiconductor foundry means a close and strategic cooperation, starting from the direct customer up to the final product. For this is an appropriate solution to the defect density monitoring with the reliable product monitoring throughout the supply chain essentially.

BiografieAndreas Driesen, born 26.02.1975 in Erfurt, married, one daughter.
School in Erfurt, then training at Deutsche Telekom AG, followed by studying electrical engineering in Jena at the University of Applied Science.
Since 2007 in the X-FAB Erfurt AG Defect Density Engineering.
Since 2015 Team Leader of Defect inspection teams (In -Line Defect Density, automated QA, OQA, packaging / shipment, clean rooms).

AbstractThis paper will describe new high performance spring probes and how they are being designed and deployed to meet the electrical requirements of today's WLCSP DC to GHz bandwidth testing environment, without sacrificing mechanical performance. In addition, the paper will provide information on new WLCSP test socket standards required for single and multisite high parallelism contacting in automated test and manual/hand test. Described is how new WLCSP spring probe contactors designs are reducing the cost to acquire and the cost to use contactors while increasing WLCSP test throughput.

BiografieBert Brost
Product Manager
Xcerra - Multitest
4444 Centerville Road
St. Paul, MN 55124
USA
Biography
Bert Brost has worked in semiconductor test for 35 plus years. His career includes developing IC test handlers and IC test measurement electronics and firmware. In his spare time, Bert is an armature radio operator . Bert says he is lucky because electronics are both his hobby and his job. Bert has several under graduate degrees and an MBA. Most recently, Bert joined Xcerra as a Multitest product manager.

BiographyPeter Cockburn has worked in the ATE industry for over 25 years at Schlumberger, NPTest, Credence, LTX-Credence and now Xcerra.
He has developed real-time and GUI software for ATE systems, managed the launch of several SOC ATE systems and new analog test options and provided marketing and sales support in USA, Asia and Europe.
As Senior Product Manager in the Test Cell Innovation team, he is now defining new ways to reduce time-to-volume and test cost, increase uptime and improve quality when testing semiconductors.
He has an Engineering degree from the University of Southampton, UK.

BiographyAmandine Pizzagalli is in charge of equipment & material fields for the Advanced Packaging & Manufacturing team at Yole Développement, the "More than Moore" strategy consulting and market research company, after graduating as an engineer in Electronics, with a specialization in Semiconductors and Nano Electronics Technologies. She worked in the past for Air Liquide with an emphasis on CVD and ALD processes for semiconductor applications.

BiographyDr Pierric GUEGUEN is Business Unit Manager for Power Electronics and Compound Semiconductor activities at Yole Développement. He has a PhD in Micro and Nano Electronics and an master degree in Micro and Nanotechnologies for Integrated Circuits. He worked as PhD student at CEA-Leti in the field of 3D Integration for Integrated Circuits and Advanced Packaging. He then joined Renault SAS, and worked for 4 years as technical project manager in R&D division. During this time, he oversaw power electronic converters and integration of Wide Band Gap devices in Electric Vehicles. He is author and co-author of more than 20 technical papers and 15 patents.

Gas sensors market and technology trends

Troadec, Claire
Analyst
Yole Developpement

AbstractAir quality is becoming a major concern, and therefore gas sensors are increasingly attracting interest. Gas sensing technologies are not new. Gas sensors embedded in gas detectors for defense and industrial safety applications form a highly regulated and mature market. But the growing awareness of the air quality is creating new applications and opportunities. These include gas sensors in consumer products like home devices, wearables and smartphones, or for buildings and cars, including indoor/in-cabin air quality monitoring.
The consumer market is very attractive as it can drive very large volumes depending on user case adoption, cost and technical maturity. The smartphone industry has revolutionized the sensor industry as mobile applications today aggregate ever more sensors. Gas sensors could be the next to be integrated in smart phones and/or wearables.
For this application, sensors require good sensitivity, reliability, and low cost, small form factor and low power budget. MOS seems to be the best candidate as cost and size fit the requirements for wearables and smartphones. However, as smartphones get more sensors, power consumption is becoming critical and sensors therefore need to be very low power today. Furthermore, MOS sensor sensitivity isn’t very good. Surprisingly, with the latest achievements in size reduction of optical gas sensors based on NDIR, this technology is now challenging MOS technology for consumer applications. NDIR sensors are already used in home products.
In our presentation, we will address the potential applications of gas sensors and benchmark them. We will show the variety of gas sensor applications, each with their own technical requirements, such as the gases to be measured, sensitivity and selectivity, response time, lifetime and power consumption, as well as their own business requirements.
We will review the major players, the new comers with their innovative approaches based on existing MEMS and optical integration platforms.

BiografieClaire Troadec has been a member of the MEMS manufacturing team at Yole Développement since 2013. She graduated from INSA Rennes in France with an engineering degree in microelectronics and material sciences. She then joined NXP Semiconductors, and worked for 7 years as a CMOS process integration engineer at the IMEC R&D facility. During this time, she oversaw the isolation and performance boost of CMOS technology node devices from 90 nm down to 45 nm. She has authored or co-authored seven US patents and nine international publications in the semiconductor field and before joining Yole Développement managed her own distribution company.

Advanced Packaging: Even Moore than you expect!

AbstractA market and technology briefing on advanced packaging industry to understand related challenges, evolutions, trends, etc.
This market briefing will provide market metrics and forecasted trends for Advanced Packaging and evaluate their impact on the supply-chain and technologies. Also, Yole Développement’s Advanced Packaging team will present the findings from its most recent analyses. Afterwards, all attendees are welcome to participate in a Q&As session, during which we’ll compare and contrast different points-of-view and visions.
For more information, please contact Camille Veyrier (veyrier@yole.fr).

BiografieThibault Buisson is the Business Unit Manager of the Advanced Packaging & Semiconductor Manufacturing activities at Yole Développement, the “More than Moore” market research and strategy consulting company.
Thibault graduated from Grenoble Institute of Technology (INP) with a Master’s degree of Research in Micro and Nano electronics and from Polytech Grenoble with an engineering degree in Material Sciences. He then joined NXP Semiconductors as an R&D process engineer in the thermal treatment area to develop CMOS technology devices from the 65 to 45nm nodes. Afterwards, he joined IMEC Leuven and worked for over 5 years as a process integration engineer in the field of 3D technology. He has authored or co-authored fifteen international publications in the semiconductor field and has spoken at several conferences and symposiums, including keynotes, related to Advanced Packaging.

Powering a Flexible world - Thin and printed power storage

Hiralal, Pritesh
CEO
Zinergy UK Ltd.

AbstractZinergy turns the traditional alkaline battery into a thin (<0.5mm), flexible and low cost form by using printing technologies. In addition, its unique electrode design allow for better performance and rechargeability, in a completely safe and environmentally benign design.
The last decade has shown a large development in the areas of flexible electronics and Internet of Things (IoT). New electronics and materials are permitting designers to produce a wide array of devices. Many new concepts are being tested, from ubiquitous sensors, to wearable devices. Some will succeed, some will fail, but the fundamental development behind these devices are around to stay.
However, one particular area, the battery, has not developed as fast as the rest. The power source for these remains in the old traditional bulk form. As a result of strict packaging requirements, the battery still maintains the classical case form factor, and poses a design limitation for many design concepts. There is an urgent requirement for thin, flexible energy storage devices which can conform with different device sizes and shapes.
Emerging topics such as wearable technology and IoT require some different parameters for the battery, such as ultra-thinness, small physical footprints, flexibility and light weight which are becoming increasingly prized.
The classic zinc battery is by far the technology with the highest number of batteries shipped, principally due to its low cost. We translate this well known battery technology into a flexible, printed form factor, and add a few materials innovations to improve performance and improve on rechargeability, opening potential for a thin printed battery which can be produced at a low enough cost that make it suitable for high volume applications.

BiografieDr. Pritesh Hiralal is the founder and CEO of Zinergy UK Ltd. Before this, he was a Research Associate as well as an adjunct lecturer at the University of Cambridge, where he completed his Ph.D. at the department of Engineering at Cambridge University. He has spent time in business in Spain and set up Zendal Backup. He has spent time in industry at the Nokia Research Centre working on high power energy storage where he holds several patents under his name. He has specialised in understanding the growth of nanomaterials and the application of these into different architectures for photovoltaics and energy storage devices including batteries and supercapacitors. He has published 30+ papers and 8 patents in the field. He has completed a number of consulting assignments in the energy storage industry, for materials as well as device companies.

Title: Total Production Integration – the Industry 4.0 Approach

Mayer, Hans
COO
znt Zentren für Neue Technologien GmbH

AbstractShop Floor Integration is an essential precondition for implementing the concepts of Industry 4.0. While in Semiconductor Front End Fabs the integration is widely implemented based on Semi Standards, the backend and facility management areas are subject to further integration efforts. Especially in the Backend area we often face proprietary communication protocols and none Semi-Standard Interface that cause high integration efforts.
The talk shall point out, which concepts and standardization activities are going on in the Indus-try 4.0 community and which approaches may also be useful for the Semiconductor Industry to close gaps in some areas of shop Floor integration.
The first part highlights the position of shop floor integration in terms of the Reference Architec-ture Model Industry 4.0 (RAMI4.0) that has been updated in April 2015 by the Platform Industry 4.0. In the next part ongoing integration standardization activities are presented, followed by an outlook, how the results of the activities may be used in the Semiconductor Industry. The last part shows a solutions architecture that can implement those integration concepts.

BiografieHans Mayer (Ing.) COOHans Mayer has 28 years of experience in IT Systems for automation.
After 6 years at Siemens AG in Munich in software development for cell phones, he joined znt. With znt he implemented many automation projects as software developer and project manager for different industries with a main focus on Semiconductor and Solar Industry, Medical Device and Electronic Industry and Automotive Suppliers.