In this video, student participants in Research Experience for High School Students (REHS) program discuss their experiences using HPC resources at the San Diego Supercomputer Center at UC San Diego (SDSC).

"Building on the success of the Intel Parallel Computing Centers, Intel is announcing the Intel Modern Code Developer Community to help HPC developers to code for maximum performance on current and future hardware. Targeting over 400,000 HPC-focused developers and partners, the program brings tools, training, knowledge and support to developers worldwide by offering access to a network of elite experts in parallelism and HPC. The broader developer community can now gain the skills needed to unlock the full potential of Intel hardware and enable the next decade of discovery."

In this video from the Intel booth at ISC 2015, Dr Juha Jäykkä, ‎COSMOS System Manager at University of Cambridge describes a cosmology demonstration running on prototype Intel Knights Landing and Omni-Path hardware. "At ISC 2015, unveiled new details for its future generation high performance computing products, including the first public “powered-on” demonstration of the Intel Omni-Path Architecture, a next-generation fabric technology optimized for HPC deployments."

"HPC has reached an inflection point with the convergence of traditional high performance computing and the emerging world of Big Data analytics. Intel's HPC Scalable System Framework enables an unprecedented level of system balance, performance, and scalability necessary to meet the demands of bot compute- and data-intensive workloads, today and well into the future."

Today Compute Canada announced funding to renew and consolidate the Canadian national platform for advanced research computing. Compute Canada and its regional partners ACENET, Calcul Quebec, Compute Ontario, and WestGrid will receive close to $75 million through the Canada Foundation for Innovation’s Cyberinfrastructure Initiative competition launched in 2014.

Today the Barcelona Supercomputing Center (BSC) and French Alternative Energies and Atomic Energy Commission (CEA) announced plans to collaborate on HPC research and technology innovation. Both organizations have signed an agreement to help promoting “a globally competitive HPC value chain and flagship industry”, echoing the European Union strategy in the domain.

The benefits of nested parallelism on highly threaded applications can be determined and quantified. With the number of cores in both the host CPU (Intel Xeon) and the coprocessor (Intel Xeon Phi) continues to increase, much thought must be given to minimizing the thread overhead when many threads need to be synchronized, as well as the memory access for each processor (core). Tasks that can be spread across an entire system to exploit the algorithm’s parallelism, should be mapped to the NUMA node to make them more efficient.

"In April 2015, the U.S. Department of Energy announced a $200 million supercomputing investment coming to Argonne National Laboratory. As the third of three Coral supercomputer procurements, the deal will comprise an 8.5 Petaflop “Theta” system based on Knights Landing in 2016 and a much larger 180 Petaflop “Aurora” supercomputer in 2018. Intel will be the prime contractor on the deal, with sub-contractor Cray building the actual supercomputers."