Abstract : Four new test structures which have been fabricated, including a first-order low-pass recursive switched-capacitor filter, a charge divider, an ED-NMOS operational amplifier, and an improved surface-channel CCD unit delay multiplier/first-order filter, are discussed. Also included are the results of an experiment performed on the old surface-channel CCD and an ISPICE computer simulation of a switched-capacitor current-mirror half-section. An inverting switched-capacitor network is presented. (Author)