Verilog project help

The problem statement for the project is:
Your are to build and control a Functional Unit (FU) based on the C program below. The FU has to handle 8 bit negative numbers and does the following operations: 1 power operation A^B note that B cannot be negative. 2 it can do addition of two numbers. 3 it can do bitwise OR operation.

C program is as follows:

Code ( (Unknown Language)):

void problem3_4()

{

int i;

int count;

int sum; //must be shown on a seven segment display

/*these values can be considered inputs. To test your program make these values parameters and set them to 4, but make your design robust enough to handle other values*/

int max1;//this is an unknown value that happens at runtime

sum = 1;

for(i=1;i<max1;i++)

{

//depending on what state the FU is in one of these three operations will //happen