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June 2017

Jun 21, 2017

One of the greatest challenges for designers and manufacturing engineers today is how to cost-effectively program SPI Flash and EEPROM memory after the devices have been soldered down onto a printed circuit board.

Firmware changes typically occur multiple times during the board design and bring-up process. Changes are also common during the board manufacturing process and with board field returns, so programming memory without depopulating the memory device is critical. Programming at-speed and without the requirement of extensive physical access to the board are also important considerations.

Do you want to learn how to implement a SPI Flash programming solution that can save your company time and money? We recently published a new eBook that discusses how you can use Boundary-Scan/JTAG methods along with an FPGA that’s already on the board to program these devices fast!

ASSET was recently awarded a multi-year contract for embedding boundary-scan test technology within a military system design. This meets a requirement of greater than 92% structural test diagnostic accuracy in-system, and will save millions of dollars over the lifespan of the system.

Jun 11, 2017

In my last article, I used Last Branch Record (LBR) Trace to manually capture UEFI program flow source and destination addresses. This week, I look at the associated instruction opcodes and mnemonics and try to figure out what is going on.