JESD204B Surging Ahead: News From Altera & TI

There are some days when a certain technology seems to get a lot of buzz -- today it's JESD204B's turn. The JESD204 standard applies to analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). It is primarily intended to provide a common interface to FPGAs, but may also be used with ASIC designs. (See Why There's No Need to Fear JESD204B.)

First, we have news from Altera, which just announced the availability of a broad range of JESD204B solutions designed to simplify the integration of Altera FPGAs and SoCs and high-speed data converters in systems using the latest JEDEC JESD204B standard.

Next, we hear from TI, which just announced what it says are the world's fastest 16-bit DACs. These devices support the JEDEC JESD204B serial interface standard for data converters up to 12.5 gigabits per second. The dual-channel DAC38J82 and quad-channel DAC38J84 both run at an astonishing 2.5 giga-samples per second.

Since the JESD204 standard's introduction circa 2006 (with JESD204A following in 2008 and JESD204B in 2011), adoption has been relatively slow. More recently, however, things have started to change, with more and more vendors offering support. I think that we have now reached an inflection point; from hereon-in we will be seeing rapid and widespread deployment of JESD204B-enabled devices and systems.