SWD timing requirements

The interface uses only two lines, but for clarity the diagrams
shown in the following figure separate the SWDIO line to show when
it is driven by either the DSTREAM probe or target:

Figure 11. SWD timing diagrams

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The probe writes data to SWDIO on the falling edge of SWDCLK.
The probe reads data from SWDIO on the rising edge of SWDCLK. The
target writes data to SWDIO on the rising edge of SWDCLK. The target
reads data from SWDIO on the rising edge of SWDCLK.

The following table shows the timing requirements for the Serial
Wire Debug (SWD):