Globalfoundries 14-nm is 'low-shrink' node

BRATISLAVA, Slovakia – The 14XM FinFET manufacturing process node being introduced by Globalfoundries Inc. for volume production in 2014 is aimed at reducing power consumption, but it will provide users with little or no size reduction over the previous 20-nm planar bulk CMOS node.

Such a transition between manufacturing process nodes – without a die footprint shrink as a clear cost saving as a driver – will be a first in the history of IC miniaturization. But Mojy Chian, senior vice president of design enablement, told the International Electronics Forum Thursday (Oct. 4) in a presentation "the normal ecomomics are dead," with the value proposition shifting strongly towards scaling the performance and operating voltage while physical scaling moves towards being carried more by 2.5-D and 3-D packaging.

Globalfoundries' next process has been labeled XM standing for extreme mobility indicating the company expects to provide market-leading performance and power consumption. The power consumption benefit is benchmarked at a 40 to 60 percent reduction in active power consumption, Chian told the conference here being organized here by consultancy Future Horizons Ltd.

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Globalfoundries is being aggressive on the introduction of the 14XM node – its first deployment of fin-shaped transistors – expecting to bring it in just one year after its 20-nm CMOS. However, to do that the company is keeping the middle- and back-end metallization the same as that used in the company's 20LPM process and substituting FinFETs for planar transistors. To ease rapid time to market Globalfoundries is enabling the use of ported IP blocks which will often have the same area footprint in 14XM as in 20LPM.

Chian said this will allow developers to use as much as possible of earlier designs. That strategy would produce the unusual prospect of manufacturing transition that would not be driven by die size reduction and cost saving. "The value proposition is power-performance and not die size," Chian said. He also told delegates at the conference: "A fast migration is a major part of the offering."

But he pointed out that because current drive strength will be increased in FinFETs compared with 20-nm planar transistors designers may have the option to resynthesize a design and use smaller cells from a design library for some aspects of a design. He said that use of different-sized cells could allow for some size reduction although whether it was possible for the circuit as a whole and the amount would be circuit-specific.

Chian expressed confidence that the14XM process would be introduced without the cost and uncertainty of waiting for extreme ultraviolet (EUV) lithography. "The back end is the same as 20LPM. This can all be done with double-patterning," said Chian.

Intel pioneered the commercial manufacture of FinFETs with a 22-nm process that has been in production for nearly a year. However, that process has been criticized for only offering a single transistor threshold voltage, placing constraints on designers and not achieving looked for reductions in power consumption. Intel Corp. has announced second interation 22-nm FinFET manufacturing process for volume manufacture of system-chips in 2013.

Chian indicated that 14XM would be designer friendly. "We do plan to offer multiple threshold voltages. We do not expect any design constraints. However Vt is quantized so designers have to recognize that."