Meta

Sometimes, we misunderstand things.

One of the facts which I’ve been blogging about, concerns the software called ‘NG-SPICE’, which stands for ‘Simulation Program with Integrated Circuit Emphasis’. When using it, I can sometimes seem to recognize the parameters with which it defines components, those parameters will correspond to concepts which I already know about – such as capacitance, or ‘transconductance’ – but in the modern context, those parameters can stand for the real-world properties of a MOSFET, that do not match old-world properties, by the same name.

So as an example of this, I can demonstrate the following ‘SPICE’ definition, of an old-fashioned, discrete MOSFET, which was named the ‘2N7000′:

In this specification there is a parameter named ‘CGSO’ , of which I might say, ‘It stands for Gate-Source capacitance’. Its value is close to 1.79·10-7 . If this value was in Farads, it would actually mean that the transistor to be modeled has 180nF input-capacitance, when not active. This would be a very high capacitance-value, which in turn, would lead me to think that the transistor-type was of very low quality. But in reality, this parameter is in Farads /Meter. And so what I would now think, after noticing this detail, is that because the transistor in question only has a width of 100μM, its passive input-capacitance is really only 18pF.

The same goes for ‘CGDO’.

This will make a huge difference, in terms of how fast circuits can become, that use this transistor. And I am back to having faith, in how NG-SPICE simulates its circuits.

At the same time, when such a transistor is functioning in an active circuit, it will exhibit the property of voltage-gain indirectly. This voltage-gain will reduce the apparent capacitance, between the Gate and Common, because it reduces the voltage-changes between the Gate and the Source of the transistor, which determine how much current will flow due to its real Gate-Source capacitance, with respect to how large the changes are, in Gate-to-Common voltages. However, this phenomenon needs to be held in suspicion, if we are expecting it to reduce input capacitance by more than a factor of 1000, because:

The real voltage-gain of the transistor-circuit is only rarely that high, and

There are additional factors which will increase input-capacitance, so that such an ideal will not be reached.

The transistor needs to be a fast one, with low Gate-Source capacitance, if that’s what the circuit-designer is looking for.