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PCI Express RF Data Converter design

I'm currently developing a RF-ADC to PCI Express Design using the DMA/Bridge subsytem for PCI Express (4.1). My design is attached. If I connect my own AXI4 Stream counter blocks to the PCI block which I am using in DMA streaming mode, I can read the 255 bit incremenating data in the C2h streams fine. However, when I connect the RF-ADC design instead of my test counter blocks, I find that the host machine code cannot read the data eventhough the system ILA shows the data going into the PCI Express block (attached). I'm running out of ideas so grateful for any help.

Re: PCI Express RF Data Converter design

The issue turned out to be that the RF Data Converter does not have a tlast signal and so the DMA was hanging in the PCI block. Therefore, using a counter block to pulse the tlast signal solved the issue

Re: PCI Express RF Data Converter design

The issue turned out to be that the RF Data Converter does not have a tlast signal and so the DMA was hanging in the PCI block. Therefore, using a counter block to pulse the tlast signal solved the issue