The DS90URxxx-Q1 incorporates FPD-Link II LVDS signaling on the high-speed I/O. FPD-Link
II LVDS provides a low-power and low-noise environment for reliably transferring data over a serial
transmission path. By optimizing the Serializer output edge rate for the operating frequency range,
EMI is further reduced.

In addition, the device features pre-emphasis to boost signals over longer distances
using lossy cables. Internal DC-balanced encoding and decoding is used to support AC-coupled
interconnects. Using TIs proprietary random lock, the parallel data of the Serializer are
randomized to the Deserializer without the need of REFCLK.