Logic Gates Implementation Using PLC Simulator

Last time I had given you a brief introduction about the FATEK PLC and its different sections that where the input output supply, input output pins, communication port etc. are available.

Now, today we are going to start the implementation of logic gates by using Siemens simulator. Two big advantages of using a simulator rather than building the whole scenario are

Design

Testing

The PLC simulator object is to bypass the inputs into a PLC so that the programmer can test and debug the program before installation. If you are an engineer or even a technician who programs PLCs, there is a need of a quick way to test PLC functionality to save time, money and embarrassment by fixing problems before they start.

To save money is one of the biggest advantages. Real PLCs are so expensive that at student level no one can afford it for testing of their actual program. Simulations take the building/rebuilding of model already created in the design phase. Most of the time simulation testing becomes cheaper and faster than performing the multiple tests of the design. You can run the simulation as many times as you desire and at any level of detail you desire, the only restrictions are your imagination, your programming skills and your CPU.

For the programming in simulator of I am using ladder language because anyone can learn it so easily. The simulator that I am going to use for the testing of our ladder programs is Siemens Logo V8.0. First I will give you a brief introduction about Siemens Logo simulator.

Siemens Logo V8:

That is the main window of the Siemens logo simulator.

Simulator Sections:

The below figure represent different sections of the simulator.

Figure.1

In input/output section you can see different types of inputs (e.g. normally open, normally closed) and outputs (e.g. normally open, normally closed). You can use both these types of inputs/outputs. Type of the contacts depends on the application that either normally open input/output or normally closed input/output is used.

In timer section different types of timers are shown e.g. on-delay timer, off delay timer. I will tell you how to use these timers. Other components which are shown will be describe later as I will use them because, so for I am using only simple components for the designing of different ladder programs. F3 button on your keyboard is used for simulation of ladder program.

Logic Gates Introduction:

The basic building blocks of a computer are called logical gates. Gates are basic circuits that have notably one (or more) input and exactly one output. Input and output values are the logical values which are represent as true and false. In computer system it is common to use 0 for false and 1 for true. A large number of electronic circuits are made by logic gates. Gates have no memory.

The value of the output depends only on the current value of the inputs. A useful way of describing the relationship between the inputs of gates and their output is the truth table. In a truth table, the value of each output is tabulated for every possible combination of the input values. The most commonly used logic gates are shown below in figure.2.

Figure.2

Logic Gates Implementation

AND Gate:

The AND gate implements the AND function. From the figure.3 you can see that for the output logic to become “1”, signals applied at both inputs must have logic “1”. With either input at logic 0, the output will be held to logic 0. The AND gate may have any number of inputs and one output. For the output of a AND gate to be logic one, all inputs must be at logic one.

Figure.3

Truth table:

The figure.4 shows the truth table of AND Gate which have two inputs and one output.

Figure.4

AND Gate Ladder Diagram:

The figure.5 shows the AND Gate ladder diagram. The left black bar is power supply for the circuit.

Figure.5

OR Gate:

The AND gate implements the AND function. From the figure.6 you can see that an OR gate may have any number of inputs and one output. For the output of an OR gate to be logic one, at least one input must be at logic one. If all inputs are logic zero, the output is logic zero.

Figure.6

Truth table:

The figure.7 shows the truth table of an OR gate which have two inputs and one output.

Figure.7

OR Gate Ladder Diagram:

The figure.8 shows the OR Gate ladder diagram.

Figure.8

NOT Gate:

The NOT gate implements the inverter function. NOT gate is different from AND & OR gates in that it always has exactly one input as well as one output as you can see from the figure.9. Whatever logical state is applied to the input, its opposite state will appear at the output.

Figure.9

Truth table:

The figure.10 shows the truth table of NOT gate which has one inputs and one output.

Figure.10

NOT Gate Ladder Diagram:

The figure.11 shows the NOT gate ladder diagram.

Figure.11

NAND Gate:

The NAND gate may have any number of inputs and one output. From the figure.12 you can see that for the output of a NAND gate to be logic zero, all inputs must be at logic one. If any input is logic zero, the output is logic one. It is a combination of AND gate and NOT gate.

Figure.12

Truth table:

The figure.13 shows the truth table of NAND gate which have two inputs and one output.

Figure.13

NAND Gate Ladder Diagram:

The figure.14 shows the NAND Gate ladder diagram.

Figure.14

NOR Gate:

The NOR gate may have any number of inputs and one output. From the figure.15 you can see that for the output of NOR gate to be logic zero, at least one input must be at logic one. If all inputs are logic zero, the output is logic one. The symbol and truth table for a 2 input NOR gate are given below.

Figure.15

Truth table:

The figure.16 shows the truth table of NOR gate which have two inputs and one output.

Figure.16

NOR Gate Ladder Diagram:

The figure.17 shows the NOR gate ladder diagram.

Figure.17

XOR Gate:

The XOR gate may have any number of inputs and one output. From the figure.18 you can see the common implementations that have only two or sometimes three inputs. For the output of a XOR gate to be logic one, there must be different type of logic at the input. Otherwise, the output is logic zero. The symbol and truth table for a 2 input XOR gate are given below.

Figure.18

Truth table:

The figure.19 shows the truth table of XOR gate which have two inputs and one output.

Figure.19

XOR Gate Ladder Diagram:

The figure.20 shows the NOR gate ladder diagram.

Figure.20

XNOR Gate:

The XNOR gate has any number of inputs and one output. From the figure.21 you can see that common implementations have only two or sometimes three inputs. For the output of a XNOR gate to be logic zero, there must be same type logics at the inputs. Otherwise, the output is logic one. The symbol and truth table for a 2 input XNOR gate are given below.

Figure.21

Truth table:

The figure.22 shows the truth table of XNOR gate which have two inputs and one output.

Figure.22

XNOR Gate Ladder Diagram:

The figure.23 shows the XNOR gate ladder diagram.

Figure.23

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I hope it will be helpful for you. Next time I will explain different types of timers which I am going to use for ladder programming and explain how the same types of timer can be used for performing different tasks.

Any query related to this will be welcomed. Take care for the next time.