Open-source interpreted Verilogsimulator with a feature set and performance similar to Verilog-XL. Implements all IEEE 1364-1995 features along with some Verilog-2001 features. Full support for Verilog PLIs.

LogicSim is an affordable and user-friendly Verilogsimulator for ASIC and FPGA design verification. It offers a powerful and easy-to-use graphical user interface that lets you quickly simulate your Verilog designs. It's built on our state-of-the-art ...

Documentation, simulator, compiler, and Verilog implementation of a completely open-architecture graphics processing unit. This design is intended for academic and commercial purposes. The first step is to develop a detailed GPU simulator and ...