The
hot market igniting properties of fire were an idea which - I confess - I
used / stole / borrowed to mock up a temporary (only seen by several hundred
thousand SSD readers) placeholder
banner ad for
Fusion-io in 2008
until they found the time to design some better ads. My quickly scribbled
skunkworks design used this wording... "learn more about the PCIe SSD
company company which has fired up the server market with its ioDrive
accelerators".

And "fire" has also been used as a
suffix in some SSD
product brands too:- SolidFire, WildFire etc.

"We expected some hot hardware at the Flash Memory
Summit (FMS) in Santa Clara, CA, but not like this: A booth actually caught fire
this morning." ...read
the article

...

whatever did really happen
to ULLtraDIMM?

Editor:- August 1, 2017 - The recent history
and market adoption of NVDIMMs is similar to the early
messy history
of the SSD market in that fascinating products appear at one time and then
fail to get traction to remain in the market in successive memory
generations.The reasons are similar:-

Competition from other ways of getting similar work done.

In the
case of NVDIMMs not just other types of raw native memory but SSDs in other form
factors too. Such as PCIe
which can be deployed to give approachingly similar performance.

Without a competitive and capacble software base
which can recognize the latent strengths of the new memory technology - the
results you get are never as good as the raw technology can deliver. Or if the
early software is good enough but the capability is single sourced that
deters market growth due to fears of being locked into a proprietary
supplier.

Jim says "Both
SanDisk and IBM later abandoned the technology, which I have heard was due to
performance issues stemming from the lack of an interrupt pin on the DDR3 bus."
...read the
article

In my own contemporaneous coverage of that product I
wrote about other factors which I thought at the time indicated weaknesses in
that first generation (of its kind) product. These were:-

there was a SATA bridge inside the DIMMs between the flash and the DDR3
logic. The result was system level performance which was not as great as you
might expect - compared to native enterprise PCIe SSDs.

for about a year there were legal wrangles surrounding patents associated
with the design which scared off other wouldbe adopters and at one stage a court
order which stopped shipments.

the ULLtraDIMM guzzled power - so you couldn't just drop it into a standard
motherboard socket without checking that the power tracks had sufficient
copper.

the ULLtraDIMM product was not the "reason to buy the company"
product line in 2 successive company acquisitions of its flash technology
parents SMART then SanDisk - so it was just one of several SSD products lines
which were let go.

As you can see there were certainly enough bullets
to wound (if not kill) the first generation
ULLtraDIMM.
But its unsung (less sung about) creator had learned the lessons and produced a
superior follow up product.

3D nand fab yield - the nth layer tax?

If you're trying to predict and
anticipate how the supply of next generation nand flash will ramp up in the next
year compared to how you've seen memory successions before then the 3D nand
flash market has presented many problems of analysis and interpretation.

As
nand flash is still the dominant memory technology used inside over 99.9% of
SSDs and as the switch from planar 2D to 3D was pitched as the lowest risk
solution to continue supplying the growing need for more flash storage
- because memory geometry shrinks had gone about as far as they dared go
- there has been much uneasiness and disquiet recently in markets which use
these memory chips about the
shortages
which have been the most obvious sign that progress has not been entirely plain
sailing.

Many blogs in the SSD market in recent quarters have focused
on the technology and business impacts (such as higher costs and lost
opportunities to make SSDs) with various degrees of informed speculation and
analysis.

What's really going on?

One of the key secrets of
memory makers ever since the earliest days of semiconductor memory is that the
yields and manufacturability problems are kept closely guarded secrets because
they are competitively very sensitive. So the only way we're going to get an
accurate "from the horse's mouth" picture of everything which has
contributed to making these tranistions so bumpy is after the
underlying problems have been solved which the memory industry will signal in
the traditional manner by promises of lower prices and quicker deliveries.

Mark's blog provides a snapshot of the current 3D
succession plans by the leading memory makers. And if - like me - you've already
seen more than enough of such pretty 3D memory pictures you might be tempted
to just click away. But I found 2 observations in that article particularly
interesting .

First from Applied
Materials which is a strategic supplier of wafer level production,
inspection and testing technologies used by memory chip makers. AMC expects
wafer starts for 3D nand to be in the region 500,000 to 700,000 wspm (wafer
starts per month) by the end of 2017 - which is about 60% more than a year ago.

Greg's point is that while going from 2D to 3D gave
the industry the same kind of
aerial
bit density improvement that the industry got accustomed to with decades of
Moore's Law geometry shrinks - the shape of the bits per chip roadmap curve -
as you add more layers of 3D to an industry which is already using double digit
layers of deposited
memory - is not going to be the same for successive N+ layer generations.

When
you add more layers to a 60 layer memory - for example - the next increment
can be any arbitrary level which makes sense from the manufacturing and
marketing points of view. The next steps don't have to be x2 jumps as they
often were in 2D - because the process challenges are different.

One
important thing which has been missing from most of the articles which I've seen
about 3D nand successor generations is any clear picture of how much longer each
3D chip spends in the fab compared to earlier 2D memory generations.

The
promise of the initial switch to 3D memory was you get more memory bits for a
similar number of wafer starts and invested wafer fabs.

It's clear
that adding each memory layer adds more processing time. It would be useful
to have an idea of how that scales - and the risk reward factors of yield due
to rejects and rework - because that would give customers in the SSD industry
more realistic expectations of how they can interpret the other data they get
from the memory industry. (Investments in new fabs, and roadmaps on the number
of layers and virtual bit density TLC, QLC etc.)

A "time served
in the fab" model for incremnental layers would provide more confidence
in future generations of memory roadmap too.

"feed the fab"
- productivity issues

After writing the above I thought I'd better
look around and see if I can point readers to articles which discuss wafer fabs,
yield and time spent in the fab in more details. As I expected - due to the
business sensitivity of such insights - the papers I found were rather old or
talked about DRAM etc rather than flash. But they do give you a feel for some
of the strategic issues - which if you haven't had close contact with the
semiconductor business will tell you more about the tactics and strategies used
in the production flow.

"Estimating and shortening the cycle time
of each job is an important task to maintain a competitive edge in the DRAM
industry. For example, Samsung, implemented the short cycle time and low
inventory (SLIM) method to estimate the cycle times and WIP (work in progress)
levels for various manufacturing steps, so that a more effective control of the
factory was possible. As a result, the average cycle times of some DRAM products
were reduced from more than 80 days to less than 30 days, bringing Samsung a
benefit of about $1 billion.

"Using
older-generation processing equipment on newer process flows may make the
achievement of world-class defect densities much more difficult than if newer
equipment is used. While yields may be lower when employing older processing
equipment, capital costs are lower as well, and so the strategy might turn out
to be economically competitive or even superior to the strategy that employs
solely new processing equipment."

This is relevant given the
prequel to the 3D memory direction story in which all the memory companies had
been losing money and reluctant to invest in entirely new equipment.

But
I still wasn't satisfied with that. I know people in the industry today who can
tell you more if they choose to. But how to reach out to them?

How many extra days does
it take to make 60 layer nand flash compared to say 30 layers?

And how does that compare to planar?

I mean the
incremental time in the fab for manufacture and test. Let's call it the nth
layer tax...

Having a good grasp on these numbers will help memory market analysts
and systems customers get a more realistic feel for how the memory market can
ramp up to successor generations assuming any stable reference start point of
fab investment and wafer starts.

It's clear from the current shortages that we need more realistic
expectations about the manufacturing impacts of moving up the layers. On the
other hand the pressure of market demand and longer times in the fab have been
good incentives to bring forward QLC.

"Zsolt - there is no single answer to this question. Highly
dependent on layer geometry, aspect ratio, materials used, deposition method,
bits per cell, etc. Dozens of factors, truth be told. Plus, it would be highly
unusual for the exact same characteristics and methods to be used in two
different products (# of layers). Sorry for not being of more help :-) but
that's the reality. No easy answers."

"This whole question is at the heart of the
cooperative strategy of each NAND vendor. To the first order everybody knows how
to build 3D NAND now, the question is how to build it cheaper, trading off
geometry versus yield versus FAB time/steps. Nobody is likely to publish their
roadmap for this as they don't want to tip their hand, good or bad to their
competitors.

Best the analysts can probably do is to plot the historical trends on
die capacity, die size and volume each vendor supplies to determine the
approximate yielded FAB capacity."

Editor's comments:- The notable thing for me in this announcement
was that WekaIO uses a performance benchmark compared against an
IBM FlashSystem 900 (the
decendant of the RamSan
world's fastest storage systems from
TMS.)

That's
an ambitious positioning statement and offers users a glimpse into the kind of
performance they can get by using flash assisted cloud services. Like other
modern SSD fabric software software - "WekaIO eliminates bottlenecks and
storage silos by aggregating local SSDs inside the servers into one logical
pool, which is then presented as a single namespace to the host applications."

Editor:-
August 11, 2017 - With so many things going on in the SSD and memoryfication
markets the
best
of show award winners category at the annual Flash Memory Summit has - in
past years - provided a useful way to filter interesting developments. And
this year is no exception. Among the many awards - 2 things caught my
attention:-

In
the current state
of the memory market the availability of usable leading edge flash memories
is subject to great uncertainty due to technology difficulties and market
demand. And we know that flash memory makers are jealous about who they cozy up
to and share their precious early samples with.

In that context
Burlywood's claim to fame is that their IP - "Allows for multi-sourcing
of 3D TLC/QLC flash for a single SSD controller."

If you're
developing SSDs for new markets but not sure whether the memory will turn up in
your factory at the prices and volumes you require - this multi-sourcing idea
might sound attractive.

Although
by no means a new idea - because the variability and consistency of benchmark
related factors such as latency in enterprise SSDs has been discussed in
these pages and
elsewhere ever since
flash SSDs have been used in the enterprise - nevertheless the recent award
has refreshed the idea. And instead of the
competitor A versus
competitor B arguments which were popular in the PCIe SSD market 6 years ago
- the new comparison at the heart of the award showed the difference in the
quality of latency in NVMe SSDs from the same company - due to firmware. read
more about it

You might say that what the 2 different awards
above share in common is the desire for predictability in environments
which are beset by highly chaotic elements.Nimbus enters the SSD controller market

Editor's
comments:- this move is part of a strategic trend in the market. For more see my
new blog - sauce
for the SSD box ganderGen-Z does memory fabric demo at FMS

Editor:- August
8, 2017 -
Members
of a relatively new ORG -
the Gen-Z Consortium ran
multi-vendor demonstrations this week at
FMS achieving 112GT/s.

According
to Gen-Z's faqs page
- the idea is to create a high bandwidth, low latency, standard for
memory-like data transfers which are media independent and can "scale
from tens to several hundred GB/s of bandwidth with sub-100ns load-to-use memory
latency."

What's a comparable context?

If you go back
in time to 2000 and think about the past but forward looking potential of
Infiniband or back
in time to about 2013 with
PCIe fabrics
- it's maybe a bit like like those were in their time - but now we're looking
from a 2017 competitive needs analysis and the memoryfication of the
datacenter- so it needs to be faster.Intel promises dual port SSDs

Editor:- August 7,
2017 - Intel
today
announced
some new upcoming data center oriented SSDs among which were:-

dual port versions of some SSD models promised in Q3 2017

a new form factor for SSDs - the "ruler" form factor - which the
company said "will come to market in the near future".

Editor:-
August 7, 2017 - Longsys
today
announced
that it will be sampling the industry's first 11.5x13mm NVMe BGA SSDs which
support Boot Partitions and the Host Memory Buffer features of NVMe rev 1.3
in Q4 2017.

"As the world's leading Mini SDP SATA DRAM-less SSD module
provider, Longsys has once again made a unique contribution to the storage
industry by pioneering the integration of Marvell's DRAM-less SSD controller
88NV1160 and the new 64-layer 3D NAND into a 11.5mmX13mm BGA package," said
Zhixiong Li, CTO of Longsys.

Editor's comments:- apart from
the obvious applications for NVMe SSDs on a chip in the consumer market I think
the widespread availability of such devices in 2018 could create new
opportunities for disruptive "high availability" BGA array
architectures in industrial market too.

SMART
says that its new
Osmium Drive
consumes as little as 1/8th the power per terabyte compared to nearline HDDs.

Noteworthy from the
endurance
and DWPD point of view
SMART's
datasheet
(pdf) says the MLC drive is specified to offer " unlimited writes"
over a 5-year lifetime. Behind this may be the technical judgement that at SAS-2
speed and this storage capacity you can never write too much data.

Editor's
comments:- in April
2013 - a related company - SMART Storage Systems was offering a 2TB 2.5"
SAS SSD rated at 10 DWPD as a capacity leading fast storage drive for under
$4,000. That company and product line was acquired by SanDisk. The SMART Modular
Technologies in today's story is the industrial and special memory SSD business
units which remained unaquired by SanDisk. So it's interesting to see them
going back into a market where they effectively compete.

SAS is no
longer regarded as a high performance drive interface (that role has long
been taken over by PCIe and memory channel channel devices). Instead SAS has
changed its role into being a convenient internal technology for high capacity
fault tolerant rackmount SSDs which deliver
multipetabyte
scale SSD storage.

For other competing companies which have also
announced ultra high capacity SAS SSDs see the
SAS SSD news archive.Mobiveil releases FPGA controller for 16 lane 16G NVMe SSDs

Editor:-
August 3, 2017 -
Mobiveil today
announced
availability of its FPGA-based SSD development platform targeting the latest
3D NAND devices. Error correction is performed using ether BCH or LDPC.

Mobiveil's silicon-proven PCIe solution has added Gen4 support for up
to 16 lanes at 16G line rate with availability of 512 bit Data path user
interface. The PCIe controller offers AXI4 interface and DMA capabilities for
seamless integration into an ARM Advanced Microcontroller Bus Architecture SoC
implementation.
Lessons from Coraid

Editor:- August 2, 2017 -
AoE (ATA-over-Ethernet) is
one of those ideas from
storage history
(AoE news coverage here on the mouse site started in 2003) which flash into
the news pages for a while and then fade away.

Among other things
in the article - Brantley
Coile talks about the mistaken business direction which Coraid took to
grow revenue after its successes in 2010 to 2012...

"...then
management made a huge mistake: they decided to change the operating systems.
Instead of using the Bell Labs technology I had used, and still use, they wanted
to switch to Solaris. Companies like Coraid can't afford to change OSes no
matter what the reason. It confuses customers. It means completely changing
developers. It stops new features as the new team relearns all the lessons the
old team had already discovered. Sales sagged. Funding disappeared." ...read
the article

Editor:-
August 2, 2017 - AccelStor
today
announced
a new high
availability all-NVMe flash storage array, the NeoSapphire H810. The 4U
rackmount SSD which uses Intel's Xeon Purley platform and has 100GbE
connectivity delivers upto 6x the performance of the company's previous
NeoSapphire P310 all-NVMe flash array will be on display next week at the Flash Memory Summit.

Among other things Sang
explains why he thinks the 3D nand bandwaggon will be unable to reduce SSD
storage costs in future vertical scaling generations. He says this roadmap
was - "A mistake by smart people." ...see the video

Editor's
comments:- If San is right with his prognosis on 3D nand - it has ramifications
for the expectations about the costs of SSDs in the next few years.

As
BeSang has been busy with linkedin blog posts and videos promoting the purported
superiority of of 3D super nand and 3D super DRAM I asked the company.

Is Besang looking for flash makers to license the technology? Or
will you make devices of your own?

BeSang told me - "BeSang is a fabless NAND product maker and
doing IP licensing for DRAM and eDRAM.
SK Hynix is the first
licensee of 3D Super-DRAM."
Embedded NVM - à la mode in September

Editor:-
July 28, 2017 - The South of France isn't a location which would have sprung to
my mind as the most obvious place to look for an event related to non volatile
memories and embedded designs. But in that respect I was wrong. The Leading Edge Embedded NVM Workshop will
take place September 25 to 27, 2017, in Gardanne (Aix en Provence area,
France).

Among
other things IC Insights says:- "DRAM, unit shipments are actually
forecast to show a decline this year. Moreover, NAND shipments are forecast to
increase only 2%."When
it comes to price expectations IC Insights says this.

"Even
though DRAM ASP growth is forecast to slow in the second half of the year, the
annual DRAM ASP growth rate is still forecast to be 63%, which would be the
largest annual rise for DRAM ASPs dating back to 1993 when IC Insights first
started tracking this data. The previous record-high annual growth rate for
DRAM ASP was 57% in 1997. For NAND flash, the 2017 ASP is forecast to increase
33%, also a record high gain. (In the year 2000, the predominantly NOR-based
flash ASP jumped 52%)."

For those who need much more information
IC Insights publishes a 250 page report ($4,090) which includes various free
monthly updates. ...read
more

Editor's comments:- One message to take away from this is
that as memories have been transitioning to the next multiple of 3D layers the
chip throughput from the industry's legacy wafer fabs has stayed the same or
gone backwards due to the extra time taken to reliably make those extra layers
to create higher bit density memories.

Editor:-
July 20, 2017 - Swissbit
today said it will show a prototype of a new low power industrial M.2 NVMe PCIe
SSD at the Flash Memory Summit
next month.

Swissbit says - "Whilst the popular 4-lane/8-channel
NVMe products are tuned for the highest data rate, Swissbit's N-10 has a
different focus: With its 2-lane/4-channel architecture, N-10 can offer more
than double the performance of an SSD with SATA 6Gb/s interface, and
significantly reduces power consumption."Virtium says it's no longer a matter of if, but when, NVMe
supplants AHCI in industrial SSDs

Editor:- July 19, 2017 - Last
week I noticed a new blog from Virtium -
NVMe:
Taking a Seat at the Industrial-Embedded Table - and that prompted me to
ask - "Can Virtium tell me about any new industrial equipment or
application roles in which the availability of NVMe PCIe SSDs was the deciding
factor for their customer and for the feasibility of the project?"

A
spokesperson for Virtium said - "The concept of NVMe is new to the
industrial-embedded space, for the very reasons we cited in the blog  that
the capacity needs simply didn't demand PCIe performance that be offset by the
penalties it would exact, namely software incompatibility and increased power
consumption. Industrial-embedded-system designers, therefore, are just now
starting to look at the NVMe-SSD "marriage" in a different light,
given how IIoT data is going to require a lot more storage. So, at this point
we can't cite any decided-upon designs that will definitely feature NVMe SSDs.
However, we can say many of the Virtium customers we have spoken with about this
concept agree that it's no longer a matter of if, but when, NVMe supplants AHCI
as the SSD interface in certain industrial-embedded designs."

Editor:-
July 18, 2017 - One of the big changes in the storage events calendar this year
is that the annual Storage Visions
Conference has moved from its traditional January (CES compatible) location and timing up to
October. Apart from the more convenient date that may also reflect that the
content of the conference has expanded and adapted in recent years to cover
all aspects of storage such as the enterprise and cloud instead of just the
consumer stuff which you'd expect from its proximity to a big consumer show.

Editor's comments:-
I've been watching the Storage Visions Conference grow in stature in our
industry (outlasting many others which sparng up in the early 2000s) and I
admire the dedication and work of its creator Tom Coughlin.

Having said that one of the odd things which puzzled me about SV
2017 (and which I mentioned to Tom this week) was the unclarity of the typeface
and dischordant contrast of the raw text compared to the background in the
banners and logos which have been designed to attract interest in the
conference.

I've
included one example to the right of this here.

And you can see more
variations and judge the clarity or otherwise of the designs for yourself on
the SV 2017 banners
page here.

I'm color blind so maybe some of that is just me. But
isn't English words set against Ancient Egyptian heiroglyphics just text on
text? The background is too interesting and draws attention away from the text.
While the letters in the text are too hard to instantly recognize as their
contrast changes from top to bottom.

This is the kind of
readability issue which I've been warning
advertisers against
since the 1990s. And if you're interested in such web communication matters
see my seldom updated site Marketing
Views.

On the other hand - I hope that the seriousness of the
topics and the event itself will help you see past the idiosyncasy of this
year's Storage Visions banner. And if you want to spread the word then you now
know where to look.

Hey you're looking at a site which has
mice in its logo. So I
trust you can see beyond such superficial factors.3D eTLC adoption - blog by Toshiba

Editor:- July 17,
2017 - The long saga of
naughty flash in
the enterprise (2004 - 2017) had already embraced 3D TLC by 2015 (in low
DWPD arrays) - but I have
to confess that although I had seen the prefix "e" used before for MLC
I didn't realize this hardening veneer of marketing
jargon had been
deemed worthy enought to have been been recycled unto the next generation of
memory too - as eTLC.

Among
other things Jeremy's blog mentions that early (2009) doubts by some
commentators about the efficacy of MLC in the enterprise were wrong! and in
recent years the market enabling factor for newer generations of MLC, TLC etc
is that there is now "Better understanding of workloads..." ...read
the article

Which prompted me to say on linkedin

"Good
article placing naughty flash in context. As Jeremy says the enterprise didn't
understand the workloads in storage when flash SSDs began to be used in arrays.
Now we have a much more sophisticated market which can deploy any type of new
memory to a latency and cost per gigabyte role where it is most cost effective."

Looking
ahead it's tempting to see a pattern here. So in the years to come will we see
eQLC?

In reality this type of "enterprise" differentiation
of flash grades has long been meaningless at the technical level because it
makes much more difference to the system reliability what the
controller does and
the software and the
ratio of
(NV)RAMcache that's available for data manipulation before it gets written
to flash.

I guess that memory manufacturers have to choose
names to
differentiate their many selections of flash and "e" has been useful
and is easy to deploy. And is less likely to be misunderstood than choosing
other letters such as for example "b" for "better" as in
bTLC.

In this 40th quarterly edition shortages in
memory, who owned the memory companies and the future memoryfication of the
enterprise were ever present ingredients in the SSD news mix. ...read the article

Throughout the
history of
the data storage market we've always expected the capacity of enterprise user
memory systems to be much smaller than the capacity of all the other attached
storage in the same data processing environment.

Like many of you - I've been thinking a lot about the
evolution of memory technologies and data architectures in the past year. I
wasn't sure when would be the best time to share my thoughts about this one.
But the timing seems right now. ...read the
article

After more than 20 years of writing guides to
the SSD and memory systems market I admit in a new blog on
StorageSearch.com -
Are
we there yet? - that when I come to think about it candidly the SSD
industry and my publishing output are both still very much "under
construction". ...read
the article

....

....

RAM has changed from being
tied to a physical component to being a virtualized systems software idea - and
the concept of RAM even stretches to a multi-cabinet memory fabric.