Hi,
the WinXP driver for the TT C1500 initialize the pll in a different manner like linux:
Divider: 1ae2 -> 394MHz
16.10.07 19:06:16.543: S c2(W) A 1a A e2 A c8 A 62 A 80 A P
16.10.07 19:06:16.602: S c2(W) A 1a A e2 A c8 A c2 A 80 A P
16.10.07 19:06:16.916: S c2(W) A 1a A e2 A c8 A 6a A 80 A P
16.10.07 19:06:16.982: S c2(W) A 1a A e2 A c8 A ca A 80 A P
16.10.07 19:06:17.340: S c2(W) A 1a A e2 A c8 A 62 A 80 A P
16.10.07 19:06:17.408: S c2(W) A 1a A e2 A c8 A c2 A 80 A P
16.10.07 19:06:18.714: S c2(W) A 1a A e2 A c8 A 6a A 80 A P
16.10.07 19:06:18.781: S c2(W) A 1a A e2 A c8 A ca A 80 A P
Divider: 1e62 -> 450MHz
16.10.07 19:06:21.422: S c2(W) A 1e A 62 A c8 A 6c A 80 A P
16.10.07 19:06:21.479: S c2(W) A 1e A 62 A c8 A 6c A 80 A P
16.10.07 19:06:22.015: S c2(W) A 1e A 62 A c3 A 44 A P <- Überlauf?
16.10.07 19:06:22.015: S c2(W) A 1e A 62 A c8 A 64 A 80 A P
After 60ms, the charge pump value is changed (0x62->0xc2). This occurs on 394MHz but not
on 450MHz. The band width bit is inverted on every tuning attempt (0x62->0x6a->0x62).
- Hartmut