Our general purpose programmable vision processors feature an FPGA hardware processing platform that combines ACU(Acquisition Control Unit), DTE (Data Transfer Engine) and IPU (Image Processing Unit) and state of the memory architecture. As a result, models such as our new Xcelera-CL VX4 are capable of handling variety of complex, real-time image processing topologies including iterative processing loops. While the FPGA technology provides ability to adapt to variety of high-speed, compute-intensive real-time processing applications, the Xcelera VX4 hardware design has been implemented using standard off-the-shelf components with long term availability.

Key Features:

Highly optimized memory architecture for embedded image processing

Up to 2 x 512MB of Image memory

Up to 4 x 32MB of image processing memory

Extensive camera support

User configurable Xilinx Virtex 5 FPGA

Fully supported by Sapera APF

Product List

Sapera APF

Sapera APF is an integrated graphical FPGA development environment. The Sapera APF simplifies traditional FPGA development processes by combining a point and click graphical interface with FPGA based image processing libraries. Sapera APF comes bundled with a bit accurate software version of the FPGA library functions for rapid functional simulation but also automatically generates necessary infrastructure to call user functions using Sapera SDK. This powerful, yet easy to use FPGA development environment allows users to create, debug, and deploy FPGA code without ever leaving the development GUI, dramatically improving ease of development and time to deployment.