Question Answers

The Design Wizards are used to design RF and microwave cascade-type amplifiers, as well as matching networks for antennas and other RF and microwave components. The Design Wizards automate many manual steps in the typical design process.

The Impedance-Matching Wizard (IMW) is used to synthesize impedance-matching networks. Control over the input or output impedance of the matching network at the 2nd and 3rd harmonic frequencies is also provided in the IMW. The IMW is a subset of the Amplifier Design Wizard (ADW).

The user must define the matching problems to be solved with the IMW (load-pull measurements or simulations, etc.), while a wide range of impedance-matching problems can be set up automatically for class A and class B amplifier stages in the ADW.

The matching networks synthesized with the IMW (or the Impedance-Matching Module of the ADW) can be refined in the ADW. This includes modifications (like replace inductors with spiral inductors or solenoidal coils), addition of extra components for biasing and other purposes and optimization of the modified network.

Small-signal, low-noise, power, high efficiency, as well as high dynamic range amplifiers can be designed with the ADW. The amplifiers designed with the ADW are usually processed further in Microwave Office (TM) or ADS (TM). Any combination networks required must also be designed externally.

In the IMW, DXF files can be created for the artwork. In the ADW Sonnet Software (R) files can also be created. Microwave Office (TM) scripts can be created in both of the wizards.

Impedance-matching problems must be specified in real-frequency format. That is, the source and the load impedance of the matching network are specified at a number of frequencies over the frequency ranges of interest. Multiple passbands are allowed.

The transducer power gain required must also be specified at each frequency. The target gain at each frequency can be a specific value (use unity when a good match is required) or can be greater than or less than the specified value. The highest gain allowed is 1.0.

When harmonic control is required, a range of allowable reactance values must be specified at the different harmonic frequencies of interest. Control over the 2nd and 3rd harmonics is provided.

A modification network consists of frequency-dependent resistive sections (resistor in parallel with a capacitor or in series with an inductor, ...). The resistive effect is usually larger at low frequencies. Double-section modification networks can be synthesized in the Device-Modification Section of the ADW. The modification network is used to stabilize the transistor, the level the gain slope and to reduce the gain-bandwidth constraints associated with the transistor impedance(s) to be matched.

When you control the power directly in the ADW, you only have a point-match option. This means that the point selected as the optimum on a power contour at a particular frequency is the target for the matching at that frequency. When you control the noise figure or the power gain, the contour of constant noise figure or gain is a circle. The option is then given to allow a circle match. This means that any point on the circumference of the circle is acceptable. Circle-match problems are easier to solve than point-match problems.

Instead of allowing a circle match, it is also possible to set the innner (or outer) area if the circle as target (this usually (inherently stable case) implies gain greater than a specific value or noise figure smaller than a specific value). This can be done by changing the specifications for the transducer power gain in the matching section to be larger or equal to the target value.

Note that it may be a good idea to allow a small circular area around a chosen point target in the Impedance-Matching Module. This can be done by setting the gain target for the matching to be greater or equal than (say) 0.96 (this is equivalent to a VSWR of 1.5). The gain target can be changed by using the Specifications | Terminations command in the Impedance-Matching module.

When you select the optimum point on a power contour, you should look at the gain at that point, the stability factors and also the VSWRs, especially the parameter listed as VSWRload. The smaller this number is, the easier the match. This VSWR is a measure of how different the impedance at the selected point is from the impedance that is already in place in the circuit. If there is no difference (no matching required at that frequency) the VSWR would be 1.

The VSWR values listed serve as measures of the degree of difficulty of the matching problem at each frequency.

Note that sensitivity factors can also be listed when the optimum point on a constant gain and constant noise figure circle is selected. These factors list the change in gain or noise figure for a 1% change in the associated gain or noise figure controlling impedance. Click the relevant box to switch the contents of the table displayed.

The default selection for an optimum point can be changes by clicking on the angle value in the table. Note that the error function controlling the selection of the default points can be changed on the previous page of the wizard.

In a linear amplifier the output power is mainly limited by clipping of the intrinsic output current and voltage of the different transistors used in the circuit. The ADW uses the dc operating point (at the rated output power) and the boundary lines specified for the allow load-line area on the I/V-plane to calculate the maximum linear output power. The model fitted is used to map the external voltage and current of each transistor to the associated intrinsic quantities. Based on these calculations, load-pull power contours can also be generated for each transistor.

Lumped-element, distributed networks, microstrip networks, as well as mixed lumped/distributed networks can be designed with the IMW and the ADW. Single-layer parallel plate capacitors (MIM, etc.), square spiral inductors, hair-pin inductors and solenoidal coils can be used in the ADW. Surface-mount components can be used in the IMW and the ADW.

A. You can do all the active work including defining the specifications for the matching problems to be solved in Microwave Office (TM) or the Advanced Design System (TM) and only design the matching networks (with or without harmonic control) with the Ampsa Wizards. A complete flow is provided for this in the ADW from synthesis, to fine tuning and introducing modifications in the matching network for biasing purposes, reducing discontinuity effects or replacing basic components with alternatives (inductor to spiral inductor or solenoidal coil, etc.) to re-optimizing the matching network to restore its performance after the modifications made. The final matching network can be exported in various formats, including DXF, Sonnet Software (R) format and also as a Microwave Office (TM) script.

B. When linear cascade-type amplifiers are designed most of the work can be done in the ADW with linear models and boundary-line constraints on the I/V-plane, after which the designed amplifier can be exported for fine-tuning with non-linear models and further processing. The ADW design process usually starts with fitting linear ADW models to the class A or B S-parameters of the transistors to be used at the required dc operating points (the operating point corresponding to the rated output power) and specifying the associated I/V-plane information.A systematic approach is then followed to design each stage of the amplifier, after which the completed design is optimized. The amplifier is then exported for fine-tuning and further processing.A systematic approach is then followed to design each stage of the amplifier, after which the completed design is optimized. The amplifier is then exported for fine-tuning and further processing.

Flow A

Fit a model to the S-parameters of the transistor at the desired dc operating voltage and current (not the bias point; the dc conditions at rated power should be used) and specify the I/V-plane load-line constraints. Verify the power performance of the model against the datasheet and non-linear model (if any).

Add the pads and air lines for the transistor in the Analysis Module.

Use the CIL command to set up the power matching problem and then solve it with the Impedance-Matching Module. Add the selected matching network to the circuit by using the relevant Export command.

Select the transistor and its pads and then use the MOT command to modify the transistor (add frequency selective resistive networks for stability, reducing VSWR gain-bandwidth constraints, gain levelling). Add the modification network to the circuit by using the relevant Export command.

Use the Interstage Impedance-Matching Command to set up the input matching problem and solve it with the Impedance-Matching Module. Export the selected matching network to the circuit file.

Select components on the schematic for optimization and optimize the circuit.

Flow B

Fit a model to the S-parameters of the transistor at the desired dc operating voltage and current (not the bias point; the dc conditions at rated power should be used) and specify the I/V-plane load-line constraints. Verify the power performance of the model against the datasheet and non-linear model (if any).

Add the pads for the transistor in the Device-Modification Module. Design a modification network to control the MAG (maximum available power gain) and to provide the output power required. Create an ADW circuit file for the transistor with its modification components.

Use the CIL command to set up the power matching problem and then solve it with the Impedance-Matching Module. Add the selected matching network to the circuit by using the relevant Export command.

Use the Interstage Impedance-Matching Command to set up the input matching problem and solve it with the Impedance-Matching Module. Export the selected matching network to the circuit file.

Select components on the schematic for optimization and optimize the circuit.