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A primary use of QUEST is intended
to be for extracting frequency dependent transmission line models for
use in SPICE circuit simulations.

The generation of SPICE parameters for transmission line models is becoming
increasingly important as clock speeds approach and exceed the 1 GHz frequency
range. At these speeds many parts of a chip such as data buses, clock
lines or power rails can no longer be modeled using simple RC networks.
QUEST takes this one step further, as not only does it include
inductance in the transmission line model but all the parameters in the
generated models are frequency dependent.

One example of why this is so important is the physical phenomena called
the "skin effect". This effect occurs at high frequencies in the interconnect
layers and in the silicon substrate itself. In the interconnect layers
at high frequencies the lines self-inductance of the lines may become
significant and result in current conduction away from the centre of the
interconnect thus changing its resistance. The "skin effect" in the silicon
substrate can significantly alter the resistance and conductance. These
effects will be illustrated by simulations performed by QUEST
later in this article.

2.0 Major Features of QUEST

The transmission line dimensions are extracted DIRECTLY
from the chip layout, ie from GDSII or CIF format files using an in-built
"Cut-Line" feature.

The transmission line structure is built using Process
information in combination with the "Cut-Line" feature described above.

The cross-section of the conductors can be "trapezoidal"
in shape, ie the side-walls do not have to be vertical, thus allowing
for more realistic processing effects.

The solver uses the "Fictitious Domain" method which
has been demonstrated by independent users to be one of the highest
speed solving methods around together with being very memory efficient.

QUEST takes full account of the effects
of substrate resistivity on the overlying conductors. This can have
a significant effect on the RLCG results.

3.0 Description of Input and Output Formats

The input information for QUEST has
three basic sets of inputs:

The mask layout in GDSII, CIF or Silvaco's layout
format from which a cutline will be taken defined by the user.

Process description file, used in conjunction with
the cutline to create the structure for analysis. An example of this
syntax is shown in Figure 1.

Command file to specify various user defined options
as to what to do with the data. An example of this syntax is shown in
Figure 2.

Figure 1. Command file of the process that
creates the two-dimensional structure.

Figure 2. Command file that controls which cutline to
operate on and the frequency range under study.

There are two basic outputs from QUEST:

transmission line model parameters

two-dimensional structure files

An example of the extracted transmission line parameters that are output
from QUEST are shown in Figure 3. All the parameters, R, L,
C and G, are frequency dependent. This file can be included into a spice
simulation by, for instance, SmartSpice.

Figure 3. Sample transmission line model
that is generated by QUEST.

The internal quantities solved for
by QUEST may also be saved to a two-dimensional structure
file. This file may be viewed by the graphical tool TonyPlot
for analysis. Figure 4 shows one example of which is a two-dimensional potential
contour.

Figure 4. Two-dimensional plot of potential contours.

4.0 Effect of High Frequency and Substrate
Conductivity on R, L and C.

In this example the transmission line test structure
shown in Figure 5 has been used to illustrate how the effect of the substrate
changes as the frequency is increased. The structure consists of a single
metal line over a substrate. The multi-insulator capability of QUEST
is required as this structure contains six different insulators.

Figure 5. Example test structure of
the transmission line to be studied.

The structure is analyzed for the frequency range of 1 to 40 GHz. Figures
6, 7 and 8 illustrate the variation of resistance, capacitance and inductance
as a function of frequency. In both experiments the substrate conductivity
was varied from a Sigma of 0.1 Siemens/m to 10,000 Siemens/m.

Figure 6. Variation of resistance as the frequency
is
increased for different substrate conductances.

Figure 7. Variation of capacitance with frequency
for different substrate conductivity.

Figure 8. Variation of inductance with frequency
for different substrate conductivity.

Different behavior is observed in the capacitance
and inductance, for different substrate conductivities and for different
frequencies (between 1GHz and 40 GHz). For the low conductivity substrate
the inductance and the resistance are constant over the frequency range
1-40GHz. However the capacitance C, shows a sharp decrease at high frequencies.
For high conductivity substrate two opposite behaviors are observed: the
C is constant but the inductance decreases with the frequency. These phenomena
could be explained as the following: at low frequencies and for low substrate
conductivities, the substrate behave as a conductor, which results in
a large value of the capacitance due to a decrease of the distance between
the line and the ground (which is the oxide thickness). At higher frequencies
the substrate behave as a dielectric, which results in a decrease of capacitance
value due to the increase of the distance between the line and the ground.
The resistance and the inductance however, remain nearly constant, since
there is no skin effect inside the substrate at low frequencies.

In case of high substrate conductivity, the electrical field is mostly
concentrated between the line and the top surface of the substrate, which
results in a large value of the capacitance, almost constant over

the frequency range 1-40GHz. However due to the high substrate conductivity
there is a significant skin effect inside the substrate. Currents are
concentrated on a small region on top of the substrate. Therefore the
resistance will increase and the inductance will decrease.

5.0 Conclusions

A unique new product QUEST has been introduced
which allows a designer to investigate the high frequency behavior of
lines within their layout such as clock, power, data lines, etc. With
this product a designer may produce a frequency dependent transmission
line model which may be used to investigate very accurately the operation
of the chip through SPICE simulations. A future article in the Simulation
Standard will address the application of models to SPICE design.