The abstract of the patent published by the U.S. Patent and Trademark Office states: "Bankruptcy relief calculator. A calculation program can make a relatively objective determination as to whether to file for relief from a bankruptcy stay relative to a particular account and associated collateral. Using historical statistics on bankruptcy filings as well as information about the collateral and depreciation of the collateral, the calculator can make an estimate of depreciation saved by the filing and compare that estimate to the cost of a filing. The calculator can then produce a recommendation as to whether to file for relief or to wait for the bankruptcy to be discharged in its normal course. The invention can be implemented via a stand-alone computing system or such a system interconnected with other platforms or data stores by a network, such as a corporate intranet, a local area network, or the Internet."
The patent application was filed on Nov. 23, 2004 (10/904,682). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,339&OS=8,352,339&RS=8,352,339
Written by Neha Bharti; edited by Jaya Anand.

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Livetv Assigned Patent
ALEXANDRIA, Va., Jan. 9 -- Livetv, Melbourne, Fla., has been assigned a patent (8,353,006) developed by Michael Lynch, Merritt Island, Fla., Josh Patterson, Raleigh, N.C., and Brandon Schmitt, Palm Bay, Fla., for "aircraft communications system using whitelists to control access and associated methods."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A communications system for an aircraft carrying personnel having personal electronic devices (PEDs) includes a wireless access device in the aircraft for the PEDs, and an aircraft server in the aircraft cooperating with the wireless access device for determining airborne validation of a ground server address entered via a corresponding PED. An air-to-ground transceiver in the aircraft cooperates with the aircraft server for communicating over an air-to-ground interface the airborne validated ground server address. A ground server on the ground receives the airborne validated ground server address over the air-to-ground interface, determines ground validation of the airborne validated ground server address, and provides ground access for the corresponding PED for which the entered ground server address has both airborne and ground validation."
The patent application was filed on May 6, 2009 (12/436,320). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,353,006&OS=8,353,006&RS=8,353,006
Written by Satyaban Rath; edited by Hemanta Panigrahi.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Methods and apparatuses are disclosed for direct access to cache memory. Embodiments include receiving, by a direct access manager that is coupled to a cache controller for a cache memory, a region scope zero command describing a region scope zero operation to be performed on the cache memory; in response to receiving the region scope zero command, generating a direct memory access region scope zero command, the direct memory access region scope zero command having an operation code and an identification of the physical addresses of the cache memory on which the operation is to be performed; sending the direct memory access region scope zero command to the cache controller for the cache memory; and performing, by the cache controller, the direct memory access region scope zero operation in dependence upon the operation code and the identification of the physical addresses of the cache memory."
The patent application was filed on Dec. 16, 2010 (12/969,651). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,646&OS=8,352,646&RS=8,352,646
Written by Arpi Sharma; edited by Anand Kumar.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Embodiments of the present invention address deficiencies of the art in respect to application data logging and provide a novel and non-obvious method, system and computer program product for capturing and logging application data. In an embodiment of the invention, a method for capturing and logging application data can include consulting both administrative permissions for capturing and logging application data, and also user permissions for capturing and logging application data. Subsequently, application data can be captured and logged only if permitted by the administrative permissions and the user permissions. In this regard, it can be determined from either or both of the permissions whether capturing and logging of application data is permitted generally, and also a type or portion of the application data that is permitted to be captured and logged."
The patent application was filed on Aug. 30, 2010 (12/871,797). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,353,014&OS=8,353,014&RS=8,353,014
Written by Satyaban Rath; edited by Hemanta Panigrahi.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Virtual machines are managed on the basis of data obtained from a management information database of a network switch having a plurality of Ethernet links coupled to compute nodes running a plurality of virtual machines. A management entity, such as a provisioning manager, determines the amount of network bandwidth being utilized through each of the first and second Ethernet links and the amount of network bandwidth being utilized by the Internet Protocol addresses attributable to each of the virtual machines. Accordingly, one of the virtual machines may be migrated from one compute node to another compute node coupled to an Ethernet link having a greater amount of unutilized network bandwidth. Virtual machines may be dynamically migrated in order to provide each virtual machine with a required amount of network bandwidth."
The patent application was filed on Dec. 3, 2009 (12/630,607). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,953&OS=8,352,953&RS=8,352,953
Written by Satyaban Rath; edited by Hemanta Panigrahi.

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International Business Machines Assigned Patent for Method, Apparatus and Program Storage Device for Providing Customizable, Immediate and Radiating Menus for Accessing Applications and Actions
ALEXANDRIA, Va., Jan. 9 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,352,881) developed by six co-inventors for a "method, apparatus and program storage device for providing customizable, immediate and radiating menus for accessing applications and actions." The co-inventors are David Frederick Champion, Durham, N.C., Timothy Andreas Meserth, Durham, N.C., Mark E. Molander, Cary, N.C., Patrick Gabor Nyeste, Raleigh, N.C., David Thomas Windell, Raleigh, N.C., and Jeffrey John Smith, Raleigh, N.C.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method, apparatus and program storage device for providing customizable, immediate and radiating menus for accessing applications and actions. Upon initiation of a predetermined user action, such as a right-click operation, a primary menu is displayed and a second radial menu is displayed proximate the primary menu with the cursor position at a predetermined location for minimizing cursor manipulation for selecting a menu item from the second radial menu."
The patent application was filed on March 8, 2007 (11/683,487). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,881&OS=8,352,881&RS=8,352,881
Written by Satyaban Rath; edited by Hemanta Panigrahi.

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International Business Machines Assigned Patent for Date and Time Simulation for Time-sensitive Applications
ALEXANDRIA, Va., Jan. 9 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,352,922) developed by Trent A. Gray-Donald, Ottawa, and Marc Warner Price, Wake Forest, N.C., for a "date and time simulation for time-sensitive applications."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A process for providing a simulated date and/or time to a time-sensitive application is disclosed herein. Such a process may include detecting the invocation of a time handler method configured to retrieve system time. Upon detecting the invocation, the contents of a call stack may be captured and analyzed to determine which requester method initiated the invocation. The process may then determine whether the requester method should receive a real or simulated system time. A real system time may be returned to the requester method in the event it should receive the real system time. A simulated system time may be returned to the requester method in the event it should receive the simulated system time. A corresponding apparatus and computer program product are also disclosed and claimed herein."
The patent application was filed on March 31, 2009 (12/415,908). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,922&OS=8,352,922&RS=8,352,922
Written by Satyaban Rath; edited by Hemanta Panigrahi.

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International Business Machines Assigned Patent for Early Defect Removal Model
ALEXANDRIA, Va., Jan. 9 -- International Business Machines, Armonk, N.Y., has been assigned a patent (8,352,904) developed by Brent Hodges, Raleigh, N.C., for an "early defect removal model."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method and a computer program product for modeling early defect removal are provided. The method includes selecting a first set of software development practices to model as a baseline plan, where each of the software development practices has an associated defect removal efficiency (DRE) and is associated with a development phase of a software development cycle. The method also includes selecting a second set of the software development practices to model as a to be plan, where each of the software development practices has a configurable DRE for the to be plan. The method further includes calculating defect removal in each of the development phases as a function of the DRE values, adjusting configuration settings for the to be plan to shift an amount of the defect removal earlier in the development phases of the to be plan as compared to the baseline plan, and outputting a graphical representation."
The patent application was filed on June 24, 2008 (12/144,889). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,904&OS=8,352,904&RS=8,352,904
Written by Satyaban Rath; edited by Hemanta Panigrahi.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "The present invention provides systems, methods, and computer program products for altering delivery of a piece by altering either the delivery address, mode of processing, and/or the mode of delivery. The invention provide an indicia associated with the piece of mail including instructions that are at least one of a different delivery address, mode of processing, or a mode of delivery than that originally designated for the piece of mail. During mail sorting and processing, the indicia associated with the piece of mail are analyzed. Either the delivery address, mode of processing, and/or mode of delivery currently associated with the piece of mail are altered to conform with the delivery address, mode of processing, and/or mode of delivery indicated by the indicia. In some embodiments, the indicia is altered by on a business parameter, such as a monetary value associated with the contents of the piece of mail."
The patent application was filed on Dec. 21, 2007 (11/962,992). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,52,383.PN.&OS=PN/83,52,383&RS=PN/83,52,383
Written by Amal Ahmed; edited by Jaya Anand.

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Saffron Technology Assigned Patent
ALEXANDRIA, Va., Jan. 9 -- Saffron Technology, Morrisville, N.C., has been assigned a patent (8,352,488) developed by James S. Fleming, Apex, N.C., and Yen-Min Huang, Cary, N.C., for "methods, systems and computer program products for providing a distributed associative memory base."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Systems, methods and computer program products are provided for a distributed associative memory base. Such methods may include providing a distributed memory base that includes a network of networks of associative memory networks. The memory base may include a network of associative memory networks, a respective associative memory network comprising associations among a respective observer entity and a plurality of observed entities that are observed by the respective observer entity. Ones of the associative memory networks are physically and/or logically independent from other ones of the associative memory networks. Methods include imagining associations from the associative memory base using a plurality of streaming queues that correspond to ones of a plurality of rows of ones of the associative memory networks."
The patent application was filed on May 7, 2010 (12/775,539). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=83,52,488.PN.&OS=PN/83,52,488&RS=PN/83,52,488
Written by Amal Ahmed; edited by Jaya Anand.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "Selections from a long list of elements on a Graphical User Interface (GUI) are presented. When a context window is presented for the selections, different cues are provided in the context window to provide feedback regarding the selections that are not in the current view, and to also facilitate rapid navigation to those selections on the GUI. Interaction with the GUI widgets within the context window, and interaction with the context window itself, facilitates the navigation toward the other selections that are not in the current view. Interaction with the GUI widgets also facilitates the preview of the selections that are not in the current view, thus making it easier to determine what has been selected without having to navigate to the view that contains those selections."
The patent application was filed on Sept. 25, 2009 (12/567,439). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,878&OS=8,352,878&RS=8,352,878
Written by Satyaban Rath; edited by Hemanta Panigrahi.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A method implemented in a computer infrastructure having computer executable code, includes detecting one of an absence of a virtual universe (VU) occurrence in a VU within a predetermined time period, a special event in the VU and a change of real world status from a previous real world status. Additionally, the method includes determining a VU asset of a VU resident relevant to the VU occurrence, the special event or the previous real world status. Further, the method includes performing an automated asset reduction of the VU asset based on the determining."
The patent application was filed on Dec. 4, 2008 (12/328,298). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,871&OS=8,352,871&RS=8,352,871
Written by Satyaban Rath; edited by Hemanta Panigrahi.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A system and method of providing data to a mashup application may involve receiving a request from a mashup application and supplying first data to the mashup application in response to the request. Mashup information can be received from the mashup application, wherein the mashup information indicates an inclusion of the first data with second data in the execution of the mashup application. The mashup information may be stored and analyzed to identify relationships between previously unrelated data."
The patent application was filed on Oct. 26, 2011 (13/281,791). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO2&Sect2=HITOFF&p=1&u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&r=1&f=G&l=50&co1=AND&d=PTXT&s1=8,352,541&OS=8,352,541&RS=8,352,541
Written by Arpi Sharma; edited by Anand Kumar.

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QUALCOMM Assigned Patent for Methods and Apparatus for Issuing Memory Barrier Commands in a Weakly Ordered Storage System
ALEXANDRIA, Va., Jan. 9 -- QUALCOMM, San Diego, has been assigned a patent (8,352,682) developed by Thomas Philip Speier, Raleigh, N.C., James Norris Dieffenderfer, Apex, N.C., and Thomas Andrew Sartorius, Raleigh, N.C., for "methods and apparatus for issuing memory barrier commands in a weakly ordered storage system."
The abstract of the patent published by the U.S. Patent and Trademark Office states: "Efficient techniques are described for enforcing order of memory accesses. A memory access request is received from a device which is not configured to generate memory barrier commands. A surrogate barrier is generated in response to the memory access request. A memory access request may be a read request. In the case of a memory write request, the surrogate barrier is generated before the write request is processed. The surrogate barrier may also be generated in response to a memory read request conditional on a preceding write request to the same address as the read request. Coherency is enforced within a hierarchical memory system as if a memory barrier command was received from the device which does not produce memory barrier commands."
The patent application was filed on May 26, 2009 (12/471,652). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,352,682.PN.&OS=PN/8,352,682&RS=PN/8,352,682
Written by Kusum Sangma; edited by Anand Kumar.

The abstract of the patent published by the U.S. Patent and Trademark Office states: "A processor is operative to execute two or more instruction sets, each in a different instruction set operating mode. As each instruction is executed, debug circuit comparison the current instruction set operating mode to a target instruction set operating mode sent by a programmer, and outputs an alert or indication in they match. The alert or indication may additionally be dependent upon the instruction address following within a predetermined target address range. The alert or indication may comprise a breakpoint signal that halts execution and/or it is output as an external signal of the processor. The instruction address at which the processor detects a match in the instruction set operating modes may additionally be output. Additionally or alternatively, the alert or indication may comprise starting or stopping a trace operation, causing an exception, or any other known debugger function."
The patent application was filed on Aug. 9, 2006 (11/463,379). The full-text of the patent can be found at http://patft.uspto.gov/netacgi/nph-Parser Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=8,352,713.PN.&OS=PN/8,352,713&RS=PN/8,352,713
Written by Kusum Sangma; edited by Anand Kumar.