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In its Final Written Decision, the Board determined that Petitioner had shown by a preponderance of the evidence that claims 1 and 3-6 of the ’371 patent are unpatentable. The Board also determined, however, that Petitioner had not demonstrated that claims 2 and 7-10 are unpatentable. The ’371 patent “is directed to on-chip circuits for the testing and diagnosis of problems in an integrated circuit, with the circuits used to observe the internal workings thereof.” Petitioner challenged the claims under two grounds—anticipation by Levine of claims 1-3 and 5-10 and obviousness in view of Levine and Whetsel of claim 4.

The Board first addressed claim construction under the broadest reasonable interpretation. The Board adopted its preliminary constructions from its Decision on Institution because the parties did not disagree with them.

The Board found that Levine anticipated claims 1, 3, 5, and 6, but not claims 2 and 7-10. Patent Owner had argued that “Levine does not disclose 1) a service processor unit comprising a buffer memory or 2) a multiplicity of selectable probes.” First, the Board rejected Patent Owner’s contention that a reference needs to use the same naming conventions as found in the challenged claim. Further, because certain Patent Owner arguments made at the oral hearing could not be found in Patent Owner’s Response or expert’s testimony, the Board gave no weight to such assertions. And where Patent Owner’s expert provided testimony that the Board did credit, it was still not persuasive because “it does not consider the other sections of Levine discussed above, which are persuasive to demonstrate that Levine considered multiple embodiments, with some memory registers specifically inside the performance monitor.” Second, the Board was not persuaded that a multiplexer of Levine does not meet the “multiplicity of selectable probes” limitation.

Regarding claim 2, the Board was “persuaded by Patent Owner’s argument that an interface and a port are not synonymous” and that “one of ordinary skill in the art would have identified a port as having a known configuration, such as used in the specification [], as opposed to ‘interface,’ that need not have a known configuration.” As such, the Board was not persuaded that Levine discloses serial or parallel I/O ports as required by claim 2.

Regarding claims 7-10, the Board found that the “system bus” or “system bus interface” limitations were not met by Levine. The Board did not agree with Petitioner that “any arbitrary group of signal lines is equivalent to a bus.” Moreover, the Board rejected Petitioner’s argument “that a bus should be identified by the kinds of signals that are carried by the bus:” “Given that the element of claim 7, i.e., ‘a system bus,’ is an element of an apparatus, we are concerned only with its structure and not the functions that it could implement, other than those specifically recited in the claims.” Levine, therefore, does not anticipate claims 7-10.

The Board next addressed the second ground, obviousness over Levine and Whetsel of claim 4. The Board was persuaded that “the evaluation of analog signals would have been seen as useful in light of Whetsel” and that “both provide embedded circuits that capture and analyze signals, which is sufficient rationale to consider the combination of Levine and Whetsel.” “One of ordinary skill in the art need not consider circuit testing and software performance monitoring to be equivalent to consider the utility of applying Whetsel’s analog probes into the system of Levine.”

In sum, the Board found claims 1 and 3-6 unpatentable and claims 2 and 7-10 not unpatentable.

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