Patent application title: Electronic ballast with high power factor

Abstract:

This invention provides an electronic ballast for a fluorescent lamp,
including a rectifier for converting an alternating current input voltage
into a direct current output voltage, and a circuit including a combined
power factor correction (PFC) stage and an inverter, wherein the PFC
stage and the inverter share a switch. Also provided is a controller for
an electronic ballast, including a duty ratio controller that controls a
duty ratio of a switch of the ballast, and means for adjusting the duty
ratio according to a nonlinear function, so that an arc is sustained
across the lamp. The controller and the ballast allow dimming of the
fluorescent lamp while maintaining a high power factor.

Claims:

1. An electronic ballast circuit for a fluorescent lamp, comprising:a
rectifier for converting an alternating current input voltage into a
direct current output voltage; anda circuit including a combined power
factor correction (PFC) stage and an inverter;wherein the PFC stage and
the inverter share a switch.

2. The electronic ballast circuit of claim 1, wherein the PFC stage
includes a single ended primary inductor converter (SEPIC).

3. The electronic ballast circuit of claim 1, wherein the inverter is a
resonant inverter.

4. The electronic ballast circuit of claim 1, wherein the inverter is a
current fed inverter.

5. The electronic ballast circuit of claim 4, wherein the current fed
inverter includes a C-L-L resonant circuit.

6. The electronic ballast circuit of claim 1, wherein the shared switch is
the only switch.

7. The electronic ballast circuit of claim 1, including means for
operating the shared switch at a selected duty ratio.

27. A method for operating a fluorescent lamp, comprising:converting an
alternating current input voltage into a direct current output
voltage;connecting the direct current output voltage to a circuit
including a combined power factor correction (PFC) stage and an inverter;
andconnecting an output of the circuit to the fluorescent lamp;wherein
the PFC stage and the inverter share a switch.

28. The method of claim 27, including using a SEPIC for the PFC stage.

29. The method of claim 27, including using a resonant inverter for the
inverter.

30. The method of claim 27, including using a current fed inverter for the
inverter.

31. The method of claim 30, wherein the current fed inverter includes a
C-L-L resonant circuit.

32. The method of claim 27, wherein the shared switch is the only switch.

33. The method of claim 27, including operating the shared switch at a
selected duty ratio.

34. The method of claim 33, including varying the duty ratio.

35. The method of claim 34, including varying the duty ratio in accordance
with the input voltage.

36. The method of claim 33, including adjusting the duty ratio according
to a nonlinear function, so that an arc is sustained across the lamp
during changes in supply voltage.

37. The method of claim 27, including filtering the input voltage with an
EMI filter.

55. The fluorescent lamp of claim 52, wherein the fluorescent lamp is a
CFL.

56-68. (canceled)

Description:

RELATED APPLICATIONS

[0001]This application claims the benefit of the filing date of U.S.
Provisional Patent Application No. 61/129,251, filed on 13 Jun. 2009, and
of U.S. Provisional Patent Application No. 61/202,757, filed on 1 Apr.
2009, the contents of which are incorporated herein by reference in their
entirety.

FIELD OF THE INVENTION

[0002]This invention relates to an electronic ballast for a fluorescent
lamp, and to a dimmer controller for a an electronic ballast. In
particular, this invention relates to an electronic ballast and a dimmer
controller with high power factor and compact size, suitable for a
compact fluorescent lamp.

BACKGROUND OF THE INVENTION

[0003]Fluorescent lighting is widely used in residential and commercial
applications. Because a fluorescent lamp consumes only one-third of the
power that is dissipated in an incandescent lamp of equivalent light
output, and its lifetime is 1000 times that of an incandescent lamp [1],
it conserves energy and reduces the energy cost of lighting.

[0004]The development of compact fluorescent lamps (CFLs) has increased
the use of fluorescent lighting in residential applications. The key
component of a CFL is the high frequency electronic ballast that provides
proper lamp ignition and lamp current stabilization. It is known that
high frequency electronic ballasts operating at >25 kHz provide more
desirable performance than magnetic ballasts in fluorescent lamps, as
they: (1) reduce the ballast volume; (2) increase efficiency by at least
20%; (3) eliminate light flickering; (4) implement advanced dimming
control with great flexibility. However, like other electronic
appliances, the harmonics of the line current from the fluorescent lamp
must comply with the IEC 1000-3-2 standard [2] when the lamp power
exceeds 25 W.

[0005]In a conventional electronic ballast as shown in FIG. 1A, a diode
rectifier connected across a DC-link capacitor with a resonant inverter
produces a poor power factor (e.g., less than 0.6), and the harmonics
content of the line current exceed the limits of the standard. A simple
way to correct the power factor problem is to insert a power factor
correction (PFC) circuit between the rectifier and the inverter as shown
in FIG. 1B so that the shape of the line current follows the sinusoidal
line voltage and a high power factor can be achieved at the input.
However, this kind of circuit configuration usually results in a high
cost. Moreover, the large size of the circuit is incompatible with the
size of a CFL.

[0006]Currently-available technology cannot achieve low cost, small size,
high power factor, and dimmability in fluorescent lamps. In particular,
dimming and power factor have generally been sacrificed in consumer grade
lamps in favour of low cost and small size.

SUMMARY OF THE INVENTION

[0007]One aspect relates to an electronic ballast circuit for a
fluorescent lamp, comprising: a rectifier for converting an alternating
current input voltage into a direct current output voltage; and a circuit
including a combined power factor correction (PFC) stage and a resonant
inverter; wherein the PFC stage and the resonant inverter share a single
switch.

[0008]In one embodiment the PFC stage may include a single ended primary
inductor converter (SEPIC). The electronic ballast circuit may further
comprise an EMI filter.

[0009]Another aspect relates to a dimmer controller. The dimmer controller
may be for use with a standard leading edge dimmer or trailing edge
dimmer, or a resistive dimmer. The dimmer controller may be for use with
a triac dimmer, a thyristor dimmer, or a transistor dimmer. The dimmer
controller may include a duty ratio controller. The fluorescent lamp may
be a compact fluorescent lamp (CFL).

[0010]The electronic ballast circuit may further comprise a dimmer
controller.

[0011]Another embodiment relates to an electronic ballast circuit for a
fluorescent lamp, comprising: a rectifier for converting an alternating
current input voltage into a direct current output voltage; and a circuit
including a combined single ended primary inductor converter (SEPIC)
power factor correction (PFC) stage and a resonant inverter; wherein the
PFC stage and the resonant inverter share a single switch.

[0012]Another aspect relates to a method for operating a fluorescent lamp,
comprising: converting an alternating current input voltage into a direct
current output voltage; connecting the direct current output voltage to a
circuit including a combined power factor correction (PFC) stage and a
resonant inverter; and connecting an output of the circuit to the
fluorescent lamp; wherein the PFC stage and the resonant inverter share a
single switch.

[0013]In one embodiment, the PFC stage may include a single ended primary
inductor converter (SEPIC).

[0014]The method may further comprise filtering the alternating current
input voltage with an EMI filter. The method may further comprise dimming
the fluorescent lamp. Dimming may comprise connecting a dimmer controller
to the circuit for use with a standard leading edge dimmer or trailing
edge dimmer. The fluorescent lamp may be a compact fluorescent lamp
(CFL).

[0015]Another embodiment relates to a method for operating a fluorescent
lamp, comprising: converting an alternating current input voltage into a
direct current output voltage; connecting the direct current output
voltage to a circuit including a combined single ended primary inductor
converter (SEPIC) power factor correction (PFC) stage and a resonant
inverter; and connecting an output of the circuit to the fluorescent
lamp; wherein the PFC stage and the resonant inverter share a single
switch.

[0016]Another aspect of the invention relates to a single-stage,
single-switch electronic ballast topology using a single ended primary
inductor converter (SEPIC) power factor corrector that is integrated with
a single switch current fed inverter. An electronic ballast circuit as
described herein is compact and minimizes components in the ballast power
circuit. In one embodiment the switch is not connected in parallel with
the resonant circuit, so the resonant current does not flow through the
switch, resulting in lower current stress across the switch and lower
switch conduction loss.

[0017]Another aspect relates to an electronic ballast circuit for a
fluorescent lamp, comprising: a rectifier for converting an alternating
current input voltage into a direct current output voltage; and a circuit
including a combined power factor correction (PFC) stage and an inverter;
wherein the PFC stage and the inverter share a switch.

[0018]The PFC stage may include a single ended primary inductor converter
(SEPIC). The inverter may be a resonant inverter. The inverter may be a
current fed inverter. The current fed inverter may include a C-L-L
resonant circuit. In some embodiments, the shared switch may be the only
switch. The electronic ballast circuit may include means for operating
the shared switch at a selected duty ratio. The duty ratio may be
variable. The duty ratio may be variable in accordance with a line
voltage applied to the electronic ballast circuit. The electronic ballast
circuit may further comprise an EMI filter. The fluorescent lamp may be a
compact fluorescent lamp (CFL).

[0019]Another aspect relates to a dimmer controller for an electronic
ballast for a fluorescent lamp, comprising: a duty ratio controller that
controls a duty ratio of a switch; and means for adjusting the duty ratio
according to a nonlinear function, so that an arc is sustained across the
lamp during dimming. Application of a high duty ratio signal results in
an arc being sustained across the lamp during dimming or brownout. The
means for adjusting the duty ratio may include a multiplier. The dimmer
controller may be for use with a standard dimmer. The standard dimmer may
be a triac dimmer. The dimmer controller may include a single output for
driving a single switch of an electronic ballast circuit. The dimmer
controller may include two or more outputs for driving two or more
switches of an electronic ballast circuit. The fluorescent lamp is a CFL.

[0020]Another aspect relates to a combination including an electronic
ballast circuit and a dimmer controller for a fluorescent lamp,
comprising: a rectifier for converting an alternating current input
voltage into a direct current output voltage; a circuit including a
combined power factor correction (PFC) stage and an inverter, wherein the
PFC stage and the inverter share a switch; a duty ratio controller that
controls a duty ratio of the switch; and means for adjusting the duty
ratio according to a nonlinear function, so that an arc is sustained
across the lamp during dimming.

[0021]The PFC stage may include a SEPIC. The inverter may be a resonant
inverter. The inverter may be a current fed inverter. The current fed
inverter may include a C-L-L resonant circuit. The shared switch may be
the only switch. The combination may further comprise an EMI filter. The
dimmer controller may be for use with a standard dimmer. The standard
dimmer may be a triac dimmer. The fluorescent lamp may be a CFL.

[0022]Another aspect relates to a controller for an electronic ballast for
a fluorescent lamp, comprising: a duty ratio controller that controls a
duty ratio of a switch; and means for adjusting the duty ratio according
to a nonlinear function, so that an arc is sustained across the lamp.
Application of a high duty ratio signal results in an arc being sustained
across the lamp during low line voltage or brownout.

[0023]Another aspect relates to a combination of a controller and an
electronic ballast for a fluorescent lamp, comprising: a rectifier for
converting an alternating current input voltage into a direct current
output voltage; a circuit including a combined power factor correction
(PFC) stage and an inverter, wherein the PFC stage and the inverter share
a switch; a duty ratio controller that controls a duty ratio of the
switch; and means for adjusting the duty ratio according to a nonlinear
function, so that an arc is sustained across the lamp. The PFC stage may
include a SEPIC. The inverter may be a resonant inverter. The inverter
may be a current fed inverter. The current fed inverter may include a
C-L-L resonant circuit. The shared switch may be the only switch. The
combination may further comprise an EMI filter. The dimmer controller may
be for use with a standard dimmer. The standard dimmer may be a triac
dimmer or a transistor dimmer. The fluorescent lamp may be a CFL.

[0024]Another aspect relates to a method for operating a fluorescent lamp,
comprising: converting an alternating current input voltage into a direct
current output voltage; connecting the direct current output voltage to a
circuit including a combined power factor correction (PFC) stage and an
inverter; and connecting an output of the circuit to the fluorescent
lamp; wherein the PFC stage and the inverter share a switch.

[0025]The method may include using a SEPIC for the PFC stage. The method
may include using a resonant inverter for the inverter. The method may
include using a current fed inverter for the inverter. The current fed
inverter may include a C-L-L resonant circuit. The shared switch may be
the only switch. The method may include operating the shared switch at a
selected duty ratio. The method may include varying the duty ratio. The
method may include varying the duty ratio in accordance with the input
voltage. The method may include filtering the input voltage with an EMI
filter. The fluorescent lamp may be a CFL.

[0026]Another aspect relates to a method for operating a fluorescent lamp,
comprising: using a duty ratio controller to control a duty ratio of at
least one switch that provides power to the lamp; and adjusting the duty
ratio according to a nonlinear function, so that an arc is sustained
across the lamp during dimming. Application of a high duty ratio signal
results in an arc being sustained across the lamp during dimming or
brownout.

[0027]Adjusting the duty ratio according to a nonlinear function may
include using a multiplier. The method may comprise controlling a duty
ratio of a single switch that provides power to the lamp. The method may
comprise using a standard light dimmer. The standard dimmer may be a
triac dimmer, a thyristor dimmer, or a transistor dimmer. The dimmer may
be a resistive dimmer. The fluorescent lamp may be a CFL.

[0028]Another aspect relates to a method for operating a fluorescent lamp,
comprising: operating a switch of an electronic ballast circuit including
a combined power factor correction (PFC) stage and an inverter according
to a duty ratio; and controlling the duty ratio of the switch so as to
control lamp output power.

[0029]Controlling the duty ratio of the switch may include adjusting the
duty ratio according to a nonlinear function and applying a high duty
ratio signal to the duty ratio controller to sustain an arc across the
lamp during dimming. Adjusting the duty ratio according to a nonlinear
function may include using a multiplier. The switch may be shared between
the PFC stage and the inverter. The PFC stage may be a SEPIC. The
inverter may be a resonant inverter. The method may comprise using a
standard light dimmer. The standard dimmer may be a triac dimmer, a
thyristor dimmer, or a transistor dimmer. The dimmer may be a resistive
dimmer. The fluorescent lamp may be a CFL.

[0030]Another aspect relates to a fluorescent lamp comprising an
electronic ballast as described herein, a dimmer controller as described
herein, or a controller as described herein, or a combination including
an electronic ballast and a dimmer controller or controller as described
herein. The fluorescent lamp may be a CFL.

[0031]Another aspect relates to a controller for an electronic ballast for
a fluorescent lamp, comprising: a duty ratio controller that controls a
duty ratio of a switch of the ballast; and means for adjusting the duty
ratio according to a nonlinear function, so that an arc is sustained
across the lamp during a change in supply voltage.

[0032]The means for adjusting the duty ratio may include a multiplier. The
controller may include a single output for driving a single switch of the
ballast circuit. The controller may include two or more outputs for
driving two or more switches of the ballast circuit.

[0033]Another aspect relates to a dimmer for a fluorescent lamp,
comprising: means for generating and outputting a high frequency signal;
and means for changing the frequency of the high frequency signal. The
output high frequency signal may be fed to a controller over the same
power lines that supply AC power to the electronic ballast circuit.
Alternatively, the output high frequency signal may be fed to a
controller over separate conductors. The dimmer may further include means
for converting the high frequency signal into a DC voltage.

[0034]Another aspect relates to a controller for an electronic ballast of
a fluorescent lamp, comprising: a converter for converting the output
high frequency signal of the dimmer described above to a DC voltage; a
duty ratio controller that controls a duty ratio of a switch of the
ballast; and means for adjusting the duty ratio according to a nonlinear
function, so that an arc is sustained across the lamp during dimming of
the fluorescent lamp. The means for adjusting the duty ratio includes a
multiplier. The controller may include a single output for driving a
single switch of the ballast circuit. The controller may include two or
more outputs for driving two or more switches of the ballast circuit.

[0035]Another aspect relates to a method for operating a fluorescent lamp,
comprising: varying the frequency of a high frequency signal; generating
a DC voltage relative to the frequency of the high frequency signal; and
using the DC voltage to adjust the duty ratio of a switch that provides
power to the fluorescent lamp.

BRIEF DESCRIPTION OF THE DRAWINGS

[0036]To show more clearly how the invention may be carried into effect,
embodiments of the invention will now be described, by way of example,
with reference to the accompanying drawings, wherein:

[0037]FIGS. 1A and 1B are schematic diagrams of a prior art electronic
ballast for a compact fluorescent lamp (CFL) without power factor
correction (PFC) (FIG. 1A); and with PFC (FIG. 1B);

[0038]FIG. 2A is a diagram of a single switch electronic ballast according
to one embodiment of the invention;

[0039]FIGS. 2B and 2C are diagrams of examples of control schemes for the
switch of the embodiment of FIG. 2A;

[0040]FIG. 2D shows an alternative embodiment of the circuit of FIG. 2A in
which inductors Lr and Lp are arranged as a centre-tapped
inductor or an autotransformer;

[0041]FIG. 2E shows an electronic ballast according to an alternative
embodiment;

[0042]FIG. 2F shows an electronic ballast according to another alternative
embodiment;

[0043]FIG. 3 shows operation of the embodiment of FIG. 2A over four
intervals;

[0044]FIG. 4 shows input waveforms at the power factor correction side of
the embodiment of FIG. 2A;

[0045]FIG. 5 shows key waveforms of the embodiment of FIG. 2A;

[0046]FIG. 6 shows the results of a simulation based on the embodiment of
FIG. 2A, wherein FIG. 6A shows the line current, FIG. 6B shows the
simulated output current (upper trace) and PFC inductor current (lower
trace), and FIG. 6C shows the low frequency component of the simulated
DCM input inductor current;

[0047]FIG. 7 is a schematic diagram of an electronic ballast circuit built
according to the embodiment of FIG. 2A;

[0048]FIG. 8 shows performance waveforms of the circuit of FIG. 7 used
with a 26 W CFL, wherein FIG. 8A shows the lamp current and voltage, FIG.
8B shows the lamp current and discontinuous conduction mode (DCM)
inductor current, FIG. 8C shows the line current, FIG. 8D shows the
switch current and voltage, and FIG. 8E shows the switch current voltage
waveforms;

[0049]FIG. 9A is a diagram of a dimmer controller for a fluorescent lamp
according to one embodiment;

[0050]FIG. 9B is a diagram of a combination comprising an electronic
ballast based on the embodiment of FIG. 2A and a dimmer controller based
on the embodiment of FIG. 9A;

[0051]FIG. 10 is a schematic diagram of an electronic ballast circuit
built according to the embodiment of FIG. 9B;

[0052]FIGS. 11A and 11B show the line current of an electronic ballast
circuit built according to the embodiment of FIG. 9B and used with a 26 W
CFL, at the rated power of the CFL (FIG. 1A) and at 10% of the rated
power of the CFL (FIG. 1B);

[0053]FIG. 12A is a block diagram of a dimmer controller according to
another embodiment;

[0054]FIG. 12B is a block diagram of a combination comprising an
electronic ballast and a dimmer controller according to another
embodiment;

[0055]FIG. 12C is a block diagram of a dimmer controller according to
another embodiment;

[0056]FIG. 12D is a block diagram of an example of a two switch electronic
ballast using a conventional half bridge inverter;

[0057]FIG. 12E is a block diagram of a controller without a dimming
function, for an electronic ballast, according to an alternative
embodiment; FIGS. 13A and 13B show the line voltage and current for a
commercially-available 15 W dimmable CFL at full power and at the lowest
dimming level, respectively;

[0058]FIGS. 14A and 14B show the line current for a 13 W CFL at full power
and at the lowest dimming level, respectively, using the embodiment of
FIG. 12B and a trailing edge dimmer;

[0059]FIGS. 14C and 14D show the line current for a 13 W CFL at full power
and at a partial dimming level, respectively, using the embodiment of
FIG. 12B and a leading edge dimmer;

[0060]FIG. 15 is a plot comparing the power factor of a
commercially-available dimmable 15 W CFL and a 13 W CFL used with the
embodiment of FIG. 12B, over the dimming range;

[0061]FIG. 16 is a plot comparing the efficiency of a
commercially-available dimmable 15 W CFL and a 13 W CFL used with the
embodiment of FIG. 12B, over the dimming range;

[0062]FIG. 17A is a block diagram of an embodiment of a dimmer according
to an aspect of the invention, shown with an electronic ballast and a
dimmer; and

[0063]FIG. 17B is a schematic diagram of an embodiment of a dimmer
according to an aspect of the invention.

DETAILED DESCRIPTION OF EMBODIMENTS

[0064]Single-stage resonant inverters combining a PFC converter and a
resonant inverter in one stage to provide a cost-effective design
approach in T5 and T8 fluorescent lamps are proposed in [3]-[6]. To
further reduce the size and cost of the ballast power circuit,
single-switch electronic ballasts integrating a class E resonant inverter
[10] with the PFC circuit are proposed in [7]-[9], [13]. By operating the
PFC stage as either a boost or a buck-boost converter in discontinuous
conduction mode (DCM), a very high power factor with desirable harmonics
is achieved at the input. However, the main disadvantage of a class E
resonant inverter is the high peak voltage and current associated with
the switch. The voltage across the switch is r times the input DC voltage
of the inverter [9]. Hence, a high voltage MOSFET and/or a heat sink to
cool down the temperature in the ballast power circuit may be required.

[0065]One aspect of the invention relates to an electronic ballast
circuit, also referred to herein as an "electronic ballast", a "ballast
circuit", and a "power circuit", that overcomes the large size, high
cost, and low efficiency problems of prior ballasts. An electronic
ballast circuit as described herein is simple, has a high power factor,
and is compact, and is therefore suitable for use in all fluorescent
lighting applications. Because the electronic ballast circuit is compact,
it is suitable for use with compact fluorescent lamps (CFLs). However,
the electronic ballast circuit is also suitable for use with any other
fluorescent lamp. For example, it may replace inductive/magnetic ballasts
typically used in commercial fluorescent lighting applications in new
installations as well as in existing installations (e.g., retro-fits).

[0066]In particular, as fluorescent lighting becomes more widespread,
largely through use of CFLs, the power factor of low wattage fluorescent
lamps (e.g., less than 25 W) becomes more important. That is, although
the IEC1000-3-2 standard [2] for harmonics of the line current applies to
a fluorescent lamp of 25 W or more, simultaneous use of multiple low
wattage lamps suggests that the standard should also apply to low wattage
lamps. Use of the embodiments described herein ensures a high power
factor with any fluorescent lamp or combination of fluorescent lamps.

[0067]An electronic ballast circuit as described herein may be provided
alone, for use with a fluorescent lamp, or it may be provided as part of
a fluorescent lamp. For example, when provided as part of a fluorescent
lamp, the electronic ballast circuit may be integrated into the lamp,
such as in the case of a CFL. An electronic ballast circuit as described
herein may compensate for brownout conditions (i.e., a line voltage
between power out and normal or full line voltage) as well as avoid
glow-discharge mode operation of the fluorescent lamp.

[0068]The electronic ballast circuit may include a power factor correction
stage and an inverter. The power factor correction stage may be of a
topology selected from, but not limited to, single ended primary inductor
converter, boost, buck-boost, and flyback. The inverter may be a resonant
inverter, such as, for example, a current fed inverter. The inverter may
be a single-switch inverter.

[0069]In one embodiment the electronic ballast includes a combined power
factor correction (PFC) stage and a resonant inverter, using a shared
switch. That is, a switch is shared between the PFC stage and the
inverter. The shared switch may be the only switch, as in embodiments
where a single-switch power inverter, such as a resonant inverter, is
used. Relative to prior designs, such an embodiment of the electronic
ballast circuit eliminates the need for two or more switches in the power
circuit, and accordingly the switch driver circuit is simplified with the
elimination of isolation devices. Further, the high magnitude resonant
current is prevented from flowing through the switch. The switch
conduction loss is thus significantly reduced and high efficiency
maintained in the power circuit.

[0070]A single switch electronic ballast according to one embodiment is
shown in the schematic diagram of FIG. 2A. This embodiment is based on a
cascade combination of a single ended primary inductor converter (SEPIC)
for the PFC stage and a single switch current fed inverter. Other types
of converters may of course be used, such as, for example, boost (see
FIG. 2E) or flyback (see FIG. 2F). Such alternative converters may reduce
the number of circuit elements and complexity of the electronic ballast.
Other converters, such as buck-boost, may also be used, however, use of a
converter that employs more than one switch would increase the
complexity, cost, and size of the electronic ballast circuit.

[0071]The SEPIC may be used for the PFC stage in this embodiment because:
(1) it does not require a large size high-voltage DC link capacitor (in
contrast with designs using a boost PFC); (2) unlike a discontinuous
conduction mode (DCM) operating boost converter, the SEPIC converter
DC-link capacitor is not subjected to high voltage stress in order to
achieve a high power factor [11]; (3) the output DC link voltage polarity
is not inverted (in contrast with designs employing a buck-boost
converter), which allows simpler circuit configuration and input EMI
filter designs [12]. Further, relative to prior designs based on boost
and buck-boost converters, the SEPIC does not include an inductor in the
ground path (as can be seen in FIG. 2A), which reduces noise and allows
for fewer components in the EMI filter, which allows for smaller size of
the ballast circuit. When the SEPIC operates in DCM with a fixed
switching frequency, the peak of the DCM inductor current also follows
the rectified sinusoidal envelope and a close-to unity power factor is
achieved at the input. As a result, a SEPIC converter has all the
advantages of boost and buck-boost converters, and only requires an extra
inductor and capacitor.

[0072]Referring to FIG. 2A, the line voltage is connected to optional an
EMI filter including Li and Ci, and then to a rectifier
circuit. As an alternative to the EMI filter of FIG. 2A, a common mode
EMI filter such as that shown in FIG. 2E or 2F may also be used. That is,
the EMI filters of FIG. 2A and of FIGS. 2E and 2F may be interchanged.
The output of the rectifier feeds the SEPIC circuit. The SEPIC includes
inductors L1, L2, capacitors C1, C2, diodes Db,
Din, and a switch M1. The switch is shown with its intrinsic
drain-source capacitor. In some embodiments the input EMI filter Li,
Ci may be eliminated by properly selecting appropriate (e.g.,
smaller) values of L2 and C1. This may simplify the design of
the entire circuit.

[0073]The current fed inverter includes inductors Lin, Lr,
Lp, capacitor Cr, diode D1, and the switch M1.
Capacitor Cr and inductors Lin, Lr form a C-L-L resonant
circuit. An alternative arrangement of the inverter is shown in FIG. 2D,
wherein inductors Lr and Lp are arranged as a centre-tapped
inductor or an autotransformer. It is noted that the arrangement of FIG.
2D may be used with the electronic ballast circuits of FIGS. 2A, 2E, and
2F. The switch M1 is operated by providing a suitable signal to the
control or gate terminal. Thus, as can be seen, the switch is shared
between the SEPIC circuit and the inverter circuit.

[0074]The switch may be a MOSFET or other suitable switching device, such
as, for example, IGBT (insulated gate bipolar transistor), or MCT (MOS
controlled thyristor). A bipolar transistor may also be used, with
appropriate driver circuit. Selection of a suitable switching device may
depend on factors such as power handling capability of the switch, as
will be apparent to one of ordinary skill in the art.

[0075]Operation of the switch may be achieved many different ways, and
includes setting the duty ratio of the switch. For example, in one
embodiment the switch may be operated at a fixed duty ratio by providing
a fixed pulse signal to the gate terminal. Such an embodiment is shown in
FIG. 2B. This embodiment may provide stable operation of the ballast
circuit at normal line voltages and also during brownout conditions with
proper selection of the duty ratio. The duty ratio may be selected for,
e.g., worst-case brownout conditions, characterized by, e.g., a selected
percentage drop in the line voltage. The duty ratio may be calculated
using equations (15) and (16) below, solving for d.

[0076]An example of how the switch may be operated with a variable duty
ratio is shown in the embodiment of FIG. 2C. This embodiment tracks the
line voltage and provides a variable duty ratio signal to the switch so
as to compensate for fluctuations in the line voltage, including
brownout. This embodiment uses the DC voltage from the ballast circuit
and a reference voltage to generate an error signal which determines the
duty ratio. This embodiment may compensate for a line low voltage and
avoid glow-discharge mode operation. In a further embodiment the
reference voltage may be adjusted to compensate for brownout and/or to
avoid glow-discharge mode operation. A variable reference voltage may be
used for this purpose.

Description of Operation

[0077]Operation of the embodiment of FIG. 2A is described below with
reference to FIG. 3 which shows the operating stages (intervals 1 to 4),
with key waveforms shown in FIG. 4. FIG. 5 shows operating waveforms at
the PFC side to achieve high power factor in DCM.

[0078]Let the input line voltage be: vs(t)=Vp sin(2πfLt)
with Vp=peak line voltage and fL=line frequency; the average
current (is,avg(t)) drawn from the line is given in (1), where
Leq=(L1L2)/(L1+L2) [12], Ts=switching
period and d=duty ratio. It is observed from (1) that is,avg(t) is
pure sinusoidal and is in phase with vs(t). Hence, a very high power
factor is achieved at the input. The input average power equation is
derived from (1) as given in (2).

[0079][interval 1]: M1 is on, iL rises linearly, iin begins
to increase slowly due to the presence of Lin so that close to
zero-current switching is provided at the turn-on of the MOSFET. The
total current flowing through the switch is ids.

[0080][interval 2]: M1 is off, iL decreases linearly. Current
iin flows through Coss and decreases until it drops to zero.

[0081][interval 3]: iL continues to decrease linearly until it drops
to zero, then iL enters the discontinuous conduction period.

[0082][interval 4]: all the diodes are off and the resonant circuit
continues to deliver the required energy to the output.

[0083]The corner frequency (fr) and the quality factor equation of
the C-L-L resonant inverter are determined by (3) and (4) respectively.
As the voltage generated across Cr is a close-to sinusoidal
waveform, proper lamp current balancing is ensured at the output of the
inverter circuit. If a high enough quality factor (Q) is chosen in the
resonant circuit, then close-to-sinusoidal waveforms can be achieved at
the output and fundamental approximation can be used in the linear
analysis of the resonant circuit. During lamp ignition, the lamp
resistance (Rlamp) is infinite and the resonant circuit becomes a
parallel L-C circuit. The output voltage of the lamp during this phase is
given in (5). By solving (5), the corresponding ignition frequency may be
obtained as given in (6), where LT=Lr+Lp and Iin is
the amplitude of iin.

[0084]After the lamp is ignited, the gas within the lamp becomes ionized
and the lamp resistance decreases to a few hundred ohms. The resonant
circuit now becomes a C-L-L resonant tank with a finite value of lamp
resistance. The output lamp current is then calculated using the current
gain relationship as shown in (7), where iin,1 is the fundamental
component of iin, k=Lp/Lr and ωs is the angular
switching frequency.

[0085]The active components in a single stage or single switch converter
may be subjected to high voltage or current stress when compared to a
conventional two stage converter to achieve the same power level. Here,
the voltage and current stress across the switch of the embodiment of
FIG. 2A are investigated.

[0086]As mentioned above, when the MOSFET conducts, the current components
include iL, iC1, and iin. Hence, the maximum current
stress occurs at the end of the conduction time of the switch, which is
given in (8), where iL,pk is the peak current of inductor L1,
i.sub.Cl,pk is the peak current of inductor L2, and iin,pk is
the peak of the inverter input current. Since the voltage across C1
is equal to the rectified line voltage, i.sub.Cl,pk and iL,pk can be
combined and the corresponding equivalent inductance is represented by
Leq. In (8), vcr(t) represents the voltage across capacitor
Cr, which is the sum of the voltage across inductor Lr and the
lamp voltage vo(t); Vdc is the DC link voltage across C2
and Vrect is the rectified line voltage. The voltage gain
relationship between Vdc and Vrect is given in (9). Assuming
that a close-to-sinusoidal waveform is achieved at the output, i.e.,
vo(t)=Vo cos(ωst), vcr(t) will also be a
close-to-sinusoidal waveform with a phase angle of φ. The final
expression in (8) is expressed in terms of vo, Vdc, and
Vpk, which are all known quantities so that the maximum current
stress can be calculated. The peak current flowing through D1,
Din, and Db are also given in (10), (11), and (12) accordingly.

[0087]The rms voltage stress across the MOSFET when the MOSFET is off is
given in (13). It is obtained by using Kirchhoff's Voltage Law, where
vL,in(t) is the voltage across inductor Lin. Since the current
flowing through Lin is almost equal to zero when the MOSFET is off,
VL,in(t) is almost equal to zero as well during the switch off
period. Using vct(t) derived earlier in (8) and substituting it in
(13) gives a good approximation of the rms voltage across the switch.

[0088]A standard, commercially available dimmer (e.g., a triac dimmer) as
used with an incandescent lamp controls the lamp output power by
adjusting the conduction time of the AC input line voltage. A leading
edge dimmer (e.g., a triac or thyristor dimmer) is an example of a
standard dimmer that chops off the early or leading edge of each half of
the AC sine wave. Conduction of the device is controlled by a trigger or
firing pulse, and the later the device is fired and starts to conduct,
the less power is delivered to the lamp. A trailing edge dimmer (e.g., a
transistor dimmer) is an example of a standard dimmer that chops off the
late or lagging edge of each half of the AC sine wave. Less power is
delivered to the lamp as more of the trailing edge is chopped.

[0089]Thus, with standard dimmers, the shorter the conduction time, the
less power will be delivered to the output. Hence, the power factor will
decrease as the conduction time of the dimmer decreases. The poor power
factor obtained from a typical CFL at its full lamp power implies that
such dimmers, when placed between the input and the CFL, will result in
very poor power factor with extremely high current spike at the input
during dimming. As a result, such a dimmer should not be used with a
currently available CFL not only because of the poor power factor, but
also because the high current spike may exceed the current rating of the
circuit components and destroy the electronic ballast.

[0090]Proper dimming performance of a fluorescent lamp may require power
factor correction at all dimming levels. Commercially-available consumer
grade electronic ballasts, such as those found in CFLs, may not include a
PFC circuit, or may include a PFC circuit with poor performance. Hence, a
commercial CFL produces a poor power factor at the AC main input. For
example, when a standard phase-cut (triac) dimmer is used with a CFL, the
dimming range of the lamp is very limited. When the lamp is dimmed,
flickering is observed at the light output and in some cases, no light is
produced at low dimming level. Under conditions where the line voltage
drops suddenly (i.e., brownout), the lamp cannot sustain its normal
operation.

[0091]Another aspect of the invention relates to a dimmer controller
circuit for an electronic ballast for a fluorescent lamp. The dimmer
controller circuit maintains a high power factor throughout the dimming
range, and may compensate for brownout conditions as well as avoid
glow-discharge mode operation of the fluorescent lamp.

[0092]An embodiment of a dimmer controller circuit, which includes a duty
ratio controller and a gain multiplier, is shown in FIG. 9A. Referring to
FIG. 9A, a conventional triac dimmer (TD) is connected to the input of
the duty ratio controller of the dimmer controller. The output lamp power
may be controlled by adjusting the pulse width of the switch M1. The
AC line voltage is rectified (Vrect), scaled down (not shown in FIG.
9A or 9B), and compared with a DC signal in the comparator U1. At the
output of the comparator, a pulse is generated when the DC signal is
higher than Vrect. When a firing angle is applied at to, the
rectified voltage is chopped and the corresponding pulse width at the
output of U1 is increased. This pulse width shows how much firing angle
has been applied to the triac. The circuit multiplies this pulse width
information by a gain factor and then subtracts this signal from the
reference voltage. The end result is that a small firing angle can
control a large amount of lamp power so that high power factor is always
maintained at the input even during dimming.

[0093]A dimmer controller circuit according to another embodiment is shown
in FIG. 12A as used with a trailing edge dimmer. This embodiment, as with
all embodiments, may of course also be used with a leading edge dimmer.
The embodiments described herein may also be used with a resistive
dimmer. This embodiment allows a fluorescent lamp to be dimmed smoothly,
and the dimmed light output can be maintained during brownout conditions
and when the lamp is switched off and on again. This embodiment also
avoids glow-discharge mode operation of the fluorescent lamp. As shown in
FIG. 12A, this embodiment includes a gain adjuster that provides a proper
signal to be subtracted from a reference signal during dimming. This
embodiment also includes duty ratio control and a non-linear function
(e.g., a multiplier) to accommodate for the drop in voltage during
dimming. When the main power is switched off and then on again during
dimming, the multiplier provides a high duty ratio signal to sustain the
arc across the lamp.

[0094]The dimmer controller may be implemented as a discrete circuit
design, using discrete elements and commercially-available
semiconductors, or it may be implemented as a single integrated circuit
in the form of an analog ASIC, or it may be implemented as firmware
implanted in a digital controller. Analog implementations and digital
implementations may be equivalent functionally, but offer different
overall costs to implement.

[0095]A dimmer controller circuit as described herein may be used with a
standard dimmer, such as a triac or thyristor dimmer (i.e., a leading
edge dimmer) that is typically used with an incandescent. Other dimmers
as known in the art, such as transistor dimmers (i.e., trailing edge
dimmers) may also be used. The dimmer controller circuit may be provided
alone, for use with an electronic ballast, or together with an electronic
ballast. In the latter case, the dimmer controller circuit and the
electronic ballast circuit may be combined, e.g., substantially or
completely in one circuit. Such an embodiment may be produced in a
compact size, suitable for use with a CFL. For example, the dimmer
controller of the embodiment of FIG. 12A may be combined with the
electronic ballast circuit of FIG. 2A, as shown in FIG. 12B.
Alternatively, the embodiment of FIG. 12A may be combined with the
electronic ballast circuit of FIG. 2E or 2F.

[0096]A dimmer controller as described herein may be used with electronic
ballasts whose operation is based on duty cycle variation and with
electronic ballasts whose operation is based on frequency variation. The
embodiments shown in FIGS. 9A and 12A, configured to control a single
switch, allow control of the duty ratio substantially from 0 to 100%
(i.e., maximum dynamic range of the switch). However, it will be
appreciated that a dimmer controller as described herein is not limited
to use with single-switch electronic ballast such as that shown in FIG.
2A, 2E, or 2F. The dimmer controller may be configured for use with
electronic ballasts having two or more switches by providing drive
signals with appropriate duty ratios to each switch. For example, the
embodiment of FIG. 12C includes dead-time control and phase shift
functions to drive both switches of a two-switch electronic ballast with
appropriate duty cycles. Such a dimmer controller may be provided alone,
or in combination with an electronic ballast having two or more switches,
as shown in FIG. 12C. Such a dimmer controller for two switches allows
for variation of the duty ratio substantially from 0 to 50% for each
switch.

[0097]Another aspect of the invention relates to a combination comprising
an electronic ballast and a dimmer controller, for use with a fluorescent
lamp. The electronic ballast with dimmer controller has a high power
factor throughout the dimming range. The dimmer controller may use a
standard, commercially available dimmer, such as a triac dimmer, a
transistor dimmer, or a resistive dimmer typically used for an
incandescent lamp. The dimmer controller may include a duty ratio
controller and a gain multiplier.

[0098]One embodiment of the combination includes a high power factor
electronic ballast circuit, such as, for example, the embodiment shown in
FIG. 2A, 2E, or 2F, and a dimmer controller, such as the embodiment shown
in FIG. 9B or FIG. 12A. The dimmer controller may control a wide range of
fluorescent lamp light output by adjusting only a narrow range of firing
angle. As a result, a change of only several firing angle degrees results
in significant drop in the light output. The overall system features high
power factor performance throughout the entire dimming range with the
electronic ballast power circuit being extremely compact.

[0099]An embodiment of a combination comprising an electronic ballast and
a dimmer controller is shown in FIG. 12B. This embodiment includes a
shared switch electronic ballast such as that shown in FIG. 2A. According
to this embodiment, the duty ratio of the switch M1 in the power
circuit is controlled. By controlling the duty ratio of the switch, the
lamp output power may be adjusted. Vrect, a feed-forward parameter,
carries information of the firing angle applied to the lamp dimmer to the
dimmer controller. During normal dimming operation, when part of the
sinusoidal line voltage is chopped, the power transferred to the output
will naturally decrease. Hence, the duty ratio of the switch does not
drop below a selected level so as to avoid glow-discharge mode of the
lamp. The gain (K) signal, Vo1*K, is subtracted from an initial
reference, Vref1, to force the duty ratio to decrease slightly
during dimming. In other words, Vref=Vref1-Vo1K during
dimming. The multiplier allows a slight increase in the duty ratio to
provide a high enough voltage at the output to sustain the lamp arc
during dimming. As a result, the output signal of the multiplier is
relatively small compared to Vref1 so that the presence of the
multiplier inside the controller does not affect the normal operation of
the ballast circuit.

[0100]It will be appreciated that a dimmer controller as described herein
may be used with electronic ballast circuits other than an electronic
ballast circuit as described herein. However, modification of the dimmer
controller may be required; such as, for example, adding
controller/driver stages to drive any additional switches in the ballast
circuit. For example, the combination may include an electronic ballast
having two or more switches, and a dimmer controller as described herein,
such as the embodiment shown in FIG. 12C. An example of such an
electronic ballast is a two switch power circuit using a conventional
half bridge inverter, as shown in FIG. 12D. Another aspect of the
invention relates to a fluorescent lamp including an electronic ballast
as described herein.

[0101]In one embodiment, the fluorescent lamp may include a combination of
an electronic ballast circuit and a dimmer controller circuit as
described herein. In another embodiment, the fluorescent lamp may be a
compact fluorescent lamp (CFL).

[0102]Another aspect of the invention relates to a socket for a
fluorescent lamp including at least one of an electronic ballast circuit
and a dimmer controller circuit. The electronic ballast circuit may be as
described herein. The dimmer controller circuit may be as described
herein. In one embodiment, the fluorescent lamp may be a CFL.

[0103]It will be appreciated that in applications where lamp dimming is
not required, a dimmer controller as described herein may be used without
a dimmer to control an electronic ballast. Here, the controller may be
referred to as a ballast controller or simply as a controller. Such an
embodiment is shown in FIG. 12E. This arrangement provides operation of
the lamp at full brightness and with a very high power factor, and in
particular, maintains such operation of the lamp when the line voltage
drops below normal levels (e.g., during brownout). Such a controller may
be used in all embodiments and aspects described herein, in applications
were a dimming function is not required.

[0104]Another aspect of the invention provides a dimmer for use with an
electronic ballast and a dimmer controller circuit as described herein to
dim a fluorescent lamp, such as a CFL. Conventional incandescent lamp
phase-cut dimmers (leading edge or trailing edge) control the light
output by adjusting the conduction angle of the input sinusoidal line
voltage. One major drawback with such dimmers is that the conduction
angle of the line voltage and the line current decrease when the lamp is
dimmed. This means the power factor decreases to a low value at very low
dimming level. To solve this problem and to maintain simple wiring
between the dimmer and the rest of the system, a dimmer as described
herein does not control the light output by controlling the conduction
angle of the line voltage. Rather, it controls the light output by
injecting a high frequency (HF) signal using a voltage-controlled
oscillator (VCO). FIG. 17A is a block diagram of an embodiment of the
dimmer, interfaced with ballast and dimmer controller circuits as
described herein. The frequency range of the high frequency signal should
be sufficiently different from the frequency at which components of the
electronic ballast circuit operate, to avoid interference. For example,
if the electronic ballast operates in the kHz range, the high frequency
signal should be in the MHz range. Specific operating frequencies are a
matter of design choice and can be easily determined by one of ordinary
skill in the art.

[0105]As shown in FIG. 17A, the input of the VCO, which is a DC voltage
signal, is the user control interface. The controller circuit includes a
frequency to voltage conversion block before the control logic block,
which includes a PWM comparator. This block converts the HF signal into a
DC voltage (Vcon). The higher the frequency of the HF signal, the
higher the magnitude of Vcon. This conversion may be done by, for
example, detecting time between two zero-crossing points of the HF signal
and then converting the value into an appropriate corresponding voltage
level. In this embodiment, a higher frequency implies that there is less
time required between two zero-crossing points; hence, the output DC
voltage level increases inversely and proportionally.
Commercially-available ICs such as AD650 (Analog Devices) and LM2917
(National Semiconductor) may be employed for this task. Vcon is then
fed to the PWM block to adjust the duty ratio of the switch of the
ballast power circuit, which determines the light output. In the
embodiment of FIG. 17A, the HF and low frequency 60 Hz signals need to be
separated, and an L-C circuit (Lfil and Cfil) may be used for
this purpose.

[0106]As noted above, the input of the VCO, which is a variable DC voltage
signal, is the user control interface. This may be implemented many
different ways, as known in the art. For example, the DC voltage signal
may be controlled using a simple potentiometer, or by a
computer/microprocessor and/or additional circuitry for ramping the DC
voltage signal, which may be carried out manually or automatically in
response to one or more stimuli. As to the latter, sensors, such as for
voice recognition and/or for sensing one or more of, but not limited to,
light (e.g., visible, infra-red, UV), sound (e.g., voice), mechanical
stimuli (e.g., vibration, pressure), temperature, humidity/moisture, air
movement/wind, or one or more chemicals, may be used in conjunction with
such computer/microprocessor and/or additional circuitry to control the
DC voltage signal.

[0107]As shown in FIG. 17A, the output high frequency signal may be fed to
the controller circuit over the same power lines that supply AC power to
the electronic ballast circuit. Alternatively, the output high frequency
signal may be fed to the controller over separate conductors, or it may
be transmitted to the controller using any other suitable technique, such
as wirelessly, using, for example, radio waves or infra red light, as
known in the art.

[0108]FIG. 17B shows a detailed implementation of an embodiment of the
dimmer. This embodiment includes a diode Di, resistor Rs and
capacitor Ci which convert the AC line voltage to a DC signal.
Resistor Rvar is a variable voltage divider so that the DC voltage
at the input of the VCO can be adjusted by the user.

[0109]A dimmer as described herein maintains very high power factor (close
to unity) at the AC line input side throughout the entire dimming range,
with low cost.

[0110]Embodiments of the invention are further described in the following
non-limiting working examples.

Working Examples

1. Electronic Ballast Circuit

[0111]Performance of an electronic ballast circuit based on the embodiment
of FIG. 2A was verified through simulation and an experimental prototype.
A Sylvania Dulux® T/E 4-pin 26 W CFL with Iout=0.32 Arms
was chosen as the testing load for the prototype with a line voltage of
110 Vrms 60 Hz. The switching frequency was 70 kHz and the quality
factor was 2. The circuit parameters were calculated using the following
steps:

(1): Rlamp was first calculated using Iout and Pout as
shown in (14). Then the values of Lr, Cr and Lp were
obtained using (3), (4) and (5) respectively.

[0113]Since L1 was chosen to be equal to L2, L1 and L2
were determined from Leq and were 1.2 mH. The output capacitor
C2 was obtained by first calculating the mean input resistance of
the inverter circuit. This was obtained by equating the input power of
the SEPIC circuit and the output power of the SEPIC circuit as given in
(15) assuming η=90%. From (15), Ri was calculated to be
2110Ω. Vdc was then calculated from (9) with d=0.4 and
Vpk=155 V. C2 was calculated using (16) by allowing a 2% ripple
in Vdc.

[0115]The rms switch voltage was determined to be 460 V using (13). To
meet these two requirements, the MOSFET SPA06N60C3 (Infineon, Milpitas,
Calif., USA) was chosen for this design. For the diodes, ultra-fast
recovery diodes are required for diodes Db, Din, and D1.
As illustrated in (10)-(12), the maximum current flowing through Db
and Din are equal to the peak of the DCM inductor current; whereas
the maximum current going through D1 is equal to the peak of
iin. Hence, MUR1560 was selected for these diodes.

[0117]FIG. 7 is an electrical diagram of the experimental prototype. FIG.
8A-E shows the experimental waveforms of the circuit of FIG. 7. The lamp
current and voltage are shown in FIG. 8A, where a crest factor of 1.48
was measured. The measured current waveforms iout and iL are
shown in FIG. 8B. The measured line current is shown in FIG. 8C. A power
factor of 0.995 and a THD of less than 10% were achieved according to the
harmonic spectrum of is shown in FIG. 8D. FIG. 8E shows the switch
current (ids) and switch voltage (vds) waveforms. The peak
current flowing through the switch was about 1.98 A. All the measured
waveforms have good agreement with the theoretical waveforms and
simulation results. The overall efficiency was measured to be 91.8% at
110 Vrms.

2. Electronic Ballast Circuit with Dimmer Controller

[0118](i) An electronic ballast circuit with dimmer controller based on
the embodiment shown in FIG. 9B was built (see FIG. 10) and tested. A
Sylvania Dulux® T/E 4-pin 26 W CFL with Iout=0.32 Arms was
chosen as the testing load for the prototype circuit with a line voltage
of 110 Vrms 60 Hz. The switching frequency was 70 kHz and the
quality factor was 2. FIG. 11A shows the line current under full lamp
power, where a power factor of 0.96 was achieved. FIG. 11B shows the line
current with a firing angle of 35° applied to the triac dimmer,
where the power factor was 0.86. At this level of firing angle, the lamp
current was substantially reduced to 0.1 A at a dimming level of 10% of
the lamp rated power.(ii) An electronic ballast circuit with dimmer
controller based on the embodiments shown in FIGS. 2A and 12A was built
and tested.

[0119]Performance was verified through use of the combination electronic
ballast circuit with dimmer controller with a four pin 13 W CFL. A 15 W
General Electric (GE) dimmable CFL (FLE15HT3/2/SW) was used as a
reference product for performance comparison. The dimmers used in the
experimental setup were standard phase-cut leading edge (triac) and
trailing edge (transistor) dimmers, both from Leviton Mfg. of Canada Ltd.
FIG. 13A shows the line current of the 15 W GE lamp under full power,
where the power factor was 0.85. FIG. 13B shows the line current of the
15 W GE lamp with the smallest firing angle (i.e., fully dimmed) using
the standard incandescent dimmer. The power factor at this power level
was 0.62. The high peak current waveform results in a poor power factor
as the conduction angle of the line current decreases during dimming. For
this reason, the dimming range is very limited in the commercial dimmable
CFL. Further, when the line voltage drops, this lamp is unable to sustain
the arc across the lamp and the light will turn off in this situation.

[0120]Results for the electronic ballast circuit with dimmer controller
are shown in FIGS. 14A-D. FIG. 14A shows the line current at full lamp
power for the trailing edge dimmer, where the power factor was 0.97. FIG.
14B shows the line current at the lowest dimming level for the trailing
edge dimmer, where the power factor was 0.84. When fully dimmed, no lamp
flickering was observed and glow-discharge mode operation was avoided.
FIG. 14C shows the line current at full lamp power for the leading edge
dimmer, where the power factor was 0.98. FIG. 14D shows the line current
at a partial dimming level for the leading edge dimmer, where the power
factor was 0.86.

[0121]FIG. 15 summarizes and compares the power factor achieved from the
electronic ballast circuit with dimmer controller, using the trailing
edge dimmer and the 13 W CFL, and the GE 15 W dimmable CFL. It is
observed that there is a significant improvement of more than 20% in
power factor of the embodiment of FIG. 12, relative to the
commercially-available dimmable CFL. The dimming range of the CFL is also
much wider with the embodiment of FIG. 12, relative to the
commercially-available dimmable CFL. The efficiency plot shown in FIG. 16
shows that an efficiency of close to 0.9 was achieved at the rated power
in the embodiment of FIG. 12, relative to about 0.81 in the
commercially-available dimmable CFL.

EQUIVALENTS

[0122]Those skilled in the art will recognize, or be able to ascertain,
equivalents to the embodiments described herein. Such equivalents are
considered to be encompassed by the invention and are covered by the
appended claims.