On the OV7670 camera, I think I've partially understood the HSTART and HSTOP registers. In the I2S camera code, (and indeed on a few different solutions working with the camera), the authors typically say

So here is a clue: the horizontal timing is such that a VGA scan line takes 784 PCLKs (640 + 144 PCLK times between lines). So HSTOP must be 640 bigger than HSTART, but modulus 784. So for any HSTART value, we can compute HSTOP as (HSTART + 640) % 784. This has worked nicely for me. My experiments also indicate that HSTOP points to the pixel beyond the last one. (HSTART + 639) % 768 just slews my images.

Camera_specs.png (36.56 KiB) Viewed 1170 times

Now why does HSTART begin at such a weird value? I'm still puzzed. I suspect it counts PCLKs relative to HSYNC (which is not broken out onto a pin, or easily observable), but I cannot find any obvious synchonization point or timing that explains HSTART.

Any ideas or extra insights, please let me know. If you can tell me how to get HSTART, I thinnk I can tell you how to get HSTOP.

I am looking at some camera code on github and just seeing that there is something undocumented in I2S api like two lines from the idf library file (i2s.c)
I2S[i2s_num]->conf2.lcd_en = 0;
I2S[i2s_num]->conf2.camera_en = 0;

It seems like there is a dedicated functionality for camera and lcd in I2S api and it is not documented or maybe I just cannot find it.
The interesting thing is how those data bits from camera are transformed parallely to DMA as byte datas by I2S.
I guess it is dedicated behavior by selecting camera_en = true and also what exacly gpio_matrix_() does to the selected pins and what is the signal index value
I am just trying to understand how I2S works in such case

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