> ..> > > > > > > > > > What is the actual problem which is being fixed here?> > > > > > Sorry, I should have been clearer. There is a bug in the DMA engine that> > > that may result in prefetching data from beyond the end of memory or> > > falling off into one the holes on IPF and AMD. It causes a machine check> > > when that happens.> > > It doesn't happen on Proliant because the last 4kB (or so) of memory is> > > mapped out by the BIOS and Pentium guarantees contiguous memory.> > > > I think that this:> > > > > > #if defined(CONFIG_IA64) || defined(CONFIG_X86_64)> > > > is nowhere near strong enough and is probably inappropriate.> > > > It _could_ be that CONFIG_DISCONTIGMEM|CONFIG_SPARSEMEM will be closer, but> > even CONFIG_FLATMEM systems can have holes.> > I'm poking around on some IPF platforms. It looks like CONFIG_DISCONTIGMEM is> set on them, but not the others you mention. Would that be sufficient?

I don't think so. All machines in all memory models can and do have holesin their memory map. I think the problem is that some machines object tohaving those holes read from and others do not. It could be that thisproblem is purely an ia64 thing.

And it's not just holes: we had a problem a year or so back where CPUprefetching was walking off the end of real mmeory and into the AGP regionand was causing weird cache coherency problems on x86_64 (or something likethat).

> > > > On what machines can/does this card exist? Things like powerpc?> > This problem was found on Itanium. We don't try to support powerpc.

Well the CCISS driver presently has no architecture Kconfig dependencies,so anyone can build it on anything. I don't know whether it's physicallypossible to put a cciss controller into a power/sparc/whatever machine -are these controllers only ever integrated onto the main boad?

Anyway, I'd suggest the best way of sorting this out is to come up with acomplete description of the problem, decide which architectures areaffected and to then ask the relevant architecture maintainers to recommenda solution.

I think the description would be

There is a bug in the DMA engine that that may result in prefetching data from beyond the end of memory or falling off into one the holes on IPF and AMD. It causes a machine check when that happens.

It doesn't happen on Proliant because the last 4kB (or so) of memory is mapped out by the BIOS and Pentium guarantees contiguous memory.

If the platform is culnerable to this then driver's prefetching needs to be disabled at compile-time or, preferably, initialization-time. What is the best means by which we can determine whether the platform needs this treatment?