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Circuit Cellar's editorial team comprises professional engineers, technical editors, and digital media specialists. You can reach the Editorial Department at editorial@circuitcellar.com, @circuitcellar, and facebook.com/circuitcellar

Eurotech recently announced the official release of Everyware Cloud 3.5 (EC), the M2M/IoT Integration Platform. The EC machine-to-machine (M2M) Integration Platform is intended to simplify device and data management by connecting distributed devices over secure and reliable cloud services. It enables you to connect, configure, and manage devices through the lifecycle, from deployment to retirement.

With EC 3.5 a set of new remote features is available: device configuration, device control, device provisioning, and device update. These features enable the Everyware Cloud Web Console to be the single point of administration for all connected devices, and make the Everyware Cloud REST APIs the single programmable interface to remote devices. In addition, security and reliability are enhanced with Two-Factors-Authentication and platform Health Monitoring.

By using EC, you benefit from:

Short time to market

Pay-as-you-go

Open Standard based

Flexible Deployment; from public cloud, to cloud-in-a-box (Everyware Server)

When talking about frequency mixers, “I/Q” has nothing to do with an intelligence quotient. As Robert explains, the “I” stands for “in phase” and the “Q” is for “in quadrature.” In this article, he introduces you to the fundamentals of I/Q signal representation and architecture.

In 2012, I ended an article about frequency mixers (“Let’s Play with RF Frequency Mixers,” Circuit Cellar 263) by saying that I had only scratched the surface of the subject. In fact, I didn’t cover the important topic of so-called “I/Q” mixers in that article. If you’re wondering what “I/Q” means, let me explain.

When talking about I/Q mixers, “I” stands for “in phase” and “Q” stands for “in quadrature.” You will find these two letters in most papers on signal processing or modern radio frequency (RF) systems architectures. Unfortunately, even some of the most experienced design engineers aren’t particularly familiar with these concepts. Why? Probably because they are usually presented in mathematical terms, such as complex numbers, the Euler theorem, complex Fourier transform, and so on.
This month, my aim is to explain the fundamentals of I/Q signal representation and architecture without math. So, as usual, take a seat, breathe normally, and follow me. I’ll stay away from complex mathematics, except for a few concepts you probably learned in high school.

A frequency mixer is a frequency translation device that you can use either to move up (up-convert) or down (down-convert) any part of the RF spectrum. For the moment, let’s focus on down-converters.

Basically, a mixer is a voltage multiplier. It multiplies two voltages: the RF signal that you want to down-convert and a sine signal coming from a local oscillator (LO). The output is usually nicknamed “intermediate frequency” (IF). The magic lies behind a simple trigonometric formula. The product of two sine signals of frequencies F1 and F2 is the sum of two other sine signals. These two signals have respective frequencies F1 – F2 and F1 + F2. Figure 1 clearly illustrates what’s going on. Refer to my previous article if it’s unclear.

Figure 1: A mixer works by multiplying two sine signals of frequencies FRF and FLO. Thanks to the well-known trigonometric formula reminded here, the product is the sum of two other sine signals, respectively, at frequencies FRF + FLO and FRF – FLO.

Of course, in real life, a mixer is a little more complex. But this description is sufficient enough for what I want to explain in this article. You must select the appropriate the LO and IF frequencies in order to have enough frequency separation between the two frequency terms present on the output. This enables you to remove the unwanted one with a frequency filter (high-pass or low-pass depending on the application).

Now let’s move on to modulated signals. Assume that the input RF signal is not a simple sine wave but a modulated signal that occupies a total bandwidth of BW in hertz. The band of interest is then from FRF – BW/2 to FRF + BW/2, where FRF is the central frequency of the RF signal. For example, if it is a IEEE802.11g (i.e., Wi-Fi) signal on channel 6, then you will have FRF = 2.437 GHz (the center frequency of Wi-Fi’s channel 6) and BW = 20 MHz (the modulation width of 802.11g). So, in that case, the occupied bandwidth is 2.437 GHZ ±10 MHz.

Suppose you want to translate the Wi-Fi signal to a low IF in order to digitize it. Assume that you want FIF = 50 MHz. As a mixer is operated in its linear region, it is theoretically transparent to the modulation. Therefore, you could simply mix the RF signal with a local oscillator set at a frequency of FLO = 2,437 + 50 = 2,487 MHz. The mixer’s output will include two copies of the modulated spectrum, one centered around FLO – FRF = 50 MHz and one centered around FLO + FRF = 4,924 MHz (see Figure 2). A low-pass filter will easily remove the second one.

Figure 2: A classical mixer, when used as adown-converter, generates mainly twocopies of the input spectrum, of whichone must be eliminated thanks to afrequency-selective filter.

The signal’s occupied bandwidth is not modified by the mixer: the intermediate frequency signal will still occupies ±10 MHz around the intermediate frequency. Just a caution: You can see in Figure 2 that the spectrum of the modulated signal can be mirrored. This is due to the fact that the local oscillator frequency was set above the RF frequency. In that case, if the frequency of the RF signal increases, it comes closer to the LO frequency, and therefore the IF frequency is lower (as FIF = FLO – FRF). This shouldn’t be an issue as long as you’re aware of it.

Such an architecture is called a “low IF” design, as the RF signal is moved directly to a quite low frequency in comparison to its bandwidth. Here the occupied bandwidth of the intermediate frequency will be 50 MHz ±10 MHz (i.e., from 40 to 60 MHz).

Now imagine that you have a spectrum analyzer on the IF output and a hand on the frequency-setting knob on the local oscillator. What happens when you gently turn the knob and reduce the LO frequency? Refer to Figure 2 once again. If FLO comes closer to FRF then the generated FIF will be closer to 0 Hz. Theoretically, everything should stay fine until the local oscillator frequency is close to 10 MHz. At that point, the IF modulated signal will occupy the frequency bandwidth of 10 MHz ±10 MHz (i.e., from exactly 0 Hz up to 20 MHz).

What happens if you continue to reduce the LO frequency? Part of the IF spectrum will be lower than 0 Hz. Unfortunately, negative frequencies don’t exist, so this spectrum will be folded back on the positive frequency side and will jeopardize the useful signal. Continue and set FLO exactly at the same frequency as FRF. Then the signal will be theoretically centered at 0 Hz. You will get an occupied bandwidth from DC to BW/2—that is, full of garbage, as the two parts of the spectrum will be folded on each other (see Figure 3).

Figure 3: With a standard mixer issues arise when the LO frequency is too close to the RF frequency. The output signal then cross the 0-Hz boundary and its spectrum is folded back from DC to half the bandwidth, jeopardizing its content.

You might think that this is bringing us nowhere, but there is even a name for such an RF architecture with the local oscillator exactly centered at the RF carrier frequency: zero-IF designs. So, is there a trick to avoid this spectrum fallback problem? You bet so. The answer is to use a so-called quadrature demodulator or I/Q mixer. You can analyze the concept in a few different ways. If you prefer math, read Richard Lyons’s excellent essay, “Quadrature Signals: Complex, But Not Complicated.” In what follows, I provide a more illustrative explanation.

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The new Multi-Use Radio Service (Mini-MURS) NiM1B-154.570-5-12.5-MURS is a frequency-programmable narrow band transceiver that offers a low-power, reliable data link in a Lemos /Radiometrix transceiver standard pinout and footprint. It’s suitable for licensed and unlicensed VHF allocations, FCC part 90 and part 95.

Ironwood Electronics recently introduced a new QFN socket addressing high performance requirements for testing QFN devices – CBT-QFN-7039. The contactor is a stamped spring pin with 17-g actuation force per ball and cycle life of 50,000 insertions. The self inductance of the contactor is 0.75 nH, insertion loss less than 1 dB at 31.7 GHz. The current capacity of each contactor is 1.5 A at 20°C temperature rise. Socket temperature range is –55°C to 180°C.

The socket also features an alignment guide for precise device to pin alignment. The specific configuration of the package to be tested in the CBT-QFN-7039 is a QFN, 3 × 3 mm, 0.5-mm pitch, 10 positions with center ground pad. The socket is mounted using supplied hardware on the target PCB with no soldering. To use, place the QFN device into the socket base and lock the double latch socket lid on to the base using the latch.

The socket uses a compression wave spring to apply constant downward pressure enabling the device be interconnected to the target PCB. This socket can be used for hand test and quick device screening applications with the most stringent requirements.

The CBT-QFN-7039 costs $552 with reduced pricing available depending on quantity required.

Infineon Technologies recently introduced a new class of low saturation voltage V CE(sat) IGBTs specifically optimized for low switching frequencies ranging from 50 Hz to 20 kHz. These can typically be found in applications such as uninterruptible power supply (UPS) as well as in inverters for photovoltaic and welding systems. The new L5 family is based on the TRENCHSTOP 5 thin wafer technology, with the intrinsically low conduction losses having been reduced further with additional optimization of the carrier profile.

With a typical V CE(sat) value at 25°C of 1.05 V, new levels of efficiency can be reached—up to 0.1% efficiency improvement in a NPC 1 topology or up to 0.3% efficiency improvement in a NPC 2 topology when replacing predecessor TRENCHSTOP IGBTs with the L5 family. Coupled with the positive temperature coefficient of V CE(sat), high efficiency is maintained plus paralleling straightforward—an industry benchmark for IGBTs switching below the 20-kHz frequency. The TRENCHSTOP 5 technology base used for the new L5 family not only delivers unmatched low conduction losses, but total switching losses are as low as 1.6 mJ at 25°C. For these reasons the use of the newly introduced low V CE(sat) IGBT leads to higher efficiency, improved reliability and smaller dimensions of the systems in low switching frequency applications.

The new L5 IGBT family is released in a first wave using the industry standard TO-247 three-pin package. Additionally, for applications requiring extended efficiency enhancement, Infineon also offers the L5 in the innovative TO-247 4pin Kelvin-Emitter package. When compared to the standard TO-247 3pin package, the TO-247 4pin package provides a further 20% reduction in switching losses. Thus the L5 in combination with the TO-247 4pin package provides the ultimate lowest conduction and switching losses and maintains Infineon’s leading position in offering the High Power market highly innovative and differentiated products.

The new low V CE(sat) L5 family is available in 30A and 75A current classes as single IGBT and co-packed with Infineon’s ultrafast Rapid 1 and Rapid 2 silicon diodes. The TO-247 4pin Kelvin-Emitter package will be available in 75A current class.

X-REL Semiconductor has unveiled two new product families targeting power conversion applications in demanding markets including aerospace, industrial, hybrid and electric vehicles, transportation, geothermal, and oil and gas. The XTR20410 and XTR20810 product families comprise flexible devices with power N-channel MOSFETs and integrated drivers intended for use in extreme reliability and high-temperature applications (e.g., DC/DC converters, motor control, and power switching).

Matching network optimization between a driver and a power transistor is a difficult and time-consuming task. The XTR20410 and XTR20810 provide a turnkey solution that already matches power transistor and driver inside a single piece of silicon. These products therefore enable faster development cycles and shorter time-to-market than with standard components.

XTR20410 parts may be used as high-side (40 V max), low-side, or low-side switch with negative offset (–30 V max) on the output stage (SOURCE connected to a negative voltage), while receiving a control input signal referred to GND. XTR20810 parts are intended to be used as low-side switches, which are able to sustain transient overshoot voltages up to 100 V.

The devices in the XTR20x10 families are able to reliably operate from –60°C to well above 230°C (five years at +230°C). Being operational at high temperatures is essential in applications where the environment is at elevated temperature or where some other device makes the temperature inside the application increase. Additionally, all X-REL Semiconductor products can be used in applications running at lower temperatures (e.g., from 100°C to 200°C) where extended lifetime is expected or where failing is not an option. For example, the expected lifetime of X-REL Semiconductor parts in an application operating at Tj = 150°C is over 35 years.

Parts from XTR20410 and XTR20810 families can be immediately deployed in both niche and large-scale markets in high-reliability compact hermetic or plastic packages, as well as bare dies.

Keysight Technologies recently introduced a power analyzer that combines accurate power measurements and touch-driven oscilloscope visualization capability in a single instrument. The IntegraVision power analyzer enables R&D engineers who are designing and testing electronic power conversion systems to access dynamic views of current, voltage, and power. This enables them to view, measure, and prove the performance of their designs.

Engineers working on electronic power conversion systems need high-accuracy measurements to identify and characterize incremental efficiency improvements in devices, such as power inverters or converters, universal power supplies, battery systems, vehicle and aircraft power systems, lighting systems/electronic ballasts and appliances. While some of today’s power analyzers offer adequate measurement accuracy, they are cumbersome to use and lack the ability to characterize power consumption under dynamic conditions. Previously, engineers needed a power analyzer to make accurate measurements and an oscilloscope to visualize repetitive and single-shot events such as turn-on and occurrences of transients. Eliminating a separate oscilloscope in the measurement setup decreases test complexity and reduces configuration time.

The Keysight IntegraVision power analyzers are ideal for R&D engineers who want to quickly and interactively measure AC and DC power consumption, power conversion efficiency, operational response to stimulus and common AC power parameters such as frequency, phase and harmonics—all with 0.05% basic accuracy and 16-bit resolution. The power analyzer enables engineers to characterize power consumption under highly dynamic conditions with 5-M samples per second digitizing speed and 2-MHz bandwidth.

The IntegraVision power analyzer allows engineers to address multiple test scenarios with the flexibility of wide-ranging, isolated inputs up to 1,000 VRMS (Cat II). The instruments offer external sensor inputs and 2-Arms and 50-Arms direct current inputs, standard on all channels. The external sensor input supports current probes and transducers up to 10-V full scale.

The IntegraVision power analyzer features a space-efficient footprint and allows engineers to:

Visualize transients, in-rush current and state changes with a high-speed digitizer that captures voltage, current and power in real time

Analyze power losses in the time and frequency domains using full Nyquist-based computations

Gain new insights by viewing parameters on the large, high-resolution, touch-screen display

The user interface of the IntegraVision power analyzers is based on technology from Keysight’s InfiniiVision 6000 X-Series oscilloscope, including its 12.1-inch multitouch capacitive touchscreen with pinch, zoom and scroll capabilities. Keysight’s development of the user interface was guided by extensive feedback from engineers. The result is an intuitive user experience that enables engineers to gain measurement insight with the IntegraVision power analyzer within minutes.

The two-channel Keysight IntegraVision PA2201A power analyzer is suitable for single-phase AC measurements and can be ordered today. Shipments are expected to begin in May. Contact Keysight for pricing. TheIntegraVision PA2203A power analyzer with four channels for three-phase power analysis is scheduled to be introduced in the fourth quarter of 2015.

The OS85621’s on-chip DTCP coprocessor accelerates the computation-intensive operations required for DTCP authentication and content protection. You can simultaneously route up to eight independent data streams through the DTCP coprocessor’s cipher engine for M6 or AES-128 encryption/decryption.

The ultra-low-latency mode of the H.264 codec enables single-digit millisecond latency from video input to video output, including encoding, transmission over a MOST network, and decoding. This real-time, high-speed video processing makes the OS85623—which has no DTCP coprocessor—an excellent option for camera-based ADAS applications that are designed to enhance vehicle safety.

The OS85621 and OS85623 H.264 video I/O companion ICs are now available in a BGA 196 package. Volume pricing starts at $8.

Carmen Parisi is an applications engineer who co-hosts an engineering podcast in his spare time. In this interview, he describes his work, shares some engineering tips, and tells us about a fun prank he played on an unsuspecting designer.

CIRCUIT CELLAR: Where are you located?

CARMEN: Currently, I’m living and working in Raleigh-Durham, NC, around the Research Triangle Park area between the two cities with my wife and new dog Sadie. Kelly and I moved down about three years ago from Buffalo, NY, and really like it here. There’s a lot of tech companies and engineers around, tons of stuff to do, and great food and beer scenes. Plus, as a hearty Northerner, I get to laugh at the “cold” winters we experience. Come summer, though, I melt into a puddle on the pavement. Snow all the way for me, but Kelly disagrees.

Carmen Parisi

CIRCUIT CELLAR: When did you decide to pursue electrical engineering and why?

CARMEN: Ever since I was a kid I had a fascination with tools and how things worked. I would always have a toy sword and various tools stuffed into my belt and would volunteer to help my dad around the house building a deck around the pool or fixing the fence.

Once I got into high school, I took a few basic engineering courses during which time I got bit by the engineering bug. The course that really “doomed” me to a life of electronics was a Robotics course taught by my favorite teacher C, as we called him. He put me through my paces learning how to solder, reading schematics, programming in BASIC, and robbing Fort Knox using a LEGO Mindstorms robot. C’s class solidified my choice to go to college for engineering, and shortly thereafter, I picked electrical over mechanical for my major.

CIRCUIT CELLAR: When was the first time you used a microcontroller in a project?

CARMEN: If we’re counting LEGO Mindstorms, then the Robotics class in tenth grade with C where we had to build a robot to lift a golden brick and run away with it (thus “robbing Fort Knox”). I met all the individual milestones with my group for the project, but we couldn’t get the whole thing working smoothly from beginning to end. I guess that was my first time learning how to successfully fail too which has turned out to be a very useful skill.

My first real microcontroller experience was the summer after sophomore year when I took a college course at a local community college offering a few classes to high school students interested in engineering. During that course I learned more basic circuit theory, got introduced briefly to SMT soldering, and built some robots using the Parallax BOE Bot. Looking back, I’d say this was the time my analog career kicked off as I slowly started to realize that I was more interested in the circuits themselves than the overall robot.

CIRCUIT CELLAR: Tell us about your university-level schooling.

CARMEN: I still consider myself a student in that I’m always looking to learn new things and grow as an engineer, but my formal schooling is over for the foreseeable future. In 2011, I completed a combined BS/MS degree in Electrical Engineering at the Rochester Institute of Technology in Rochester, NY. I initially started off interested in robotics but after working with a great analog designer on my first co-op at GE, I switched into the analog circuit and semiconductor track and never looked back.

CIRCUIT CELLAR: Can you tell us about your work in graduate school?

CARMEN: Sure thing. My graduate work was primarily with the Communications professor who needed a proof of concept built to test out a theory that looked plausible on paper. Prior to my joining the Comms Lab, my advisor and two past grad students had worked out a method of securing wireless channels using the randomness of the channel itself. There was an initial front end of sorts to test the idea out but I don’t think it was ever tested.

I looked over the circuit design, decided to scrap it and start fresh, and immediately realized I had a big job ahead of me. Cue the analog professor becoming my co-advisor. Mixing circuits, active filters, phase detectors, ADCs, and communication theory swam through my head as I slowly cajoled the circuit to life. Two PCB revisions later the circuit worked in that it took the RF input signal and spat out some bits at the other end, but after my advisor applied his algorithm to the data, we weren’t able to generate symmetric keys on different boards. Whether this was from an error in theory or with my board I never found out, as I ended the project there to focus on my full-time job leaving with a grad paper instead of a full thesis.

I still have all my old lab notebooks, schematics, and board layouts on my bookshelf at home. I think the files are sitting on a hard drive somewhere too. Looking at them now, I can spot a lot of little errors I’d like to fix due to my inexperience at the time and some maybe a few not so little errors too.

CIRCUIT CELLAR: What did you do after school?

CARMEN: After I left RIT, I moved down here to Raleigh-Durham to start my career as an Applications Engineer working on switching regulators with Intersil. Back in 2009 I had done a summer stint as an FAE at a small field office in Long Island with the company which got me interested in working in the semiconductor industry.

Life on the road as an FAE didn’t appeal to me after spending my college years constantly moving around for co-ops, so my former boss set me up with an interview here at the RTP design center. On the way down for the interview, I got stuck in Dulles for the night thanks to some bad weather in Rochester causing me to miss my connection. I wound up getting a bare 3 hours of sleep that night on an empty terminal bench. The next morning, groggy and sleep deprived, I suited up in the family restroom and flew out for six wonderful hours of technical interviews. I was absolutely wiped out by the end of the day but managed to survive the ordeal. The rest is history.

CIRCUIT CELLAR: Tell us about the work you are doing as an applications engineer for Intersil.

CARMEN: Well, for starters, being an apps engineer is exactly the rock n’ roll lifestyle I’m sure all your readers expect it to be. I roll into the office every morning and have the roadies warm up my iron for me!

In reality though, I work on buck regulators for computing applications like notebooks, tablets, ultrabooks, with maybe a bit of desktop work from time to time. Most of the parts I work on are for the primary core voltage on Intel processors. Sometimes, should the part integrate multiple regulators, I’ll work on a graphics rail or one of the other many voltage rails present on a motherboard. For each new processor tock (tick? I always confuse the two), Intel releases a laundry list of specs that have to be met in order to provide power to their CPUs and my parts are designed to those specs.

When I work apps on a brand spanking new chip, I’ll first work with the design engineers to run some feasibility studies and help define any new features for the IC. These tests range from tuning a similar part to the new Intel specs to see if the control scheme hits any corners or has stability issues to beating up some power FETs to determine if they can handle the new current requirements we have to meet. Once the chip tapes out, I’ll start work on preliminary documentation—a rough datasheet draft or early reference design based on feasibility testing and simulations—for the field to use when working with customers. During this time, I also design the evaluation board I’ll use to validate the part and send to customers for sampling.

The real meat and potatoes of my job is silicon validation. I’ve got an exhaustive spreadsheet of bench tests to do that functionally verify the IC over a wide range of corners. The first few weeks after silicon comes back I’m working full throttle, round the clock if need be, to make sure there are no show stopping bugs we need to address. I never see my office during validation. Instead I’m spending all my time in the lab hunched over the eval board or squinting at my scope.

Things calm down slightly after the initial validation, but the work is still nowhere near done. Now I’m working with design and test engineers to debug any issues that crept up during validation and implement fixes. Ideally, a board-level change is found because PCB or apps level schematic changes are much easier and cheaper than silicon spins. In conjunction with this work, I’ll also refine my reference designs and documentation as well as work with the field on initial customer designs by answering questions and checking over layouts and schematics to make sure everything’s optimal for their builds.

Up until the part releases, I’ll continue cycling through validation, debug, and customer support as needed, squeezing in documentation when I get a chance too. At any given time, I’m also supporting old parts still in production or, if I’m in a lull with my work, getting pulled onto other chips to help out other apps engineers in a jam.

The last part I released, and my first as the lead apps guy, was the ISL95813, a single phase regulator for Haswell and Broadwell systems. My next part is scheduled for release next year which I can’t talk too much about, but it’s really cool.

CIRCUIT CELLAR: During your time at Intersil, you must have learned some important lessons about professional engineering. Can you share one or two things you took from the experience?

CARMEN: Most importantly, good communication skills are key. A large chunk of my job is talking to other engineers and customers across the country and overseas. Their whole interaction with me is through the emails and reports I send out and I want to make sure they’re top notch. You don’t need to be a poet laureate by any means, but if you come across like a rock head, it will be much harder to get taken seriously and problems will drag out longer than necessary. Proofread your work; make sure you’re getting your point across clearly; and tailor your email, report, PowerPoint, whatever, to your audience’s level of technical expertise. Study up on how to make a slideshow that won’t bore your audience or read a technical writing guide. It can’t hurt.

Secondly, document, document, document—even if it’s only for your own reference. And keep it somewhat organized so you can find what you need again without too much hassle. Yes, it can help CYA, but also I’ve saved myself a ton of time not redoing the same derivations or looking back at a difficult test setup I had documented in my notebooks. It’s especially nice being able to pull up old data from past parts to see why the heck we did what we did years later.

CIRCUIT CELLAR: Tell us about your most recent electrical engineering project. What did you build and why?

CARMEN: Well, I can’t talk too much about work since all my projects at the moment are either customer related or under development, but suffice it to say I’m working on a lot of low power, multi-role chips.

Outside of work though for nearly two years now I’ve been co-hosting a podcast which keeps me plenty busy. The show’s called The Engineering Commons and it gets released every other week by myself and three other engineers scattered across the US. It was originally started by Chris Gammell and Jeff Shelton, but when Chris left the show for other projects back in 2013, I threw my hat into the ring when Jeff put the word out he was looking for new co-hosts. We discuss the engineering discipline as a whole rather than focus on any one field and some of our favorite topics include education, the value of co-ops, life in the workplace, and the stories of other engineers we bring on to interview.

The semiconductor field is pretty niche, and so through the show, I get exposed to all sorts of new ideas and philosophies, whether it’s from researching a topic when coming up with show notes or hearing the stories of engineers and professors from across the globe. Some of my favorite episodes are the ones while interviewing a guest I barely have to say anything and not just because I hate hearing my voice when I re-listen to an episode! Hearing someone get really into a story and talk about their passion I can’t help but get drawn in and become excited myself. All us engineers are alike; no matter the field once you get us going about that tricky bug we finally tracked down, the ridiculous meeting that happened the other day, or those ah-ha moments when a solution just clicks in your head we just can’t help but gush and it makes for great content. I’ve put out nearly 50 episodes with Jeff, Adam, and Brian, and I can’t wait to do the next 50!

CIRCUIT CELLAR: Tell our readers about the prank circuit gag you pulled on the designer you worked with. And can you share an image of the prank circuit?

CARMEN: A good way through the 813 development I found some problems that ended up being non-issues because I misinterpreted a spec, had a test setup issue, or made a silly component choice in my design. The designer started ribbing me a bit by immediately calling everything a board issue from that point on. This kind of back and forth goes on all the time between apps and design and it’s always good natured in tone. I didn’t take it personally and took strides to be more thorough before ringing alarm bells going forward but I couldn’t let him get way Scot-free.

Prank circuit

With my boss’ permission I waited until a slow day came along and rigged up a little circuit to the bottom of the eval board that would overdrive the compensation node of our regulator, propagate through the control loop, and cause seemingly random spikes in the output voltage. I took some waveforms and sent them off to the designer explaining how I found an operational corner that affected regulation we needed to address. Since he was a thorough designer and liked to regularly pop into the apps lab I actually spent my morning running the tests he asked me to just to keep up the illusion something was wrong if he showed up.

I kept him digging through the schematics trying to find his mistake until mid-afternoon before I brought him in the lab and slowly flipped the board over while telling him I found the error was caused by a parasitic circuit. At this point a couple other engineers who were in on the gag had found reasons to be in the lab for the reveal and we all had a good laugh. The designer took it pretty well, and I even bought him a beer for being a good sport.

Find the error in the schematic and submit your answer via the online Submission Form by the deadline: 2 PM EST on February 20, 2015. Two prize winners from the pool of respondents who submit the correct answer will be randomly selected.

PRIZES

Out of each month’s group of entrants who correctly find the error in the code or schematic, one person will be randomly selected to win a NetBurner IoT Cloud Kit and another person will receive a free 1-year digital subscription to Circuit Cellar.

NetBurner MOD54415 LC Development Kit: You can add Ethernet connectivity to an existing product or use it as your product’s core processor! The NetBurner Ethernet Core Module is a device containing everything needed for design engineers to add network control and to monitor a company’s communications assets. The module solves the problem of network-enabling devices with 10/100 Ethernet, including those requiring digital, analog, and serial control.

My first computer was a Cosmac Elf. My first “Desktop” was a $6,500 HeathKit H8. An Arduino today costs $3 and has more of nearly everything—except cost and size—and even my kids can program it. I became an embedded software developer without knowing it. When that H8 needed bigger floppy disks, a hard disk, or a network, you wrote the drivers yourself—in assembler if you were lucky and machine code if your were not.

Embedded software today is on the cusp of a revolution. The cost of hardware capable of running Linux continues to decline. Raspberry Pi (RPi) can be purchased for $25. A Beagle Bone Black (BBB) costs $45. An increasing number of designers are building products such as Cubi, GumStik, and Olinuxino and seeking to replicate the achievements of the RPi and BBB, which are modeled on the LEGO-like success of Arduino.

These are not “embedded Linux systems.” They are full-blown desktops—less peripherals—that are more powerful than what I owned less than a decade ago. This is a big deal. Hardware is inexpensive, and designs like the BBB and RPi are becoming easily modifiable commodities that can be completed quickly. On the other hand, software is expensive and slow. Time to market is critical. Target markets are increasingly small, with runs of a few thousand units for a specific product and purpose. Consumers are used to computers in everything. They expect computers and assume they will communicate with their smart phones, tablets, and laptops. Each year, consumers expect more.

There are not enough bare metal software developers to hope to meet the demand, and that will not improve. Worse, we can’t move from concept to product with custom software quickly enough to meet market demands. A gigabyte of RAM adds $5 to the cost of a product. The cost of an eight-week delay to value engineer software to work in a few megabytes of RAM instead, on a product that may only ship 5,000 units per year, could make the product unviable.

Products have to be inexpensive, high-quality, and fast. They have to be on the shelves yesterday and tomorrow they will be gone. The bare metal embedded model can’t deliver that, and there are only so many software developers out there with the skills needed to breathe life into completely new hardware.

That is where the joy in embedded development is for me—getting completely new hardware to load its first program. Once I get that first LED to blink everything is downhill from there. But increasingly, my work involves Linux systems integration for embedded systems: getting an embedded Linux system to boot faster, integrating MySQL, and recommending an embedded Linux distribution such as Ubuntu or Debian to a client. When I am lucky, I get to set up a GPIO or write a driver—but frequently these tasks are done by the OEM. Today’s embedded ARMs have everything, including the kitchen sink integrated (probably two).

Modern embedded products are being produced with client server architectures by developers writing in Ruby, PHP, Java, or Python using Apache web servers and MySQL databases and an assortment of web clients communicating over an alphabet soup of protocols to devices they know nothing about. Often, the application developers are working and testing on Linux or even Windows desktops. The time and skills needed to value engineer the software to accommodate small savings in hardware costs do not exist. When clients ask for an embedded software consultant, they are more likely after an embedded IT expert, rather than someone who writes device drives, or develops BSPs.

There will still be a need for those with the skills to write a TCP/IP stack that uses 256 bytes of RAM on an 8-bit processor, but that growing market will still be a shrinking portion of the even faster growing embedded device market.

The future of embedded technology is more of everything. We’ll require larger and more powerful systems, such as embedded devices running full Linux distributions like Ubuntu (even if they are in systems as simple as a pet treadmill) because it’s the easiest, most affordable solution with a fast time to market.

David Lynch owns DLA Systems. He is a software consultant and an architect, with projects ranging from automated warehouses to embedded OS ports. When he is not working with computers, he is busy attempting to automate his house and coerce his two children away from screens and into the outdoors to help build their home.

Skkynet Cloud Systems recently opened registration for its Secure Cloud Service, giving system engineers and managers of industrial, embedded, and Internet of Things (IoT) systems quick and easy access to a secure, end-to-end solution for networking data in real time. The Secure Cloud Service enables bidirectional supervisory control, integration, and sharing of data with multiple users, and real-time access to selected data sets in a web browser. The service is capable of handling over 50,000 data changes per second per client, at speeds just a few milliseconds over Internet latency.

First opened on a trial basis for selected customers in August 2014, the Secure Cloud Service has been used extensively, and rigorously tested for performance and security. During that time Skkynet has enhanced the system technically by increasing the range of connectable embedded devices and the number of supported data protocols, as well as automating the customer registration process.

Skkynets Secure Cloud Service allows industrial and embedded systems to securely network live data in real time from any location. Secure by design, it requires no VPN, no open firewall ports, no special programming, and no additional hardware.

ACCES I/O Products has announced the release of a new USB high-speed arbitrary waveform output board with flexible ranges and configurable digital I/O lines. Industry-standard BNC connectors are used for the analog waveform output and the gate control input, while the utility digital I/O lines are accessed via a 16-pin shrouded connector.

Arbitrary waveform generation capability becomes increasingly necessary as CPUs are burdened with a greater abundance of complex tasks. An arbitrary waveform is a user-defined set of digital values specified point by point over time. These values are then clocked through a DAC to provide the analog output signal or generate the waveform. Virtually any waveform can easily be created using the software tools provided by ACCES and also by third-party software packages such as LabVIEW. The ARB relieves some of the load placed on the CPU by handling the waveform timing at the hardware level, using an on-board FIFO and control logic. This is especially useful in time-critical applications as outputs remain unaffected by latencies inherent in popular operating systems. High-quality analog waveforms provide for robust self-test functionality, and flexible stimulation or simulation of scientific or industrial test equipment.

The USB-AO-ARB1 was designed to be used in rugged industrial environments but is small enough to fit nicely onto any desk or testing station. The board measures just 3.550″ × 3.775″ and ships inside a steel powder-coated enclosure with an anti-skid bottom. A DIN rail mounting provision is available for installation in industrial environments. What makes the OEM USB/104 option unique is that its PCB size and pre-drilled mounting holes match the PC/104 form factor (without the bus connections). This ensures easy installation using standard standoffs inside most enclosures or systems. The board can be added to the top or bottom of any PC/104, PCI-104, or PCI/104-Express stack by connecting it to a USB port usually included on-board with embedded CPU form factors.

The USB-AO-ARB1 utilizes a high-speed custom function driver optimized for a maximum data throughput that is thousands of times faster than the USB human interface device (HID) driver used by many competing products. This approach maximizes the full functionality of the hardware along with capitalizing the advantage of high-speed USB. The USB-AO-ARB1 is supported for use in most operating systems and includes a free Windows and Linux (including Mac OS X) compatible software package. This package contains sample programs and source code in Visual Basic, Delphi, and Visual C++ for Windows. Also provided is a graphical setup program in Windows. Linux support includes installation files and basic samples for programming from user level via an open source kernel driver. Third party support includes a Windows standard DLL interface usable from the most popular application programs, and includes LabVIEW 8.5+ VIs. Embedded OS support includes Windows Xpe, WES7, etc.

The 72-Mbit QDR-II+ SRAMs deliver industry-leading throughput performance up to 36 Gbps by leveraging the ability to read and write data simultaneously. This throughput, combined with complete random access of data and free memory controllers for FPGAs, enables reconfigurable computing platforms that allow satellites to be reprogrammed while in space. The devices also feature the industry’s lowest latency and are ideal for radar and networking applications used in space

Both new SRAM families employ Cypress’s patented RadStop technology, which enables uncompromised functionality in the face of radiation up to 300 krads. The devices are manufactured in the Cypress’s fabrication facility in Bloomington, Minnesota, which is Microelectronics Trusted Category 1A accredited.

The radiation-hardened 4-Mbit devices deliver access times of 10 ns at 85°C and 12 ns at 125°C. They are also the first 90-nm, QML-V qualified devices of their kind and are ideal for a wide range of space and military applications.

Cypress’s RadStop technology combines manufacturing process hardening and proprietary design techniques. With RadStop technology, the SRAMs deliver single event latch-up immunity and single event functional interrupt immunity at temperatures as high as 125°C.

The Rad-Hard 72-Mb QDR-II+ SRAMs are available in a 165-column grid array (CGA) package. The devices come in the following four part numbers and configurations with equivalent Defense Supply Center Columbus (DSCC) part numbers: