Power Integrity for I/O Interfaces: With Signal Integrity/ Power Integrity Co-Design

Description

This is the Safari online edition of the printed book.

Foreword by Joungho Kim

The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts

In this book, three industry experts introduce state-of-the-art power integrity design techniques for today’s most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability.

After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics.

Coverage includes

• The exponentially growing challenge of I/O power integrity in high-speed digital systems

• PDN noise analysis and its timing impact for single-ended and differential interfaces

• Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity

• Time domain gauges for designing and optimizing components and systems

Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.

Table of Contents

Foreword by Joungho Kim xiii

Preface xv

About the Authors xxi

Chapter 1 Introduction 1

1.1 Digital Electronic System 1

1.2 I/O Signaling Standards 2

1.2.1 Single-Ended and Differential Signaling 3

1.3 Power and Signal Distribution Network 5

1.4 Signal and Power Integrity 6

1.5 Power Noise to Signal Coupling 8

1.5.1 SSO 9

1.5.2 Chip-Level SSO Coupling 9

1.5.3 Interconnect Level SSO Coupling 10

1.6 Concurrent Design Methodology 12

References 13

Chapter 2 I/O Interfaces 15

2.1 Single-Ended Drivers and Receivers 15

2.1.1 Open Drain Drivers 16

2.1.2 Push-Pull Driver and Receiver 17

2.1.3 Termination Schemes for a Single-Ended System 18

2.1.4 Current Profiles in a Push-Pull Driver 18

Push-Pull Driver with CTT 19

Push-Pull Driver with Power Termination 22

2.1.5 Noise for Push-Pull Driver 25

2.2 Differential Drivers and Receivers 26

2.2.1 Termination Schemes for Differential System 28

2.2.2 Current Profiles in Half Differential Driver 30

2.2.3 Noise for Half Differential Driver 32

2.3 Prior Stages of I/O Interface 34

References 35

Chapter 3 Electromagnetic Effects 37

3.1 Electromagnetic Effects on Signal/Power Integrity 37

3.2 Electromagnetic Theory 39

3.2.1 Maxwell’s Equations 40

3.3 Transmission Line Theory 46

3.4 Interconnection Network Parameters: Z,Y,S and ABCD 55

3.4.1 Impedance Matrix [Z] 56

3.4.2 Admittance Matrix [Y] 57

3.4.3 The Scattering Matrix [S] 57

3.4.4 The Scattering Matrix [S] with Arbitrary Loads 59

3.4.5 Relation Between Scattering Matrix [S] and Y/Z/ABCD Matrix 61

3.5 LTI System 64

3.5.1 Reciprocal Network 64

3.5.2 Parameter Conversion Singularity 64

3.5.3 Stability 65

3.5.4 Passivity 65

3.5.5 Causality 67

References 67

Chapter 4 System Interconnects 69

4.1 PCB Technology 69

4.2 Package Types 70

4.3 Power Distribution Network 73

4.3.1 PCB PDN 73

Power Supply 74

DC/DC Converter 75

PCB Capacitors 76

PCB Power/Ground Planes 81

Impact of Vias 87

Stitching Domains Together 90

4.3.2 Package Power Distribution Network 92

4.3.3 On-Chip Power Network 93

Intentional Capacitors 94

Unintentional Capacitors 96

4.4 Signal Distribution Network 97

4.4.1 PCB/ Package Physical Signal Routing 97

Microstrip Line 97

Stripline 100

Co-Planar Waveguide 101

Coupled Lines 102

4.4.2 Package Signal Distribution Network 107

4.4.3 PCB/Package Material Properties 108

Electrical Properties of Metal 108

Electrical Properties of Dielectrics 110

Frequency-Dependent Parameters of Microstrip Line 111

4.4.4 On-Chip Signal Network 112

4.5 Interaction Between Interconnect Systems 115

4.5.1 Reference, Ground, and Return Paths 116

4.5.2 Referencing: Single-Ended and Differential Signaling 116

4.5.3 Power to Signal Coupling 118

4.6 Modeling Tools for the PDN and Signal Networks 119

References 122

Chapter 5 Frequency Domain Analysis 127

5.1 Signal Spectrum 128

5.1.1 Fourier Transform Interpretation 132

5.1.2 Important Properties of the Fourier Transform 134

Interpreting and Using Frequency Domain Representations of Waveforms 134