Nehalem is due to debut next year, around 12 months after the first 45nm Core 2 chips, based on the 'Penryn' architecture, arrive. Penryn's the focus at IDF, but Otellini did let a few new Nehalem details slip out.

Photography of the Nehalem die indicates it's a native quad-core part, the first time Intel has produced such a chip, though as with current quad-core CPUs, two Nehalem dies will be packaged together into an octo-core part.

Intel announced in March this year that Nehalem will see the re-introduction of simultaneous multi-threading, branded in the past by Intel as HyperThreading (HT). Otellini re-iterated that, but Nehalem's chief architect, Glenn Hinton, also revealed that the processor will incorporate technology to better help it handle single-threaded applications, of which there are still plenty, despite the arrival of HT and, more recently, multi-core CPUs.

Hinton named Nehalem's new processor interconnect technology: QuickPath Interconnect (QPI). It's intended to make it easier for computer makers to build multi-processor systems. Indeed, Otellini and Hinton both described Nehalem as a very modular architecture designed to make it easy for Intel to use it as a template for a wide range of products with different core counts, cache sizes, IO options and power envelopes.

QuickPath is the name for what was previously called Common System Interconnect (CSI) even after the QuickPath name slipped out in August this year.

Hinton re-iterated Nehalem's inclusion of a "high performance... low latency" memory controller. More interestingly, he said the architecture enables real-time reconfiguration of the CPU's resources: cores can be turned on and off, as can each of the core's two thread handlers, and blocks of cache.

The architcture's design was completed less than a month ago, and wafers are coming out of Intel's development fabs. Otellini claimed Nehalem is "on track" for an H2 2008 introduction.