There have recently been more and more reports on CMOS integrated circuits operating at terahertz (≥ 0.1THz) frequencies. However, design environments and techniques are not as well established as for RF CMOS circuits. This paper reviews recent progress made by the authors in terahertz CMOS design for low-power and high-speed wireless communication, including device characterization and modeling techniques. Low-power high-speed wireless data transfer at 11Gb/s and 19pJ/bit and a 7-pJ/bit ultra-low-power transceiver chipset are presented.