PIC32 devices with the microAptiv™ or M5150 MPU core include a Memory Management Unit (MMU) that uses a Translation Lookaside Buffer (TLB) to translate a virtual page address to a physical page address. This feature is used by operating systems to manage multiple tasks running in the same virtual memory, by mapping them into separate physical memory locations. The MMU can also provide protection of physical memory areas and define the cache protocol. PIC32 devices with the microAptiv™ or M5150 MPU core support page sizes from 4 KB to 1 MB.

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