tag: AXI Coherency Extensions

By Ann Steffora Mutschler
Chip interconnect protocol requirements are evolving as designs move to 20nm and below process geometries, and not always in predictable ways.
At least part of this is being driven by what an SoC is used for. The continued push to shrink features opens up real estate at each new process node. For the past decade, that real estate has been used to add more featu... » read more