NIST ‘Stress Tests’ Probe Nanoscale Strains in Materials

Researchers at the National Institute of Standards and Technology (NIST) have demonstrated their ability to measure relatively low levels of stress or strain in regions of a semiconductor device as small as 10 nanometers across. Their recent results* not only will impact the design of future generations of integrated circuits but also lay to rest a long-standing disagreement in results between two different methods for measuring stress in semiconductors.

Confocal Raman microscopy image of stress in a silicon crystal caused by indentation with a 20 micrometer long wedge. The image does not show the silicon but rather the magnitude of stress in the crystal, with compressive stress around the wedge going up from the base line. Vampiric red “fangs” reveal tensile stress associated with cracking at the ends of the indentation.Click image to retrieve animated “fly-by” of image in avi format (large file). AVI clips require Windows Media Player (or equivalent), a free download – click here.

Mechanical stress and strain in semiconductors and other devices is caused by atoms in the crystal lattice being compressed or stretched out of their preferred positions, a complex—and not always harmful—phenomenon. Stress in the underlying structure of light-emitting diodes and lasers can shift output colors and lower the device’s lifetime. Stress in microelectromechanical systems can lead to fracture and buckling that also truncates their lifespan. On the other hand, stress is deliberately built into state-of-the-art microcircuits because properly applied it can increase the speed of transistors without making any other changes to the design. “Stress engineering has allowed the semiconductor industry to increase the performance of devices well beyond what was expected with the current materials set,” said NIST research physicist Robert Cook, “thus avoiding the significant engineering problems and expense associated with changing materials.”

Both the good and the bad stresses need to be measured, however, if they’re to be controlled by device designers. As the component size of microcircuits has become smaller and smaller, this has become more difficult—particularly since two different and widely used methods of stress measurement have been returning disparate results. One, electron back scattered diffraction (EBSD), deduces underlying stress by observing the patterns of electrons scattered back from the crystal planes. The other, confocal Raman microscopy (CRM), measures minute shifts in the frequency of photons that interact with the atomic bonds in the crystal—shifts that change depending on the amount of stress on the bond. The NIST team used customized, highly sensitive versions of both instruments in a series of comparison measurements to resolve the discrepancies.

The key issue, they found, was depth of penetration of the two techniques. Electron beams sample only the top 20 or 30 nanometers of the material, Cook explained, while the laser-generated photons used in CRM might penetrate as deep as a micrometer or more. The NIST researchers found that by varying the wavelength of the Raman photons and positioning the focus of the microscope they could select the depth of the features measured by the Raman technique—and when the CRM was tuned for the topmost layers of the crystal, the results were in close agreement with EBSD measurements.

The NIST instruments also demonstrate the potential for using the two techniques in combination to make reliable, nanoscale measurements of stress in silicon, which enables device developers to optimize materials and processes. EBSD, although confined to near-surface stress, can make measurements with resolutions as small as 10 nanometers. CRM resolution is about 10 times coarser, but it can return depth profiles of stress.