Hi All,
We are trying to use 4 USRPs to extract the phase information due to
differences in positions of the antennas.
In a standard communications system an internally generated carrier is
locked IN PHASE with the incoming signal to perform downconversion (see
Figure 1.).
http://old.nabble.com/file/p27838821/Fig%2B1%2BUSRP%2Bv2.jpg
As mentioned above we are using 4 USRPs to receive a signal from a single
source. We wish to retain the phase information of this signal between boxes
due to the different positions of the antennas. We feed all 4 boxes with a
clock reference signal (10MHz, 1.5Vpk-pk), so that their internal clocks
should be locked in phase with respect to each other. Are the internally
generated carriers generated using this clock as a phase reference, i.e. is
it correct, that this should also make all the internally generated carriers
have zero phase difference between the boxes instead of locking to the
phases of the incoming signals (see Figure 2.)?
http://old.nabble.com/file/p27838821/Fig%2B2%2BUSRP%2Bv2.jpg
However, when we observe the internal clocks of 4 USRPs they are phase
locked with respect to one another, but THERE IS A PHASE DIFFERENCE BETWEEN
THEM, which is constant for a given power cycle. Does this imply that the
phases of the internally generated carriers are locked to one another, but
also with some NON 0 PHASE difference, i.e. that our actual system looks
like Figure 3?
http://old.nabble.com/file/p27838821/Fig%2B3%2BUSRP%2Bv3.jpg
Thanks,
Valentin.

I assume you are using all USRP2s. There are multiple sources of
ambiguity here.

First, unless you are using a common PPS signal to all systems, using
sync_on_pps, your time samples won't be aligned. Think of it this way
-- everyone's watch is running at the same speed, but everybody thinks
the time is different because you haven't coordinated. That's what the
PPS is for

Second, and this is what Eric mentioned, the PLLs on the daughterboards
will all be locked to the same reference, but they can have an arbitrary
offset which will change every time you tune. The important thing is
that the relative phases don't change with time. This means you can do
MIMO operations, but phased-arrays will require you to calibrate every
time. You can use the TX side of the RFX-series as a signal generate to
do this, but it will take some software.

You didn't tell us what daughterboards you are using. The ones with the
integer-N PLLs (DBSRX, RFX-series) will have a finite number of
possibilities for that phase difference, usually less than 25, and you
can tune in such a way that there is no ambiguity if you are careful.
The fractional-N ones (XCVR2450, WBX) will have an effectively infinite
number of possibilities, but you can still measure it and compensate.

If you are just using the BasicRX or LFRX then you don't have this
problem, you just need to align their DDC oscillators using PPS.