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Abstract

Devices are used in a stored program calculator for selectivity modifying an address loaded into a memory address register by address replacement, indexing and indirect addressing.

Country

United States

Language

English (United States)

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Using Index and Indirect Address Registers

Devices are used in a stored program calculator for selectivity modifying an
address loaded into a memory address register by address replacement,
indexing and indirect addressing.

An ordered set of characters addressed by instruction address register 2
through memory address counter (MAC) 4 is taken from memory 6 and is
transferred via sense amplifier 8 to R register 10. The information in register 10 is
transferred to W register 12 by gates. From register 12 the information is passed
through instruction distributor (ID) 14 and is loaded into instruction registers 16
and into memory address registers 17. As a result of the instruction loading
process, certain bits contained in the coded character configurations stored in
memory are transferred into instruction registers 26 and 28. These bits function
as address controls.

One of these bits is also loaded into the high order position of A address
register 18. The presence of this bit determines that the contents of register 18
will be replaced by the contents of C address register 20. In operation, the
presence of the indicator flag bit causes ID 14 to reverse count direction and hold
the machine in instruction time for additional machine cycles until the address
modification is accomplished. Indirect address control 32 generates signals
which cause the contents of register 20 to be transferred to MAC 4. This signal
also causes register 18 to be reset. Additional signals are generated which
cause the contents of MAC 4 to be written back simultaneously into register 18.
The operation is selective in that the absence of the indicator for either A or B
address prevents the associated signals from being generated and the original
contents of the register for which indicators do not appear are not modified.

Another of the control bits loaded into the high-order position of register 18
determines whether or not the address initially loaded into 18 will be replaced by
the contents of the memory storage location specified by register 18, which
results in an indirect addressing operation. Presence of the indirect address
indicator results in the generatio...