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The Must Read FPGA Book - Secrets Inside

Crockett, Elliot, Enderwitz & Stewart is not a law firm, thank goodness… what you’ll find is that these folks are the authors of the world famous book entitled, now hold on here for a title, this is a creative one “The Zynq Book”, It is free, get your download here. Every designer should have this book no matter what FPGA parts they use. There is also a FREE companion “The Zynq Book Tutorials” when you get to the download page.

Zynq hands down is the most influential FPGA SoC of ALL time. The Zynq Book is already on Amazon’s Top 10 Best Seller list. That really is impressive. Why, because Xilinx SoC is for real and is opening new realms for FPGA design all over the world. A quick Chapter list is below:

And for all of you Dummies Altera also has an ebook out which you can download HERE.

Ok, like any great product the idea and or the concept gets copied. Do not fall into the FPGA marketing hype. Xilinx has skipped the 20nm Zynq and will have a part that will blow your mind at 16nm, blogs coming soon. Why the node skip? Zynq at 28nm will cover your needs and as I said in an earlier blog, the competition at 20nm is not good. Simply adding in an ARM and calling it a SoC is not going to cut it. The point is, Xilinx executes near flawlessly which is proven today by shipping the 20nm UltraScale ahead of all competitors using the same fab (level playing field).

Also, do not fall into the marketing trap that you need hard floating point, why if soft gets you what you need without the sacrifice of fixed point? If you use the Arria 10, you will lose 5 TMACs of performance when compared with the Xilinx KU115. Yes, you may get 1.5 TFLOPs from Arria10, and 1.3 TFLOPS from Xilinx at 20nm, but are you willing to give up 5 TMACS for that 0.2 TFLOP advantage? The Xilinx KU115 will give you roughly 8.5 TMACS, while the Arria10 comes along with about 3.5 TMACS. Any engineer knows that is not a good deal, especially at least in my realm there is about an 80% fixed point arithmetic to 20% float.

The other marketing angle for the hard float is to appeal to the engineer to say that quantization analysis is just so complicated and hard, so just float your whole design. I frankly find that almost offensive and talking down to the world’s best designers of systems. Do marketing people really think that world class engineers do not know how to design systems? Try floating a CIC filter… Yikes. Bottom line, Floating point is not free and it will cost you in performance, hard or soft.

Not only does Xilinx have the silicon advantage, but the best tools to program using a higher level language. Altera can hype all they want about their OpenCL solution, the proof will be in the pudding, and one will see that Xilinx’s OpenCL solution will in fact be many times better. Chapter 15, Vivado HLS is my favorite chapter. I will keep saying this but Vivado HLS is simply the tool of the decade and will only keep getting better. Xilinx acquiring AutoESL to buy Autopilot was simply genius. All the blogs, PowerPoint, videos may not convince you but try the tool, and you will not be disappointed, especially if you are a VHDL/Verilog code monkey like me. Enjoy the free book and show the world what your Zynq can do!