As seen above, the presence of an intermediate buffer makes disabling interrupts during each timer register access unnecessary.

Reason for intermediate buffer When accessing while the timer is in operation without an intermediate buffer, there is a difference in access time between the high and low timer registers, during which the timer counter may advance. If that happens, expected setting or read values will not be obtained. In order to avoid this sort of problem, the timer registers are accessed in 16-bit units via an intermediate buffer.