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AR# 3224

FPGA Express 2.x/3.0: Comparators may not infer carry logic

Description

Keywords: Express, compare, comparator, Verilog, VHDL, carry logic

Urgency: Standard

General Description:FPGA Express versions 2.x and 3.0 implement large comparators using generalcombinatorial logic only by default, instead of using carry logic optimizedfor Xilinx devices along with the required combinatorial logic.

Straight combinatorial logic may take up less space (fewer LookUp Tables), butwill run slower and have less predictable timing than an implementation usingcarry logic.

This issue has been resolved with version 3.1 of FPGA Express.

Solution

To force FPGA Express infers carry logic, use the following syntax when describing compare functionality.