The Cryomodule-On-Chip (CMOC) simulation engine is a Verilog implementation of a cryomodule model used for Low-Level RF development for superconducting cavities. The model includes a state-space model of the accelerating fields inside a cavity, the mechanical resonances inside a cryomodule as well as their interactions. The implementation of the model along with the LLRF controller in the same FPGA allows for live simulations of an RF system. This allows for an interactive simulation framework, where emulated cavity signals are produced at the same rate as in a real system and therefore providing the opportunity to observe longer time-scale effects than in software simulations as well as a platform for software development and operator training.

The European XFEL is a 3.4km long X-ray Free Electron Laser. The accelerating structure consists of 96 cryo modules running at 1.3 GHz with 10 Hz repetition rate. The injector adds two modules running at 1.3 and 3.9 GHz respectively. The cryo modules are operated at 2 Kelvin. Cold compressors (CCs) pump down the liquid Helium to 30 mbar which corresponds to 2 Kelvin. Stable conditions in the cryogenic system are mandatory for successful accelerator operations. Pressure fluctuations at 2 K may cause detuning of cavities and could result in unstable CC operations. The RF losses in the cavities may be compensated by reducing the heater power in the liquid Helium baths of the nine cryogenic strings. This requires a stable readout of the current RF settings. The detailed signals are read out from several severs in the accelerator control system and then computed in the cryogenic control system for heater compensation. This paper will describe the commissioning of the cryogenic control system, the communication between the control systems involved and first results of machine operations with the heat loss compensation in place.

After 20 years successful operation of SPring-8, the third generation synchrotron radiation facility, maintaining old analogue modules of LLRF system tend to be difficult. Meanwhile a digital technology like FPGA, fast ADC/DAC become popular. We decided to replace the old analog LLRF system with modern MTCA.4 based one. Prior to replacing the system, we planed to examine the performance of the new system at an RF test stand. An AMC digitizer and a RTM vector modulator were introduced. A feedback control function was reproduced in the FPGA of the digitizer. We also adopted EtherCAT for relatively slow control, such as a motor control for cavity tuner and monitoring of a vacuum pressure. In addition to developing the new hardware of MTCA.4, we were developing a new data acquisition system and a new MQTT based messaging system for an integrated control framework of SPring-8 and SACLA, the X-ray free electron laser facility. To prove feasibility of new control system, it was implemented at the RF test stand. As the result of high power RF operation, we achieved demanding stability of RF in the cavity. We also confirmed that new software framework was enough to control LLRF system.

For the SPES project at Legnaro National Laboratories (LNL), a Low-Level Radio Frequency (LLRF) has been designed to have flexibility, reusability and an high precision. It is an FPGA-based digital feedback control system using RF ADCs for the direct undersampling and it can control at the same time eight different cavities. The LLRF system was tested on the field with an accelerated beam. In the last year some improvements on the firmware, software and hardware of the control system have been done. In this paper the results carried out in the more recent tests, the future works and the upgrades of the system will be detailed.

The HIE-ISOLDE Linac (High Intensity and Energy) is a recent upgrade to the ISOLDE facility of CERN, increasing the maximum beam energy and providing means to explore more scientific opportunities. The main software tools required to set up the new superconducting post-accelerator and to characterise the beam provided to the experimental stations will be presented in this paper. Emphasis will be given to the suite of applications to control all beam instrumentation equipment which are more complex compared to the ones in the low energy part of ISOLDE. A variety of devices are used (Faraday cups, collimators, scanning slits, striping foils and silicon detectors). Each serves its own purpose and provides different information concerning the beam characteristics. Every group of devices required a specific approach to be programmed.

Funding:Work supported by Brookhaven Science Associates, LLC under Contract No. DE-SC0012704 with the U.S. Department of Energy.Schottky monitors are used to determine important beam parameters in a non-destructive way. In this paper we present improved processing of the transverse and longitudinal Schottky signals from a hi-Q resonant 2.07 GHz cavity and transverse signals from a low-Q 245 MHz cavity with the main focus on providing the real-time measurement of beam tune, chromaticity and emittance during injection and ramp when the beam condition is changing rapidly. The analysis and control is done in python using recently developed interfaces to Accelerator Device Objects.

Funding:Work supported by the U.S. Department of Energy Office of Science under Cooperative Agreement DE-SC0000661.The FRIB, is a new heavy ion accelerator facility currently under construction at Michigan State University. It is being built to provide intense beams of rare isotopes. The low level controls system integrates a wide variety of hardware into an EPICS/PLC based control system. This paper will present the challenges encountered with resulting hardware interfaces, and lessons learned that can be applied to future projects. These challenges include both technical design and project management challenges that are encountered when integrating hardware from other departments.

The LCLS-II facility currently under construction at SLAC will be capable of delivering an electron beam at a rate of up to almost 1MHz. The BPM system (and other diagnostics) are required to acquire time-stamped readings for each individual bunch. The high rate mandates that the processing algorithms as well as data exchange with other high-performance systems such as MPS (machine-protection system) or bunch-length monitors are implemented with FPGA technology. Our BPM-processing firmware builds on top of the SLAC "common-platform" [*] and integrates tightly with core services provided by the platform such as timing, data-buffering and communication channels.* "The SLAC Common-Platform Firmware for High-Performance Systems"; submission #3014 to ICALEPCS 2017.

Funding:Work supported by Polish Ministry of Science and Higher Education, decision number DIR/WK/2016/03This paper describes the requirements, architecture, and measurements results of the local oscillator (LO) board prototype. The design will provide low phase noise clock and heterodyne signals for the 704.42 MHz Cavity Simulator for the European Spallation Source. A field detection has critical influence on the simulation's performance and its quality depends on the quality of the two aforementioned signals. The clock frequency is a subharmonic of the reference frequency and choice of the frequency divider generating the clock signals is discussed. The performance of selected dividers was compared. The LO frequency must be synthesized and frequency synthesis schemes are investigated. Critical components used in the direct analog scheme are identified and their selection criteria were given.

At the European Spallation Source it is foreseen to use around 120 superconducting cavities operating at 704.42 MHz. Each cavity will require an individual LLRF control system, that needs to be tested before the installation inside the accelerator. Testing of all systems using the real superconducting cavities would be very expensive and in case of a failure can lead to serious damages. To lower the testing cost and avoid potential risks it is planned to design and build a device that simulates the behavior of a superconducting cavity. The cavity simulator will utilize fast data converters equipped with an RF front-end and a digital signal processing unit based on a high performance FPGA. In this paper conceptual design of hardware and firmware will be presented.

Funding:This work was supported by the LCLS-II Project and the U.S. Department of Energy, Contract n. DE-AC02-76SF00515The SLAC National Accelerator Laboratory is building LCLS-II, a new 4 GeV CW superconducting (SCRF) linac as a major upgrade of the existing LCLS. The SCRF linac consists of 35 ILC style cryomodules (eight cavities each) for a total of 280 cavities. Expected cavity gradients are 16 MV/m with a loaded QL of ~ 4 x 107. Each individual RF cavity will be powered by one 3.8 kW solid state amplifier. To ensure optimum field stability a single source single cavity control system has been chosen. It consists of a precision four channel cavity receiver and two RF stations (Forward, Reflected and Drive signals) each controlling two cavities. In order to regulate the resonant frequency variations of the cavities due to He pressure, the tuning of each cavity is controlled by a Piezo actuator and a slow stepper motor. In addition the system (LLRF-amplifier-cavity) was modeled and cavity microphonic testing has started. This paper will describe the main system elements as well as test results on LCLS-II cryomodules.