ATM Chip Database

STAF

The STAF VLSI device is a SONET/SDH transceiver and framer.
It combinesmultiplexing, demultiplexing, SONET/SDH framing, clock synthesis PLL,and loopback functions in a single monolithic integrated circuit.Implementation with the STAF requires only a simple external RC loopfilter and standard TTL and ECL power supplies. For optimalperformance, the STAF is packaged in a 68-pin multi layer ceramic (MLC)surface-mount package with an integral CuW heat spreader. The STAFprovides physical interfaces for STS12/STM4 (622.08-Mbit/s) orSTS3/STM1 (155.52-Mbit/s) SONET/SDH systems.The STAF meets ANSI, Bellcore, and ITU requirements for a SONET/SDHdevice. With a 51.84-MHz reference clock, the phase-locked loop (PLL)provides 77.76MHz or 19.44-MHz output for the multiplexer and 77.76MHzor 19.44MHz and 51.84-MHz output for the demultiplexer.