ZYNQ Training - Session 07 part III - AXI Stream in Detail (RTL Flow)

In this video we create an example axi stream signal processing pipeline. In contains the Sample Generator AXI Stream unit, an asynchronous AXI Stream FIFO, AXI Stream FFT block, and then AXI DMA which receives AXI Stream and converts it to AXI memory mapped. AXI DMA is connected to HP0 post of the ZYNQ PS. We show how to build this pipeline inside Vivado.