Phenom FX in the Works, AMD to take Another shot at...Kentsfield

Where are you getting me saying they don't make a squat of difference? I never said that. I said they aren't a big enough difference. They are differences Intel can easily counter at this point.

Releasing more cores in a single package can and will help, but Intel can do that as well, so that point is moot too.

If AMD is sticking with the K10 arch, I fear their only hope is that Intel hits a wall with their Core 2 arch, like they did with P4.

Keep in mind, I'm speaking of this purely from a performance perspective. I've not brought price into this, which is where AMD can make up the difference. (which they finally have with the current round of Phenom price cuts)

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good point on the price (amd is well known for that anyway).

Intel has already hit a wall as they have fully used the cache and have over spilled to L3 cache (copied amd again). have already used the integrated memory controller (copied amd again). so what next (a wall as most say, especially AMD)

They have hit there wall, why do you think they have the next GEN CPU the same architecture as a AMD CPU? OBMC

Only hope AMD have if that the NEXT gen CPU from intel doesn't do as good as everyone says it will.

Food for thought.

AMD AM2 X2 6400 3.2GHz 65nm
AMD AM3 X2 6400 1.9GHz 45nm

Can anyone see it?

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No, i7 is NOT the same arch as AMD. It's a Core2 with an on board MC added, and their version of HT. It still does 4 per clock, whereas AMD does 3. Yes, they copied AMD's ideas for those 2 technologies, but the design of the core itself is a tweaked Core2, which is still a more powerful arch, clock for clock than K8/10/10.5.

Do not confuse chip/package features with the core's architectural design.

Intel i7 has only 12 to 20% max performance on their current cpu`s and none whatsoever in games.

and don't forget how much its going to cost to adapt this new platform from Intel (i7), where as AMD is using the same socket for there server and desktop, meaning amd has already a platform in place for both server/desktop. that's a few points to amd, and their cpu will be cheaper to make and market including higher gains for motherboard makers but cheaper for users as it will use an am2/+ platform (am3 + ddr3 in between)

Intel has already hit a wall as they have fully used the cache and have over spilled to L3 cache (copied amd again). have already used the integrated memory controller (copied amd again). so what next (a wall as most say, especially AMD)

Intel i7 has only 12 to 20% max performance on their current cpu`s and none whatsoever in games.

and don't forget how much its going to cost to adapt this new platform from Intel (i7), where as AMD is using the same socket for there server and desktop, meaning amd has already a platform in place for both server/desktop. that's a few points to amd, and their cpu will be cheaper to make and market including higher gains for motherboard makers but cheaper for users as it will use an am2/+ platform (am3 + ddr3 in between)

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Right, which is why I said even current cpu's are more than enough for games, from both Intel and AMD. There are no gains to be had there any time soon.

trust me when I say Intel will get beat to the 22nm/32nm with AMD and IBM co-developing it, even tsmc claim to be ahead of Intel in 32nm. Intel certainly had the upper hand in these recent transitions but the future is anther story as it clearly defines who will make money and who wont by one simply jumping a step ahead of the rest (which now everybody tom di*k and harry wants to do)

Intel already has 32nm in the works

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and do i remember correctly you saying there isnt much gains in transition

No, i7 is NOT the same arch as AMD. It's a Core2 with an on board MC added, and their version of HT. It still does 4 per clock, whereas AMD does 3. Yes, they copied AMD's ideas for those 2 technologies, but the design of the core itself is a tweaked Core2, which is still a more powerful arch, clock for clock than K8/10/10.5.

Do not confuse chip/package features with the core's architectural design.

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Ok so your telling me that a move to L3 Cache, and the move to a OBMC is not the same Arch as a AMD CPU? and will HT even be in the next i7? Im not saying there goin to be the exact same Arch, but this time more then ever there goin to be very very close. and hello with this new improved arch of AMD's will bring the arch of both CPU's even closer again.

Do not confuse the arch tech of a AMD to a arch tech of a C2D of now, and the similarities that will be of i7.

Ok so your telling me that a move to L3 Cache, and the move to a OBMC is not the same Arch as a AMD CPU? and will HT even be in the next i7? Im not saying there goin to be the exact same Arch, but this time more then ever there goin to be very very close. and hello with this new improved arch of AMD's will bring the arch of both CPU's even closer again.

Do not confuse the arch tech of a AMD to a arch tech of a C2D of now, and the similarities that will be of i7.

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L3 cache, OBMC, HT (called CSI for Intel), are not part of the core arch. They are features of the overall package. I'm referring to the very core of the respective arch's. Intel is ahead there.

AMD used to make up for having a less efficient/powerful core design by incorporating the above mentioned features in their chips, but with Intel readying the release of i7, AMD has lost that advantage (assuming Intel doesn't royally screw it up). They will need to make it up by coming up with a better core.

well core i7 is being launched @ 3.2, and the non extremems are FSB locked, so there is a good chance the FX could be faster @ stock and the rest of the denebs as well or overclock better than there similary priced Corei7 competitors

well core i7 is being launched @ 3.2, and the non extremems are FSB locked, so there is a good chance the FX could be faster @ stock and the rest of the denebs as well or overclock better than there similary priced Corei7 competitors

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The extreme is being launched at 3.2ghz, the other more affordable versions are going to be launched at 2.66 and 2.83ghz. The non extreme's don't have locked qpi (no fsb), all nehalem's are supposedly not going to be very overclockable by raising the external clock, as they become unstable. This just means it will require different methods of oc'ing, namely raising the multi. It remains to be seen whether the lower end's will have locked multi's, so it remains to be seen how they oc.

It's unlikely the 4-cored fx will take on a 8-logical core i7 in multi-tasking, and to me it seems pretty unlikely their architecture will all of the sudden jump from being less efficient than most core 2s to being more efficient than nehalem. i7 after all, is purely core for core speed 15-20% faster than core 2. Oc'ing they could have an advantage maybe if intel is stupid and gets greedy by locking the multi's of the chips people would actually buy, but they're gonna need quite a speed boost to really compete.

L3 cache, OBMC, HT (called CSI for Intel), are not part of the core arch. They are features of the overall package. I'm referring to the very core of the respective arch's. Intel is ahead there.

AMD used to make up for having a less efficient/powerful core design by incorporating the above mentioned features in their chips, but with Intel readying the release of i7, AMD has lost that advantage (assuming Intel doesn't royally screw it up). They will need to make it up by coming up with a better core.

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Nehalem (i7) is only a small step forward in integer performance, and the gains due to slightly Increased integer performance are mostly by the new cache system (Database performance)

It has been established from multiple sources that AMD has done NO Barcelona development after the B3 stepping that fixed the TLB bug. They instead decided (I think correctly) to focus on Deneb/shanghai CPU. The result is that Deneb is more than a simple shrink, more than a stepping evolution, and actually introduces significant (m)architectural changes. The result? With the die shrink and internal changes, using the Barcelona Phenoms as a guide to what speeds Denebs can reach is pointless.

Nehalem (i7) is only a small step forward in integer performance, and the gains due to slightly Increased integer performance are mostly by the new cache system (Database performance)

It has been established from multiple sources that AMD has done NO Barcelona development after the B3 stepping that fixed the TLB bug. They instead decided (I think correctly) to focus on Deneb/shanghai CPU. The result is that Deneb is more than a simple shrink, more than a stepping evolution, and actually introduces significant (m)architectural changes. The result? With the die shrink and internal changes, using the Barcelona Phenoms as a guide to what speeds Denebs can reach is pointless.

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Are you delusional? I'm being serious. Sure, there's minor tweaks and more cache, that's it. They don't have the time nor the resources to redevelop this failed architecture. Their survival depends on Bulldozer and you can bet they're working day and night on that sucker.

Sure, there's minor tweaks and more cache, that's it. They don't have the time nor the resources to redevelop this failed architecture. Their survival depends on Bulldozer and you can bet they're working day and night on that sucker.

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Thank you. That's the point I have apparently failed to get across so far.

Originally Posted by X1REME View Post
Nehalem (i7) is only a small step forward in integer performance, and the gains due to slightly Increased integer performance are mostly by the new cache system (Database performance)

It has been established from multiple sources that AMD has done NO Barcelona development after the B3 stepping that fixed the TLB bug. They instead decided (I think correctly) to focus on Deneb/shanghai CPU. The result is that Deneb is more than a simple shrink, more than a stepping evolution, and actually introduces significant (m)architectural changes. The result? With the die shrink and internal changes, using the Barcelona Phenoms as a guide to what speeds Denebs can reach is pointless.

Are you delusional? I'm being serious. Sure, there's minor tweaks and more cache, that's it. They don't have the time nor the resources to redevelop this failed architecture. Their survival depends on Bulldozer and you can bet they're working day and night on that sucker.

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I speak facts where as you speak general talk (personal opinion and nothing more lol)

The text above (by me which you call delusional) is researched from well respected sites e.g toms-anandtech-overclockers-xbit-technews-wikipedia etc. and etc.

if you still disagree which you will am sure, because you have no idea what you're talking about whatsoever, let me point it out for you, since you have not clearly read or even made an attempt to read what I and others have said on page 1 to 12!. I will say it again for your sake but will say it only once ok?. ok, from K8 to k10.5 and well into the future AMD WILL HAVE THE SAME ARCHITECTURE but instead core revisions only did you understand that. since there not bringing anything else out apart from deneb and shanghai still based on the same architecture, its common sense its what they have been working on coz they have been made by amd not anyone else, DUH

wile "Thank you. That's the point I have apparently failed to get across so far".

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right from the start you have been claiming that there is minor revisions only whereas the rest of the world including AMD them selves (who are gonna make the chips) claim big improvements including 45nm which in it self is not minor, then there is the Immersion lithography, 4th generation of strained-silicon, more transistors/pins, ddr3, new leading edge technologies??????, Ultra-low-k Dielectrics, 6mb L3 cache, HyperTransport 3.1, PCIe 3.0. K10.5 rev... Look i could be here all day

Are you delusional? I'm being serious. Sure, there's minor tweaks and more cache, that's it. They don't have the time nor the resources to redevelop this failed architecture. Their survival depends on Bulldozer and you can bet they're working day and night on that sucker.

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lets get to deneb and shanghai first, and not jump to conclusions (Bulldozer) which is more ridiculess then the talk we are having now without someone shouting "wait till there out will yah"

plus there's a chance they could be trashed for something else (e.g hydra) as you have not seen samples nor has anyone else.

right from the start you have been claiming that there is minor revisions only whereas the rest of the world including AMD them selves (who are gonna make the chips) claim big improvements including 45nm which in it self is not minor, then there is the Immersion lithography, 4th generation of strained-silicon, more transistors/pins, ddr3, new leading edge technologies??????, Ultra-low-k Dielectrics, 6mb L3 cache, HyperTransport 3.1, PCIe 3.0. K10.5 rev... Look i could be here all day

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They are still minor revisions in terms of performance. Hi or Low K, immersion litho, 4th gen silicon, etc., etc. doesn't changes the per clock performance of the chip at all. All it changes is the way they stamp them out, and how far they'll be able to shrink them. They are manufacturing advancements, not micro-architecture advancements.

HT3.1 and PCIe 3 aren't going to do a damn thing for performance, when PCIe 2 and the current HT are already overkill, and nowhere near maxed out in desktop environments. The only area that could see a benefit from HT3.1 is multi socketed servers. Nothing will see a boost from PCIe 3 as of yet.

The only things you mentioned that will effect the per clock performance is the higher cache, and possibly DDR3.

Those 2 things will not be enough to push them ahead of (or even to match, for that matter) Intel, clock for clock. Thus, only minor revisions are being made, from a performance standpoint.

They are still minor revisions in terms of performance. Hi or Low K, immersion litho, 4th gen silicon, etc., etc. doesn't changes the per clock performance of the chip at all. All it changes is the way they stamp them out, and how far they'll be able to shrink them. They are manufacturing advancements, not micro-architecture advancements.

HT3.1 and PCIe 3 aren't going to do a damn thing for performance, when PCIe 2 and the current HT are already overkill, and nowhere near maxed out in desktop environments. The only area that could see a benefit from HT3.1 is multi socketed servers. Nothing will see a boost from PCIe 3 as of yet.

The only things you mentioned that will effect the per clock performance is the higher cache, and possibly DDR3.

Those 2 things will not be enough to push them ahead of (or even to match, for that matter) Intel, clock for clock. Thus, only minor revisions are being made, from a performance standpoint.

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they might bring them alot closer though. and if thats the case and AMD really does release a much higher clocked chip ie 4 or 4.4ghz intel wont have anything that can match it until they can release higher clocked chips. so if this is true i see a win win situation for the consumer because no matter what we get higher clocked parts and i'm sure they will get nice and cheap