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AR# 34320

MIG 7 Series and Virtex-6 DDR2/DDR3 - Usage of User Design

Description

This section of the MIG Design Assistant focuses on the usage of the User Design for 7 Series and Virtex-6 DDR3/DDR2 designs. Below, you will find information related to your specific question.

Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243) The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.

Solution

The MIG generated User Design does not include a synthesizable testbench (provided with the Example Design) to generate various traffic data patterns to the memory controller. The User Design is meant to interface to your user logic using the User Interface.