To reconfigure output to the serial port the following commands may be used

>nvset console-write serial
>nvsave
>reset

Upon reset the the system will output to serial console instead of the VGA port.

It should be noted that although output is directed to the VGA port the input defaults to the special "all" driver which allows the above commands to be entered from the serial console even if they cannot be seen.

Are there any specific harddisk model / harddisk drives that cannot be recognised by ABLE?

ABLE should recognise any IDE device that conforms to the ATA specification. ABLE is being continuously improved to work with as many different drives as possible.

If you are experiencing problems in this area we would suggest you upgrade to the latest version of ABLE as shown in the resources page for the EB2410ITX.

If this fails to fix your problem please detailing as much information about your configuration as possible.

An ATX power supply is attached but the system will not power up.

This is an increasingly common issue with modern ATX power supplies. It is usually caused by the small amount of power drawn by the system. A base board with memory and network card installed uses around 5W. Even with a hard disc attached, this may not be enough to reach the supply's required minimum current draw.

The larger the supply the larger the required minimum power use.
Typically, a 250W supply will require a minimum power usage of 10W to
turn on and become stable, whereas a 400W supply may well require 20W,
or more, to start.

A system with no hard disc attached may well struggle to reach the
minumum requirements of a 250W supply and, almost certainly, will not
operate with a 400W supply.

The only solution to this issue is to purchase the smallest rated supply possible and check it has a low minimum power rating.

An ATX power supply is attached but the system is not stable or measured supply voltages are wrong.

This typically means the board and peripherals are not using enough power to keep the supply stable and the supply does not have internal sense to shutdown. This is a similar issue to Q6 but may also have the addition issue that the system may need to draw enough power from a specific voltage rail from which the PSU derives all its other voltages e.g. the system may be drawing 100W from the 5V and 3.3V lines but little from the 12V line and still be unstable if the PSU regulates from the 12V line.

The only solution is either draw more power from the correct voltage lines or replace the PSU.

Using the SIL auxilary power connector to supply 3.3V and 5V the system is unstable or peripherals are not seen

This is typically because the PMU is still trying to control the system as if an ATX PSU were attached, this can be defeated by fitting LK19 - ATX power always on.

How is the JTAG chain configured on the EB2410ITX board?

The chain has two devices, the S3C2410 followed by a Xilinx XC9572XL-TQ100.

The Xilinx XC9572XL-TQ100 has an Instruction Register length of 4, and has a bypass command of 0xF

My JTAG solution does not detect the S3C2410 processor on the board?

The default settings often assume there is only device in the JTAG chain. Software should be configured to place the Xilinx XC9572XL-TQ100 into JTAG bypass mode to allow communication with the S3C2410.

Examples are provided for some specific JTAG solutions on the Resources page (currently for the Abatron BDI1000).

Where do I get an BSDL file for the XC9572XL-TQ100?

Download from the Xilinx website. The files may be found by either searching for "CPLD BSDL Files" or go to the support section, select "software" from the titlebar, and follow the BSDL file link. The BSDL configuration file will be in the XC9500XL zip or tar package.

The S3C2410 has a standard ARM9 JTAG core, as provided by ARM for debug purposes. It also has an additional JTAG scan chain for access to the external pins.

ARM provide an TRM (Technical Reference Manual) for the ARM920T core used at the heart of the S3C2410. DDI0151C from the ARM Website provides information on the JTAG block and how it can be used to access the core debugging and control features.

The S3C2410 external pins are accessed by selecting JTAG scan chain 3. Details of these pins can be found in the S3C2410 BSDL files.

Using the BDI1000 flash programmer, I get the error:

This is due to the ROM write area being at 0x0C000000, not at 0x0. Enter 0C000000 into the "Offset [ ] Hex" dialog box.

What speed should be expected with an BDI1000?

The write should be approximately 50Kbytes/sec with JTAG speed at 6MHz. Faster speeds have not been tested with the BDI1000.

When compiling Linux from the simtec provided patches the build halts with the error "arch.c:42: `MACH_TYPE_BAST' undeclared here (not in a function)"

The is caused because the arch/arm/tools/mach-types file is out of date. This file is an automatically generated and updated, the latest file should be retrieved from the ARM Linux machine registry

Video output is not being used can It be disabled?

To disable video output within ABLE configure fb.enable to false

>nvset fb.enable false
>nvsave
>

Linux will still use the video framebuffer unless it is started with the s3c2410fb_disable=yes parameter. An example is the "installs.sh" script that is used to perform debian installs using only the serial port.

The silver and bronze specification boards have no video, how is Debian installed?

The default install script performs a video install, to perform a serial only install from the Simtec support CD use the installs.sh script. Typically use the command (cd0)installs.sh instead of the default.

To alter the flash several operations need to be performed. If these are not done it is likely programming the flash will fail or write corrupted data.

The secondary NOR flash mapping at 0xc000000 *must* be used for all programming, the lower mapping does not have any write enable capability.

ABLE runs with the MMU on the JTAG programmer you are using needs to disable the MMU before it does its programming, this is typicaly achived by resetting the CPU completely and starting from a unconfigured system.

If the CPU has been reset it *must* have its bank control registers reprogrammed (see page 5-14 of s3c2410 datasheet for details).
BWSCON (0x48000000) must have DW1 set to 16bit width ie bit 4 must be set and bit 5 clear
BANKCON1 (048000008) should be set to 0x3750

To enable programming control register 3 at 0x0E800000 must have bit 0 set, writes will be allowed but simply ignored without this.

The JTAG programmer flash utility should support CFI type 2 programming to erase/program at address 0xc000000

All the setup registers *must* be written in their correct widths.

The complete list of operations to perform to set up the flash for programming are presented in the following table. This demonstrates working values which should be written and their ordering. The operation is one of

WM32 which signifies a 32bit word write to the specified memory location.

WM8 which specifies a single 8bit write to a memory location.

DELAY waits for a given number of miliseconds.

operation

address

value

comment

WM32

53000000

00000000

Disable 3C2410 Watchdog Timer

WM32

4A000008

FFFFFFFF

Disable all interupts

WM32

4C000010

00000000

Configure clock divisor controls

WM32

4C000004

00070022

Configure Main PLL (90MHz)

WM32

4C000008

00078023

Configure USB PLL (48MHz)

DELAY

4C000008

00000064

PLL stabilise

WM32

48000000

22555412

Initialise overall bus configuration (BWSCON)

WM32

48000018

00001550

Setup BANK5

WM32

48000014

00001550

Setup BANK4

WM32

48000010

00003F50

Setup BANK3

WM32

4800000C

00003F50

Setup BANK2

WM32

48000008

00003750

Setup BANK1

WM32

48000004

00002D50

Setup BANK0

WM8

0E800000

00000001

Enable flash write area

Audio recording does not work under Linux 2.4

Release of the Linux kernel prior to 2.4.26-vrs1-bast3 did not
support recording, and erroneously allowed /dev/dsp to be opened
for reading.

2.4.26-vrs1-bast3 now contains support for audio record

My audio recording or playback application cannot set the speed it wants

The S3C2410 does not support two different rates for audio playback and record. If an application is already using the audio system, then any new request to change the audio data-rate will be denied.

Also note, that the audio driver may not support all speeds, see note on supported audio formats in this FAQ.

My audio system has stopped and dmesg shows

An error has occurred between the audio system and the DMA code. A bug
in Linux pre 2.4.26-vrs1-bast3 caused the DMA generation to become locked.

If this error occurs on 2.4.26-vrs1-bast3 or later, please report this to Simtec with the circumstances that cause it.

What support is there in Linux for sound with the EB2410ITX?

The current linux patches support the OSS sound driver model, and will provide audio record and playback support as well as control over the audio mixer.

The mixer supports the following

Volume control of headphone output

Selection of record from line input (CD / External) or Microphone

Record level control of line input source

20dB boost of microphone

The mixer does not support volume control for the line output, which is fixed at standard line levels.

What audio formats are supported by the Linux driver

The driver currently supports the following audio rates:

8000Hz

8021Hz

32000Hz

44100Hz

88200Hz

96000Hz

The only currently supported data format is 16bit, signed stereo linear samples.

Is Linux 2.6 supported on the EB2410ITX

Yes. The support for the EB2410ITX (BAST) and the S3C2410 in general has been developed by Simtec in harmony with the developer community and integrated into the mainline Kernel sources

The mainline kernel source avilable from www.kernel.org has full support for the EB2410ITX. Additional drivers may be contained in the simtec peripheral patch available from the resourses section on the website.

Where is the BIOS?

The EB2410ITX, like all ARM boards, has a bootloader instead of an PC style BIOS.

The S3C2410 SOC datasheet indicates it has two SPI ports are these available?

The primary channel (channel 0) is brought out to the PL14 connector on pins 27-30

How do I use a DHCP server?

ABLE defaults to obtaining its network configuration information from a dhcp server.

The default controller on the EB2410ITX is the Davicom (dm0), which is the socket nearest the edge of the board. This can be changed using the ifconfig command. This command can also be used to manually configure the interface.

The S3C2410 has USB device capability how can it be used?

The pins for the second USB host port (referred to as port 1 in the datasheet) are also wired to the USB device controller.

The port is selected as a device port in the GPIO miscellaneous control register (MISCCR - 0x56000080). Bit 3 (the USBPAD bit) selects between host and device operation.

The device port connector may be wired to pins 2 (data negative),3 (data positive) and 4 (ground) of PL6. Suitable ESD protection is provided on these lines.

The EB2410ITX has a Chrontel CH7006 attached to the LCD port on the S3C2410, how is this controlled?

The Chrontel is attached as outlined in the user guide. and is controlled using the I2C bus.

If not using ABLE to configure the Chrontel a sequence similar to the following should be issued to place the CH7006 into simple VGA DAC mode.

Register (hex)

Value (hex)

Notes

Configure basic VGA settings

03

85

D1->Both

1C

64

1D

45

input clock ctrl

1f

85

input data fmt

53

55

21

09

vga sync, idf bit 3, direct dac connect

22

16

output vga sync on buffclk

20

40

Configure the lvds driver for pll settings

7f

10

lvds fifo errlim

76

AD

pll+fifo on, 1 ch

65

00

not using OpenLDI

64

05

lvds encoding 1

71

AD

pll feedback ctrl

72

AD

pll vco ctrl

73

C8

outputs enable

78

80

pll phase+filter

74

F6

lvds drive 305mV

75

0C

d7=shunt control

49

20

tv/vga dacs on

63

1B

lvds powered

Other pages

Introduction - A general introduction to the Samsung 2410 Evaluation Board.

Specification - A list of all the Samsung 2410 Evaluation Board specifications.