Intel, TSMC Revive EUV Hopes

SAN JOSE, Calif. — In separate talks, Intel and TSMC revealed two new efforts that are rekindling hopes for extreme ultraviolet lithography. EUV has long been seen as one of the most promising tools to ease the mounting complexity of making a future generation of smaller, faster chips.

Intel and TSMC want to use the ultra-fine patterning systems to make their generation of 7 and 10 nanometer chips starting in about 2017. But such aspirations have been dashed many times: EUV was originally targeted at use as early as 2007.

Making chips is "becoming a game of accounting for every nanometer, and that's not possible without a rigorous and mathematically sound approach," said Mark C. Phillips, head lithography engineer for Intel, in an interview with EE Times.

At the SPIE Lithography conference here, Phillips disclosed a new analysis tool under development at ASML for handling edge placement errors in next-generation chips, a growing problem with multiple causes. Just one aspect of the new modeling tool "takes about 10 pages of math to explain," said Phillips who asked ASML to start working on the concept after a meeting last year.

The new modeling tool could be key for so-called complementary lithography, a hybrid approach using existing immersion systems for some jobs and new EUV systems for others, Phillips told us (see chart below). The approach requires using increasingly strict design rules and putting wafers through litho systems multiple times.

Not sure EETimes attended the same papers I attended. I heard both papers, and spoke with several colleaggue. The consensus was universal: all believed in the Semiconductor Engineering version (link above). The papers were anything but a revival.

I haven't seen good cost estimates but that is actually my primary area of experitise these days. I am currently working with several lithography and materials experts on detailed comparisons of all of the alternatives.

I can say that Intel has detailed plans through 10nm and they are forecasting that their cost per die is going to continue to go down ~30% for each of the 14nm and 10nm nodes. Intel is a little bit unique at the moment in that they are doing a full srink at 14nm where many foundries are maintaing the same BEOL for 14/16nm that they have at 20nm