IBM 650

Overview

The IBM 650 occupies a unique place in computer history as the earliest
ancestor of the personal computer. Most computers that came before it were
designed to expand the envelope of computing, and were usually bigger,
faster, and offered more bells and whistles than their predecessors. Often
they were designed for large government agencies with insatiable computing
needs. The IBM 650, on the other hand was designed to be affordable and
easy to use. And compared to what else

was available in the late 1950's, the IBM 650 was:

cheap: It only cost a half a million dollars.

small: It fit in a single room.

user friendly: It was programmed in decimal rather than binary.

IBM sold nearly two thousand units of the IBM 650, and it was the first
computer to make a significant profit for its manufacturer.

Several types of memory were used in first generation computers: mercury
delay lines, electrostatic tubes, magnetic drums, and magnetic cores. Drums
were reliable, but slow, due to the inherent rotational delay. Engineering
Research Associates, which was acquired by Remington Rand in December 1951,
was a leader in drum memory development. The ERA Atlas I, which was delivered
to the US Navy in December 1950, had a drum memory of 16,384 24-bit words.
Core memory was superior to drum memory, but was initially very expensive,
so that for some time the drum continued to be the memory device for small-scale,
lowcost systems.

The Remington Rand product line needed such a system. Both the UNIVAC
I and the 1103 were large systems, selling for about $1 million. IBM's
drum memory 650 computer, announced in 1953, sold for $200,000 to $400,000
and was a great success: more than 1800 were sold or leased. IBM licensed
the drum memory technology from Remington Rand. Reportedly, Remington Rand
settled on that only a few hundred 650s would sell.

Drum Memory

The IBM 650
used a drum memory organized into signed, ten-digit decimal words. The
basic IBM 650 had 2000 words of memory. There were 200 read/write heads
with 50 words per set of 5 heads, with a later option which added 60 words
of core memory where you could store fast loops. Each word could represent
a signed decimal integer or an instruction. An optional floating point
unit with an eight-digit signed mantissa and a two-digit exponent biased
by 50 was available, but the basic unit supported only integer arithmetic,
and many users chose to write their own routines to perform arithmetic
with floating point (real) numbers.

"bi-quinary" notation

Each digit was represented in seven bit "bi-quinary" notation: one bit
out of 5 represented a value from zero to four; one bit out of two indicated
whether or not to add 5 to that value, giving the electronic equivalent
of the abacus. The front panel had rows of lights in groups of five to
display register contents. For example, the integer 281 would be
displayed as indicated below, where a display light of the form 0
is considered OFF, and one of the form * is considered ON.

*

0

0

*

*

0

0

5

0

5

0

5

1

6

1

6

1

*

6

2

*

7

2

7

2

7

3

8

3

*

8

3

8

4

9

4

9

4

9

The complete displays were 10 digits long, with the sign on the right
side, just 2 lights in the same space as a full digit.

Competition: The Remington Rand SOLID STATE

The Remington Rand UNIVAC Solid State computer was developed in response
to the IBM 650. However, the St. Paul division had already announced its
drum memory UNIVAC File Computer in January 1955, and Remington
Rand management feared that announcement of the Solid State would hurt
sales of the File Computer.

The File 1 model with internal program capability finally came out in
August 1958. The File Computer was not a success in the marketplace: fewer
than 200 were sold. In the meantime, management had allowed sales of the
Solid State in Europe, where it was called the Universal Card Tabulating
Machine (UCT). Deliveries there started in 1958. Potential customers in
the U.S. heard about the UCT and put pressure on Remington Rand to sell
it there. The company relented, and American deliveries began in 1959.

The UNIVAC Solid State Computer was priced at $350,000 or leased for
$7000 per month. Since the Solid State was faster and more capable than
the IBM 650, sales were brisk during 1959 and 1960. In June 1959, Remington
Rand announced that it had written an IBM 650 emulator program to
ease conversion. But the market life of the Solid State was cut short by
the announcement of the IBM 1401 in October 1959. For the same price, it
was faster than the Solid State. The pace of sales slowed. Altogether,
about 600 Solid State computers were sold.

Another version of bi-quinary coded decimal, in use on the Solid State
Computer, used four bits (plus a parity bit) to represent a digit. The
bits stood for five, four, two, and one, as indicated in the table below.

5 4 2 1 value

1 1 0 0 9

1 0 1 1 8

1 0 1 0 7

1 0 0 1 6

1 0 0 0 5

0 1 0 0 4

0 0 1 1 3

0 0 1 0 2

0 0 0 1 1

IBM 7070

The IBM 7070 was
a "transistorized 650." There was a 650 simulator available for
the 7070. The 7070 had a machine word of ten decimal digits, plus a sign
that could be positive, negative, or alphabetic. Each digit was represented
by five bits, coded so that two out of the five were on and three off;
if the machine encountered any digit that didn't have two-out-of-five,
it halted immediately.

Instead of the 650's drum memory, the 7070 had 10,000 words of core
memory. Alphabetic information was coded as two decimal digits, so a word
could hold five characters. Physically, the machine was imposing, filling
a large air-conditioned room with six-foot high boxes for the CPU and memory,
tape drives, online card reader and card punch.

Reliability of core was a concern when early machines were first introduced,
and the elaborate two-out-of-five (bi-quinary) coding was designed to meet
those concerns.

IBM 650 Machine CodeAn IBM 650 machine code instruction was of the form: xx yyyy zzzz
where xx was the op code, yyyy was the operand address and zzzz the
address of the next instruction. Thus each instruction contained a jump,
to allow for the possibility of "optimization." If you program a drum machine
with the instructions stored sequentially, you have to wait at least one
drum revolution to read the next instruction. By calculating the expected
execution time for each instruction, you can place the next instruction
at the correct rotation angle around the drum so that it will come up under
a read head when the current instruction is done. Since instructions could
execute in as little as little as 0.3 ms (for an add), versus a drum revolution
time of about 4.8 ms, careful optimization could increase execution speed
by a factor of 5 or more. This is similar to the way in which disk drives
use an "interleave factor" which interleaves logically adjacent sectors
to improve read/write performance.

Instruction words consisted of a two-digit function code, a four-digit
operand address, and the four-digit address of the next instruction. The
address of the next instruction was important in a drum memory environment.
Since the drum was constantly rotating, it would move some distance while
each instruction was being executed. So, to minimize the delay between
instructions, it would be best to have the next instruction positioned
on the drum at the place where the read-write head was when execution of
the current instruction was completed. As a result, instructions which
followed each other in program logic would be scattered around the drum,
not physically next to each other. The manuals for machines gave instruction
timings, so that programmers could try to reduce rotational delays. This
approach was called minimum latency programming. It was complicated by
the need to fetch operands, so that the programmer had to keep in mind
the locations of data and of the next instruction. To aid 650 programmers,
IBM published a memory chart. It had 200 rows and 10 columns, with each
cell representing a word of memory. As you wrote your program, you would
place each instruction and data word in an optimal location and then mark
that memory cell off as used on the chart.

It should be noted that pseudo-code interpreters
L1 and L2 were designed for the IBM650 by Bell Labs in
1955 and 1956 . These were designed to provide a "higher level" interface
for programmers, and produced more compact code than the machine's real
instruction code.

The IBM 650 Open ShopWhat really makes the IBM 650 the ancestor of personal computers is
that it popularized a concept known as "open shop programming." Prior to
the IBM 650, computers were so expensive that most programmers did not
have physical access to them. You handed in a card deck containing your
program and data and got it back with your output some time later. Often
this took several days. Overnight turnaround times were considered good.
With the '650, you were actually given a block of time to work with the
machine. You could run your program, see what went wrong, fix it and try
again. This put control in the hands of the individual programmer. Because
of its cost, the machine was kept busy 24 hours a day. Your time might
be scheduled at 3 a.m, and as well you might be forced to share your block
of time with another programmer. When your program stopped, or went into
a loop (you could tell by the way the lights flickered) you were supposed
to record the console lights, get off and let your partner use the machine
while you looked for the bug. You would have to list your output cards,
it there were any, on a IBM 407 accounting machine. The IBM 650 did not
have a printer.