Title (fr)

Publication

Application

Priority

SE 9801334 W 19980707

SE 9702762 A 19970721

Abstract (en)

[origin: WO9904335A2] The present invention relates to a method of handling conditional jump instructions in a computer processor (1). Space is allocated in a so-called instruction buffer (3) for respective instructions read into the processor. These spaces are given an order which corresponds to the order in which the instructions were read-in sequentially. The last position in the instruction buffer constitutes a read-out position (4). The results obtained when processing respective instructions can be saved in spaces allocated to these instructions in the instruction buffer (3), from which the results can be finally read-out from the read-out position (4).