1) as far as I know, there is no port of minimig to the CycloneV GX board, but there is one for the DE1-SoC, not sure how much help it would be (depends which board matches the CycloneV GX board better)2) the latest source for the minimig-DE1 is on github: https://github.com/rkrajnc/minimig-de1. The minimig-mist port is here: https://github.com/rkrajnc/minimig-mist - this has an updated minimig core with AGA capabilities, but it might be more work to start from this than the DE1 version (YMMV)3) That file is not in the repository, it is supposed to be built from source in /fw/ctrl_boot/ - you will need the openRISC gcc toolchain, or alternatively, use this file: http://meditation.somuch.guru/minimig/f ... l_boot.mif

Let me (us) know if you'll have something working, or feel free to ask for any help here. I might not have time to answer everything, especially in a timely manner, but I will try. Plus there are other very knowledgeable people on this forum that might see your questions.

I would say definitely use the DE1 port as a starting point, not the AGA-enhanced MIST port. The MIST board (like the original Minimig) has a separate ARM coprocessor on board which handles the on-screen menus and disk-drive emulation so if you use the MIST port you're going to have to add a replacement for that coprocessor. The DE1 has no such coprocessor, so the Minimig-DE1 port includes a second CPU as part of the core to handle those functions.

The biggest challenge here I think is going to be RAM. As far as I know all the Minimig ports so far run from single-data-rate SDRAM (except the original Minimig which was SRAM based). The DE1 port uses SRAM for the OSD/disk drive coprocessor, and SDRAM for the Amiga. Your board has SSRAM and DDR3-SDRAM so both memory interfaces are going to need adapting.

@chaos:Thank you for the "ctrl_boot.mif" file. I am having a lot of trouble setting up the OpenRISC GCC toolchain for my version of Linux. It seems a number of requisites have been remove from my distribution's repositories and tracking them down is proving to be tiresome.

@MMrobinsonb65:I agree that the SDRAM to DDR3 conversion is probably going to be the biggest issue.

I concur that the DE1 port is probably the best starting point. I'm not worried about AGA or any other enhanced features at this moment. I just want to get it booting first then I'll worry about adding extra features. I feel this is going to be a slow and laborious process.

@RedskullDCThanks for the info on the HDMI and LPDDR2 example. I will definitely look into it.

I wasn't going to go for the HDMI output right away. I was just going to build a 4-bit VGA interface on the GPIOs to start.

The other issue that concerns me a little is the audio CODEC chip on the Cyclone V GX board is different than the DE1 board. I am hoping to just disable the audio at first until I can get a very minimal system working.

I wasn't going to go for the HDMI output right away. I was just going to build a 4-bit VGA interface on the GPIOs to start.

The other issue that concerns me a little is the audio CODEC chip on the Cyclone V GX board is different than the DE1 board. I am hoping to just disable the audio at first until I can get a very minimal system working.

Hi Brian,

The SSM2603 audio codec on the C5G board is register compatible with the WM8731 found on the DE1.It has a few extra registers to control some extra functionality, but they power up to sane defaults.Audio code should just work without modification.

If you are feeling lazy, you can always get one of these for the video out:http://www.wayengineer.com/index.php?ma ... M84JW-GNhECompatible with the C5G, 8 bits per colour, gives you basically the same video out as a DE2 board.Wire the 4 bits per colour coming out of the minimig code to the top 4 input bits of the ADV7125.I have one, they give a pretty sharp output.

Great to hear the audio CODEC chips are register compatible. That simplifies one aspect of this project. I hadn't gotten around to checking into that yet.

At this point I think I'm just gonna built a small resistor ladder circuit for the VGA. I only need the VGA to initially see some activity. It doesn't have to be sharp, just readable. Once I get a picture via a "slapped together" VGA interface, I'll start working on the HDMI implementation.

Unfortunately, one of the first things I tried has already hit a snag. Instead of trying to re-invent a DDR2 controller, I was planning to use Alter's MegaWizard to build a "hard" DDR2 controller. The MegaWizard process fails with a "dll-close.c:811" error. (It seems to be a library version problem with my distro of Linux.)

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