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40G Ethernet Subsystem low latency mode

I am just making simulation with 40G Ethernet Subsytem IP Core. I red the datasheet, it is written that low latency mode is available. Then I saw below section. And It is written that 153ns latency occurs in this clocking mode.

Then I opened the Open IP Example Design and tracked the clock signals. I made some changes with clocks but in simulation, again there is 304ns between tx_axis_tvalid and rx_axis_tvalid. How can I reduce latency from 304ns to 153ns.