Latency is a critical parameter for customers in the financial sector. By processing the
entire TCP/IP protocol in hardware and tightly integrated with user application processing
unit(s) with stream interfaces, LeWiz reduces the latency of the entire application
(including the TOE functions) down to the nano-second level - several orders of magnitude
than what can be done previously. LeWiz further fine tuned the paths of the design allowing
high clock speed processing over the entire chip for 10Gbps or Gbps rate. The higher clock
speed yields lower latency and faster throughput.

Working with customers in the financial sector, LeWiz enhances its advanced TOE for high
message rate and small payload size usage. Difficult functions such as retransmission,
multi-session management and data ordering are offered as standard parts of LeWiz TOE Core.
Also available is hardware-based, flexible, dynamic filters using the 5-tuples with wild
card support. Such mechanism allows applications in servers to open general session for
server supported services while allowing data transactions only on specific,
user-application accepted sessions. This avoids attacks, filters out unwanted traffic
(eliminate unnecessary processing overhead). It also makes the hardware-based servers
look like software-based systems to the user - just a whole lot faster.

LeWiz's Gen5 TOE Core offers additional advanced functions (not available in others)
such as dynamic health check of remote system or network, and dynamic adaptive calibration
according to network conditions, varying or long distances. These are important in high
reliability, high availability, or mobile applications. LeWiz TOE is a non-blocking design.
It supports multi-processing, direct placement for multi-CPU or multi-thread applications.

With today's programmable chips achieving much larger in logic density and integrated low latency
serdes, LeWiz Gen5 TOE Core is ideal for implementing a complete user application in such devices.
LeWiz implementation solves difficult on-chip routing and timing problems associated with larger
chip sizes. LeWiz TOE Core is self contained and flexible for use with either on-chip stream
interface or off-chip standard bus (such as PCI-express bus) making the core adaptable for
different user applications. Of course, LeWiz TOE Core can also be used for ASICs. The core is
coded using standard RTL language and uses industry standard tools. Its architecture is modular
and scalable from low to high number of sessions suitable for small embedded applications to large
server system applications.

LeWiz provides accelerated high performance IP and network interface cards for network security/analysis,
video streaming, and TCP/IP acceleration used in video, financial, and computing servers, storage and
security systems. LeWiz's products range from Gbps to 10Gbps as standard or customizable products with
acceleration and unique functions and performance advantages. For more information about LeWiz and its
products, please visit .
For more information about LeWiz and its products, please visit http://www.lewiz.com
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