I'm trying to define a string in VHDL with a pair of double quotes in the string itself. However I am unable to do so because the IDE (Xilinx ISE 14.7) only recognizes what's in-between the first pair ...

My team and i are working on a MIPS implementation using Xilinx spartan-6 LX9. We have a short deadline and we want to know what are some useful tips in terms of PCB design that would reduce the risk ...

I need help with displaying a short text on a hdmi display connected to the board (2 characters), I have already experimented with xapp495 but I still don't know how to do this.
I understand that it ...

I would like to know the altera quartus primitive equivalent to the FDCE flip flop on Xilinx ISE. I think that DFFE primitive might work however I am not sure about the CE and CLR pins equivalency. ...

I am using a Xilinx Spartan 3E FPGA kit in my academic project to synthesize a design comprising of a couple of 32 bit internal registers (eg few counters, shifters and some configuration registers) . ...

I'm using a Mimas V2 with a Spartan 6 CSG324 LX9. Trying to teach myself to use Verilog and I've been using this tutorial. I've had no issues running VHDL modules and running just this code Verilog ...

I am at moment trying to store an image onto an FPGA. I calculated the space required by it to be 19200 kb, and are therefor wondering whether i should store it some other way than a 2d array?.. Or ...

I am working on a voice transmission project by using Spartan 3e. My code works just fine. My problem is that I give analogue input to adc side by using a potentiometer and see the changes (as digital)...

I made a FIFO using the Core Generator and I'm trying to implement a code that use it...
1) By putting the switch (T9) ON, I start transmitting some datas to my fifo (Here H-e-l-l-o for test)
2) By ...

I am trying to forward a global clock signal to an output pin. I am using a Spartan SP601 evaluation board, LX16CSG324. Refer to the end of this segment of code. I am using a 2.5 V LVDS differential ...

my SP601 Evaluation Board comes with one 2.5 V LVDS differential 200 MHz Oscillator. Until now, I have only been using the single-ended clock provided with the board. I am having trouble with how to ...

I am trying to compile a project and it takes a very long time to route. - ISE 14.3
In my main module, I am using a package where I have declared an array of constants. These constants use functions ...

I am working on a MIPS CPU for an FPGA - this is mostly a personal project to understand FPGA's.
I have a 5 stage pipeline CPU implementation working correctly when run on iSim, however when I run it ...

I am doing a project on spartan 3 xc3s200 series. I have already programmed it to run a counter. I want to run a dc motor using the same fpga. And I have a motor driver -Ardiuno motor shield(L298P) ...

Spartan 6 clocking resources. The link here refers to the clocking resources of spartan-6 FPGA. I am using the DCM-CLKGEN primitive described in the link, to generate a divide-by-8 clock based on an ...

I want a counter that the Most significant bit toggles every 2 seconds, and gets values 0 and 1.So for example it will have 0 for 2 seconds and after 1 for another 2 seconds etc..
I need it like that ...

I am coding a display control for the Spartan 3E. It has 8 LEDs. When the ALU's state signal (from other block) is "00" the MSBs and LSBs are time-multiplexed for one second each byte. When state is ...

I have designed a circuit by System Generator to implement on FPGA. The output signal is a sinusoidal with changeable frequency. I need to read the output signal by oscilloscope. I should put a DAC at ...

I am using a Spartan 6 xilinx FPGA, I managed to get it all working, changing the multiplier and divisor parameters at runtime. DCM_CLKGEN I use.
My real oscillator is 66.6 MHz, but with PLL_BASE, I ...

While I use the internal clock for DCM clkin input I am getting clk0 as perfect frequency of output same as internal clock but not in remaining o/p pins. I changed from previous coding like this and ...

How to measure input pulse signal's frequency using xilinx toolkit on matlab?
Since I'm bad at coding,I use System generator on matlab.
I'm doing a project, In which I'll be using a Proximity sensor ...

I know how to turn on the fpga LEDS using push buttons and switches. I'm still having trouble figuring out how can I receive a signal from the buttons to the expansion connectors. Also, how should I ...

According to Xilinx FPGA product datasheets, the numbers on the 5th line as 4C or 5I stand for speed grade and temperature.I have a XC3S400 with 4C speed grade (4= standard speed, 5= High performance)....

I am trying to start learning FPGA programming and want to start with XC3S2000 (Spartan III). In table 1 , I see 2M gate count which is much higher than more advanced Spartans and could not find its ...