IBM announces computer memory breakthrough

IBM researchers have successfully stored multiple bits of data in the cells of phase-change memory chip. This will allow the creation of non-volatile memory with as much capacity as NAND flash but with vastly greater performance and longevity for enterprise-class applications.

IBM Thursday announced a breakthrough in computer memory technology, which may lead to the development of solid-state chips that can store as much data as NAND flash technology but with 100 times the performance and vastly greater lifespan.

Currently, NAND flash memory products, such as SSDs, have write rates as high as 2Gbit/sec .

IBM said it has produced phase-change memory (PCM) chips that can store two bits of data per cell without data corruption problems, something that has plagued PCM development from the start.

Like NAND flash memory, which is used in solid state drives (SSDs) and is embedded in computers like Apple's MacBook Air, PCM is nonvolatile -- meaning it retains data after its power supply is shut down.

Unlike NAND flash, PCM memory does not require that existing data be marked for deletion prior to new data being written to it -- a process known to as an erase-write cycle. Erase-write cycles slow NAND flash performance and, over time, wear it out, giving it a lifespan that ranges from 5,000 to 10,000 write cycles in consumer products and up to 100,000 cycles in enterprise-class products.

PCM can sustain up to 5 million write cycles, according to IBM.

"If you can write to flash 3,000 times, that will outlive most cell phones and MP3 players, but that's certainly not good enough for the enterprise that does that in an hour," said Christopher Sciacca, manager of communications for IBM Research in Zurich.

As organizations and consumers increasingly embrace cloud-computing models and services, ever more powerful and efficient, yet affordable storage technologies are needed, according to Haris Pozidis, manager of memory and probe technologies at IBM Research.

Pozidis said that for the past five months, teams of IBM scientists have been testing a multi-level cell (MLC) chip that's capable of storing two and eventually three bits of data, indicating that it can achieve a level of reliability that is suitable for practical applications.

Besides applications for enterprises and in the cloud, PCM may also serve as an extension for DRAM .

While DRAM will continue to be used as the closest memory device to the CPU for the most active data, Pozidis said, PCM, with its greater capacity, can be used less frequently accessed data. "The PCM, which is much larger, acts as a repositor. If the data becomes hot again it will move back to the DRAM," he said.

In another scenario, Pozidis said, the CPU can talk directly to the PCM, but it thinks its talking to the DRAM using a controller. "Again, the hot data speaks to DRAM and not so hot data speaks to the PCM," he said.

DRAM is also expected to hit a technical wall in several years when it reaches lithography sizes of between 20-30 nanometers. One nanometer is roughly the size of four gold atoms.

A nascent technology, PCM is used today as a replacement for NOR, EEPROM, NVRAM memory that are currently manufactured by Micron Technology, Samsung, and South Korea's Hynix Semiconductor.

Current technology is single-level cell (SLC) PCM, which only stores one bit per cell with limited capacity. For example, Samsung produces a 512Mbit PCM chip for its GT-E2550 GSM mobile phone. Micron's Numonyx division makes a 128 Mbit PCM chip and isshipping product to several customers who use it in networking equipment, medical monitoring devices, and security cameras. .

Samsung's PCM RAM chip

PCM uses electrical charges to change areas on a glassy material from crystalline to random or amorphous. The technique uses far less power than NAND flash to store data and it has data write rates up to 100 times faster because it does not first require existing data to be marked for deletion.

PCM leverages the resistance change that occurs in the material -- an alloy of various elements -- when it changes its phase from crystalline - featuring low resistance - to amorphous - featuring high resistance - to store data bits. In a PCM cell, where a phase-change material is deposited between a top and a bottom electrode, phase change can controllably be induced by applying voltage or current pulses of different strengths. These heat up the material, and when distinct temperature thresholds are reached cause the material to change from crystalline to amorphous or vice versa.

IBM scientists said they were able to address the bit error problem associated with MLC PCM memory by using an advanced modulation coding technique, which addresses the problem of short-term drift. Short-term drift is analogous to a problem in NAND flash memory where electrons leak through the thin walls of cells and create data read errors.

In NAND flash, the problem is addressed through the use of error correction code (ECC) in controller chips. But in PCM, data errors are not corrected, but avoided through the use of specialized code.

"With modulation codes you try to avoid the most probable errors. Modulation codes appear today in hard disk drives as well as optical drives such as Blu-ray discs," Pozidis said. "We apply a voltage pulse based on the deviation from the desired level and then measure the resistance. If the desired level of resistance is not achieved, we apply another voltage pulse and measure again - until we achieve the exact level."

IBM scientists achieved a worst-case write latency of about 10 microseconds, which represents a 100x performance increase over even the most advanced flash memory on the market today.

Pozidis said IBM is currently using PCM circuitry that is 90 nanometers in size, or about twice the width of today's densest SLC PCM products. But that too will shrink over time.

IBM is not planning to produce consumer grade products out of PCM, Pozidis said. The main target for the technology is to license it to memory manufacturers, such as Toshiba and Samsung, and help them accelerate the production of the memory chips for enterprise applications.