MOTOROLA MC33219ADW

Order this document by MC33219A/D
The Motorola MC33219A Voice Switched Speakerphone Circuit
incorporates the necessary amplifiers, attenuators, level detectors, and
control algorithm to form the heart of a high quality hands–free
speakerphone system. Included are a microphone amplifier with mute,
transmit and receive attenuators, a background monitoring system for both
the transmit and receive paths, and level detectors for each path. An AGC
system reduces the receive gain on long lines where loop current and power
are in short supply. A dial tone detector prevents fading of dial tone. A Chip
Disable pin permits conserving power when the circuit is not in use. The
volume control can be implemented with a potentiometer.
The MC33219A can be operated from a power supply, or from the
telephone line, requiring typically 3.2 mA. It can be used in conjunction with a
variety of speech networks. Applications include not only speakerphones,
but intercoms and other voice switched devices.
The MC33219A is available in a 24 pin narrow body DIP, and a wide body
SOIC package.
• Supply Voltage Range: 2.7 to 6.5 V
•
•
•
•
•
•
•
•
•
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VOICE SWITCHED
SPEAKERPHONE CIRCUIT
SEMICONDUCTOR
TECHNICAL DATA
24
1
P SUFFIX
PLASTIC PACKAGE
CASE 724
Attenuator Range: 53 dB
24
Background Noise Monitor for Each Path
2 Point Signal Sensing
1
DW SUFFIX
PLASTIC PACKAGE
CASE 751E
Volume Control Range: Typically 40 dB
Microphone and Receive Amplifiers Pinned Out for Flexibility
Microphone Amplifier can be Muted
Mute and Chip Disable are Logic Level Inputs
Chip Deselect Pin Powers Down the Entire IC
PIN CONNECTIONS
Ambient Operating Temperature: –40 to + 85°C
24 Pin Narrow Body (300 mil) DIP and 24 Pin SOIC
CP2
1
24
VCC
XDI
2
23
TAO
CPT
3
22
TAI
TLI
4
21
MCO
TLO
5
20
MCI
VB
6
19
VLC
CT
7
18
MUTE
CD
8
17
RXI
NC
9
16
RXO
CPR
10
15
RAI
RLI
11
14
RAO
RLO
12
13
GND
Simplified Block Diagram
Transmit
Out
Microphone
Mute
VB
Tx Attenuator
VB
BNM
Attenuator Control
BNM
Vol
Cont
DTD
CD
VCC
VB
Speaker
Speaker Amplifier
(Top View)
VB
Rx Attenuator
Reg.
VB
ORDERING INFORMATION
MC33219A
Receive
In
This device contains 384 active transistors.
Device
MC33219ADW
MC33219AP
Operating
Temperature Range
TA = – 40° to +85°C
Package
SOIC
Plastic DIP
 Motorola, Inc. 1995
MOTOROLA ANALOG IC DEVICE DATA
1
MC33219A
MAXIMUM RATINGS
Rating
Symbol
Min
Max
Unit
VCC
– 0.5
7.0
Vdc
Vin
– 0.4
VCC + 0.4
Vdc
TJ
–
+150
°C
Tstg
– 65
+150
°C
Supply Voltage
Any Input
Maximum Junction Temperature
Storage Temperature Range
NOTE: Devices should not be operated at or outside these values. The “Recommended Operating
Conditions” provide for actual device operation.
RECOMMENDED OPERATING CONDITIONS
Characteristic
Symbol
Min
Typ
Max
Unit
VCC
3.5
2.7
–
–
6.5
3.5
Vdc
Maximum Attenuator Input Signal
Vin(max)
–
–
300
mVrms
Volume Control Input (Pin 19)
VINVLC
VB – 1.1
–
VB
Vdc
0
2.0
–
–
0.8
VCC
Supply Voltage (Non–AGC Range)
(AGC Range)
Logic Input Voltage (Pins 8, 18)
Low
High
VINL
Vdc
Operating Temperature Range
TA
– 40
–
85
°C
VB Output Current (VCC = 5.0 V)
IVB
–
See
Figure 12
–
mA
Unit
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 5.0 V, CD ≤ 0.8 V, unless noted. See Figure 2.)
Characteristic
Symbol
Min
Typ
Max
2.0
–
–
3.2
4.2
4.0
5.0
–
–
–
50
–
65
110
145
–
170
–
–
2.1
–
0.9
2.2
3.0
–
2.3
–
POWER SUPPLY
Supply Current (Enabled, CD ≤ 0.8, VB Open)
Idle Mode
Tx Mode
Rx Mode
ICCE
Supply Current (Disabled, CD = 2.0 V, VB Open)
VCC = 3.0 V
VCC = 5.0 V
VCC = 6.5 V
ICCD
VB Output Voltage (IVB = 0, CD = 0)
VCC = 2.7 V
VCC = 5.0 V
VCC = 6.5 V
mA
µA
VB
Vdc
VB Output Resistance (IVB ≤ –1.0 mA)
ROVB
–
600
–
Ω
PSRR @ VB versus VCC, f = 1.0 kHz, CVB = 100 µF
PSRR
–
57
–
dB
–
–
–
150
0
– 100
–
–
–
ATTENUATOR CONTROL
CT Voltage (with Respect to VB)
Rx Mode (VLC = VB)
Idle Mode
Tx Mode
VCT – VB
mV
CT Source Current (Switching to Rx Mode)
ICTR
–110
–90
–70
µA
CT Sink Current (Switching to Tx Mode)
ICTT
35
50
65
µA
CT Idle Current
ICTI
– 3.0
0
3.0
µA
Dial Tone Detector Threshold (with Respect to VB at RAI)
VDT
– 40
– 20
– 8.0
mV
VLC Input Current @
VLC = VB
VLC = VB – 1.0 V
IVLC
–
–8.0
0
–6.0
–
–3.0
VLC Input Resistance
RVLC
–
167
–
2
µA
kΩ
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 5.0 V, CD ≤ 0.8 V, unless noted. See Figure 2.)
Characteristic
Symbol
Min
Typ
Max
Unit
ATTENUATORS
Receive Attenuator Gain (f = 1.0 kHz)
Full Volume
Rx Mode
Tx Mode
Idle Mode
Range (Rx to Tx Mode)
dB
GRX
GRXT
GRXI
∆GRX
3.0
– 49
– 28
50
6.7
– 46
– 25
53
9.0
– 43
– 22
56
Volume Control Range
(Rx Mode Only, VLC Varied from VB to (VB – 1.0 V))
VCR
34
40
46
dB
AGC Attenuation Range
(VCC = 3.5 to 2.7 V, Receive Mode Only, VLC = VB)
GAGC
20
26
36
dB
GTX
GTXR
GTXI
∆GTX
3.0
– 49
–19
50
6.7
– 46
–16
53
9.0
– 43
–13
56
–
–
2.5
0.7
–
–
–
–
–
120
0
–10
–
–
–
–
–
–
0
– 8.0
70
–
–
–
Transmit Attenuator Gain (f = 1.0 kHz)
Tx Mode
Rx Mode
Idle Mode
Range (Tx to Rx Mode)
dB
RAO, TAO Output Current Capability
VCC ≥ 3.0 V
VCC < 3.0 V
IOATT
RAO Offset Voltage with Respect to VB
Rx Mode
Idle Mode
Tx Mode
VRAO
TAO Offset Voltage with Respect to VB
Rx Mode
Idle Mode
Tx Mode
VTAO
mA peak
mVdc
mVdc
RAI, TAI Input Impedance (Vin < 300 mVrms)
RINATT
–
100
–
kΩ
RAI, TAI Input Offset Voltage with Respect to VB
VINATT
–
0
–
mVdc
MCOVOS
–
– 9.0
–
mVdc
Input Bias Current (Pin 20)
IMBIAS
–
– 30
–
nA
Open Loop Gain (f < 100 Hz)
VVOLM
–
70
–
dB
Gain Bandwidth
GBWM
–
1.5
–
MHz
Maximum Output Voltage Swing (1% THD)
VOMAX
–
4.1
–
Vp–p
Maximum Output Current Capability
IOMCO
–
2.0
–
mA peak
GMT
70
–
78
68
–
–
dB
RXOVOS
–
– 1.0
–
mVdc
Input Bias Current (Pin 17)
IRBIAS
–
– 30
–
nA
Open Loop Gain (f < 100 Hz)
AVOLR
–
70
–
dB
Gain Bandwidth
GBWR
–
1.5
–
MHz
Maximum Output Voltage Swing (1% THD)
VOMAX
–
4.1
–
Vp–p
Maximum Output Current Capability
IORXO
–
2.0
–
mA peak
MICROPHONE AMPLIFIER (Pins 20, 21)
Output Offset with Respect to VB (RF = 300 kΩ)
Muting (∆ Gain) –
RF = 100 kΩ
RF = 300 kΩ
RECEIVE AMPLIFIER (Pins 16, 17)
Output Offset with Respect to VB (RF = 10 kΩ)
MOTOROLA ANALOG IC DEVICE DATA
3
MC33219A
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 5.0 V, CD ≤ 0.8 V, unless noted. See Figure 2)
Symbol
Min
Typ
Max
Unit
Tx–Rx Switching Threshold (Pins 4, 11)
ITH
0.8
1.0
1.2
µA
CPR, CPT Output Resistance (for Pulldown)
RCP
–
5.0
–
Ω
ICPLK
–
– 0.2
–
µA
VCP
–
1.9
–
Vdc
ILDOH
–
– 2.0
–
mA
Characteristic
LEVEL DETECTORS AND BACKGROUND NOISE MONITORS
CPR, CPT Leakage Current
CPR, CPT Nominal DC Voltage (No Signal)
TLO, RLO, CP2 Source Current (@ VB – 1.0 V)
RLD
–
500
–
Ω
ILDOL
–
2.0
–
µA
Switching Threshold (See Text)
VTHMT
–
1.0–1.4
–
Vdc
Input Resistance (Vin = 0.85 V)
RMT
70
115
160
kΩ
Input Current (Vin = 5.0 V)
IMT
–
75
–
µA
tMT
tENM
–
–
1.5
5.0
–
–
TLO, RLO, CP2 Output Resistance
TLO, RLO, CP2 Sink Current (@ VB + 1.0 V)
MUTE INPUT (Pin 18)
µs
Timing
To Mute
To Enable
CD INPUT (Pin 8)
Switching Threshold
VTHCD
–
1.5
–
Vdc
Input Resistance (Vin = 0.8 V)
RCD
150
235
350
kΩ
Input Current (Vin = 5.0 V)
ICD
–
40
–
µA
tCD
tENC
–
–
5.0
See
Figure 22
–
–
Microphone Amplifier + Tx Attenuator Distortion
THDT
–
0.05
3.0
%
Receive Amplifier + Rx Attenuator Distortion
THDR
–
0.05
3.0
%
µs
Timing
To Disable
To Enable
SYSTEM DISTORTION (See Figure 1)
TYPICAL TEMPERATURE PERFORMANCE
Characteristic
–40°C
0°C
25°C
85°C
Unit
Power Supply Current
Enabled, VB Open
Disabled, VB Open
3.18
131
3.23
119
3.23
110
3.12
121
mA
µA
VB Output Voltage (IVB = 0)
2.09
2.17
2.22
2.31
Vdc
CT Source Current
Switching to Rx Mode
–80
–87
–90
–90
µA
CT Sink Current
Switching to Tx Mode
43
47
50
51
µA
Attenuator “On” Gain
6.9
6.8
6.7
6.6
dB
Attenuator Range
53
53
53
53
dB
Volume Control Range (Rx Mode Only, VLC Varied from VB to (VB – 1.0 V))
36
39
40
41
dB
AGC Attenuation Range
32
24
26
30
dB
Temperature data is typical performance only, based on sample characterization, and does not provide guaranteed limits over temperature.
4
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
Figure 1. System Distortion Test
Vin
3.5 mV
1.0 kHz
3.0 k
300 k
MCI
MCO
20
21
TAI
22
Tx Attenuator
VB
TAO
23
Vout
NOTE: Tx Attenuator forced to transmit mode.
Vin
350 mV
1.0 kHz
10 k
10 k
RXI
RXO
17
16
VB
RAI
15
Rx Attenuator
RAO
14
Vout
NOTE: Rx Attenuator forced to receive mode.
MOTOROLA ANALOG IC DEVICE DATA
5
MC33219A
PIN FUNCTION DESCRIPTION
6
Pin
Symbol
1
CP2
A capacitor at this pin stores voltage representing the transmit background noise and speech levels
for the background noise monitor.
2
XDI
Input to the transmit background noise monitor.
3
CPT
An RC sets the time constant for the transmit background noise monitor.
4
TLI
Input to the transmit level detector.
5
TLO
Output of the transmit level detector.
6
VB
A mid–supply reference voltage, and analog ground for the amplifiers. This must be well bypassed for
proper power supply rejection.
7
CT
An RC sets the switching time between transmit, receive and idle modes.
8
CD
Chip Disable (Logic Input). When low, the IC is active. When high, the entire IC is powered down and
non–functional, except for VB. Input impedance is nominally 125 kΩ.
9
NC
No internal connection.
10
CPR
An RC sets the time constant for the receive background noise monitor.
11
RLI
Input to the receive level detector.
12
RLO
Output of the receive level detector.
13
GND
Ground pin for the entire IC.
14
RAO
Output of the receive attenuator.
15
RAI
Input to the receive attenuator and the dial tone detector. Input impedance is nominally 100 kΩ.
16
RXO
Output of the receive amplifier.
17
RXI
Inverting input of the receive amplifier. Bias current flows out of the pin.
18
MUTE
19
VLC
Volume control. When VLC = VB, maximum receive gain is set when in the receive mode. When
VLC = VB – 1.0 V, receive gain is down ≈ 40 dB. No effect in the transmit or idle mode. Current flow is
out of the pin. Input impedance is nominally 167 kΩ.
20
MCI
Inverting input of the microphone amplifier. Bias current flows out of the pin.
21
MCO
Output of the microphone amplifier.
22
TAI
Input of the transmit attenuator. Input impedance is nominally 100 kΩ.
23
TAO
Output of the transmit attenuator.
24
VCC
Power Supply Pin. Operating Range is 2.7 V to 6.5 Vdc. Bypassing is required.
Description
Mute Input (Logic Input). A logic low sets normal operation. A logic high mutes the microphone
amplifier only. Input impedance is nominally 67 kΩ.
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
Figure 2. MC33219A Block Diagram and Test Circuit
From
Microphone
Transmit Output
To 2–4 Wire Converter
0.47
300 k
5.1 k
R1
3.0 k
0.1
47
1.0
TAO
23
TAI
22
20
MCI
Mute
XDI
2
Tx
BNM
VCC V
B
18
CPT
3
CP2
1
Tx Attenuator
VB
VCC
100 k
0.1
MCO
21
Normal
4.7 k
TLI
4
5 TLO
VB
1.0
AGC
Mute
V
Volume B
VLC 19
Control
(See
0.1
Figure 28)
Attenuator Control Circuit
Tx–Rx Comp.
MC33219A
7 CT
VB
15
15 k
Disable
Normal
CD
VCC
100
VTH
Rx
BNM
Bias
24
6 VB
Dial Tone
Detector
VB
8
17 RXI
VB
Rx Attenuator
10
13
GND
47
12
CPR
11
RLO RLI
1.0
14
15
16
RAO
RAI
RXO
5.1 k
R2
VCC
0.1
100
10 k
100 k
10 k
0.1
MC34119
Speaker
Amplifier
Receive Input
From 2–4 Wire
Converter
NOTES: 1. All capacitors are in µF unless otherwise noted.
2. Values shown are suggested initial values only. See Applications Information for circuit adjustments.
MOTOROLA ANALOG IC DEVICE DATA
7
MC33219A
Figure 4. Receive Attenuator versus
Volume Control
Figure 3. Attenuator Gain versus VCT (Pin 7)
10
10
ATTENUATOR GAIN (dB)
0
Receive
Attenuator
RECEIVE ATTENUATOR GAIN (dB)
Transmit
Attenuator
–10
– 20
– 30
– 40
0
–10
VCC = 3.3 V
VCC ≥ 3.5 V
– 20
VCC ≤ 2.9 V
– 30
– 40
Circuit in Receive Mode
– 50
–100
– 50
50
0
100
– 50
– 1.4
150
Vout – VB, OUTPUT VOLTAGE (mV)
0
–10
– 20
– 30
– 40
TLI
RLI
XDI
50
0
– 50
2.9
3.3
3.1
3.5
–100
500
0
– 40
– 80
TLI
RLI
R XDI
500
C
Vin
@ 1.0 kHz
40
Vout
1.0 µF
2.0 µA
– 160
–200
Vin = 100 mVrms
60
TLI
RLI
5.1 k XDI
20
0
– 20
500
0.1 µF
C
2.0 µA
Vin
80
120
Vin, INPUT SIGNAL (mVrms)
8
TLO
RLO
CP2
Vout – VB, OUTPUT VOLTAGE (mV)
Vout – VB, OUTPUT VOLTAGE (mV)
0
1.0 µF
100
R = 10 k, C = 0.047 µF
R = 10 k, C = 0.1 µF
– 20
– 120
Vout
Figure 8. Level Detector AC Transfer
Characteristics versus Frequency
60
20
TLO
RLO
CP2
Iin, DC INPUT CURRENT (µA)
R = 5.1 k, C = 0.1 µF
0
0
– 0.2
2.0 µA
Iin
Figure 7. Level Detector AC
Transfer Characteristics
–100
– 0.4
100
VCC (V)
– 60
– 0.6
150
Circuit in Receive Mode
100
– 0.8
200
10
RECEIVE ATTENUATOR GAIN (dB)
–1.0
Figure 6. Level Detector DC Transfer
Characteristics
Figure 5. Receive Gain versus VCC
– 50
2.7
–1.2
VLC VOLTAGE, WITH RESPECT TO VB (V)
VCT – VB (mV)
160
200
100
300
1.0 k
TLO
RLO
CP2
Vout
1.0 µF
10 k
f, FREQUENCY (Hz)
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
Figure 9. CD Input Characteristics (Pin 8)
Figure 10. Mute Input Characteristics (Pin 18)
120
INPUT CURRENT (µ A)
INPUT CURRENT (µ A)
60
40
20
80
40
Valid for Vin ≤ VCC
0
0
1.0
2.0
3.0
4.0
5.0
Valid for Vin ≤ VCC
0
7.0
6.0
0
1.0
2.0
INPUT VOLTAGE (V)
3.0
4.0
6.0
5.0
7.0
INPUT VOLTAGE (V)
Figure 11. Power Supply Current
Figure 12. VB Output Characteristics
6.0
4.0
5.0
3.0
VCC = 6.5 V
CD ≤ 0.8 V
Idle Mode
3.0
VB (V)
I CC (mA)
4.0
2.0
2.0
VCC = 5.0 V
1.0
145 µA
1.0
VCC = 4.0 V
VCC = 3.0 V
CD ≥ 2.0 V
0
0
1.0
2.0
3.0
4.0
5.0
0
6.5
0
– 0.5
–1.5
–2.0
IB, OUTPUT CURRENT (mA)
VCC (V)
Figure 13. VB Power Supply Rejection versus
Frequency and VB Capacitor
Figure 14. Receive Amp and
Microphone Amp Output Swing
6.0
80
CVB = 1000 µF
60
CVB = 100 µF
P–P OUTPUT SWING (V)
100
PSRR (dB)
–1.0
40
CVB = 33 µF
4.0
THD ≤ 1.0%
THD = 5.0 %
2.0
20
0
200
1.0 k
f, FREQUENCY (Hz)
MOTOROLA ANALOG IC DEVICE DATA
10 k
20 k
0
2.5
3.5
4.5
5.5
6.5
VCC (V)
9
MC33219A
Figure 15. Microphone Amplifier Muting
versus Feedback Resistor
Figure 16. VLC Input Current (Pin 19)
80
–2.0
INPUT CURRENT ( µA)
0
∆ GAIN, MUTING (dB)
100
60
40
2.7 V ≤ VCC ≤ 6.5 V
20
0
1.0 k
10 k
100 k
–4.0
–6.0
–8.0
–10
– 1.4
300 k
2.7 V ≤ VCC ≤ 6.5 V
–1.2
–1.0
Figure 17. Idle
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Transmit Timing
200 mVrms, 1.0 kHz
TAI
Input
5.0 mVrms
1.0 s
TAO
Output
– 0.8
– 0.6
– 0.4
– 0.2
0
VLC VOLTAGE, WITH RESPECT TO VB (V)
RF, FEEDBACK RESISTOR (Ω)
37 mVrms
85 ms
420 mVrms
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
30 ms
270 mV
36 mV
CPT
360 ms
Idle
CT
100 mV
Tx
225 ms Time Constant
TLO
170 mV
120 mV
NOTE: Refer to Figure 2 for component values. Timing and output amplitudes shown are nominal, and are for the indicated input signal and
component values. Actual timing and outputs will vary with the application.
10
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
Figure 18. Idle
Receive Timing
200 mVrms, 1.0 kHz
RAI
Input
5.0 mVrms
1.0 s
RAO
Output
420 mVrms
85 ms
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎ
270 mV
30 ms
CPR
450 ms
CT
Rx
150 mV
Idle
225 ms Time Constant
100 mV
RLO
NOTE: Refer to Figure 2 for component values. Timing and output amplitudes shown are nominal, and are for the indicated input signal and
component values. Actual timing and outputs will vary with the application.
MOTOROLA ANALOG IC DEVICE DATA
11
MC33219A
Figure 19. Transmit
Receive Timing
(Short Cycle Timing)
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
200 mVrms, 1.0 kHz
TAI
Input
≈ 300 ms
≈ 300 ms
200 mVrms, 1.0 kHz
RAI
Input
200 mV
TLO
RLO
200 mV
Rx
CT
TAO
Output
RAO
Output
93 ms
Idle
72 ms
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎ
250 mV
Tx
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
18 ms
42 ms
430 mVrms
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
430 mVrms
NOTE: 1. External component values are those shown in Figure 2.
2. Timing and output amplitudes shown are nominal, and are for the indicated input signal and component values. Actual timing and
outputs will vary with the application.
12
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
Figure 20. Transmit
Receive Timing
(Long Cycle Timing)
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
200 mVrms, 1.0 kHz
TAI
Input
≈ 1.0 s
200 mVrms, 1.0 kHz
RAI
Input
≈ 1.0 s
TLO
200 mV
RLO
200 mV
72 ms
Rx
CT
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
Idle
250 mV
Tx
130 ms
TAO
Output
225 ms
Time Constant
t1
RAO
Output
32 mVrms
40 ms
430 mVrms
430 mVrms
NOTE: 1. External component values are those shown in Figure 2.
2. Timing and output amplitudes shown are nominal, and are for the indicated input signal and component values. Actual timing and
outputs will vary with the application.
3. Time t1 depends on the ratio of the on–off amplitude of the signal at TAI.
MOTOROLA ANALOG IC DEVICE DATA
13
MC33219A
Figure 21. Transmit
Receive Timing
(Long Cycle Timing)
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
200 mVrms, 1.0 kHz
TAI
Input
≈ 1.0 s
200 mVrms, 1.0 kHz
RAI
Input
≈ 1.0 s
TLO
200 mV
RLO
200 mV
32 ms
Rx
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎ
CT Idle
Tx
250 mV
90 ms
TAO
Output
100 ms
Time Constant
t1
RAO
Output
32 mVrms
20 ms
430 mVrms
430 mVrms
NOTE: 1. External component values are those shown in Figure 2, except the capacitor at CT is 6.8 µF.
2. Timing and output amplitudes shown are nominal, and are for the indicated input signal and component values. Actual timing and
outputs will vary with the application.
3. Time t1 depends on the ratio of the on–off amplitude of the signal at TAI.
14
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
Figure 22. Chip Disable Timing
CD Input
(Pin 8)
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
tOFF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
5.0 µs
Output at
RAO, TAO
t1
NOTE: Enable time t1 depends on the length of tOFF according to the following chart:
t1
tOFF
≤ 50 ms
100 ms
500 ms
5.0 s
to 60%
to 100%
–
5.0 µs
64 ms
80 ms
5.0 µs
14 ms
72 ms
100 ms
Figure 23. Mute Timing
Mute Input
(Pin 18)
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
1.5 µs
Output at
MCO
MOTOROLA ANALOG IC DEVICE DATA
5.0 µs
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
15
MC33219A
FUNCTIONAL DESCRIPTION
Introduction
The fundamental difference between the operation of a
speakerphone and a telephone handset is that of
half–duplex versus full–duplex. The handset is full duplex,
meaning conversation can occur in both directions (transmit
and receive) simultaneously. This is possible due to both
the low sound level at the receiver, and the fact that the
acoustic coupling from the earpiece to the mouthpiece is
almost non–existent (the receiver is normally held against a
person’s ear). The loop gain from the receiver to the
microphone and through the circuit is well below that
needed to sustain oscillations.
A speakerphone, on the other hand, has higher gain levels
in both the transmit and receive paths, and attempting to
converse full duplex results in oscillatory problems due to the
loop that exists within the speakerphone circuit. The loop is
formed by the hybrid, the acoustic coupling (speaker to
microphone), and the transmit and receive paths (between
the hybrid and the speaker/microphone). The only practical
and economical method used to date is to design the
speakerphone to function in a half duplex mode; i.e., only one
person speaks at a time, while the other listens. To achieve
this requires a circuit which can detect who is talking (in
reality, who is talking louder), switch on the appropriate path
(transmit or receive), and switch off (attenuate) the other
path. In this way, the loop gain is maintained less than unity.
When the talkers exchange function, the circuit must quickly
detect this, and switch the circuit appropriately. By providing
speech level detectors, the circuit operates in a “hands–free”
mode, eliminating the need for a “push–to–talk” switch.
The MC33219A provides the necessary circuitry to
perform a voice switched, half duplex, speakerphone
function. The IC includes transmit and receive attenuators,
pre–amplifiers, level detectors and background noise
monitors for each path. An attenuator control circuit
automatically adjusts the gain of the transmit and receive
attenuators based on the relative strengths of the voice
signals present, the volume control, and the supply voltage
(when low). The detection sensitivity and timing are
externally controllable. Please refer to the Block Diagram
(Figure 2) when reading the following sections.
Transmit and Receive Attenuators
The transmit and receive attenuators are complementary,
performing a log–antilog function. When one is at maximum
gain (≈ 6.7 dB), the other is at maximum attenuation
(≈ –46 dB); they are never both fully on or fully off. Both
attenuators are controlled by a single output from the
Attenuator Control Circuit which ensures the sum of their
16
gains will remain constant at a typical value of – 40 dB.
Their purpose is to provide the half–duplex operation
required in a speakerphone.
The attenuators are non–inverting, and have a usable
bandwidth of 50 kHz. The input impedance of each
attenuator (TXI and RXI) is nominally 100 kΩ (see Figure 24),
and the input signal should be limited to 300 mVrms (850 mV
p–p) to prevent distortion. That maximum recommended
input signal is independent of the volume control setting. Both
the input and output are biased at ≈ VB. The output
impedance is <10 Ω until the output current limit (see specs)
is reached.
Figure 24. Attenuator Input Stage
VB
TAI
(RAI)
10 k
90 k
VB
The attenuators are controlled by the single output of the
Attenuator Control Circuit, which is measurable at CT (Pin 7).
When the circuit detects speech signals directing it to the
receive mode (by means of the level detectors described
below), an internal current source of 90 µA will charge the CT
capacitor to a voltage positive with respect to VB (see
Figure 25). At the maximum volume control setting, this
voltage will be approximately 150 mV, and the receive
attenuator will have a gain of 6.7 dB. When the circuit detects
speech signals directing it to the transmit mode, an internal
current source of 50 µA will take the capacitor to
approximately – 100 mV with respect to VB (the transmit
attenuator will have a gain of 6.7 dB). When there is no
speech present in either path, the current sources are shut
off, and the voltage at CT will decay to be equal to VB. This is
the idle mode, and the attenuators’ gains are nearly halfway
between their fully ON and fully OFF positions (– 25 dB for the
Rx attenuator, –16 dB for the Tx attenuator). Monitoring the
CT voltage (with respect to VB) is the most direct method of
monitoring the circuit’s mode, and its response.
The inputs to the Attenuator Control Section are six: The
Tx–Rx comparator operated by the level detectors, two
background noise monitors, the volume control, the dialtone
detector, and the AGC circuit. These six functions are
described as follows.
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
Figure 25. CT Attenuator Control Circuit
VB
RT
MC33219A
To
Attenuators
Voltage Clamps
CT
CT
I1
90 µA
Tx
Control Circuit
I2
50 µA
Rx
AGC
Level Detectors
There are two identical level detectors: one on the receive
side and one on the transmit side (refer to Figure 26). Each
level detector is a high gain amplifier with back–to–back
diodes in the feedback path, resulting in non–linear gain,
which permits operation over a wide dynamic range of
speech levels. Refer to the graphs of Figures 6, 7 and 8 for
their DC and AC transfer characteristics. The sensitivity of
each level detector is determined by the external resistor and
capacitor at their input (TLI and RLI). The output charges an
external capacitor through a diode and limiting resistor, thus
providing a DC representation of the input AC signal level.
The outputs have a quick rise time (determined by the
capacitor and an internal 500 Ω resistor), and a slow decay
time set by an internal current source and the capacitor. The
capacitors on the two outputs should have the same value
(±10%) to prevent timing problems.
Referring to Figure 2, the outputs of the two level detectors
drive the Tx–Rx comparator. The comparator’s output state
depends on whether the transmit or receive speech signal is
stronger, as sensed by the level detectors. The Attenuator
Control Circuit uses this signal, along with the background
noise monitors, to determine which mode to set.
Figure 26. Level Detector
Signal
Input
C
R
TLI
(RLI)
500 Ω
VB
2.0 µA
External Component Values are
Application Dependent.
MOTOROLA ANALOG IC DEVICE DATA
TLO
(RLO)
1.0 µF
Background
Monitors
TX–Rx Comp.
Vol. Control
Dial Tone Det.
Background Noise Monitors
The purpose of the background noise monitors is to
distinguish speech (which consists of bursts) from
background noise (a relatively constant signal). There are
two background noise monitors: one for the receive path and
one for the transmit path. Refering to Figure 27, each is
operated on by a level detector, which provides a DC
voltage representative of the combined speech and noise
level. However, the peaks, valleys, and bursts, which are
characteristic of speech, will cause the DC voltage (at CP2
or RLO) to increase relatively quickly, causing the output of
the next amplifier to also rise quickly. If that increase
exceeds the 36 mV offset, and at a speed faster than the
time constant at CPT (CPR), the output of the last
comparator will change, indicating the presence of speech
to the attenuator control circuit. This will keep the circuit in
either the transmit or the receive mode, depending on which
side has the stronger signals. When a new continuous signal
is applied, the time constant at CPT (CPR) determines how
long it takes the circuit to decide that the new sound is
continuous, and is therefore background noise. The system
requires that the average speech signal be stronger than the
background noise level (by 6.0–7.0 dB) for proper speech
detection.
When only background noise is present in both paths, the
output of the monitors will indicate the absence of speech,
allowing the circuit to go to the idle mode.
AGC Circuit
In the receive mode only, the AGC circuit decreases the
gain of the receive attenuator when the supply voltage at
VCC falls below 3.5 V, according to the graph of Figure 5.
The gain of the transmit path changes in a complementary
manner.
The purpose of this feature is to reduce the power (and
current) used by the speaker when the speakerphone is
powered by the phone line, and is connected to a long
telephone line, where the available power is limited.
Reducing the speaker power controls the voltage sag at VCC,
reduces clipping and distortion at the speaker output, and
prevents possible erratic operation.
17
MC33219A
Figure 27. Background Noise Monitor
CPT
(CPR) 100 k
Background
Noise Monitor
Signal
Input
C
R
500 Ω
XDI
(RLI)
VCC
CP2
(RLO)
47 µF
VB
36 mV
2.0 µA
1.0 µF
External Component Values are
Application Dependent.
To Attenuator
Control Circuit
31.7 k
18.6 k
VB
Volume Control
The volume control input at VLC (Pin 19) is sensed as a
voltage with respect to VB. The volume control affects the
attenuators in the receive mode only. It has no effect in the
idle or transmit modes.
By varying the voltage at the VLC pin (Pin 19), the volume
control varies the gain of the attenuators. Maximum receive
attenuator gain (6.7 dB) occurs when VLC = VB. As VLC is
reduced below VB, the gain of the receive attenuator is
reduced, and the transmit attenuator gain increases in a
complementary manner. The usable range of the VLC pin is
≈ 1.1 V for VCC ≥ 3.5 V, providing a range of ≈ 40 dB (see
Figure 4). At VCC < 3.5 V, the range is reduced due to the
lower VB voltage, and the AGC function.
The configuration of the external volume control
potentiometer circuit depends on whether the VCC supply
voltage is regulated or if it varies, such as in a phone line
powered circuit (see Figure 28). If the supply voltage is
regulated, the circuit on the left can be used. The value of the
lower resistor (R1) depends on the value of VCC, so that
Pin 19 can be varied from VB to ≈ 1.1 V below VB.
In a phone line powered circuit, the value of VCC, and
consequently VB, will vary with line length and with the
amount of sound at the speaker. In this case, the circuit on
the right side of Figure 28 must be used to provide a fixed
reference voltage for the potentiometer. With this circuit, the
volume setting will not vary when VCC is ≥ 3.5 V. As VCC falls
below 3.5 V, the zener diode will drop out of regulation, but
the AGC circuit will ensure that instabilities do not occur.
The bias current at VLC flows out of the pin and depends
on the voltage at the pin (see Figure 16). The capacitor from
VLC to VB helps reduce any effects of ripple or noise on VB.
Figure 28. Volume Control
Regulated Supply
Unregulated Supply
VB
VB
VCC
6.5 V
6.0 V
5.0 V
4.0 V
18
R1
86 k
72 k
50 k
25 k
50 k
R1
To VLC
(Pin 19)
LM385-1.2
0.1
Volume
Control
3160
0.1
50 k
Volume
Control
To VLC
(Pin 19)
Dial Tone Detector
When the speakerphone is initially taken off–hook, the dial
tone signal will switch the circuit to the receive mode.
However, since the dial tone is a continuous signal, the
MC33219A would consider it as background noise rather
than speech, and would therefore switch from receive to idle,
causing the dial tone sound level to fade. The dial tone
detector prevents the fading by disabling the background
noise monitor.
The dial tone detector is a comparator with one side
connected to the receive attenuator input (RAI), and the other
input connected to VB with a – 20 mV offset (see Figure 29).
If the circuit is in the receive mode and the incoming signal
has peaks greater than 20 mV (14 mV rms), the comparator’s
output will change, disabling the receive idle mode. The
receive attenuator will then be at a setting determined solely
by the volume control. NOTE: The dial tone detector is not a
frequency discriminating circuit.
Figure 29. Dial Tone Detector
To Rx
Attenuator
RAI
To Attenuator
Control Circuit
20 mV
VB
Microphone Amplifier, Mute
The microphone amplifier (Pins 20, 21) has the
non–inverting input internally connected to VB, while the
inverting input and the output are pinned out. Unlike most op
amps, the amplifier has an all NPN output stage, which
maximizes phase margin and gain–bandwidth. This feature
ensures stability at gains less than unity, as well as with a
wide range of reactive loads. The open loop gain is typically
70 dB (f < 100 Hz), and the gain–bandwidth is typically
1.5 MHz. The maximum p–p output swing, for 1.0% or less
distortion, is shown in Figure 14. The output impedance is
<10 Ω until current limiting is reached (typically 2.0 mA peak).
The input bias current at MCI is typically 30 nA out of the pin.
The mute function (Pin 18), when activated, will reduce the
gain of the amplifier by shorting the external feedback
resistor (RMF in Figure 30). The amplifier is not disabled in
this mode; MCO remains a low impedance output, and MCI
remains a virtual ground at VB. The amount of muting (the
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
change in gain) depends on the value of the external
feedback resistor, according to the graph of Figure 15.
Muting occurs as the mute input pin is taken from ≈ 1.0 V to
≈ 1.4 V. The voltage on this pin must be ≤ 0.8 V for normal
operation, and ≥ 2.0 V for muting. See Figure 10 for input
current requirements. The input must be kept within the
range of VCC and GND. If the input is taken more than 0.4 V
above V CC or below GND excessive currents will flow, and
the device’s operation will be distorted. If the mute function is
not used, the pin should be grounded.
Figure 30. Microphone Amplifier and Mute
RMF
From
Microphone
VB
RMI
MCO
MCI
VCC
Mute
50 k
50 k
Receive Amplifier
The receive amplifier (Pins 16, 17) has the non–inverting
input internally connected to VB, while the inverting input and
the output are pinned out. Unlike most op amps, the amplifier
has an all NPN output stage, which maximizes phase margin
and gain–bandwidth. This feature ensures stability at gains
less than unity, as well as with a wide range of reactive loads.
The open loop gain is typically 70 dB (f < 100 Hz), and the
gain–bandwidth is typically 1.5 MHz. The maximum p–p
output swing for 1.0% or less distortion is shown in Figure 14.
The output impedance is <10 Ω until current limiting is
reached (typically 2.0 mA peak). The input bias current at
RXI is typically 30 nA out of the pin.
MOTOROLA ANALOG IC DEVICE DATA
Power Supply, VB and Chip Disable
The power supply voltage at Pin 24 is to be between 3.5
and 6.5 V for normal operation, and down to 2.7 V with the
AGC in effect (see AGC section). The supply current required
is typically 3.2 mA in the idle mode, and ≈ 4.0 mA in the
transmit and receive modes. Figure 11 shows the supply
current for both the normal and disabled modes.
The output voltage at VB (Pin 6) is approximately equal to
(VCC – 0.7)/2, and provides an AC ground for the internal
amplifiers and the system. The output impedance at VB is
approximately 600 Ω, and in conjunction with the external
capacitor at VB forms a low pass filter for power supply noise
rejection. The choice of the VB capacitor size is application
dependent based on whether the circuit is powered by the
telephone line or a regulated supply. See Figure 13 for
PSRR information. Since VB biases the microphone and
receive amplifiers, the amount of supply rejection at their
outputs is a function of the rejection at VB, as well as the
gains of the amplifiers.
The amount of current which can be sourced out of the VB
pin depends on the VCC voltage (see Figure 12). Drawing
current in excess of that shown in Figure 12 will cause VB to
drop low enough to disrupt the circuit’s operation. This pin
can sink ≈ 100 µA when enabled, and 0 µA when disabled.
The Chip Disable (Pin 8) permits powering down the IC
for power conservation. With CD between 0 and 0.8 V,
normal operation is in effect. With CD between 2.0 V and
VCC, the IC is powered down, and the supply current drops
to about 110 µA (at VCC = 5.0 V, see Figure 11). When CD is
high, the microphone and receive amplifiers, the level
detectors, and the two attenuators are disabled (their
outputs go to a high impedance). The background noise
monitors are disabled, and Pins 3 and 10 will go to VCC. The
VB output, however, remains active, except that it cannot
sink any current.
The CD input must be kept within the range of VCC and
GND. See Figure 9 for input current requirements. If the input
is taken more than 0.4 V above VCC or below GND excessive
currents will flow, and the device’s operation will be distorted.
If the disable function is not used, the pin should be
connected to ground.
19
MC33219A
APPLICATIONS INFORMATION
Switching and Response Time Theory
The switching time of the MC33219A circuit is dominated
first by the components at CT (Pin 7, see Figure 2), and
second by the capacitors at the level detector outputs (RLO,
TLO).
The transition time to receive or to transmit mode from
either idle or the other mode is determined by the capacitor
at CT, along with the internal current sources (refer to
Figure 25). The switching time is:
DV C T
DT
I
When switching from idle to receive, ∆V = 150 mV,
I = 90 µA, the CT capacitor is 15 µF, and ∆T calculates to
≈ 25 ms. When switching from idle to transmit, ∆V = 100 mV,
I = 50 µA, the CT capacitor is 15 µF, and ∆T calculates to
≈ 30 ms.
When the circuit switches to idle, the internal current
sources are shut off, and the time constant is determined by
the CT capacitor and RT, the external resistor (see
Figure 25). With CT = 15 µF, and RT = 15 kΩ, the time
constant is ≈ 225 ms, giving a total switching time of ≈ 0.68 s
(for 95% change). The switching period to idle begins when
both speakers have stopped talking. The switching time back
to the original mode will depend on how soon that speaker
begins speaking again. The sooner the speaking starts
during the “decay to idle” period, the quicker the switching
time, since a smaller voltage excursion is required. That
switching time is determined by the internal current sources
as described above.
When the circuit switches directly from receive to
transmit (or vice versa), the total switching time depends
not only on the components and currents at the CT pin, but
also on the response of the level detectors, the relative
amplitude of the two speech signals, and the mode of the
circuit, since the two level detectors are connected
differently to the two attenuators.
The rise time of the level detector’s outputs (RLO, TLO) is
not significant since it is so short. The decay time, however,
provides a significant part of the “hold time” necessary to
hold the circuit (in transmit or receive) during the normal
pauses in speech. The capacitors at the two outputs must
be equal value (±10%) to prevent problems in timing and
level response.
The components at the inputs of the level detectors (RLI,
TLI) do not affect the switching time, but rather affect the
relative signal levels required to switch the circuit, as well as
the frequency response of the detectors. They must be
adjusted for proper switching response as described later in
this section.
+
Switching and Response Time Measurements
Using burst of 1.0 kHz sine waves to force the circuit to
switch among its modes, the timing results were measured
and are indicated in Figures 17–21.
a) In Figure 17, when a signal is applied to the transmit
attenuator only (normally via the microphone and the
microphone amplifier), the transmit background noise
monitor immediately indicates the “presence of speech” as
evidenced by the fact that CPT begins rising. The slope of
the rising CPT signal is determined by the external resistor
and capacitor on that pin. Even though the transmit
20
attenuator is initially in the idle mode (–16 dB), there is
sufficient signal at its output to cause TLO to increase. The
attenuator control circuit then forces the circuit to the
transmit mode, evidenced by the change at the CT pin. The
attenuator output signal is then 6.7 dB above the input.
With the steady sine wave applied to the transmit input,
the circuit will stay in the transmit mode until the CPT pin gets
to within 36 mV of its final value. At that point, the internal
comparator (see Figure 27) switches, indicating to the
attenuator control circuit that the signal is not speech, but
rather it is a steady background noise. The circuit now begins
to decay to idle, as evidenced by the change at CT and TLO,
and the change in amplitude at TAO.
When the input signal at TAI is removed (or reduced), the
CPT pin drops quickly, allowing the circuit to quickly respond
to any new speech which may appear afterwards. The
voltage at CT decays according to the time constant of its
external components, if not already at idle.
The voltage change at CP2, CPT, and TAO depends on
the input signal’s amplitude and the components at XDI and
TLI. The change at CT is internally fixed at the level shown.
The timing numbers shown depend both on the signal
amplitudes and the components at the CT and CPT pins.
b) Figure 18 indicates what happens when the same signal
is applied to the receive side only. RLO and CPR react
similarly to TLO and CPT. However, the circuit does not switch
to idle when CPR finishes transitioning since the dial tone
detector disables the background noise monitor, allowing the
circuit to stay in the receive mode as long as there is a signal
present. If the input signal amplitude had been less than the
dial tone detector’s threshold, the circuit response would have
been similar to that shown in Figure 17. The voltage change
at CT depends on the setting of the volume control (Pin 19).
The 150 mV represent maximum volume setting.
c) Figure 19 indicates the circuit response when transmit
and receive signals are alternately applied, with relatively short
cycle times (300 ms each) so that neither attenuator will begin
to go to idle during its “on” time. Figure 20 indicates the circuit
response with longer cycle times (1.0 s each), where the
transmit side is allowed to go to idle. Figure 21 is the same as
Figure 20, except the capacitor at CT has been reduced from
15 µF to 6.8 µF, providing a quicker switching time. The
reactions at the various pins are shown. The response times at
TAO and RAO are different, and typically slightly longer than
what is shown in Figures 17 and 18 due to:
– the larger transition required at the CT pin,
– the greater difference in the levels at RLO and TLO due
to the positions of the attenuators as well as their decay
time, and
– response time of the background noise monitors.
The timing responses shown in these three figures are
representative for those input signal amplitudes and burst
durations. Actual response time will vary for different signal
conditions.
NOTE: While it may seem desirable to decrease the
switching time between modes by reducing the capacitor at
CT, this should be done with caution for two reasons:
1) If the switching time is too short, the circuit response
may appear to be “too quick” to the user, who may consider
its operation erratic. The recommended values in this data
sheet, along with the accompanying timings, provide what
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
properties are just as important (just as equally important) as
the electronics. One of the major issues involved in a
speakerphone design is the acoustic coupling of the speaker
to the microphone, which must be minimized. This
parameter is dependent entirely on the design of the
enclosure, the mounting of the speaker and the microphone,
and their characteristics.
2) Ensure the speaker is optimally mounted. This fact
alone can make a difference of several dB in the sound level
from the speaker, as well as the sound quality. The speaker
manufacturer should be consulted for this information.
3) Do not breadboard the circuit with the microphone and
speaker hanging out in midair. It will not work. The speaker
and microphone must be in a suitable enclosure, preferably
one resembling the end product. If this is not feasible,
temporarily use some other properly designed enclosure,
such as one of the many speakerphones on the market.
4) Do not breadboard the circuit on a wirewrapped board
or a plug–in prototyping board. Use a PC board, preferably
with a ground plane. Proper filtering of the supply voltage at
the VCC pin is essential.
5) The speakerphone must be tested with the intended
hybrid and connected to a phone line or phone line simulator.
The performance of the hybrid is just as important as the
enclosure and the speakerphone IC.
6) When testing the speakerphone, be conscious of the
environment. If the speakerphone is in a room with large
windows and tile floors, it will sound different than if it is in a
carpeted room with drapes. Additionally, be conscious of the
background noise in a room.
7) When testing the speakerphone on a phone line, make
sure the person at the other end of the phone line is not in the
same room as the speakerphone.
experience has shown to be a “comfortable response” by
the circuit.
2) The distortion in the receive attenuator will increase as
the C T capacitor value is decreased. The extra THD will be
most noticeable at the lower frequencies and at the lower
ampitudes. Table 1 provides a guideline for this issue.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Table 1. THD versus CT Capacitor
CT
Capacitor
Idle – Rx
Transition
Input
@ RAI
Freq.
25 ms
20 mVrms
300 Hz
1.2%
1.0 KHz
0.25%
300 Hz
0.5%
1.0 KHz
0.2%
300 Hz
5.0%
1.0 KHz
0.7%
300 Hz
1.3%
1.0 KHz
0.35%
300 Hz
11%
1.0 KHz
1.8%
300 Hz
2.6%
1.0 KHz
0.7 %
15 µF
100 mVrms
6.8 µF
12 ms
20 mVrms
100 mVrms
3.0 µF
5.0 ms
20 mVrms
100 mVrms
THD
@ RAO
Considerations in the Design of a Speakerphone
The design and adjustment of a speakerphone involves
human interface issues as well as proper signal levels.
Because of this fact, it is not practical to do all of the design
mathematically. Certain parts of the design must be done by
trial and error, most notably the switching response and the
“How does it sound?” part of the testing. Among the
recommendations for a successful design are:
1) Design the enclosure concurrently with the
electronics. Do not leave the case design to the end as its
Design Procedure
A recommended sequence follows in Figure 31,
assuming the end product enclosure is available, with the
intended production microphone and speaker installed, and
the PC boards or temporary substitutes installed.
Figure 31. Basic Block Diagram for Design Purposes
VM
MCI
Mike
Amp
MCO
TAI
TAO
Tx Attenuator
V1
R1
Microphone
I1
TLI
Tip
Acoustic
(G )
Coupling AC
Control
GST
Hybrid
Ring
RLI
I2
R2
RAO
Speaker
Speaker
Amp
MOTOROLA ANALOG IC DEVICE DATA
Rx Attenuator
RAI
V2
RXO
RXI
21
MC33219A
1) Design the hybrid, ensuring proper interface with the
phone line for both DC and AC characteristics. The return
loss must be adjusted to comply with the appropriate
regulatory agency. The sidetone should then be adjusted
according to the intent of the product. If the product is a
speakerphone only (without a handset), the sidetone gain
(GST) should be adjusted for maximum loss. If a handset is
part of the end product, the sidetone must be adjusted for the
minimum acceptable sidetone levels in the handset.
Generally, for the speakerphone interface, 10–20 dB
sidetone loss is preferred for GST.
2) Check the acoustic coupling of the enclosure (GAC in
Figure 31). With a steady sound coming out of the speaker,
measure the rms voltage on the speaker terminals and the rms
voltage out of the microphone. Experience has shown that the
loss should be at least 40 dB, preferably 50 dB. This should
be checked over the frequency range of 20 Hz to 10 kHz.
3) Adjust the transmit path for proper signal levels, based
on the lowest speech levels as well as the loudest. Based on
the typical levels from commonly available microphones, a
gain of about 35–45 dB is required from the microphone
terminals to Tip and Ring. Most of that gain should be in the
microphone amplifier to make best use of the transmit
attenuator, but the maximum input level at TAI must not be
exceeded. If a signal generator is used instead of a
microphone for testing, the circuit can be locked into the
transmit mode by grounding CPT (Pin 3). Frequency
response can generally be tailored with capacitors at the
microphone amplifier.
4) Adjust the receive path for proper signal levels based on
the lowest speech levels as well as the loudest. A gain of
about 30 dB is required from Tip and Ring to the speaker
terminals for most applications (at maximum volume). Most
of that gain should be in the receive amplifier (at RXI, RXO) to
make best use of the receive attenuator, but the maximum
input level at RAI must not be exceeded. If a signal generator
is used for signal injection during testing, the circuit can be
locked into the receive mode by grounding CPR (Pin 10),
although this is usually not necessary since the dial tone
detector will keep the circuit in the receive mode. Frequency
response can generally be tailored with capacitors at the
receive amplifier.
5) Check that the loop gain (i.e., the receive path gain +
acoustic coupling gain + transmit path gain + sidetone gain)
is less than 0 dB over all frequencies. If not, “singing” will
occur: a steady oscillation at some audible frequency.
6) a) The final step is to adjust the resistors at the level
detector inputs (RLI and TLI) for proper switching response
(the switchpoint occurs when I1 = I2). This has to be the last
step, as the resistor values depend on all of the above
adjustments, which are based on the mechanical, as well as
the electrical, characteristics of the system. NOTE: An
extreme case of level detector misadjustment can result in
“motorboating”. In this condition, with a receive signal
applied, sound from the speaker enters the microphone, and
causes the circuit to switch to the transmit mode. This causes
the speaker sound to stop (as well as the sound into the
microphone), allowing the circuit to switch back to the receive
mode. This sequence is then repeated, usually, at a rate of a
few Hz. The first thing to check is the acoustic coupling, and
then the level detectors.
b) Starting with the recommended values for R1 and R2 (in
Figure 2), hold a normal conversation with someone on
another phone. If the resistor values are not optimum, one of
the talkers will dominate, and the other will have difficulty
22
getting through. If, for example, the person at the
speakerphone is dominant, the transmit path is overly
sensitive, and the receive path is not sensitive enough. In this
case, R1 (at TLI) should be increased, or R2 (at RLI)
decreased, or both. Their exact value is not critical at this
point, only their relative value. Keeping R1 and R2 in the
range of 2.0–20 k, adjust them until a suitable switching
response is found.
c) Then have the person at the other end of the phone line
speak loud continuously, or connect to a recording which is
somewhat strong. Monitor the state of the circuit (by
measuring the CT versus VB pins, and by listening carefully to
the speaker) to check that the sound out of the speaker is not
attempting to switch the circuit to the transmit side (through
acoustic coupling). If it is, increase R1 (at TLI) in small steps
just enough to stop the switching (this desensitizes the
transmit side). If R1 has been changed a large amount, it may
be necessary to readjust R2 for switching response. If this
cannot be achieved in a reasonable manner, the acoustic
coupling is too strong.
d) Next, have the person at the speakerphone speak
somewhat loudly, and again monitor the state of the circuit,
primarily by having the person at the other end listen carefully
for fading. If there is obvious fading of the sound, increase R2
so as to desensitize the receive side. Increase R2 just
enough to stop the fading. If this cannot be achieved in a
reasonable manner, the sidetone coupling is too strong.
e) If necessary, readjust R1 and R2 a small amount
relative to each other, to further optimize the switching
response.
Transmit/Receive Detection Priority
Although the MC33219A was designed to have an idle
mode such that the transmit side has a small priority (the idle
mode position is closer to the full transmit side), the idle mode
position can be moved with respect to the transmit or the
receive side. With this done, the ability to gain control of the
circuit by each talker will be changed.
By connecting a resistor from CT (Pin 7) to ground, the
circuit will be biased more towards the transmit side. The
resistor value is calculated from:
R
+ RT
ƪ ƫ
DV * 1
V
B
where R is the added resistor, RT is the resistor normally
between Pins 6 and 7 (typically 15 kΩ), and ∆V is the desired
change in the CT voltage at idle.
By connecting a resistor from CT (Pin 7) to VCC, the circuit
will be biased towards the receive side. The resistor value is
calculated from:
R
+ RT
ƪ
V
–V
CC B
DV
ƫ
*1
R, RT, and ∆V are the same as above. Switching response
and the switching time will be somewhat affected in each
case due to the different voltage excursions required to get to
transmit and receive from idle. For practical considerations,
the ∆V shift should not exceed 50 mV.
Disabling the Idle Mode
For testing or circuit analysis purposes, the transmit or
receive attenuators can be set to the ON position, even with
steady signals applied, by disabling the background noise
monitors. Grounding the CPR pin will disable the receive
background noise monitor, thereby indicating the “presence
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
of speech” to the attenuator control block. Grounding CPT
does the same for the transmit path.
Additionally, the receive background noise monitor is
automatically disabled by the dial tone detector whenever the
receive signal exceeds the detector’s threshold.
Dial Tone Detector Threshold
The threshold for the dial tone detector is internally set at
≈ 20 mV (14 mVrms) below VB (see Figure 29). That
threshold can be adjusted if desired by changing the bias at
RAI. The method used depends on how the input of the
receive attenuator is connected to other circuitry.
a) If the attenuator input (RAI) is DC coupled to the receive
amplifier (Pins 15 to 16 as in Figure 2), or to some other
amplifier in the system, then the threshold is changed by
forcing a small offset on that amplifier. As shown in Figure 32,
connect a resistor (RTO) from the summing node to either
ground or VCC, depending on whether the dial tone detector
threshold is to be increased or decreased. RF and RI are the
resistors normally used to set the gain of that amplifier.
Figure 33. Adjusting Dial Tone Detector
Threshold (AC Coupled)
Audio
Signal
Input
Attenuator
56 k
RTO
100 k
RAI
3.0 k
VB
DTD
VB
To
Control
Circuit
VB
20 mV
To Increase The Threshold
Audio
Signal
Input
VB
Figure 32. Adjusting Dial Tone Detector
Threshold (DC Coupled)
VCC or
GND
Audio
Signal
Input
VCC
Attenuator
3.0 k
RTO
RI
RTO
RF
100 k
RAI
VB
56 k
RXI
RAI
RXO
DTD
To
Control
Circuit
VB
20 mV
VB
100 k
VB
VB
20 mV
Attenuator
To Decrease The Threshold
To
Attentuator
Control
Circuit
To increase the threshold, use the first circuit in Figure 33.
The voltage at the top of the 3.0 k resistor is between 90 and
180 mV above V B (depending on V CC). RTO and the 100 k
input impedance form a voltage divider to create the desired
offset at RAI. RTO is calculated from:
Adding RTO and connecting it to ground will shift RXO and
RAI upward, thereby increasing the dial tone detector
threshold. In this case, RTO is calculated from:
RTO
+ VB DV RF
VB is the voltage at Pin 6, and ∆V is the amount that the
detector’s threshold is increased. For example, if VB = 2.2 V,
and RF = 10 k, and the threshold is to be increased by 20 mV,
RTO calculates to 1.1 MΩ.
Connecting RTO to VCC will shift RXO downward, thereby
decreasing the dial tone detector threshold. In this case, RTO
is calculated from:
+
– V )
RF
B
DV
For example, if VCC = 5.0 V, VB = 2.2 V, and RF = 10 k and
the threshold is to be decreased by 10 mV, RTO calculates to
2.8 MΩ.
b) If the receive attenuator input is AC coupled to the
receive amplifier or to other circuitry, then the offset is set at
RAI. The circuits in Figure 33 are suggested for changing
the threshold.
RTO
(V
CC
MOTOROLA ANALOG IC DEVICE DATA
RTO
+
ƪ
((V
CC
– V )
B
DV
0.05)
ƫ
– 1
(100 k)
For example, if VCC = 5.0 V, and the threshold is to be
increased by 20 mV (∆V), RTO calculates to ≈ 600 kΩ.
If the threshold is to be decreased, use the second circuit
in Figure 33. RTO is calculated from:
RTO
+
ƪ
(V
B
0.05)
DV
ƫ
– 1
(100 k)
RFI Interference
Potential radio frequency interference (RFI) problems
should be addressed early in the electrical and mechanical
design of the speakerphone. RFI may enter the circuit
through Tip and Ring, through the microphone wiring to the
microphone amplifier (which should be short), or through any
of the PC board traces. The most sensitive pins on the
MC33219A are the inputs to the level detectors (RLI, TLI,
XDI) since, when there is no speech present, the inputs are
high impedance and these op amps are in a near open–loop
condition. The board traces to these pins should be kept
23
MC33219A
short, and the resistor and capacitor for each of these pins
should be physically close to the pins. All other input pins
should also be considered sensitive to RFI signals.
In The Final Analysis ...
Proper operation of a speakerphone is a combination of
proper mechanical (acoustic) design in addition to proper
electronic design.The acoustics of the enclosure must be
considered early in the design of a speakerphone. In
general, electronics cannot compensate for poor acoustics,
low speaker quality, low microphone quality, or any
combination of these items. Proper acoustic separation of
the speaker and microphone is essential. The physical
location of the microphone, along with the characteristics of
the selected microphone, will play a large role in the quality
of the transmitted sound. The microphone and speaker
24
vendors can usually provide additional information on the
use of their products.
In the final analysis, the circuit will have to be fine–tuned to
match the acoustics of the enclosure, the specific hybrid, and
the specific speaker and microphone selected. The
components shown in this data sheet should be considered
as starting points only. The gains of the transmit and receive
paths are easily adjusted at the microphone and receive
amplifiers, respectively. The switching response can then be
fine tuned by varying (in small steps) the components at the
level detector inputs (TLI, RLI) until satisfactory operation is
obtained for both long and short lines.
For additional information on speakerphone design please
refer to The Bell System Technical Journal, Volume XXXIX
(March 1960, No. 2).
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
GLOSSARY
A t t en u at i o n – A d ec r eas e i n m agnitude o f a
communication signal, usually expressed in dB.
Bandwidth – The range of information carrying
frequencies of a communication system.
Battery – The voltage which provides the loop current to
the telephone from the CO. The name is derived from the fact
that COs have always used batteries, in conjunction with AC
power, to provide this voltage.
C–Message Filter – A frequency weighting which
evaluates the effects of noise on a typical subscriber’s
system.
Central Office – Abbreviated CO, it is a main telephone
office, usually within of a few miles of its subscribers, that
houses switching gear for interconnection within its
exchange area, and to the rest of the telephone system. A
CO can handle up to 10,000 subscriber numbers.
CO – See Central Office.
CODEC – Coder/Decoder – In the Central Office, it
converts the transmit signal to digital, and converts the digital
receive signal to analog.
dB – A power or voltage measurement unit, referred to
another power or voltage. It is generally computed as:
10 x log (P1/P2)
for power measurements, and
20 x log(V1/V2)
for voltage measurements.
dBm – An indication of signal power. 1.0 mW across
600 Ω, or 0.775 Vrms, is defined as 0 dBm. Any other voltage
level is converted to dBm by:
dBm = 20 x log (Vrms/0.775), or
dBm = [20 x log (Vrms)] + 2.22.
d B m p – I ndic at es d B m m eas ur ement u s ing a
psophometric weighting filter.
dBrn – Indicates a dBm measurement relative to 1.0 pW
power level into 600 Ω. Generally used for noise
measurements, 0 dBrn = – 90 dBm.
dBrnC – Indicates a dBrn measurement using a
C–message weighting filter.
DTMF – Dual Tone MultiFrequency. It is the “tone dialing”
system based on outputting two non–harmonic related
frequencies simultaneously to identify the number dialed.
Eight frequencies have been assigned to the four rows and
four columns of a keypad.
Four Wire Circuit – The portion of a telephone, or central
office, which operates on two pairs of wires. One pair is for
the Transmit path, and one pair is for the Receive path.
Full Duplex – A transmission system which permits
communication in both directions simultaneously. The
standard handset telephone system is full duplex.
Gain – The change in signal amplitude (increase or
decrease) after passing through an amplifier or other circuit
stage. Usually expressed in dB, an increase is a positive
number and a decrease is a negative number.
Half Duplex – A transmission system which permits
communication in one direction at a time. CB radios, with
“push–to–talk” switches, and voice activated speakerphones
are half duplex.
Hookswitch – A switch within the telephone which
connects the telephone circuit to the subscriber loop. The
name is derived from old telephones where the switch was
activated by lifting the receiver off and onto a hook on the side
of the phone.
MOTOROLA ANALOG IC DEVICE DATA
Hybrid – A two–to–four wire converter.
Idle Channel Noise – Residual background noise when
transmit and receive signals are absent.
Line Card – The printed circuit board and circuitry in the
CO or PBX which connects to the subscriber’s phone line. A
line card may hold circuitry for one subscriber or a number of
subscribers.
Longitudinal Balance – The ability of the telephone
circuit to reject longitudinal signals on Tip and Ring.
Longitudinal Signals – Common mode signals.
Loop – The loop formed by the two subscriber wires (Tip
and Ring) connected to the telephone at one end, and the
central office (or PBX) at the other end. Generally it is a
floating system, not referred to ground, or AC power.
Loop Current – The DC current which flows through the
subscriber loop. It is typically provided by the central office or
PBX, and ranges from 20–120 mA.
Mute – Reducing the level of an audio signal, generally so
that it is inaudible. Partial muting is used in some
applications.
OFF Hook – The condition when the telephone is
connected to the phone system, permitting the loop current to
flow. The central office detects the DC current as an
indication that the phone is busy.
ON Hook – The condition when the telephone is
disconnected from the phone system, and no DC loop
current flows. The central office regards an ON hook phone
as available for ringing.
PABX – Private Automatic Branch Exchange. In effect, a
miniature central office; it is a customer owned switching
system servicing the phones within a facility, such as an
office building. A portion of the PABX connects to the Bell (or
other local) telephone system.
Power Supply Rejection Ratio – The ability of a circuit to
reject outputting noise or ripple, which is present on the
power supply lines. PSRR is usually expressed in dB.
Protection, Primary – Usually consisting of carbon
blocks or gas discharge tubes, it absorbs the bulk of a
lightning induced transient on the phone line by clamping the
voltages to less than ±1500 V.
Protection, Secondary – Usually located within the
telephone, it protects the phone circuit from transient surges.
Typically, it must be capable of clamping a ±1.5 kV surge of
1.0 ms duration.
Pulse Dialing – A dialing system whereby the loop current
is interrupted a number of times in quick succession. The
number of interruptions corresponds to the number dialed,
and the interruption rate is typically 10 per second. The old
rotary phones and many new pushbutton phones use pulse
dialing.
Receive Path – Within the telephone, it is the speech
path from the phone line (Tip and Ring) towards the
receiver or speaker.
REN – Ringer Equivalence Number. An indication of the
impedance (or loading factor) of a telephone bell or ringer
circuit. An REN of 1.0 equals ≈ 8.0 kΩ. The Bell system
typically permits a maximum of 5.0 REN (1.6 kΩ) on an
individual subscriber line. A minimum REN of 0.2 (40 kΩ) is
required by the Bell system.
25
MC33219A
Return Loss – Expressed in dB, it is a measure of how
well the telephone’s AC impedance matches the line’s AC
characteristic impedance. With a perfect match, there is no
reflected signal, and therefore infinite return loss. It is
calculated from:
RL
+ 20
) ZCKT)
)
*
Z
LINE
CKT
(Z
log
(Z
LINE
Ring – One of the two wires connecting the central office
to a telephone. The name is derived from the ring portion of
the plugs used by operators (in older equipment) to make the
connection. Ring is traditionally negative with respect to Tip.
Sidetone Rejection – The rejection (in dB) of the reflected
signal in the receive path resulting from a transmit signal
applied to the phone and phone line.
SLIC – Subscriber Line Interface Circuit. It is the circuitry
within the CO or PBX which connects to the user’s phone
line.
Subscriber – The customer at the telephone end of the
line.
Subscriber Line – The system consisting of the user’s
telephone, the interconnecting wires, and the central office
equipment dedicated to that subscriber (also referred to as
a loop).
Tip – One of the two wires connecting the central office to
a telephone. The name is derived from the tip of the plugs
used by operators (in older equipment) to make the
connection. Tip is traditionally positive with respect to Ring.
Transmit Path – Within the telephone it is the speech
path from the microphone towards the phone line (Tip and
Ring).
Two Wire Circuit – Refers to the two wires connecting the
central office to the subscriber’s telephone. Commonly
referred to as Tip and Ring, the two wires carry both transmit
and receive signals in a differential manner.
Two–to–Four Wire Converter – A circuit which has four
wires (on one side): two (signal and ground) for the outgoing
signal and two for the incoming signal. The outgoing signal is
sent out differentially on the two wire side, and incoming
differential signals received on the two wire side are directed
to the receive path of the four wire side. Additional circuit
within cancels the reflected outgoing signal to keep it
separate from the incoming signal.
Voiceband – That portion of the audio frequency range
used for transmission across the telephone system. Typically
it is 300–3400 Hz.
Suggested Vendors
Microphones
Primo Microphones Inc.
Bensenville, IL 60106
1–800–76–PRIMO
Telecom Transformers
Microtran Co., Inc.
Valley Stream, NY 11528
516–561–6050
Various models – ask for catalog
and Application Bulletin F232
Stancor Products
Logansport, IN 46947
219–722–2244
Various models – ask for catalog
PREM Magnetics, Inc.
McHenry, IL 60050
815–385–2700
Various models – ask for catalog
Motorola does not endorse or warrant the suppliers referenced.
26
MOTOROLA ANALOG IC DEVICE DATA
MC33219A
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 724–03
–A–
24
13
1
12
NOTES:
1. CHAMFERED CONTOUR OPTIONAL.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
4. CONTROLLING DIMENSION: INCH.
–B–
L
C
–T–
NOTE 1
K
SEATING
PLANE
E
G
M
N
J 24 PL
0.25 (0.010)
F
D 24 PL
0.25 (0.010)
M
T A
M
T B
M
M
DIM
A
B
C
D
E
F
G
J
K
L
M
N
MILLIMETERS
MIN
MAX
32.13
31.25
6.85
6.35
4.44
3.69
0.51
0.38
1.27 BSC
1.52
1.02
2.54 BSC
0.30
0.18
3.55
2.80
7.62 BSC
15°
0°
0.51
1.01
INCHES
MIN
MAX
1.230 1.265
0.250 0.270
0.145 0.175
0.015 0.020
0.050 BSC
0.040 0.060
0.100 BSC
0.007 0.012
0.110 0.140
0.300 BSC
15°
0°
0.020 0.040
DW SUFFIX
PLASTIC PACKAGE
CASE 751E–04
–A–
24
13
–B– P 12 PL
0.010 (0.25)
1
M
B
M
12
D
J
24 PL
0.010 (0.25)
M
T A
S
B
S
F
R X 45°
C
–T–
SEATING
PLANE
G
22 PL
MOTOROLA ANALOG IC DEVICE DATA
K
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
15.25 15.54
7.40
7.60
2.35
2.65
0.35
0.49
0.41
0.90
1.27 BSC
0.23
0.32
0.13
0.29
0°
8°
10.05 10.55
0.25
0.75
INCHES
MIN
MAX
0.601 0.612
0.292 0.299
0.093 0.104
0.014 0.019
0.016 0.035
0.050 BSC
0.009 0.013
0.005 0.011
0°
8°
0.395 0.415
0.010 0.029
27
MC33219A
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such
unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
Literature Distribution Centers:
USA/EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036.
JAPAN: Nippon Motorola Ltd.; 4–32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan.
ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.
28
◊
CODELINE TO BE PLACED HERE
*MC33219A/D*
MC33219A/D
MOTOROLA ANALOG IC DEVICE
DATA