Each part includes a short description. It is possible to build after1), 5), 6), 7), 8) (and probably more but it hasn't been tested).

Some testing has been done with a couple of uniprocessor systems:- 1 behaves well with one or two iphase adapters in the same box;- 3, 4, 5 doesn't crash and it even seems to display the right number of vc. More testing to come;- same comments apply for 6;- 7 is completely untested. If somebody has typical scripts at hand for a back-to-back lane configuration, he will be welcome.