A team at SPINTEC in Grenoble has demonstrated thermally stable and electrically switchable Spin Transfer Torque MRAM (STT-MRAM) of diameter down to 4nm. Among the various technologies of non-volatile memories, STT-MRAM gathers a unique combination of assets: non-volatility, write speed (3-30ns), density (4Gbit demonstrated by Hynix/Toshiba), low consumption (a few tens of fJ/write), and very importantly an extremely long write endurance (>1013cycles). Conventional STT-MRAM are based on out-of-plane magnetized magnetic tunnel junctions (MTJs) in which the storage layer magnetization is pulled out-of-plane thanks to a perpendicular anisotropy originating from the interface between the oxide barrier and the magnetic electrodes. This phenomenon was discovered at SPINTEC in 2002 and reviewed in a recent article in Review of Modern Physics (Rev. Mod. Phys. 89, 025008 (2017)). In conventional STT-MRAM, this interfacial anisotropy is large enough to insure thermal stability of the storage layer magnetization down to diameter of the order of 20nm. To increase the STT-MRAM downsize scalability, a novel type of MRAM with much thicker storage layer started to be investigated in this team 4 years ago. By drastically increasing the thickness of the storage layer to values comparable to its diameter, a perpendicular shape anisotropy (PSA) is induced in the storage layer which comes on top of the interfacial anisotropy with no penalty on the switching current. The name PSA-STT-MRAM was coined by SPINTEC to designate this memory. These results were presented during the MRAM special poster session at IEDM 2017, 5 December 2017 in San Francisco, are posted on arXiv (Highly thermally stable sub-20nm magnetic random-access memory based on perpendicular shape anisotropy by N.Perrissin et al) and will be further detailed during an invited talk at INTERMAG 2018 in April.

The figure below shows in color code the thermal stability factor Δ which determines the memory retention versus the MTJ diameter and storage layer thickness. For practical application, this factor should be in the range 60 to 100 depending on the memory capacity and acceptable error rate. In conventional STT-MRAM, the storage layer thickness is typically in the range 1.4 to 2.5nm. They correspond to the lower right corner of this diagram which clearly illustrate their limited downsize scalability. In contrast, the top part of the diagram corresponds to the proposed PSA-STT-MRAM configuration with thick storage layer. Remarkably, thermal stability factor of 60 can still be obtained down to diameter of 4nm.

This was experimentally demonstrated at SPINTEC using composite storage layer combining FeCoB next to the MgO tunnel barrier with NiFe or Co in the bulk of the storage layer. As shown below in the hysteresis loops measured on cells of various diameters D with thick storage layer, quite large coercive field indicating large thermal stability was observed for cells of diameter at least down to 8nm.

Besides, these cells could be switched back and forth between low and high resistance states by current using the spin transfer torque phenomenon as illustrated below :

In addition to their excellent and tunable thermal stability at sub-10nm diameter, PSA-STT-MRAM have additional advantages: low Gilbert damping material can be used in the bulk of the storage layer to reduce the write current without compromising on the tunnel magnetoresistance amplitude. Furthermore, because the storage layer is thick, the variation with temperature of its magnetic properties is much closer to that of the bulk material and therefore less temperature dependent around room temperature than when very thin storage layer are used. As a result, the PSA-STT-MRAM properties are much less dependent on the operating temperature than conventional STT-MRAM which is very important for automotive and industrial applications or to fulfill reflow compliance.
We became recently aware that similar results were independently obtained at Tohoku University on MTJs comprising thick FeB storage layer (Watanabe et al, Nat.Com. 9, 663 (2018)).

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SPINTEC is jointly operated by CEA, CNRS, UGA, G-INP and located in Grenoble, France