//===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===////// The LLVM Compiler Infrastructure//// This file is distributed under the University of Illinois Open Source// License. See LICENSE.TXT for details.////===----------------------------------------------------------------------===////// This file contains the declaration of the MachineInstr class, which is the// basic representation for all target dependent machine instructions used by// the back end.////===----------------------------------------------------------------------===//#ifndef LLVM_CODEGEN_MACHINEINSTR_H#define LLVM_CODEGEN_MACHINEINSTR_H#include"llvm/CodeGen/MachineOperand.h"#include"llvm/MC/MCInstrDesc.h"#include"llvm/Target/TargetOpcodes.h"#include"llvm/ADT/ilist.h"#include"llvm/ADT/ilist_node.h"#include"llvm/ADT/STLExtras.h"#include"llvm/ADT/StringRef.h"#include"llvm/ADT/DenseMapInfo.h"#include"llvm/Support/DebugLoc.h"#include<vector>namespacellvm{template<typenameT>classSmallVectorImpl;classAliasAnalysis;classTargetInstrInfo;classTargetRegisterClass;classTargetRegisterInfo;classMachineFunction;classMachineMemOperand;//===----------------------------------------------------------------------===///// MachineInstr - Representation of each machine instruction.///classMachineInstr:publicilist_node<MachineInstr>{public:typedefMachineMemOperand**mmo_iterator;/// Flags to specify different kinds of comments to output in/// assembly code. These flags carry semantic information not/// otherwise easily derivable from the IR text.///enumCommentFlag{ReloadReuse=0x1};enumMIFlag{NoFlags=0,FrameSetup=1<<0// Instruction is used as a part of// function frame setup code.};private:constMCInstrDesc*MCID;// Instruction descriptor.uint8_tFlags;// Various bits of additional// information about machine// instruction.uint8_tAsmPrinterFlags;// Various bits of information used by// the AsmPrinter to emit helpful// comments. This is *not* semantic// information. Do not use this for// anything other than to convey comment// information to AsmPrinter.std::vector<MachineOperand>Operands;// the operandsmmo_iteratorMemRefs;// information on memory referencesmmo_iteratorMemRefsEnd;MachineBasicBlock*Parent;// Pointer to the owning basic block.DebugLocdebugLoc;// Source line information.MachineInstr(constMachineInstr&);// DO NOT IMPLEMENTvoidoperator=(constMachineInstr&);// DO NOT IMPLEMENT// Intrusive list supportfriendstructilist_traits<MachineInstr>;friendstructilist_traits<MachineBasicBlock>;voidsetParent(MachineBasicBlock*P){Parent=P;}/// MachineInstr ctor - This constructor creates a copy of the given/// MachineInstr in the given MachineFunction.MachineInstr(MachineFunction&,constMachineInstr&);/// MachineInstr ctor - This constructor creates a dummy MachineInstr with/// MCID NULL and no operands.MachineInstr();// The next two constructors have DebugLoc and non-DebugLoc versions;// over time, the non-DebugLoc versions should be phased out and eventually// removed./// MachineInstr ctor - This constructor creates a MachineInstr and adds the/// implicit operands. It reserves space for the number of operands specified/// by the MCInstrDesc. The version with a DebugLoc should be preferred.explicitMachineInstr(constMCInstrDesc&MCID,boolNoImp=false);/// MachineInstr ctor - Work exactly the same as the ctor above, except that/// the MachineInstr is created and added to the end of the specified basic/// block. The version with a DebugLoc should be preferred.MachineInstr(MachineBasicBlock*MBB,constMCInstrDesc&MCID);/// MachineInstr ctor - This constructor create a MachineInstr and add the/// implicit operands. It reserves space for number of operands specified by/// MCInstrDesc. An explicit DebugLoc is supplied.explicitMachineInstr(constMCInstrDesc&MCID,constDebugLocdl,boolNoImp=false);/// MachineInstr ctor - Work exactly the same as the ctor above, except that/// the MachineInstr is created and added to the end of the specified basic/// block.MachineInstr(MachineBasicBlock*MBB,constDebugLocdl,constMCInstrDesc&MCID);~MachineInstr();// MachineInstrs are pool-allocated and owned by MachineFunction.friendclassMachineFunction;public:constMachineBasicBlock*getParent()const{returnParent;}MachineBasicBlock*getParent(){returnParent;}/// getAsmPrinterFlags - Return the asm printer flags bitvector.///uint8_tgetAsmPrinterFlags()const{returnAsmPrinterFlags;}/// clearAsmPrinterFlags - clear the AsmPrinter bitvector///voidclearAsmPrinterFlags(){AsmPrinterFlags=0;}/// getAsmPrinterFlag - Return whether an AsmPrinter flag is set.///boolgetAsmPrinterFlag(CommentFlagFlag)const{returnAsmPrinterFlags&Flag;}/// setAsmPrinterFlag - Set a flag for the AsmPrinter.///voidsetAsmPrinterFlag(CommentFlagFlag){AsmPrinterFlags|=(uint8_t)Flag;}/// getFlags - Return the MI flags bitvector.uint8_tgetFlags()const{returnFlags;}/// getFlag - Return whether an MI flag is set.boolgetFlag(MIFlagFlag)const{returnFlags&Flag;}/// setFlag - Set a MI flag.voidsetFlag(MIFlagFlag){Flags|=(uint8_t)Flag;}voidsetFlags(unsignedflags){Flags=flags;}/// clearAsmPrinterFlag - clear specific AsmPrinter flags///voidclearAsmPrinterFlag(CommentFlagFlag){AsmPrinterFlags&=~Flag;}/// getDebugLoc - Returns the debug location id of this MachineInstr.///DebugLocgetDebugLoc()const{returndebugLoc;}/// emitError - Emit an error referring to the source location of this/// instruction. This should only be used for inline assembly that is somehow/// impossible to compile. Other errors should have been handled much/// earlier.////// If this method returns, the caller should try to recover from the error.///voidemitError(StringRefMsg)const;/// getDesc - Returns the target instruction descriptor of this/// MachineInstr.constMCInstrDesc&getDesc()const{return*MCID;}/// getOpcode - Returns the opcode of this MachineInstr.///intgetOpcode()const{returnMCID->Opcode;}/// Access to explicit operands of the instruction.///unsignedgetNumOperands()const{return(unsigned)Operands.size();}constMachineOperand&getOperand(unsignedi)const{assert(i<getNumOperands()&&"getOperand() out of range!");returnOperands[i];}MachineOperand&getOperand(unsignedi){assert(i<getNumOperands()&&"getOperand() out of range!");returnOperands[i];}/// getNumExplicitOperands - Returns the number of non-implicit operands.///unsignedgetNumExplicitOperands()const;/// iterator/begin/end - Iterate over all operands of a machine instruction.typedefstd::vector<MachineOperand>::iteratormop_iterator;typedefstd::vector<MachineOperand>::const_iteratorconst_mop_iterator;mop_iteratoroperands_begin(){returnOperands.begin();}mop_iteratoroperands_end(){returnOperands.end();}const_mop_iteratoroperands_begin()const{returnOperands.begin();}const_mop_iteratoroperands_end()const{returnOperands.end();}/// Access to memory operands of the instructionmmo_iteratormemoperands_begin()const{returnMemRefs;}mmo_iteratormemoperands_end()const{returnMemRefsEnd;}boolmemoperands_empty()const{returnMemRefsEnd==MemRefs;}/// hasOneMemOperand - Return true if this instruction has exactly one/// MachineMemOperand.boolhasOneMemOperand()const{returnMemRefsEnd-MemRefs==1;}enumMICheckType{CheckDefs,// Check all operands for equalityCheckKillDead,// Check all operands including kill / dead markersIgnoreDefs,// Ignore all definitionsIgnoreVRegDefs// Ignore virtual register definitions};/// isIdenticalTo - Return true if this instruction is identical to (same/// opcode and same operands as) the specified instruction.boolisIdenticalTo(constMachineInstr*Other,MICheckTypeCheck=CheckDefs)const;/// removeFromParent - This method unlinks 'this' from the containing basic/// block, and returns it, but does not delete it.MachineInstr*removeFromParent();/// eraseFromParent - This method unlinks 'this' from the containing basic/// block and deletes it.voideraseFromParent();/// isLabel - Returns true if the MachineInstr represents a label.///boolisLabel()const{returngetOpcode()==TargetOpcode::PROLOG_LABEL||getOpcode()==TargetOpcode::EH_LABEL||getOpcode()==TargetOpcode::GC_LABEL;}boolisPrologLabel()const{returngetOpcode()==TargetOpcode::PROLOG_LABEL;}boolisEHLabel()const{returngetOpcode()==TargetOpcode::EH_LABEL;}boolisGCLabel()const{returngetOpcode()==TargetOpcode::GC_LABEL;}boolisDebugValue()const{returngetOpcode()==TargetOpcode::DBG_VALUE;}boolisPHI()const{returngetOpcode()==TargetOpcode::PHI;}boolisKill()const{returngetOpcode()==TargetOpcode::KILL;}boolisImplicitDef()const{returngetOpcode()==TargetOpcode::IMPLICIT_DEF;}boolisInlineAsm()const{returngetOpcode()==TargetOpcode::INLINEASM;}boolisStackAligningInlineAsm()const;boolisInsertSubreg()const{returngetOpcode()==TargetOpcode::INSERT_SUBREG;}boolisSubregToReg()const{returngetOpcode()==TargetOpcode::SUBREG_TO_REG;}boolisRegSequence()const{returngetOpcode()==TargetOpcode::REG_SEQUENCE;}boolisCopy()const{returngetOpcode()==TargetOpcode::COPY;}boolisFullCopy()const{returnisCopy()&&!getOperand(0).getSubReg()&&!getOperand(1).getSubReg();}/// isCopyLike - Return true if the instruction behaves like a copy./// This does not include native copy instructions.boolisCopyLike()const{returnisCopy()||isSubregToReg();}/// isIdentityCopy - Return true is the instruction is an identity copy.boolisIdentityCopy()const{returnisCopy()&&getOperand(0).getReg()==getOperand(1).getReg()&&getOperand(0).getSubReg()==getOperand(1).getSubReg();}/// readsRegister - Return true if the MachineInstr reads the specified/// register. If TargetRegisterInfo is passed, then it also checks if there/// is a read of a super-register./// This does not count partial redefines of virtual registers as reads:/// %reg1024:6 = OP.boolreadsRegister(unsignedReg,constTargetRegisterInfo*TRI=NULL)const{returnfindRegisterUseOperandIdx(Reg,false,TRI)!=-1;}/// readsVirtualRegister - Return true if the MachineInstr reads the specified/// virtual register. Take into account that a partial define is a/// read-modify-write operation.boolreadsVirtualRegister(unsignedReg)const{returnreadsWritesVirtualRegister(Reg).first;}/// readsWritesVirtualRegister - Return a pair of bools (reads, writes)/// indicating if this instruction reads or writes Reg. This also considers/// partial defines./// If Ops is not null, all operand indices for Reg are added.std::pair<bool,bool>readsWritesVirtualRegister(unsignedReg,SmallVectorImpl<unsigned>*Ops=0)const;/// killsRegister - Return true if the MachineInstr kills the specified/// register. If TargetRegisterInfo is passed, then it also checks if there is/// a kill of a super-register.boolkillsRegister(unsignedReg,constTargetRegisterInfo*TRI=NULL)const{returnfindRegisterUseOperandIdx(Reg,true,TRI)!=-1;}/// definesRegister - Return true if the MachineInstr fully defines the/// specified register. If TargetRegisterInfo is passed, then it also checks/// if there is a def of a super-register./// NOTE: It's ignoring subreg indices on virtual registers.booldefinesRegister(unsignedReg,constTargetRegisterInfo*TRI=NULL)const{returnfindRegisterDefOperandIdx(Reg,false,false,TRI)!=-1;}/// modifiesRegister - Return true if the MachineInstr modifies (fully define/// or partially define) the specified register./// NOTE: It's ignoring subreg indices on virtual registers.boolmodifiesRegister(unsignedReg,constTargetRegisterInfo*TRI)const{returnfindRegisterDefOperandIdx(Reg,false,true,TRI)!=-1;}/// registerDefIsDead - Returns true if the register is dead in this machine/// instruction. If TargetRegisterInfo is passed, then it also checks/// if there is a dead def of a super-register.boolregisterDefIsDead(unsignedReg,constTargetRegisterInfo*TRI=NULL)const{returnfindRegisterDefOperandIdx(Reg,true,false,TRI)!=-1;}/// findRegisterUseOperandIdx() - Returns the operand index that is a use of/// the specific register or -1 if it is not found. It further tightens/// the search criteria to a use that kills the register if isKill is true.intfindRegisterUseOperandIdx(unsignedReg,boolisKill=false,constTargetRegisterInfo*TRI=NULL)const;/// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns/// a pointer to the MachineOperand rather than an index.MachineOperand*findRegisterUseOperand(unsignedReg,boolisKill=false,constTargetRegisterInfo*TRI=NULL){intIdx=findRegisterUseOperandIdx(Reg,isKill,TRI);return(Idx==-1)?NULL:&getOperand(Idx);}/// findRegisterDefOperandIdx() - Returns the operand index that is a def of/// the specified register or -1 if it is not found. If isDead is true, defs/// that are not dead are skipped. If Overlap is true, then it also looks for/// defs that merely overlap the specified register. If TargetRegisterInfo is/// non-null, then it also checks if there is a def of a super-register.intfindRegisterDefOperandIdx(unsignedReg,boolisDead=false,boolOverlap=false,constTargetRegisterInfo*TRI=NULL)const;/// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns/// a pointer to the MachineOperand rather than an index.MachineOperand*findRegisterDefOperand(unsignedReg,boolisDead=false,constTargetRegisterInfo*TRI=NULL){intIdx=findRegisterDefOperandIdx(Reg,isDead,false,TRI);return(Idx==-1)?NULL:&getOperand(Idx);}/// findFirstPredOperandIdx() - Find the index of the first operand in the/// operand list that is used to represent the predicate. It returns -1 if/// none is found.intfindFirstPredOperandIdx()const;/// findInlineAsmFlagIdx() - Find the index of the flag word operand that/// corresponds to operand OpIdx on an inline asm instruction. Returns -1 if/// getOperand(OpIdx) does not belong to an inline asm operand group.////// If GroupNo is not NULL, it will receive the number of the operand group/// containing OpIdx.////// The flag operand is an immediate that can be decoded with methods like/// InlineAsm::hasRegClassConstraint().///intfindInlineAsmFlagIdx(unsignedOpIdx,unsigned*GroupNo=0)const;/// getRegClassConstraint - Compute the static register class constraint for/// operand OpIdx. For normal instructions, this is derived from the/// MCInstrDesc. For inline assembly it is derived from the flag words.////// Returns NULL if the static register classs constraint cannot be/// determined.///constTargetRegisterClass*getRegClassConstraint(unsignedOpIdx,constTargetInstrInfo*TII,constTargetRegisterInfo*TRI)const;/// isRegTiedToUseOperand - Given the index of a register def operand,/// check if the register def is tied to a source operand, due to either/// two-address elimination or inline assembly constraints. Returns the/// first tied use operand index by reference is UseOpIdx is not null.boolisRegTiedToUseOperand(unsignedDefOpIdx,unsigned*UseOpIdx=0)const;/// isRegTiedToDefOperand - Return true if the use operand of the specified/// index is tied to an def operand. It also returns the def operand index by/// reference if DefOpIdx is not null.boolisRegTiedToDefOperand(unsignedUseOpIdx,unsigned*DefOpIdx=0)const;/// clearKillInfo - Clears kill flags on all operands.///voidclearKillInfo();/// copyKillDeadInfo - Copies kill / dead operand properties from MI.///voidcopyKillDeadInfo(constMachineInstr*MI);/// copyPredicates - Copies predicate operand(s) from MI.voidcopyPredicates(constMachineInstr*MI);/// substituteRegister - Replace all occurrences of FromReg with ToReg:SubIdx,/// properly composing subreg indices where necessary.voidsubstituteRegister(unsignedFromReg,unsignedToReg,unsignedSubIdx,constTargetRegisterInfo&RegInfo);/// addRegisterKilled - We have determined MI kills a register. Look for the/// operand that uses it and mark it as IsKill. If AddIfNotFound is true,/// add a implicit operand if it's not found. Returns true if the operand/// exists / is added.booladdRegisterKilled(unsignedIncomingReg,constTargetRegisterInfo*RegInfo,boolAddIfNotFound=false);/// addRegisterDead - We have determined MI defined a register without a use./// Look for the operand that defines it and mark it as IsDead. If/// AddIfNotFound is true, add a implicit operand if it's not found. Returns/// true if the operand exists / is added.booladdRegisterDead(unsignedIncomingReg,constTargetRegisterInfo*RegInfo,boolAddIfNotFound=false);/// addRegisterDefined - We have determined MI defines a register. Make sure/// there is an operand defining Reg.voidaddRegisterDefined(unsignedIncomingReg,constTargetRegisterInfo*RegInfo=0);/// setPhysRegsDeadExcept - Mark every physreg used by this instruction as/// dead except those in the UsedRegs list.voidsetPhysRegsDeadExcept(constSmallVectorImpl<unsigned>&UsedRegs,constTargetRegisterInfo&TRI);/// isSafeToMove - Return true if it is safe to move this instruction. If/// SawStore is set to true, it means that there is a store (or call) between/// the instruction's location and its intended destination.boolisSafeToMove(constTargetInstrInfo*TII,AliasAnalysis*AA,bool&SawStore)const;/// isSafeToReMat - Return true if it's safe to rematerialize the specified/// instruction which defined the specified register instead of copying it.boolisSafeToReMat(constTargetInstrInfo*TII,AliasAnalysis*AA,unsignedDstReg)const;/// hasVolatileMemoryRef - Return true if this instruction may have a/// volatile memory reference, or if the information describing the/// memory reference is not available. Return false if it is known to/// have no volatile memory references.boolhasVolatileMemoryRef()const;/// isInvariantLoad - Return true if this instruction is loading from a/// location whose value is invariant across the function. For example,/// loading a value from the constant pool or from the argument area of/// a function if it does not change. This should only return true of *all*/// loads the instruction does are invariant (if it does multiple loads).boolisInvariantLoad(AliasAnalysis*AA)const;/// isConstantValuePHI - If the specified instruction is a PHI that always/// merges together the same virtual register, return the register, otherwise/// return 0.unsignedisConstantValuePHI()const;/// hasUnmodeledSideEffects - Return true if this instruction has side/// effects that are not modeled by mayLoad / mayStore, etc./// For all instructions, the property is encoded in MCInstrDesc::Flags/// (see MCInstrDesc::hasUnmodeledSideEffects(). The only exception is/// INLINEASM instruction, in which case the side effect property is encoded/// in one of its operands (see InlineAsm::Extra_HasSideEffect).///boolhasUnmodeledSideEffects()const;/// allDefsAreDead - Return true if all the defs of this instruction are dead.///boolallDefsAreDead()const;/// copyImplicitOps - Copy implicit register operands from specified/// instruction to this instruction.voidcopyImplicitOps(constMachineInstr*MI);//// Debugging support//voidprint(raw_ostream&OS,constTargetMachine*TM=0)const;voiddump()const;//===--------------------------------------------------------------------===//// Accessors used to build up machine instructions./// addOperand - Add the specified operand to the instruction. If it is an/// implicit operand, it is added to the end of the operand list. If it is/// an explicit operand it is added at the end of the explicit operand list/// (before the first implicit operand).voidaddOperand(constMachineOperand&Op);/// setDesc - Replace the instruction descriptor (thus opcode) of/// the current instruction with a new one.///voidsetDesc(constMCInstrDesc&tid){MCID=&tid;}/// setDebugLoc - Replace current source information with new such./// Avoid using this, the constructor argument is preferable.///voidsetDebugLoc(constDebugLocdl){debugLoc=dl;}/// RemoveOperand - Erase an operand from an instruction, leaving it with one/// fewer operand than it started with.///voidRemoveOperand(unsignedi);/// addMemOperand - Add a MachineMemOperand to the machine instruction./// This function should be used only occasionally. The setMemRefs function/// is the primary method for setting up a MachineInstr's MemRefs list.voidaddMemOperand(MachineFunction&MF,MachineMemOperand*MO);/// setMemRefs - Assign this MachineInstr's memory reference descriptor/// list. This does not transfer ownership.voidsetMemRefs(mmo_iteratorNewMemRefs,mmo_iteratorNewMemRefsEnd){MemRefs=NewMemRefs;MemRefsEnd=NewMemRefsEnd;}private:/// getRegInfo - If this instruction is embedded into a MachineFunction,/// return the MachineRegisterInfo object for the current function, otherwise/// return null.MachineRegisterInfo*getRegInfo();/// addImplicitDefUseOperands - Add all implicit def and use operands to/// this instruction.voidaddImplicitDefUseOperands();/// RemoveRegOperandsFromUseLists - Unlink all of the register operands in/// this instruction from their respective use lists. This requires that the/// operands already be on their use lists.voidRemoveRegOperandsFromUseLists();/// AddRegOperandsToUseLists - Add all of the register operands in/// this instruction from their respective use lists. This requires that the/// operands not be on their use lists yet.voidAddRegOperandsToUseLists(MachineRegisterInfo&RegInfo);};/// MachineInstrExpressionTrait - Special DenseMapInfo traits to compare/// MachineInstr* by *value* of the instruction rather than by pointer value./// The hashing and equality testing functions ignore definitions so this is/// useful for CSE, etc.structMachineInstrExpressionTrait:DenseMapInfo<MachineInstr*>{staticinlineMachineInstr*getEmptyKey(){return0;}staticinlineMachineInstr*getTombstoneKey(){returnreinterpret_cast<MachineInstr*>(-1);}staticunsignedgetHashValue(constMachineInstr*const&MI);staticboolisEqual(constMachineInstr*const&LHS,constMachineInstr*const&RHS){if(RHS==getEmptyKey()||RHS==getTombstoneKey()||LHS==getEmptyKey()||LHS==getTombstoneKey())returnLHS==RHS;returnLHS->isIdenticalTo(RHS,MachineInstr::IgnoreVRegDefs);}};//===----------------------------------------------------------------------===//// Debugging Supportinlineraw_ostream&operator<<(raw_ostream&OS,constMachineInstr&MI){MI.print(OS);returnOS;}}// End llvm namespace#endif