On the way home from Obsolence, Paris, Flo and I started to sketch the sk60-delay module.

Ultimately I’d like an adjustable delay from 1 to around 16 frames – no way to do this strictly analog, other than using two tape machines, as we did at the Shift Festival or some sort of magnetic drum (but that’s a project for later…). For a convenient small module, the only way we see is something around the lines of:

Convert to digital

Stuff into RAM

Read out later

Convert back to analog

I was sure I would not get the timings right on the first time, so we designed the following experimental platform around the TLC5510INS 20Msps ADC, Cypress CY62158ELL-45ZSXI 8MBit SRAM and a TLC7524CNS 10Msps DAC.

Timing sequence

Initially I wanted to trigger the different steps with a decade counter and a much faster clock, but by mistake I drew a 4040 binary counter into the schematic. This doesn’t help much. So we decided to try to hook everything to the same clock and see what happens.

after some fiddling with the usual errors we actually had a delayed video signal!

Observations

The PLL CD4046BNSR that we wanted to use as a CV-adjustable clock doesn’t go up to 10Mhz (only 0.8 at 5V). No colors, obviously, at <1Mhz. The PLL seems not stable enough anyway: vertical lines got quite distorted.

There’s some “residue” of the original image coming through. Maybe the DAC sees some data from the ADC directly? Would be a timing issue.

We found a 10Mhz crystal lying around and used a spare inverter to drive it.

At 10Mhz colors come through and there seems to be no phase shift. Quite surprising.

But the delay is completely gone.

Devided the clock by 2.

At 5Mhz colors are almost gone (not very surprising)

The delay works again, but there’s even more “residue” of the un-delayed image.

I really think the ADC doesn’t shut of its outputs fast enough – I’ll try to build a small delay line with hex inverters to trigger things in the right order…