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Analysis A little over two years ago, upstart FPGA maker Achronix Semiconductor scored a big win over its rivals, Altera and Xilinx: it talked Intel into letting it use its cutting-edge chip factories to etch field-programmable gate array (FPGA) chips using Chipzilla's 22-nanometer TriGate process.

FPGAs are malleable and can be tweaked to change their basic functions in ways that an application-specific integrated circuit (ASIC) cannot; you want to use ASICs when you have hundreds of thousands to millions of units and you can spread the cost of chip design over that volume.

But FPGAs are better if you are dealing with low-volume electronics and you want to be able to reprogram the chip rather than pay for a whole redesign. People have been trying to build reprogrammable computers (at the chip level, not the systems software level) for a while, and have succeeded in using them as coprocessors and special function accelerators.

Back when the Achronix fab deal was done with Intel in November 2010, the agreement called for the Speedster22i FPGA to come with one million lookup tables (LUTs), which are akin to gate counts in an ASIC, and for the chip to run at 1.5GHz, the same clock speed as the prior Speedster chips.

The plan is to eventually push it up to 2.5 million LUTs, which is functionally equivalent to an ASIC with 20 million gates. Three different variants of the Speedster22i FPGA will be made available with the HD1000 development board, which comes on a PCI-Express card and cost $13,000 with a software development kit.

By the way, the plan was to have the Speedster22i FPGA out the Intel fab door by the end of 2011, so clearly there were some issues getting the Achronix FPGAs onto Intel's 22nm processes. The idea was to take the price of a high-end FPGA chip down from about $1,000 to around $400, according to Achronix at the time the deal was struck, so apparently most of the cost in that development card above is the software.

Under the deal inked between FPGA rival Altera and Intel, Altera will move production of the Stratix family of FPGAs to Intel's future 14-nanometer technologies, a significant jump from the 28-nanometer processes used by Taiwan Semiconductor Manufacturing Corp to etch the current Stratix V FPGAs.

"Altera's FPGAs using Intel 14-nm technology will enable customers to design the most advanced, highest-performing FPGAs in the industry," said John Daane, CEO at Altera, in a statement. "In addition, Altera gains a tremendous competitive advantage at the high end in that we are the only major FPGA company with access to this technology."

Well, how long that lasts – and how long rival Xilinx remains outside of Intel's fabs – is an open question. Intel surely wants all three FPGA makers to keep the wafer bakers warm and cover some of the billions of dollars that Chipzilla invests in foundries. Right?

Wrong. The terms of the deal cut between Intel and Altera were not disclosed, but apparently Intel did not keep its options open with the deal it cut with Altera. According to a report in the Wall Street Journal, Intel agreed to a twelve-year deal with Altera and said that the other major suppliers of FPGAs – that is mainly Xilinx – would not be given access to Chipzilla's fabs.

Altera and TSMC are already cooking up future Stratix FPGAs based on 20-nanometer processes, and Altera said in a separate statement that these were on track. It would "continue to leverage future TSMC process technologies in its tailored product portfolio for performance, bandwidth, and power efficiency needs across diverse end applications."

In other words, Altera is not putting all of its chips in one foundry's basket, particularly not after a 20-year partnership with TSMC. If you can afford to do it, double sourcing chips is probably the best strategy because all foundries screw up and more often than we probably know. You want to have options, and you have to be willing to pay for them and hope it pans out over the long haul. ®