Name that Ware December 2013

It’s been a while since I’ve had a proper die shot for a name that ware. Thanks to T. Holman for sharing this ware with us!

[Edit: You can download a copy of the original, unobfuscated image here (warning: 23MB).]

This entry was posted on Monday, December 9th, 2013 at 8:49 pm and is filed under Hacking. You can follow any responses to this entry through the RSS 2.0 feed.
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No, waveguides would be too big, millimeter sized structures are suited for the terahertz range. micrometric hollow waveguides on silicium would be suited for micrometric waves, e.g. light, and that would be photonic circuits.

MMICs have long folded strip lines structures, these components are often amplifiers and have parallel wired RF transistors that requires wilkinson dividers, whose lengths must be matched to quarter waves.

Re: the “SAW” look: If you look at the comb-like structures with the small dots on the fingers, you’ll realize that there’s always a finger connected to one side of the areay, the next finger will be donnected to the other side. And there is a small thin metal in between. These structures that some commenter classified as a “SAW” is actually a transistor, with the “big dotted fingers” being metal-layers with a lot of vias. Those devices are supposed to carry a lot of current.

I’m counting 6 of the very large transistors, the very large one at 11o’clock and at least the pretty central one (at 6 o’clock, just above the pin connect), but also the 2 other larger ones at 5 o’clock seem to share the gate (the bigger metal just below 1997). Strangely enough, they all seem to have different size, which equals different current rating.

If you look at the pin-pads, there are three distinct types. The lone one at 9 o’clock without additional circuitry (possibly GND/package/substrate), the type at 10, 11 and 6 o’clock (as far as my guesses go, it’s a single protectino diode) and a identical cell for the pins at 7:30, 12:00, 2 o’clock and 4 o’clock which seems to be more elaborate.

I see only very little “small signal” transistors (at 9 o’clock) and the pretty obscure structures with the circles in them.

I’d summarize that this is…

– definitely high-power (several amps)
– very well protected pins (over/undervoltage)
– at least two high-powered push/pull transistor pairs
– very little “small signal” logic (less than a dozen transistors)
– not a symmetrical parts, like e.g. a dual H-bridge, that would contain several transistors of the same size/rating

So, a guess, and I’m really feeling not good at this, because of the few low-power components) would be (parts of a) 2 channel switch-mode voltage regulator, maybe a buck/boost (which has the equivalent of a H-bridge between the switcher’s coil’s pins, have a look at the http://www.linear.com/product/LTC3531 datasheet, for a low-current version). Buth with a much higher power rating.

Huh. The Ti marks, I see those as mask alignment/etch quality metrics. They do kind of have the shape of Ti, but each one is printed on a different layer and the shape of the feature is typical of what you’d use to make sure you don’t have a problem on a particular film layer.

There’s some other features that I think could be very distinctive in terms of identifying the process and fab used, but I haven’t seen anyone comment on those yet.

It’s the symbol for mask copyrights, e.g. the patterns used to define the layers on a chip.

Mask works have a copyright term of 10 years, unlike Mickey Mouse, so this design’s mask set is out of copyright and in the public domain:

“17 USC 904 (b) Subject to subsection (c) and the provisions of this chapter, the protection provided under this chapter to a mask work shall end ten years after the date on which such protection commences under subsection (a).”

A tiny edifice of copyright law that still retains a semblance of sanity; perhaps because it’s a better use of funds to develop newer, faster chips rather than pay lobbyists to protect existing designs for over a hundred years.

Mask patents are a relatively recent piece of law (late 80s early 90s?) – when I entered the field people were stealing each other’s masks left right and center – with 1 layer of metal (like this chip) everything’s exposed and it was found that copyright law didn’t apply – it reached the point where designers spent time including bogus circuits in their designs, polygons laid out in such a way that a naive copy would fail (perhaps turn on both halves of an output pair and fry the die)

It’s definitely a 555 timer, but it’s CMOS (or possibly BiCMOS, but looking again I think that’s unlikely). The three part resistor ladder from the 555 is implemented as 6 FETs in 3 epi pockets (two per pocket). The bond pads are (clockwise from the top left) DIS, THRESH, CV, RESET, OUT, TRIG, GND, VCC.

Notice the protection circuits on the input pins and the large FET output stages for OUT and DIS (push pull and open drain, respectively).

the pads:
– I can identify 4 pads (upper center, upper right, right center, lower left) with similar circuitry, maybe inputs?
– Then there are two outputs (upper left and lower center) with a larger grid structure, maybe those are driver circuits? many transistors in parallel?
– The center left is connected to the border, could be ground and the remaining pin needs to be VCC

The overall circuit is fairly small, so my guess goes to some dual opamp

1997 is way too late for a 555 clone and I agree it looks like it’s meant to handle some power. There isn’t enough symmetry for a dual opamp. I’m going to take a wild guess and say a small switcher like the MC3063 type. Given all eight pins and the date, maybe the NCP3064?

I agree – it’s a fun die to look at, all nicely laid out in your face:
– the two things with the 6 circles (bipolar transistors) each in the opposite corners are the 2 comparators
– the box at the top left is a single DISCHARGE N-FET,
– while all the structures in the bottom right quadrant are 3 chained cmos inverters (N/P-FET pairs), each bigger than the other driving the TTL/CMOS output.
– The 3 resistors are in the mid left (GND end on the left, VCC on the right)
– the SR-flop is largely under the resistors
– All the input pads have latchup protection

Well the goal here has to be to make as near identical transistors as possible – I’d guess that circular objects might make the best results across all corners of the process – I can imagine process variations that might occur linearly across a wafer that might sort of cancel out no matter which direction they occur in

Having read this I believed it was very enlightening. I appreciate you taking the time and energy to put this content together. I once again find myself personally spending a lot of time both reading and leaving comments. But so what, it was still worthwhile!