Judging by the datasheet you can send 12 bits followed by a few "don't care":

Quote

The 74HC161 counter in incremented on every rising edge of the clock. Additionally, the data is loaded into the DAC8512 on the falling edge of the clock by inverting the serial clock using gate "Y." The timing diagram shows that after the twelfth bit has been clocked the output of the counter is binary 1011. On the very next rising clock edge, the output of the counter changes to binary 1100 upon which the output of gate "X" goes LOW to generate the LD pulse. The LD signal is connected to both the DAC's LD and the counter's LOAD pins to prevent the thirteenth rising clock edge from advancing the DAC's internal shift register. This prevents false loading of data into the DAC8512.

I would be very surprised if modern designers expected exactly 12 bits. More like 16 bits with a provision to ignore some of them, as the above seems to state.

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The DAC is 12-bit, so, by datasheet, should get values between 0 and 4095. When we send some zeroes before valuable data, the DAC input shift register just shifts that zeroes to the left out of register, so only 12 bits remain.

That code is supposed to go from 0 to 4095, resulting in 0-to-4.095V "saw" with delay between each cycle.

The problem is that DAC seems to read only 11 bit, so I get not single "saw", but a double "saw". Attached is info from my scope:

So I'm curious: Does the SPI send something other than my 2 bytes to line? Maybe some control bits between each of my byte?

Solved. Changing SPI to MODE3 instead of MODE0 helped.However, it seems to me that MODE0 is the right mode, according to datasheet.

Not the way I see it. Page 4 of the datasheet says clock is HIGH with LOW pulses (CPOL=1) and captures on the rising edge and propagates on the falling edge (CPHA=1).That is mode 3.http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus

edit: Here is how to compute mode. The phase (CPHA) isn't based on rising or falling edge as I might have implied above, but first or second edge after the slave select is activated (LOW).

If clock is LOW with HIGH pulses, then CPOL = 0.If clock is HIGH with LOW pulses, then CPOL = 1.

If it captures on the first edge (rising or falling) after SS goes LOW, then CPHA=0If it captures on the second edge (rising or falling) after SS goes LOW, then CPHA=1