Title (fr)

Publication

Application

Priority

DE 19830356 A 19980707

Abstract (en)

[origin: DE19830356C1] The circuit incorporates a variable resistor (M1) which consists of a FET. This forms part of a resistor (RM) to be balanced. A generator (IREF) produces a constant current (IM) which is to be fed to a switch (S3). The voltage (VRM) across the whole resistor may be measured. The drain-source path in the FET acts as the variable resistor. The source is connected to earth (GND) and the drain is connected to the other resistor (R1). The gate (G) of the transistor is connected via a switch (S2) to a further switch (S1) connected to resistors (R2,R1) and a voltage source (V1).