Hi Dave,
Thanks for reading my article. As you say you have made numerous comments, I'll try to address some of them here.
Firstly your minor nit about the regulator ground connection. The 723 does not sense the negative voltage from pin 4, it senses it from the bottom of the divider that is connected to the negative output terminal of the supply. Connecting pin 4 to the single point ground at the filter capacitor stops the 723 being affected by drops in the negative wiring. The resistor between pins 5 and 6 is optional. It balances changes in error amplifier offset current and is only required for precision supplies required to operate of the full temperature range. Adding a capacitor from pin 5 to ground is a bad idea. The reference zener is buffered and adding capacitance to this node can upset the frequency compensation of the buffer. The 723 may be old but it has out lived many more modern devices and works very well. The LM339 may be a better reference but it costs 3 times as much and you would have to add an error amp and current limit circuit. Placing a zener across the source-gate junction (pins 2 and 3 on the stripboard) will add extra protection for the FETs in the case of an output short circuit. In practice I've found that the 723's current limit is fast enough to protect the FETs, don't forget the voltage doubler output will also drop with the raw DC. The 10K resistor is well sized to reduce the gate charge with a time constant of 60us for 3 IRF540 FETs. All of your circuits without the "723 pass transistor" also remove the current limit circuit, You will definately need the gate zenner! You question the use of N channel FETs vs BJTs or P channel (I assume you mean enhancement mode as that is what is drawn). First is ease of parallel connection. Both BJT's and require balancing resistors to run in parallel, more components and wasted power. Second is on resistance, a IRF9Z24NPBF has 0.145 ohm RDS compared to the 0.044 of the IRF540. The IRF7406 you moddeled is totally unsuitable as it's only rated at 30V, 5A and 2.5W (you would need 50 of them at least). P channel devices also cost more.
Your circuit 4 does not improve the PSRR becaus the 10V zener just drops the unregulated voltage, it does not regulate it. coupling the 723 V+ to the output does not help.
The capacitor sizing is correct and works. Tested over many supplies in practice.
My heatsink sizing does not ignore the case thermal resistance. This is implicit in the 0.87W per degree de-rating factor and the fact thet the 125W rating off the IRF540 is at a CASE temperature of 25°C I clearly say "For a "reasonable" 65°C case temperature one IRF540 can dissipate a maximum of 95W" The use of three transistors reduces the effect of the insulators. A limit on word count limited the description of the thermal design. A single IRF4905 will not work in this design. The unregulated voltage is near to 20V under load, you calculate the voltage drop across the capacitor to be 5.4V and state that 20,000uH is not enough. You don't show the circuit you modeled but show a peak voltage of about 19V and a minmum of 13.2 This is 5.8V. The peak transformer voltage on load is 21.2V, less the rectifer Vf gives 20V for a minmum of 15.8V. I dont think you allowed for the root 2 peak voltage. Don't forget the transformer is rated at 20A and the DC output is 14A. I'm conservative with heatsinking 20-13.8 x 14A = 86.8W your 1.15°C/W heatsink will be running at 86.8x1.15 + 25 = 125.8°C!!
Even with zero thermal resistance between the HS and FET its only rated at about 70W at 125°C. Far too close for comfort.
Finally, you have not built either my or your designs, just critiqued mine and simulated yours. I have built many PSUs of various designs over many years and at least 10 of this basic MOSFET design have been built (many by members of the Christchurch ARS) without any problems. It works. The unit pictured was fully tested with real, qualitiy test equipment including full load for 48 hours. Even at 20A output ripple is minimal. I shall make some measurements of the raw and output ripple for you when I get a moment.

G8RPI wrote:Hi Dave,
Thanks for reading my article. As you say you have made numerous comments, I'll try to address some of them here.

Thanks for the response. Feedback is always good.

Firstly your minor nit about the regulator ground connection. The 723 does not sense the negative voltage from pin 4, it senses it from the bottom of the divider that is connected to the negative output terminal of the supply. Connecting pin 4 to the single point ground at the filter capacitor stops the 723 being affected by drops in the negative wiring.

While that is partly true, the problem is that the internal reference voltage is developed with respect to the filter capacitor while the sense is with respect to the output terminal. There is a load dependent voltage between the filter capacitor and the output terminal which gets added to the sensed output voltage seen at the input of the error amplifier. That is the source of the error.

The resistor between pins 5 and 6 is optional. It balances changes in error amplifier offset current and is only required for precision supplies required to operate of the full temperature range. Adding a capacitor from pin 5 to ground is a bad idea.

Such a horrible idea that Cref is mentioned in the data sheet and there is a plot of output noise vs. Cref value. (Figure 14 of TI data sheet.)
Note also that a Cref of 5uF improves ripple rejection by 12dB.

All of your circuits without the "723 pass transistor" also remove the current limit circuit, You will definately need the gate zenner!

The source is at the raw supply voltage which is around 20V or less. It can exceed that of course under low loads but the output voltage range of the LM723 does not get very close to ground. The raw supply would have to exceed 25 volts for that to be a concern.

Now in the shunt variations it could maybe be a problem because the gate can get closer to ground. That isn't likely to happen unless the supply is under a heavy load and that would pull down the raw supply. Not a big concern unless the transformer puts out significantly more than its rated voltage.

The IRF7406 you moddeled is totally unsuitable as it's only rated at 30V, 5A and 2.5W (you would need 50 of them at least). P channel devices also cost more.

I did state that the device shown was selected for simulation simply because of its Rds(on) and not because it was suitable for actual use. I later recommend the IRF4905 which is not a lot more expensive:

IRF540N - $1.79
IRF4905 - $3.19 (74A, 200W, 20 milliohm Rds)

Your circuit 4 does not improve the PSRR becaus the 10V zener just drops the unregulated voltage, it does not regulate it.

I guess my explanation wasn't clear enough as the 10V Zener is not intended to provide any regulation at all. As the unregulated supply rises with the regulated side at zero, the Zener will eventually conduct and cause the 723 supply to rise to the point where it can work. Eventually it stops conducting because the raw supply is less than 13.8V + 10V.

A single IRF4905 will not work in this design. The unregulated voltage is near to 20V under load, you calculate the voltage drop across the capacitor to be 5.4V and state that 20,000uH is not enough. You don't show the circuit you modeled but show a peak voltage of about 19V and a minmum of 13.2 This is 5.8V. The peak transformer voltage on load is 21.2V, less the rectifer Vf gives 20V for a minmum of 15.8V. I dont think you allowed for the root 2 peak voltage.

Of course I allowed for the root 2 peak voltage. LTspice voltage sources use the peak value and I used 21V. The drop from the diodes and transformer DC resistance are significant and unless they are significantly different from the manufacturers specifications, the simulation should be close.

Except that the ripple at 14A results in less than 20V on the raw supply. With a 20,000uF filter capacitor the voltage drops at 0.7V/ms or at least 3.5V. (Assuming the capacitor is the only source of current for about 5ms each cycle.)

The Newark part number you specify in the parts list is a 1.1C/W heatsink. Does that run at 125C or did you build your supply with something else?

Finally, you have not built either my or your designs, just critiqued mine and simulated yours.

Something that I clearly stated. I can understand not appreciating criticism but I tried to keep it constructive, informative, and hopefully educational.

Hi Dave,
I don't want to get into a long discussion here but.
1, I disagree, look at the regulation shown during dynamic load testing.
2 Cref in in the TI datasheet applies to fig 4 which is a different configuration for less than 7V output. This has the divider on Vreference, not the sense input. my comment stands.
3. So we don't need the zener you recommeded! You have not commented on the lack of current limiting in your design.
4. Simulation is not good if you don't use the correct devices.
5. So the zenner is to stop start-up transients, what does running the 723 from the output voltage via a resistor do to the load regualtion? Also in the case of a short on the output the P channel FET will turn fully on until the storage capcitor discharges. Still no current limit.
6. The DC voltage obviously does not drop this low as the supply works (no ripple on 'scope traces and don't forget this is off set so it's 20mV per division). Your model is wrong. The DC resistance is accounted for by the regulation factor of the transformer, the rated voltage is full load. The off load voltage is higher.
7. No, my heatsink does not run at 125C because my design uses 3 pass transistors. regardless of case to junction and junction to case thermal resistances, a given heatsink will always run cooler with more devices. This is because the thermal resistance is quoted with a single point source heat input. The thermal resistance of the heatsink base menas that the edges are less effective (cooler) putting 3 separate point sources of heat for the same total considerably improves the heatsink efficency. The devices also run cooler and with greater reliability and the thermal interface is less critical.

1. I did see your load test and an output impedance of 8 milliohms is mediocre. The output is going to drop about twice the IR loss in the wire from the filter capacitor to the output terminal. I could explain in great detail but you don't want a long discussion.

The 80mV drop in your load test could be the result of 4 milliohms of resistance in that wire. This is easy to fix and test.

2. Filtering the reference voltage is effective in either case. Or do you think that there is some magic about the voltage divider location?

An RC filter is going to remove noise in the reference voltage. Because there is a resistor between the reference output and the capacitor your stability concerns are unfounded.

3. I am assuming that you mean your circuit. Because the LM723 is running from a higher voltage supply, 36V, it is a potential problem. The source voltage is 13.8 and 36V-13.8V is greater than 20V.

The LM723 output can get much closer to V+ than to V-.

4. It is more than adequate in this case because the simulated transistor will never fail at currents that would turn the real thing into smoke. But just to make you happy I installed a irf4905 model.
Nothing changed.

5. Considering that your design uses an uncontrolled resistance that is likely too low to provide any substantial current limit you seem obsessed with my circuit not using it. The IRF4905 has a pulsed current rating of 260A limited by junction temperature. Any overload is going to cause the filter capacitor voltage to collapse quickly.

The load regulation is excellent. A 10A current step results in less than 100uV change in output voltage. And no ripple.

6. I used the manufacturers specifications. 15.4V at no load and 14.2V at 24A. It looks like you might have a higher voltage output than specified..

I bumped the voltage up to 22V and 23V peak which resulted in FET power dissipation of around 30W and 40W respectively at 14A. Both of which are compatible with a single IRF4905 on a 1.1C/W heatsink.

Dave,
You obviously have no experience of BUILDING practical high current supplies. The out put impeance of my prototype MEASURED from 0.14A to 14A is 2milliohms. your simulted 100uV drop just shows the limitations of simulation.
You think an IRF4905 will survive an output short to ground with a charged 20,000uF capacitor? Even with the RMS value of 15V and my "mediocre" 8mohm gives 1875A. That is over 7 times the IRF4506 pulse rating. Also the transformer will still be supplying power until the fuse opens. I have tested my prototype with a dead short across the output without any damge.

If you come up with a design which you have BUILT and tested with real parts and equipment let me know.

OK, Had a chance tonight to make some real life measurements.
Starting from cold (13.8degC) off load I got 20.619V across the filter capacitor. on full load (14A) it dropped to 16.40 with 4.3v Pk-Pk ripple. The lowest voltage in the trough was more than 14.3V. Output ripple was 11mV. This was with the input voltage slightly low resulting in about 14.7V AC from the transformer. So this matches my calculations but not Daves simulation.
The voltage across the FETs was 2.6V resulting in a power of 36.5W. After an hour at full load the heatsink rose to 47 degC which indicates a thermal resistance of 1.1degC per Watt for my surplus heatsink (6.25"x4.5"x1.5" with 16 fins 1.25" long). At a more typical 25degC ambient this would be 58 degC. I'd not want to go any hotter than this.
Voltage regulation from 1A to 11A was 7mV indicating a dynamic impedance of 0.7 milliohms. A quick review of an old ARRL group test of four commercial power supplies showed a typical drop of 60mV with one at 200mV.
The test equipment I used was a Keithley 197 DMM, Fluke 89IV DMM, HP 54645D 'scope, Kane May KM300 digital thermometer and type K probe and a homebrew DC load.
My design performs as advertised.

In order to prove to you that Kirchhoff's voltage law is correct I have to build a high current power supply that I don't need.

No thanks.

I don't understand why you think that the closed loop output impedance of the power supply applies in a short circuit condition. In a short circuit the control loop is opened and what matters is the impedance of all the parts. Rds(on), wires, capacitor ESR, etc. Almost certainly more than enough to limit the current to less than 260A. 1875A would put 37.5V across the FET (Rds(on)=0.02Ohm) which should be a clue that this estimate is wrong.

But if you insist on an active current limiter, it is easy to add. Just one transistor and the sense resistor. The downside is that it increases the dropout voltage and lowers efficiency.

I appreciate the voltage measurements because that really does help. They are actually a very close match to the simulation once I increase the input voltage (22.2V peak) to match the no load voltage you indicated. It is unclear under what conditions the 14.7VAC output of the transformer was measured. If under load then that is in line with the manufacturers data.

I see that you measured a power dissipation far lower than the numbers you have been throwing around. My simulation also shows 2.6V RMS across the FETs with a 14A load.

The article showed an output voltage change of 30mV for the .14A to 14A step instead of 7mV. What changed?

I noticed that the terminal designations on the board layout in figure 2 do not match those shown on the schematic in figure 1. For example, the schematic shows terminal 4 as the filter capacitor connection while the board connects terminal 4 to pin 2 of the LM723 which is a current sense input.

The closed loop output impedance is a good guide to the possible peak current in a short circuit case. Other values such as Rds and capacitor ESR are specified as maximum values whereas the worst case for a short is minimum value. You cannot assume that the Rds will be at its MAX limit to protect the FET, even if it was, the peak current could be over 1000A (21V/0.02Ω).
You seem fixated on P channel FETs, if they are so great why aren’t they widely used? Are you the only person who has spotted how good they are? I would love to see your one transistor, one resistor short circuit limiter for P channel FETs, it’s not possible, you have to generate a voltage to turn the FET off. You would need a much more complex circuit and probably an auxiliary supply to make a reliable over current protection for a P channel.
So you have changed your mind on my circuit not working due to lack of voltage? The 14.2V you quote is at a 20% overload current of 24A. The transformer should supply 15V RMS output at rated load of 20A RMS. This gives a peak capacitor voltage of 20V allowing for a 1.2V Vf in the bridge rectifier. Note that all my measurements were with 50Hz, not the 60Hz you based your calculations on and my design works. Your simulation is wrong. The 14.7V was calculated from the reduced mains input voltage.
My design is conservative in terms of power dissipation. A single TO220 cased FET (of any type) is not conservative. Even the datasheet for your preferred IRF4905 says the TO220 is preferred for levels up to 50W. A study of the detailed specification shows PD 200W @25°C Tc, derating 1.3W/°C and typical thermal resistance case to heatsink (greased, no washer) of 0.5°C/W. This means that on an INFINITE heatsink at 25°C the maximum power dissipation is 154W. A heatsink at over 60°C at 25 ambient is a burn hazard.
I don’t know why the regulation was improved for the more recent measurement, possibly contact resistance. Even the worst figure is better than a typical commercial power supply.
Finally a constructive comment. Well spotted. I’ve mislabelled the stripboard layout. On Fig 2 Pin 4 should be 5, 5should be 6, 6 should be 7 and 7 should be 4.
It is easy to criticise and “redesign” someone else’s design but much harder to produce, build, test and get published an original article. Have you ever had a design published? Who are you and what are your qualifications? I suggest you get your own article published before redesigning anyone else’s.

G8RPI wrote:The closed loop output impedance is a good guide to the possible peak current in a short circuit case. Other values such as Rds and capacitor ESR are specified as maximum values whereas the worst case for a short is minimum value. You cannot assume that the Rds will be at its MAX limit to protect the FET, even if it was, the peak current could be over 1000A (21V/0.02Ω).

I built some power supplies for my preamp that have an output impedance in the micro-ohms. (The design, or a previous version of it, has been measured. Not my specific instance.) What you are claiming here is that they have a short circuit current of mega-amps.

You seem fixated on P channel FETs, if they are so great why aren’t they widely used? Are you the only person who has spotted how good they are? I would love to see your one transistor, one resistor short circuit limiter for P channel FETs, it’s not possible, you have to generate a voltage to turn the FET off. You would need a much more complex circuit and probably an auxiliary supply to make a reliable over current protection for a P channel.

Not possible? Seriously?

I do not have to generate a voltage to turn the FET off. All that is required is to reduce Vgs which is just as easy to do with a P FET as with a N FET.

So you have changed your mind on my circuit not working due to lack of voltage? The 14.2V you quote is at a 20% overload current of 24A. The transformer should supply 15V RMS output at rated load of 20A RMS.

This gives a peak capacitor voltage of 20V allowing for a 1.2V Vf in the bridge rectifier.

About that. You get two diode drops in a bridge rectifier or 2.4V. I know that the Fairchild data says "per bridge" but other manufacturers of GBPC35 bridges indicate per diode.

20,000uF resulting in dropout was based on the assumptions in the model which is why the disclaimer at the end and request for measurements. While it does work with the measured transformer performance, it has little margin. At 50Hz and 15A it drops out of regulation. Yours could be better or worse because I have not modeled all circuit resistance and I really have no idea what the ESR of that 20,000uF capacitor is.

Capacitor ratings are notoriously sloppy so what you have could be considerably higher than 20,000uF. But you shouldn't select the part assuming that it is.

I hadn't taken a close look at the design method of Mr. Schade in the Motorola Handbook but now that I have, I have some questions:

1) From the ripple factor of 15% you arrive at a ripple voltage of 3V. Figure 8.5 is captioned as being RMS and you don't mention doing that conversion. How did you get 3V?

2) Figure 8.3 gives the average output voltage Vc (which is what the ripple voltage should be calculated from using Eq. 8.1) but you don't mention it. Why not?

A heatsink at over 60°C at 25 ambient is a burn hazard.

Which is an odd comment since your design power is 124W with a 0.5C/W heatsink.

It is easy to criticise and “redesign” someone else’s design but much harder to produce, build, test and get published an original article. Have you ever had a design published? Who are you and what are your qualifications? I suggest you get your own article published before redesigning anyone else’s.

Ahh. The tried and faulty ad hominem. While I can't put anything like "Ceng" after my name, I could put BSEE and MSEE there if I were that pretentious. Not that it matters.

Your current limit circuit will destroy the error amplifier output stage by connecting it to Vraw.
With no disrespect to the many degree holders, your BSEE and MSEE only indicate your education, to acheive Chartered Engineer you also have to have significant professional experience, responsibility and development.
In any case to use a postnominal you first have to give your name.
I will no longer be responding to your anonymous trolling

I hadn't added a signature to this site because I post so rarely but I thought that anyone could find my contact information from my web page.That could be found using the "Home" llnk. But just so you can call me something besides "troll", I added it. Happy now?

That transistor will no more destroy the output stage of the LM723 than the LM723 current limit transistor will. In any case I mentioned in the text of my web page that this was a concern in the shunt variations and to use a resistor to limit the fault current.

Robert, Getting back/down to DIY building the PSU - ANTEK along with the 500VA 30A AN-5415 transformer for the 30A PSU has a 35A Bridge rectifier module "RD-80" that also has a small heat sink and includes two 10K microfarad 80 VDC Caps. [They can also can provide a small open $5 tray to mount the transformer and two of these Rectifier Modules on.] Would like to present two questions on the build: 1. Using these two RD-80 35A modules the two DC outputs will need to be parallel wired to a terminal strip and have 40K mfd of filtering - Will this present any problems? 2. A very large 50A shunt [4.5" or 114.3 mm marked FL-2 0.5 50A 75mv] came with the panel Amp Meter - Will this .0015 ohm resistor work as our "Rs" resistor that needs to be closer to .02 ohms, including the extra connection wire involved? Thanks, t

Sorry, got the part number wrong - Two of these DC-80 modules would increase the cost of the PSU, but with the open aluminum tray will offer a great physical design even if used inside another box. Also, a new stock of these parts are now available from ANTEK. 73, t [WA3TOM]