The NAND and NFC (NAND Flash Controller) were linked together with a
parent <-> child relationship.

This model has several drawbacks:
- it does not allow for multiple NAND chip handling while the controller
support multi-chip (even though the driver is not ready yet)
- it mixes NAND partitions and NFC nodes at the same level (which is a bit
disturbing)
- the introduction of the EBI bus implies defining NAND chips under the
EBI node, and the ranges available under the EBI node should be
restricted to EBI address space, while the NFC references several
registers outside of these EBI ranges.

Move the NFC node outside of the NAND node, to get a more future-proof
model.