A PrimeTime SIG event was held in San Francisco during DAC 2014, Monday, June 2, 2014. The topic was Accelerating Timing Closure with Advanced Technologies. Timing experts from AMD, ARM, Fujitsu Semiconductor, NVIDIA, and Rambus shared their experiences on how PrimeTime advanced timing technologies accelerate design closure on the largest, fastest, and most challenging designs yet. Synopsys R&D showed how PrimeTime can accelerate your design innovation with advanced technologies and help you achieve fast and accurate signoff timing closure.

Robert Hoogenstryd - Introduction
SynopsysSr. Dir. of Marketing for Signoff
Robert welcomed the audience and introduced the panel moderator.

Rob Aitken — Moderator
ARM
Rob moderated the SIG event and opened the event with an entertaining and informational set of slides to set the stage of gigascale designs.

Amit Goel
NVIDIA
Amit highlighted 2X faster PrimeTime speedup every year and being able to run their XL chips flat overnight in mainstream machines. They shared the HyperScale tapeout success which saved them an additional 5 days in timing closure.

Wataru Shibamoto
Fujitsu Semiconductor
Wataru-san relayed a 2X faster every year message on their over 100M gate design with an additional 3X throughput with HyperScale.

Jim Fong
Rambus
Jim mentioned how Rambus saved days in timing closure on a recent tapeout with 3X less iterations using physically-aware ECO guidance.