(Cat? OR feline) AND NOT dog?
Cat? W/5 behavior
(Cat? OR feline) AND traits
Cat AND charact*

This guide provides a more detailed description of the syntax that is supported along with examples.

This search box also supports the look-up of an IP.com Digital Signature (also referred to as Fingerprint); enter the 72-, 48-, or 32-character code to retrieve details of the associated file or submission.

Concept Search - What can I type?

For a concept search, you can enter phrases, sentences, or full paragraphs in English. For example, copy and paste the abstract of a patent application or paragraphs from an article.

Concept search eliminates the need for complex Boolean syntax to inform retrieval. Our Semantic Gist engine uses advanced cognitive semantic analysis to extract the meaning of data. This reduces the chances of missing valuable information, that may result from traditional keyword searching.

Logic Delay Line

Publishing Venue

IBM

Related People

Kara, B: AUTHOR

Abstract

In order to delay a pulse by a time greater than the pulse width W, a logic delay line is used. The delay line comprises a pair of parallel single-shots of a delay time T and an output circuit responsive to the trailing edge of each single-shot output. One single-shot is fired by the leading edge of the input pulse. The other, by means of inverters, is fired by the trailing edge of the input pulse. Thus the separation of the trailing edges of the single-shots is equal to the input pulse width. Consequently, the output pulse width is equal to the input pulse width and the delay is the delay time T of the single-shots.

Country

United States

Language

English (United States)

This text was extracted from a PDF file.

At least one non-text object (such as an image or picture) has been suppressed.

This is the abbreviated version, containing approximately
100% of the total text.

Page 1 of 2

Logic Delay Line

In order to delay a pulse by a time greater than the pulse width W, a logic
delay line is used. The delay line comprises a pair of parallel single-shots of a
delay time T and an output circuit responsive to the trailing edge of each single-
shot output. One single-shot is fired by the leading edge of the input pulse. The
other, by means of inverters, is fired by the trailing edge of the input pulse. Thus
the separation of the trailing edges of the single-shots is equal to the input pulse
width. Consequently, the output pulse width is equal to the input pulse width and
the delay is the delay time T of the single-shots.