VT SILICON, INC.

VT SILICON, INC. Patent applications

Patent application number

Title

Published

20100033242

SYSTEM AND METHOD FOR IM3 REDUCTION AND CANCELLATION IN AMPLIFIERS - Sets of power amplifier branches (which comprise an RF/microwave amplifier stage) are power combined within each stage and each set of power amplifier branches are biased in different classes of operation by bias circuits possessing different impedance characteristics such that the fundamental frequency components present at the output are in-phase with one another and the IMD3 components are anti-phase over a broad range of power levels. The RF input signal is provided by the output of the previous stage of the RF/microwave amplifier. The output of each stage is formed by power combining sets of these power amplifier branches, each of which are separately biased, so the fundamental components are additive resulting in the maximum possible output power and the IM3 components cancel partially or completely. IM3 reduction or cancellation can be achieved over a large range of output powers with the use of a feed forward control loop monitoring the input power and appropriately adjusting the bias currents and impedance characteristics of the bias circuits feeding the individual power amplifier branches in each stage of the RF/microwave amplifier.