What are Digital Comparators

As the name implies, digital comparators are combinational circuits that are used for comparing digital signals. These have many applications in digital systems such as execution of conditional statements in microprocessors and microcontrollers, issuing of alerts when monitored parameters cross their threshold values etc.

An n-bit digital comparator is a circuit that is used to compare two n.-bit digital numbers. A comparator has three bits which signifies whether the first number is greater than, equal to or less than the second number. The truth table illustrating the various input output relationships for a 2-bit comparator with inputs as A=a(1)a(0) and B=b(1)b(0) is shown below:-

Inputs

Outputs

a(1)

a(0)

b(1)

b(0)

G(for a>b)

E (for a=1)

L (for a

0

0

0

0

0

1

0

0

0

0

1

0

0

1

0

0

1

0

0

0

1

0

0

1

1

0

0

1

0

1

0

0

1

0

0

0

1

0

1

0

1

0

0

1

1

0

0

0

1

0

1

1

1

0

0

1

1

0

0

0

1

0

0

1

0

0

1

1

0

0

1

0

1

0

0

1

0

1

0

1

1

0

0

1

1

1

0

0

1

0

0

1

1

0

1

1

0

0

1

1

1

0

1

0

0

1

1

1

1

0

1

0

Thus one of the three output bits G, E or L attains the logic level according to the result obtained after comparing the two numbers. From the above truth table, the following logical equations relating the outputs to the input bits can be obtained by using K-Map technique:-

G = a(1).b(1) + a(0).b(0).b(1) + a(0).a(1).b(0) – (1)

E= ((a(0) ex-OR b(0)) + (a(1) ex-OR b(1)))-(2)

L= a(1)b(1) + a(0)a(1)b(1) + a(0)b(0).b(1) (3)

Out of the above three, the second equation is only obtained after reducing the minimum Sum of product terms in to its ex-OR form which is possible due to the presence of diagonal adjacencies in its K-Map.

In the market, the most available comparator in the IC form is the 4-bit comparator 7485. The higher bit comparators can easily be built by using a multi stage combination of the lower bit ones. As an example, let us say we have to built a 4 bit comparator by using three 2-bit comparators.

Let the two numbers to be compared are C=C3C2C1C0 and D=D3D2D1D0. Then in the first stage, the bits C3C2 and D3D2 are fed in to the comparator 2 (G2, E2 and L2 O/P’s) while the bits C1C0 and D1D0 are fed in to the comparator 1 (G1, E1 and L1 O/P’s). Now the results of these two comparators are fed in to the second stage comparator 3 as G2G1 and L2L1 while the equality bits are ignored. Then the output bits G3, E3 and L3 of Comparator 3 can provide the final result. This same algorithm can be extended to synthesize comparators of even higher bits.