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It was statements like that that solidly put Billy in the dunce bin early on. It told me he didn't code and was just another mumbo jumbo marketer.

Problem is, Billy did not say that- quite the opposite. He managed to push up the memory, by lobbying the hardware designers.
The hardware was not Microsoft's domain, and IBM of course, wanted lowest costs.
Who knows if there was also some 'turf protection' in there too, seems quite likely.

One detail is the original PC only came with 64 kB and maximum was 256 kB.

The first, low-cost model actually had only 16KB, and could be upgraded to 64KB. The next revision of the motherboard could go to 256KB.
My desktop computer has a million times more memory, and it's way too little.

Well, if you just pour energy into it randomly.. then entropy increases. But you can use energy to do work, and that work can be to clean up a room. Local entropy decreases. After you stop spending energy, it immediately starts geting dusty, messy, and unordered. Entropy increases.

Where can I purchase a Prop123-A9 or BeMicro-A9 as I really need to get some coding done ready for the release of P2.

On that note, is there any idea when P2 will be available and in want variants/prices?

Rob

Parallax has some Prop123-A9 boards in stock. I believe they are $475. Not sure about the BeMicro-A9 availability, though we've been supporting it with FPGA releases.

About the Prop2 availability, I'm not sure. We are getting close, though. I imagine we'll sell it for around $8 in low volume, maybe less. We don't know exactly what our costs will be, but it's a big die at 8.5 x 8.5 mm and it goes into an exposed-pad TQFP-100 14 x 14 mm package.

Where can I purchase a Prop123-A9 or BeMicro-A9 as I really need to get some coding done ready for the release of P2.

On that note, is there any idea when P2 will be available and in want variants/prices?

Rob

For your first question, contact Parallax Sales for the Prop 1-2-3 board. I don't know if the BeMicro CV A9 is available for purchase anymore.

For your second question, the answer is simply "no". Meaningful answers to availability, price, and variations have not been given yet. If you still want non-meaningful answers, they would be "soon", "reasonable", and "full capabilities first, then smaller variants at a later time".

Apologies if it's already been asked (this is such a huge thread), what is the counter resolution on the P2?

Each pin can be configured as a 32-bit counter that can, depending on mode, increment every clock cycle. I suggest reading about the smart pins in the documentation. You can find that link at the top of this post:

Here's the Smartpins section of the Prop2Doc: (EDIT: You'll see references to a 32 bit Z register. This is a special register in each smartpin. Depending on how the smartpin is configured, that Z holds such values as a counter total or time totaliser or pulse length of the last input at that smartpin.)

It might work out better but Chip certainly hasn't promised any better than 160 MHz. As JMG says, nailing down some hard numbers is still to come.

That said, I got the impression Chip is expecting 160 MHz to be an easy target after the struggles of the earlier Prop2-Hot design effort. He has said a few times of the conscious redesign steps made to eliminate poor critical path times.

"There's no huge amount of massive material
hidden in the rings that we can't see,
the rings are almost pure ice."

For the full Prop2, 100 pin 0.5 mm pitch is the first out the gate. As far as I can see, this has a 10x10 mm thermal pad. Which is what puts a hard limit of 8.5x8.5 mm on the die size. All ground pads on the die will be jumper bonded to the package thermal pad underneath.

Next size down I get a common size hit of 52 pin 0.65 mm pitch. If so then this one would be a 6.5x6.5 mm thermal pad. Which in turn would presumable allow for 5x5 mm die size.

Best match I've identified for the final 28 pin Prop2 in that picture is the SOP28EP with either 0.5 or 0.65 pitch. The 0.5 pitch thermal pad is 4x7 mm allowing for die size up to 2.5x5.5 mm. The 0.65 mm pitch has a skinnier thermal pad still so I'll discount it now.

"There's no huge amount of massive material
hidden in the rings that we can't see,
the rings are almost pure ice."

I had never seen that PCB design document before that talked about the via array under the exposed pad. They recommend vias every 1.2mm in the array. For a 10mm square pad, that would be an 8x8 or 9x9 array. That's a lot of vias.