LIT accomplished all Phase I goals and technical objectives. During Phase I, LIT designed a zero power/ultra low power sensor using an ultra low power microprocessor and an electromagnetic sensing element. Embedded code was developed, providing primary anti-tamper function, as well as a real time clock, event logging, and event read-back. Active and passive mode sensors were developed and demonstrated such anti-tamper capabilities as touch, probe, and volume compromise detection. In Phase II, LIT will mature this technology by developing a Wireless Attached Sensor Package (WASP) button to provide anti-tamper functions without requiring an electrical connection to existing hardware, a Transportation Sensor System (TSS) Sensor to ensure package and shipping configuration integrity during transit, and guidelines and instructions for implementing Capacitive Tamper Sensors (CTS) into new designs. The LIT anti-tamper team, including Lockheed Martin Mission Systems and Signals (LMCO MS2), will achieve TRL7 by demonstrating WASP and TSS on tactical hardware. LIT will characterize and evaluate sensor behavior by testing in different physical environments, specifically refining algorithms for event detection and noise rejection. Additional work will include evaluating size and technology impacts to sensor sensitivity and false detection performance, as well investigating power harvesting and conservation.