Intel to unveil 'next-generation architecture'

New chips to reach new heights

By Tom Krazit, IDG News Service | 12 August 05

Intel plans to introduce a major change in its microprocessor architecture during its upcoming Fall IDF (Intel Developer Forum) in San Francisco.

The highlight of CEO Paul Otellini's keynote speech on 23 August will be the announcement of Intel's "next-generation architecture", which will arrive in the second half of 2006. The target date for its introduction coincides with the launch of previously announced processors that sources have said will use a common architecture based on power-friendly design principles.

For some time Intel has been expected to base its new generation of processors on an architecture inspired by its Pentium M notebook processor, which de-emphasises clock speed and concentrates on managing power consumption. The move would appear to signal the end of the Netburst architecture, which has been the foundation of the Pentium 4 and Xeon chips for five years.

That architecture was designed to let Intel steadily increase the clock speeds of its chips. However, as clock speeds go up, more power is needed to reach those speeds, and that power is more prone to leak out of transistors made with the current generation of chip-making equipment.

The Pentium M was designed to deliver top-notch performance while controlling the amount of power used to run the chip. Those design principles, combined with multiple processing cores on a single chip, will allow Intel’s new chips to reach new performance heights without producing excessive heat.

More details about the next-generation architecture will be provided following Otellini's keynote on the 23rd, a spokesperson said.

Intel hosts the three-day IDF every six months to provide detailed information about upcoming products to the hardware engineers that design systems using its chips. The company also uses the show to announce major initiatives before an audience of press and analysts from around the world.