A list sphere detector (LSD) is an enhancement of a sphere detector (SD) that can be used to approximate the soft output maximum a posteriori probability (MAP) detector used in the detection of the multiple-input multiple-output
(MIMO) signals. The LSD consists of three different parts: the preprocessing unit, the LSD algorithm unit and the log-likelihood ratio (LLR) calculation unit. Architecture design is the key point to enable an efficient implementation of the LSD. In this paper, we design the architecture for the whole detector structure and exploit the parallelism and pipelining possibilities of the presented architecture units. The designed architecture is implemented in a field programmable gate array (FPGA) using Mentor Graphics
Catapult C tool. We show that a scalable architecture can be designed for the LSD. The LSD is also shown to be feasible for practical implementation, and the implementation complexity and latency results are presented.