tanner l-edit

Thanks for your information
but in our life especially in the field of scientific research there is no confidential things.and if you are true,why we communicate with forum ?
Also 0.18 µm is not a new technology.
I am a researcher at the laboratory microelectronic in the Faculty of Sciences ,if you have any question ,just write.

download tanner tools

as I remember , in Linux eda enviroment (RHEL) , we usually use Laker /Virtuso ., we never use Windows base layout tool , Tanner can be use just for small company or student ,

many foundry (Fabs) support DRC/Lvs command file only dracula/calibre or tech file , not for
ledit , you need write it by yourself , just like Korea EDA mychips ( windows OS base fully layout tools just like Ledit)

and P&R in Linux workstation , usually > 100K gate
, ledit SPR not support "verilog" netlist .
maybe some tool can convert Verilog-to-EDIF
but , I hope Ledit SPR can support verilog format in the future .