Clear Logic pushes ahead with Altera-compatible ASICs

SAN JOSE -- Despite the fact that Altera Corp. is suing it for allegedly using Altera's technology without its consent, Clear Logic Inc. here today brought out a new family of ASICs that it said are functionally identical to Altera's FLEX 10KA field-programmable gate arrays.

Clear Logic uses the FLEX devices to prototype and debug its CL10KA ASIC designs -- offering designers an FPGA-based design flow that can be implemented immediately and directly in a CL10KA ASIC.

Altera, also of San Jose, has sued Clear Logic, claiming the company misappropriated Altera technology (see Nov. 17 story). Clear Logic, which was spun out of Integrated Device Technology Inc. in 1996, has claimed its ability to replicate Altera's FPGAs using customers' bit-stream programming for the devices, does not infringe on Altera's technology.

Clear Logic's new CL10KA devices are based on the company's new vertical link-configured ASIC technology, which produces extremely small die-size ASICs that are fully compatible with Altera's FPGA architecture. With extremely small die sizes, they can lower designers' costs, Clear Logic claimed.

Clear Logic claimed it can turn out prototypes of the new devices in two weeks, and production volumes in four to six weeks--considerably faster than developing standard ASICs.

"We are the only ASIC vendor to provide a seamless ASIC design flow using FPGAs as prototypes," said Don Knowlton, Clear Logic's vice president of marketing. "We are also the world's only ASIC vendor to completely eliminate NRE nonrecurring engineering charges."

Using other ASICs, he explained. "if there is a tiny mistake in the prototype, the designer must incur NRE charges for a second set of masks, and add at least one to three months to the product development cycle." Clear Logic's technique, by contrast, allows designers "to just rework the programmable prototype until they get it right.

"This is not a so-called `FPGA to ASIC conversion' in which the design must undergo a complex re-engineering so it can be `converted' to an ASIC," Knowlton continued. "This is a true prototype. The bitstream used to configure the vertical links in a CL10KA ASIC is identical to the bitstream used to program an Altera FLEX 10KA FPGA because the architectures are compatible.

To manufacture the devices, Clear Logic's new vertical link-configured ASIC technology uses vertical links, requiring much less silicon area than horizontal links and can be configured using a low-power laser. CL10KA devices also draw 50% less power than Altera FLEX 10KA FPGAs, the company said.

The first device in the CL10KA family will be the 3.3-volt 50,000 gate CL10K50V with 20,480 bits of embedded SRAM. Altera's EPF10K50V is functionally identical to the Clear Logic device.

It will be available in the first quarter of 2000 in 240-pin PQFP, 240-pin power quad, and 256-ball grid-array packages, which are all pin-compatible with comparable FLEX 10KA packages. The CL10K50V is priced as low as $12.95 for the CL10K50VQC240-3 in quantities of 1,000 units.