Luan

Luan Hong, Raleigh, NC US

Patent application number

Description

Published

20140365433

CROSS DOMAIN LOCKING IN A DISTRIBUTED ENVIRONMENT - In a distributed system, multiple nodes of a cluster update target data using a cross-domain lock. In the distributed system, data is separated into different domains, where some data elements are part of multiple domains. Multiple nodes each store a copy of the target data, which can be part of a single domain, or part of multiple domains. Where at least one element of the target data is part of two different domains, the nodes use cross-domain locks to lock both domains for at least a portion of the data update, and update the data while the lock is active. After updating the data, the nodes can release the cross-domain lock.

Luan Ibraimi, Eindhoven NL

Luan Le, Fullerton, CA US

Patent application number

Description

Published

20090112676

System and method for cinema exhibition management - A cinema exhibition management (CEM) system exchanges data and communications between motion picture exhibitors and distributions without direct communication between any two users, all communications and cinema exhibition data passing through centralized data and web application servers. The central database server stores cinema exhibition data in a relational database to support execution of different user tasks for one or more CEM modules selected from film solicitation, film booking, showtimes, trailer requests and placements, box office reports and payment vouchers. A CEM application on the web application server is accessible from a plurality of remote computer terminals by distribution and exhibition users to interface with the relational database to check user permissions and assignments to filter and then display authorized cinema modules and tasks therefore, filter records from the relational database in accordance with a selected task, permissions and assignments and route the records to the user, prompt the user to perform the selected task, and change the status of records in the relational database upon completion of the task so that at least one different user can view and perform additional tasks associated with those records.

04-30-2009

Luan Le-Chau, Los Angeles, CA US

Patent application number

Description

Published

20140280587

METHOD AND SYSTEM FOR OPERATING USER RECEIVING DEVICES WITH USER PROFILES - A system and method for operating with profiles includes a head end associating a first account profile having first profile settings and a first identifier and a second account profile having second profile settings and a second identifier with a user account. A first user receiving device operates with the first profile settings. The head end communicates second profile settings to the first user receiving device and the first user receiving device operates with the second profile settings.

09-18-2014

Luan O'Carroll, Dublin IE

Patent application number

Description

Published

20120150935

METHODS, APPARATUS, SYSTEMS AND COMPUTER READABLE MEDIUMS FOR USE IN SHARING INFORMATION BETWEEN ENTITIES - In one aspect, a method comprises: receiving, by a first processing system, information indicating that a second processing system has content that is to be provided to the first processing system; receiving, by the first processing system, content and at least one identifier from the second processing system; determining, by the first processing system and based at least in part on the at least one identifier, whether the content is another version of content previously received by the first processing system; receiving, by the first processing system, information indicating that a third processing system is to receive content from the first processing system; and transmitting, by the first processing system, the content, at least one identifier and version information to the third processing system, wherein the version information indicates whether the transmitted content is another version of content that has been previously transmitted by the first processing system to the third processing system.

06-14-2012

20120174063

LOGICAL ADDRESS BASED OBJECT ORIENTED PROGRAMMING - Disclosed are methods and systems for generating resource with URI. The methods and systems involve receiving a request for processing a data, the request including an uniform resource identifier (URI), based on the URI, sending the request to an associated resource handler, instantiating set of data resources associated with the URI by calling a resource factory and processing the request by passing the set of data resources to a specific application programming interface for presenting instantiated set of data resources.

07-05-2012

20130332486

SYSTEM AND METHOD FOR SIMPLIFYING DATA ACCESS BETWEEN TIERS IN A MULTI-TIER SYSTEM - A system and method for simplifying data access between tiers in a multi-tier system is disclosed. In an embodiment, a method is provided for receiving a request for service from a browser at a generic data access object (GDAO) layer; generating, by use of a data processor, a single, shared, generic data transfer object (GDTO) at the GDAO layer; calling through to a database tier, the database tier providing database metadata; and using the database metadata to include result data in the GDTO and return the GDTO in response to the request.

12-12-2013

Luan Tran, Meridian, ID US

Patent application number

Description

Published

20090087987

METHOD OF MAKING A SEMICONDUCTOR DEVICE HAVING IMPROVED CONTACTS - A semiconductor device and fabrication process wherein the device includes a conductive layer with a localized thick region positioned below the contact hole. In one embodiment of the invention, the thick region to which contact is made is formed by means of an opening in an underlayer of material. This embodiment of the device includes an underlayer of material having an opening therein; a layer of thin conductive material formed on the underlayer and in the opening; and overlayer of material having a contact hole therethrough formed on the layer of thin conductive material; a conductor contacting the layer of thin conductive material through the contact hole; and wherein the opening in the underlayer is positioned below the contact hole and sized and shaped to form a localized thick region in the layer of thin conductive material within the opening.

PITCH REDUCED PATTERNS RELATIVE TO PHOTOLITHOGRAPHY FEATURES - Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC. The combined pattern made out by the first pattern and the second pattern is transferred to an underlying amorphous silicon layer and the pattern is subjected to a carbon strip to remove BARC and photoresist material. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, having features of difference sizes, is then etched into the underlying substrate through the amorphous carbon hard mask layer.

04-15-2010

20100203727

METHOD FOR INTEGRATED CIRCUIT FABRICATION USING PITCH MULTIPLICATION - Different sized features in the array and in the periphery of an integrated circuit are patterned on a substrate in a single step. In particular, a mixed pattern, combining two separately formed patterns, is formed on a single mask layer and then transferred to the underlying substrate. The first of the separately formed patterns is formed by pitch multiplication and the second of the separately formed patterns is formed by conventional photolithography. The first of the separately formed patterns includes lines that are below the resolution of the photolithographic process used to form the second of the separately formed patterns. These lines are made by forming a pattern on photoresist and then etching that pattern into an amorphous carbon layer. Sidewall pacers having widths less than the widths of the un-etched parts of the amorphous carbon are formed on the sidewalls of the amorphous carbon. The amorphous carbon is then removed, leaving behind the sidewall spacers as a mask pattern. Thus, the spacers form a mask having feature sizes less than the resolution of the photolithography process used to form the pattern on the photoresist. A protective material is deposited around the spacers. The spacers are further protected using a hard mask and then photoresist is formed and patterned over the hard mask. The photoresist pattern is transferred through the hard mask to the protective material. The pattern made out by the spacers and the temporary material is then transferred to an underlying amorphous carbon hard mask layer. The pattern, having features of difference sizes, is then transferred to the underlying substrate.

08-12-2010

20100210111

PITCH REDUCED PATTERNS RELATIVE TOPHOTOLITHOGRAPHY FEATURES - Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern. Pitch multiplication is accomplished by patterning an amorphous carbon layer. Sidewall spacers are then formed on the amorphous carbon sidewalls which are then removed; the sidewall spacers defining the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is transferred to the BARC. The combined pattern is transferred to an underlying amorphous silicon layer. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, is then etched into the underlying substrate.

08-19-2010

20110223761

METHODS FOR FABRICATING CONTACTS OF SEMICONDUCTOR DEVICE STRUCTURES AND METHODS FOR DESIGNING SEMICONDUCTOR DEVICE STRUCTURES - Methods for fabricating contacts of semiconductor device structures include forming a dielectric layer over a semiconductor substrate with active-device regions spaced at a first pitch, forming a first plurality of substantially in-line apertures over every second active-device region of the active-device regions, and forming a second plurality of substantially in-line apertures laterally offset from apertures of the first plurality over active-device regions over which apertures of the first plurality are not located. Methods for designing semiconductor device structures include forming at least two laterally offset sets of contacts over a substrate including active-device regions at a first pitch, the contacts being formed at a second pitch that is about twice the first pitch.

09-15-2011

20120044735

STRUCTURES WITH INCREASED PHOTO-ALIGNMENT MARGINS - Methods and structures are provided for increasing alignment margins when contacting pitch multiplied interconnect lines with other conductive features in memory devices. The portions of the lines at the periphery of the memory device are formed at an angle and are widened relative to the portions of the lines in the array region of the memory device. The widened lines allow for an increased margin of error when overlaying other features, such as landing pads, on the lines. The possibility of contacting and causing electrical shorts with adjacent lines is thus minimized. In addition, forming the portions of the lines in the periphery at an angle relative to the portions of the lines in the array regions allows the peripheral portions to be widened while also allowing multiple landing pads to be densely packed at the periphery.

Luan Tsai, Hsinchu City TW

Patent application number

Description

Published

20100237788

Flashing light string - A light string includes a load comprising a trigger LED assembly and a lighting assembly connected in series with the trigger LED assembly, the lighting assembly comprising a plurality of series connected lamps comprising an LED; and a rectifier for converting a source of AC into DC which is supplied to the load. The trigger LED assembly is adapted to flash and cause the lamps to flash. In one embodiment the trigger LED assembly includes a trigger LED and a capacitor connected in parallel with the trigger LED. The trigger LED includes a first LED and a second LED. The cathode of the first LED is connected to the cathode of the second LED, the anode of the first LED is connected to the positive terminal of the capacitor, and the anode of the second LED is connected to the negative terminal of the capacitor respectively.