This is the source code accompanying our HVC 2010 paper titled "vlogsl: A Strategy Language for Simulation-based Veriﬁcation of Hardware"; it includes the source code for the vlogsl tool, as well as targets for all of the ...

The development of modern ICs requires a huge investment in RTL verification.
This is a reflection of brisk release schedules and the complexity of
contemporary chip designs. A major bottleneck to reaching verification ...