Power

The power connector is a 5V 4mm (shield) x 1.7mm (pin) center positive connector. It takes 5V only. Note that this connection is identical to that of the original Sony PSP, so power cables intended for that console also work for the CI20.

When somebody measures the current draw - maybe add it here?

Audio

Standard 4-pin headset connector, with auto OMTP/CTIA detection (so should work with any standard 4-pin headset).

Note that the JTAG function is controlled by PA30, and may be turned on by the bootloader - see the JZ4780 Programmers Manual

Secondary 0.1" expansion header

Pinout diagram for the secondary CI20 0.1" pitch 16 pin header

3nd func

2nd func

GPIO

schematic

pin

pin

schematic

GPIO

2nd func

3rd func

+3v3

1

2

5V_IN

TSFRM

MSC2_D3

PB31

SSI1_CE0

3

4

SSI1_CLK

PB28

MSC2_CLK

TSCLK

TSSTR

MSC2_CMI

PB29

SSI1_DT

5

6

SSI1_DR

PB20

MSC2_D0

TSDIO

TSDI1

MSC2_D1

PB21

SSI1_CE1

7

8

SSI1_GPC

PB30

MSC2_D2

TSFAIL

XP

9

10

XN

YP

11

12

YN

AUX1

13

14

AUX2

VBAT

15

16

GND

Key

Power

TSSI

ADC

GPIO

SSI

MSC

HDMI

Full sized HDMI connection with audio out support as well. Can somebody confirm the HDMI version support (1.2a?), and also the number of audio out channels? (2, 5.1 ???).

Button

The button between HDMI and Ethernet is not a reset button.

It is boot_select0. Combined with JP3, it can be used to boot the CI20 from the USB.

It can also be used as a gpio once the CI20 is powered up. The boot_sel0 pin is connected to PD17.

Pinmux options can be checked to see which gpio is PD17 in kernel you booted.

In the 3.15 kernel, the gpio is number 113.

You can export the gpio via

echo 113 > /sys/class/gpio/export

And then use it.

Ethernet

10/100 RJ45, connects to the DM9000 chipset.

Boot mode selector

See the silkscreen on the board and the section at the end of the JZ4780 programmers manual.
Fundamentally you can boot from the on-board NAND or direct off the SDcard without having to press the button during boot. There is also a USB boot function available, but it is not a standard DFU type boot, and requires JZ4780 specific host support.

BOOT_SEL[2:1:0]

JP3 Jumper (BOOT_SEL1, PD18)

SW1 Button (BOOT_SEL0, PD17)

Boot Mode

110

Pins 1 & 2 shorted

Not pressed

NAND flash at CS1

100

Pins 2 & 3 shorted

Not pressed

SD Card at MSC1

111

Pins 1 & 2 shorted

Pressed

USB device

101

Pins 2 & 3 shorted

Pressed

tSD NAND flash at MSC0

Primary expansion header

Pinout diagram for the main CI20 0.1" pitch 26 pin header

2nd func

GPIO

schematic

pin

pin

schematic

GPIO

2nd func

3rd func

4th func

+3v3

1

2

5V_IN

PD30

I2C1_SDA

3

4

5V_IN

PD31

I2C1_SCK

5

6

GND

UART1_TXD

PD28

GPIO1

7

8

UART0_TXD

PF3

GND

9

10

UART0_RXD

PF0

GPS_CLK

UART1_RXD

PD26

GPIO2

11

12

PWM

PF5

PWM5

UART3_TXD

SCLK_RSTN

UART1_CTS

PD27

GPIO3

13

14

GND

UART1_RTS

PD29

GPIO4

15

16

GPIO5

PF1

UART0_CTS

GPS_MAG

+3v3

17

18

GPIO6

PF2

UART0_RTS

GPS_SIG

SSI1_DT

PE17

SSI0_DT

19

20

GND

SSI1_DR

PE14

SSI0_DR

21

22

GPIO7

PE8

UART3_CTS

BCLK_AD

SSI1_CLK

PE15

SSI0_CLK

23

24

SSI0_CE0

PE16

SSI1_CE0

GND

25

26

SSI0_CE1

PE18

SSI1_CE1

Key

Power

UART0

UART1

UART3

SSI

GPS

I2C

I2S

GPIO

PWM

Note that the PWM facility is unavailable as this PWM unit is used by the Linux kernel SMP timer code

Note that the GPS interface is unavailable as it is (believed to be) electrically incompliant

Note that the I2S block is not useable on the header as not all I2S pins are brought out

Camera

Closeup of compatible camera

Camera unit fitted

The camera connector is 24 pin (26 pins on the schematic - two of which are the side ground solder tabs on the connector itself - the actual cable interface is 24 pin), and CMOS DVP 8-bit camera compatible. The Omnivision OV5640 5Mpixel unit can be used with the CI20 (often labelled FD5640 on the actual part)

IR

Receive only.

LED

The CI20 board features a dual colour red & blue LED. It is controlled by GPIO PF15, which also controls the USB VBUS supply. When PF15 is high the LED lights red, when PF15 is low it lights blue. Software cannot power off the LED. A simple way to toggle the LED colour is to write to the PFPAT0S & PFPAT0C registers from the U-boot shell, in order to toggle the PF15 GPIO. The following example will toggle the colours rapidly, leading to the LED appearing purple:

while true; do mw.l 0xb0010548 0x8000; mw.l 0xb0010544 0x8000; done

SDcard

Standard pinout full sized SD/MMC slot. Can be used for direct booting, or for bulk storage (standard MTD support under Linux). Is wired to the MSC0 block in the SoC.

USB mini-OTG connector

Is paralleled with the left hand USB A connector - do not plug into both of these at once. Has the OTG VBUS controlled by the jumper next to it.

OTG VBUS jumper

Controls the VBUS for the OTG ports - would somebody like to describe the difference between having the connector fitted or not please.

USB A connector (left)

Paralleled with the mini-OTG connector.

USB A connector (right)

Connected to the EHCI USB controller in the SoC.

Dedicated UART header

Pinout and other functions of the dedicated UART header. This is uart4 of the SoC. Note that uart0 is on the 26pin main expansion header.

pin

schematic

GPIO

2nd func

3rd func

1

+3v3

2

TXD

PC10

LCD_SPL

LCD_G0

3

GND

4

RXD

PC20

LCD_CLS

LCD_R0

Key

Power

UART4

GPIO

LCD

Components

SoC

Is an Ingenic JZ4780 - see the data sheet and programmers manuals referenced on this page.

DDR/RAM

Comprises of four H5TQ2G83DFR-H9C 2Gbit DDR3 chips, providing 8 bits of data each, providing a 32bit DDR3 memory bus to the SoC. Anybody have details of the standard clock rate?

ROM/NAND

Is provided by a single Samsung K9GBG08UOA NAND flash, using an 8bit data interface to the SoC.

Ethernet

Is provided by a Davicom DM9000C connected vi an 8-bit interface to the SoC, providing 10/100 ethernet.

WiFi/BT

Is provided by an Ingenic IW8103, based on a Broadcom 4330, connected via SDIO to the SoC MSC1 port.

PMU

Is an Active-Semi ACT8600 specifically designed for the Ingenic JZ family of SoCs.

RTC

Is provided by a Pericom PT7C4337UE connected to the SoC via the I2C_4 bus.