PIF prototype readout ADC FPGA SCATS • The readout sequence is the following: Ä The PMT pulse creates a charge and a digital hit and a PIF channel Ä The hit is sent to the FPGA and the SCATS Ä The FPGA drives the digitization and associates the charge with the hit time encoded by SCATS Ä The FPGA releases the PIF channel D. Breton, V. Tocut, A. El Berni, Super. B, Frascati 12/2012

Conclusion • PIF chip is almost ready: Ä the prototype will house 8 channels with two types of charge measurements Ä Analog outputs will be sent to an ADC Ä Digital outputs will be sent to SCATS Ä the chip is very simple: Ä Ä No bus interface No clock But numerous analog tuning pins This should permit a very fast test Ä it will be submitted to AMS in February’s run • Both PIF and SCATS will be mounted on a board dedicated to the CRT: Ä The boards should be ready when PIF comes back from foundry in May Ä They could hopefully be installed at SLAC in June. • How many channels should we target ? Ä Of course there is a cost issue … • Who will provide (work on) the DAQ ? D. Breton, V. Tocut, A. El Berni, Super. B, Frascati 12/2012