Engineer It: What is ADC PSR?

My name is Xavier Ramus. I am product definer for the LDO and Supervisor Group in Texas Instruments. And in this presentation I'm going to show you how to measure the ADC power supply rejection.
Let's first start by reviewing why you should not use DC-DC to power high performance ADC. The DC-DC converters has too many noise sources. The first one is the flicker noise as well as the wide band noise. And the second [INAUDIBLE] noise source is the ripple noise.
And you can see that the passive attenuations, both the ripple noise and the wideband noise, can be quickly and easily attenuated. The switching frequency, the ripple noise, will affect directly the SFDR. The DC-DC converter filter noise will not effect directly the SNR, and this cannot be easily attenuated.
The ripple noise, even with passive attenuation, where it may degrade SFDR, and we saw that the previous result, we still have some bands, both at 500 kilohertz, but also presents a little around the entire spectrum. That would degrade the PSR the SFDR by 15 dB.
So what is the ADC PSR? The ADC PSR is the Power Supply Rejections of the signal that is present in the power supply to the output. And in the case of an ADC, that will be present in the FFT.
So I will do a measurement, and how do we know that the measurement is valid? The first thing that we need to establish is a good baseline for the measurements. And the second one to measure the PSR will be inserting an AC signal on top of the DC voltage of the power supply and see what interference is being created in the FFT. In this case, what we are expecting is for the Digital VDD, we are expecting switching frequency to be present on the DVDD supply, while on the AVDD supply we're expecting both the switching frequency to be present, but also plus or minus the switching frequency around the signal frequency.
The baseline measurement requires an idealized set-up. So we want to ensure that the only switching element is as such, is the ADC. We do not want anything in the power supply. So in order to achieve that, we're still using the ideal signal chain.
But in order to achieve the switchless power supply, we will be using a battery and two TPS7A47 low noise IPSRLDOs. You can note that in this case, we do not care about cost, or even ease of use. We will be using a single battery, but we will be using two TPS7A47, one for each power supply. We're not going to try to do any simplifications.
What you will expect on the FFT is to see nothing else but the signal frequency. Nothing else. You will see the only components will be coming from the ADC. Now, if we want to look at the ripple on the DVDD supply, we're going to connect a power amplifier, which will have a port of entry for sinewave that will be superimposed to the DC, connected to the DVDD supply. The AVDD supply will still be the ideal configuration using a battery and a low noise LDO.
From this, representing what we expect to see, we will see a generated spur at the switching frequency. We could also see some harmonics due to on the DVDD supply. But we do not expect to see anything else as far as degradations on the FFT.
Moving on to the analog VDD supply. In this case, we're going to switch around the LDO from the power amp. So the power amplifier will be connected to the AVDD supply while the LDO will be connected to the DVDD supply. In the case of the AVDD supply, we expect two different point of entry, the first one being on the switching frequency, and the other one being plus and minus the switching frequency around the signal tone.
Once we have all the measurements done, we have a control over the frequency of the sinewave of the frequency, so we're going to vary it between 10 kilohertz and 2 megahertz. And we're going to on the AVDD supply, so we will be able to generate a plot that will look essentially like this.
We have to curve because this is the AVDD supply and we have two modes of entry for the interferences, the first one being at DC. And it's represented right here in red starting at about 50 dB with a point of inflection up and then slightly down before keeping its progression, it's improving. And the second one is around the signal of frequency, this one starting relatively low at 30 dB and then starting inflecting up.
The reason why you have a point of inflections at about 300 kilohertz is that you have the local bypass capacitors that are being present in these signals and will, therefore, improve your PSR at a higher frequency. You do have a point of inflection down at about 700 kilohertz. That is due to the ESR of the local bypass capacitors.
Now, looking at the DVDD supply, we're evaluating from 10 kilohertz to 2 megahertz, changing the sinusoidal input on the power amplifier. And we have only one curve in this case operating at DC. And in this case, we can see that we have an extremely high PSRR with the same point of inflections at 300 kilohertz due to the local bypass capacitance, and a point of inflection down or pull 500 kilohertz due to the series resistance in the local capacitance.
And now it is time to look at evaluating the PSR and the baseline measurements in our evaluations. The measurements. The set up. You have two signal generators. The signal generator on the top is set at 19.8 megahertz and is being used for the band pass filters and provided to the signal to the input of the ADC as a signal.
The second signal generator is operating at 100 megahertz. This one is going to be bent past filters in order to minimize the phase noise coming from these signal generators and is going to be provided to the clock. In this setup, we are using the ADC3444EVM with USB connections, power supply connections, but the input signal coming through this node and the clock coming through here. In order to do the acquisitions, we're using the TSW1400EVM right here. And on the power supply, both AVDD and DVDD supply, we are using TPS7847, no noise, IPSRLDO.
So let's now power both LDOs. Set up the GUI. We set the GUI of the ADC in order to establish the connections with the ADC. In this case, we are going to disable both the Dither and the Chopper options of the ADC3444. And once this is done, we can now use the High Speed Data Converter Pro software setup for the ADC344x family. We're setting the ADC output data rate to 100 megahertz and the ADC input target frequency to 19.8 megahertz. The 19.8 megahertz was selected to avoid having harmonics present at the multiple of the clock.
We can run the Capture acquisition. And we now have the data acquisition. So we can change the amplitude. So we can evaluate verses different amplitude. We can evaluate versus different frequency clock as well. But in this case, this is all we need. So we can export the data directly in. We can see though to save saving the raw ADC code as binary file, or saving the integer code as a CSV file. Once we have saved the data, we can actually post-process all the information and extract and represent it into an Excel spreadsheet.
Now it is time to look at how we're going to measure the ADC PSR. And we'll be right back. OK. We are back in these presentations.
We reset it, the power supply, a little bit. Let me show you what we did. We still have the similar set up as the beginning. We have the ADC3444EVM with USB cable power supply, the input signal frequency and the clock frequency coming from this power cable. We have the TSW1400 data acquisition card connected to the EVM.
Then on the DVDD supply we still have our TPS7847 that is connected to the battery. And on the AVDD supply, we have the power amplifier that makes the addition of the AC signal. I'll have the disturber signal on top of the DC signal 1.8 volt. That is powered by this power supply. We also generate the 1.8 volt reference, the DC reference, right here. That is going to be the signal from the powering the AVDD power supply at 1.8 volt.
And on that, we are adding an AC signal. This signal generator creates the disturbance that we're going to add to the power supply of our ADC. And we set it for 500 kilohertz frequency. So we're going to add a 500 kilohertz signal. The amplitude of the signal initially is 100 millivolt. So now, once this is turned on, we have the ADC operating strictly off a noiseless power supply, essentially, and a very noisy one, since we have added the power supply.
So let's see what happens when we do not have any signal coming through the signal generator on our external power disturbance. So I reconfigured the High Speed Data Pro Converter to zoom onto the first five megahertz. I actually reconfigured that to go look at the first 2 and 1/2 megahertz. So now we're looking only at 2 and 1/2 megahertz and we have no other interferences but that of this power supply through the power amplifier.
But we have not added our 500 kilohertz interference. And we do not see any signal at 500 kilohertz right here, as would have been expected. Turning on the output of the 500 kilohertz signal generator disturbance and taking another capture, we can see that we have a little tone that started appearing. And you can see it appeared right here.
To make sure that this is coming from this signal generator, let's increase the amplitude to 200 millivolt peak to peak. We would still be operating within normal operating range for the power supply of the AVDD going from 1.7 all the way to 1.9. But it will be a lot easier to capture the amplitude of this signal. And you can see it moved up just a little bit.
We can do the same experiment and look at going back to the full screen view. And going back this time, looking between 17.8 megahertz and 19.8 megahertz to see what is happening around the signal. Around the signal tone you do have the signal tone at 19.8. So 19.8 minus 500 kilohertz would be 19.3. And we do have a tone present right here. And we do have a tone present at 20.3 megahertz as well.
So now let's remove the disturbance from the power supply. And we can see that the disturbance associated with the 500 kilohertz signal has completely disappeared from our screen. Remember that we have additional disturbance that are coming from this external power supply that needs to be taken into consideration.
Now we are turning back on our disturbance. And we can see that they are 19.3 and 20.3 megahertz. We can start playing with the amplitude of the signal. And reduce it by, let's say, 3, 4, 5, 6 dB and see what will be happening when we're trying to capture it around the signal. And you can see a reduction of that amplitude directly proportional to the number of dBs that we have reduced from our signal amplitude.
Now, going back to our presentations, we have the following results for the AVDD PSRR. You have an extremely high or high PSRR going at 50 kilohertz, going up due to the presence of the local bypass capacitance. Then the zero of ESR and the local bypass capacitance makes it reduce. While on the PSRR for around the signal frequency, it starts relatively low at 30 dB, goes down to 28 dB at 100 kilohertz, and then starts improving as the local bypass capacitance are taking place.
On the AVDD PSRR verses the input signal amplitude, you have a flat, a constant, PSRR for the signal that is happening around DC. While around the signal, you have degradations of dB per dB. Just a little comment right here on the AVDD PSRR versus the ripple frequency, you can notice that if your ripple frequency is lower, you will generate higher spurs or higher SFDR inside the ADC. If you select an ADC that is operating at a higher frequency, you will achieve better PSRR, and therefore lower spurs. Note that on the 30 dB plot between 10 kilohertz and 100 kilohertz, our measurements limit, we still have a very low PSRR, indicating that the flicker noise will not be highly attenuated, will be very little attenuated from the ADC perspective.
Doing the same experiment on the DVDD, we remember that on the DVDD we have only one sensitivity to the switching frequency. And we can see that it's fairly high versus the ripple frequency. And versus the signal amplitude, we can notice that the DVDD PSRR is completely independent on the signal amplitude.
This concludes this presentation on how to measure the ADC power supply rejections. For additional information and more technical conversations, please refer to the following websites.

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Date:
October 30, 2015

In this training video, TI's Xavier Ramus demonstrates how to measure the ADC Power Supply Rejection.