A method is disclosed for making a highly planarized integrated circuit structure having deposited oxide portions planarized to the level of adjacent portions of the integrated circuit structure which comprises: depositing, over an integrated circuit structure having first portions at a height highe ...

A method is disclosed for making a highly planarized integrated circuit structure having deposited oxide portions planarized to the level of adjacent portions of the integrated circuit structure which comprises: depositing, over an integrated circuit structure having first portions at a height highe ...

A method for rapid anisotropic dry etching of oxide compounds in high aspect ratio openings which etching method is highly selective to metal salicides and which method employs plasma gases of CHF3, N2 and a high flow rate of He at a high pressure and products made by the process.

A method of bonding a wire to a metal bonding pad, comprising the following steps. A semiconductor die structure having an exposed metal bonding pad within a chamber is provided. The bonding pad has an upper surface. A hydrogen-plasma is produced within the chamber from a plasma source. The metal bo ...

A method is provided to construct a copper dual damascene structure. A layer of IMD is deposited over the surface of a substrate. A cap layer is deposited over this layer of IMD, the dual damascene structure is then patterned through the cap layer and into the layer of IMD. A barrier layer is blanke ...

A plasma etching process is provided which etches n-type, p-type, and intrinsic polysilicon on the same wafer at substantially the same rate. Native oxide is first removed by etching in a conventional oxide etchant, such as SiCl4/Cl2, BCl3/Cl2, CCl4, other mixtures of fluorinated or chlorinated gase ...

A new method to prevent copper contamination of the intermetal dielectric layer during via or dual damascene etching by forming a capping layer over the first copper metallization is described. A first copper metallization is formed in a dielectric layer overlying a semiconductor substrate wherein a ...

An apparatus and method for solving a system of linear equations uses a sequence of matrix-vector multiplications wherein the matrix to be multiplied is derived from an expansion point matrix that permits rapid convergence. The matrix-vector multiplication form of the sequence permits calculations t ...

A method of bonding a wire to a metal bonding pad, comprising the following step. A semiconductor die structure having an exposed metal bonding pad within a chamber is provided. The boding pad has an upper surface. A hydrogen-plasma is produced within the chamber from a plasma source. The metal bond ...