Why Memory Prices Are Heating Up

The issue of increasing memory prices is more complicated than many people think.

DRAM and NAND prices are going up and projected to rise further, according to market analysts. Many people perceive the current memory market situation as a temporary imbalance between supply and demand. Or, they expect the market to settle when the manufacturing of 3D NAND flash reaches maturity. However, In case of DRAM market, no one knows when DRAM supplies will improve.

Observing the demand, although some market segments are growing, there are no killer applications or booming market segments. Therefore, the problem originates from the supply side.

According to Micron, DRAM bit growth is expected to be 15 to 20 percent in 2017 (noted below), the lowest bit growth in the last 20 years. Such small bit growth comes from DRAM scaling limitations. There has not been any news regarding DRAM scaling for a while. When bit growth is below 45 percent, it is a seller market. Thus, the DRAM oligopoly, slow bit growth, and sluggish fab expansion results in a long-term, tight supply. Ultimately, DRAM prices could increase without any improvements in supply.

Fig. 1

There is extreme competition in the NAND market. Based on expectations that 3D NAND will significantly improve productivity, all NAND vendors invested billions of dollars in 3D NAND manufacturing. Therefore, oversupply was expected a while ago. However, this expectation proved false. 3D NAND had been more difficult to fabricate than previously thought. Currently, a few NAND vendors are struggling to ship 3D NAND.

Many analysts expect relief of supply when the manufacturing of 64-layer and 96-layer 3D NAND flash reaches maturity in late 2018. So, will there be enough NAND supply next year? As shown in the plot, lateral scaling (i.e. Moore’s Law) of planar NAND increases bit cell EXPONENTIALLY in a manner of power of 2. In contrast, the number of cell layers (i.e. vertical scaling) of 3D NAND increases bit cells LINEARLY. For the time being, planar NAND meets the exponential demand growth of bit cells based on Moore’s Law. Now that planar NAND faces scaling limitations, 3D NAND will have difficulties meeting the demand with just linear bit growth.

As discussed, high memory prices are not simply due to the imbalance of supply and demand anymore. It will be very difficult to see a cool down of memory prices from now on, because such high memory prices come from scaling limitations of memory devices. Ironically, memory vendors are making big money based on these memory scaling limitations. From the top five semiconductor ranking, three of them are memory vendors in the first half of 2017. SK Hynix and Micro, for example, heavily depend on DRAM because 75 percent and 65 percent of their revenue comes from the DRAM market, respectively.

Fig. 3

For the time being, buyers could control the memory price and memory products have been disregarded as commodity. Now, it is a golden age for memory vendors and high memory prices will become a burden for buyers. That’s right, memory will become a seller’s market because of memory scaling limitations. How can we find a solution for high memory price? In 2016 and 2017, technology roadmaps (such as ITRS and IRDS) strongly recommend GAA (Gate All Around) transistors for continuation of transistor scaling and M3D (Monolithic 3D) IC for low manufacturing costs. So, customers should seek ultra-low cost memory devices proactively, where “GAA + M3D” is being utilized. Otherwise, customers will pay more for memory components and such high memory prices will become problematic for most electronic devices and systems.

And that's just the beginning. I think of the quarries of African and Asian minerals, which is starting to dry up. The marketing effect and over-consumption that benefit multinationals is the primary responsibility

Each company/JV is the sole supplier of its own version of 3D NAND. That makes each process more expensive, like one of a kind. Can only get 3D FG from Intel/Micron, 3D TANOS from Samsung, 4-metal U-shaped channel from Toshiba/WD, 3-metal U-shaped channel from SK Hynix.

Another contributor to 3D NAND prices staying up is the uniqueness of each vendor's 3D NAND process integration and architecture, unlike their relative similarity for planar NAND. Intel/Micron is floating-gate, Samsung is TCAT, Toshiba/WD is P-BICS, SK Hynix gate layer count is off from the others, and uses fewer metal layers.

sranje, please check the following websites for more information. 3D XPoint is about 1,000x slower than DRAM in writing mode. However, reading is just 2.5x slower than DRAM. So, DRAM works are a write buffer as shown in the figure. In the reading mode, data could be directly read from the 3D XPoint. It is basically NOR flash memory. So, low cost NOR (i.e. 3D Super-NOR) could replace 3D XPoint.

I look at it as a positive sign on yields, they wouldn't go larger otherwise. If you look back at 2D, 130mm2 or even larger is normal, if anything 100mm2 and less was unusual and maybe a sign of trouble.

It does seem problematic to keep bit growth at around 40% per year but 4 bits per cell, higher array efficiency and yeah maybe a shrink should help in the next few years.

I think Samsung at FMS mentioned the possibility of a shrink after their 96L, alongside logic under the array and string stacking.

resistion, I agree with you. Die size of 3D NAND is related to poor process architecture of 3D NAND becasue it is focusing on vertical scaling, not on lateral scaling. In fact lateral scaling is much powerful than vertical scaling as shown in Fig. 3. Effetive cell size of 3D NAND is equvalent to 90nm planar NAND cell size. It is the reason why 64-layer just achieves price parity with planar NAND and, for the time being, 3D NAND did not contribute low cost NAND at all. Another important concern is that, becasue 3D NAND already reached 64-layer, it lost expansion capability as explained in this article. So, it will be difficult to expect low cost NAND with conventional 3D NAND.