Yesterday, Crossbar announced it had demonstrated pre-production 1 megabyte arrays using its patented 1TnR (1 transistor driving n resistive memory cells) non-volatile resistive RAM (RRAM or ReRAM) for read/write operations. The company feels this is a major milestone toward commercializing terabyte-scale memory arrays on a postage-stamp-sized chip. Last week, I spoke to Dr. Tanmay Kumar, vice president of device engineering at Crossbar, about the latest developments.

At its basic level, RRAM includes a layer of electrically insulating active material between two electrodes. Applying voltage results in the formation of a conducting filament between the two electrodes (or metal layers). Applying reverse voltage then removes the filament. (For more information, see V Memory: Filament Size & Shape Matters.)

Crossbar’s RRAM technology is CMOS compatible, and it is applied on top of the CMOS at the back end of the line. What makes it unique, according to Kumar, is that Crossbar’s technique is to insert the memory between any two metal layers, and memory arrays may be stacked on top of each other. In this way, Crossbar’s RRAM is similar to 3D NAND, except the circuits go underneath the memory rather than beside it.

Kumar reports that Crossbar’s RRAM is 20 times faster than NAND and NOR. And, unlike 3D NAND, it does not require drilling a perfect 90-degree hole across multiple layers. In Crossbar’s approach, each layer is a self-sufficient array, which simplifies manufacturing. Some specific comparisons with 3D NAND include: low-voltage transistors for Crossbar RRAM (<3 V) as compared to about 25 V typical power consumption for 3D NAND; 60 mm2 for Crossbar RRAM as compared to 132 mm2 die size (128 Gb) for 3D NAND.

The company has identified its major target markets as system-on-chip, connected devices, and embedded memory applications. With its new 1TnR approach, it's looking to move towards high-density applications, such as server rack integration and datacenters.

Crossbar currently offers its 1T1R low-latency, low-density RRAM for embedded applications where every memory cell has one transistor connected to it. The 1TnR RRAM is a high-performance memory array targeted at datacenters and server racks that need arrays. This is the technology the company is banking on to achieve 1 TByte on a single die. It has addressed sneak path current issues for high-density applications by having a large (>1E6) half-select ratio (HSR; a measure of how quiet the none-addressed cells are). Crossbar achieves this by biasing all of the unselected cells below 1 V, typically 0.7 V (see figure below).

Crossbar memory has built-in cell selectivity.

Notable specs for the technology include 10,000 to 1 billion cycles of endurance and 10-year retention at 125°C. Right now, the company is in demo and prototype of its 8 Mbits embedded memory for 1T1R, and is demonstrating pre-production 1 MB arrays using the technology. Kumar anticipates that the benefits of the technology, combined with the low capital expenditure required to use Crossbar’s RRAM, will help make it a “very scalable technology that will last many more generations.”

to resistion - I am not sure about that. Looks like current still increases as voltage increases after the programming. And the device seems to be programmed w/o external current compliance, which is good.