The EPIA-M850 is a mini-ITX board from VIA. It comes with either a 1.3GHz or 1.6GHz via Nano CPU, and a VX900 chipset.

This board is not fully supported. It has a number of issues one should be prepared to deal with.

On DIMMs with two memory ranks, odd ranks are disabled by default. The memory initialization does not deal with odd ranks very well, and leaves them disabled.

Even with a VGA BIOS, you will get a garbled display. GRUB2 and linux are able to get a working text console though, but only if a VGA BIOS has been run.

IRQs only work in PIC mode (no APIC and no ACPI). Do not expect to boot anything other than linux, and be prepared to boot with "noapic acpi=off 3": that is disable APICs _and_ do not use ACPI _and_ start in runlevel 3.

Cards plugged in PCI-Express slots may not work.

Linux sometimes likes to just hang. It stops responding: no serial output, no panic message, no response to keyboard presses.

If you still want to try coreboot on this board, have a way to recover by flashing externally in case things go south. There is an SPI header that can be used to reprogram the ROM if the board is powered off. flashrom does NOT work when running coreboot; this is NOT a good recovery plan.

Getting ready for coreboot

Do not expect a graphics console to work

Prepare an external programmer

The EPIA-M850 has an SPI ROM. The ROM can be programmed externally via the SPI header. (TODO: Add picture and pinout of header). While the board is powered off, a programmer is generally capable of supplying enough power. An FT4232H module has been tested to work.

Make sure the programmer can read the chip. If it can't read it, it won't be able to write it in case recovery is needed.

Extract the VGA BIOS

Use bios_extract to to get the VGA BIOS from the vendor's BIOS. Put it in an easy-to-find place. Let's call it path/to/vgabios.bin.

Configure coreboot

Console -> Make sure serial console is on and turned all the way up to SPEW (in case things go south)

System tables -> Make sure at least a PIRQ table is generated. Generating other tables does not hurt us, so they can remain enabled.

Debugging -> Output verbose RAM init debug messages.

For the first try, it is higly recommended to use SeaBIOS as a payload.

Save and exit

Configure linux

For the time being, append the following options to the boot parameters: "acpi=off noapic 3" to the linux that will be booting this board after coreboot finishes.
If you forget to do this, you will also be able to change them at the GRUB2 prompt, assuming you are using GRUB2.

Prepare a serial console

The board has a serial port in the back. How convenient! Use it.

Build and flash coreboot

Start monitoring the serial console and power on the board

If you encounter any errors, or even if you succeed and are happy, let us know.