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Topic: most simple bbd test circuit (Read 3395 times)

I'm kind of new to this stuff... Don't know much of the "standards" as far as digital effects go. I have a Cool Audio 4096 step BBD and a clock driver. What is the minimal audio interfacing here? I have a signal generator and when inputting something to the BBD I can see pure DC on both delay outputs. Any help is appreciated.

As it was relayed to me (and filtered and recalled through the mists of time and memory), back when BBDs were not yet back in production, when Small Bear was based out of the other bedroom, and he had to rely on collecting various NOS stashes, Steve Daniels had a EHX Memory Man for testing that he could stick BBDs into and verify, while he watched the game or whatever.

I doubt such an expenditure is worth your while for one pedal build, though.

As for the BBD itself, there should be DC on the input, or else audio signal will not pass. That's what the bias trimpot is for. A goodly percentage of questions about non-functioning BBD-based devices are often resolved by tweaking that bias trimpot a bit to reinstate signal passage. No idea about what shows up at the output, though I imagine the DC on the input hasn't wandered off anywhere.

... No idea about what shows up at the output, though I imagine the DC on the input hasn't wandered off anywhere.

You must connect the 2 outs together then either a resistor (47k will work) to GND (32xx) or to VCC (30xx), after that node you'll need a low pass filter to see any sine wave fed at input... (47k resistor in series + 22nF capacitor to GND will be enough)

The 1Vppk AC input is riding a 0.5V DC voltage... I guess that is not enough. I looked at the Cool Audio data sheet but was wondering if a more simple circuit can be setup just for testing. Otherwise the Cool Audio sheets are not as good as the original ones, and I guess they are compatible other than the voltage polarity, correct?

Thank you very much for the schematic!I have a few question if you don't mind answering...

1. Can you explain the "strange" voltage divider on the input? Currently I am using Vgg from the clock IC. I don't remember right now but isn't it also square wave output?2. I know you should have a low-pass at the output to remove clock noise but I see you have more than just an RC, why?3. Why 15V?

The filtering has to remove more than clock noise. One of the other things it has to remove is the artifacts creates by the sampling aspect. Even though it is "analog", what comes out of the BBD is essentially a continuous series of square waves, with no means of making the transition between one sample and the next smoother.

Hmmm, square waves....where have I heard of those before? Oh yeah, distortion circuits! The act of sampling, no matter how great the resolution is, creates a lot of audible artifacts when the sampling rate is low enough. Maybe one's latest USB audio interface samples at 96khz, but for producing a delay of just a few hundred milliseconds, the sampling rate of a 4096 stage BBD will often come down well below 10khz. So, not only is there a risk of hearing the clock generator, but there is an equally great risk of hearing all those harmonics produced when a 4khz tone gets sampled at 10khz...or worse.

The extensive lowpass filtering is intended to smooth that out in audible fashion. One of the things you will often see in delay circuits is the presence of lowpass filtering not only after the BBD, but before the signal ever hits it. The reason for this is that if you don't feed the BBD with the frequency content that risks generating such artifacts via the sampling process (what is referred to as aliasing), then you don't have to work so hard to clean them up after the signal comes out of the BBD.

i'm aware of the nyquist–shannon sampling theorem, it makes perfect sense to filter anything under 1/2 of the sampling freq. (better even lower as you suggested). i also understand that with a simple setup i'll get "bad"resaults, however at this point i just want to see two "almost identical" signals on my scope with a time difference between them. i must admit i don't understand the bias circuitry at the input. why is it setup the way it is. thanks!

Sorry for the... delay (we're talking about BBDs aren't we? )The voltage divider will give you ~1/15 VCC with MN30xx and ~14/15VCC with MN32xx this is suggested VGG as per datasheet (for 32xx you may raise the 7k5 to 11k for "precision" sake, but this value will work as well).This schematic is not intended as a base to build any pedal, but it will help to test your BBDs.The same for the LP filter, it will give you a barely clean sine waveform at output so you can check with a scope (BBDs are electrostatic devices, you might as well just burn few stages, not the whole IC; this way you can check a proper working condition).R4 and R8 provide the needed output load/voltage.MN30xxs work with a max 15V while MN32xxs need max 10V.

i'm aware of the nyquist–shannon sampling theorem, it makes perfect sense to filter anything under 1/2 of the sampling freq. (better even lower as you suggested). i also understand that with a simple setup i'll get "bad"resaults, however at this point i just want to see two "almost identical" signals on my scope with a time difference between them. i must admit i don't understand the bias circuitry at the input. why is it setup the way it is. thanks!

I underestimated your knowledge. My apologies.

Actually, it isn't always set up that way. There needs to be a bias voltage on the input to sum with the audio signal. but it can be provided several ways. A trimpot dividing down the supply voltage is certainly one of the most common ways, but I've also seen bias voltages added in earlier stages, where there was no DC-blocking cap between the BBD and where the bias was introduced. In the case of the test circuit we're talking about, there IS no earlier point in the circuit to introduce the bias voltage. The 100nf cap on the input is a better-safe-than-sorry component because we do not know whether there will be DC on the input or what it might be.

The other reason the trimpot is used is because the bias voltage is not a fixed valuein spite of the supply, but rather a fixed portion of the supply. R1 and TR1 divide down the supply voltage to provide Vgg, and TR1 divides THAT down a little more, with R2 simply limiting how much current that divided-down bias voltage source is going to feed the input.

i'm aware of the nyquist–shannon sampling theorem, it makes perfect sense to filter anything under 1/2 of the sampling freq. (better even lower as you suggested). i also understand that with a simple setup i'll get "bad"resaults, however at this point i just want to see two "almost identical" signals on my scope with a time difference between them. i must admit i don't understand the bias circuitry at the input. why is it setup the way it is. thanks!

I underestimated your knowledge. My apologies.

Actually, it isn't always set up that way. There needs to be a bias voltage on the input to sum with the audio signal. but it can be provided several ways. A trimpot dividing down the supply voltage is certainly one of the most common ways, but I've also seen bias voltages added in earlier stages, where there was no DC-blocking cap between the BBD and where the bias was introduced. In the case of the test circuit we're talking about, there IS no earlier point in the circuit to introduce the bias voltage. The 100nf cap on the input is a better-safe-than-sorry component because we do not know whether there will be DC on the input or what it might be.

The other reason the trimpot is used is because the bias voltage is not a fixed valuein spite of the supply, but rather a fixed portion of the supply. R1 and TR1 divide down the supply voltage to provide Vgg, and TR1 divides THAT down a little more, with R2 simply limiting how much current that divided-down bias voltage source is going to feed the input.

thanks again for explaining things to me guys!it starts to look a little bit clearer... according to the cool audio data sheet, the Vgg supply is 14/15 Vdd so what is the advantage of using the clock IC's Vgg as a bias source over a simple divider from the power rails? I think the Vgg signal is not simply 14/15*Vdd but rather a square wave?

Nope it's a DC "bias" voltage.MN3102 or similar clock generators will provide that voltage (look at it as the virtual GND on single supply).Actually you can run MN BBDs with a simple clock generator and set VGG with 2 resistors

This simple scheme actually works! I just received some crappy dirty delay from my 3205 and 3102. Just had to use more trimpots to set the voltages right: one for sound (as in the provided schematic), one for overall voltage (from 9V to 5 or 6V or smth) one for Vgg (to get 14/15 Vdd, the voltage provided by the clock was too low!). Now i'm gonna take a rest and get back to other components. I know it's an old topic, but the one that finally draw me to the starting point (which was not easy for me). Lots of thanks for the input folks! One MN3102 ended dead so far btw.