Matched offsets put signals into ADC's range
12/09/99 EDN-Design Ideas The circuit in Figure 1 measures a voltage that is negative with respect to the systemís ground point. The constraint is that the a single supply powers the ADC, and its ground point is fixed relative to the measured voltage. PDF has several circuits, scoll to find this one.__ Circuit Design by Michael Petersen, Iowa State University, Ames, IA

Matched Resistor Networks for Precision Amplifier Applications
10/03/13 EDN-Design Notes Two-quadrant multiplying DAC utilizes octal CMOS
buffer. Some ideal op amp configurations assume that the feedback resistors exhibit perfect matching. In practice, resistor non-idealities can affect various circuit parameters such as common mode rejection ratio (CMRR), harmonic distortion and stability. For instance, as shown in Figure 1, a single-ended amplifier configured to level-shift a ground-referenced signal to a common mode of 2.5V needs a good CMRR. Assuming 34dB CMRR and no input signal, this 2.5V level shifter exhibits an output offset of 50mV, which can even overwhelm the LSB and offset errors of 12-bit ADCs and drivers.__ Circuit Design by Linear Technology Design Note 502

Measuring Seven RTD Temperatures with One Reference Resistor & One Reference Current
The LTC2408 is 8-channel 2.7V to 5.5V micropower 24-bit A/D converters with an integrated oscillator, 4ppm INL and 0.3ppm RMS noise. They use delta-sigma technology and provide single cycle digital filter settling time (no latency delay) for multiplexed applications. The first conversion after the channel is changed is always __ Linear Technology/Analog Devices App Note, Mar 30th 2010