The STGAP2S is a single gate driver which isolates the gate driving channel from the low voltage control and interface circuitry.

The gate driver is characterized by 4 A capability and rail-to-rail outputs, making the device also suitable for high power inverter applications such as motor drivers in industrial applications.

The device is available in two different configurations. The configuration with separated output pins allows to independently optimize turn-on and turn-off by using dedicated gate resistors. A configuration featuring single output pin and Miller clamp function prevents gate spikes during fast commutations in half-bridge topologies.

Both configurations provide high flexibility and bill of material reduction for external components.

The device integrates protection functions: UVLO and thermal shutdown are included to easily design high reliability systems. Dual input pins allow choosing the control signal polarity and also implementing HW interlocking protection in order to avoid cross-conduction in case of controller malfunction.

The input to output propagation delay results contained within 80 ns, providing high PWM control accuracy.

A standby mode is available in order to reduce idle power consumption.

(**) The Material Declaration forms available on st.com may be generic documents based on the most commonly used package within a package family. For this reason, they may not be 100% accurate for a specific device. Please contact our sales support
for information on specific devices.