Intel Ready to Take On ARM With 22nm Chips

Moore's Law combined with new design flexibility for creating ultra-low power SoCs for mobile devices will give Intel a leg up, company says at IEDM conference.

Intel has been slow to crack the mobile device market, but the company may have some new tricks up its sleeve which, combined with one very old one, could result in next-generation x86-based processors that give the dominant ARM architecture a serious run for its money.

The chip giant outlined this new path for its ultra-low power System-on-a-Chip (SoC) designs in a paper presented at the 2012 International Electron Devices Meeting (IEDM) in San Francisco.

The old trick is, of course, Moore's Law. Intel is already a year into ramping its 22-nanometer fabrication process using "3D" tri-gate transistors for its flagship Core and Xeon processors. Now the company is moving its Atom processors to 22nm and that should mean more competitive power usage by the chips Intel wants to place in the smartphones and tablets currently powered by ARM.

Shrinking transistors is something Intel does very well and each time it does, the resulting chip circuitry gets more efficient. By staying ahead of the curve in process technology, Intel can enjoy such advantages while designers of ARM processors have to wait for third-party semiconductor foundries to transition to new process nodes.

But Intel isn't just relying on die shrinks. The company said it will move its Atom SoC platform to 22nm differently than it did with Core and Xeon.

"This SoC variant of Intel's 22nm logic process differs from the original CPU variant, which entered production in late 2011, by being optimized for low power SoC products," Intel spokesperson Chuck Mulloy told PCMag in an email.

The new twist on Intel's 22nm process "incorporates low standby power and high voltage transistors together with high-speed logic transistors in a single SoC chip to achieve industry leading drive currents (a measure of performance) and record low leakage levels (a measure of power)," he added.

Designers of Intel's next-gen SoCs will have a great deal of flexibility in mixing and matching different types of transistors, high-density interconnects, and RF/mixed-signal features, Mulloy said.

The authors of the IEDM paper elaborated further, saying that Intel is the first company to develop "a leading edge 22nm SoC process technology featuring 3D tri-gate transistors which employs high speed logic transistors, low standby power transistors, and high-voltage tolerant transistors simultaneously in a single SoC chip to support a wide range of products, including premium smartphones, tablets, netbooks, embedded systems, wireless communications, and ASIC products."

The company actually revealed the general shape of its 22nm SoC strategy at the annual Intel Developer Forum in San Francisco earlier this yearspecifically talking about its ability to optimize next-gen products for performance or low power leakage. The IEDM paper simply reveals a lot more technical details about how Intel does that.

Meanwhile, IBM also opened up about its own 22nm process in a separate paper presented at the conference, according to EE Times. Reserachers said Big Blue's 22nm logic process would deliver 25 to 35 percent better performance efficiency than its 32nm node, the tech journal reported.

Damon Poeter got his start in journalism working for the English-language daily newspaper The Nation in Bangkok, Thailand. He covered everything from local news to sports and entertainment before settling on technology in the mid-2000s. Prior to joining PCMag, Damon worked at CRN and the Gilroy Dispatch. He has also written for the San Francisco Chronicle and Japan Times, among other newspapers and periodicals.
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