Kumar has partnered with his former student John Sartori (MSCompE ‘10, PhD ‘12), now an assistant professor at University of Minnesota, to revisit original processor designs. To have flexibility, processors have traditionally been designed with more than any one application will use. According to IEEE Spectrum, this is “especially true of the type of ultralow power microcontrollers that drive the newest embedded computing platforms such as wearables and Internet of Things sensors.”

Kumar and Sartori’s approach involves tracking individual logic gates unused during an application and removing them. This results in a smaller, simpler version of the microcontroller, tailored for the execution of only the designated application. Kumar refers to this as a “bespoke processor.”

“Our approach was to figure out all the hardware that an application is guaranteed not to use irrespective of the input,” said Kumar to IEEE Spectrum. What’s left is “a union, or superset, of all possible paths that data can take. Then we take away the hardware that’s not touched.”

The use of an openMSP430 microcontroller has led to bespoke designs performing applications such as the fast Fourier transform, autocorrelation, and interpolation filtering. Particularly impressive is the fact that they incorporate less than half of the original logic gates.

Of the 15 microcontroller apps inspected, none required more than 60 percent of the gates. This use of shorter distance travel for signals increases power savings by 65 percent.

This approach can also be used to perform two or more applications, or an operating system (OS) with an application. The group ran the operating system (OS), FreeRTOS, on its own. When used in this manner, 57 percent of the gates were left untouched. Kumar noted that the 15 applications tested run “bare metal,” requiring no OS.

IEEE Spectrum further addressed a critical question: “Why not just order up an ASIC (application specific integrated circuit)?” The answer is simple: cost. The microcontrollers operate on low-profit-margins making it far too costly to do ground-up design testing for an ASIC, said Kumar.

Overall, the standard design is both more cost effective and practical in design.