Abstract:
A group of leading semiconductor companies have developed a roadmap for leveraging CMOS designs intended for manufacturing on bulk silicon to fabricate ICs on fully depleted silicon-on-insulator (FD-SOI) substrates with ultra-thin buried oxide layers, producing chips with improved performance and lower operating power. The companies involved in this collaborative research effort - including SOI Industry Consortium members ARM, Leti, Université Catholique de Louvain (UCL), IBM, GlobalFoundries and Soitec - have published their findings in a new white paper titled "Considerations for Bulk CMOS to FD-SOI Design Porting."

"This work shows that porting circuits from bulk silicon to FD-SOI can be very direct, depending on the FD-SOI technology used by a specific chipmaker," said Horacio Mendez, executive director of the SOI Industry Consortium. "Design porting can enable shorter time-to-market for FD-SOI-based devices. Porting existing bulk CMOS designs to FD-SOI will lead to further optimization of ICs at the 20nm node and even faster implementation of FD-SOI devices."

The research, which examined both bulk-to-FD-SOI IP porting and full-chip design porting, determined that using existing planar designs with minimal adjustments is especially viable for standard cell libraries, memory compilers and most I/Os, with slightly more efforts for some types of analog and mixed-signal designs.

In terms of circuit performance, the key benefits of using FD-SOI over planar bulk CMOS include:

The new white paper's section on "Impact Per Design Domain" examines two paths for full-chip design porting. The most straightforward and fastest porting from bulk silicon to FD-SOI aims at not changing the place-and-route and modifying as little as possible the graphic database system (GDS) contents. The second approach optimizes the system-on-chip (SOC) design to take full advantage of FD-SOI enhancements such as back-biasing.

Appendices and reference sections in the white paper provide details on the various technology issues involved and links to FD-SOI technical papers presented at top industry conferences in recent years.

In addition to accommodating bulk-silicon designs, FD-SOI technology enables simplified processing of semiconductor devices, using fewer steps than fabricating ICs on bulk silicon. This streamlining means that, at upcoming technology nodes, it will cost less to manufacture semiconductors on FD-SOI wafers than on bulk silicon, as quantified in a recent study by IC Knowledge.

The views and opinions expressed by the SOI Industry Consortium through officers in the SOI Industry Consortium or in this presentation or other communication vehicles are not necessarily representative of the views and opinions of individual members. Officers of the SOI Industry Consortium speaking on behalf of the Consortium should not be considered to be speaking for the member company or companies they are associated with, but rather as representing the views of the SOI Industry Consortium. Views and opinions are also subject to change without notice, and the SOI Industry Consortium assumes no obligation to update the information in this communication or accompanying discussions.