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Methodics

Managing any design data management system requires a policy on how often users should be submitting their changes to the central repository. If users commit frequently with less local testing then other users will more likely see errors. If commits are done less often, but with
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Should a semiconductor/IP company use a proprietary data-management (DM) environment? Or even develop their own? After all, every company is unique and developing a unique DM allows a perfect match of just what
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Chip design is largely about assembling pre-designed IP, either developed in other groups in the same company, or brought in from a 3rd party, or occasionally developed within the SoC design group itself. But that makes it sound like it is a bunch of blocks
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My PhD thesis is titled The Design of a Network Filing System. Yes, that was a research topic back then (and yes, we did call them filing systems not file-systems). One big chapter was on access controls. There are several problems with designing an access control system:

Digital designers are more numerous than analog IC designers, and so they tend to get more attention from EDA vendors in terms of tools and automation methodologies. For an analog design team with specialists focused separately on schematics and layout there are several methodology questions that need to be addressed, like:

As a blogger I have the privilege of meeting many IC designers from around the world, mostly through contact on LinkedIn or from connecting at trade shows. Through a contact at DAC I met up with Achim Graupner, a manager of methodology and design automation from ZMDI, then asked him for an interview to understand how his group does IC design in Germany. Achim has been with ZMDI since 2004 and his background includes design engineering plus being a research assistant at the Technische Universitat Dresden.

Designing an SoC sounds way more exciting than bug tracking, but let's face it - any bug has the potential to make your silicon fail, so we need to take a serious look at the approaches to bug tracking. When using an IP or an IP subsystem in a design, the SoC integrators require some critical knowledge about this IP. The actual design and test files are just one part of that information. It is also very useful
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At DAC in San Francisco this past June I was able to visit and blog about two dozen EDA companies, however there were so many more products and events to see that I couldn't possibly have enough time to enjoy them all. Fortunately for me there were plenty of videos made of vendor presentations, so this week I got caught up a bit by watching a video
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