I don't want to be human! I want to see gamma rays, I want to hear X-rays, and I want to smell dark matter ... I want to reach out with something other than these prehensile paws and feel the solar wind of a supernova flowing over me.

I couldn't find the sampling rate however. He mentions 12-bit ADC and using a microcontroller, and no mention of a discrete ADC.

The "sampling head" on the analog input is made from an comparator (ADCMP582), the trigger input is using ADCMP567. The max. sample rate is defined by the delay line resolution (on DS800 that 1ps), and the vertical resolution (12bit 500kps/s ADC in PIC24HJ64). Therefore is the maximum sample rate, for DS800, ~ 83GS/s

I'm aware of how equivalent time sampling works. But you did answer my question, it is as I feared... use the PIC for sampling. I don't quite understand why he would go to the trouble of making a nice frontend etc, and then use such a limited actual, non-equivalent, quite real sampling rate of 500 ksps. High speed at 12-bit isn't all that expensive.

If you have a signal that has reasonable but not great long term stability, then you can make do with equivalent time sampling as long as you don't take eons to gather all your samples. However I can see the use case for this where 500 ksps is sufficient (checking SI on your pcbs etc). It's only too bad IMO, because even a lowly 40 MSPS 12-bit ADC would be a nice improvement. That said, even with the 500 ksps limitation this looks quite interesting.

I don't quite understand why he would go to the trouble of making a nice frontend etc, and then use such a limited actual, non-equivalent, quite real sampling rate of 500 ksps. High speed at 12-bit isn't all that expensive.

If you have a signal that has reasonable but not great long term stability, then you can make do with equivalent time sampling as long as you don't take eons to gather all your samples. However I can see the use case for this where 500 ksps is sufficient (checking SI on your pcbs etc). It's only too bad IMO, because even a lowly 40 MSPS 12-bit ADC would be a nice improvement.

my guess: because then he would have to split the analog signal, add second path with attn/opamps and care much more about the higher speed ADC. Sure, the problem with splitter in RF path can be easy solved with second input, but then this would be not good from usability point of view (when i have to swap cables, well then i swap to another decent RT DSO). The higher speed ADC is not necessary for the sampling scope, 500ks/s is fast enought to get all the updates captured. With higher sampling there would be no improvement, but only additional noise source (and cost factor). The only improvement i see might be 14bit ADC to get real 12bit resolution, decent enclosure and more modern-looking software. He said, he is not using the ADC at all.

But that for DS800, no idea what he will use as ADC on DS100.

« Last Edit: December 30, 2013, 02:21:02 pm by tinhead »

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I don't want to be human! I want to see gamma rays, I want to hear X-rays, and I want to smell dark matter ... I want to reach out with something other than these prehensile paws and feel the solar wind of a supernova flowing over me.

I wonder how he gets reasonable slew rates at reasonable sampling rates. As I said, it's not a proper sampling scope ... if you look the input is directly connected to the inverting input of the comparator (well, through a coupling capacitor in the picture). There is no room for a sampling gate on the PCB.

Does he try to predict the slew rate of the signal and increase the approximation accordingly rather than single stepping it?

However I can see the use case for this where 500 ksps is sufficient (checking SI on your pcbs etc). It's only too bad IMO, because even a lowly 40 MSPS 12-bit ADC would be a nice improvement.

If the front end is a high speed comparator I don't see how it is especially using the processor ADC at all.

My guess is it is a successive approximation ADC using the front end comparator with the 'wrinkle' that the comparator is sampled after a precise time delay from the trigger input. It needs a DAC of some kind to set comparator reference voltage and each point on the captured waveform will require n trigger events to achieve n bit vertical resolution.

Knowing that adjacent samples are likely to have similar values there would be scope for optimising the successive approximation. It might be quicker to implement some kind of tracking converter.

Sampling scopes have been around for decades. Mostly because they can achieve bandwidths beyond what's feasible for real-time scopes. Just look at the line-up of the big scope manufacturers: Agilent, Lecroy and Tektronix. They all have sampling scopes for the high bandwidth applications. The fastest digital real-time scope for $300 will probably have about 200 MHz bandwidth at best. That's almost 2 orders of magnitude worse than what this sampling scope offers.

Ok. Let's examine this case. Assume I have a scope that sampling rate is much lower than the signal and uses equivalent-time sampling thing. When I dedice to make some RF thing such as 1GHz oscilator, amplfier etc.., that scope is completly useless. Why ? because the signal must repeat identically each time however there could be huge phase nosie in my hypothetical circuit or a mismatch or intermodulation etc... and I can not able to troubleshoot with that type of osciloscope (probably I need a spectrum analyer for that )

My point is that I need an osiloscope to evaluate undeterminted responses of my circuits. Those signals may or may not repeat them selfs. That's why I'm using an osciloscope to find out.

The issue is that it's quite limited unless you have expensive high bandwidth high impedance probes to go with it.

That's not the case. These high speed sampling head systems are used for design verifcation rather than debugging arbitrary circuits, and suitable monitoring circuitry and test connectors will have been designed into the system under test.

This is a really nice device at an excellent price if he can get the backing. There are scores of people involved in picosecond electronics who have to rely on old boat anchor sampling systems from TeK and HP (which are getting harder and harder to maintain) which would buy into this if they are aware of it. I hope the fellow partners up with someone with some marketing flair.

The issue is that it's quite limited unless you have expensive high bandwidth high impedance probes to go with it.

That's not the case. These high speed sampling head systems are used for design verifcation rather than debugging arbitrary circuits, and suitable monitoring circuitry and test connectors will have been designed into the system under test.

That and for testing some asynchronous fpga abuse in timing applications for which it would be just the ticket. The $300 price level is a no-brainer. The only reason I haven't backed it already is that I cannot really miss $300 on a gamble right now. If I was sure I'd plonk down $300 for that sort of functionality since right now I have nothing in that segment of gear.

However I can see the use case for this where 500 ksps is sufficient (checking SI on your pcbs etc). It's only too bad IMO, because even a lowly 40 MSPS 12-bit ADC would be a nice improvement.

If the front end is a high speed comparator I don't see how it is especially using the processor ADC at all.

My guess is it is a successive approximation ADC using the front end comparator with the 'wrinkle' that the comparator is sampled after a precise time delay from the trigger input. It needs a DAC of some kind to set comparator reference voltage and each point on the captured waveform will require n trigger events to achieve n bit vertical resolution.

and it is exact like that, the misleading information was the 12bit resolution and 12bit ADC inside PIC. In the reality he isn't using the ADC to measure anything.

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I don't want to be human! I want to see gamma rays, I want to hear X-rays, and I want to smell dark matter ... I want to reach out with something other than these prehensile paws and feel the solar wind of a supernova flowing over me.

Ok. Let's examine this case. Assume I have a scope that sampling rate is much lower than the signal and uses equivalent-time sampling thing. When I dedice to make some RF thing such as 1GHz oscilator, amplfier etc.., that scope is completly useless. Why ? because the signal must repeat identically each time however there could be huge phase nosie in my hypothetical circuit or a mismatch or intermodulation etc... and I can not able to troubleshoot with that type of osciloscope (probably I need a spectrum analyer for that )

I'm getting the impression you've never used a sampling scope before. Sampling scopes require a trigger clock input, including the scope we're discussing here, which can be generated by splitting the input waveform into two -3 dB signals. The scope triggers off this clock and not from another clock (such as an internal 10 MHz) that has no relation to the input signal. If there is phase noise in the clock, you will still see the clock waveform on the scope, and then you will be able to see that the edges of the waveform are fuzzy from the phase noise or jitter. This is actually useful information for debugging your circuit and will inform you that you have a phase noise problem. If you then put the input signal through an amplifier, you will fully be able to see how the amplifier has affected the signal. If the amplifier is oscillating or having a drastic problem, then you will see noise instead of a clean, amplified signal. This will also tell you that there is something wrong with your circuit, and when it comes out as a clean, amplified signal, then you know your circuit is working.

Hat this thing does is trigger at a certain point of the incoming signal. A variable delay line then shifts the sample point back and forward. So they adjust the delay between where they trigger and where they actually measure. That is how they reconstruct the signal. So with a few k samples a second you can still trap a very fast signal. If you lcd display of the scope os 800 pixels horizontal you can sample 800 samples a second a still have a refreshed image every second.

The key thing is having a very fast sample gate.To find the first point : set delay to zero. Sweep a simple dac to find the point where the comparator toggles. The dac value is the incoming level at time 0.Increment the delay between trigger and sampler. Sweep your dac again. That gives you the value at trigger + 1 delay step.Increment delay again. And so on...

The only important thing is the sample gate and the resolution of the delay generator.

This guy is using timing equalisers coming from the fiber optics world. Companies like Vitesse and Ti and Synertec have special chips with programmable delay generators in steps of a few picoseconds.

Most likely that is what he is using. His frontend is a laser diode pickup amplifer.The pic is a slowpoke , doesnt matter. He uses two optocouplers to isolate the thing and sends it over a silabs usb uart.

The only really fast elements are the trigger comparator , the delay generator chip and the sampler gate. The rest is kilohertz domain.

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I'm getting the impression you've never used a sampling scope before. Sampling scopes require a trigger clock input, including the scope we're discussing here, which can be generated by splitting the input waveform into two -3 dB signals. The scope triggers off this clock and not from another clock (such as an internal 10 MHz) that has no relation to the input signal. If there is phase noise in the clock, you will still see the clock waveform on the scope, and then you will be able to see that the edges of the waveform are fuzzy from the phase noise or jitter. This is actually useful information for debugging your circuit and will inform you that you have a phase noise problem. If you then put the input signal through an amplifier, you will fully be able to see how the amplifier has affected the signal. If the amplifier is oscillating or having a drastic problem, then you will see noise instead of a clean, amplified signal. This will also tell you that there is something wrong with your circuit, and when it comes out as a clean, amplified signal, then you know your circuit is working.

I understand your point it's a convincing one and You are right I've never use this type of scope before. If I may say so, It seems more usefull as a production test scope.

Memory depth is not the #1 cost driver of those fast real time samplers. Nor #2. Or #3. Maybe #4, who knows.

But I like being wrong, because in this case being wrong is advantageous. Lets go with couple hundred being 512 sample points. Lets go with old school 8 bit, so none of that newfangled 12-bit stuff. The bleeping expensive $100k+ scope under discussion ==> 8 GHz bandwidth signal is to be sampled in real time, 8 bit samples, 512 points. Define far far far less expensive, and rough idea of proposed solution.

How do you propose a real time sampler that can capture that 8 GHz BW signal for 512 points under lets say 1k?

Given your low "a few hundred" I thought it might go into optimistic "a bunch of discrete points along a transmissions line" territory. So lets say 512 to keep it somewhat usable. So which diodes at 1000 units do you propose using? Yeeeeears ago I looked into something similar and it wasn't all that cheap at that point in time. But maybe you know the magic part at a nice price @1000 units at digikey, for use as S&H? In the meantime fpga's have progressed, so the generation of gate pulse etc has become simpler. Anyways, I don't see that becoming all that nice and cheap compared to the $300 equivalent time sampler from the OP.

PS. unless you can find some really low cost way to make a 100 ps range pulse generator, so you can have one pulse generator per tap ... then you could do coarse delay in a FPGA, fine tuned with a varactor circuit (and on-line calibration).