Register addresses for the AD9625 are shadowed. Register writes do not affect device operation until a transfer command is issued by writing 0x01 to Address 0x0FF, thereby setting the transfer bit. This allows the registers to update internally and simultaneously when the transfer bit is set. The internal update occurs when the transfer bit is set, and then the bit automatically clears. Please refer to datasheet for more details.

Register addresses for the AD9625 are shadowed. Register writes do not affect device operation until a transfer command is issued by writing 0x01 to Address 0x0FF, thereby setting the transfer bit. This allows the registers to update internally and simultaneously when the transfer bit is set. The internal update occurs when the transfer bit is set, and then the bit automatically clears. Please refer to datasheet for more details.