Rambus will be showing off their QRSL (Quad-Rambus Signalling Level) technology tomorrow at DesignCon 2001. The Register posted some details, including a clock speed of 400MHz (like PC800) with four bits of data passed per connection per clock (only two bits for PC800). So, on a 64-bit bus, you get 12.8GBps throughput. This is interesting, as I thought that RDRAM was only designed for a 16-bit bus. Does that mean that it will be a four-channel bus, or will Rambus pump it to 32-bits and then go for a dual-channel configuration? The current P4 configuration uses dual-channel 16-bit buses for RDRAM, I believe. On another note, GigaTest labs announced their 300th RDRAM module validation and, more interestingly, their ability to validate SO-RIMMs. Like SO-DIMMs, SO-RIMMs are a compact design that can be fit into laptops. Perhaps RDRAM is headed for laptops when the mobile P4 chips hit in 2002.