On Power8 & Power9 the early CPU inititialisation in __init_HFSCR()turns on HFSCR[TM] (Hypervisor Facility Status and Control Register[Transactional Memory]), but that doesn't take into account that TMmight be disabled by CPU features, or disabled by the kernel being builtwith CONFIG_PPC_TRANSACTIONAL_MEM=n.

So later in boot, when we have setup the CPU features, clear HSCR[TM] ifthe TM CPU feature has been disabled. We use CPU_FTR_TM_COMP to accountfor the CONFIG_PPC_TRANSACTIONAL_MEM=n case.

Without this a KVM guest might try use TM, even if told not to, andcause an oops in the host kernel. Typically the oops is seen in__kvmppc_vcore_entry() and may or may not be fatal to the host, but isalways bad news.

In practice all shipping CPU revisions do support TM, and all hostkernels we are aware of build with TM support enabled, so no one shouldactually be able to hit this in the wild.