Some modern CCD designs provide a dummy readout amplifier that is designed to be operated with the same clock and bias signals as the true amplifier in order to provide a measurement of clock induced and other common-mode noise signals in the true amplifier readout. In general the dummy output signal is subtracted electronically from the true output signal in a differential input preamplifier before digitization. Here we report on an alternative approach where both signals are digitized and the subtraction done in software. We present the results of testing this method of operation using the ARC SDSU generation III CCD controllers and an e2v CCD231 device and find it works well, allowing a noise figure of ~ 2:2 electrons to be reached in the presence of significantly higher (~ 6 electrons) pickup noise. In addition we test the effectiveness of using unused (but still genuine) readout amplifiers on the detector to provide a pseudo-dummy output, which we also find effective in cancelling common mode noise. This provides the option of implementing noise reduction on CCDs that are not equipped with dummy outputs at the expense of overall readout speed.