TI Precision Labs - Op Amps: Stability - Phase margin

Hello and welcome to Part 2 of the TI Precision Labs on Op Amp Stability. In the first video, we discussed the types of issues that op amp stability can cause in production systems, as well as how to identify stability issues in the lab. This video will provide a brief review of Bode plots and basic stability theory using phase margin iterative closure analysis. It is important to thoroughly understand these concepts before proceeding with the video series. Please be sure you've completed the lectures and problem sections for op amp bandwidth 1 through 3 before proceeding.
This slide is from Op Amp Bandwidth Video Number 1. It illustrates the equations for a pole and its associated to magnitude and phase response on Bode plots. A pole causes a negative 20 dB per decade decrease in the slope of the magnitude response after the pole frequency, fp. The pole also causes a negative 90 degree phase shift in the phase response, beginning roughly a decade before fp, and ending roughly a decade afterwards.
At fp, the magnitude response will have decreased by negative 3 dB, and the phase will have shifted by negative 45 degrees. While the pole results in a total phase shift of 90 degrees over about 2 and 1/2 decades, the phase shift is equal to negative 5.7 degrees a decade before fp, and negative 84.3 degrees a decade after fp.
This slide, also from Op Amp Bandwidth Video Number 1, illustrates the equations for a zero and its associated magnitude and phase response on Bode plots. A zero causes a positive 20 dB per decade increase in the slope of the magnitude response after the zero frequency, fz. The zero also causes a positive 90 degree phase shift in the phase response beginning roughly a decade before fz, and ending roughly a decade afterwards.
At fz, the magnitude responses increase by plus 3 dB, and the phase is shifted by positive 45 degrees. While the zero results in a total phase shift of positive 90 degrees over about 2 and 1/2 decades, the phase shift is equal to positive 5.7 degrees a decade before fz, and positive 84.3 degrees a decade after fz.
It's helpful to use an intuitive model for the op amp when performing AC stability analysis because of the complexity of modern op amps. In this simplified stability model, the differential voltage applied to the inputs is passed to the amplifier output stage, where it passes through the amplifier open loop gain, followed by the open loop output impedance, before it reaches the output terminal. The open loop gain, or Aol of an op amp, represents the maximum gain that can be applied over frequency to the differential voltage applied between the inputs of the device. Aol, for an ideal amplifier, is infinite, and is not limited by frequency.
Modern op amps can have open loop gains in excess of one million volts per volt, or 120 dB at low frequencies, with unity gain bandwidths from tens of kilohertz up to several gigahertz. The open loop output impedance, Zo, is a measure of the impedance of the open loop output stage of the op amp. Zo should not be confused with the amplifier's closed loop output impedance, Zout, which depends on Zo, Aol, and the circuit configuration.
To keep the stability analysis focused on the basic concepts for this video series, the behavior of Zo will be viewed as a resistor over all frequencies of interest. In truth, Zo can vary over frequency for newer rail-to-rail output stages, making stability analysis more difficult. Complex output impedance will be discussed in the advanced section at the end of this video series, after a firm understanding of analysis with the resistive output impedance has been developed.
To control the large open loop gain of modern amplifiers, negative feedback is required between the output of the amplifier and the inverting input. This is referred to as closing the loop. In this circuit, the loop is closed with Rf and R1, which creative voltage divider, and therefore, an attenuation between the output and the inverting input. The ratio of the resistors determines the amount of the output that is fed back to the input, which is defined as the feedback factor, or beta, of the circuit.
Closing the loop results in a closed loop gain, Acl, that is equal to Aol divided by 1 plus Aol multiplied by beta. The product of Aol and beta is referred to as loop gain. When a loop gain is large, the closed loop gain formula can be simplified to equal 1 over beta. In this example, 1 over beta equals 1 plus Rf divided by R1, which will be recognized as the gain of a non-inverting amplifier circuit.
Closed loop gain through negative feedback is a fundamental concept in amplifier circuit design, and should be thoroughly understood. Let's review it again quickly. The amplifier will adjust its output to equalize the two inputs, establishing the virtual short between them. Therefore, an attenuation from the output to the input-- set by beta-- forces the output to be larger than the input by the inverse of beta. This is how the ratio of the feedback resistor sets the closed loop gain of the circuit.
Let's now move on and define the conditions for stability using mathematical and graphical methods. First, we must define when an amplifier is unstable. Looking back at the op amp closed loop gain equation, we remember that Acl equals Aol divided by 1 plus loop gain. Taking a closer look, we can see that if loop gain equals negative 1, the denominator of the Acl equation equals negative 1, and therefore, Acl becomes undefined. This is the mathematical definition of instability.
How can this happen in a real circuit? Well, at some point in frequency, loop gain will equal 0 db, which is equal to 1 volt per volt. If enough delay is introduced into the feedback path, the phase in the feedback network will shift 180 degrees relative to Vn. A 180 degree phase shift is equivalent to an inversion of the input, or negative 1. Therefore, when loop gain equals 0 db and the phase is shifted by 180 degrees, the result is loop gain equals negative 1.
The term phase margin is used to define how close a circuit is this condition. Phase margin is simply the phase of loop gain at the frequency where loop gain equals 0 dB. For example, 10 degrees of phase margin means that loop gain has shifted by 170 degrees at the point where loop gain equals 0 dB.
As you can see, loop gain is a key component of stability analysis. How can we observe loop gain? First, we can consider the loop gain magnitude using a Bode plot. Using the same circuit as before, we have a gain of 10 volts per volt, or 20 dB. So 1 over beta is a constant 20 dB over frequency. The circuit's Aol is also shown.
To find the magnitude of loop gain, we simply subtract 1 over beta from Aol. This might not seem intuitive, but the mathematical relationship shown on the right side of the slide proves this using the properties of logarithms. Remember, in the last slide we stated that the phase margin is the loop gain phase at the frequency where loop gain equals zero dB. This frequency is called fc, and defines where the loop is closed. This is also the frequency were Aol and 1 over beta intersect, which makes sense, since the difference of two equal values is 0.
To measure the phase margin, we need to know the loop gain phase, or phase of Aol times beta, over frequency. Using the same log properties as before, we can simply subtract the phase of 1 over beta from the phase of Aol to get the phase of loop gain.
In this example, a capacitor was added to the feedback network of the op amp circuit. At DC, the capacitor is open, so the closed loop gain is 10 volts per volt like the previous circuit. At some higher frequency, the capacitor causes the impedance of the combination of R1 and C1 to decrease, so the gain of the circuit increases by plus 20 dB per decade. This can be seen from the 0 in the 1 over beta plot.
Looking at the phase, the 90 degree increase in the phase of 1 over beta creates a 90 degree decrease in the phase of loop gain. So the phase margin becomes very small, and is only equal to 5 degrees.
Now that we know how to observe phase margin, let's review what it's actually telling us. Remember that we want to avoid the condition where loop gain equals negative 1. That means we have a phase shift of 180 degrees add fc, or 0 degrees of phase margin.
For optimal stability, we use a rule of thumb which states that a phase margin of 45 degrees or higher is required. While a circuit may work with a phase margin less than 45 degrees, it is considered to only be marginally stable and will show significant overshoot in ringing. Also, keep in mind that over the lifetime of a design, devices will have different characteristics due to process variation, temperature, component value tolerances, and other fluctuations. Therefore, for a robust design, you should really meet the 45 degrees of phase margin minimum requirement.
Instead of having to directly measure the phase margin of every circuit to verify stability, another analysis method exists, which is simpler, and can actually give more information about what causes the stability problem in a circuit. This method is called rate of closure analysis. To use this method, we only need to consider the magnitude plots of Aol and 1 over beta. These plots have well-defined slopes due to the poles and zeroes in their transfer function.
By analyzing the rate of closure of Aol and 1 over beta at fc, the frequency at which they intersect, we can quickly determine the stability of a circuit. The rule for this method is that the rate of closure it at c must equal 20 dB for optimal stability.
Let's use our same circuit example from earlier, with a capacitor on the op amp inverting input. That capacitor causes a 0 in 1 over beta, which makes 1 over beta increase with the slope of 20 dB per decade. The Aol curve of the op amp decreases at 20 dB per decade, due to the op amp's dominant pole.
When they intersect at fc, the rate of closure is the absolute value of the slope of Aol minus the slope of 1 over beta, which works out to be 40 dB. Since the rate of closure is greater than 20 dB, we can conclude that the circuit is unstable, matching the poor phase margin measured previously.
Besides being quick and easy to check, the rate of closure method provides additional information into the cause of the circuit instability. In this example, the slope of Aol only shows the effect of the op amp dominant pole, as we expect. However, the rise in 1 over beta indicates a zero in the feedback network. Therefore, we can take steps to compensate for it. Measuring the phase margin does not provide this level of insight into the cause of the stability issue-- only whether or not there is an issue.
The rate of closure method works because the slopes of Aol well and 1 over beta are linked to the poles and zeroes in the circuit. A 20 dB rate of closure means the circuit is only under the net influence of one pole, which means the phase margin is at least 45 degrees, and not for optimal stability.
Here, we analyze the standard non-inverting amplifier circuit from earlier in the lecture using the rate of closure method. In this case, 1 over beta is flat, and doesn't contain the 0 shown in the previous example. Aol still decreases with a slope of negative 20 dB per decade as before, and therefore, the rate of closure is now 20 dB. We can conclude that this circuit is stable and will have phase margins greater than 45 degrees,
As shown in the previous slides, the rate of closure and phase margin are directly related to each other, allowing us to predict one value based on the other. This slide gives three different examples of rate of closure and their corresponding phase margins. In the first case, we have a rate of closure of 20 dB per decade. So the circuit is stable, and will have between 45 and 90 degrees of phase margin. This is the best case for circuit design.
In the second case, there is a 0 in 1 over beta right at fc. At fc, the rate of closure is beginning to change and will be somewhere between 20 and 40 dB per decade. This case corresponds roughly 45 degrees of phase margin.
Remember that a zero causes a total phase shift of 90 degrees, with 45 degrees of phase shift right at the zero frequency. Therefore, the loop gain phase will have 90 degrees of phase shift from the Aol dominant pole, and 45 degrees from the phase shift of the 1 over beta 0 at fc. This leaves 45 degrees of phase margin.
In the final case, there is a 0 in 1 over beta well before fc, so the rate of closure is 40 dB per decade. This results between 0 and 45 degrees of phase margin, corresponding to an unstable circuit. This case should be avoided.
In summary, this video discussed several fundamental concepts and op amp stability theory, including a Bode plot review, phase margin, and rate of closure analysis. Stay tuned for the next videos, which will cover the theory for simulating op amp stability and SPICE. Thanks for your time. Please try the quiz to check your understanding of this video's content. 大家好，欢迎观看 TI 高精度实验室 运算放大器稳定性视频第 2 部分。 在第一个视频中， 我们讨论了 生产系统中运算放大器稳定性 可能产生的问题类型， 以及如何在实验室中 识别稳定性问题。 本视频 将通过 相补角迭代接近率分析 来简要介绍 波特图 和基础稳定性理论。 继续观看 本视频系列之前， 必须要透彻 理解这些概念。 请确保您已完成运算放大器带宽 1 到 3 的讲座和问题部分， 然后再 继续学习。 本幻灯片来自 运算放大器带宽视频第 1 部。 其中展示了 适用于极点的等式， 以及波特图上的 相关幅度 和相位响应。 在极点频率 fp 后， 极点会造成 幅度响应斜率 每十倍频下降 -20 dB。 极点还会导致 相位响应出现 -90° 相移， 从 fp 约前十倍频处开始， 在 fp 后约十倍频处结束。 在 fp 处时， 幅度响应 将已降低 -3 dB， 且相位 将已位移 -45°。 极点在约 2.5 个 十倍频之间 造成 -90° 总相移， 其中该相移在 fp 前 十倍频处等于 -5.7°， 在 fp 后 十倍频处等于 -84.3°。 本幻灯片同样来自 运算放大器带宽视频第 1 部， 其中展示了 适用于零点的等式 以及波特图上的 相关幅度和相位响应。 在零点频率 fz 后， 零点会造成 幅度响应斜率 每十倍频增加 +20 dB。 零点还会导致 相位响应出现 +90° 相移， 从 fz 前约十倍频开始， 在 fz 后约十倍频处结束。 在 fz 处，幅度响应 增加了 +3 dB， 且相位 位移了 +45°。 零点在约 2.5 个 十倍频之间 造成 +90° 总相移， 其中该相移在 fz 前 十倍频处等于 +5.7°， 在 fz 后 十倍频处等于 +84.3°。 由于现代运算放大器 比较复杂， 因此在进行交流稳定性 分析时 使用直观的运算放大器模型 将很有帮助。 在这个简化的 稳定性模型中， 将应用到输出的 差动电压 传递给放大器 输出级， 然后经过 放大器开环增益， 再经过 开环输出阻抗， 最后到达 输出终端。 开环增益 （或称运算放大器的 Aol） 表示在相应频率下 可为器件输入端 之间的差动电压 应用的 最大增益。 理想放大器的 Aol 是无限的， 且不受频率限制。 现代运算放大器 在低频率情况下的开环增益 可超过 每伏特增加一百万伏特，或 120 dB， 单位增益带宽 从几万赫兹到 数兆赫兹不等。 开环输出阻抗 Zo 是运算放大器 开环输出级阻抗的 一个测量项。 不应将 Zo 与放大器的闭环输出阻抗 Zout 混淆， 后者取决于 Zo、Aol 和电路配置。 为保证在本视频系列 中进行稳定性分析时 重点关注 基础概念， Zo 行为将被视为 所有相关频率中的 电阻器。 实际上，Zo 可能因 较新的轨到轨输出级频率 而有所差异， 这加大了稳定性分析难度。 在扎实地理解分析 形成电阻输出阻抗之后， 本视频系列 最后的提高环节 将讨论复杂的 输出阻抗问题。 为控制现代放大器的 大开环增益， 需要在放大器 输出端 和反相输入端之间 建立负反馈。 这称为 封闭环路。 在此电路中， 环路使用 Rf 和 R1 来封闭， 从而创建了 分压器， 进而造成输出端和 反相输入端之间出现衰减。 电阻器的比率决定了 反馈回 输入端的输出量， 这被定义为 电路的反馈因数， 或称 β。 封闭环路会 造成闭环增益 Acl， 其值等于 Aol/（1 + Aol × β）。 Aol 和 β 之积 为环路增益。 当开环增益很大时， 闭环增益公式可以 简化为 等于 1/β。 本例中，1/β 等于 1 + Rf/R1， 可视为 非反相放大器 电路的增益。 通过负反馈的 闭环增益 是放大器电路设计中的 一项基础概念， 应该 透彻掌握。 我们再快速回顾一下。 放大器会调整输出 以使其与两个输入保持均衡， 从而在其中 建立虚短路。 因此，从输出到 输入的衰减 由 β 设定， 通过反转 β 使输出 大于输入。 这便是 反馈电阻器的比率 设置 电路闭环增益的方式。 现在我们 使用数学和图表法 来继续了解 和确定稳定性条件。 首先，我们必须确定 放大器何时不稳定。 回顾一下 运算放大器闭环增益等式， 我们记得 Acl 等于 Aol/（1 + 环路增益）。 仔细观察一下，我们会发现， 如果环路增益等于 -1， 那么 Acl 等式的 分母 等于 0， 因此 Acl 无法 定义。 这就是不稳定性的 数学定义。 在实际电路中怎么 会发生这种情况呢？ 在频率中的某些点处， 环路增益会等于 0 db，即 等于每伏特增加 1 伏特。 如果将足够延迟 引入反馈路径， 则反馈网络 中的相位 会相对 于 Vn 位移 180°。 180° 相移 等于 输入反相，即 -1。 因此，当环路增益 等于 0 db 且相移 180°，结果便是 是环路增益等于 -1。 术语相补角是用来 确定此种情况下 电路的闭合程度。 相补角是指 环路增益等于 0 dB 时所在频率下的 环路增益相位。 比如，10° 相补角 是指 在环路增益 等于 0 dB 的频率处 环路增益位移了 170°。 您可以发现，环路增益 是稳定性分析的 关键部分。 我们怎样观察环路增益呢？ 首先，我们可以 使用波特图 来考虑环路增益幅度。 还是 使用先前的电路， 增益为 每伏特增加 10 伏特（即 20 dB）。 所以 1/β 在 各频率下稳定为 20 dB。 此处还显示了电路的 Aol。 如要获得 环路增益的幅度， 我们 只需用 Aol 减去 1/β。 这可能 看起来不够直观， 但幻灯片右侧 显示的数学关系 可通过对数特性 证明其正确性。 请记住， 在最后一张幻灯片中我们说过， 相补角是指环路增益 等于 0 dB 时所在频率下的 环路增益相位。 此时的频率 称为 fc， 即环路闭合时的频率。 这也是 Aol 和 1/β 相交 时的频率， 这一点也很合理， 因为两个等值的 差为 0。 要测量相补角， 我们 需要知道 环路增益相位， 即 Aol 相位乘以 β。 还是 使用之前的对数特性， 我们只需从 Aol 相位 减去 1/β 相位， 来求出 环路增益相位。 本例中，将电容器 添加到 运算放大器电路的反馈网络。 在直流情况下， 电容器打开， 所以闭环增益为 每伏特增加 10 伏特，与之前的电路一样。 在一些较高的 频率下， 电容器会 导致 R1 和 C1 的联合阻抗降低， 因此电路增益 每十倍频增加 +20 dB。 这可从 1/β 表中的 0 点看出。 在相位方面，1/β 相位 增加 90° 会造成环路增益相位 降低 90°。 因此相补角 变得很小， 只有 5°。 现在我们已经知道 如何观察相补角， 现在回顾一下实际获得的信息。 请记住，我们希望 避免环路增益 等于 -1 的情况。 这表示 我们在 fc 增加了 180° 相移， 即 0° 相补角。 为实现最佳稳定性， 我们使用一条经验法则， 根据该法则， 相补角需为 45° 或更大。 尽管电路可以在 相补角小于 45° 时工作， 但这仅被 视为临界性稳定， 并且会表现出 明显的过冲和振铃。 还需记住， 在产品的使用寿命内， 器件会由于 流程变化、 温度、 组件值容差和其他波动 而具有不同特征。 因此，为确保 设计可靠， 您应满足 相补角最小为 45° 的 最低要求。 除了直接测量 每个电路的相补角 来确认稳定性之外， 还可以使用另一种 更简单的分析方法， 而这种方法还可实际提供 有关电路 稳定性问题 成因的更多信息。 这种方法 称为接近率分析法。 要使用 此方法， 我们只需要考虑 Aol 和 1/β 的幅度图。 这些图表基于 传递函数中的 极点和零点， 可以表示明确斜率。 通过分析 Aol 和 1/β 在两者相交时的频率 fc 处的接近率， 我们可以快速 确定电路的稳定性。 此方法的规则 是 fc 处 接近率必须 等于 20 dB，从而实现最佳稳定性。 我们再次使用 之前的电路示例， 即运算放大器反相输入端 设有一个电容器。 该电容器会在 1/β 中 产生一个 0 点， 从而使 1/β 以 每十倍频 20 dB 的斜率 增长。 根据 运算放大器的主极点， 运算放大器的 Aol 曲线 以每十倍频 20 dB 的斜率下降。 当两者相交于 fc 时， 接近率等于 Aol 斜率减 1/β 斜率 后的绝对值， 即为 40 dB。 由于接近率 大于 20 dB， 我们可得出电路 不稳定的结论， 这与之前测得的较差 相补角结果相符。 除了检查快速且简单， 接近率方法 还可提供 关于电路不稳定成因的 更多信息。 正如我们预期，在本例中 Aol 的斜率 体现出了 运算放大器主极点的 作用。 不过，1/β 的 上升表明 反馈网络中存在一个零点。 因此，我们可以 采取步骤以对其进行补偿。 测量相补角 并不能为稳定性问题的成因 提供此类深层信息， 只能用于发现 是否存在稳定性问题。 接近率方法之所以有效， 是因为 Aol 斜率 和 1/β 斜率 与电路中的极点和零点 具有很好的相关性。 接近率为 20 dB 意味着电路 仅受一个 极点的净影响， 说明相补角 至少为 45°， 且电路未获得最佳稳定性。 现在，我们 使用接近率 方法来分析 之前的讲座中讨论的 标准非反相放大器电路。 在本例中，1/β 平坦 不包含 先前示例中出现的 0 点。 和之前一样， Aol 仍然以每十倍频 -20 dB 的斜率下降， 因此接近率 现在为 20 dB。 我们可得出的 结论是， 此电路稳定， 并且相补角 将大于 45°。 正如先前幻灯片所示， 接近率 和相补角直接相关， 因此我们可以根据 一方数值预测另一方。 此幻灯片展示了 接近率 及其对应相补角的 三种不同示例。 在第一个示例中， 接近率 为每十倍频 20 dB。 因此电路 稳定， 并且相补角 将在 45-90° 之间。 这是电路设计的 最佳情况。 在第二个示例中，1/β 在 fc 时 恰好为 0。 在 fc 时， 接近率开始变化 并将在 每十倍频 20-40 dB 之间。 这种情况下对应的相补角 约为 45°。 请记住，零点会 造成 90° 总相移， 其中零点频率处相移 恰好为 45°。 因此，环路增益相位 将从 Aol 主极点 产生 90° 相移， 其中在 1/β 在 fc 时的 0 点处发生 45° 相移。 这导致 相补角为 45°。 在最后一个示例中， 1/β 恰好在 fc 之前出现 0 点， 因此接近率为 每十倍频 40 dB。 所以相补角 介于 0-45°， 说明 电路不稳定。 我们应避免这种情况。 总而言之，本视频讨论了 一些基础概念 和运算放大器稳定性理论， 包括回顾波特图、 相补角 和接近率分析。 敬请关注 后续视频， 其中将介绍仿真 运算放大器稳定性 和 SPICE 相关理论。 感谢您的观看。 请尝试完成测验以 检查您对本视频 内容的理解。

Description

March 23, 2015

This is the second of seven videos in the TI Precision Labs – Op Amps curriculum that addresses operational amplifier stability. In the previous training, we discussed the types of issues that op amp stability can cause in production systems as well as how to identify issues in the lab.

This video will provide a brief review of Bode plots and basic stability theory using phase margin and rate of closure analysis. It is important to thoroughly understand these concepts before proceeding with the video series. Please be sure you’ve completed the lectures and problem sections for Op-Amp Bandwidth one through three before proceeding.

After watching the video, reinforce your learning with the following bonus content: