FPGA & Hardware Accelerated Trading, Part Six What Does The Future Hold?

Tue, 27 Nov 2012 10:33:00 GMT

This is final article in our six-part series looking at the usage of FPGAs and other types of hardware acceleration in the financial trading ecosystem.

To round off this series, we asked the same question to ten experts from vendor firms that specialise in FPGA technology deployed in financial markets: “Where do you see the future of FPGA and hardware acceleration in financial trading?”

The answers that came back were revelatory. As well as some common themes, such as OpenCL playing a greater role in FPGA application development, increased usage of FPGAs at the switching level, and wider deployment of FPGAs in the execution management data flow (versus market data flow), there were some unexpected predictions too. But you’ll have to read the rest of the article to find out what they were!

Here are the responses in full.

Laurent de Barry, Co-Founder, Enyx (www.enyx.fr): "FPGA Technologies are widely used today in the financial world and are available in different forms to be useful to multiple participants:

Firstly, structured off-the-shelf IP blocks are available for major investment banks or hedge funds that wish to build their own systems. Then, complete turnkey FPGA solutions are deployed as products or managed services enabling the access to ultra low latency market data normalization or order execution. Finally, the use of new technologies such as Altera OpenCL or architecture embedding floating point co-processors allows all the players to build their own trading engines with impressive latencies by staying in the FPGA space.

The next challenge for FPGA computing is not to concentrate all the features of the trading industry within one single chip, but to offer multiple standardized and distributed systems. The trading decisions will benefit from high quality deterministic Feed Handlers and customized trading signals performing low latency index or basket calculation running on FPGAs to generate orders to the exchange. Another FPGA application will then seamlessly apply the usual pre-trade risk rules to those outgoing orders.

Achieving all of this will bring trading technologies to a point where the solutions will be at their best performance in term of latency, throughput and quality, as well as optimized in term of power consumption and footprint. The Future of FPGA is its integration in a well-balanced mix of software and hardware smartly designed to achieve performance while maintaining features to upgrade legacy systems.”

Brian Durwood, CEO, Impulse Accelerated Technologies (www.impulseaccelerated.com): “Unless legislation comes in to make it illegal, we see the world wide spread of hardware based acceleration in financial trading continuing. Doesn’t matter if it’s 1-Gbps, 10- or 40-… the one with the first decision can make money. Whether FPGAs continue to play a central role depends on the extension of other hardware options into configurations that offer multiple streaming processes. It does not appear central to the engineering of GPUs to do so, and CPUs do not appear to have a roadmap for hardwired logic (vs. O/S run logic). So, we think FPGAs will continue to play an irreplaceable role, closest to the wire, in financial trading for the foreseeable future.

Trends? Youtube drives the banks? - We think we see the growth in unstructured data fueling new rounds of scalable, virtually disposable (i.e. as new FPGAs emerge yearly) acceleration cards. These may be the building blocks of the future.

Switches and Stacks – There seem to be some opportunities for acceleration in hardware more specifically designed around placing FPGAs intelligently in co-located trading sites, i.e. consolidated with existing bank trading hardware and/or specifically designed to nudge the FPGA as close to the wire as possible.

Trading vs. Compliance – Trading appliances are the single shotgun slingers of the hardware world. Low requirements for memory, just the ability to beat out all the other trading appliances. Compliance is an evolving (and some might say moving) target that will encompass more memory and off chip I/O requirements. We see these driving different hardware. Trading should drive the FPGA enabled switches. Compliance may drive the 10 Gbps, PCIe cards or their descendents.”

Matt Dangerfield, CTO, Fixnetix Ltd (www.fixnetix.com): “Without a doubt in my mind, FPGA appliances will be the sole future platform for Execution Management System activities for equities (and other asset classes) to perform pre-risk checks, control & connectivity. As FPGA appliances allow for complex rules to be applied (on a flexible basis via a software command & control system) before any trading event enters a market venue, the trade cycle of “pre/at/post” will move using FPGA appliances to “pre”. The “at & post” will no longer exist as we currently see them.

FPGA appliances will be used in the future to provide real-time settlement, guaranteed Best Bid/Offer market data streams (uniquely identifying market data by the use of complex VLAN tagging) as well as near to real-time counterpart risk control for clearing firms.”

Matt Hurd, Founder, Zeptonics (www.zeptonics.com): “Around 75% of the latency in our Layer 2 switching device is attributable to the SERDES function on the FPGA. In order for a vendor like us to break the magic 100ns wire-to-wire barrier for our switching device, the FPGA manufacturers need to improve their SERDES performance significantly, and various manufacturers are doing so.

Beyond the SERDES aspect, I think we'll see other improvements in FPGA architecture that will impact trading. For example, Achronix are using a different type of logic on the chip to get a clock rate that might be 2 or 3 times faster than the main vendors' current generation of FPGAs, but it involves other trade-offs.

As for other trends, I think better tools will arrive to make it easier for trading devs to work with FPGAs, which are notoriously difficult to program. Alternatively, a non-FPGA solution could emerge with similar latencies. If you imagine a low-latency network interconnect to a CPU or NPU with timings similar to an FPGA's SERDES, that could open up an easier to program ecosystem for a broad range of applications.

Looking further into the trading future, I expect a radical re-architecting of exchange access. If an exchange were to lease you computational power rather than network connections, you would approach the trading challenge in a different way."

Ron Huizen, VP Technology, Bittware (www.bittware.com): “While FPGAs are currently riding the low latency wave, we see them moving into many more spaces than just those driven by the battle for lowest latency. The determinism, and ability to maintain this determinism while dealing with multiple network connections at line rate, makes this an ideal technology for financial systems. As this market's technologists gain more knowledge in FPGAs, creative minds will find innovative ways to apply the strengths of FPGAs to places we haven't even thought of yet.

Advances in making FPGAs more accessible, such as Altera's initiative in OpenCL, will open the doors to allowing software developers to program the algorithmic parts of the FPGA, while leaving the underlying framework, such as memory controllers, network stacks, and PCIe engines, to the FPGA gurus. This will let appliance and IP vendors, or internal FPGA teams, develop systems where the users can more easily add their own secret sauce.

Finally, the huge parallel processing power of FPGAs will see them being applied to analytics, whether this be in terms of FPGA farms for large scale processing, or on-the-fly analytics applied at the network connection. OpenCL can play a large role in this, allowing users to easily move systems designed for GPUs and x86 into FPGAs where appropriate. While we don't see FPGAs taking over all GPU and CPU processing systems, there is certainly a place for all three technologies, as they all have their strengths and weaknesses.”

Troels Gert Nielsen, CEO at Fiberblaze A/S (www.fiberblaze.com): “We see that customers increasingly focus on FPGA based order execution acceleration - and not only market data acceleration. In the last 1-2 years, low latency traders have focused a lot on using FPGAs for market data acceleration. That market is today well established with a large demand and a large supply of increasingly commoditized FPGA solutions.

Now customers have realized that instead of narrowly focusing on shaving less and less time off their market data supply latency, there is much to be gained from shaving microseconds off their order execution, thereby adding significant value to their daily P/L statement.

On the hardware side, obviously the new Virtex7 series cards will dominate the next year or so, together with the existing Stratix5 based Altera cards.”

Casper Hassoe Nielsen, CEO, Velocytech (www.velocytech.com): “Gartner predicts that ‘Chips are becoming commodity – IP is the driver’. Here at Velocytech we see the same market trend. Leading high frequency trading firms are all looking for optimization of their latency and they know that it is not enough to be working on the software level. To be among the fastest in the industry it is crucial to implement IP Cores on the hardware level. Processing data at the speed of light is the goal.

In the past years everybody wanted FPGAs, but unfortunately a lot of firms were struggling with the configurations of FPGAs and ended up losing precious time and seeing their competitors winning the game. Basically the FPGA is a good platform, but the effort often proves to be too complex for a customer to handle without expert involvement, compared to the gain. However FPGAs follow Moore’s Law and we see that they get bigger and bigger over time, which will make them more attractive as it will actually be possible to apply whole business critical applications on them.

In the future customers will all be looking for a complete plug-and-play framework including all relevant building blocks; hardware, software, API, test and maintenance. Being in the center of this transition from software based solutions to a hardware focus, it is important to be ready to invest in a complete system to minimize risk. Here at Velocytech we have seen customers wanting to do the implementation themselves, ending up losing precious months, and then coming back in the end, to ask us to set up the whole system for them. They realize that this saves both time and money.”

Robert Walker, CTO, xCelor (www.x-celor.com): “This year we’ve seen some very interesting changes in the landscape of FPGA which have opened up entire new categories of application to FPGA. Traditionally, we started out with FPGA on the NIC card – a great place for putting logic such as market data feed parsing. xCelor started here with our MFH, as did most of the competition. With the announcement of the 7124FX switch from Arista, it’s now possible to put logic on a switch. Of course, all data needs to cross a switch when it enters or leaves your cabinet, or travels inter-server in a co-lo location. Some applications can really benefit if you can perform actions on the data as it’s making that mandatory switch. Anything that could benefit from data transformation (a good example is normalizing market data, or filtering down a feed) or inspection with/without manipulation (for example risk checking) is a great application for the switch. It’s got to cross the switch anyway, so if you can work on it while it’s doing that it’s a win-win. Especially if you can switch in the FPGA faster than the Fulcrum itself can – may as well put that saved time to good use.

The switch opens some other exciting doors: sometimes you know what you’re going to want to do in certain circumstances; under certain market conditions. What if we could prime orders on the switch to be triggered when certain market conditions arise? A simple example: “Send this buy order when the price of MSFT drops below 27.42”. Imagine if you could program this into the switch: you could go from tick-to-trade in nanoseconds, without even fully entering your cabinet! This is exciting stuff and it will be reality very soon!”

Terry Stratoudakis, Executive Director, Wall Street FPGA (www.wallstreetfpga.com): We see the use of FPGAs in financial trading growing to more applications beyond risk checking and market data. Behind the scenes, FPGAs are typically a key player in other applications such as latency monitoring.

The financial services industry as a whole needs time to learn more about hardware acceleration. Other industries such as defense have had FPGA design teams for over 10-15 years. Financial services technology managers know software and infrastructure really well. Their knowledge of FPGA design and how to manage those kinds of projects is still in an early phase. Future decisions such as “buy vs. build,” “high level synthesis vs. low-level tools” will be based on the current projects. Tools and hardware are becoming cheaper and easier to use which will aid in this effort. It will indeed be very interesting to see things as they develop.”

Yves Charles, CEO, NovaSparks (www.novasparks.com): “We believe people are about to enter a new race – not a race to zero, but a race to build a deterministic and scalable market data infrastructure.

Today, Market Data Managers are held hostage to infrastructures that cannot keep a low latency profile while adding venues and connection points. The struggle, seen every day by Market Data Managers, is to process and distribute market data to multiple consumers at the same microsecond speeds regardless of market bursts, the number of venues, and the number of distribution points.

Many times, Market Data Managers implement direct feeds in a 1:1 pairing with the most demanding clients. But the explosion of low latency needs makes the 1:1 pairing of feeds and clients untenable. Most enterprises need to simultaneously feed dozens (even hundreds) of servers including: surveillance risk systems, historical tick databases and back up servers. On top of all of this, they continue to experience ‘bursty markets’, a trend that is expected to continue with the increasing number of automated trading programs.

Recently, Market Data managers threw more CPUs at the problem. They constructed multi-threaded programs, and tried to off load the CPUs. But now, there is a type of recapitulation happening in the market. The market is turning to new architectures, such as pure FPGA architectures to re-invent the market data infrastructure. The FPGA architectures of tomorrow offer a highly parallelized approach to processing market data. This enables a deterministic latency infrastructure.

Deterministic latency, (keeping the same speeds regardless of data rates, number of venues or distribution points) is the new goal for Market Data Managers. And it gives the Market Data Managers the ability to offer guaranteed service levels to their users. Most importantly, the new FPGA architectures gives the algo trader a dependable ultra-low latency reaction time to changing market signals, under all market conditions.

The future is not just about speed. The future is a deterministic and scalable Market Data Infrastructure to guarantee service levels and meet the evolving needs of a purely automated trading community.”

So there you have it. A peek into the future from ten FPGA experts. Do you agree with their predictions? Do you have any of your own? If so we would love to hear them, so please do let us know your thoughts in the comments section below.

MikeO, your series on “FPGA & Hardware Accelerated Trading” was interesting yet I don’t see any comments. I wonder why?

My comments are from an FPGA developer’s perspective rather then from a vendor selling solutions to the HFT space. As a long time electrical engineer I've been involved with FPGA technology for the last couple decades both as a designer, contractor, and Xilinx FAE. I've helped FPGAs work their way into many different application spaces... wireless, automotive, military, video, etc., and in the last couple years have followed them into this HFT space.

As I read about FPGAs in HFT related articles, group posts, blogs, etc., I can kind of tell who really has had experience with them and who hasn’t. For example, when I hear, “FPGAs being notoriously difficult to program”, I suspect that’s coming from someone with a software perspective. When I hear Terry Stratoudakis say, “Their [Financial technology managers] knowledge of FPGA design and how to manage those kinds of projects is still in an early phase”, I suspect he knows what he’s talking about.

The technical difficulty with FPGAs is solvable. I’ve helped many seasoned FPGA designers with FPGA challenges such as timing closure, constraints, build times, configuration, tool/IP issues, etc. Compounded together these challenges can stretch a project beyond expectations resulting in no or low ROI. However many HFT firms never really get to this ‘solvable’ point because they face another barrier unique to the HFT space. This barrier is root cause whereas the FPGA difficulties are a symptom.

Cisco uses FPGAs successfully in switches, Motorola/NSN uses FPGAs successfully in base stations, Northrup uses FPGAs successfully in military missiles. These are engineering geared companies with double-E’s and engineering processes and mindsets. A typical HFT firm has zero hardware development experience nor a single double-E. They simply don’t know what they don’t know, and unable to comprehend ‘engineering’, which in essence creates an invisible barrier. They buy FPGA technology, hire a designer, yet try to manage it all with their existing, non-engineering methods.

Buying FPGA technology without ‘engineering’ is like buying a bullet without the gun. Those firms who are successful with FPGAs have figured out how to comprehend and embrace ‘engineering’, they made what I’ll call a necessary paradigm adjustment within their organization and methods. The others will own FPGA technology but get out-engineered every step of the way (without ever knowing it). They’ll mistakenly conclude FPGAs are difficult.

For whatever reason I’ve never seen this perspective mentioned in HFT related articles, posts, or blogs. However, meet with a group of FPGA designers who were laid off from HFT firms, or left out of frustration, and this is precisely what you’ll hear.

Good to get your perspective on this. It is indeed very true that the mantra "FPGAs are very difficult to program/work with" etc is one I heard again and again when I was interviewing people for this series.

But another recurring theme I encountered was that you're not going to get the best out of any FPGA implementation without adopting engineering disciplines and deploying skilled engineers. Maybe I could have highlighted that aspect more.

I do think more and more HFT firms (certainly the more successful ones) are embracing FPGA engineering and starting to reap the rewards, but there is indeed a steep learning curve in many organizations.