The invention provides a system of generation of multi-channel analog output signals, from a single analog input signal, and the controlled activation of peripheral devices responsive to the multi-channel analog output signals. A single-channel to multi-channel analog-to-analog converter is provided...http://www.google.ca/patents/US7570183?utm_source=gb-gplus-sharePatent US7570183 - System of multi-channel analog signal generation and controlled activation of multiple peripheral devices

The invention provides a system of generation of multi-channel analog output signals, from a single analog input signal, and the controlled activation of peripheral devices responsive to the multi-channel analog output signals. A single-channel to multi-channel analog-to-analog converter is provided to convert the single analog input signal to multiple output channels. Uni-directional coupling is used for coupling and mixing the multi-channel outputs and transferring the mixed outputs to a data buss. Signals on the data buss are used to drive the multiple peripheral devices.

Images(13)

Claims(20)

1. A system for controlling a group of peripheral devices responsive to variation of a single-channel analog input signal within a range, said system comprising:

a single-channel to multi-channel analog-to-analog signal converter for converting said single-channel analog input signal to a plurality of analog signals, said range being partitioned into a plurality of sub-ranges, said analog-to-analog signal converter comprising:

a plurality of sub-range signal generators, each of said plurality of sub-range signal generators being responsive to said analog input signal within a sub-range of the plurality of sub-ranges to generate a sub-range analog signal,

a data bus having a plurality of bus lines, each of the bus lines being operatively connected to each one peripheral device of the group of peripheral devices for controlling operation thereof, and

a unidirectional coupling unit, said uni-directional coupling unit operatively transmitting each of said plurality of sub-range analog signals to at least one of a plurality of bus lines of the data bus and inhibiting any feedback from said bus being transmitted to said analog-to-analog signal converter.

2. The system of claim 1, wherein said each sub-range signal generator comprises a first circuit path and a second circuit path, said first circuit path being responsive to said analog input signal within the sub-range and becoming gradually fully conducting in response to increase of said analog input signal in the sub-range, the second circuit path being responsive to said analog input signal within the sub-range and gradually inhibiting the first circuit path from being conducting in response to increase of said analog input signal in the sub-range, said first circuit path and said second circuit path cooperating to generate said sub-range analog signal in said sub-range.

3. The system of claim 2, wherein said first circuit path comprises a first bipolar junction transistor circuit configured to operate in linear and switching modes and said second circuit path comprises a second bipolar junction transistor circuit configured to operate in linear and switching modes, said second bipolar junction transistor circuit providing a shunting path of forward biasing current of said first bipolar junction transistor circuit for turning off said first bipolar junction transistor circuit when said second bipolar junction transistor circuit becomes conducting.

4. The system of claim 3, wherein said first and second bipolar junction transistor circuits further comprise circuit elements for adjusting a first profile of said sub-range analog signal and overlap of said first profile with a second profile of a neighboring sub-range.

5. The system of claim 4, wherein said circuit elements include resistors and diodes.

6. The system of claim 2, wherein said first circuit path comprises a first op-amp circuit configured to operate in linear and switching modes and a second op-amp circuit configured to operate in linear and switching modes, said second op-amp circuit being electrically coupled to the second circuit path to control state of said second op-amp.

7. The system of claim 2, wherein said first circuit path comprises a first logic gate and a second logic gate coupled to said first logic gate, said second logic gate being electrically coupled to the second circuit path to control state of said second logic gate.

8. The system of claim 2, wherein the peripheral devices further include a white color light emitting diode (“LED”) and said data bus includes a bus line for driving said white color LED.

9. The system of claim 2, further comprising a second analog-to-analog converter and a second selector circuit, said second selector circuit being responsive to a selection control signal for selecting one of said analog-to-analog converter and said second analog-to-analog converter for providing said plurality of analog signals to said data bus.

10. The system of claim 2, further comprising an overflow circuit, said overflow circuit extracting a portion of a power supply voltage in excess of a reference voltage as said analog input signal and providing a regulated supply voltage to the system, said regulated supply voltage being lower than said power supply voltage.

11. The system of claim 1, wherein said analog-to-analog signal converter comprises a light source and a plurality of light detectors, each of said plurality of light detectors corresponding to one of said plurality of sub-ranges, detection of light from said light source by said each light detector producing said sub-range analog signal, said plurality of light detectors being spaced from each other, said light source being movable relative to said plurality of light detectors, and said relative movement being responsive to said analog input signal.

12. The system of claim 1, wherein said analog-to-analog signal converter comprises a first magnetic coupling element and a plurality of secondary magnetic coupling elements, each of said plurality of secondary magnetic coupling elements corresponding to one of said plurality of sub-ranges, said plurality of secondary magnetic coupling elements being spaced from each other and from said first magnetic coupling element, said first magnetic coupling element being movable relative to said plurality of secondary magnetic coupling elements, said relative movement being responsive to said analog input signal, and variation of coupling between said first magnetic coupling element and said each secondary magnetic coupling element producing said sub-range analog signal.

13. The system of claim 1, wherein said uni-directional coupling unit comprises a plurality of diodes, each of said plurality of diodes coupling an output terminal of said each of said plurality of sub-range signal generators to at least one of said bus lines.

14. The system of claim 13, wherein an output terminal of at least one of said plurality of sub-range signal generators is connected to at least two of said plurality of diodes, each of said least two diodes being connected to one of said bus lines.

15. The system of claim 1, wherein said uni-directional coupling unit comprises a plurality of photo-electric couplers, each of said plurality of photo-electric couplers coupling an output terminal of said each of said plurality of sub-range signal generators to at least one of said bus lines.

16. The system of claim 15, wherein an output terminal of at least one of said plurality of sub-range signal generators is connected to at least two of said plurality of photo-electric couplers, each of said least two photo-electric couplers being connected to one of said bus lines.

17. The system of claim 1, wherein the peripheral devices include light emitting elements of three distinct colors, said data bus includes three bus lines, each bus line for driving light emitting elements of one of said three distinct colors.

18. The system of claim 17, wherein said light emitting elements are light emitting diodes and said distinct colors are red, green and blue, respectively.

19. The system of claim 1, further comprising a driver circuit disposed between said data bus and said group of peripheral devices, said driver circuit being configured to drive said group of peripheral devices responsive to said sub-range analog signals on said data bus.

20. The system of claim 19, wherein said driver circuit is configured to be responsive to a control signal for decoupling said group of peripheral devices from said data bus.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims priority from U.S. Provisional Patent Application No. 60/927,122 filed on May 27, 2007 the content of which is hereby incorporated by reference.

FIELD OF INVENTION

The invention relates generally to the field of controlling multiple devices. In particular, the invention relates to a system of generation of multi-channel analog output signals, from a single analog input signal, and controlled activation of multiple peripheral devices responsive to the multi-channel analog output signals.

BACKGROUND OF INVENTION

Currently, digital technologies are widely used in information and communication applications. While digital representation of information may provide improved precision, human sensory functions are believed to be fundamentally analog in nature. Frequently, information, although represented in digital form, is communicated to human users in analog form. For example, it is routine to digitize an image but present the image on a display device, with digitized signal strength converted to brightness of a light emitting element of the display device.

As is generally known, digitized signals are typically represented in discrete elements, such as bits. The relative range and resolution of a signal that can be represented in digital form are limited by the number of bits used to represent signal strength. Increasing the number of bits increases the range and resolution of the signal that can be represented in digital format. However, demand on data storage, data transmission and data generation also increases as more bits are used. Simply increasing the number of bits therefore may impose an unacceptable burden on energy consumption, data processing capability, and requirements on data transmission bandwidth and data storage.

SUMMARY OF INVENTION

Briefly, the invention relates to a system that generates multi-channel analog output signals from a single analog input signal. The invention also relates to controlled activation of multiple peripheral devices responsive to multi-channel analog output signals so generated. The system includes a single-channel to multi-channel analog-to-analog conversion engine, a uni-directional coupling unit that provides a uni-directional coupling of output signals of the conversion engine to a multi-channel data bus but inhibits any feedback of information from the data bus, and a drive module that interfaces the signals on the data bus to the peripheral devices to achieve controlled activation of the peripheral devices responsive to signals on the data bus.

In a first aspect of the invention, there is provided a system for controlling a group of peripheral devices responsive to variation of a single analog input signal within a range. The system includes a single-channel to multi-channel analog-to-analog signal converter for converting the single-channel analog input signal to a plurality of analog signals, the range being partitioned into a plurality of sub-ranges, a data bus having a plurality of bus lines, each of the bus lines being operatively connected to one peripheral device of the group of peripheral devices for controlling operation thereof; and a uni-directional coupling unit, the uni-directional coupling unit operatively transmitting each of the plurality of sub-range analog signals to at least one of a plurality of bus lines of the data bus and inhibiting any feedback from the bus being transmitted to the analog-to-analog signal converter. The analog-to-analog signal converter has a plurality of sub-range signal generators, each of the plurality of sub-range signal generators being responsive to the analog input signal within a sub-range of the plurality of sub-ranges to generate a sub-range analog signal.

In a feature of this aspect of the invention, each sub-range signal generator comprises a first circuit path and a second circuit path. The first circuit path is responsive to the analog input signal within the sub-range and becomes gradually fully conducting in response to increase of the analog input signal in the sub-range. The second circuit path is responsive to the analog input signal within the sub-range and gradually inhibits the first circuit path from being conducting in response to increase of the analog input signal in the sub-range. The first circuit path and the second circuit path cooperate to generate the sub-range analog signal in the sub-range.

In another feature, the analog-to-analog signal converter comprises a light source and a plurality of light detectors. Each of the plurality of light detectors corresponds to one of the plurality of sub-ranges. Detection of light from the light source by the each light detector produces the sub-range analog signal. The plurality of light detectors are spaced from each other, the light source is movable relative to the plurality of light detectors, and the relative movement is responsive to the analog input signal.

In yet another feature, the analog-to-analog signal converter comprises a first magnetic coupling element and a plurality of secondary magnetic coupling elements, each of the plurality of secondary magnetic coupling elements corresponding to one of the plurality of sub-ranges, the plurality of secondary magnetic coupling elements being spaced from each other and from the first magnetic coupling element, the first magnetic coupling element being movable relative to the plurality of secondary magnetic coupling elements, the relative movement being responsive to the analog input signal, and variation of coupling between the first magnetic coupling element and the each secondary magnetic coupling element producing the sub-range analog signal.

In another feature, the uni-directional coupling unit comprises a plurality of diodes, each of the plurality of diodes coupling an output terminal of one of the plurality of sub-range signal generators to at least one of the bus lines.

In yet another feature, the uni-directional coupling unit comprises a plurality of photo-electric couplers, each of the plurality of photo-electric couplers coupling an output terminal of the each of the plurality of sub-range signal generators to at least one of the bus lines.

In other aspects the invention provides various combinations and subsets of the aspects described above.

BRIEF DESCRIPTION OF DRAWINGS

For the purposes of description, but not of limitation, the foregoing and other aspects of the invention are explained in greater detail with reference to the accompanying drawings, in which:

FIG. 1 is a block diagram illustrating components of a system according to an embodiment of the present invention;

FIG. 2 illustrates an input analog signal within its range of variation and multiple analog output signals generated from the input analog signal;

FIG. 3A, 3B and 3C are schematic diagrams illustrating ways to divide a voltage range into different sub-ranges;

FIGS. 4A through 4C are schematic diagrams illustrating three different ways of constructing a sub-range signal generator;

FIGS. 5A through 5D are schematic diagrams illustrating some possible connections to couple an analog-to-analog signal converter to a data bus;

FIG. 6 illustrates schematically a gate/interface component constructed from transistors for driving three LEDs using signals on three bus lines;

FIG. 7 is a schematic diagram showing a complete system as an alternative embodiment to that shown in FIG. 1;

FIG. 8 shows an alternative construction of an analog-to-analog signal converter that can be used in the system described herein, two embodiments of which are illustrated in FIG. 1 and FIG. 6; and

FIG. 9 shows yet another alternative construction of an analog-to-analog signal converter that can be used in the system described herein, two embodiments of which are illustrated in FIG. 1 and FIG. 6.

DETAILED DESCRIPTION OF EMBODIMENTS

The description which follows and the embodiments described therein are provided by way of illustration of an example, or examples, of particular embodiments of the principles of the present invention. These examples are provided for the purposes of explanation, and not limitation, of those principles and of the invention. In the description which follows, like parts are marked throughout the specification and the drawings with the same respective reference numerals.

FIG. 1 illustrates schematically components of a system according to an embodiment of the present invention. As shown in FIG. 1, the system 100 has an input module 102. The input module receives as input a single-channel analog signal. The single-channel analog signal is then processed by a single-channel to multi-channel analog-to-analog signal converter 104 to convert the single-channel analog signal to multiple analog signals. The analog-to-analog signal converter 104 has multiple output channels. Each of the multiple output channels corresponds to one of the multiple output analog signals. The output analog signals may be electric current, for example. They may also be variations in electric voltage, as an increase or decrease from a neutral value. Or, they may be intensity of light beams. A uni-directional coupling unit 106 between the analog,-to-analog signal converter 104 and an analog data bus 108 transmits the multi-channel analog signals to the analog data bus 108 but inhibits any feedback from the data bus 108 to the analog-to-analog signal converter 104. This provides a one-way coupling between the data bus 108 and the analog-to-analog signal converter 104. Conveniently, the uni-directional coupling unit 106 may also combine the multi-channel analog signals from different channels in different mixing arrangements prior to transmitting the mixed signals to the data bus 108. Operation or activation of the peripheral devices (not shown in FIG. 1) is controlled by signals supplied by each bus line of the data bus 108. An optional gate/interface component 110 may be disposed between data bus 108 and peripheral devices to enable the information, i.e., signals on the data bus 108, to be utilized by a wide range of peripheral devices.

In one embodiment, the input analog signal is a voltage value of an input source. Conveniently, this input analog signal can be supplied to the system through a power supply wire. An optional DC (direct current) overflow circuit 112 is provided that is coupled to both the analog-to-analog signal converter 104 and the input module 102. The overflow circuit 112 passes power supply voltage to the analog-to-analog signal converter 104 to power its operation. The overflow unit 112 also allows a margin voltage extracted from supply voltage, namely a portion of the supply voltage in excess of the system's internal regulated voltage, to be used as input, thereby allowing a single wire control and powering of the entire device or system. The internal regulated voltage is lower than the supply voltage and is used as a reference voltage for the overflow unit 112 to extract the margin voltage.

As described above, the input module 102 accepts as input a single-channel analog signal. Input is generally an analog, continuous signal. The input signal may be continuous voltage or current signal representing (i.e., converted from) a variety of monitored signals, such as temperature, speed, relative position, ambient brightness, or applied force. The input signal also may be stepped or a composition of signals, represented in a cumulated analog form, such as an accumulated unit number from a production line. The input also may be a manually adjustable electric voltage or current. The analog signal may take the form of alternating current (AC), direct current (DC), value of a variable resistor (VR), or as a photoelectric input (PE), just to name a few examples. Conveniently, converters to convert one type of input signal, such as temperature, sound or speed, to another type of signal, such as electric current or voltage, can be provided in the input module 102.

The single-channel analog signal varies within a range, between a minimum and a maximum value. The range can be partitioned into a number of sub-ranges, the union of all sub-ranges being the range of the analog signal. Each of the sub-ranges overlaps with its neighbors, though it is understood that at either end of the range a sub-range has only one and therefore can only overlap with one neighbor. FIG. 2 illustrates a single channel signal VIN varying linearly within a range 200. Range 200 is partitioned into sub-ranges R1 (202), R2 (204), R3 (206), R4 (208), . . . , RN (210), N being the total number of sub-ranges, which can be any integer number. Each sub-range can be any value, as required by the application. These sub-ranges each overlap with their respective neighboring sub-ranges. For example, the sub-range R2 overlaps with both its neighbor R1 at its lower end (lower overlap region 212) and R3 at its upper end (upper overlap region 214).

As VIN varies within the range 200, the system 100 generates, as an intermediate step, a multiplicity of output analog signals namely V1, V2, V3, V4, . . . , VN. Corresponding to the sub-ranges. In other words, the system 100 maps an analog input (VIN) in a single channel to outputs of multiple channels (V1, V2, V3, V4, . . . , VN). The mapping is typically continuous. Each output analog signal is mapped from the variation of VIN within its corresponding sub-range R1 (202), R2 (204), R3 (206), R4 (208), . . . , RN (210), to V1, V2, . . . , VN, as VIN increases from a lower bound of a sub-range to an upper bound of the sub-range. The variation of Vi in its corresponding sub-range Vi defines a wave form 216. For example, as VIN increases, the output signal 216 corresponding to a sub-range Vi increases gradually from its initial value (for example, zero) in an up-take region 218 until it reaches a peak value. The output signal 216 may remain generally constant in a portion of the sub-range as VIN continues its increase (thereby forming a peak region 220) and then decreases gradually, generally back to (but not necessarily) its initial value (forming a decay region 222). The up-take region 218, peak region 220 and decay region 222 together form a profile of the output signal, or “wave form” of the output signal. The durations of each of up-take region 218, peak region 220 and decay region 222 are adjustable, as will be described later in more detail in examples provided below. For example, up-take region 218 may have a duration longer than the decay region, or vice versa. The increase in the up-take region 218 and the decrease in the decay region do not need to be linear, and can take any shape, or even with reflection points, as long as the general trend remains generally increasing or decreasing. Similarly, the peak region 220 may have any duration and may be absent (zero duration) and is not necessarily flat.

One example of output analog signals is illustrated in FIG. 2. Output signals illustrated in FIG. 2 all have an approximate trapezoidal wave form 216. As the input sweeps through its own range 200, each of the output channels in its corresponding sub-range Vi also generates a corresponding output analog signal. As illustrated in FIG. 2, the up-take region 218 of one wave in one channel overlaps with the decay region 222 of the wave of the previous channel. The overlap of the up-take and decay regions of neighboring sub-ranges (or neighboring channels) leads to a smooth transition of signals from one channel to the next in a transition region. A transition region is the portion of neighboring sub-ranges where they overlap. In addition to partial overlap, there also can be complete overlap, i.e., simultaneous turning on of multiple channels. Similarly, as VIN increases from its lower bound to its upper bound, an output channel may be responsive to VIN in more than one sub-ranges and generate more than one wave form 216. FIG. 2 shows two such simultaneous “ON” signals, 216′, 216″, in channels V2 and V3, with two wave forms in each channel.

The output analog signals are generated by the analog-to-analog signal converter 104. Conveniently, the analog-to-analog signal converter (or the input module itself) partitions the input range 200 into multiple sub-ranges. FIGS. 3A, 3B and 3C provide three examples of partitioning a voltage range. As will be appreciated, there are numerous methods to partition (or, where there is no overlapping, to divide) a voltage range or current range into a selected number of sub-ranges. FIG. 3A illustrates schematically a method of dividing a voltage range into multiple sub-ranges using a series of diodes DA, DB, DC, DE etc. with voltage outputs at nodes VA, VB, VC, VD etc. FIG. 3B provides another example, in which sub-ranges determined by diodes DA and DB are further divided using voltage dividers consisting of two resistors each, thus providing narrower sub-ranges with voltage outputs at nodes VA, V′A, VB, V′B, VC, VD etc. It should be noted that while two resistors are shown, a voltage divider consisting of resistors may use any number of resistors. FIG. 3C illustrates another example of voltage dividers consisting of two rails of diodes, each rail being connected in series. Voltage output at VI and voltage output at VJ are adjustable by varying values of resistors connecting the respective voltage outputs to different diode rails, thereby providing even more refined voltage differences between voltage outputs VI and VJ.

Conveniently, the analog-to-analog signal converter 104 provides a sub-range signal generator 400 for each sub-range. The waveform within each sub-range is determined by the construction of the corresponding sub-range signal generator 400. The width and position of a sub-range can be further fine tuned by adjusting component properties of circuit components employed in the corresponding sub-range signal generator 400.

Referring to FIG. 4A, there is illustrated schematically a sub-range signal generator 400 constructed from bipolar junction transistors and resistors. The sub-range signal generator 400 shown in FIG. 4A comprises two NPN bipolar junction transistors T1 and T2. The base of each bipolar junction transistor is connected through a current limiting resistor R1, R2 to the output of voltage divider. The voltage divider provides a reference voltage such as VA or VB. If the sub-range signal generator 400 is connected to VA and VB of a sub-range divider shown in FIG. 3A, the voltage difference between the connectors VA and VB of sub-range signal generator 400 is approximately the voltage drop across diode DA, or approximately 0.6V. If the sub-range signal generator 400 is connected to VA and V′A of a sub-range divider shown in FIG. 3B, the voltage difference between the connectors VA and VB of sub-range signal generator 400 is a fraction of the voltage drop across diode DA, i.e., less than 0.6V. For the purpose of illustrating the operation of the sub-range signal generator 400, the following description assumes that transistors T1 and T2 are connected to a sub-range divider as shown in FIG. 3A.

Each of the transistors T1, T2 is part of a circuit path in the sub-range signal generator 400. The first circuit path 402 comprises transistor T1 and its base current limiting resistor R1. The base current limiting resistor RI is connected to sub-range output VA, i.e., directly to the input voltage, VIN. The second circuit path 404 comprises transistor T2 and its base current limiting resistor R2. The base current limiting resistor R2 is connected to sub-range output VB, i.e., at a level approximately 0.6V lower than VA. The first circuit path 402 drives the load resistor RL, supplying the current source for the signal at the resistor RL. The second circuit path 404 is a shunting path to ramp off the first circuit path 402 and therefore may also be regarded as a self-shunting circuit path.

Referring to FIG. 4A and FIG. 3A, the operation of sub-range signal generator 400 is now described in further detail. As the input voltage, VN, increases from 0, transistor T1 becomes forward biased. This provides a biasing current to enable T1 to first operate in its linear amplification region. This allows a collector current of transistor T1 to flow through load resistor RL and produce an output voltage signal VOUT proportional to the biasing current. This current flowing through RL and T1 increases monotonically in the linear amplification region of T1 up to a desired high point determined by the value of Resistor R1, i.e., the circuit path is in the pulled on state, at which point the current flowing through T1 reaches a plateau. This forms the up-take region of the waveform 216.

The bipolar junction transistor T1 may remain in the high state for some range of values of the input, thereby forming the peak region 220. Meanwhile, as input voltage continues its increase, VB will start to increase and will eventually overcome the voltage drop across diode DA and provide a forward biasing for the second transistor T2. This represents the on-set of ramping off of the first circuit path 402. As the input continues to increase, the collector current of T2 will increase. However, any current flowing through the collector of T2 shunts the current flowing into the base of transistor T1, thus gradually returning T1 from its maximally conducting state to its linear region, until T2 becomes maximally conducting. Thus, as the current through T2 increases, the current through T1 decreases. This forms the decay region of the waveform 216 and completes the output waveform shown in FIG. 2.

In other words, while transistor T1 in the first circuit path 402 provides pull-on of signal, i.e., current in RL, transistor T2 in the second circuit path 404 provides a self-shunt, pull off of the first circuit path 402. The on-set of pull-on determines the lower bound of the sub-range. The complete pull off effected by the ramping on of the second circuit path 404 determines the upper bound of the sub-range. The delayed ramping on of the second circuit path 404 cooperates with the pull on of the first circuit path 402 to produce a desired profile of the output waveform. Both the width and the position of the sub-range are affected by the sub-range voltage outputs at, for example, VA, VB, and by values of the base resistors, R1 and R2, and therefore can be adjusted by adjusting characteristic values of these circuit elements. For further adjustment, emitter resistors may also be added to each of the transistors to fine tune the range and overlap. It will be appreciated that adjusting the profile in one sub-range also changes the overlap with profiles of neighboring sub-ranges when the profiles of the neighboring sub-ranges remain the same.

As described above, each sub-range has a corresponding sub-range signal generator 400. Referring to FIG. 3A, the difference between voltage outputs VB and VC, namely, a voltage drop across diode DB, corresponds to another sub-range. Another sub-range signal generator 400′ (not shown in FIG. 1; but see FIG. 7) is connected to voltage outputs VB and VC. As bipolar junction transistor T2 in the sub-range signal generator 400, connected between VA and VB, starts to shunt current, signal in the next sub-range, a sub-range defined by VB and VC, is activated in that transistor T1′ of converter 400′ starts to allow current to flow, following the profile of an up-take region 218 of an output waveform, until it reaches its peak. As input voltage continues to increase, T1′ will be ramped off by its corresponding second circuit path in the converter 400′ in a decay region 222. Meanwhile, the output signal of the next sub-range will start its up-take growth. This process will repeat for each sub-range as the input value continues to increase, as illustrated in FIG. 2 and described earlier.

The combination of the voltage divider portion and the series of sub-range signal generators 400 forms an analog, self-shunting DC voltage/current ladder. The ladder can be of any length. In other words, range 200 of input signal can be of any value and can be partitioned into any number of sub-ranges. As the input varies from its minimum to its maximum, a wave having the wave form 216 transitions from the lowest step, namely the lowest sub-range, progressively, to the top of the ladder, namely the highest sub-range.

As will be appreciated, voltage dividers may be conveniently formed using resistors, or any other suitable means, not necessarily diodes. For example, a voltage divider consisting of only resistors can be used to replace the string of diodes in FIG. 3A. Any number of resistors can be used in such a resistor divider ladder. Such a resistor ladder can provide finer voltage drops at each step of the ladder. Similarly, although a sub-range generator 400 shown in FIG. 4A provides a circuit example using discrete transistors, other devices, such as linear gates, logic diode gates, comparators, among others, may replace the transistors circuitry for constructing the single-channel to multi-channel analog-to-analog converter. FIG. 4B shows an example, in which the voltage divider 410 is formed from resistors connected in series and the conversion of input analog signal in each sub-range is provided by two op-amps 1A, 1B connected in cascade. In this example, the first op-amp 1A and in second op-amp 1B cooperate to provide ramp-on and the second op-amp 1B and an op-amp 2A of the next sub-range provide ramp-off. Consider the case where VIN is initiallly at zero, which sets the negative terminal 414 of the first op-amp 1A at level “L”. The resistor ladder is configured to set each sub-range at 0.1V, though it will be understood that each sub-range (or sub-range generator) can be configured to have any value (for example, several volts or more if necessary or a few millivolts or less if required). The positive terminal 412 of the first op-amp 1A is at 0.1V, a voltage supplied by the voltage divider 410. Consequently, the output terminal 416 of the first op-amp 1A is at level “H”, so is the positive terminal 418 of the second op-amp 1B, which is electrically connected to and at the same level as the output terminal 416 of the first op-amp 1A. The negative terminal 420 of the first op-amp 1B is also electrically coupled to and at the same level as the output terminal of the second op-amp 2A, which is also at “H”. Consequently, the output terminal 422 of the second op-amp is initially at “H”. As VIN increases and exceeds 0.1V, the first output terminal 416 is first set to “L” which subsequently toggles the output level of second op-amp 1B and sets the second output terminal 422 to “L”. As VIN continues to increase, but still remains smaller than the 0.2V, the second op-amp 2A the level at the second output terminal 422 remains at “L”. When VIN exceeds 0.2V, the second op-amp 2A is switched to “L”, which causes the second op-amp 1B to switch off the first channel and returns the output at the second output terminal 422 to “H”. The resistors R1A and R1B connected between the output and negative terminals of the op-amps 1A, 1B, respectively are to configure the op-amps 1A and 1B to operate also in the linear region, in addition to being able to switch between “H” and “L” levels. In another embodiment, a sub-range signal generator 400 is constructed from logic gates. FIG. 4C provides such an example. The operation of the signal generator constructed from logic gates is similar to that shown in FIG. 4B, described above. In FIG. 4C an input signal is presented as a current flowing a chain of diodes 431. Voltage is dropped across each diode 431. Thus, for a fixed input signal, the voltage at nodes 433 increases as one moves from node 433A toward node 433E. The voltage at each node 433 also depends on the input signal. Outputs 435 are each driven by a circuit 436 made up of NAND logic gates 437 and 438. Consider the case where the input signal increases over time from a small valve. Resistors 439A and 439B divide the voltage difference between the output of gate 437 and node 433A at node 440, which is connected to both inputs of gate 437. The output of gate 437 is initially high (since the voltage at node 433A is initially low). The output of gate 437 connects to one input 442A of gate 438. The other input 442B of gate 438 is connected to the output of a voltage divider made up of resistors 443A and 443B. Therefore, the output of gate 438 is initially high. As the input signal increases, the voltage presented at input 442B increases to a point at which the output of gate 438 begins to decrease. As the input signed continues to rise, the voltage rises at the inputs to gate 437 until eventually the output of gate 437 begins to go low. When this occurs, the output of gate 438 begins to go high again. This same pattern occurs for each of circuit 436 but is shifted to occur at different ranges of current of the input signal.

The output signals of all sub-range signal Generators 400 form the outputs of the analog-to-analog signal converter 104, each sub-range corresponding to a unique channel. Referring to FIG. 1, the multi-channel outputs of the analog-to-analog signal converter 104 are transmitted to data bus 108 through a uni-directional coupling unit 106. The uni-directional coupling unit 106 allows signals (i.e., information) from the analog-to-analog signal converter 104 to be coupled to the data bus 108 but does not permit electric signals on data bus 108 to be communicated back to the analog-to-analog signal converter 104. In one embodiment, the uni-directional coupling unit 106 comprises a diode array 500. Information at the output of the analog-to-analog signal converter is communicated to data bus 108 via the diode array 500. Because of the uni-directional characteristics of diodes, no information from data bus 108 is transmitted back to the analog-to-analog signal converter 104.3

FIG. 5A illustrates one arrangement, where output from each channel is coupled to a single bus line, i.e., one of bus lines L1, L2 and L3 of the data bus 108. Similarly, information from a single output channel can be coupled to multiple bus lines of the data bus 108, for driving multiple peripheral devices each connected to a bus line. When a signal from each bus line drives a color LED, sending a signal from one output channel to multiple bus lines can provide color mixing. FIG. 5B illustrates an arrangement, in which output VM is coupled to more than one bus line, thereby driving more than one device, which can be used for color light mixing. The example in FIG. 5B shows a coupling to two bus lines L1 and L2. FIG. 5C illustrates an arrangement in which output VN is coupled to three bus lines L1, L2 and L4. On the other hand, signals from different output channels can be combined and transmitted to a single bus line, so that the peripheral device connected to that bus line is driven by a composite signal mixed from more than one output channel. For example, in the example shown in FIG. 5B, output VM is combined with signal from output V1 at bus line L1, and a signal from output V2 at bus line L2.

FIG. 5D provides another example. The embodiment illustrated in FIG. 5D has more output channels than bus lines, or more output channels than peripheral devices. As shown in FIG. 5D, there are three bus lines, each for connecting to a light emitting diode (LED) of a distinct color. These bus lines are labeled R for red color, G for green color and B for blue color. Signals Vout1, Vout2, and Vout3 are each connected, through diodes D1, D2 and D3, to one of R, G, B bus lines, respectively. Signal Vout4 is transmitted to both R and G bus lines, through diodes D4 and D4′, respectively, thereby providing a mixing of Vout4 with signal Vout1 at R bus line and a mixing of Vout4 with signal Vout2 at G bus line. Similarly, signal Vout5 is transmitted to all three R, G and B bus lines, through diodes D5, D5′ and D5″, respectively, thereby providing a mixing of Vout5 with signal Vout1at R bus line, a mixing of Vout5 with signal Vout2 at G bus line, and a mixing of Vout5 with Vout3 at B bus line. Similar or other manners of connecting to the data bus 108, namely to its bus lines R, G or B or any combinations of the bus lines, may be made for other output signals from other output channels.

The selection of diodes and connection to different bus lines depends on the designation of each individual output channel For example, in the example illustrated in FIG. 5D, Vout4 is designated as R/B mixing, i.e., mixing of R and B signals. Two diodes are provided, each connecting the R/B channel to one of R and B data lines, respectively. Similarly, Vout5 is designated as R/G/B mixing. Three diodes are provided, to connect output of the R/G/B channel to each one of R, G and B bus lines, respectively. Resistors may be used, for example, connected in series with the diodes, to control mixing ratios. It will be understood that in other applications, an output channel may represent a mixing of more than three signals in these situations. More than three diodes therefore may be necessary in these situations to connect an output channel to the data bus, each diode coupling the output channel to one of these bus lines.

FIG. 5D also shows an additional output channel, Vout6, that is coupled to the R bus line only. This provides a return to the initial color as an input signal varies from its minimum to its maximum. As a signal on each of the bus lines varies from a minimum (typically zero) to a peak and then back to the minimum, brightness of R, G, B lights, such as LEDs, packaged in a lighting unit housing, also vary accordingly. As the input value varies from the minimum to the maximum, the color of light emitted from the lighting unit changes continuously from, for example, red to green and then to blue, covering all colors in the spectrum from the red light when the input value is the smallest, to the blue color when the input value is the largest. The connection of the final output channel to the R bus line allows the LEDs, starting from red, transitioning to other colors as the input analog signal varies from its minimum to maximum, to return to red, the initial color.

As another example, a further “white” data bus line LW may be provided, for coupling to signal Vw that is generated when the input has a value between that to generate VOUT5 and VOUT6. A signal on the bus line LW controls a white color LED. Thus, when VIN increases within its range, the color of light varies from red to green, from green to blue from blue to white and then back to red. Other methods of providing white light also may be used to generate this color sequence. For example, “white” may be generated by mixing suitable amounts of red, green and blue colors. Empirically, it is found that a R:G:B ratio of 30:59:11 produces an acceptable “white” color as perceived by human eyes (“perceived white”).

These diodes, D1, D2, D3, D4, D4′, D5, D5′, D5″, D6 etc. form a diode array 500. This diode array 500 provides a one-way isolation between output channels of the analog-to-analog signal converter 104 and the data bus 108. The uni-directionality here is provided by diodes in the diode array. The uni-directionality allows DC information to pass through and to be transmitted to the data bus 108 but does not allow any feedback from the data bus 108 to be transmitted back to the analog-to-analog signal converter 104. As will be appreciated, coupling elements other than diodes may be used for providing the one-way coupling. Examples of uni-directional coupling units that use other coupling elements possessing uni-directionality are provided below.

The provision of the data bus 108 helps streamlining the passing of information from the analog-to-analog signal converter 104 to control peripheral devices. In the embodiment shown in FIG. 5D, there are only three peripheral devices, i.e., red, blue and green colored LEDs. Each color has its own corresponding bus line, namely one of R, G, and B bus lines. Both splitting of signals from channels representing mixed colors and mixing of outputs from different channels are facilitated by the data bus 108. Signals on each bus line are passed directly to these colore LEDs. As will be described below, data bus 108 may also be operatively connected to these peripheral devices through a gate/interface module, which enables the system to drive an increased range of peripheral devices.

Although LED arrays are used in these examples to illustrate the output characteristics, the signals on these bus lines can be used to drive other peripheral devices, not necessarily an LED array. For example, the LED examples provided herein illustrate the lighting of LEDs driven by the resulting drive currents. These same currents may also be used to drive a multitude of motors, provided the driver circuitry supplies sufficient current. The motors may be used to manipulate (or control) motion of a robot, for example. These currents also can be used to control operation of peripheral devices requiring input of more than one phase, such as multi-phased currents or voltages. For example, the multi-channel output signals may be conveniently used as the output of a single phase to multi-phase converter for driving a multi-phase motor, using a single phase alternating current input. Alternatively, each output channel may also drive an analog/digital converter thereby interfacing the system with a digitally driven device, or devices. In general, driver circuitry may be provided to convert signals on the data bus to drive current or voltage loads.

Optionally, a gate/interface component 110 is provided between data bus 108 and peripheral devices as the driver circuitry, to enable the information, i.e., signals on the data bus 108, to be utilized by a wide range of peripheral devices. In one embodiment shown in FIG. 6, the gate/interface component 110 has individual bipolar junction transistors TR1, TR2, TG1, TG2, TB1, TB2, for driving each one of the output phases, namely, each one of the R, G and B LEDs. The gate/interface component 110 also includes a bipolar junction transistor that is used to gate the entire drive circuitry. The example in FIG. 6 shows two groups of bipolar junction transistors, with opposite output polarities. The first group comprises three transistors TR1, TG1, and TB1, and the second group comprises transistors TR2, TG2, TB2. The on/off of the entire drive circuitry is controlled by a “high” gate transistor TH, for gating the first group of transistors, and a “low” gate transistor TL for gating the second group of transistors, each of the gate transistors being controlled by the signal on a control bus line C.

Conveniently, for certain applications, it is desirable to use a single wire to supply voltage to the system as the power source and to the input module as input signal. This may be, for example, an application where three colored LEDs are used to indicate the voltage of a power supply by changing emitted colors. A DC overflow circuit 112 extracts any excess voltage above a nominal (i.e., internal regulation) voltage of the system and provides this “overflow” to the input module 102 as an input signal. This is illustrated in FIG. 7. The overflow circuit 112 includes diodes DX, DY, . . . DZ connected in series to provide a voltage drop to bring the supply voltage VS down to the expected range of input voltage VIN. A protective diode D couples the supply voltage VS to the circuitry of the system 100′, to supply power at V+. An internal voltage regulator (not shown) stabilizes the voltage powering the system 100′ at V+.

Referring to FIG. 7, a complete system 100′ according to an embodiment of the invention is illustrated with representative circuits shown for each of the components. This is an application for driving brightness of three individual lights, though it will be understood that more lights can be added easily or the circuit arrangement can be easily modified to drive other types of output devices. One common arrangement is to drive Red (R), Green (G) and Blue (B) LEDs, packaged in a single lighting unit 702. Alternatively, the same circuit arrangement can be used to drive grayscale lamps and UV or I/R lamps. Grayscale lamps may be “cold white” (i.e., with a relatively stronger contribution from higher spectrum end, or with less red component than a typical “perceived white”), “perceived white”, or “warm white”, respectively. The input to the system 100′ can be taken either from a variable resistor connected between V+ and the ground, or driven by the power supply voltage through a voltage overflow circuit 112, as described above. As the input value varies from the minimum to the maximum, the color of light emitted from the lighting unit 702 changes continuously from, for example, blue to green and then to red, covering all colors in the spectrum from a blue light when the input value is the smallest, to a red color when the input value is the largest.

In FIG. 7, only two sub-range signal generators 400 are shown in detail. In combination, a series of diodes and the corresponding analog-to-analog converters form a static, analog, self shunting DC voltage/current ladder 704. As described before, a number of diodes, connected in series, partitions the entire input range into a plurality of sub-ranges, each about 0.6V. The width and end points of each sub-range can be further fine tuned by, for example, selecting values of resistors employed in the analog-to-analog converter 104. Each level of the ladder 704 corresponds to an output channel. Each channel generates an output signal that generally has a single peak, as that shown in FIG. 2. The up-take region 218 of a channel, i.e., a sub-range, overlaps with the decay region 222 of a previous channel, so that as the input signal increases gradually, the overlap provides a smooth transition from the previous channel to the now activated channel. Similarly, the decay region 222 overlaps with the up-take region 218 of the next channel. As the output of the present channel fades out, the overlap between the up-take region of the present channel and the up-take region of the next channel provides a smooth transition to the next channel. Preferably, the combined output signal strength from neighboring channels adds up to 100% so that when the lighting unit transitions from one color to the other, there is no perceivable change in light intensity.

Output of each channel is coupled to a bus line through a diode in the uni-directional coupling unit 106. The diodes for coupling each output channel to the data bus form a diode array 500. As described above, the diode array 500 provides a uni-directional coupling of output signals from sub-range signal generators 400 to the data bus 108 and isolation of any feedback from the data bus 108. In addition, as described above, the diode array 500, with its connections to the data bus 108, also provides mixing of signals from different output channels, for example, a mixing of signals from R/B channel and R channel at the R bus line and a mixing of signals from R/B channel and B channel at the B bus line. Also provided by the diode array 500, with its connections to the data bus 108, is the splitting of signals from a selected output channel for coupling to different bus lines.

Each output phase, i.e., signal from each bus line, has its own drive circuit to drive a peripheral device, in this case, a colored LED. The LED array 706, comprising LED diodes DB, DG and DR, constitutes the peripheral devices in this example. Each drive circuit works in its linear amplification portion. For example, the output of the blue channel, or signal on the blue bus line7 is coupled to the base of the bipolar junction transistor TB, which in turn amplifies the signal and drives a blue color LED LEDB. The intensity of drive current corresponds to the strength, or value of the output received from the conversion engine. As the signal on the blue bus line reaches its peak, the drive current also reaches its peak, thereby driving the intensity of blue LED to its brightest level. Similarly, LEDs of other colors, namely a green LED LEDG and a red LED LEDR, are driven by their respective drive circuits comprising bipolar junction transistors TG and TR.

To provide further control, a gate circuit comprising a first gating bipolar junction transistor TG1 controls all drive circuits for all channels in the gate/interface component 110. Thus, the transistor TG1, controlled by the control signal, can selectively decouple all peripheral devices from signals on the data bus. The control signal may be supplied through a control bus line (not shown) or any other suitable means. The ability to turn on and off of the entire LED array facilitates use of system 100′ to produce many visual effects, such as strobe lighting effects. Although only one LED is shown for each phase in this example, it will be appreciated that several LEDs can be connected in parallel, if low voltage V+ is used, or in series if high voltage is used, or in any suitable combination of serial and parallel connections, depending on the voltage and current requirement.

Similarly, a gating bipolar junction transistor TG2 is provided to control the entire ladder 704. This allows selective enabling of analog-to-analog converters connected to the uni-directional coupling unit 106. For example, an alternative analog-to-analog converter (not shown) can be connected to the uni-directional coupling unit 106, operation of which enabled through another gating transistor (not shown). Which analog-to-analog converter is enabled therefore depends on which gating transistor is ramped on. The gating transistor TG2 therefore provides a selection function, allowing selection of one of analog-to-analog converters to transmit multi-channel output signals to the data bus.

FIG. 8 illustrates the use of an alternative analog-to-analog converter. This is a photoelectric analog-to-analog converter 800. In this example, a light source 802 is provided, movable along a path, such as an arc 804. A plurality of light detectors 806 are arranged on a base 808, the light detectors being spaced from each other. The base 808 is spaced from the path 804 of the light source 802. Each detector 806 is assigned to a different channel, the output of the detector being the output value of the assigned channel. The light source 802 has a light beam 810 of a limited, yet adjustable, width. The width of light beam 810 is selected such that it does not illuminate all light detectors 806 simultaneously, though it illuminates at least two light detectors 806 simultaneously. Preferably, the width of light beam 810 and the spacing between light detectors 806 are such that the light source 802 can at most illuminate two detectors at the same time. As the light source 802 moves from one end of the arc 804 to the other end, each of the light detectors 806 is first partially illuminated, fully illuminated, partially illuminated, and then not illuminated. A light detector 806 is generally illuminated simultaneously with its closest neighbor during at least a part of the partial illumination period. The output values of the channel corresponding to the light detector 806 then follow the profiles like that shown in FIG. 2. Adjusting positioning of light detectors 806 relative to each other, relative to light source 802 and relative to the width of light beam 810 allows one to adjust the profiles of signals of each sub-range and the overlapping of these profiles. Alternatively, the width of light beam 810 can be adjusted for this purpose. In addition, while electrical signal at detector 806 may be forwarded to multiple bus lines of data bus 108, multiple light detectors 108 may also be arranged at the same location, each detector being coupled to a single bus line. When these light detectors at the same location are illuminated, signals can be passed to all data bus lines connected to these detectors which provides an alternative method of activating multi-phased arrangements simultaneously.

The output values from this conversion engine can be delivered to the analog data bus 108 and to drive the multi-channel drive module, namely a gate/interface component 110, in the same manner as described above. In this example, the input is relative position of the light source 802 in reference to each of the light detectors arranged on the base 808. As will be appreciated, any relative motion between the light source and the base can be used to vary the input signal and therefore generate the multi-channel output signals. The relative position can be varied manually, using a dial, or driven by the variation of another input signal, such as temperature or voltage of a power supply. The variation of relative position also can be achieved by moving the base 808 relative to a fixed light source 802. Light detectors 806 also may be arranged on a wheel and the rotation of the wheel relative to the fixed light source may be utilized for converting an analog signal to a multi-channel analog output signals. An input signal can be utilized to drive a stepper motor (not shown) to rotate the wheel, thereby driving the generation of multi-channel analog output signals.

It will be appreciated that conversion from a single-channel analog signal can be achieved in many different ways, not restricted to examples provided herein. Some further examples are provided below, for illustration. For example, magnetic coupling based on magnetic induction may be utilized. A magnet may be used as a primary coupling element and a number of coils may be used as secondary coupling elements. In response to motion of the magnet in the vicinity of the coils, current may be generated in these coils as output signals. Similarly, a primary coil can be used as a primary coupling element. A plurality of secondary coils can be arranged in a manner similar to that of light detectors illustrated in FIG. 8. As the primary coil with electric current flowing therein is moved relative to the plurality of secondary coils, induced currents in the secondary coils form the multi-channel outputs.

As also will be appreciated, the uni-directional coupling unit is not required to use diodes. Other uni-directional couplers can be used. For example, in one alternative embodiment, photo-electric coupling is used. This is illustrated in FIG. 9. As shown in FIG. 9, a photoelectric coupler 900 comprising a light detector in the nature of a photosensitive transistor 904 and a light emitting element 902, such as a white or infrared LED, replaces a diode in diode array 500. The light emitting element 902 is driven by the output signal from the analog-to-analog converter 104. Each photosensitive transistor 904 is connected to data bus 108. While light emitted from the light emitting element 902 transmits the output signal from analog-to-analog converter 104 to the light detector, no signal from data bus 108 can be transmitted back to the light emitting element 902 by the photosensitive transistor 904.

Various embodiments of the invention have now been described in detail. Those skilled in the art will appreciate that numerous modifications, adaptations and variations may be made to the embodiments without departing from the scope of the invention. Since changes in and or additions to the above-described best mode may be made without departing from the nature, spirit or scope of the invention, the invention is not to be limited to those details but only by the appended claims.