Toshiba make single-electron transistor breakthrough

Toshiba has revealed that it has developed a single-electron transistor (SET) circuit of the type essential for future hybrid circuits combining quantum SET devices with conventional electronic devices.

While small scale and experimental, Toshiba’s fully functional SET circuit is said to meet essential requirements: room-temperature operation, a non-volatile memory function that supports intelligent self-learning and self-development, and ultra-low power operation.

Progress in large-scale integration has seen the capabilities of powerful desktops miniaturised into more powerful handheld PCs, but now it is edging towards its physical limits.

According to a statement from Toshiba, once the circuit design rule moves into the sub-100 nanometer region then present device technologies will begin to fail, and current leakage in transistors will become a persistent problem.

SET is believed to offer a solution at the quantum level, through the precise control of a small number of individual electrons.

SET operates by injecting or ejecting a single electron into or from a dot of silicon, so producing a change in electronic potential. That change must overcome thermal agitation, making optimised smallness of the dot essential for SET operation at a finite temperature.

Toshiba says it has succeeded in fabricating nanometer-scale dots by treating a silicon surface with alkaline-based solutions. Experiments with ultra-thin silicon on an insulator has confirmed the ability to achieve a cluster of nanometer-scale dots, which was used to fabricate single-electron transistors that operate even at room temperature.

In addition to realising an essential fabrication for SET, the work at Toshiba has also achieved the desired memory function, as the circuit can store an electron in the valleys of electronic potential.

The SET fabrication process is believed to be fully compatible with that of conventional CMOSFET. Toshiba says it has successfully realised a hybrid system of SET and CMOSFET on a single chip, providing confirmation of the functionality of the chip’s simple circuit, its memory operation and of operation based on the information stored in the device.