Cadence attacks design challenges with software updates, new DSP

May 04, 2016 //
By Christoph Hammerschmidt

At the opportunity of its user congress CDN Live Europe, EDA software vendor Cadence introduced a new DSP of its Tensilica family along with new versions of its OrCAD and Allegro Design automation software. The Tensilica Vision P6 aims at vision and deep learning applications for a broad range of industries including automotive and robotics. The software helps engineers across the electronics industry to cut design cycles – in the case of OrCAD with specific focus on flex and rigid-flex PCBs.

In his keynote speech at CDN Live, Cadence Senior Vice President Tom Beckley compared the complexity of technology in former times and now: The spaceship Challenger that in 1986 exploded shortly after takeoff used some 500.000 lines of software code. The multitude of computers in an average vehicle of our days run more than 100 million lines of codes. This example shows how complexity has increased over the past 30 years. Nevertheless, the introduction of innovative technologies such as machine vision, deep learning and the massive deployment of sensors associated with the Internet of Things will bring electronics and software to an unseen level of complexity. “Deep learning really explodes”, Beckley said. “In my 35 years (of career as an engineer) I have never seen so many opportunities for software and sensors”, he said. “But one thing hasn’t changed: Our obligation as engineers to advance technology in a safe way”, to rule out a new disaster as the Challenger explosion.

From this consideration is certainly just a small step to Cadence’s product innovations introduced at the event. After all, the new software versions certainly facilitate handling the complexity of upcoming designs - with more and more PCB layers, increasing combinations of rigid and flex PCBs and these PCBs populated by more heterogeneous component types.

The new Allegro 17.2-2016 version features comprehensive in-design inter-layer checking technology that minimizes design-check-redesign iterations and a new dynamic concurrent team design capability that accelerates product creation time by up to 50 percent. At the same time, the software supports the utilization of inlay fabrication techniques that allow designers to reduce material costs by up to 25 percent. In addition, the use of embedded Sigrity package technology ensures critical signals meet performance criteria and power integrity for PCB designers.