The 2009 International Conference on Field-Programmable Technology (FTP 2009), University of New South Wales Sydney, Australia, 9-11 December 2009. In Proceedings of the IEEE International Conference on FieId-Programmable Technology, 2009, p. 475-476 How to Cite?

The goal of this PhD project is to develop an automatic method of system architecture synthesis for general high-performance applications on FPGA-based reconfigurable computers. Through our previous research, we have built a theoretical model targeting the scheduling problem with first-order hardware constraints. And a list scheduling algorithm is developed to achieve near-optimal performances. Currently, we are working on the low-level implementation. A systolic architecture is used, and the list scheduling algorithm will be extended to take into account constraints deriving from exact hardware architecture. (Abstract by, IEEE)

Description

In Proceedings of the IEEE International Conference on FieId-Programmable Technology, 2009, p. 475-476

The 2009 International Conference on Field-Programmable Technology (FTP 2009), University of New South Wales Sydney, Australia, 9-11 December 2009. In Proceedings of the IEEE International Conference on FieId-Programmable Technology, 2009, p. 475-476

en_HK

dc.identifier.isbn

978-1-4244-4377-2

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dc.identifier.uri

http://hdl.handle.net/10722/129739

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dc.description

In Proceedings of the IEEE International Conference on FieId-Programmable Technology, 2009, p. 475-476

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dc.description.abstract

The goal of this PhD project is to develop an automatic method of system architecture synthesis for general high-performance applications on FPGA-based reconfigurable computers. Through our previous research, we have built a theoretical model targeting the scheduling problem with first-order hardware constraints. And a list scheduling algorithm is developed to achieve near-optimal performances. Currently, we are working on the low-level implementation. A systolic architecture is used, and the list scheduling algorithm will be extended to take into account constraints deriving from exact hardware architecture. (Abstract by, IEEE)

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dc.language

eng

en_US

dc.publisher

IEEE, Computer Society.

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dc.relation.ispartof

Proceedings of the 2009 International Conference on Field-Programmable Technology, FPT'09

The 2009 International Conference on Field-Programmable Technology (FTP 2009), University of New South Wales Sydney, Australia, 9-11 December 2009. In Proceedings of the IEEE International Conference on FieId-Programmable Technology, 2009, p. 475-476