Samsung takes ARM CPU to 45nm with ARM11 S5P6440

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How many of you know that inside your smartphone right now there is an ARM CPU operating at 65nm, 90nm, or possibly even higher? And even with that older process technology (compared to x86), the power savings of ARM are still enough to make it a most desirable solution for the smartphone market. Samsung is amping up the competition even more with a high-performance, low-power 45nm version, the S5P6440, an ARM11 “application processor”.

The 45nm CPU operates at either 533MHz or 667MHz, has on-chip hardware accelerators to power peripheral devices connected via a 64-bit AXI Bus at 166MHz. This enables a high input/output bandwidth for multi-processing needs by remote peripherals within the ARM core for real-time applications. It also includes advanced NAND-based error correction hardware for MLC NAND devices, which offer greater storage density at a lower cost.

It has an integrated DRAM controller with support for DDR and DDR2, as well as a 2D graphics acceleration hardware, which is compliant with the popular OpenVG API. It includes support for transparency effects, anti-aliasing and vector graphics for image scaling without quality loss.

It also has the mobile industry processor interface (MIPI) display serial interface (DSI) for advanced graphics and display capabilities at low power. It also helps OEMs produce devices with multiple-screens without multi-plexing the complex 2D accelerated graphics unit.

The CPU is a single-core device, though other dual-core and quad-core ARM CPUs will soon be forthcoming. This CPU is due to hit products in 3Q’2009, and is currently shipping in samples to OEMs. It has a 13×13 BGA form factor, with a ball pitch of 0.65mm, making the overall product under 3/4 inch square.

The relative core clock/bus speeds of 533MHz or 667MHz and 166MHz is similar to that which we see today. For example, if scaled to 3.2GHz the bus would be 6x greater, which would be 1GHz, which is commensurate with many system buses on x86 chips today. However, some FSB speeds of higher-end models support 2GHz speeds.

ARM CPUs are so-named for their roots, which date back to 1983 when a company called Acorn Computers Limited, who set out to build an advanced RISC machine (ARM, sometimes called Acorn RISC Machine). They are high performing RISC (Reduced Instruction Set Computing) CPUs which have been licensed to well over 20 companies in 25 years, including Samsung who has released this latest ARM11 45nm S5P6440 device.

Over time their functionality has evolved to meet the needs of the target applications. At present, there are clocked and clockless versions (synchronous and asynchronous), in-order and out-of-order versions, those with small pipelines, those with long pipelines, those which support the Thumb and Thumb-2 instruction sets (which are smaller subsets of core instructions requiring only less memory for code for working in tight blocks, thereby better utilizing cache and simplifying instruction decode), along with all kinds of cache, floating point, SIMD and other extensions.

ARM is a most adaptive design that is still undergoing active research and development, as Samsung’s 45nm application demonstrates. It is the belief of this journalist that ARM will be the CPU which ultimately wins out over x86 for all applications, mobile, netbook, notebook, desktop and server, along with customized parallel support for specialized apps, such as graphics / floating point support.

When ARM releases dual-core and quad-core versions in the near future, the power of this mobile-mostly CPU will be revealed to be sufficient for low-end notebooks. And with SMP support, having two or more of these dual- or quad-core CPUs will provide enough compute abilities or nearly any application.

In my personal opinion, ARM designers and licensees should be working on creating these versions with all vigor, as it will be these low-powered, high-throughput varieties which squeeze x86 out of the low-end, allowing for massively parallel applications to benefit from their relatively high clock speed, low power consumption, allowing for single-unit servers to be comprised of literally hundreds, if not thousands, of ARM CPUs, burying by at least two orders of magnitude the parallel compute capacity of the highest-end x86 or Itanium-based servers available today, and on only marginally higher power over all.