We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Firefox,
Internet Explorer 11,
Safari. Thank you!

Zynq-7000 Fallback to Golden Image (multiboot)

I am implementing and testing a golden image fallback (multiboot) for the Zynq XC7Z020 device. Both the primary and golden images consist of an FSBL+ PL bit file + application. The primary image is located at address 0x0 and the golden image is located at 0x80_0000, both in QSPI flash.

I am testing the following scenarios expecting them to fallback to the golden image:

1) Corrupt image header of the primary image

2) Corrupt FSBL region of the primary image

3) Corrupt PL bit file region of the primary image

4) Corrupt application region of the primary image

These are all valid scenarios that could occur during a firmware update process of the primary image.

I have successfully verified that scenarios 1, 3, and 4 all fallback to the golden image. However, scenario 2 just hangs and never successfully falls back and boots the golden image. I suspect it just hangs because the FSBL is loaded and executed but gets an exception due to it being corrupted.

From reading the documentation (and from my experimentation), it doesn't appear that the bootROM checksums the FSBL region and compares against the FSBL checksum stored in its partition header prior to loading and executing it. Is this true? Is there any way to protect against a corrupted FSBL region?

Re: Zynq-7000 Fallback to Golden Image (multiboot)

RSA authenticaiton is a build option in Bootgen. Refer to UG1283 for instructions on how to generate a bootable image with authentication. Refer to UG821 for how to include RSA in your Zynq 7000 design. The Design Security hub is also a good resource.

-------------------------------------------------------------------------Don’t forget to reply, kudo, and accept as solution.-------------------------------------------------------------------------