TSMC announces that it has basically completed its production at 5nm and started trial production: the area has been reduced by 45% and the performance has been improved by 15%.

2019-04-07 08:02:29 192 ℃

On the 3rd of this month, TSMC announced that it had taken the lead in completing the 5nm architecture design based on EUV extreme ultraviolet lithography (EUV) technology and had entered the trial production stage.

According to official data, compared with 7Nm (the first generation DUV), the new 5nm chip based on Cortex A72 core can provide 1.8 times of logic density and 15% faster speed. The SRAM of the same process is also excellent and the area is reduced. At the same time, TSMC announced that it would provide a complete 5nm design rule manual, SPICE model, process design kit and silicon wafer certified materials, and fully support EDA (Electronic Automation Design Tool).

Earlier this year, TSMC said that 5nm would be mass-produced by the end of 2020. Considering that there is still one and a half years to go, it can be expected.

It is reported that the first generation of 5nm is the second introduction of EUV technology by TSMC, up to 14 layers, while the second generation of 7Nm EUV (expected to be used by Apple A13 and Kirin 985/990 this year) has only four layers. With the withdrawal of GF and Unicom, only Samsung, TSMC and Intel are the only wafer manufacturers that can make 7Nm wafers and more advanced technology at present, but Intel does not compete directly with TSMC, because its wafer factories are in a hurry to meet their own needs, just to ensure that their competitors, AMD, will place heavy orders.