A popular belief holds that it is impossible to fold a sheet of paper in half more than 7 times, possibly due to the difficulty of performing even 6 folds. This belief was debunked by then high school student Britney Gallivan who successfully folded a piece of paper 12 times in "Single Direction Folding".[1] However, some argued that the folder should fold in half, turn 90 degrees, then fold in half again, rather than folding the same way.

The television series MythBusters "busted the myth" of the 7 fold limit by folding taped-together sheets in half and turning 90 degrees each time, for a total of 11 folds. The first eight folds were completed by hand, while the rest were completed using both steam rollers and fork lifts. [2][3] This was accomplished using 17 large rolls of paper taped together to form a very large yet relatively thin "sheet."

Can Gallivan's folding limit equation be applied to a (yet undefined) function to measure the effectiveness of the successful folding of various materials? I would presume that different materials would exhibit different degrees of capacitance, resistance and all those other electricky *tances; different methods of folding (i.e. straight versus halved) may either modify, or be modified by, the material composition.

Meh, not really. Resistors are a consistent material. Conductors require a gap between two pads to generate potential. Inductors require the wrapping of thin wire around the what-cha-ma-callit to function.
If we start talking about diodes and transistors then it gets more technical where + and - materials become involved creation electron channels for current.
Having different folds does not really satisfy any of those components besides the resistor...

That bit they are folding over is ~500 um (half a mm) - that's easily big enough to see with the human eye, and you could probably fold that over if you were careful with a pin or something. This certainly isn't yet small enough to integrate into IC's and stuff. (or at least if you did you would be limited to a few capacitors per IC).
I can see it could possibly be useful for charge pumps on some chips, for example for flash memory erase voltages or LCD drive voltages.
Allowing a few reasonably large value capacitors on the die of a chip could mean pins could be eliminated, which reduces cost. Currently many IC's have pins specially for capacitors which could be eliminated with this. It also reduces external circuitry, reducing total device costs.

Agreed. In this early stage, though, I think the nanotech industry can be permitted momentary macroses of perspective.

However, if the nanotech sector manages to use magnetics or field manipulation in conjunction with a current in order to induce the fold (with some precision), and can keep the pathways (and the requisite etchers) tiny enough to allow the current to pass, successful micronization of both the assemblers, and the resulting constructions, to the nano level [nanoindustries.com] is foreseeable.

The thickness of paper is often measured by the caliper, which is typically given in thousandths of an inch[4]. Paper may be between 0.07 millimetres (0.0028 in) and 0.18 millimetres (0.0071 in) thick[5].

The capacitor they created occupied less than 1 square millimetre, but had a capacity of 1.0 uF. Lacking were specifics on break down voltage and on how long they can hold a charge. The micro-capacitor was tested at 0.6 volts and was bi-polar. This research suggests that 5 Farads per gram is a reasonable figure for super capacitors made with carbon electrodes employing sulfuric acid as the electrolyte. Imagine a cluster of these occupying, say, a cubic inch. That could yield thousands of Farads. If the capacitor can hold a charge for a considerable length of time, this indicates a considerable capacity for storing a charge to power small devices, even laptops.

First of all, it is *micro*, not *nano*-anything -- you can see structures "hundreds of microns" across with your bare eyes!:)

Second, why go into the whole folding business, if it is just a single fold (or small number of folds)? Just etch an airbridge in standard microelectronics process and fill it with electrolyte -- I would expect one could achieve much smaller plate-to-plate distances this way.

So we take a sheet of paper and use a knife to simulate the etching. Now we fill the resulting gap with glue as an electrolyte. The result still doesn't look at all like two papers glued on top of each other to me.

No, you deposit (and pattern and etch) first sheet of metal, then a layer of insulator, then second sheet of metal. There are ways to etch away/remove all or some of insulator from under the second sheet (through patterned holes), forming what some call air-bridges. Then fill the cavity with electrolyte. Put some more insulator on top, rinse, repeat.

I can't find it right now but I'm quite sure I saw something like this 10 years or more ago already on a micromechanics conference. The improvement MIT made is that they used different materials than silicon.

For those of you who have been staring at Nanosystems pgs 400-401 for the last 17 years you may still recognize that this is not true molecular nanotechnology, nor will it be until we set our minds to the task. It is fallacy to believe we have to build up to the gold ring -- we should simply go for it!