This kit is good candidate to have complete all-in-one system for applications like data aquisition systems with friendly front-panel UI, industrial and home automation, sensor processing, high-speed data processing and web-controlled systems. There are various Linux and Android packages supported on ALTERA’s HPS section, allowing quick development of high-level applications boosted with FPGA performance and flexibility. High-speed bridge interface between HPS and FPGA capable of multi-gigabit speeds and has transparent memory mapping.

For reference, we have used and reviewed also few other Terasic boards, such as DE-nano.

Hardware overview

Terasic DE1-SoC have medium size, very similar to older DE1 and has nice acrylic protection screen on top, to avoid metal objects or bare wires which may fall on the board cause major disasters. Handy for average engineering table mess. Bottom side not protected, but lifted of the surface with brass standoffs.

FPGA chip itself is large FBGA device, manufactured in Korea first week of 2016. Pair of ISSIDDR3 SDRAM packages nearby providing 1GB for HPS. Terasic does not provide board layout files but with bit of time one could get access to FPGA’s pins, as most of balls dogbone vias are exposed on the bottom side.

Single SDRAM package in TSSOP provides just 64MB memory to FPGA section, which might be not enough in some data-intensive cases. For such applications Arrow SoCkit board or “ALTERA/Intel Cyclone® V SoC Development Kit” might be better, yet much more expensive options. U28 is the accelerometer in LGA package. Power DC-DC nearby is Linear LTC3633

Configuration switch on bottom side allow to set MSEL pin straps and define boot procedure of the board.

FPGA bitstreams are stored in Flash ROM on bottom. Unpopulated Q5 and D99 are parts for unused 3-pin FAN header. Could be handy if one has full utilization of FPGA+HPS resources, as Cyclone V getting rather hot under operation.

HPS section has own Warm and Cold reset buttons, user button and one user LED. Here are also infrared transmitter and receiver. LTC header has with standard pinout, defined by Linear QuickEval development board format.

Description

Pin

Pin

Description

Power supply V+, 9VDC

1

2

+3.3V VCCA

GND

3

4

HPSSPIMSCK or I2C SCL

HPSSPIMMISO input

5

6

HPSSPIM Chip Select SS

HPSMOSI or I2C SDA

7

8

GND

HPS I2C2 SDA

9

10

+3.3V Power

HPS I2C2 SCL

11

12

GND

GND

13

14

HPSLTCGPIO pin

Table 1: LTC connector pin definition on DE1-SoC

Make sure you set mux switch correctly, depends on either you want to route I2C/SPI to HPS section or FPGA.

GPIO ports from FPGA on this board are regular 0.1” (2.54mm) pitch 40-pin headers, easy to use for prototyping and hobby projects without expensive HSMC adapters. All pins have +3.3V protection with diodes.

USB-UART is based on common and robust FTDI. Native USB 2.0 connectivity provided by SMSCUSB3300 PHY and SMSCUSB2512B 2.0 Hub. Connector for microSD memory card supports both SDHC and SDXC cards.

Onboard 8-channel ADC is Linear LTC2308 able to provide 12 bits of resolution at 500 KSPS speed. It has internal 2.5V reference voltage. Nothing very special, but nice to have to sample some sensors and voltages. Maximum input voltage is 4.096VDC.

And all this was on latest Rev.F version board. Older boards used different ADC, different JTAG chain configuration. Changeset and manuals for each board revision available on Terasic site.

Setting up

I wanted to use Debian-based Linux distro on DE1-SoC to follow similar to Raspberry Pi toolkit and workflow. Image build October 18, 2016 from ALTERA was used as getting started point. It requires at least 8GB SD card and has Linux Kernel version 3.18.

Since image supplied by Terasic DE1-SoC is based on old Ubuntu 12.04 “Precise” LTS which will go EOL in January 2017, worth to consider an update at least to 14.04 LTS. Chapter how to do this is covered below here.

Now we can make sure eth0 got IP address and try to connect to DE1-SoC via PuTTy or other favourite SSH terminal tool. DE1-SoC has only 1 GByte of RAM, so it might be useful to create swap partition with tool like cfdisk and assign it for use:

Now reboot and make sure that new FS on mount point /storage is nice and healthy. Now let’s move all /usr contents which reside on root 4GB parition to new partition. It’s important to keep symlinks correct, so use next command:

rsync -av /usr/* /storage

This will move about 2.1GB of data to new partition. Now we can update mount point from /storage to /usr and reboot system.

root@localhost:~# apt-get install mc
Reading package lists... Done
Building dependency tree
Reading state information... Done
E: Unable to locate package mc
This is because by default only core packages are included in source-repostiries list. To add 3rd party packets, you will need to add "universe" repository by editing /etc/apt/sources.list and uncomment universe lines:

Update 12.04 LTS to 14.04 LTS

You may also want to update for latest Ubuntu LTS version. To do so, execute sudo do-release-upgrade and follow instructions. “Precise” version is 12.04 LTS and it can be updated to “Trusty” 14.04 LTS. To upgrade for latest “Xenial” 16.04 LTS you will need to run upgrade once again.

root@de1soclinux:/usr# sudo do-release-upgrade
Checking for a new Ubuntu release
Get:1 Upgrade tool signature [198 B]
Get:2 Upgrade tool [1156 kB]
Fetched 1156 kB in 0s (0 B/s)
authenticate 'trusty.tar.gz' against 'trusty.tar.gz.gpg'
extracting 'trusty.tar.gz'
...
Do you want to start the upgrade?
45 packages are going to be removed. 622 new packages are going to be
installed. 1225 packages are going to be upgraded.
You have to download a total of 632 M. This download will take about
17 minutes with your connection.
Installing the upgrade can take several hours. Once the download has
finished, the process cannot be canceled.
Continue [yN] Details [d]

If everything goes well, you will get updated 14.04 LTS system.

Update script will handle most of the things for LTS migration automatically, but use still need to make a few actions as prompts pop up. The default upgrade action is to keep the configuration files that already exists intact, that’s usually best way to go. As usual, no warranty, so make sure to you have idea of what each prompt provide as option. Google up the conflicting package information if you need more detail about the script’s question. When upgrade process finish, you will be required to reboot.

Once system boots, use lsb_release command to enjoy new Ubuntu version number:

Prevent graphical GUI to start on boot

You can set it in /etc/init/rc-sysinit.conf, by replace 2 with 3 and reboot. You can enable the graphical interface with telinit 2.

Second method is to prevent of launch the graphical interface service on boot

update-rc.d -f xdm remove

Quick and easy. You can re-enable the graphical interface with service xdm start or revert your changes with update-rc.d -f xdm defaults

Install latest OpenSSL (1.1.0c at article creation time)

It was a bit difficult to find any real information on fixing the latest openSSL CVE-2016-0800 (DROWN attack) so I decided to write this quick post on how to update your Ubuntu Server 12.04/14.04 OpenSSL (or any debian-based distro with apache2) to the latest 1.0.2g build to avoid the DROWN/Heartbleed attacks. I’m not going to go into the details of how the exploit works and how it’s exploited as there are many blogs/sites that already go over this. Instead I will only focus on the fix, I have provided 2 methods, a method using cURL or wget.

Single command line above will download latest binaries, extract them, cd into the directory, compile configuration and then install the files. It takes bit of time to compile OpenSSL package on DE1-SoC, so you can have 10 minute break for a drink here.

root@de1soclinux:/usr/src/linux-gpib/linux-gpib-code/linux-gpib# make install

Also if during setup PATH did not get updated, so this can be fixed by copy /usr/local/lib/libgpib.so* files to /usr/lib.

Configuration for linux-gpib and interfacing

Using National Instruments GPIB-USB-HS dongle

After everything should be successfully installed without errors, let’s connect GPIB-USB-HS adapter to DE1-SoC and try to talk with it.

Make sure your DE1-SoC board powered with good high-current USB cable and +5 VDC power supply with at least 3A , as NI GPIB-USB-HS is taking ~500mADC of current and without enough power whole system will be crashing/not working.

Checking interface connection is simple, just run lsusb to see which devices are present on USB bus:

Unlike old GPIB-USB-B, which need Cypress FX firmware upload after connection, GPIB-USB-HS does not need any firmware uploads and ready to work right from the box.
Let’s load kernel module with modprobe:

You may want to add /usr/local/sbin/gpib_config into /etc/rc.local to have it executed automatically during DE1-SoC boot. I did not do it, as I’m not always having GPIB dongle hooked to DE1-SoC, so that’s up to you.

Now we can confirm that interface is working, and data send/received correctly.

Python-application to talk GPIB from DE1-SoC

It’s time to write some simple program to talk with our instruments over GPIB.
One of easy choices would be using Python, as this high-level language is very easy to write data-logging programs and format data, without worry much about low-level coding.

To use GPIB in Python we need to have python-dev library installed and working:

root@de1soclinux:/repo/3458# apt-get install python-dev
Reading package lists... Done
Building dependency tree
Reading state information... Done
The following extra packages will be installed:
libssl-dev libssl-doc python2.7-dev
The following NEW packages will be installed:
libssl-dev libssl-doc python-dev python2.7-dev
0 upgraded, 4 newly installed, 0 to remove and 0 not upgraded.
Need to get 2,699 kB/31.4 MB of archives.
After this operation, 41.4 MB of additional disk space will be used.
Do you want to continue [Y/n]? Y
....
Setting up python2.7-dev (2.7.3-6+deb7u2) ...
Setting up python-dev (2.7.3-4+deb7u1) ...

Python-dev library is needed to access GPIB module.
Now we can install python egg to include Gpib module with our python system environment:

Hope this article help to use FPGA SoC system with ARM, such as DE1-SoC in environment with GPIB test equipment. This can be useful to run data acquisition from industry standard equipment and do advanced processing using GPIB. Or hardware plotting and data analysis using TFT controller designed in FPGA. Many possibilities open in such designs.