[SI-LIST] Re: ESD is a low frequency event -really??

From: MikonCons@xxxxxxx

To: si-list@xxxxxxxxxxxxx

Date: Tue, 9 Mar 2004 16:10:48 EST

Chris:
I agree with the bulk of your comments. I received other questions regarding
the connection between signal and chassis grounds; therefore, as often happens
in a short dissertation, I didn't offer comments on all facets of possible
design options.
Specifically, I did not mean to imply that one must not connect the chassis
ground rings to the signal ground on the board. Generally this connection is
done at critical interfaces (high-speed data signals and/or power return
interfaces) and may be done at more than one location. The voltage caused by an
ESD
strike is rendered to be common-mode voltage to the operational circuits at
that/these connection point(s). The connection should be a low inductance
connection.
For the case where a large PCB is used (a motherboard is a common example),
there may be many structural mounting points for the PCB. Many vendors take
advantage of these extra chassis ground points to create a local "quiet ground"
by connecting signal and chassis grounds together. Several years ago, MIPS
computers were shining examples of this technique.
You are correct in your comments where physical exposure of component
packages or heatsinks create a vulnerability to arcs from any nearby source;
therefore, the designer needs to recognize and deal with these cases.
Mike
Michael L. Conn
Owner/Principal Consultant
Mikon Consulting
Cell: (408)821-9843
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