PRODUCTSDDR3 SDRAM

H5TC8G83BMR

The H5TC8G43BMR-xxA and H5TC8G83BMR-xxA are a 8Gb low power Double Data Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth and normal power operation at 1.35V. DDR3L SRAM provides backward compatibility with the 1.5V DDR3 based environment without any changes. (Please refer to the SPD information for details.) SK hynix 8Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the clock (falling edges of the CK), data, data strobes and write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.

Features

VDD=VDDQ=1.35V + 0.100 /- 0.067V

Fully differential clock inputs (CK, CK) operation

Differential Data Strobe (DQS, DQS)

On chip DLL align DQ, DQS and DQS transition with CK transition

DM masks write data-in at the both rising and falling edges of the data strobe

All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock