I will add progress text by editing this first post to keep it all together in one place. Suggestions, opinions and commentary are welcome.
I'm doing a simple synthesizer/effects project to get started with dsPICs. So far, I've got a basic schematic and have chosen the device I'd like to use.

The device will be dsPIC33FJ128GP802. It is a 28 pin narrow DIP. I will use stripboard for construction. The thrust of this project is to get a dsPIC to output a sinewave through it's internal DAC.

Currently, I'm working on finding a programmer to purchase or build that will program this device. The one from Microchip priced at about $350 is out of the question. Essentially, I want a USB to RJ12 adapter/programmer device.
Here is some information about ICSP and connections for programming I found.
2010-07-26: Placed an order for a PICkit 2 programmer (pn:PG164120) and an ICSP to RJ-11 converter (pn:AC164110).
2010-07-31: Placed order for majority of parts, 3.3v regs are on backorder. Also received the PICkit 2 and converter a couple of days ago.

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessimaLast edited by JovianPyx on Sun Aug 01, 2010 11:42 am; edited 8 times in total

Currently, I'm working on finding a programmer to purchase or build that will program this device. The one from Microchip priced at about $350 is out of the question. Essentially, I want a USB to RJ12 adapter/programmer device.

AH! Thank you. I found a programmer on eBay (new) for $32 plus $12 shipping, but for another few dollars it might be better to go with the real Microchip product. The $350 item is probably the fancy-shmancy deluxe thing that I don't really need/want.

And yes, the device list given on the Microchip site lists the exact part I will be using.

So it looks like an investment of some $50 is required. However, the good part is that I need only one of these regardless of how many dsPIC projects I do._________________FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessima

Currently, I'm working on finding a programmer to purchase or build that will program this device. The one from Microchip priced at about $350 is out of the question. Essentially, I want a USB to RJ12 adapter/programmer device.

Looks like this unit has the ICSP port, do you know if the AC164110 - RJ-11 to ICSP Adapter works with the PICkit 2? I'd like to make one order and get everything I need. The blurb for PICkit 3 mentions the AC164110, but the PICkit 2 does not and has only the programmer unit, no cable for RJ-11._________________FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessima

Looks like this unit has the ICSP port, do you know if the AC164110 - RJ-11 to ICSP Adapter works with the PICkit 2? I'd like to make one order and get everything I need.

According to the picture about 2/3rds down the page, it looks like it does. I'm still pretty new to PICs - just using the demo board that came with the PICkit 2 at the moment. I'll probably be trying some dsPIC projects in the future._________________glacialcommunications.com

You can buy the Pickit 2 standalone for cheaper ($35) at Mouser (for example). You don't need the demo board. You can stick a SIP header on your board to plug the programmer in directly and avoid the RJ-11_________________Check out woosteraudio.com

Yeah, I figured I could do that... I wonder if it's trivial to make an SIP socket cable thingie. Once a project is in it's box, I may have to update it's code later on. A cable with an SIP female soldered to the project board would facilitate such updates. Then again, the adapter is only $10 and together with the PICkit 2 is still less than $50.

EDIT ADD: I've decided to go with the traditional RJ11 plug and socket, mainly because it's impossible to put the plug in the wrong way. It's worth $10 to me to have a correctly wired cable._________________FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessima

This isn't dead - I've been trying to think of a useful project as my first that wouldn't involve too much DSP math. I've come up with a few, but I think the best would be a monosynth that models a flute using an additive synth technique. Flutes don't need very many harmonics. For the most part, the fundamental and an octave above, but because a real flute can resonate at it's third harmonic (3F or octave plus a perfect fifth above the fundamental), I'd want that one too. 4th harmonic is probably not necessary at all. So 1F, 2F and 3F, each with an envelope generator. The sine function can be stored as a table in program flash and reused for all of the harmonics. A bit of noise will be useful too, I will implement a 32 bit LFSR for this. 100 kHz sample rate should be easy to do. This doesn't seem mathematically intense and I might be able to get away with 16 bit math so no funky multiplier subroutine would be required.

I will probably start by implementing and fine tuning the design on an FPGA and then port the design to a dsPIC.

I've been working out how to incorporate the MIDI control inside the dsPIC in such a way as to #1: not require DMA and #2: not have to worry about samples being sent to the DAC late.

What I think I can do is to make the program section that calculates the next sample be the highest priority task. It would be run as an ISR of a timer that triggers the interrupt 100,000 times per second. This will be the only interrupt handled by the program. The MIDI UART won't be interrupt driven but will be polled just after each sample is sent to the DAC. If a byte is received, it will be moved from the UART to a RAM buffer. Some code to determine whether a complete message is in the buffer will also be run to set a flag. This can work because the MIDI data can't arrive any faster than 3125 times per second which is a lot slower than the 100,000 times per second it's UART will be polled - meaning no lost MIDI bytes. Outside the ISR, there will also be an infinite loop that will check a flag for COMPLETE_MIDI_MESSAGE_RECEIVED which will, of course, be interruptable by the timer. If a complete message is received, then the loop is exited to handle the message (such as NOTE ON). The message handler can also be interrupted by the DAC timer.

I think this can work... I want to avoid DMA for this first project because it (hopefully) will be simple enough that it should work without DMA and DMA is just one more thing where things can get all clowned up (which would, of course, be my fault).
The FPGA test project is coming along. It should be only a few more days before I can test it. And in case anyone is wondering, I'm doing it on a Spartan-3E Starter Kit board and I will likely publish it's source code.

I am trying to limit the FPGA code to 16 bits for everything but the phase accumulator and noise generator, so it ought to deliver the answer to the question: "Is 16 bits enough?" since the dsPIC is a 16 bit MCU._________________FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessima

Just popping in to say i always enjoy following your projects, fantastic stuff man! The clips from the "a synthesizer made of only filters" thread were one of the first things to make me think "if this is what synth diy people are coming up with, i want in". Keep it coming!

So far so good, I am at a point where I can test a very primitive version of what I want in an FPGA. I will do it when the radio shows are over today.

The current design has 3 sine NCOs with tuning locked at 1F, 2F and 3F.
F is computed from a tuning ROM addressed essentially by note number.
There is one more "NCO" that is implemented as a white noise generator.
Each of the 4 voices has a level control and NCA.
The 4 "voices" each have an additional NCA driven by an ADSR and are summed and stuffed into the DAC register.
The ADSRs are independantly programmable.

This is just enough to see if I can get anything flute-like at all, or if 16 bits is too cheesey and unfortunately perhaps some weirdness I totally missed.

Ah, well, things didn't work out as planned. I totally forgot that I need to create a patch editor to test this. The good part is that if this thing works well enough, I will be able to use the same patch editor on the dsPIC version as I do on the FPGA version. So that will be today's task, write a patch editor (this will be in VB.NET Express Edition, the free one)._________________FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessima

The patch editor is written and I've made the first test of the design. It doesn't work correctly, but it is making sound. This is pretty normal for new designs, I'm actually lucky it makes any sound at all on the first test. Some keys work, others don't and the ones that work aren't the correct pitches...

Back at it...
03-07-2011, I have sound with all four oscillators, the chromatic scale is now in tune - but - the output is not a sine wave. So I have NCOs working at the phase accumulator level, but conversion from sawtooth phase accumulator output to sinewave isn't working yet. The ADSRs are not working either. They act like a switch, not like an EG. ADSRs are a scaled down version of another ADSR module I wrote and apparently don't work at the new scale. ... output looked like a fullwave rectified sinewave on the scope... found the problem... It was a doofus thing, I took output from the raw sine table instead of the SinOut output... [sigh] onward._________________FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessima

The project seems to be working, almost fully. The only thing left to fix is to figure out why the ADSR exponential release fails to work. Linear works fine. I may simply eliminate expo release because I don't think I need it, it seems a short linear release works just fine. I can get flutey and flute like sounds now. Seems to be a bit of an art to adjust the oscillators' levels and ADSR shapes to get a more realistic sound. I think I may need to add more ADSRs to deal with phase, I'd like to try pushing phase out of lock gently and then back to lock gently. "phase" being the phase difference between the harmonics. I'll play more with this simple model to see if that's even necessary._________________FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessima

I put this patch together to test the synth. The noise isn't right... I will see about a bandpass SVF next. Making it track pitch will be fun...

EDIT ADD: I have not yet added any modulation sources. This is just a very basic test, NCOs, ADSRs and NCAs.
EDIT ADD 03-09-2011: The improvements mentioned here are not in the current output sample, a new sample will be created after these are completed.

I am in process adding velocity and mod wheel control over the 2nd harmonic. These are tested and give the impression of overblow. I will also add velocity to modulate the instrument's summed output for more natural amplitude dynamics. Noticing slight clicks in the output during pitch change, possibly curable with a small amount of portamento.

Also still needed is the SVF BP filter for more realistic noise character. Since the Q won't be very high, I believe I can use 16x16 multiplies for the SVF with 32 bit memory cells.
EDIT ADD 03-12-2011: The origin of some of the clicks was from the velocity value changing when either sustain is held down and different keys are pressed or if one note is held and another key is pressed. I've changed both the design code and MIDI controller code to allow velocity to change only on a new note from silence. However, some of the clicks still persist when note pitch changes. In my research of this, I wanted to implement a single pole IIR lowpass filter to perform a portamento function, but I discovered at least one problem with it - my attempt was to use a 16 bit implementation, but this works best when a0 and b1 are both 0.5. As the values move away from this value, simulation shows me that the output is increasingly inaccurate. This gives rise to a sort of quantization that causes some notes to be way out of tune. I believe that a 32 bit implementation will fix this (previous FPGA projects work fine with a 36 bit implementation and 32 isn't that much smaller). There is also a question of whether the filter is properly coded, but I'm currently stymied on that point. All of this must be fixed or the project is useless to me since flutes should not have clicks...
EDIT ADD 03-14-2011: I have located the source of the clicks! And they are now gone. It was due to me allowing velocity and gate to change at times other than the DACena signal. Now these are synchronized with DACena and that cured the clicking. I am going to remove the portamento IIR filter since it's purpose was to eliminate the clicks and I really don't want portamento on this instrument anyway (since real flutes - well, except for slide flutes but they are really just whistles - don't have portamento).

The last thing to implement is a state variable filter capable of moderate Q to "tonalize" the noise voice. This should allow nice airy flutes if I get it right. My brother and both of my sisters play flute. I remember hearing them as a kid playing flute and when they warmed up the instrument, they would often make airy sounds and it was quite easy to discern a pitch. I want to be able to mix some of that, so hopefully I can apply what I learned with my Tonal Noise Synth to this instrument.

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessimaLast edited by JovianPyx on Mon Mar 14, 2011 3:35 pm; edited 9 times in total

Ok, here is another sample of my Additive Flute Synth. This sample demonstrates overblow which is controlled by velocity. The harder keys are hit, the more second harmonic is added while the fundamental is supressed. I like the sound I'm getting now and all that remains is to get the noise to be a tad tonal so that low notes have low pitched noise and high notes have high pitched noise. I note that there are still clicks, but much lower level now. I will continue to mess with that - look for another "doofus" thing I did or I may toss a lowpass FIR filter in to limit that a bit, but I think in a mix, it would be unnoticed. The clicking seems to not happen on slurs or trills, so at least I've fixed that. The fix for the remaining clicks may be as simple as forcing the phase accumulators to zero any time the ADSRs fire.

EDIT ADD: I'm finding that part of the clicking is coming from the ADSR settings with release being too long. But the ADSR code is supposed to be handling that...

If I can get this kind of sound (without the clicks) out of a dsPIC I will be very happy.
EDIT ADD 03-15-2011: I thought this tid bit might be interesting to others who do this kind of thing - I came to a point where it seemed no matter what I did, I couldn't get rid of the random clicks. The conclusion I came to was the I needed a way to test the design reliably and in such a way that the test eliminates part of the design as a cause. I started by assuming I had a problem with my ADSR design. I needed a test that would confirm this (or not). So I wrote a program that can send MIDI messages to the synth at different rates because I thought that the problem was in triggering the ADSR into it's attack state before it had completed it's previous release. The conditions I set were to leave the note number the same and keep it a rather low pitch because the click would be very obvious with it's high harmonic content. I also kept velocity the same (at 127 decimal). I wrote it and started it and listened for several minutes, changing the time between each note-on and note-off. I ran it slow - no clicks and I ran it at speeds that my fingers could never accomplish playing a keyboard - no clicks. What this told me is that the ADSR is not the culprit. Then I changed the program so that it would change the velocity value for note on, toggling velocity between two values. I picked 127 and 64. (note-on 127, note-off, note-on 64, note-off and repeat ad nauseum) As long as I kept the time more than 65 mS, there were no clicks, but below that - very obvious clicks for almost every note. So at least I know where to look now, for some reason the different velocity values are causing a click... Now I have a test program and an idea where to look. This will get fixed...
EDIT ADD 03-17-2011: I've finally fixed the clicking problem. I figured out what it was, but made an error in the Verilog implementation of the fix. I can ran the diagnostic program at any speed now and there are no clicks. Even better, when I play the keyboard, there are no clicks! YAY! I shall post a sample later today.
EDIT ADD 03-17-2011 [end of day]:
I took the time to finish the basic ideas I wanted to put into this project. The last of these was to implement a bandpass SVF to tonalize the noise and now that it's finished, this has made a nice improvement. For a sample, I will likely fall back on a Mozart Quartet I've used in the past. So I will have to program my 4 Spartan-3E Starter Kit boards as additive flutes to do this.

The synth is still an FPGA design, but it has proved the concept that it can be done with 32 bit integer arithmetic (except for the phase accumulators which are 48 bits).

Ok, here is the Mozart piece. I'm not completely happy with it, but part of that is because it's a string quartet, not a flute quartet, so the dynamics are somewhat off of what they would be for a real flute piece.

However, there are points when one can hear (or at least I do) flute-ish sounds. I didn't take a lot of time to fine tune the patch, so as I work with this I will probably post another better one, but I promised this and here it is. As always, please pardon my noisey studio...

At least the clicks are gone...

I will likely do a piece of my own that better shows off the capabilities of this instrument.
I'm adding another sample, just me messing on a MIDI keyboard. Seems I can make better flute sounds when I do it than trying to use a .mid file (which may have crappy dynamics to begin with). Anyway, this sample was taken after several hardware adjustments were made. I want to compress the dynamics a bit more, the soft timbre flute is too low amplitude, but the sound seems good.

@JLS: Yes, I will post the source code it's nearly complete, I want to make sure I'm done with it first...

@ejr27233: I think it might be possible, but it really depends on how much time headroom I have. (please note that this project isn't in the dsPIC yet, it's running on an FPGA to test the DSP concepts involved). The main concern for me was that I could do it with as few 32 bit multiplies as possible, but there are several required that I'd hoped could be 16x16. 32x32 multiplies require using the 16x16 bit dsPIC hardware multiplier 4 times with several adds, so a 32x32 mult will take some 8 clocks or so. The total number of clocks available at 100 kHz sample rate is 400. There will also be code required for the MIDI controller - my goal is to cram all of it into one dsPIC. Using the ADCs will require some additional electronics, but mostly just an opamp or two, I don't think I have to worry about an anti alias image filter for such slow changing inputs. If I had to guess right now (with no code in front of me) I'd say it's probably possible.
EDIT ADD 2011-03-18: The last thing I want before ending this phase of development is to add an expression control. I'm thinking channel pressure to modulate amplitude (tremelo). Currently, the only expression control is through velocity and I'd like to be able to do a bit more "real flute" stuff, like breath-tremelo. The only issue with that is I'd need to send the channel pressure message stream through a single pole lowpass IIR filter so that transients don't cause clicks or pops and a smooth LFO-like expression result would be possible even if channel pressure jumps around a bit. That should be possible in the FPGA design, but it may likely require 2 more 32x32 bit multiplies. I would also like to make the expression control routable between channel pressure and modulation wheel. Sooo, we're not quite finished. Close though. I will probably first test it without the IIR lowpass filter because the amount of modulation will be fairly small, but in the past I've done experiments like this and perceived zipper noise from the modulation wheel. We shall see what we shall see.
EDIT ADD 2011-03-19: I added simple amplitude modulation using channel pressure, but as I suspected, at the level required to get a noticable effect, there is zipper noise. Next is to add a single pole lowpass IIR filter to eliminate the zipper...

EDIT ADD (somewhat later): A 32 bit single pole lowpass IIR filter with BW factor of 0.875 did the trick. Channel pressure can be used to increase overall amplitude without any apparent zipper noise. Since this is as far as I intend to go with this (so that it has a chance of fitting inside a dsPIC), I will post the source code for the FPGA project. For those interested, there is some design caveat information within the comments near the top of the main module (Additive_Flute.v).
EDIT ADD 2011-03-21: I have added and tested Pitchwheel modulation of pitch (plus or minus one semitone) and I will post a full range sample later today. That's it for the design, it is finished and now needs to go to dsPIC-land._________________FPGA, dsPIC and Fatman Synth Stuff

Time flies like a banana.Fruit flies when you're having fun.BTW, Do these genes make my ass look fat?corruptio optimi pessimaLast edited by JovianPyx on Mon Mar 21, 2011 10:43 am; edited 3 times in total

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