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Copublished with IEEE, CiSE features the latest computational science and engineering research in an accessible format along with departments covering news and analysis, CSE in education, and emerging technologies.

Leadership-class systems can enable breakthroughs in science, but to use them productively requires significant expertise. There's a need to disseminate this expertise to potential users from a broader set of fields. A community effort aims to lower the barriers of entry to using these powerful machines by training the next-generation of high-performance computing users.

For extreme-scale high-performance computing systems, system-wide power consumption has been identified as one of the key constraints moving forward, where DRAM main memory systems account for about 30 to 50 percent of a node's overall power consumption. As the benefits of device scaling for DRAM memory slow, it will become increasingly difficult to keep memory capacities balanced with increasing computational rates offered by next-generation processors. However, several emerging memory technologies related to nonvolatile memory (NVM) devices are being investigated as an alternative for DRAM. Moving forward, NVM devices could offer solutions for HPC architectures. Researchers are investigating how to integrate these emerging technologies into future extreme-scale HPC systems and how to expose these capabilities in the software stack and applications. Current results show several of these strategies could offer high-bandwidth I/O, larger main memory capacities, persistent data structures, and new approaches for application resilience and output postprocessing, such as transaction-based incremental checkpointing and in situ visualization, respectively.