> Greg,>> Performance in the BGA can depend on the existence of pwr/gnd plane> layers or appropriately placed current return paths in the package.> Without such areas, the BGA is simply a low-profile funny leadframe> whose signal-pwr, signal-gnd, pwr-gnd, and signal-signal loop> inductuances are a function of the board onto which it is mounted. The> "BGA" must be designed to have better performance than the QFP, and it> is not necessarily true that it will. For example, even if the BGA has> a solid ground plane, if it is not part of the direct current return> path (but only indirectly through the ground's capacitance to the real> return path), a relatively increased loop inductance may result,> possibly worse than for some QFP.

I have seen a few such BGA packages where little attention has been paid to signal returns. When a chip/package vendor runs a field solver that uses this BGA ground plane as a reference, the RLC matrices generated for the signals
can be very misleading.

> What really matters are the L1+L2+-2M> loops which may look like non-uniform ugly multiply-coupled "T-lines".> We want a high M between the signal and power "return" to minimize the> loop L by maximizing the M. (like twisting the +/- wires from a DC> power supply). In fact it may behoove us to have an equal loop> inductance from sig-pwrreturn as we have from sig-gndreturn so as match> 0-1 and 1-0 inductive loops.

This would be true if signals routed on the board are as likely to be referenced to PWR as they are to a GND plane. If all signals on the board only referenced GND planes, it is best to assign all signal return bumps to GND.

> The lonesome values of the partial lead> inductance matrix entries may be considered to be known only to within a> constant.>> If both TQFP and BGA are measured or simulated, port return currents> flow in the defined simulator or test-setup ground return. Inductances> measured or simulated in different environments end up different, even> for the same package. Comparison for a same package characterized in> different environments can be made by writing a super-node equation so> that the sum of all currents into the package leads totals zero and> "shutting off" the flow of current in the old simulator or measurement> return path which probably won't exist in the final application. Two> different packages are compared by looking at the loop values, NOT the> individual partial inductances, for given sig-gnd, sig-pwr, sig-sig> configurations.>> Practical measurements can be made with a network analyzer for example.>> Have fun with it ! Anyone disagree ?>> Fmax.>> **** To unsubscribe from si-list: send e-mail to majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE si-list, for more help, put HELP. si-list archives are accessible at http://www.qsl.net/wb6tpu/si-list ****

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