NAME

ppc - Parallel Port Chipset driver

SYNOPSIS

deviceppc
In /boot/device.hints:
hint.ppc.0.at="isa"hint.ppc.0.irq="7"
For one or more PPBUS busses:
deviceppbus

DESCRIPTION

The ppc driver provides low level support to various parallel port
chipsets for the ppbus(4) system.
During the probe phase, ppc detects parallel port chipsets and
initializes private data according to their operating mode: COMPATIBLE,
NIBBLE, PS/2, EPP, ECP and other mixed modes. If a mode is provided at
startup through the flags variable of the boot interface, the operating
mode of the chipset is forced according to flags and the hardware
supported modes.
During the attach phase, ppc allocates a ppbus structure, initializes it
and calls the ppbus attach function.
Supportedflags
bits 0-3: chipset forced mode(s)
PPB_COMPATIBLE 0x0 /* Centronics compatible mode */
PPB_NIBBLE 0x1 /* reverse 4 bit mode */
PPB_PS2 0x2 /* PS/2 byte mode */
PPB_EPP 0x4 /* EPP mode, 32 bit */
PPB_ECP 0x8 /* ECP mode */
And any mixed values.
bit 4: EPP protocol (0 EPP 1.9, 1 EPP 1.7)
bit 5: activate IRQ (1 IRQ disabled, 0 IRQ enabled)
bit 6: disable chipset specific detection
bit 7: disable FIFO detection
Supportedchipsets
Some parallel port chipsets are explicitly supported: detection and
initialisation code has been written according to their datasheets.
· SMC FDC37C665GT and FDC37C666GT chipsets
· Natsemi PC873xx-family (PC87332 and PC87306)
· Winbond W83877xx-family (W83877F and W83877AF)
· SMC-like chipsets with mixed modes (see ppbus(4))
Addingsupporttoanewchipset
You may want to add support for the newest chipset your motherboard was
sold with. For the ISA bus, just retrieve the specs of the chipset and
write the corresponding ppc_mychipset_detect() function. Then add an
entry to the general purpose ppc_detect() function.
Your ppc_mychipset_detect() function should ensure that if the mode field
of the flags boot variable is not null, then the operating mode is forced
to the given mode and no other mode is available and ppb->ppb_avm field
contains the available modes of the chipset.