6.52.7 MIPS DSP Built-in Functions

The MIPS DSP Application-Specific Extension (ASE) includes new
instructions that are designed to improve the performance of DSP and
media applications. It provides instructions that operate on packed
8-bit/16-bit integer data, Q7, Q15 and Q31 fractional data.

GCC supports MIPS DSP operations using both the generic
vector extensions (see Vector Extensions) and a collection of
MIPS-specific built-in functions. Both kinds of support are
enabled by the -mdsp command-line option.

Revision 2 of the ASE was introduced in the second half of 2006.
This revision adds extra instructions to the original ASE, but is
otherwise backwards-compatible with it. You can select revision 2
using the command-line option -mdspr2; this option implies
-mdsp.

The SCOUNT and POS bits of the DSP control register are global. The
WRDSP, EXTPDP, EXTPDPV and MTHLIP instructions modify the SCOUNT and
POS bits. During optimization, the compiler will not delete these
instructions and it will not delete calls to functions containing
these instructions.

At present, GCC only provides support for operations on 32-bit
vectors. The vector type associated with 8-bit integer data is
usually called v4i8, the vector type associated with Q7
is usually called v4q7, the vector type associated with 16-bit
integer data is usually called v2i16, and the vector type
associated with Q15 is usually called v2q15. They can be
defined in C as follows:

Note: The CPU's endianness determines the order in which values
are packed. On little-endian targets, the first value is the least
significant and the last value is the most significant. The opposite
order applies to big-endian targets. For example, the code above will
set the lowest byte of a to 1 on little-endian targets
and 4 on big-endian targets.

Note: Q7, Q15 and Q31 values must be initialized with their integer
representation. As shown in this example, the integer representation
of a Q7 value can be obtained by multiplying the fractional value by
0x1.0p7. The equivalent for Q15 values is to multiply by
0x1.0p15. The equivalent for Q31 values is to multiply by
0x1.0p31.

The table below lists the v4i8 and v2q15 operations for which
hardware support exists. a and b are v4i8 values,
and c and d are v2q15 values.

C code

MIPS instruction

a + b

addu.qb

c + d

addq.ph

a - b

subu.qb

c - d

subq.ph

The table below lists the v2i16 operation for which
hardware support exists for the DSP ASE REV 2. e and f are
v2i16 values.

C code

MIPS instruction

e * f

mul.ph

It is easier to describe the DSP built-in functions if we first define
the following types:

q31 and i32 are actually the same as int, but we
use q31 to indicate a Q31 fractional value and i32 to
indicate a 32-bit integer value. Similarly, a64 is the same as
long long, but we use a64 to indicate values that will
be placed in one of the four DSP accumulators ($ac0,
$ac1, $ac2 or $ac3).

Also, some built-in functions prefer or require immediate numbers as
parameters, because the corresponding DSP instructions accept both immediate
numbers and register operands, or accept immediate numbers only. The
immediate parameters are listed as follows.