Conventional planar bulk MOSFET is difficult to scale down to sub-20nm node, due to the worsening performance variability and short channel effects. Thin body transistors, including Double-Gated FinFETs and Fully Depleted SOI (FD-SOI) MOSFETs are anticipated to be used in future CMOS technology nodes. Strained Silicon technology is widely used today to boost transistor performances. Thus it’s technically important to examine the strain-induced enhancement in these thin-body transistors, and within nanometer channel lengths. In this project, experimental and TCAD Simulation study of Ultra-thin Body and BOX (UTBB) FD-SOI MOSFET carrier transport issues, including strain enhancement, short channel apparent mobility reduction, ON-state injection velocity impacts. Special attentions are paid to the back biasing tunning to reach optimal device performances vs. power efficiency. Relevant publications [1-3]

Figure 1: Fully Depleted SOI MOSFET TEM cross-sectional view

Figure 2: Calculated Electron and Hole Bandstructures (equi-energy contours in momentum space) from FD-SOI structure, and under different strain configurations