EFFICIENT EMBEDDED SYSTEMS - SPEED, SECURITY AND ENERGY EFFICIENCY

ALSOC is at a turning point with a shift to more software aspects of
it research dealing with architecture. ALSOC’s unique experience in
architecture will help to design new tools, algorithms and methods in
order to capitalize on its expertise and move towards new
challenges. This will be achieved through software release,
publications conferences and journals, national and European funding
as well as unfunded collaborations where research is very active and
limitless.

Architectures : design of parallel architectures and their OS

Manycore architecture for the design and the evaluation of parallel
algorithm : TSAR will be now used to deploy parallel algorithms and to
evaluate middlewares.

Optimisations : methods, algorithms and tools

Deployment of real-time applications : we proved formally that the
communications of a real-time application or any application specified
using a Simulink formalism can be modeled using particular
Synchronous-Data Flow graphs (SDFG). These specifications can be used
to develop new original algorithme to optimize the execution of these
applications on a many-core architecture, following as example the
AUTOSAR standard.

Floating-point versus fixed-point coding : to develop tools and
applications with the required amount of accuracy and to evaluate some
trade-off (speed vs accuracy vs power consumption) applied to computer
vision for smart cameras, robots and UAVs.

Design of efficient irregular parallel algorithms : focus on
Connected Component Labeling and Analysis algorithm – an important
class of algorithms in image processing, – that combines irregular
graph processing (Union-Find building and update), discrete geometry
and data-dependent (features) computations to find out how to
transform, re-think and design irregular parallel algorithms, for
multi/many cores processor with SIMD extension and GPUs

Code hardening and security : methods, algorithms and tools

The proposed formal verification approach and associated tool for
the assessment of robustness of an application subject to fault
attacks will be extended to enable an automatic analysis of sensitive
parts of an application. We aim at extend the set of considered
attacks (fault model and side-channel attacks), the type of security
properties as well as the ability of our tool to deal with more
complex codes. We aim at investigating the combination with other
formal approaches in order to improve the scope of our framework from
high-level security requirements to low-level robustness analysis.

Compilation flow for code hardening and robustness analysis of code
subject to physical attacks. A security-oriented compilation flow will
be set up in order to produce necessary and useful information for
the robustness analysis. We also want to develop hardening pass and
study the interaction between securing and optimization pass. This
point is partially addressed in a collaborative project and a PhD
thesis (ANR PROSECCO and CIFRE ISSM).

The secure execution of different operating systems on the same
architecture requires a secure boot authentication mechanism in order
to guarantee the code authenticity and form a chain of trust, from the
start of the boot-loader to the kernel. This aspect has not been
treated in the TSUNAMY project and may be subject to future work.