Smart embedded systems are the building blocks of the Internet-of-Things (IoT). In embedded system design, it is well known that the software development effort has overtaken the hardware effort. Virtual platforms can address this mismatch by enabling parallel software and hardware development. Verification and testing of software for IoT and smart embedded systems, including operating systems, drivers, firmware and applications, require a continuous evolution of virtual platform methodologies.

Ever more powerful multiprocessor SoCs allow exploiting concurrency, while executing multiple applications on the same chip can impact extra-functional properties (e.g., time, power and temperature); these must be analyzed. New operating systems and hypervisors, for improved control, security and safety of the system, must be ported and tested. Smart systems are ever more connected, with continuous-time behavior to be simulated together with discrete-time models, and legacy RTL components with virtual platforms. Interaction among systems must be verified in realistic network scenarios.

This tutorial will give insights into which changes to expect in new virtual platforms regarding efficient CPU simulation, analog-mixed-signal modeling, simulation of extra-functional properties and network simulation, and how these changes can help to design tomorrow’s embedded systems more efficiently.

Where: The International Congress Center (ICC) in Dresden, Germany.

When: DATE is March 14–18, 2016. The tutorial is March 14, 2016, 14:30-18:00 PM.

Please contact sales@imperas.com to learn more about Imperas virtual prototyping solutions for embedded software development, debug and test; or to set up a meeting at DATE 2016.