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Overview

The P89LPC980/982/983/985 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC980/982/983/985 in order to reduce component count, board space, and system cost.

Features

256-byte RAM data memory. Both the P89LPC982 and the P89LPC985 also include a 256-byte auxiliary on-chip RAM.

8-input multiplexed 10-bit ADC (P89LPC985, 4-input multiplexed 10-bit ADC on P89LPC983) with window comparator that can generate an interrupt for in or out of range results. Two analog comparators with selectable inputs and reference source.

Five 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).

A 23-bit system timer that can also be used as a real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.

Enhanced low voltage (brownout) detect allows a graceful system shutdown when power fails.

28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

2.2 Additional features

A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI.

Integrated PMU (Power Management Unit) automatically adjusts internal regulators to minimize power consumption during Idle mode, Power-down mode and Total power-down mode. In addition, the power consumption can be further reduced in Normal or Idle mode through configuring regulators modes according to the applications.

256-byte RAM data memory. Both the P89LPC982 and the P89LPC985 also include a 256-byte auxiliary on-chip RAM.

8-input multiplexed 10-bit ADC (P89LPC985, 4-input multiplexed 10-bit ADC on P89LPC983) with window comparator that can generate an interrupt for in or out of range results. Two analog comparators with selectable inputs and reference source.

Five 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to become a PWM output).

A 23-bit system timer that can also be used as a real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer.

Enhanced low voltage (brownout) detect allows a graceful system shutdown when power fails.

28-pin TSSOP and PLCC packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and reset options.

2.2 Additional features

A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI.

Integrated PMU (Power Management Unit) automatically adjusts internal regulators to minimize power consumption during Idle mode, Power-down mode and Total power-down mode. In addition, the power consumption can be further reduced in Normal or Idle mode through configuring regulators modes according to the applications.