Description

Chip-to-chip data links are found in almost all consumer and enterprise digital products produced today, from laptop computers to data center servers, telecommunication switching centers and Internet routers.

At lower speeds, SPICE allowed designers to perform simulations using lumped-element models. But at today’s multigigabit per second chip-to-chip data rates high-frequency and distributed effects such as impedance mismatch, reflections, crosstalk, skin effect, and dielectric loss come into play.

Accordingly, signal integrity engineers need to go beyond SPICE. The SPICE-like simulator portion of Advanced Design System (ADS) Transient Convolution + Channel Sim Element accommodates not only lumped-element models but also the distributed transmission line, S-parameter, and EM models that are essential to model high-speed PCB traces. The Transient Convolution and Channel Simulation Element is unique in that it is not simply a high performance point tool, but a set of capabilities integrated into the ADS platform. You can combine system-, circuit-, or EM-level models – each at the appropriate level of abstraction – into one simulation.

Multicore processor support and a new, high-capacity sparse matrix solver achieve a three-fold simulation speed improvement for traditional transient simulations and make this the industry's fastest signal integrity circuit simulator.

Signal integrity engineers need to determine ultralow bit error rate (BER) contours for thousands of points in the design space in order to select the optimum set of characteristics for transmitter, channel, and receiver. Even with multicore and modern linear algebra, transient simulation still takes a prohibitively long time: more than a day for a million bits.

To meet this need, we’ve added two new modes that eliminate the need for long, transient simulations. It takes advantage of the fact that the traces, vias, bond wires, connectors, etc. of the channel are linear and time invariant (“LTI”). This fact lets you avoid the brute force approach of running the transient solver at every time step. You can determine ultralow BER contours in seconds not days. This enables very rapid and complete ‘what if’ design space exploration.

The table below compares the pros and cons of traditional transient with Channel Simulator in Bit-by-bit and Statistical modes.

Transient (SPICE-like) Simulator

Channel Simulator, Bit-by-bit mode

Channel Simulator, Statistical mode

Method

Modified nodal analysis of Kirchoff’s current laws for every time step