450mm Back from the Dead? The Ultimate Wafer may Help Solutions from an Unlikely Place In the last article, the evolution of the crystal pulling methods was analyzed, and there presented was the promise of a new method that would continue the improvement over the continuous CZ, fed wi

Part One: The Issue with 450mm Ingots In the last article, I mentioned that there appears to be a route toward a cost-effective (upgradable), reduced cost (faster), and safer means of pulling 450mm silicon crystals (also referred to as ingots or boules). This technology may be a poten

For much of 2014, there has been little to report on the progress of 450mm. No surprise that it appears most suppliers have pulled back on 450mm investments and focus. This is evidenced by how many times the phrase 450mm is mentioned in some key player’s annual 10K filings with the Se

I was wrong on 450mm. But first, a caveat. When speaking out on the subject in 2007, I wasn’t necessarily wrong. Nor in 2008, 2009, or even in 2010, though there were some signs my position was weakening. 2011? I was busy marketing a book. (Shameless plug… buy “Dormant Curse”.) By 201

450mm Schedule By all appearances, 450mm, an industry disruption, is now on track. In recent announcements, Intel effectively decoupled EUVL from 10nm, which allows the 2018, 450mm target date to stand intact regardless of any EUV slip. If EUV is delayed to 7nm, there’s still a 450mm

Taiwan Semiconductor Manufacturing Company has made public what many in the industry have known for some time: Don’t expect 450mm until 2018. In an article in the Taiwan Times, TSMC’s technology roadmap is discussed, which now includes 10nm transistors on 450mm in 2018 (hi

In a report on EETimes, Jim Feldham has announced a new report by Semico Research entitled, “450mm Wafer Manufacturing: Who Needs It?” From the EETimes article: “The [semiconductor] industry will not stagnate at the existing 300-mm process technology,” said Ji

AENEAS is a non-profit industrial association established under French law that continues the activities of the ENIAC Platform and represents the Nanoelectronics RTD partners in the Joint Undertaking. It allows its members to participate in the Joint Technology Initiatives and provid