Title (de)

Title (fr)

Publication

Application

Priority

US 67305796 A 19960701

Abstract (en)

[origin: US6041369A] An improved apparatus and method for monitoring and controlling when a data phase in a burst transmission of data is about to end. The apparatus described interleaves dual adder circuits such that each dual adder circuit has more time to process incoming data. Distribution of the processing allows slower, lower cost components to be used in high speed applications. The described apparatus and method are particularly useful in peripheral component interconnect applications.