Altera, ARM announce adaptive FPGA embedded S/W toolkit

The folks at Altera and ARM have announced that, with a unique agreement, the companies have jointly developed a DS-5 embedded software development toolkit with FPGA-adaptive debug capabilities for Altera SoC devices.

The ARM Development Studio 5 (DS-5) Altera Edition toolkit is designed to remove the debugging barrier between the integrated dual-core CPU subsystem and FPGA fabric in Altera SoC devices. By combining the most advanced multi-core debugger for the ARM architecture with the ability to adapt to the logic contained in the FPGA, the new toolkit provides embedded software developers an unprecedented level of full-chip visibility and control through the standard DS-5 user interface. The new toolkit will be included in the Altera SoC Embedded Design Suite and will begin shipping in early 2013.

Altera SoC devices combine a dual-core ARM Cortex-A9 processor with FPGA logic on a single device, giving users the power and flexibility to create custom field-programmable SoC variants by implementing user-defined peripherals and hardware accelerators in the FPGA fabric. Altera is currently shipping engineering samples of its Cyclone V SoC devices (Click Here for more details).

The ARM Development Studio 5 (DS-5) Altera Edition toolkit dynamically adapts to unique customer configurations of the FPGA within the SoC to seamlessly extend embedded debugging capabilities across the CPU-FPGA boundary and unify all software debugging information from the CPU and FPGA domains with the standard DS-5 user interface. When combined with the advanced multi-core debugging capability of the DS-5 Debugger, and the link to the Quartus II SignalTap logic analyzer for cross-triggering capability, the toolkit delivers an unprecedented level of debugging visibility and control that leads to substantial productivity gains.

“Disruptive, innovative silicon devices demand equally disruptive and innovative software tools. That demand has been met by this innovative toolkit for Altera 28 nm Cyclone V and Arria V SoC devices and for upcoming Altera 20 nm SoC devices,” said John Cornish, executive vice president of the System Design Division at ARM. “This technical innovation has unified CPU debugging with FPGA debugging to bolster user productivity. Altera and ARM have made this advanced tool technology with premium, productivity-boosting features widely available through Altera SoC development kits and the Altera SoC Embedded Design Suite. We believe this combination will deliver valuable benefits to our mutual customers.”

The ARM DS-5 toolkit suite offers the most advanced multi-core debugger in the market for the ARM architecture. It supports debugging on systems running in asymmetric multiprocessing (AMP) and symmetric multiprocessing (SMP) system configurations. It is broadly used for board bring-up, driver development, OS porting, bare-metal and Linux application development, through JTAG and Ethernet debugging interfaces, and offers Linux and RTOS awareness.

“We are very proud of the partnership and innovation in this joint work with ARM,” said Vince Hu, vice president of product and corporate marketing at Altera. “The ARM DS-5 Altera Edition toolkit gives software engineers an incredibly powerful development and debugging tool, allowing for the fastest development time for our SoC devices.”

Key features and benefitsThe ARM DS-5 Altera Edition toolkit features the following capabilities:

Software debug view adapts to include the peripheral devices programmed by the developer into the FPGA fabric, providing a seamless view of both the hard and soft peripheral register memory map of the entire SoC.

Includes the DS-5 Streamline performance analyzer, which correlates software thread and event information with hardware counters from both the SoC and FPGA, enabling the identification and correction of system-level bottlenecks.

Pricing and availabilityThe ARM DS-5 Altera Edition toolkit for Altera SoCs is being presented at the ARM Technical Symposium in Paris on December 13, 2012. This toolkit will be included in the Altera SoC Embedded Design Suite (Altera SoC EDS) Subscription Edition for $995. The Altera SoC EDS will start shipping in early 2013.

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Well, I have to say that this is all jolly exciting. When we first started to hear about things like SoC FPGAs that combined dual ARM Cortex-A9 processors with programmable digital FPGA fabric, I must admit that I did wonder what the design tools would look like. Now I have my answer.
The great thing here is that when the FPGA designers create any hardware accelerator blocks and functions in the FPGA fabric, their register maps are automatically made available to the software developers just the way they are used to.
Also, this combined Altera/ARM environment allows software developers to set breakpoints in their code that will trigger data/signal capture in the FPGA fabric; similarly, th ehardware designers can set up SignalTap virtual logic analyzer triggers in the programmable fabric that will cause breakpoints in the software.
With regard to the ARM debugger -- this is a full-up implementation without any limitations -- except for the fact that it's locked to the Altera FPGA SoC. This type of high-end debugging capability (the ability to look at Linux threads, semaphores, queues, etc) could easily cost up to $5000 or more. so including it with the Altera tools for only $995 is pretty mind-blowing.
Mega cool!!!