Preproduction Intel® Xeon Phi™ processors are running in several supercomputing-class systems. Cray has a system currently running multiple customer applications in preparation for the supercomputer deployments at Los Alamos (Trinity system) and NERSC (Cori system). Systems are also installed at CEA (the French Alternative Energies and Atomic Energy Commission) by Atos and Sandia National Laboratories by Penguin Computing.

Early ship program -- contact your Intel representative to find out more

Intel Adams Pass board (1U half-width) is custom designed for Knights Landing (KNL) and will be available to system integrators for KNL launch; the board is OCP Open Rack 1.0 compliant, features 6 ch native DDR4 (1866/2133/2400MHz) and 36 lanes of integrated PCIe* Gen 3 I/O

MOMENTUM

Expecting over 50 system providers for the KNL host processor (numerous designs displayed at Supercomputing'15), in addition to many more PCIe*-card based solutions.

Cori Supercomputer at NERSC (National Energy Research Scientific Computing Center at LBNL/DOE) became the first publically announced Knights Landing based system, with over 9,300 nodes slated to be deployed in mid-2016

“Trinity” Supercomputer at NNSA (National Nuclear Security Administration) is a $174 million deal awarded to Cray that will feature Haswell and Knights Landing, with acceptance phases in both late-2015 and 2016.

The DOE* and Argonne* awarded Intel contracts for two systems (Theta and Aurora) as a part of the CORAL* program, with a combined value of over $200 million. Intel is teaming with Cray* on both systems. Scheduled for 2016, Theta will have greater than 8.5 petaFLOPs and more than 2,500 nodes, featuring the Intel® Xeon Phi™ processor (Knights Landing), Cray* Aries* interconnect and Cray’s* XC* supercomputing platform. Scheduled for 2018, Aurora is the second and largest system with 180-450 petaFLOP/s and approximately 50,000 nodes, featuring the next-generation Intel® Xeon Phi™ processor (Knights Hill), 2nd generation Intel® Omni-Path fabric, Cray’s* Shasta* platform, and a new memory hierarchy composed of Intel Lustre, Burst Buffer Storage, and persistent memory through high bandwidth on-package memory.

FUTURE

Knights Hill is the codename for the 3rd generation of the Intel® Xeon Phi™ product family

Based on Intel’s 10 nanometer manufacturing technology

Integrated 2nd generation Intel® Omni-Path Host Fabric Interface

DISCLAIMERS

*Other names and brands may be claimed as the property of others.All products, computer systems, dates and figures specified are preliminary based on current expectations, and are subject to change without notice.All projections are provided for informational purposes only. Any difference in system hardware or software design or configuration may affect actual
performance.1 Binary compatible with Intel® Xeon® Processors v3 (Haswell) with the exception of Intel® TSX (Transactionaly Synchronization Extensions)2 Projected result based on internal Intel analysis comparison of 16GB of ultra high-bandwidth memory to 16GB of GDDR5 memory used in the Intel® Xeon Phi™ coprocessor 7120P.3 Compared to the Intel® Atom™ core (based on Silvermont microarchitecture) 4 Over 3 Teraflops of peak theoretical double-precision performance is preliminary and based on current expecations of cores, clock frequency and floating point operations per cycle. 5 Projected result based on internal Intel analysis of STREAM benchmark using a Knights Landing processor with 16GB of ultra high-bandwidth versus DDR4 memory with all channels populated.6 Projected peak theoretical single-thread performance relative to 1st Generation Intel® Xeon Phi™ Coprocessor 7120P7 See configuration details and disclaimers using provided hyperlink