The camerIC-18 IP core is Silicon Image’s fifth generation family of camera processor IP cores. Since 2002, over 20 camera designs have been delivered for use in System-on-a-Chip (SoC) application processors for digital still cameras, mobile phone and netbooks.

The camerIC-18 IP core supports resolutions ranging from 2MP up to 18MP in a single low-cost/low-power design. To effectively deliver resolutions over 12MP, the camera processor features sophisticated bad pixel detection/correction and noise reduction techniques to ensure image quality even when paired with low cost, high-resolution CMOS sensors commonly found in mobile devices. The camerIC-18 IP core also supports wide dynamic range processing and digital image stabilization, along with an extensive set of standard features.

In addition to its digital still camera capabilities, the camera pipeline has the imaging bandwidth to support HD, 3D, 4K and higher resolution video camcorder ISP functions. A 4K resolution camcorder design with the camerIC-18 ISP running at 30 frames per second will require as few as 700k gates to implement in hardware while consuming as little as 125mW of power. The camerIC hardware design is optimized to consume as little as 30 MIPS of CPU bandwidth — making the camerIC-18 one of the industry’s highest performing, lowest cost/power camera processors.