Abstract:
Papers provide innovative and practical options for realizing the semiconductor roadmap for the 22 nm half-pitch node and beyond

SEMATECH Experts Report Progress on Enabling EUVL at SPIE

Albany, NY and Austin, TX | Posted on February 11th, 2009

SEMATECH and International SEMATECH Manufacturing Initiative (ISMI) experts will present world-leading research and development results on extreme ultraviolet (EUV) manufacturability and extendibility, alternative lithography, and related areas of metrology at the SPIE Advanced Lithography 2009 conferences on February 22-27 at the San Jose Convention Center and Marriott in San Jose, CA.

SEMATECH engineers will report their progress on assessing EUV lithography (EUVL) manufacturability and on advancing EUVL extendibility and alternative lithography and will showcase some of their findings in 12 papers demonstrating breakthrough results in exposure tool capability, resist advances, defect-related inspection, reticle handling, and nanoimprint.

"We are enthusiastic about sharing our progress on some of the most critical determiners for the development of EUV infrastructure," said Bryan Rice, director of lithography at SEMATECH. "SEMATECH's leadership in enabling EUVL pilot line readiness and in researching new techniques for advancing EUV extendibility and alternative lithography, coupled with access to the full-field exposure tool, located at the University at Albany's College of Nanoscale Science and Engineering, demonstrate how our research continues to support EUV readiness for the 22 nm half-pitch node."

· 8:40 a.m.: SEMATECH research activities on EUV full-field exposure tool - will evaluate the performance of an alpha demo tool (ADT) exposure tool, looking specifically at the status of EUVL and its supporting infrastructure.

· 9:40 a.m.: Estimation of cost comparison of lithography technologies at the 22 nm half-pitch node - will identify key cost factors for different lithography candidates, investigate their corresponding cost targets, and discuss the cost dependence of different types of integrated devices on lithography technology.

· 3:50 p.m.: SEMATECH's nanoimprint program: a key enabler for nanoimprint introduction - will explore many of the critical aspects of the nanoimprint process and drive key improvements in overlay, template cleaning, and defectivity toward making nanoimprint technology a cost-effective alternative for CMOS development and manufacturing applications.

Key ISMI presentations in the Metrology, Inspections, and Process Control for Microlithography sessions include the following:

· 1:40 p.m., Tuesday, February 24: CD-SEM parameter influence on image resolution and measurement accuracy - will show experimental SEM resolution results, including influences of many different parameters such as SEM focus and stigmation, filter, and threshold levels.

· 4:10 p.m., Wednesday, February 25: Phenomenology of electron-beam-induced photoresist shrinkage trends - will examine the readiness of SEM metrology for the challenges presented by both dry and immersion ArF lithographies and will calculate the errors involved in estimating the original CD from the shrinkage trend.

For a complete listing of papers authored or co-authored by SEMATECH researchers, or highlighting SEMATECH research, please visit www.sematech.org/corporate/news/features/spie2009.htm.

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About SEMATECHFor 20 years, SEMATECH® (www.sematech.org), the global consortium of leading semiconductor manufacturers, has set global direction, enabled flexible collaboration, and bridged strategic R&D to manufacturing. Today, we continue accelerating the next technology revolution with our nanoelectronics and emerging technology partners.