1. can the inteernal LDO has the capability to supply ADuM1400 , ADuM1200 and pats of AD5410 pull high termination?

A: The DVCC pin of the AD5410 can typically supply 5mA. Looking at the ADuM data sheets, most setups will not allow you to get the supplies from the DVCC pin of the AD5410. You can still pull up to 20mA but that would case self-heating and could have compliance voltage issues.

2. if the soreware issue, especially clear , Iout should drop to 4mA rather than 0mA, there is no decoupling cap for AVdd, can this defect cause this issue?

A: Just to clarify, what do you mean by soreware? If you mean software, the AD5410 do not have a software clear command but there is a software reset command that returns the part to the default power-on state. Asserting the CLEAR pin will return the current to 4mA (assuming 4-20mA range is used).

3. the pad on the bottom of the chip is for thermal dispation, right? if we didn't connect the pad to AGND, dese the chip will be uncontrollable in some condition except thermal issue?

A: It is recommended that the paddle be connected for better thermal performance. If it is not connected, the heat from the part will not be fully dissipated and could cause the max junction temperature to be exceeded and consequently damage the part.

4. poor layout could cause this issue? I mean poor grounding

A: From the sequence of your questions it seems that you are pulling current from DVCC and not properly dissipating the heat through the EPAD. If so, the current sourced from the DVCC pin should be reduced and connect the EPAD to a ground plane on the PCB.

1. if possible, we 'd better to used external power supply for both DVCC and the other chip(ADuM1400 , ADuM1200 ) to avoid possible issue caused by DVCC, right?

2. sorry, this is a typo issue, it should be "software", I mean that we set configuration for output 4mA-20mA, if noise occurred and impect CLEAR pin, it should drop to 4mA rather than 0mA, it shoud drop to the bottom of the scale range

3&4. this project is an old project and the designer had left for years. I just found that there were many design defects according to the latest datasheet. I checked with software engineer who developed the firmware, there was no Figure 40 which tell us the programming sequence to write/enable the output correctly. we didn't add softare reset after power on the chip, does this software defect will impect the drop issue?

now, we had modified the board and used an external power supply for three chips and add software reset in latest firmware to test in customer site, and the drop issue didn't occurred for two weeks.