First of all, thanks for all info supplied through the forum and site.

Secondly, here's my problem , well it's not a problem, it's more looking for some advice. I'm trying to create a simple time multiplexing circuit. I've added the schematics here :
The 10K, 5K, 2K should be potentiometers. Basically, it's some kind of ADC converter, and the output is driven by the decade counter. Do you think such circuit will work?

Every pulse into RxD ( Pin 2 ) means a change in channel. After a pulse in RxD, the first change in state of DSR ( Pin 6 ) is ignored, the mark period is detected for the next pulses until pulse in RxD.

I don't really understand what you are trying to do but to prevent output data changing during a sampling period, you will need to have the outputs of the signal 555s going to some sort of data latch.
As an example put D-type flip-flop between each 555 output and the AND gate with the flip-flop clock coming from the multiplexing clock.