Students are
invited to propose a topic they would be interested in
presenting, during a special one-hour session to take place
the Tuesday 28th August (16:00 - 16:55). Those
selected will be invited to give a short presentation (in
the order of 5 to 10 minutes maximum).

The
presentation, in particular if short, would not
necessarily require presentation material (such as
PowerPoint slides)

The choice of topic is free but
should be related in some way to the school. Examples, you
may briefly talk about:

A
scientific / technical topic

HEP,
HEP computing, on-line, off-line, Grid, ...

HEP
Sister disciplines, Computer science, ...

Other

Your
presence here

Why
are you here, where do you come from, what is your
discipline, what are you expecting from the school,
how do you think you will be exploiting the
knowledge acquired here, ...

Note: if you
are presenting in a group, please select one of you to use
the login and password and write the names of all members of
the group in the description.

Selected proposals and final programme

Tuesday 28th of August, 16:00

The seven proposal made at
the deadline, Saturday, 25 August, 12:30 have been
accepted the programme is therefore as follows:

All presentations will last
10 minutes maximum. A mentor is associated to each
presentation to briefly review the will review the slides.

Allowing 10 minutes per
presentation obliges to postpone the next two hours of the
day by 15 minutes.

Presentation summarizes every day problems with grid site
administration (from the perspective of site admin).
Furthermore, short description and demo of prototype
monitoring solution done within Grid Service
Monitoring Working Group are given.

Since people were interested why I used more than two parallel
threads when I had only two processing cores, and
because I was asked to share that information with
the others, I decided to create just few slides to
help people to understand this subject better.

One of our main fields of interest in CERN openlab is
virtualization. Using virtualization we can deploy
virtual machines on demand and adapt their
configuration to users' requirements. In addition,
we are working together with HP Labs (Palo Alto,
USA) and we are using one of their projects (Tycoon)
in order to reach a market driven approach.

Programmable Logic (FPGAs) enables implementation of algorithms
in hardware, providing orders of magnitude better
performance when compared to software running on
conventional CPUs. But why? And is it true for all
algorithms? And is it just for hardware cracks, or
is there a way to access this option from
conventional programming environments? We will see
:-)