The external interrupts are associated with specific interrupt pins. They can be set to signal on a LOW level, RISING edge, FALLING edge, or CHANGE (both rising and falling edge).

There is one "Pin Change" interrupt per port (8-bit group of I/O pins). The pins within the group can be individually masked. The pins are sampled periodically and the interrupt is signaled if any of the un-masked pins has changed. If you have more than one pin in a port enabled you have to read the interrupt flag register to find out which pin(s) changed.

Pin-change...• Applies to all pins• Overloaded; all pins on a port are vectored through a single interrupt handler• Fires only on CHANGE• Processor clock does not need to be running

External...• Applies to only specific pins• One-to-one; each pin has a dedicated interrupt handler• Can be configured to fire on RISING, FALLING, LOW, CHANGE• Requires the processor clock to be running (except LOW)

Each pin on that processor is capable of generating a pin-change interrupt. If any pin is configured to generate a pin-change interrupt, when the interrupt occurs, execution is vectored through a single interrupt service routine.

You're going to have a tough time using any core with an ATtiny13. It really does not have much memory (64 bytes of SRAM; 4 bytes are used just getting into loop). The processor was really meant to be programmed using assembly or possibly "raw" C.

There is an enormous amount of information available regarding pin-change interrupts.