Abstract: A method for fabricating microelectromechanical systems containing a glass diaphragm formed on a silicon macrostructure is disclosed. The method comprises the steps of: (a) obtaining a silicon wafer and forming a cavity in the silicon wafer; (b) using a flame hydrolysis deposition technique to deposite glass soot into the cavity, the glass soot fills the cavity and extends onto the external surface of the silicon wafer so as to form a glass soot layer having a predetermined thickness; and (c) heat-consolidating the glass soot at temperatures between 850.degree. and 1,350.degree. C. so as to cause the glass soot to shrink and form a glass diaphragm over the cavity. The shrinkage ratio between the glass diaphragm and the glass soot layer is between 1:20 to 1:50. The silicon wafer can be further fabricated to contain a diaphragm-sealed cavity and/or a diaphragm-converted cantilever.

Abstract: A new method of trench isolation incorporating thermal stress releasing voids is described. Two sets of narrow trenches are etched into the silicon substrate not covered by a photoresist mask wherein the second set of trenches alternate with the first set of trenches. The first set of trenches is filled with an insulating layer. A second insulating layer is deposited over the surface of the substrate and within the second set of trenches wherein said insulating layer has step coverage such that voids are formed and are completely enclosed within the second set of trenches completing the thermal stress releasing device isolation of the integrated circuit. The method of forming thermal stress released polysilicon gate spacers in an integrated circuit is described. Polysilicon gate electrodes are formed on the surface of the semiconductor substrate. Successive sidewalls are formed on the gate electrodes of thin silicon dioxide, silicon nitride, and silicon dioxide.

Abstract: A semiconductor gas rate sensor includes a base composed of a first semiconductor substrate and a second semiconductor substrate bonded thereto by a thermosetting adhesive layer deposited on a mating surface of the second semiconductor substrate, the base having a gas flow passage defined therein and a nozzle defined therein for injecting a gas flow into the gas flow passage, and a detector disposed in and extending across the gas flow passage for detecting a deflected state of the gas flow when an angular velocity acts on the base, the nozzle being formed between a recess defined in mating surface of the first semiconductor substrate and the mating surface of the second semiconductor substrate.

Abstract: This invention deals with the formation of the multi-level electrode metal structure and the interconnecting inter-level metal studs used in the fabrication of VLSI circuits. After the metal layers have been formed the inter-level dielectric material used in forming the structure is etched away leaving an air dielectric between the levels. The electrode metal and the inter-level metal studs are coated with a thin envelope oxide and the entire structure is covered with a passivation layer using material with a poor step coverage. The structure of this invention provides reduced parasitic capacitance, better step coverage in interconnecting layers, and improved circuit performance.

Abstract: A dual gate metal semiconductor field effect transistor is disclosed which comprises a semi-insulating compound semiconductor substrate, a first and a second insulating layer in stripe pattern in different width formed on said semiconductor substrate at a predetermined angle against the <110> direction, a first semiconductor layer having a first and a second voids on said first and second insulating layers in stripe pattern, a second semiconductor layer subsequently formed to said first semiconductor layer, source and drain regions having impurities partially diffused to said first and second semiconductor layers, a first and a second gate electrodes formed in different width on said second semiconductor layer positioned corresponding to said first and second insulating layers in stripe pattern, source and drain electrodes formed on said source and drain regions.

Abstract: A metal connection for an integrated circuit device is effectively "cast" in place at any level of an integrated circuit. The "mold" for the connection is formed by depositing and patterning a sacrificial material, such as aluminum oxide or other metal oxides, and covering the sacrificial material with a protective material such as silicon dioxide or other insulators. After forming bore holes to the deposit of sacrificial material through the protective layer, the sacrificial material is removed by isotropic etching to form a cavity beneath and at least partially overlaid by the protective layer. Alternatively, a defect may be produced below the protective layer and filled with metal either with or without enlargement by further removal of material. This cavity is then filled with metal by deposition of the metal by, for instance, evaporation, sputtering and chemical vapor deposition or combinations thereof.

Abstract: A method for forming an air region or an air bridge overlying a base layer (12). Air regions (20a, 20b, 28a, and 48) are formed overlying the base layer (12) to provide for improved dielectric isolation of adjacent conductive layers, provide air-isolated conductive interconnects, and/or form many other microstructures or microdevices. The air regions (20a, 20b, 28a, and 48) are formed by either selectively removing a sacrificial spacer (16a and 16b) or by selectively removing a sacrificial layer (28, 40). The air regions (20a, 20b, 28a, and 48) are sealed, enclosed, or isolated by either a selective growth process or by a non-conformal deposition technique. The air regions (20a, 20b, 28a, and 48) may be formed under any pressure, gas concentration, or processing condition (i.e. temperature, etc.). The air regions (20a, 20b, 28a, and 48) may be formed at any level within an integrated circuit.

Abstract: A dielectric buried layer is formed inside substrates which are directly bonded together. Firstly, a groove or a recess, or both are formed on the principal bonding plane of one of at least two kinds of semiconductor substrates to be bonded together. Once the semiconductor substrates are bonded together, the groove and recess form a space, which is filled with dielectric. Before forming the dielectric buried layer, the invention carries out a process of removing potential damage from corners of the groove and/or recess.

Abstract: A semiconductor circuit structure including a semiconductor substrate portion and at least one region provided on one main surface thereof insulatedly isolated from other regions provided on the same surface, by an burying means made of an oxide film, the burying means including a bottom flat portion and at least one side wall portion provided at least in the vicinity of an edge portion of and integrally formed with the bottom flat portion, thereby a semiconductor circuit structure provided with a plurality of insulatedly isolated regions on a main surface thereof and having a high withstand voltage can be obtained in a short production process.

Abstract: A method and apparatus for producing crystalline substrate for use in fabricating solid state electronic devices. A hollow crystalline body is grown from a melt containing a dopant and a P-N junction is formed in said crystalline body as it is being grown. Then the hollow body is severed to provide individual solar cell substrates.

Abstract: A method and apparatus for producing crystalline substrates for use in fabricating solid state electronic devices. A hollow crystalline body is grown from a melt containing a dopant and a P-N junction is formed in said crystalline body as it is being grown. Then the hollow body is severed to provide individual solar cell substrates.

Abstract: A semiconductor processing method is provided for growing a semiconductor film from a semiconductorbearing gas on a substrate at a substrate temperature below the pyrolytic threshold of the gas. The gas is photodissociated to a collisionally stable species which migrates and travels in the gas phase the entire distance to the substrate, surving hundreds of collisions, and is pyrolyzed at the surface of the substrate and forms several monolayers of semiconductor material which is substantially more catalytically active than the substrate and which subsequently catalyzes decomposition of the gas.