You don't have to be great
to start,
but you have to start to be
great
― Zig Ziglar
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such as the ability to switch into other modes
• Useful if direct access to system memory and hardware devices
System Management Mode (SMM)
• Provides an operating system with a mechanism for implementing
functions such as power management and system security
• These functions are usually implemented by computer manufacturers
who customize the processor for a particular system setup
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.Modes of Operation
x86 processors have three primary modes of operation:
Real-Address Mode
• Implements the programming environment of an early Intel processor
with a few extra features.

Modes of Operation
Protected Mode
• Native state of the processor. it
will not affect other programs running at the same time
• A modern operating system can execute multiple separate virtual-8086
sessions at the same time
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. the processor can directly execute real-address mode
software such as MS-DOS programs in a safe environment
• If a program crashes or attempts to write data into the system memory area. in which all instructions and features are available
• Programs are given separate memory areas named segments
• Processor prevents programs from referencing memory outside their assigned
segments
Virtual-8086 Mode
• In protected mode.

each program has its own 1MByte memory area
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. a technique called extended
physical addressing allows a total of 64 GB of physical memory
to be addressed
• Real-address mode programs can only address a range of 1 MB
• If the processor is in protected mode and running multiple
programs in virtual-8086 mode.Basic Execution Environment
Address Space
• In 32-bit protected mode. a task or program can address a
linear address space of up to 4 GB
• Beginning with the P6 processor.

loop counters are held in registers rather than
variables
•
•
•
•
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Eight general-purpose registers
Six segment registers
Status flags register (EFLAGS)
Instruction pointer (EIP)
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. for
example. designed to be accessed at much higher
speed than conventional memory
• When a processing loop is optimized for speed.Basic Program Execution Registers
• Registers are high-speed storage locations directly
inside the CPU.

General-Purpose Registers
• The general-purpose registers are primarily used for
arithmetic and data movement
• As shown in Figure. the lower 16 bits of the EAX register
can be referenced by the name AX
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.

EBX. the AX register has an 8-bit upper half
named AH and an 8-bit lower half named AL
• The same overlapping relationship exists for the EAX. ECX. and EDX registers:
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.General-Purpose Registers
• Portions of some registers can be addressed as 8-bit
values
• For example.

General-Purpose Registers
• The remaining general-purpose registers can only be
accessed using 32-bit or 16-bit names. as shown in the
following table:
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.

Specialized Uses
Some general-purpose registers have specialized uses:
• EAX (extended accumulator) is automatically used by
multiplication and division instructions
• The CPU automatically uses ECX as a loop counter
• ESP (extended stack pointer) addresses data on the stack. It is
rarely used for ordinary arithmetic or data transfer
• ESI (extended source index) and EDI (extended destination
index) are used by high-speed memory transfer instructions
• EBP (extended frame pointer) is used by high-level languages to
reference function parameters and local variables on the stack
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.

interrupt when arithmetic overflow is detected
• Programs can set individual bits in the EFLAGS register to control the
CPU’s operation
• Examples are the Direction and Interrupt flags
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. they can cause the CPU to break after every instruction
executes.Specialized Uses
EFLAGS Register
• Consists of individual binary bits that control the operation of the CPU
or reflect the outcome of some CPU operation
Control Flags
• Control flags control the CPU’s operation
• For example.

Specialized Uses
Status Flags .Reflect the outcomes of arithmetic and logical operations
• The Carry flag (CF) is set when the result of an unsigned arithmetic operation is
too large to fit into the destination
• The Overflow flag (OF) is set when the result of a signed arithmetic operation is
too large to fit into the destination
• The Sign flag (SF) is set when the result of an arithmetic or logical operation
generates a negative result
• The Zero flag (ZF) is set when the result of an arithmetic or logical operation
generates a result of zero
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.

the parity flag would be 0 since the number of set bits
is odd. assume a machine where a set parity flag indicates even parity. If the result of the
last operation were 26 (11010 in binary). if the result were 102 (1100110 in binary) then the parity flag would be 1
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.Specialized Uses
Auxiliary Carry flag (AC)
• It is located at bit position 4
• The Auxiliary flag is set (to 1) if there is a carry from the low nibble (lowest four bits) to the high
nibble (upper four bits). or a borrow from the high nibble to the low nibble. in the low-order 8-bit
portion of an addition or subtraction operation
Parity flag
• The Parity flag (PF) is set if the least-significant byte in the result contains an even number of 1
bits
• It is used for error checking when there is a possibility that data might be altered or corrupted
• The Parity flag indicates if the number of set bits is odd or even in the binary representation of
the result of the last operation
• For example. Similarly.

MMX instructions operate in parallel
on the data values contained in MMX registers
• Although they appear to be separate registers. the MMX
register names are in fact aliases to the same registers
used by the floating-point unit
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. Multiple-Data)
• As the name implies.MMX Registers
• MMX technology improves the performance of Intel
processors when implementing advanced multimedia and
communications applications
• The eight 64-bit MMX registers support special
instructions called SIMD (Single-Instruction.

Floating-Point Unit
• The floating-point unit
(FPU) performs high-speed
floating-point arithmetic
• At one time a separate
coprocessor chip was
required for this
• There are eight floatingpoint data registers in the
FPU
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.

including
addresses that are linked directly to system hardware
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. but it does restrict
application programs from directly accessing system hardware
real-address mode
• In real-address mode. only 1 MB of memory can be addressed. from
hexadecimal 00000 to FFFFF
• The processor can run only one program at a time.x86 Memory Management
• x86 processors manage memory according to the basic modes of operation
discussed
• Protected mode is the most robust and powerful. but it can momentarily
interrupt that program to process requests (called interrupts) from peripherals
• Application programs are permitted to access any memory location.

x86 Memory Management
Protected mode
• The processor can run multiple programs at the same time
• It assigns each process (running program) a total of 4 GB of memory
• Each program can be assigned its own reserved memory area. and programs
are prevented from accidentally accessing each other’s code and data
Virtual-8086 mode
• The computer runs in protected mode and creates a virtual-8086 machine with its own
1-MByte address space that simulates an 80x86 computer running in real address mode
• You can run many such windows at the same time. and each is protected from the
actions of the others
• Some MS-DOS programs that make direct references to computer hardware will not run
in this mode
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.

048. and begin following the
room numbers to locate a room
• The offset of a room can be thought of as the distance from the elevator to the room
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.576 bytes of
memory (1 MB) using 20-bit addresses in the range 0 to FFFFF
hexadecimal
• Intel engineers had to solve a basic problem:
• The 16-bit registers in the Intel 8086 processor could not hold 20-bit addresses
• They came up with a scheme known as segmented memory
• All of memory is divided into 64-kilobyte (64-KByte) units called segments.Real-Address Mode
• In real-address mode. in which segments represent the building’s floors
• A person can ride the elevator to a particular floor. get off. shown in
Figure
• An analogy is a large building. an x86 processor can access 1.

it is omitted when representing segment values
• A segment value of C000. represents an offset
of 250 inside the segment beginning at address 80000
• The linear address is 80250h
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. add a 16-bit offset (0 to
FFFF) to the segment’s base location
• The address 8000:0250. for example.Real-Address Mode
• Each segment begins at an address having a zero for its
last hexadecimal digit Because the last digit is always
zero. refers to the
segment at address C0000
• To reach a byte in this segment. for example.

SS)
• A 16-bit offset value
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.Real-Address Mode
20-Bit Linear Address Calculation
• An address refers to a single location in memory.
ranging from 0 to FFFFF hexadecimal
• Programs cannot use linear addresses directly. ES. and x86 processors
permit each byte location to have a separate address
• The term for this is byte addressable memory
• In real-address mode. placed in one of the segment registers (CS. so addresses are
expressed using two 16-bit integers
• A segment-offset address includes the following:
• A 16-bit segment value. the linear (or absolute) address is 20 bits. DS.

which
the operating system uses to keep track of locations of
individual program segments
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. using addresses 0 to FFFFFFFF hexadecimal
• The flat segmentation model is appropriate for protected
mode programming because it requires only a single 32-bit
integer to hold the address of an instruction or variable
• Segment registers point to segment descriptor tables.Protected Mode
• Protected mode is the more powerful “native” processor
mode
• When running in protected mode. a program’s linear address
space is 4 GB.

a 64-bit
integer stored in a table known as the global descriptor
table (GDT)
• Figure shows a segment descriptor whose base address field
points to the first available location in memory (00000000)
• In the figure.Flat Segmentation Model
• In the flat segmentation model. the segment limit is 0040
• The access field contains bits that determine how the
segment can be used
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. all segments are mapped to
the entire 32-bit physical address space of the computer
• Each segment is defined by a segment descriptor.

each entry in the LDT points to a different segment in
memory
• Each segment descriptor specifies the exact size of its segment
• For example. which can be distinct from all
segments used by other processes
• Each segment has its own address space
• In Figure. called a local descriptor table (LDT)
• Each descriptor points to a segment.Multi-Segment Model
• In the multi-segment model. which is computed as (0002 1000 hexadecimal)
• The segment beginning at 8000 has size A000 hexadecimal
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. the segment beginning at 3000 has size 2000
hexadecimal. each task or program is given its own
table of segment descriptors.