[039] Forward Converter Design - Part VI Current Limiting

Design and testing of rugged current limiting for the forward converter.

Introduction

This article continues the series in which Dr. Ridley documents the processes involved in taking a power supply from the initial design to the full-power prototype. In part VI, attention is turned to implementing proper current limiting to ensure a rugged power supply under all conditions.

Primary Current Sensing

In Parts IV and V of this series of articles [1], voltage spikes were properly controlled on both the primary and secondary of the power supply to prevent failure of the power semiconductors. With this done, the power supply can be taken up to full input voltage, and full load on the output.

It is tempting to do a substantial amount of data collection at this point to make sure the power supply is regulating properly, and to test parameters such as efficiency, regulation, and thermal rise. However, it is advisable to move on to a phase of testing that most designers do not look forward to – current-limit testing, and short-circuit testing to make sure the power supply is rugged.

Many engineers leave the short-circuit testing until the end of the power supply development. Experience tells them that this is often a destructive and time-consuming process, and they are reluctant to damage their first prototype so early in the testing process. However, it should be done immediately. Changes to the current-limiting and current-sensing circuits may lead to power component changes in order to survive short-circuit testing.

Figure 1: Two-switch forward converter with current sensing network. Current sensing components are shown in blue in this figure. It is recommended that a converter have two levels of current sensing – one for normal peak current limiting, as part of the main PWM control loop, and a second level for short-circuit protection.

The UC3825 control chip provides for two levels of current protection. The first level is implemented in the main PWM comparator, and the error voltage from the voltage feedback sets the peak current level on each cycle. This error voltage is clamped to around 4.5 V, providing a fixed limit to the current regardless of the state of the output voltage. However, this current sensing mechanism also has leading edge blanking, and for the first few hundred nanoseconds, the signal is ignored.

The filtered current sense signal is also divided by resistors Rx and Ry in Figure 1, and this is fed into the second current limit input, which has an immediate response when the signal exceeds the threshold of ILim. No leading-edge blanking is applied on this input, allowing for fast protection during short circuits.

Power Supply Startup Current Waveforms

The first instance of current limiting normally occurs during the startup of the power supply. Initially, the output capacitor of the power supply is discharged. For a few milliseconds, the capacitor looks like a short circuit. The severity of this test depends on the settings of the soft-start circuit. If the soft-start is very slow, current limit may not be encountered during start-up. With a faster soft-start, current limiting will be encountered during the turn-on process.

Figure 2 shows a waveform of the primary switch current during turn-on of the power supply. This is a waveform with a characteristic that you will hopefully not see in your power supply. There is a distinct curve at the top of the yellow waveform, showing that the power magnetics are saturating. A well-designed converter should never exhibit this characteristic under any test conditions.

Figure 2: Current-sense waveform with abrupt application of input voltage, and output capacitors discharged. Soft-start provides protection in addition to the current limiting. However, magnetics saturation is clearly visible in the current waveform. The red waveform shows the filtered current signal after the components Rf and Cf.