Originally published on
April 22nd, 1996 in the Usenet newsgroup: Rec.Games.Pinball(revised January 2003)

The
mere mention the words "dead CPU board" or "microprocessor" is enough
to have some people running for cover. For those not familar with this
area of technology, repairing anything with a microprocessor can seem
can seem a daunting and frightening task. If you are one of those afflicted
with this fear then I hope this article will go some way to alleviate
those fears.

In this article we will be cover 8-bit microprocessors from
early, pre 1982, solid state pinball machines. The Rockwell 6502 and
Motorola 6800, 6802 and 6808 were the processors of the day.

Microprocessor Usage Table

Williams

System 3 and 4 MPU - 6800 microprocessor

Williams

System 6 MPU - 6802 or 6808 microprocessor

Williams

D8223 Sound + Speech - 6802 or 6808 microprocessor

Bally

AS-2518-17 MPU - 6800 microprocessor

Bally

AS-2518-35 MPU - 6800 microprocessor

Bally

AS-2518-51 Sound - 6802 or 6808 microprocessor

Bally

AS-2518-61 Squawk & Talk - 6802
or 6808 microprocessor

Gottlieb

System 80/A MPU - 6502 microprocessor

Gottlieb

System 80/A sound - 6502 microprocessor

Achitecture

All
the microprocessor listed above have the same basic architecture.
They are have three busses: A 16-bit 'address' bus, an 8-bit 'data'
bus and a 'control' bus.All the processors use NMOS (N-channel
Metal Oxide Silicon) technology.

The 6802 is identical to the 6808 with the exception that the
02 contains 128 bytes of internal RAM. To use this internal RAM, the
RE (RAM Enable) pin of the processor needs to be held high. If you wish
to test your processor you can place a 6808 into a socket previously
occupied by a 6802 with no ill effects. However, to do this you must ensure
RE is connected to zero volts and a 6810 RAM IC is placed into the socket
provided.

The
Address Bus

All
16 lines of the address bus (A0-A15) are omni-directional. Quite simply,
this means that data on this bus flows in only one direction, -- out of
the processor. These lines aer used to 'address' devices on the bus': RAM,
ROM, PIAs etc. The number of address line the microprocessor outputs determines
the size of the area it can address, for all those listed above, this
is 65336 bytes or ' 64kb'. In digital binary terms, one thousand equals
1024 and not 1000.

The Data Bus

Data
flows between the microprocessor and the devices connected to it (RAM,
ROM...) via this 8-line bidirectional bus. The microprocessor accepts
data (in) from the bus during a 'read' cycle and writes data (out) on
the bus during a 'write' cycle. The size of the data bus actually denotes
the size specified for the microprocessor. All the above are designated
as '8-bit' microprocessors.They are however, all capable of writing
16-bits of data. This is achieved by writing two 8-bit bytes one after
the other. The bytes are divided into 'high' and 'low' bytes. The low
byte would contain bits 0-7 and the upper bit 8-15.

The Control Bus

There
are various signals here associated with each microprocessor but the
specific signals we are interested in are listed below. (Note that
an asterisk (*) next to the signal name indicates that the signal is
active when low/zero volts):

Clock

Not
really part of the control bus but the most important pin outside the
power and ground pins. This input recieves a TTL clock pulse from an
external crystal oscillator, in most cases. Early Bally CPUs did not
use a crystal, instead a multivibrator circuit was used. The clock is
extremely important as all bus timing events and processing is derived
directly from this signal.

Reset*

Used
as you would expect, to 'reset' the microprocessor. This pin is an input
and in all cases the line must be held low for a predetermined time period
as power is applied. This allows the processor to stabilise the internal
circuits correctly as the power reaches the correct level. Being an input,
the processor cannot assert reset to other devices on the bus. The reset
line is also common among other ICs such as the 6820/1 PIA (Peripheral
Interface Adaptor).

R/W*
(Read/Write*)

This
control signal is output by the microprocessor whenever data flows.
If the microprocessor is performing a 'read' cycle, it will assert
this pin high to inform devices on the bus that it requires to read
data from the address specified by the address lines. If the microprocessor
wants to write data, it asserts this line low.

Interrupts:
IRQ* and NMI*

Interrupts
are exceptional conditions. They serve to interrupt the microprocessors
from it's current task (for example, running the main program). The
microprocessor then jumps to a unique location where it runs a
program or 'service routine' associated with the interrupt type. When
the routine has been run and is complete, the microprocessor returns
to the main program and continues where it left off.

There are two different types of interrupt: IRQ refers to 'Interrupt
ReQuest' and NMI refers to 'Non-Maskable Interrupt'. IRQ is a masked
interrupt. Simply put, this means that when an IRQ interrupt has been
recognised by the microprocessor, it will not allow another IRQ (it will
ignore further IRQ requests) until it has finished running the current
IRQ service routine. NMI is a non-maskable interrupt (hence it's name)
and another NMI will be recognised as valid and acted upon even if the
processor is already running an NMI service routine. This effectively
interrupts the current interrupt to run another.

VMA:
Valid Memory Address

Anytime
the microprocessor placed an address on the bus, this signal is asserted
high. It's use depends on the hardware design engineer but commonly it
is used to aid the selection of devices on the bus (memory address decode
logic, bus drivers etc.).

How
It All Works

When
any of the microprocessors mentioned above power-up or receive reset
they go through a boot-up routine know as 'bootstrapping'. The microprocessor
outputs a fixed address after the reset line goes high which selects
the location or 'reset vector' which in turn my contain the first two
bytes that form the start address of the main program. The reset vector
always reflects and EPROM or masked ROM location on the pinball CPU boards
we are refering to. This automatic address function is built into the microprocessor
as part of it's internal achitecture and cannot be altered. The microprocesor
also asserts read/write high to indicate it is performing a read cycle
on the bus. The microprocessor loads the contents of the reset vector
into an internal counter known as the 'program counter'. It then treats
the contents of the program counter as the address of the main program
and makes a jump to that address to execute the first instruction. The
program is now effectively running.

Bootstrap
Example:

After
power-up, the Gottlieb System 80 6502 microprocessor issues the address
$FFFC onto the address bus and asserts the read/write line high to signal
a read cycle on the bus. Consequently, address $FFFC gives up it's contents
and places them onto the data bus. The 6502 then reads the byte of data
of the address bus and stores it as the low byte (bits 0-7) of the start
address in the program counter. The 6502 then issues $FFFD onto the address
bus and reads this byte on the data bus. It then places this byte into the
program counter as the high byte of the start address (bits 8-15). So,
if the contents of $FFFC was $00 and the contents of $FFFD was $80, the
program counter would loaded with $8000 and the processor would jump to
that address for it's first instruction. Remember that in the case of the
6502, the low byte is asked for first ($FFFC, bits 0-7)) followed by the
high byte ($FFFD bits 8-15). Motorola flipped this and fetched the high byte
first followed by the low byte. The address of the reset vector is also
different but this is of no real importance unless you are actually programming
the systems.

By the way, the program counter is simply a 16-bit counter that
keeps track of the program address.

The
Stack

An
area of RAM needs to be reserved for something called the 'stack'. The
stack is needed by the microprocessor for storing information, in particular,
address's. Whenever the processor is interrupted, it needs to remember
what address it was at before the interruption occurred. It does this
by placing the current address plus onto the stack. Plus one because
it will finish the current instruction and will want to return to the
next instruction to carry on. It retrieves this address when the interrupt
is over so that it may carry on as before. The processor also saves the
contents of it's internal registers onto the stack before processing
interrupts.