At the lowest end of our testing, we have a 16GB DDR3-1333 9-9-9 kit on hand. When DDR3 was first released, the main speed available was DDR3-800, but enough time has passed that this has phased out and now 1333 MHz is the new ‘minimum’. With the prices of memory as they are, this kit from G.Skill currently retails for $75, meaning that a massive amount of memory is available for all at a reasonable level. To put this into contrast, I remember spending ~$240 on a 2x2 GB Kit of DDR2-800 5-5-5 about 5-6 years ago – we can now get four times the capacity for less than a third of the price.

DDR3-1333 sits at the bottom end, but within months we can imagine DDR3-1600 taking that spot – as we will see with the next kit, for $5 more we get a faster product.

Visual Inspection

Our first kit features G.Skill’s Ares branding – the Ares kits that G.Skill sell are essentially meant to be the lower profile but colored heatsinks. These heatsinks in all honesty may not be entirely necessary for cooling, but they are firmly bonded to the memory modules and removing them would be a large task and more than likely damage the module. I have seen horror stories of chips being removed along with the heatsink, making the memory unusable. As a result we cannot directly observe which ICs are being used in our kits for this review. A quick word in the ear of G.Skill and they will not tell us the information, under the guise that it is classified and if the competition wants to know what G.Skill are using, they will have to buy a kit and break it themselves. Given how small the margins are in memory sales (as well as potential market stagnation after the credit crisis), I’m not surprised with the level of secrecy.

Anyway, back to the kit:

The standard packaging at G.Skill is a rather efficient plastic container holding each of the modules. The packaging is easy enough to open, though I also found it fairly brittle, meaning small shards could break off and be easily lodged in feet. Inside the box itself is a piece of card to advertise the kit and protect the modules from each other. We also get a small G.Skill sticker for the computer case.

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114 Comments

You are also incorrect, as well as highly misleading to anyone who cares about practical matters regarding DRAM latencies.

Reasonable people are interested in, for example, the fact that reading all the bytes on a DRAM page takes significantly less time than reading the same number of bytes from random locations distributed throughout the DRAM module.

People who care about practical memory performance worry about the inherent non-uniformity in DRAM access latencies and the factors that prevent efficient DRAM bandwidth utilization. In other words, just row-cycle time (tRC) and the pin bandwidth numbers are not even remotely sufficient to speculate how your DRAM system will perform.

DRAM access latencies are also significantly impacted by the memory controller's scheduling policy - i.e. how it prioritizes one DRAM request over another. Row-hit maximization policies, write-draining parameters and access type (if this is a cpu/gpu/dma request) will all affect latencies and DRAM bandwidth utilization. So just sweeping everything under the carpet by saying that every access to DRAM takes the same amount of time is, well, just not right. Reply

And yet, by any practical definition, you are incorrect and the author is correct.

For example, if you read (from RAM) 1GiB of data in sequential order of memory addresses, it will be significantly faster than if you read 1GiB of data, one byte at a time, from randomly selected memory addresses. The latter will usually take two to four times as long (or worse).

It is not unreasonable to refer to that as the difference between sequential and random reads.

Your argument reminds me of the little boy who, chastised by his mother for pulling the cat's tail, whined, "I didn't pull the cat's tail, I just held it and the cat pulled."Reply

Depending on whether there is a page-hit (row needed already open), page-empty (row needed not yet open), or page-miss (row needed is not the row already open), the time to read a word can vary by a factor of 3 times (i.e., 1x latency for a page-hit, 2x latency for a page-empty, and 3x latency for a page-miss).

What the author refers to as a "sequential read" probably probably refers to reading from an already open page (page-hit).

While his terminology may be ambiguous (and his computation for the "sequential read" is incorrect, it should be 4 clocks), he is nevertheless talking about a meaningful concept related to variation on latency in DRAM for different types of reads.

Either pay $95 for 1866 C9 or $130 for 2133 C9 - minor differences, but $35 saving. This is strictly talking about the kits used today, there could be other price differences. But I stand by my recommendation - for the vast majority of cases 1866 C9 will be fine, and there is a minor performance gain in some scenarios with 2133 C9, but at a $35 difference it is hard to justify unless you have some spare budget. Most likely that budget could be put into a bigger SSD or GPU.

Something has to be said about the TridentX brand I believe.. since it is getting some pretty killer feedback. It's simply the best ram out there being able to do all that any other ram can and that little bit extra. I don't see the speed increase as a selling point but the lower timings at conventional speeds that users are reporting is interesting.. I haven't tried it though.. just going on what I've read. Shame about the size of the heatsinks though.. makes it problematic in some builds.Reply