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The link given in pdf AR65444 points to an old version of Xilinx driver.The link to github seen shows updated version of both Xilinx_files(org.driver) and Xilinx_rel2018(new driver).

I tried old Xilinx file(github -which had some updates) and using the./dma from device and ./dma to device on command line works.But when running run_test.sh, it starts the first transfer and in dmesg outputs till h2c engine starts running.After that ,there is no output(on both side-kernel and user).I observe that the interrupts are not getting serviced and i think thats why the next transfer doesnt start and dma gets stuck there.

Re: PCIe XCZU4CG

I edited the MAP_SIZE to 4K in reg_rw.c and offset which was earlier 0x44A00000 is set to 0x0000 in Axi lite interface and now works. Dma_to_device which was getting stuck now gives successful write after resetting the count to a small value which was initially a very high value.Now H2C works but C2H does not work.

Also, at a time only one interface works. That is, if i am using ./reg_rw/xdma0_user(Axi lite) for write and read-which works,then the dma(MM interface) wont work and vice versa. Please suggest!!

Re: PCIe XCZU4CG

Dma write works. But only for 10bytes transfersize. Dma gets stuck on Higher value of transfer size like 100,1024 etc.Dma read doesnt work. Interrupt not getting serviced. In ILA,when read command is executed,i get arvalid=1.No transfer after then.What could be the reason?