A smart solution to sequence and monitor multiple power rails in a system

Electronic systems that include a central processing unit (CPU), digital signal processor (DSP), microcontroller (MCU), field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC) can have multiple voltage rails and require certain power on/off sequences in order to function correctly. TI’s UCD9090A power-supply sequencer and monitor with Advanced Configuration and Power Interface (ACPI) support can control up to 10 voltage rails, ensures correct power sequences during both normal and fault conditions, and includes a dedicated fault pin to easily cascade multiple devices.

The UCD9090A is an upgrade to the former UCD9090 (listed as not recommended for new designs [NRND]). In this post, I will explain the differences between the two devices, including their operation and features, and how to migrate from the UCD9090 to the UCD9090A. Table 1 lists the features included with the new UCD9090A.

The fault pin is a new feature that enables you to cascade multiple TI UCD9090A devices with fault-pin capability. The fault pin is a bidirectional signal connected to a fault bus. The fault bus is pulled up to 3.3V by a 10K resistor. When no fault exists on a particular UCD9090A device, the fault pin is a digital input pin that listens to the fault bus. When one or multiple UCD9090A devices detect a rail fault, the corresponding fault pin turns to the active driven low state, pulling down the fault bus and informing all other UCD9090A devices of the corresponding fault. This way, coordinated action can occur across multiple devices. After the fault is cleared, the state of the fault pin turns back to an input pin. A diagram showing use of a fault pin is show in Figure 1.

Figure 1: Example using a typical fault pin

What is the GPI fault response?

This feature solves the issue of limited Analog Monitor (AMON) pins. For example, in the UCD9090, when all 10 rails are assigned to a voltage monitor; the system does not have the capability to monitor one more external event (e.g., OVER_TEMP) or one more rail. With the GPI fault response feature in place, the external event or POWER_GOOD of the point of load (POL) could connect to the assigned GPI. When the signal changes to de-asserted, the UCD9090A can help shut down the rails and retry and re-sequence the system based on how the GPI fault-response is configured.

What is GPI debugging?

To avoid triggering the PMBus alert, response fault or continue system watchdog during board-level debug or programming, a GPI pin can be assigned to perform a GPI debugging function on the UCD9090A. When asserting the assigned GPI, the device is under the GPI debug mode. The device will not activate the PMBus alert pin for any faults/warnings nor respond to any fault response. It will not log any faults, will suspend system watchdog and ignore the sequencing dependencies for rails.

What is the LGPO sequencing on/off dependency?

The UCD9090 only supports sequencing dependencies over rail and GPI. If users want to have sequencing dependencies on the LGPO, they have to physically wire the LGPO signal back to one of the GPIs. This approach requires two extra pins which could be an issue for applications that have limited pins available. The LGPO sequencing dependency feature was introduced with the UCD9090A to save the two extra pins for other functions.

What is the rail state?

Each device has up to nine states: INIT, IDLE, SEQ_ON, TON_DELAY, RAMP_UP, REGULATED, SEQ_OFF, TOFF_DELAY and RAMP_DOWN. The state of the rail can help you easily determine the status of the system so that you can more easily bring up or debug the power system. Figure 2 shows how the rail states are changed.

Figure 2: Rail state machine diagram

What is cold boot mode?

Cold boot is a feature specifically designed for cold-temperature applications like telecom. It has the intelligence to heat up a system by turning on the cold boot rails for certain amounts of time when it is experiencing extremely cold temperatures. The UCD9090A device communicates with the system through a particular GPI called the thermal-state GPI, which is a digital output from a thermal sensing device. The cold boot feature is fully configurable, enabling you to select enable/disable, the number of cold boot rails and the timeout period. Figure 3 is a pseudo processing call of how cold-boot is handled by the device.

Having these new features makes the UCD9090A a better candidate over the UCD9090 for various applications, but note that TI will continue supporting and building the UCD9090 until it reaches ten consecutive years of no sales.

The UCD9090 and UCD9090A are pin-to-pin compatible devices. The UCD9090A supports all features of the UCD9090. Moving to the UCD9090A does not require any schematic changes. Moreover, you can seamlessly import the project file (.xml) file generated from the UCD9090 into the UCD9090A with TI’s Fusion Digital Power Designer TM GUI to help reduce the migration effort.

Because of the new features, the script file (.csv) and data flash image file (.hex, .x0) are not compatible between the UCD9090 and UCD9090A. You cannot import files generated from the UCD9090 into the UCD9090A because the device will not function as expected. To use script file or data flash image file on the UCD9090A, follow these steps:

3. Once you have successfully imported the project, use the export function from the Fusion Digital Power Designer GUI to regenerate the .csv/.hex file. See Figure 5.

Figure 5: Fusion Digital Power Designer GUI Export Settings

4. Use the .csv/.hex file generated from step No. 3 for any programming utilities.

Hopefully this blog post provides you with a good comparison between the two devices and will help you migrate from the UCD9090 to the UCD9090A. If you have any additional questions, please post a response below or submit through TI’s E2E™ Community Sequencers forum.

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