Case Study: Utilization of Buried Capacitance

Embedding capacitive layers inside the PCB can reduce the number of chip decoupling capacitors on the PCB surface, while greatly improving the performance of the power distribution system. This technical paper, presented at DesignCon 2008, compares the performance of a standard PCB design to one using various types of buried capacitance layers with a reduced number of SMT decoupling capacitors.

Share

Printer Version

Case Study: Utilization of Buried Capacitance

Embedding capacitive layers inside the PCB can reduce the number of chip decoupling capacitors on the PCB surface, while greatly improving the performance of the power distribution system. This technical paper, presented at DesignCon 2008, compares the performance of a standard PCB design to one using various types of buried capacitance layers with a reduced number of SMT decoupling capacitors.