-Everything is physically in 32kB banks.-The tool just takes the same 16kB block and writes it one time in each 32kB bank, at your option, to mimmic a fixed-swappable configuration.

-this means that outside of the tool as-is, one can configure custom partitions; for example:-8kB interleaved/fixed, 24kB swappable per bank, or vice versa. -Have a 32kB bank and then a number of banks that behave like 16-16 ones. -basically any partition you can think of to be useful for your project.

I can note something I would have preferred to have: That the register is mapped at $1000-$1FFF and $3000-$3FFF in addition to $5000-$5FFF and $7000-$7FFF (although the $3xxx mapping will rarely if ever be used, it is still there simply due to how the logic is working), and it is written regardless of whether you read from or write to those addresses (if you read, it writes the value read).

I can note something I would have preferred to have: That the register is mapped at $1000-$1FFF and $3000-$3FFF in addition to $5000-$5FFF and $7000-$7FFF (although the $3xxx mapping will rarely if ever be used, it is still there simply due to how the logic is working), and it is written regardless of whether you read from or write to those addresses (if you read, it writes the value read).

I can note something I would have preferred to have: That the register is mapped at $1000-$1FFF and $3000-$3FFF in addition to $5000-$5FFF and $7000-$7FFF (although the $3xxx mapping will rarely if ever be used, it is still there simply due to how the logic is working), and it is written regardless of whether you read from or write to those addresses (if you read, it writes the value read).

I know that. (Those addresses would access both the RAM/PPU and the cartridge simultaneously, which can be useful, but regardless of that, it means one less bit of logic (two, if you also ignore R/W).)

Would it be theoretically possible to remap the registers individually in a future revision, or is it too inconvenient hardware-side?

My impression so far has been that while it looks practical to have it all in one and the same register, it is actually a bit inconvenient code-wise since you need to load merge states with changes before writing.

Would it be theoretically possible to remap the registers individually in a future revision, or is it too inconvenient hardware-side?

My impression so far has been that while it looks practical to have it all in one and the same register, it is actually a bit inconvenient code-wise since you need to load merge states with changes before writing.

Separating things out into different registers will likely at least double the mapper logic required, so I'm guessing it wouldn't align with the Membler's goal with the mapper. The amount of discrete logic chips will start to compare to a small CPLD which could provide a much richer feature set. In reality once you start separating things into separate registers you're getting into the MMC1 scale mapper level.

_________________If you're gonna play the Game Boy, you gotta learn to play it right. -Kenny Rogers

Are prices of those guys posted anywhere? Looks like the slg46824 would be the best part to target as it's I2C in system programmable and also comes in more friendly TSSOP-20 packaging with high i/o and flipflop count in comparison to other versions (17 i/o & FF's). Other parts appear to have pretty good pricing available for purchase on their site $0.30-0.50ea if you can handle the 100-3k min qty. No indications of the slg46824's pricing though, shot off a sales inquiry to see what they have to say..

_________________If you're gonna play the Game Boy, you gotta learn to play it right. -Kenny Rogers

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