Chen promotes nanotechnology research

ECE News

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Devices have the potential to scale beyond the physical limitations of CMOS, the current technology for making integrated circuits.

Chen is involved in other panels and is co-editing a book to help promote system-level nanotechnology research.

Deming Chen

ECE Assistant Professor Deming Chen wants more people to know about nanoscale technology, specifically at the systems level. And this summer he worked on just that.

Chen organized and presented a tutorial at the 46th Design Automation Conference in San Francisco. He presented the tutorial, “From Nanodevices to Nanosystems: Promises and Challenges of IC Design with Nanomaterials” on July 31.

“This conference is the number one conference in our field,” Chen said. “It’s also a conference with a lot of history.” It typically attracts close to 10,000 people from academia and industry. Companies display state-of-the-art products on the exhibition floor, while workshops, panels, paper presentations, and tutorials are also offered.

Chen’s tutorial was one of six presented. While writing the proposal for this tutorial to the conference, Chen needed to find experts to collaborate with on the presentation. University of Pennsylvania Professor André DeHon joined Chen as a co-organizer, while UCLA Professor Yong Chen, IBM Fellow Stuart Parkin, and Stanford University Assistant Professor Subhasish Mitra will also speak.

“I had the idea of offering such a tutorial because nanotechnology has been a very hot topic,” Chen said. “But the main research is done at the device level. Relatively speaking, there is little research at the system level. I think the main reason is that it’s quite challenging because these nanomaterials have their own unique properties and are in general foreign to CMOS designers and researchers.”

Researchers are using nanotubes and nanowires to build new, higher-performance devices. Since these devices are at the nanoscale, they have the potential to scale beyond the physical limitations of CMOS, the technology for making integrated circuits now. By researching these devices at the system level instead of the device level, a new generation of nanocircuits can be modeled, evaluated, and potentially fabricated in the future. Chen pointed out that this is important because realizing the true impact of nanotechnology demands that we translate the device-level capabilities into system-level benefits.

The tutorial focused mainly on how nanomaterials can be used to build nanosystems. They discussed the fundamental principles of nanodevices, how those devices can be used to build nanosystems, and how nanodevices can affect future system integration. Suggestions for future research were also discussed.

“In the design automation area, not many people are doing this research,” Chen said. “That’s why I feel it’s exactly the right time to promote this research, cover the fundamentals, cover the challenges, and really bring some new insights in this field.”

This tutorial isn’t the only activity Chen is doing to promote system-level nanotechnology research.

Chen was the panel co-chair and moderator for “CMOS vs. Nano: Comrades or Rivals” for FPGA ’09, the International Symposium on Field-Programmable Gate Array, in February. The panel discussed how nanoscale technology can play an important role in replacing or co-existing with CMOS.

This month, Chen will moderate another panel, “Impact of Emerging Interconnect Technologies on SLIP Research Directions,” at the System Level Interconnect Prediction (SLIP) Conference. With this panel, Chen hopes to promote nanotechnology research in different forms and locations.

Chen is also co-editing a book with Princeton University Professor Niraj Jha. The book, “Nanoelectronic Circuit Design,” is the first book focusing on building nanosystems, and Chen hopes it will set a foundation for the field.

The actual fabrication of large scale nanocircuits may be still far away, but early assessment of these fascinating designs would be instrumental for guiding future industrial development.

“I think the most challenging part is that people need to be open-minded,” Chen said. “We are learning new things, the new characteristics, the new properties offered from these devices, and what we should do in terms of circuit design to put all of these pieces together.”