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Abstract:

A circuit configuration and methods for controlling parameters of a
bipolar junction transistor (BJT) fabricated on a substrate. A bias
voltage is electrically coupled to the substrate and can be adjusted to
alter the working parameters of a target BJT.

Claims:

1. A method for controlling parameters of a bipolar junction transistor
(BJT) fabricated on a substrate, the method comprising: electrically
coupling a bias voltage to the substrate; and adjusting the bias voltage.

2. The method of claim 1, further comprising: wherein the BJT is a npn
BJT; wherein the bias voltage is a positive voltage with reference to a
base voltage of the BJT; and wherein adjusting the bias voltage includes
increasing the bias voltage to increase a current gain of the BJT and
decreasing the bias voltage to decrease the current gain of the BJT.

3. The method of claim 2, wherein adjusting the bias voltage includes
increasing the bias voltage to decrease a threshold voltage of the BJT
and decreasing the bias voltage to increase the threshold voltage of the
BJT.

4. The method of claim 1, further comprising: wherein the BJT is a pnp
BJT; wherein the bias voltage is a negative voltage with reference to a
base voltage of the BJT; and wherein adjusting the bias voltage includes
increasing the magnitude of the negative bias voltage to increase the
current gain of the BJT and decreasing the magnitude of the negative bias
voltage to decrease the current gain of the BJT.

5. The method of claim 4, wherein adjusting the bias voltage includes
increasing the magnitude of the negative bias voltage to decrease a
threshold voltage of the BJT and decreasing the magnitude of the negative
bias voltage to increase the threshold voltage of the BJT.

6. The method of claim 1, wherein the BJT is a silicon-on-insulator (SOI)
bipolar transistor including an insulator layer between the BJT and the
substrate.

7. The method of claim 6, wherein the amount of bias voltage applied to
the BJT is proportional to the thickness of the insulator layer.

8. A method for selectively controlling a target bipolar transistor in a
bipolar circuit, the bipolar circuit is fabricated on a substrate and
includes at least one npn BJT transistor and at least one pnp BJT
transistor, the method comprising: electrically coupling a substrate bias
voltage to the substrate; and adjusting the substrate bias voltage.

9. The method of claim 8, further comprising: wherein the target BJT is a
npn BJT; wherein the substrate bias voltage is a positive voltage with
reference to a base voltage of the BJT; and wherein adjusting the
substrate bias voltage includes increasing the substrate bias voltage to
increase a current gain of the target BJT and decreasing the substrate
bias voltage to decrease the current gain of the target BJT.

10. The method of claim 9, wherein adjusting the substrate bias voltage
includes increasing the substrate bias voltage to decrease the threshold
voltage of the target BJT and decreasing the substrate bias voltage to
increase the threshold voltage of the target BJT.

11. The method of claim 8, further comprising: wherein the target BJT is
a pnp BJT; wherein the substrate bias voltage is a negative voltage with
reference to a base voltage of the BJT; and wherein adjusting the
substrate bias voltage includes decreasing the substrate bias voltage and
increasing the magnitude of the negative voltage to increase a current
gain of the target BJT, and increasing the substrate bias voltage and
decreasing the magnitude of the negative voltage to decrease the current
gain of the target BJT.

12. The method of claim 11, wherein adjusting the substrate bias voltage
includes decreasing the substrate bias voltage and increasing the
magnitude of the negative voltage to decrease a threshold voltage of the
target BJT, and increasing the substrate bias voltage and decreasing the
magnitude of the negative voltage to increase the threshold voltage of
the target BJT.

13. The method of claim 8, wherein the bipolar circuit is a
silicon-on-insulator (SOI) bipolar circuit including an insulator layer
between the bipolar circuit and the substrate.

14. The method of claim 13, wherein the amount of substrate bias voltage
applied to the bipolar circuit is proportional to the thickness of the
insulator layer.

15. The method of claim 8, further comprising: wherein the target bipolar
transistor is electrically isolated from the substrate by a doped well;
electrically coupling a well bias voltage to the doped well, the well
bias voltage being different than the substrate bias voltage; and
adjusting the well bias voltage.

16. The method of claim 15, wherein the substrate is doped with a first
dopant and the doped well is doped with a second dopant that has opposite
polarity from the first dopant.

17. An integrated circuit comprising: a substrate; a bipolar circuit
fabricated on the substrate, the bipolar circuit including at least one
npn BJT transistor and at least one pnp BJT transistor; a target bipolar
transistor in the bipolar circuit; a controller configured to adjust a
substrate bias voltage at the substrate.

18. The integrated circuit of claim 17, further comprising: a doped well
electrically isolating the target bipolar transistor from the substrate;
and wherein the controller is further configured to adjust a well bias
voltage to the doped well, the well bias voltage being different than the
substrate bias voltage.

19. The integrated circuit of claim 18, wherein the doped well is doped
with a first dopant and the substrate is doped with a second dopant that
has opposite polarity from the first dopant.

20. The integrated circuit of claim 17, further comprising: wherein the
target BJT is a npn BJT; wherein the substrate bias voltage is a positive
voltage with reference to a base voltage of the BJT; and wherein the
controller adjusts the substrate bias voltage by increasing the substrate
bias voltage to increase a current gain of the target BJT and decreasing
the substrate bias voltage to decrease the current gain of the target
BJT.

21. The integrated circuit of claim 17, further comprising: wherein the
target BJT is a pnp BJT; wherein the substrate bias voltage is a negative
voltage with reference to a base voltage of the BJT; and wherein the
controller adjusts the substrate bias voltage by decreasing the substrate
bias voltage and increasing the magnitude of the negative voltage to
increase a current gain of the target BJT, and increasing the substrate
bias voltage and decreasing the magnitude of the negative voltage to
decrease the current gain of the target BJT.

Description:

BACKGROUND

[0001] This invention relates to bipolar junction transistors (BJTs), and
more particularly to controlling parameters of a BJT fabricated on a
substrate by applying a bias voltage to the substrate.

[0002] In bipolar junction transistors, the output current, or collector
current, is exponentially dependent on the input voltage, or base-emitter
voltage. This is different from MOSFET where the output current (Id) is
more or less linearly dependent on input voltage, or gate voltage (Vg).
This gives bipolar an advantage to be used in driver circuits where high
current is needed to drive a load. However, BJTs have the limitation of
needing relatively large input voltage to deliver sufficient current
level. Unlike MOSFET where low threshold voltage can be achieved by
tuning the work function of the gate material, BJTs made of silicon has a
turn-on voltage around 0.9V-1V, which is dictated by the silicon band
gap. Adding germanium to the base region can lower the turn on voltage
due to the smaller bandgap of SiGe alloy as compared to silicon. However,
this adds process complexity and cost. In addition, the amount of tuning
is limited to the band gap shrinkage.

SUMMARY

[0003] Accordingly, one example aspect of the present invention is a
method for controlling parameters of a bipolar junction transistor (BJT)
fabricated on a substrate. The method includes electrically coupling a
bias voltage to the substrate and adjusting the bias voltage to control
parameters of the BJT.

[0004] Another example of the present invention is a method for
selectively controlling a target bipolar transistor in a bipolar circuit.
The bipolar circuit is fabricated on a substrate and includes at least
one npn BJT transistor and at least one pnp BJT transistor. The method
includes electrically coupling a substrate bias voltage to the substrate
and adjusting the substrate bias voltage to control parameters of the
target BJT.

[0005] Yet another example of the present invention is an integrated
circuit including a substrate and a bipolar circuit fabricated on the
substrate. The bipolar circuit includes at least one npn BJT transistor
and at least one pnp BJT transistor. The integrated circuit also includes
a target bipolar transistor in the bipolar circuit, and a controller
configured to adjust a substrate bias voltage at the substrate to control
parameters of the target transistor.

BRIEF DESCRIPTION OF THE DRAWINGS

[0006] The subject matter which is regarded as the invention is
particularly pointed out and distinctly claimed in the claims at the
conclusion of the specification. The foregoing and other objects,
features, and advantages of the invention are apparent from the following
detailed description taken in conjunction with the accompanying drawings
in which:

[0007] FIG. 1 shows a method for controlling parameters of a bipolar
junction transistor fabricated on a substrate in accordance with one
embodiment of the current invention.

[0008]FIG. 2 shows a BJT with a bias voltage 206 according to the method
described in FIG. 1 in accordance with one embodiment of the current
invention.

[0009]FIG. 3 shows a method for selectively controlling a target bipolar
transistor in a bipolar circuit in accordance with one embodiment of the
current invention.

[0010] FIG. 4 shows a bipolar circuit with a bias voltage according to the
method described in FIG. 3 in accordance with one embodiment of the
current invention.

[0011] FIG. 5 shows a method for selectively controlling a target bipolar
transistor electrically isolated from the substrate in a bipolar circuit
in accordance with one embodiment of the current invention.

[0012] FIG. 6 shows an integrated circuit according to one embodiment of
the present invention.

DETAILED DESCRIPTION

[0013] The present invention is described with reference to embodiments of
the invention. Throughout the description of the invention reference is
made to FIGS. 1-6. When referring to the figures, like structures and
elements shown throughout are indicated with like reference numerals.

[0014] FIG. 1 shows a method for controlling parameters of a bipolar
junction transistor (BJT) 202 fabricated on a substrate 204 in accordance
with one embodiment of the current invention. The method includes a
fabrication step 102. During the fabrication step 102, a BJT 202 is
fabricated on a substrate 204. After the completion of fabrication step
102, the method continues to coupling step 104.

[0015] At coupling step 104, a bias voltage 206 is electrically coupled to
the substrate 204. In one embodiment, the bias voltage can be either a
positive or negative DC, depending on the type of BJT transistor targeted
for parameter control. The bias voltage is discussed in more detail
below. After the coupling step 104 is completed, the method continues to
adjusting step 106.

[0016] At adjusting step 106, the bias voltage 206 is adjusted to control
parameters of the BJT 202. The amount of bias voltage 206 applied to the
BJT 202 can be proportional to the thickness of the insulator layer 208.
In addition, the bias voltage 206 may not exceed a threshold voltage when
an inversion channel forms in the base region 210 of the BJT 202.

[0017] In one embodiment, the BJT 202 can be a npn BJT 404, and the bias
voltage 206 may be a positive voltage. Adjusting the bias voltage 206 can
include increasing the bias voltage 206 to increase a current gain of the
BJT 202 and decreasing the bias voltage 206 to decrease the current gain
of the BJT 202. Furthermore, adjusting the bias voltage 206 can include
increasing the bias voltage to decrease a threshold voltage of the BJT
202. Conversely, decreasing the bias voltage can increase the threshold
voltage of the BJT 202.

[0018] In another embodiment, the BJT 202 can be a pnp BJT, and the bias
voltage 206 may be a negative voltage. Adjusting the bias voltage 206 can
include decreasing the bias voltage 206, i.e., increasing the magnitude
of the negative voltage, to increase a current gain of the BJT 202 and
increasing the bias voltage 206, i.e., decreasing the magnitude of the
negative voltage, to decrease the current gain of the BJT 202.
Furthermore, adjusting the bias voltage 206 can include decreasing the
bias voltage to decrease a threshold voltage of the BJT 202 and
increasing the bias voltage to increase the threshold voltage of the BJT
202.

[0019]FIG. 2 shows a BJT 202 with a bias voltage 206 applied according to
the method described in FIG. 1 in accordance with one embodiment of the
current invention. As shown, the bias voltage 206 is a positive DC
voltage with respect to the base voltage of the BJT. Thus, if the BJT 202
is a pnp transistor, the bias voltage decreases the current gain and
increases threshold voltage of the BJT 202. On the other hand, if the BJT
202 is a npn transistor, the bias voltage increases the current gain and
decreases threshold voltage of the BJT 202.

[0020] In one embodiment, the BJT can be a silicon-on-insulator (SOI)
bipolar transistor including an insulator layer 208 between the BJT 202
and the substrate 204.

[0021]FIG. 3 shows a method for selectively controlling a target bipolar
transistor in a bipolar circuit in accordance with one embodiment of the
current invention. The method includes a fabrication step 302. During the
fabrication step 302, a bipolar circuit 402 is fabricated on a substrate
204. After the completion of fabrication step 302, the method continues
to coupling step 304.

[0022] At coupling step 304, a bias voltage 206 is electrically coupled to
the substrate 204. In one embodiment, the bias voltage can be either a
positive or negative DC, depending on the type of BJT transistor targeted
for parameter control. The bias voltage is discussed in more detail
below. After the coupling step 304 is completed, the method continues to
adjusting step 306.

[0023] At adjusting step 306, the bias voltage 206 is adjusted to control
parameters of the target BJT of the bipolar circuit 402. The amount of
bias voltage 206 applied to the target BJT can be proportional to the
thickness of the insulator layer 208. In addition, the bias voltage 206
may not exceed a threshold voltage when an inversion channel forms in the
base region 210 of the BJT 202.

[0024] In one embodiment, the target BJT can be a npn BJT 404, and the
bias voltage 206 may be a positive voltage. Adjusting the bias voltage
206 can include increasing the bias voltage 206 to increase the current
gain of the BJT 202 and decreasing the bias voltage 206 to decrease the
current gain of the target BJT. Furthermore, adjusting the bias voltage
206 can include increasing the bias voltage to decrease the threshold
voltage of the BJT 202. Conversely decreasing the bias voltage can
increase the threshold voltage of the target BJT.

[0025] In another embodiment, the target BJT can be a pnp BJT 406, and the
bias voltage 206 may be a negative voltage. Adjusting the bias voltage
206 can include decreasing the bias voltage 206, i.e., increasing the
magnitude of the negative voltage, to increase a current gain of the BJT
202 and increasing the bias voltage 206, i.e., decreasing the magnitude
of the negative voltage, to decrease the current gain of the target BJT.
Furthermore, adjusting the bias voltage 206 can include decreasing the
bias voltage to decrease a threshold voltage of the target BJT, and
conversely, increasing the bias voltage can increase the threshold
voltage of the target BJT.

[0026] FIG. 4 shows a bipolar circuit 402 with a bias voltage 206
according to the method described in FIG. 3 in accordance with one
embodiment of the current invention. The bipolar circuit 402 can include
at least one npn BJT transistor 404 and at least one pnp BJT transistor
406. As shown, the bias voltage 206 is a positive DC voltage with respect
to the base voltage of the target BJT. Thus, if the target BJT is a pnp
BJT 406, the bias voltage 206 can decrease the current gain and increase
threshold voltage of the target BJT. On the other hand, if the target BJT
is a npn BJT 404, the bias voltage 206 can increase the current gain and
decrease threshold voltage of the target BJT.

[0027] In one embodiment, the bipolar circuit 402 can be a
silicon-on-insulator (SOI) bipolar circuit including an insulator layer
208 between the bipolar circuit 402 and the substrate 204.

[0028] FIG. 5 shows a method for selectively controlling a target bipolar
transistor electrically isolated from the substrate in a bipolar circuit
in accordance with one embodiment of the current invention. The method
includes a doping step 502. During the doping step 502, the substrate is
doped one type of dopant. After the completion of doping step 502, the
method continues to creation step 504.

[0029] At creation step 504, a doped well 602 is created within the
substrate 204. The doped well 602 can be doped with a second type of
dopant that has an opposite polarity from the dopant present in the
substrate. After the completion of creation step 504, the method
continues to fabrication step 506.

[0030] At fabrication step 506, a bipolar circuit 402 is fabricated on a
substrate 204. After the completion of fabrication step 506, the method
continues to coupling step 508.

[0031] At coupling step 508, a bias voltage 206 is electrically coupled to
the substrate 204. In one embodiment, the bias voltage can be either a
positive or negative DC, depending on the type of BJT transistor targeted
for parameter control. After the coupling step 508 is completed, the
method continues to another coupling step 510.

[0032] At coupling step 510, a second bias voltage 604 is electrically
coupled to the doped well 602. In one embodiment, the well bias voltage
604 can be either a positive or negative DC (with respect to the base
voltage of the target BJT), depending on the type of BJT transistor
targeted for parameter control. After the coupling step 510 is completed,
the method continues to adjusting step 512.

[0033] At adjusting step 512, the substrate bias voltage 206 can be
adjusted to control parameters of a BJT 202 of the bipolar circuit 402
not isolated by the doped well 602. The amount of bias voltage 206
applied to the BJT can be proportional to the thickness of the insulator
layer 208. In addition, the bias voltage 206 may not exceed a threshold
voltage when an inversion channel forms in the base region 210 of the
BJT. At the completion of adjusting step 512, the method continues
adjusting step 514.

[0034] At adjusting step 514, the well bias voltage 604 can be adjusted to
control parameters of the target BJT isolated from the substrate 204 by
the doped well 602. Furthermore, the well bias voltage 604 can be less
than a threshold voltage when an inversion channel forms in the base
region 210 of the target BJT.

[0035] If the desired well voltage is more positive than the substrate
voltage, a n-type dopant can be used for the well and a p-type dopant can
be used for the substrate, and vice versa.

[0036] FIG. 6 shows an integrated circuit 606 according to one embodiment
of the present invention. The integrated circuit 606 can include a
substrate 204 and a bipolar circuit 402 fabricated on the substrate 204.
The bipolar circuit 402 may include at least one npn BJT transistor 404
and at least one pnp BJT transistor 406. Furthermore, a controller can be
configured to adjust a substrate bias voltage 206 at the substrate 204 to
selectively control a target transistor in the integrated circuit 606.

[0037] In one embodiment, the integrated circuit can have the target
bipolar transistor electrically isolated by a doped well 602. In
addition, the controller can be further configured to adjust a well bias
voltage 604 to the doped well 602, and the well bias voltage 604 can be
different than the substrate bias voltage 206. Furthermore, the doped
well 602 may be doped with a first dopant and the substrate 204 maybe be
doped with a second dopant that has the opposite polarity from the first
dopant.

[0038] In one embodiment, the target BJT may be a npn BJT 404, and the
substrate bias voltage 206 may be a positive one. Furthermore, the
controller adjusts the substrate bias voltage 206 by increasing the
substrate bias voltage 206 to increase a current gain of the target BJT
and decreasing the substrate bias voltage 206 to decrease the current
gain of the target BJT.

[0039] In one embodiment, the target BJT may be a pnp BJT 406, and the
substrate bias voltage 206 may be a negative one. Furthermore, the
controller adjusts the substrate bias voltage 206 by increasing the
magnitude of the substrate bias voltage 206 to increase a current gain of
the target BJT and decreasing the magnitude of the substrate bias voltage
206 to decrease the current gain of the target BJT.

[0040] Accordingly, one embodiment of the invention is a transistor
fabricated on a substrate, with a bias voltage electrically coupled to
the substrate. The transistor can be a Silicon-on-Insulator (SOI) bipolar
junction transistor (BJT) with an insulator layer between the BJT and the
substrate. According to an embodiment of the invention, adjusting the
substrate bias voltage can lead to a lower turn-on voltage for the
transistor, because the bias voltage can create a vertical field in the
insulator layer, which can reduce the barrier height for minority carrier
injection into the BJT's base region from BJT's emitter. The BJT's
collector current (Ic) is also increased due to the increased flow of
charges injected from the emitter into the base where they are minority
carriers that diffuses toward the collector. This arrangement can also
increase the barrier height for minority carrier injection from the base
into the emitter and therefore reduce the BJT's base current (Ib). The
increase in the collector current can improve the BJT's current gain,
which is dictated by Ic/Ib. In addition, increasing the collector current
via the application of a bias voltage can lead to increased speed for the
BJT, because transistor frequency fT is directly proportional to
collector current value

[0041] Furthermore, the amount of bias voltage applied to the BJT can be
adjusted in proportionality to the thickness of the insulator layer. For
applications where lower substrate bias voltage is desirable, a thinner
insulator layer may be used.

[0042] One embodiment of the invention is a method for selectively
controlling a target bipolar transistor in a bipolar circuit. The bipolar
circuit may be a silicon-on-insulator (SOI) bipolar circuit fabricated on
a substrate with an insulator layer between the bipolar circuit and the
substrate. The bipolar circuit can include at least one npn BJT and at
least one pnp BJT, and have a bias voltage electrically coupled to the
substrate. The amount of bias voltage applied to the substrate can be
adjusted in proportionality to the thickness of the insulator layer. For
applications where lower substrate bias voltage is desirable, a thinner
insulator layer may be used.

[0043] In one embodiment the target bipolar transistor may be a npn BJT,
and the applied substrate bias voltage can be a positive voltage.
Increasing the substrate bias voltage can contribute to a lowered turn-on
voltage for the target transistor, and an increase in the target
transistor's collector current. The increase in the collector current can
contribute to a higher current gain for the target transistor and an
increase in operation speed.

[0044] In another embodiment the target bipolar transistor may be a pnp
BJT, and the applied substrate bias voltage can be a negative voltage.
Decreasing the substrate bias voltage, i.e., increasing the magnitude of
the negative voltage, can contribute to a lowered turn-on voltage for the
target transistor, and an increase in the target transistor's collector
current. The increase in the collector current can contribute to a higher
current gain for the target transistor and an increase in operation
speed.

[0045] Furthermore, the target transistor can be electrically isolated
from the substrate by a doped well. This can be achieved by doping the
substrate with a first dopant and doping the doped well with a second
dopant that has the opposite polarity from the first dopant. In addition
to the applied substrate bias voltage, a different well bias voltage can
be electrically coupled to the doped well.

[0046] Yet another embodiment of the present invention is an integrated
circuit fabricated on a substrate. The integrated circuit may be a
silicon-on-insulator (SOI) circuit with an insulator layer between the
circuit and the substrate. The integrated circuit can have at least one
bipolar circuit which includes at least one npn BJT and at least one pnp
BJT, and have a bias voltage electrically coupled to the substrate. The
amount of bias voltage applied to the integrated circuit can be adjusted
in proportionality to the thickness of the insulator layer. For
applications where lower substrate bias voltage is desirable, a thinner
insulator layer may be used.

[0047] The substrate bias voltage can be used to control the parameters of
the target transistor. In one embodiment the target bipolar transistor
may be a npn BJT, and the applied substrate bias voltage can be a
positive voltage. Increasing the substrate bias voltage can contribute to
a lowered turn-on voltage for the target transistor, and an increase in
the target transistor's collector current. The increase in the collector
current can contribute to a higher current gain for the target transistor
and an increase in operation speed. In another embodiment the target
bipolar transistor may be a pnp BJT, and the applied substrate bias
voltage can be a negative voltage. Decreasing the substrate bias voltage,
i.e., increasing the magnitude of the negative voltage, can contribute to
a lowered turn-on voltage for the target transistor, and an increase in
the target transistor's collector current. The increase in the collector
current can contribute to a higher current gain for the target transistor
and an increase in operation speed.

[0048] Furthermore, the integrated circuit can have a doped well which
electrically isolates a target transistor from the substrate. The doped
well can have a type of dopant that is opposite in polarity from the type
of dopant present in the substrate. In addition, the doped well can be
electrically coupled to a second bias voltage that is different from the
substrate bias voltage. The well bias voltage can be adjusted to control
the parameters of the isolated target transistor. In one embodiment the
target bipolar transistor may be a npn BJT, and the applied substrate
bias voltage can be a positive voltage. Increasing the substrate bias
voltage can contribute to a lowered turn-on voltage for the target
transistor, and an increase in the target transistor's collector current.
The increase in the collector current can contribute to a higher current
gain for the target transistor and an increase in operation speed.

[0049] In another embodiment the target bipolar transistor may be a pnp
BJT, and the applied substrate bias voltage can be a negative voltage.
Decreasing the substrate bias voltage, i.e., increasing the magnitude of
the negative voltage, can contribute to a lowered turn-on voltage for the
target transistor, and an increase in the target transistor's collector
current. The increase in the collector current can contribute to a higher
current gain for the target transistor and an increase in operation
speed.

[0050] The descriptions of the various embodiments of the present
invention have been presented for purposes of illustration, but are not
intended to be exhaustive or limited to the embodiments disclosed. Many
modifications and variations will be apparent to those of ordinary skill
in the art without departing from the scope and spirit of the described
embodiments. The terminology used herein was chosen to best explain the
principles of the embodiments, the practical application or technical
improvement over technologies found in the marketplace, or to enable
others of ordinary skill in the art to understand the embodiments
disclosed herein.

Patent applications by Jin Cai, Cortlandt Manor, NY US

Patent applications by Tak H. Ning, Yorktown Heights, NY US

Patent applications by International Business Machines Corporation

Patent applications in class Having stabilized bias or power supply level

Patent applications in all subclasses Having stabilized bias or power supply level