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Abstract

This technique provides a means by which the noise performance of five polar transistors can be significantly improved without going through special transistor design. The technique basically is to connect a number of transistors in parallel on a given integrated circuit chip.

Country

United States

Language

English (United States)

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Low Noise Wide Band Amplifier

This technique provides a means by which the noise performance of five
polar transistors can be significantly improved without going through special
transistor design. The technique basically is to connect a number of transistors
in parallel on a given integrated circuit chip.

Assuming the transistor characteristics are matched (this is a
reasonable assumption because all transistors are made on the same
wafer and through same process), the collector current will divide
equally among each transistor, Ic/n, and so does the emitter current
and base current. It can be shown that the parallel combination has
the following circuit parameters:
r(b) = 1 over n r(bx)

C(u) = n C(ux)

C(cs) = n C(csx)

gm = gIc over Kt = 39 Ic

r pi = beta o/g(m)

C pi = gm/W(T)

Where:

n = number of transistors connected in parallel

r(bx) = base resistance of single transistor

C(ux) = collector-base capacitance of single transistor

C(csx) = collector-substrate capacitance of single

transistor

I(c) = collector current. It is by the reduction in base
resistance r(b) that the noise performance of the parallel
transistors is improved.

The output signal-to-noise current ratio (SNR) for n
transistors connected in parallel is improved to the first order
approximation by a factor of the square root of n. This occurs
because all noise sources add sta...