Temporal Locality with a Long Interval: Hybrid Memory System for High-Performance and Low-Power

Abstract

In this paper, the main idea is to design DRAM and PCM hybrid memory system with low power consumption and high performance based on effective temporal locality. PCM has two major drawbacks by write operation. First, the number of write operations is limited. Second, PCM has a longer write operation time than DRAM. On the other hand, DRAM can effectively overcome the disadvantages of PCM. Therefore, a page replacement algorithm suitable for the characteristics of DRAM and PCM is necessary for effective DRAM and PCM hybrid memory operation. For page management considering the characteristics of PCM, we proposed a page management method based on the temporal locality of a write reference center. In this paper, pages with the temporal locality that are referenced at short intervals will be managed with hybrid memory; pages with temporal locality that are referenced at long intervals are managed by the proposed buffer system. Furthermore, a hot page is defined by a write operation and a buffer system, and this page is managed in DRAM to reduce the overhead of PCM. According to the simulation results, the proposed hybrid memory achieved performance improvement from about 13 and 10% from Energy-delay product compared with CLOCK-DWF and CLOCK-HM.

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Acknowledgements

This research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the ministry of Education, Science and Technology (NRF-2014R1A1A4A01008504).