The paper proposes extensions to cryptographic hash algorithms, such as SHA, that add support for parallel processing of a single message. The goal is to take concepts from tree hashing and apply the parallel performance benefits to a single data buffer in a single threaded core of a modern microprocessor. Additionally, a method for applying the MultiHash concept to HMAC is suggested.

The paper describes the overall design of the Multi-Hash extensions, delves into details of a proposed implementation, and presents a summary of the performance of some versions of the code. With our implementation, a single core of an Intel® Core™ i7 processor 2600 with Intel® HT Technology can compute Multi-Hash SHA-256 of a 1MB buffer at the rate of ~5 cycles/byte, which is over 2X faster than the best known SHA-256 single buffer implementations.

Read the full Multi-Hash: Family of Cryptographic Hash Algorithm Extensions White Paper.

The paper proposes extensions to cryptographic hash algorithms, such as SHA, that add support for parallel processing of a single message. The goal is to take concepts from tree hashing and apply the parallel performance benefits to a single data buffer in a single threaded core of a modern microprocessor. Additionally, a method for applying the MultiHash concept to HMAC is suggested.

The paper describes the overall design of the Multi-Hash extensions, delves into details of a proposed implementation, and presents a summary of the performance of some versions of the code. With our implementation, a single core of an Intel® Core™ i7 processor 2600 with Intel® HT Technology can compute Multi-Hash SHA-256 of a 1MB buffer at the rate of ~5 cycles/byte, which is over 2X faster than the best known SHA-256 single buffer implementations.

Read the full Multi-Hash: Family of Cryptographic Hash Algorithm Extensions White Paper.