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Abstract

This article describes a clock synchronization device. The Figure depicts the mechanism for the clock synchronization in a high level block diagram. Once the packet carrying the multimedia data arrives at the station, a latch device is provided to store the packet for further operations. Two timers are used to record timing information; T is the total time passed since the session began. T2 is the inter-arrival time between the last two consecutive arrivals. These two timers are based on the crystal oscillator used in the local system. The variance sigma sup 2 of the T2's will be calculated by observing the traffic on a given connection. It is used in f(), where f() = over , where C is the transmission speed in packets per second.

Country

United States

Language

English (United States)

This text was extracted from an ASCII text file.

This is the abbreviated version, containing approximately
43% of the total text.

No Delay End-to-End Clock Synchronization

This article
describes a clock synchronization device.
The
Figure depicts the mechanism for the clock synchronization in a high
level block diagram. Once the packet
carrying the multimedia data
arrives at the station, a latch device is provided to store the
packet for further operations. Two
timers are used to record timing
information; T is the total time passed since the session began. T2
is the inter-arrival time between the last two consecutive arrivals.
These two timers are based on the crystal oscillator used in the
local system. The variance sigma sup 2
of the T2's will be
calculated by observing the traffic on a given connection. It is
used in f(), where f() = <left lbracket Phi sup -1 ( xi / 2 ) right
rbracket sup 2 % sigma sup 2 C > over <epsilon sup 2> , where C is
the transmission speed in packets per second.
The value of &epsilon.
is submitted by the user.

Also, a
method described in a previous invention disclosure
requires that the packets arrived to the destination in the same
order in which they were sent. This new
formula for T is derived
without this assumption.

Besides the
above operations, there is a counter, CNTR,
tracking the total number of the received data, and the receiving
rate is calculated every time the value of the counter is changed.
The decision to adjust the clock is based on the results of the
comparison of the measuring time T and the value of f(). The
observed difference will be used to adjust the clock through an A/D
convertor and a voltage controlled clock device if the comparison is
satisfied.

In the
"RATE-BASED END-TO-END CLOCK SYNCHRONIZATION"
disclosure, the length of the measuring interval is found to
guarantees that the relative error between the agreed upon
transmission speed and an estimate of this error will be smaller than
&epsilon., where &epsilon. is
any positive real number. This
estimate, however, may sometimes be impossible to achieve, since it
requires network delays to be bounded with probability 1. Even if a
bound for the delays can be found, it may lead to a very long
measuring interval in a case when a large delay may occur with a very
small probability. This unlikely
possibility of a large delay will
cause d to increase thus increasing the value of T, while in reality
such delays may almost never be experienced.

It was
decided, therefore, to consider a different bound for
the length of a measuring interval T.
This bound is based on a
conversion in probability. The partner
node's transmission rate is
denoted C(1- Delta ), where &Delta.
need to be estimated. The
estimate, <Delta hat> sub T ,
depends on T. We will find T such
that <Delta hat> sub T is almost always close to &Delta..
Mathematically it means that for a given pair of small positive real
numbers &epsilon. and &xi. a choice of T guarantees that