At this week's World Nano-Economic Conference in Washington, D.C., there was much discussion on the future of microelectronic devices. In particular,David Tennenhouse, Director of Research at Intel, gave a talk on “Extending Moore's Law” in which he made some bold predictions about the future of lithography. Dr. Tennenhouse boasted that Intel would expand Moore's Law into various realms (sensors, biological, optical, fluidics, wireless, mechanical), and that this expansion would bring about a “vast increase in spatial and temporal fidelity.” Apparently this was Intel's way of saying that they believed in the concept of “anytime, anywhere” computing and communications. Intel also belives that it has made a breakthrough in “nanoscale machine vision” systems that should substantially enhance the fidelity and clarity of Atomic Force Microscopes (AFMs), which can resolve individual atoms. Dr. Tennenhouse proclaimed that “silicon nanotechnology is here,” and stated that scaling would continue so long as

(x cost)/(x performance) < alternative technologies

Intel's biggest concern with scaling to 10 nm and below pertains to the “dopant problem”–at those sizes the number of dopants decreases dramatically, and the statistical distribution of dopants is no longer dependable. In other words, mass-producing 10 nm transistors that work properly may prove to be an intractable problem. Nevertheless, Dr. Tennenhouse reported that Intel is funding research on technologies that would faciliate 5 nanometer transistors. In particular, Intel is now funding universities doing research in carbon nanotube transistors, crossed silicon nanowire structures, quantum dots, and molecular switches. These structures may be ready for use, according to Intel, as soon as the 2013-2015 timeframe. Dr. Tennenhouse claims that the current worldwide funding for post-CMOS technologies is only US$1 billion, which is about $400 million less than is needed, and urges a focused government/industry/academia program to ascertain the 2-3 most promising post-CMOS technologies.

USER COMMENTS 4 comment(s)

not gonna happen(4:37pm EST Thu Sep 11 2003)[These structures may be ready for use, according to Intel, as soon as the 2013-2015 timeframe.]

There will probably be a nuclear war before that ever happens. - by already glowing gree

Not 5 nm but 1 nm !(3:51am EST Fri Sep 12 2003)Find in Congress brochure claim that Intel is working on 1-10 nm lenght scales. Not 5 nm as you noted here. With current rate of lithography progress, 5 nm gates will be common in 2015 in processor design! Research at epn.ba/adipor/WhatNext Revealed1.pdf has found only that clock rise rate will be saturated in 2013, and nothing else. Regards to K. Likharev, but CURRENT realistic fab technologies should be out in 2015, just using nano breaktroughs.You can find that in What Next link too, much before than stressed in this nano Conference. We can arguably ask only: is current rate of litho progress realistic. And don't forget Intel's moto: Only paranoids survive. - by adi porobic

Moore's law still helpful?(12:40pm EST Tue Nov 11 2003)We are heading toward 10 nm pretty rapidly, and encountering fundamental difficulties along the way. The “45 nm node” may actually be characterized by 20 nm transistors, while for “32 nm node” it would be 15 nm transistors. Below ~30-40 nm, only a limited selection of high-resolution resists are available. 10 nm resist features have trouble even staying put.

I hate the naming convention but if this gate width shrinking trend continues, the rest of the decade will see a slowing of Moore's law scaling or else a sudden halt. A gradual slowdown will still have significant economic impact as more players enter the game. - by fc