MPE Forth Compilers for

ARM Cortex-M3,

(debugging via segger J-link)

H8S and H8/300H,

9S12/68HC12,

ARM/StrongARM/XScale,

(debugging via segger J-link)

68xxx/683xx,

MSP430,

386/486/Pentium,

Coldfire,

8051.

Interactive Compilation, Debug and Test

MPE Forth 7 cross compilers are tools with a wide range of features designed to emphasise rapid production of embedded systems. They are available in Windows and Linux versions. They all feature fast compilation, interactive debug and test even for single chip targets, and on-line source management. Forth 7 compilers have the features described below.

Support Services
Technical support via telephone, fax and e-mail
Optional annual Extended Technical Support (XTS) contract including all upgrades and direct access to the development team.
Free upgrades within one year of purchas

Developer systems come with upgrades for one year after purchase. An Extended Technical Support or ad-hoc upgrades are available after that period.

Standard

Upgrades are provided for one year after purchase.

Stamp

Stamp compilers are available for the ARM and 8051 targets. The ARM Stamp compiler is code-limited to 128kb and RAM-limited to 64kb, and target device drivers are supplied only for NXP/Philips LPC21xx devices. The 8051 Stamp compiler is for single-chip use only. It has only an Umbilical Forth target and is code-limited to 8kb and RAM-limited to 256 bytes.

Feature

Stamp

Standard

Developer

VFX code generator

Y

Y

Y

Standalone target

Y

Y

Y

Umbilical target

Y

Y

Y

Multi-tasking

Y

Y

Y

Unlimited code size

N

Y

Y

State machine compiler

N

Y

Y

Floating point math

N

Y

Y

PowerFiler

N

Y

Y

Cross reference tools

N

Y

Y

Bank-switched targets

N

N

Y

PID loops

N

N

Y

NetBoot and SerBoot

N

N

Y

FAT 12/16/32 and SD/MMC

N

N

Y

USB driver, core and classes

N

N

Y

PowerView embedded GUI

N

N

Y

PowerNet TCP/IP stack option

N

N

Y

Compiler source code (with NDA)

N

N

Y

Compiler Features

AIDE

AIDE is currently only available for Windows. The AIDE front end integrates a number of useful tools as standard:
ForthEd multi-file editor
PowerTerm teminal emulator for serial communications
Tool Capture window
Text macro system for build management
Make utility
Users can add additional tools at any time using the tool configuration system.

Fast Compilation

The cross compilers are native 32 bit Windows or Linux applications that use a fast symbol search system for optimum performance and features. For large applications, we regularly find that the compiler can generate 500kb/second of binary. In the main, compilation speed is limited by disk performance.

Standalone Forth

Forth was designed as an interactive language, which is one reason why Forth permits embedded systems to be constructed and debugged very rapidly. Many designers like to retain that facility on their targets, so MPE compilers permit you to do this. The standalone target contains a complete Forth compiler and interpreter which can be used for debugging, and can also be used for communications, runtime configuration scripts, remote monitoring and even for accepting software updates in the field.

Umbilical Forth

Where memory is at a premium, use the Umbilical Forth option. The normal Forth interactivity is retained, but is provided by the cross compiler, so avoiding the need for the full Forth compiler and interpreter on the target. This reduces the memory requirements of a fully interactive Forth to about 2k bytes for 8 and 16 bit CPUs. In this mode all the host tools are available as if on the target, making Umbilical Forth ideal for single chip target development.

VFX Code Generator

Compilers for suitable target CPUs use MPE's VFX optimising code generator, which provides excellent code quality and code density. The VFX technology eliminates redundant memory moves caused by stack manipulations, and merges many common Forth operations. As well as Forth-specific techniques, VFX code generators include standard compiler techniques common in other languages. Inlining of procedures below a user definable size is also supported.

The VFX code generator produces code that is between 5 and 15 times faster than traditional Forth direct threaded code, somewhat dependent of course on the CPU architecture. We have not writtem an interrupt routine in assembler for many years! A separate paper is available that has figures for several benchmarks. The MPE cross compiler benchmark code may also be downloaded (approx 40kb).

VFX compilers also include a disassembler that is very useful for checking code generation efficiency, and for making performance analyses and decisions.

Source Management

The cross compiler provides facilities enabling you to see the source code of any target word at any time, and to find out where it is used in the code. Typing LOCATE <name> will display the source code for that word or put you in an editor at the start of the definition. XREF <name> will give you a list of all the words that use <name> - a cross-reference. XREF-ALL cross references all the words you have defined, whereas XREF-UNUSED produces a list of any words that have been defined but are unused.

If you have to build several versions of a project, use the text macro facilities built into AIDE and the cross compilers. These allow you to change directories, file names and text globally within a project.

When you have a substantial project, you can use the DocGen system to produce code manuals for your project. For safety-critical applications, DocGen/SC can be used to integrate documentation and test code in a form suitable for FDA approval. Contact the MPE office for more details of DocGen/SC.

Integrated Assembler

All compilers include an integrated cross assembler. There is no need to place assembly code in separate files. The assemblers are fast, easy to use, and are fully integrated into the cross compiler. The sssemblers support macros, conditional structures, named labels with forward referencing and local labels.
A disassembler within the cross compiler allows you to inspect the generated code.

Library Files With Multi-Pass Reference Resolution

Library files are source files that can be scanned at the end of compilation. If a procedure in a library file satisfies a forward reference, the procedure is compiled and the reference resolved. A group of library files is scanned until no more references can be resolved.
This procedure allows you to minimise the size of your code by only including words if they are actually needed

User Definable Communications Links And Memory Drivers

For Umbilical Forth development, the compiler needs a communications link to the target. The protocol for this link has been factored in such a way that you can add your own drivers to the compiler.
The compilers provide output of memory SECTIONs to files or to memory drivers, the most common of which is a Flash or EPROM emulator driver. You can add your own memory drivers if you need to, for example to drive a JTAG programmer or in-circuit emulator. Output file formats are binary, Intel Hex (16 or 32 bit) and Motorola S19/28/37.

Flexible Target Memory Management

As microcontrollers gain more peripheral blocks and mixes of on-chip memory, efficient applications must make best use of these areas. The compilers allow you to define any number of areas of memory called SECTIONs, which may be for code (CDATA), memory that is initialised at power up (IDATA), or unitialised memory (UDATA).

Targets that require more memory than the CPU normally addresses, for example when a 9S12/68HC12 or 8051 needs to access more than 64k bytes of memory, can define banks of memory that are split into pages.

The flexible and efficient memory definition scheme provides complete control of target memory.

Target features

Standard Hardware Configurations

Each compiler comes complete with configuration files for one or more commercially available hardware systems such as manufacturers evaluation boards or MPE's own hardware products. Configuration for custom hardware is usually just a matter of redefining the memory map of the processor.
If you want the easiest possible start up route, MPE has a hardware porting service that will configure the compiler for your own hardware and will supply you with a tested configuration file.

Multitasking

TIMEBASE time and delay management system
Using a single periodic clock interrupt, you can generate delays, wake/suspend tasks, timeouts and periodic execution very simply, using phrases such as:
' <action> <ms> AFTER \ once after <ms> ms
' <action> <ms> EVERY \ every <ms> ms

Timers can be cancelled at any time.

Heap manager

A task-safe heap system for memory management is supplied. The 32 bit implementation is optimised for performance, and the 16 bit implementation is optimised for code size.

PowerView Embedded GUI (32 bit targets)

A set of PC hosted tools are provided (with source code) for converting standard PC images into the format required for your screen.

FAT File System (32 bit targets)

FATfiler is a FAT 12/16/32 file system designed for use with current devices such as SD/MMC cards, CompactFlash cards and USB memory sticks. Such devices can simply be transferred from the embedded system and plugged into a PC. When a device is initialised FATfiler automatically detects the FAT type and configures itself. The ANS Forth file wordset is provided.

You can configure the filing system for disk caching and for the required sector read/write interface. For the common case where SD/MMC cards are being driven from an SPI port, a common SD/MMC interface layer is provided. SPI drivers are provided in many cases in the CPU specific driver code. A driver layer layer is also provided for testing on VFX Forth for Windows.

Layered USB System v2 (32 bit targets)

Version 2 of the MPE USB driver system has been tested with Windows, Linux and Mac OS X. The example hardware and USB class drivers have been overhauled for use with DMA hardware. An example composite device is provided.

Your embedded system can use a USB virtual serial port. Version 2 of the USB driver code includes a Communications Device Class (CDC) driver for serial emulation over USB. You can even use this as the Forth console. No additional host drivers are required.

Your embedded system can be a memory stick. The USB code has been structured so that the hardware drivers are independent of the USB core layer and the class layer. The Mass Storage Class (MSC, memory stick) driver requires no additional operating system drivers.

Datalogging applications can be written using the FATfiler file system above. When the time comes, just connect it to a PC using a USB connection and copy the files to the PC.

You can also merge the CDC and MSC drivers into a composite device that will provide both a disk and a serial port to any host PC.

PowerFile (32 bit targets)

PowerFile is an embedded file system based around Unix file systems. PowerFile has recently been updated to be smaller and faster. It includes an ANS Forth wordset that controls a complete filing system with sample drivers for serial EEPROM and Compact Flash or IDE drives.
A single configuration file permits nearly all aspects of PowerFile to be configured. The filing system is suitable for use most applications, including data logging and web servering. A simple interface API links it to almost any form of mass storage, whether it be Flash memory, SD/HC, CF, hard-disk, serial Data Flash or EEPROM.

NetBoot and SerBoot

Initially developed for ARM systems with Ethernet, the NetBoot code permits an embedded system with Flash to be remotely reprogrammed over over TFTP and Ethernet or a serial line. NetBoot has been in daily use at MPE for some time and we love it!
SerBoot provides similar facilities but uses serial communications, e.g. RS232 or USB, with an XModem transfer protocol as provided by Aide, HyperTerminal, Minicom and most other serial comms packages.

Finite State Machines

Finite State Machines (FSMs) are a convenient way of describing state driven systems that are otherwise difficult to program. The MPE FSM implementation allows for multitasked operation and nested state machines.

This package has been used for defining communications protocols in safety critical systems such as lifts (elevators) and train (railroad) control.

PID - Process Control Loops

Initially developed for an MPE client, this implementation of a PID controller with deadband handling is now part of the target code.

Optional Extensions

PowerNet TCP/IP stack

Coded for 32 bit targets. A Forth implementation of popular IP based network protocols. Includes TCP, UDP, IP, DHCP, SNTP, SMTP, a multi-threaded server architecture with Telnet and Web servers.

The PowerNet TCP/IP stack and web server has been reworked to reduce memory usage. It runs comfortably on the new generation of single chip ARMs and ColdFires. A full installation with Ethernet, Telnet and web server can be configured in less than 16k bytes of RAM

Client-side code has not been neglected. Example files show you how to connect to a remote web server, transfer data to and from, and even to download and program a new firmware image. Example client configuration code shows you how to simplify production configuration.

N.B. The combination of PowerNet, PowerView and PowerFile/FATfiler permits the construction of fully web-enabled controllers that have low memory requirements and low power consumption.

CANopen implementation

The CAN fieldbus is popular in many industries requiring high reliability. This implementation was developed by a client for railway control systems, and is released as a cross compiler extension. Please contact us directly for more information

CPU family Comments Order code
ARM Cortex-M3 Cortex-M is the next generation of the ARM architecture for embedded devices. Cortex devices can have higher clock speeds and performance with lower energy needs than ARM7 devices. One nice feature of the Cortex is that there is no assembler start-up code - it's all high-level Forth.

Current devices have amazing performance at insanely low prices. Target code is provided for CPUs from many suppliers including NXP/Philips, Atmel, Analog Devices, ST, Intel, Sharp, Samsung, Oxford Semi and Crystal. The compiler supports both big and little endian code. Our most popular compiler in recent years. Compatible with MPE's JTAG Widget USB JTAG debugger. The comp.arch.embedded newsgroup rates ARMs as "the 8051 of the 32 bit world".

Good code, good performance and excellent value for money CPU with wonderful but sometimes quirky peripherals.

Coldfire
Order Code
XCCF/70

Great performance for the money.

68xxx/683xx
Order Code XC68K/70

Excellent code, a perennial favourite.

386/486/Pentium

Order Code XC386/70

Fabulous code generation from the VFX compiler, benefiting from the VFX Forth developments.

MSP430
Order Code . XCMSP430/70

Excellent very low power 16-bit CPU with an instruction set that makes small CPUs fun again. Good access to the TI JTAG facilities by USB or parallel port

68HC12/9S12

Order Code XC68HC12/70

High speed upgrade to 68HC11; superb maths performance and excellent peripherals. Probably the best 8-bit CPU currently available.

8051/C5xx
Order Code

XC8051/70

Suitable for all 8051 derivatives such as Intel, NXP/Philips, Atmel, Cygnal, Siemens, Dallas, Analog Devices etc. The compiler and target code have recently been overhauled.

MIPS
Order Code XCMIPS/70

e.g. PIC32 In preparation

AVR
Order Code
XCAVR/70

In preparation

If the CPU family you are looking for is not here, please ask. We have a number of compilers that were developed as custom targets, and have not yet been documented to production standard

Legacy target CPUs

Because embedded projects can have very long lifetimes, we do not abandon compilers that are no longer under active development. Instead, they are made available with full source code at reduced price. The technical support level will depend on whether we can remember anything about this particular target and still have hardware for it. Consultancy is always available.

Forth 6 Windows compilers

CPU family & Order code

Comments

80x86/88

XC3216/59

A fast 32 bit system for real-mode x86 systems. Best of class for real-mode x86 Forth systems considering speed/size trade-offs.