Woven copper tape is both thermally and electrically conductive. Its been a while since I looked inside mine, so I don't really remember it.

So it is a copper tape, thanks for the info. But why is the color so "yellow"? It doesn't actually look like copper.

There is still a thing that I don't understand: the hot spot should be the CPU, why not contacting it to the die casting instead of the shielding cover ?! To me, there is something that doesn't really make sense in this design.

Edit: interesting enough, it seems that the LG G3 uses the same concept (cf. enclosed). Die casting in the middle with this "gold" tape on the shielding cover. It seems to be a reference design for LG.

My guess is that it's to complete the EMI shield around the cutouts for the SoC and the couple of other parts poking through. Look at the mill-out where the PCB sits on the chassis for the SoC. By doing this, they can shave off a mm or two on the phone.

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Those schematics are funny though.. Ground connected to pin 1... 25 times

Those are all the ground points on the board that aren't part of components. Like screw holes, friction ground contacts, and the shield can. Standard stuff to throw odds and ends that don't make sense elsewhere in the schematic on a single page. On some of the stuff I work on, with hundreds of 11x17 pages for a single board, it's not uncommon to have pages dedicated to holes, bypass caps, and mechanical stuff, all with no regard to pin numbers.

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Originally Posted by fredo490

So it is a copper tape, thanks for the info. But why is the color so "yellow"? It doesn't actually look like copper.

Probably some sort of alloy, nickel/copper. See the link above. Pure copper would corrode too easily.

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There is still a thing that I don't understand: the hot spot should be the CPU, why not contacting it to the die casting instead of the shielding cover ?! To me, there is something that doesn't really make sense in this design..

Ah, a common misconception about chip packaging.

High power chips like PC CPUs need a lot of heat pulled away from them quickly, and the most efficient way is by facing the back of the die away from the package PCB so a heatsink can be slapped on top. These always are left open-top or have a heat spreader of some sort.

But for most chips, the back of the die is bonded to the package PCB (or leadframe) and bond wires used to jumper the die to the package. For chips that need to be cooled, there are dozens or hundreds of vias in the package PCB (metal plated holes through the PCB) and BGA pads on the other sides of the vias. These are called thermals, and conduct heat from the chip die to pads on the BGA. If you look at the back of a typical BGA, these show up as a separated square array of pads in the middle.

The designer of the PCB that uses this chip will design in thermals between the BGA thermal pads and the ground layer(s). The ground layers are nearly solid sheets of copper, and the thermal vias let it act as a heat spreader.

Also, the SoC in the N5 is a multi-chip package (MCP) and has a second BGA with the DRAM sitting on top of the Snapdragon BGA. The Snapdragon BGA PCB has solder balls on top that make contact with the DRAM BGA. It's all covered in rich creamy epoxy, which isn't all that good at conducting heat.

All this leads up to the top of the Snapdragon 800 package being the least useful place to try pulling away heat.

Those are all the ground points on the board that aren't part of components. Like screw holes, friction ground contacts, and the shield can. Standard stuff to throw odds and ends that don't make sense elsewhere in the schematic on a single page. On some of the stuff I work on, with hundreds of 11x17 pages for a single board, it's not uncommon to have pages dedicated to holes, bypass caps, and mechanical stuff, all with no regard to pin numbers.

Believe me, I've worked with plenty of schematics before. I just find it funny that they would label chasis ground as pin 1. Generally that's just ground. Someone obviously had too much time on their hands, considering its an EM shield being called pin 1.

Believe me, I've worked with plenty of schematics before. I just find it funny that they would label chasis ground as pin 1. Generally that's just ground. Someone obviously had too much time on their hands, considering its an EM shield being called pin 1.

I think it depends on the EDA tool and the whim of the library maintainer. From the little symbol creation I've done in KiCAD I think pin number visibility can be turned off for a symbol. I'm looking right now at one of our designs, and half the page is plated drill holes, each numbered pin 1. What's better, on the same page is a single high current screw terminal with 4 leads holding it to the board. It's one solid piece of metal, but the symbol shows pins 1-4.

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