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The Need for More Information Logic Utilization: Number of Slice Flip Flops: 301 out of 12,288 2% Number of 4 input LUTs: 900 out of 12,288 7% Logic Distribution: Number of occupied Slices: 498 out of 6,144 8% Total Number 4 input LUTs: 920 out of 12,288 7% Number used as logic: 900 Number used as a route-thru: 20 Number of bonded IOBs: 21 out of 320 6% Number of BUFG/BUFGCTRLs: 1 out of 32 3% Number used as BUFGs: 1 Number used as BUFGCTRLs: 0 Total equivalent gate count for design: 8,944 How are these resources being used?!? Virtex®-6 FPGA ®