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Signal integrity proving a tough nut to crack at 90nm

One unexpected problem with the transition to 90nm CPU fab has been signal …

It looks as though the transition from 130nm to 90nm chip design is turning out to be much more difficult than most companies anticipated. Of course, this is old news to Intel enthusiasts who have been anxiously awaiting 3.4GHz Prescotts and Apple fans who are still waiting on backlogged Xserve G5s or who (like me) have been putting off buying a new Power Macintosh G5 until the 90nm PowerPC 970FX puts in an appearance. While the PPC 970FX and the Prescott are both shipping (albeit not in volume), one factor Intel, IBM, and everyone else who is fabbing chips at 90nm have had to deal with is signal integrity:

When Agilent Technologies Inc.'s ASIC products division first moved from 130- to 90-nanometer chip design, it got a nasty surprise. "Signal integrity," said Jay McDougal, microprocessor design methodology manager at Agilent, "was really an order of magnitude worse." McDougal's experience seems to track with that of other users and matches what EDA vendor representatives are saying. Such problems as crosstalk-induced delays, crosstalk-induced glitches and power noise due to voltage drop are all accelerated at 90 nm, making design closure more difficult.

Essentially, when you shrink the chip and put more transistors on each wafer, you run into difficulty with current leakage and power noise issues. The taller and thinner wire means they are much closer together, resulting in increased coupling capacitance. Agilent, Toshiba, and IBM have all admitted to being affected by signal integrity problems, the scope of which were mostly unexpected. According to Raminderpal Singh, a senior engineering manager at IBM, they were surprised by how severe the problem was.

"As people push the density, and push the frequency, and voltage goes down, you just have a lot more happening and a lot less to live with," he said. "A whole series of effects becomes very real."

While it is likely that Intel and IBM have been able to address the issue to a large extent with the Prescott and PPC 970FX, this could still be holding up faster CPUs from both companies. Now that the problem is becoming more widely recognized, engineers should be able to account for it during design and production. Of course, accounting for the issue and remediating it are two different ballgames. AMD will be the next big CPU maker to transition its processors to a 90nm process. If they run into problems shipping the 90nm Athlon 64 in the third quarter of this year, we will likely know one reason why.

Eric Bangeman
Eric has been using personal computers since 1980 and writing about them at Ars Technica since 2003, where he currently serves as Managing Editor. Twitter@ericbangeman