There are several comprehensive on-chip diagnostic tools that enable testability and easy debugging. A post-equalized histogram is available for accurate estimation of bit error rate (BER) even in the absence of actual bit errors. Vertical eye statistics can be logged to allow optional optimization of the device settings. The channel estimation hardware allows the accurate measurement of the channel response to assess package, connector, and trace characteristics. Integrated BIST is capable of producing and checking pseudorandom binary sequences (PRBS).