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1 Rev. 5 5 ugust 202 Product data sheet. General description 2. Features and benefits The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEEC standard no. 7. The has octal -type transparent latches featuring separate -type inputs for each latch and 3-state true outputs for bus-oriented applications. latch enable (LE) input and an output enable (OE) input are common to all latches. When LE is HIGH, data at the n inputs enter the latches. In this condition, the latches are transparent, i.e. a latch output changes state each time its corresponding input changes. When LE is LOW the latches store the information that was present at the -inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. The is functionally identical to: 74HC563; 74HCT563, but inverted outputs 74HC373; 74HCT373, but different pin arrangement Input levels: For 74HC573: CMOS level For 74HCT573: TTL level Inputs and outputs on opposite sides of package allowing easy interface with microprocessors Useful as input or output port for microprocessors and microcomputers 3-state non-inverting outputs for bus-oriented applications Common 3-state output enable input Multiple package options ES protection: HBM JES22-4F exceeds V MM JES22-5- exceeds 200 V Specified from 40 C to+85 C and from 40 C to+25 C

19 5. Legal information 5. ata sheet status ocument status [][2] Product status [3] efinition Objective [short] data sheet evelopment This document contains data from the objective specification for product development. Preliminary [short] data sheet ualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [] Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section efinitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL 5.2 efinitions raft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet short data sheet is an extract from a full data sheet with the same product type number(s) and title. short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. pplications pplications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer(s). Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Limiting values Stress above one or more limiting values (as defined in the bsolute Maximum Ratings System of IEC 6034) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Product data sheet Rev. 5 5 ugust of 2

20 Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors specifications such use shall be solely at customer s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors standard warranty and NXP Semiconductors product specifications. Translations non-english (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 5.4 Trademarks Notice: ll referenced brands, product names, service names and trademarks are the property of their respective owners. 6. Contact information For more information, please visit: For sales office addresses, please send an to: Product data sheet Rev. 5 5 ugust of 2

Rev. 5 26 May 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a dual 4-input NOR gate. Inputs also include clamp diodes that enable the use of current

Rev. 7 29 January 2016 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The is specified in compliance with JEDEC

Rev. 5 26 November 2015 Product data sheet 1. General description 2. Features and benefits The is a quad 2-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors

Rev. 5 4 September 202 Product data sheet. General description The is a quad 2-input OR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages

Rev. 8 28 December 2015 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard

Rev. 9 18 April 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a 12-stage serial shift register. It has a storage latch associated with each stage

Rev. 8 4 April 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an 8-stage serial shift register. It has a storage latch associated with each stage

Rev. 9 23 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a 4-bit, a 4-bit BCO to octal decoder with active LOW enable or an 8-output (Y0 to

Rev. 4 1 December 2015 Product data sheet 1. General description The is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs include clamp diodes. This enables the use of current limiting resistors

Rev. 6 1 April 2016 Product data sheet 1. General description 2. Features and benefits 3. Applications The contains two 1-of-4 decoders/demultiplexers. Each has two address inputs (na0 and na1, an active

Rev. 7 8 December 2015 Product data sheet 1. General description The is a hex unbuffered inverter. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to

Rev. 3 24 February 2016 Product data sheet 1. General description The is an 8-bit binary counter with a storage register and 3-state outputs. The storage register has parallel (Q0 to Q7) outputs. The binary

Rev. 5 3 February 2016 Product data sheet 1. General description The is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock

Rev. 7 30 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a dual 4-bit internally synchronous binary counter. The counter has an active HIGH

Rev. 9 15 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Applications The is a quad two-input NAND gate. Each input has a Schmitt trigger circuit. The gate switches

Rev. 11 29 June 2012 Product data sheet 1. General description The provides the non-inverting buffer. The output of this device is an open drain and can be connected to other open-drain outputs to implement

Rev. 8 29 November 2012 Product data sheet 1. General description The provides the single D-type flip-flop with 3-state output. The flip-flop will store the state of data input (D) that meet the set-up

Rev. 7 1 April 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a for liquid crystal and LED displays. It has four address inputs (D0 to D3), an active

Rev. 7 10 September 2014 Product data sheet 1. General description The provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the

Rev. 02 3 September 2007 Product data sheet 1. General description The provides a 3-input EXCLUSIVE-OR function. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these

Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The is specified in compliance

Rev. 6 22 May 2015 Product data sheet 1. General description The is a single-pole 16-throw analog switch (SP16T) suitable for use in analog or digital 16:1 multiplexer/demultiplexer applications. The switch

Rev. 8 25 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a with three oscillator terminals (RS, REXT and CEXT), ten buffered outputs (Q3 to

Rev. 8 3 December 2015 Product data sheet 1. General description The is a quad single pole, single throw analog switch. Each switch features two input/output terminals (ny and nz) and an active HIGH enable

Rev. 9 19 January 2015 Product data sheet 1. General description The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with

Rev. 5 15 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a programmable timer which consists of a 16-stage binary counter, an integrated

Rev. 6 29 November 2012 Product data sheet 1. General description The is a synchronous presettable 4-bit binary counter which features an internal look-ahead carry circuitry for cascading in high-speed

SOT457 in SOT457 Rev. 1 20 February 2014 Product data sheet 1. Product profile 1.1 General description LED driver consisting of resistor-equipped PNP transistor with two diodes on one chip in an SOT457

Rev. 4 9 June 03 Product data sheet. General description The is a high-bandwidth switch designed for the switching of high-speed UB.0 signals in handset and consumer applications. These applications could

Rev. 6 18 November 2010 Product data sheet 1. Product profile 1.1 General description The is a sensitive magnetic field sensor, employing the magneto-resistive effect of thin film permalloy. The sensor