Abstract

This paper proposes a new parallel-LC-resonance-type fault current limiter (FCL) that uses a resistor in series with a capacitor. The proposed FCL is capable of limiting the fault current magnitude near to the prefault magnitude of distribution feeder current by placing the mentioned resistor in the structure of the FCL. In this way, the voltage of the point of common coupling does not experience considerable sag during the fault. In addition, the proposed FCL does not use a superconducting inductor which has high construction cost. Analytical analysis for this structure is presented in detail, and simulation results using power system computer-aided design/electromagnetic transients, including dc software are obtained to validate the effectiveness of this structure. Also, an experimental setup is provided to show the accuracy of the analytic analyses and simulation results.