We are adding eDMA support in QuadSPI. But there is an issue of incompatible endianness. This target is little-endian but data is store in QuadSPI’s RX buffer in big-endian format. Is there any way by which DMA can automatically handle big-to-little endian conversion along with moving the data. We have tried moving data byte-by-byte and adjusting Destination Address Signed Offset (DOFF) and MLOFF correspondingly to handle endianness conversion automatically via eDMA but it doesn’t seem to work with QuadSPI. Is there any way in eDMA to accomplish this?

First I would recommend to arrange your data in the same endianess, it will save some struggling, but I am guessing is something you already looked at... What is this data you are reading? is general data or Graphics? Is there something you could let me know to understand more about the target application?

Did you looked at the QSPI_MCR[END_CFG] I understand from the manual you can change the endianess of what you are reading.

My initial guess is that you can't have byte read access to the RX buffers, have you tried this using the CPU? to see how it affects byte accesses on the RX buffers?

If QSPI_MCR[END_CFG] does not work on your specific case, maybe is better if you use the mode: AHB Buffer data read via memory mapped access. That mode is exactly as if you were reading OCRAM or DDR, can have byte/word read accesses because the controller maps the memory to certain memory address range. If your eDMA configuration re arranges bytes correctly from RAM to RAM it will work from QuadSPI to RAM.

First I would recommend to arrange your data in the same endianess, it will save some struggling, but I am guessing is something you already looked at... What is this data you are reading? is general data or Graphics? Is there something you could let me know to understand more about the target application?

Did you looked at the QSPI_MCR[END_CFG] I understand from the manual you can change the endianess of what you are reading.

My initial guess is that you can't have byte read access to the RX buffers, have you tried this using the CPU? to see how it affects byte accesses on the RX buffers?

If QSPI_MCR[END_CFG] does not work on your specific case, maybe is better if you use the mode: AHB Buffer data read via memory mapped access. That mode is exactly as if you were reading OCRAM or DDR, can have byte/word read accesses because the controller maps the memory to certain memory address range. If your eDMA configuration re arranges bytes correctly from RAM to RAM it will work from QuadSPI to RAM.