During power-on, RESET is asserted when the supply voltage (VDD) becomes greater than 1.1 V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage, VIT. An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time (td(typ) = 200 ms) starts after VDD rises above the threshold voltage, VIT. When the supply voltage drops below the VIT threshold voltage, the output becomes active (low) again. No external components are required. All devices in this family have a fixed sense-threshold voltage (VIT) set by an internal voltage divider.

The TLV803 has an active-low, push-pull RESET output. See the TLV803 for an open-drain RESET output and the TLV810 for a push-pull, active-high RESET output.

This product family is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available in a 3-pin SOT-23 package. The TLV809 devices are characterized for operation over a temperature range of –40°C to +85°C.