Friday, October 10, 2014

Apologies once more for the lack of updates in the last month or so. Mister Polomint prodded me a week ago to make some kind of post, so here it is. Steady progress is being made with a whole heap of testing and tuning and a few new features added. No pretty pictures or videos just yet, but there's been some more sceen modes added

Again, rather than write an essay, I'll just post the last few additions to the changelog for now.

ZX Prism version 0.16 10/10/2014 (non-released, flashed to board)

Added an extra bit to the Flash ROM address bus so the whole chip can be utilised.

More interrupt tuning for different CPU speeds. Speeds 0-6 (3.5MHz - 28Mhz) work with all games/demos tested. Speed 7 (56MHz) needs further tuning

ZX Prism version 0.15 19/9/2014 (non-released, flashed to board)

Fixed the main ZX Prism palette. (until this fix, all 3 colour elements were getting set at the same time, meaning you could only select from black and 15 shades of grey!)

Added write masks for writes to 0x4000 - 0x5FFF (0=currently paged, 1-15=combos of planes). This makes working with the new video modes easier - for example, you can write to multiple planes of a planar mode at the same time, or quickly modify existing software to work in an overlay mode by adding an OUT to the beginning and end of the sprite routine so sprites are written to the shadow screen and overlaid over the main screen to avoid colour clash... etc etc. Care must be taken when using this feature from BASIC (so as not to stop writes to system variables...)

As SRAM and FLASH share FPGA pins, wrote pin multiplexor to facilitate use of both. SRAM signals are mapped to the pins when SRAM_nCS is 0, FLASH signals are mapped when FLASH_nCE is 0. When bothare '1' the pins are set to high impedence so they can be used for other things (eg ROM cartridge, SID, general sound etc - will require fast bus transceiver to translate voltage levels and leave bus at high impedence when FLASH/SRAM are in use)

For the time being, the memory multiplex is "locked" to talk to SRAM only

Changed memory mapping so that VRAM is used by both video and cpu for page 5 and 7 (previously CPU writes were being mirrored by VRAM, with CPU reads using SRAM and video reads using VRAM..) this frees up 32K of SRAM for other uses.

More interrupt tuning (frame length, int start, int duration for speed 0) to fix Mikie (was freezing) and others which weren't detecting keypresses. FUSETEST now detects this as a 48K spectrum due to frame length