2. In the Fixed-Point Conversion task, click Advanced and set the Safety margin for sim min/max (%) to 0.

3. Set the proposed type of the freqCounter variable to unsigned 27-bit integer by entering numerictype(0, 27, 0) in its 'Proposed Type' column.

4. On the left, right-click the Fixed-Point Conversion task and select Run This Task.

Map Design Ports to Target Interface

In the Select Code Generation Target task, select the FPGA Turnkey workflow and Xilinx Virtex-5 ML506 development board as follows:

1. For Workflow, select FPGA Turnkey.

2. For Platform, select Xilinx Virtex-5 ML506 development board. If your target device is not in the list, select Get more to download the support package. The coder automatically sets Chip family, Device, Package, and Speed according to your platform selection.

3. For FPGA clock frequency, for both Input and System, enter 100.

4. In the Set Target Interface task, map the design input and output ports to interfaces on the target device by setting the fields in the Target Platform Interfaces column as follows:

Blink_frequency_1 to User Push Buttons N-E-S-W-C [0:4]

Blink_direction to User Push Buttons N-E-S-W-C [0:4]

LED to LEDs General Purpose [0:7]

You can leave the 'Read_back' port unmapped.

Generate Programming File and Download To Hardware

You can generate code, perform synthesis and analysis, and download the design to the target hardware using the default settings:

1. For the Synthesis and Analysis task group, uncheck the Skip this Step option.

2. For the Download to Target task group, uncheck the Skip this Step option.