Hybrid tunnel diodes could leapfrog Moore's Law

PORTLAND, Ore.  Semiconductor researchers have known since the 1950s that the quantum-confinement effects of tunnel diodes boost circuit speed and current handling while reducing component count and power consumption. But processing difficulties long confined tunnel diodes to exotic materials and discrete devices.

Now some researchers say a new CMOS-compatible tunnel diode process could extend the lifetime of existing silicon fabs by leapfrogging the next node in the semiconductor road map (as defined by Moore's Law). Silicon-integratable tunnel diodes might also provide enough current density to allow telecom radiofrequency components to be moved off separate-and costly-gallium-arsenide chips and onto silicon, allowing one-chip cell phone solutions.

"Let me be clear on one point: This is not a replacement for transistor technology," said Ohio State professor Paul R. Berger, who has appointments in both the electrical-engineering and physics departments. Rather, "this is to augment transistor technology. It would be the marriage of tunnel diodes with silicon transistors."

Berger asserts that all the same arithmetic and logical operations performed today can be achieved with simpler circuits that would employ his hybrid tunnel diodes, which consume less chip area because they require fewer devices. If added to the normal CMOS processing steps, Berger said, the diodes promise a lasting benefit that could leapfrog Moore's Law by a generation.

"This is a way to peel back time and go to a slightly simpler topology for your circuits," he said. "You might argue that in some sense you could leapfrog one generation in chip fab manufacturing.

"A chip fab plant costs about $1 billion to $2 billion, and as [chip manufacturers] scale from the 130-nanometer node to the 90-nm node, they have to scrap the entire [130-nm] factory and start all over again. What if I told you that you could [instead] add a few extra process steps at the end of your CMOS production line to add this tunnel diode-a low-temperature process that is integratable with transistors?"

The process "would be a one-time insertion into the silicon technology road map, similar to the way copper interconnects were inserted: You get a one-time benefit that you then have to propagate henceforth," said Berger.

The Ohio State professor performed the development work with Phil Thompson, head of the molecular-beam epitaxial growth and characterization research group at the Naval Research Laboratory; Roger Lake, a professor at the University of California-Riverside; and graduate students Niu Jin, Sung-Yong Chung, Anthony Rice and Ronghua Yu.

In its current demonstration, Berger's group has characterized a hybrid tunnel diode whose peak current density is three times higher than normal silicon peak current densities but that maintains a respectable peak-to-valley current ratio (greater than 2) and a fast speed index (34 millivolts/picosecond).

"Our current device is for high-current-density applications. [Those are] a subset of the overall picture, addressing more the wireless mixed-signal arena, where you want to be able to create microwave energy in a device like a pocket pager or a cell phone. It would be nice to create this energy in silicon, vs. having the digital part of your cell phone be in silicon and the RF components made with gallium arsenide," said Berger.

Tunnel diodes were first investigated as discrete devices in the 1950s and 1960s. The diodes exploit quantum confinement's negative differential resistance, thereby enabling electrons to leverage quantum probabilities to disappear from one side of a thin barrier and simultaneously reappear on the other side, or "tunnel."

Modern-day tunnel diodes confine electrons to a single energy level (called intraband) within the crystalline junction of two exotic materials. As far back as the 1960s, however, a scientist named Leo Esaki demonstrated a method that permits electrons to pass back and forth among a variety of energy bands. Such "interband" diodes today are called as Esaki diodes.

In the 1970s, Esaki, working with a group at IBM Corp., created the first resonant-tunneling diodes, using epitaxial growth to create heterojunctions. Esaki got the Nobel prize for his work in 1973.

Nonetheless, to this day, most tunnel diodes continue to depend on exotic materials, such as GaAs/AlGaAs, and on intraband tunneling. That's because the Esaki devices have been handicapped in their ability to dope regions heavily enough-keeping tunnel diodes intraband, discrete and in exotic materials, rather than interband, integrated and cast in a normal silicon process.

To create their hybrid tunnel diode, Berger and his team harked back to Esaki's original work on interband tunnel diodes. According to Berger, heavy doping with boron and phosphorus is necessary to make a big enough difference in the bandgap characteristics of the two dissimilar materials forming the heterojunction (here, Si/SiGe). When the doping is heavy enough and the junctions small enough (about 1 to 10 nanometers), the result is a quantum-confinement effect within the tunnel diode's heterojunction.

But as the confinement layer is thinned to just a few nanometers, the differently doped layers tend to interact and degrade the performance of the tunnel diode. To solve the doping problem, in 1998 Berger created a hybrid tunnel diode combining the Esaki and resonant tunnel diodes' characteristics, along with a process to realize the hybrid device with silicon and silicon-germanium processing steps.

Using low-temperature molecular-beam epitaxial growth and a "few tricks of the trade," as he calls them, Berger now claims to have a process that provides high current densities without excessively sacrificing peak-to-valley current ratios.

Berger layered silicon and silicon germanium in a structure measuring a few nanometers thick, with a central spacer layer that keeps the oppositely charged boron and phosphorus dopants from interacting. With that process in hand, Berger's group claims his hybrid-diode technology is ready for CMOS fab insertion.

"Tunnel diodes offer an improvement to circuits that can now be harnessed by silicon microelectronics," said Berger.

Conventional diodes act as rectifiers, allowing current to flow in one direction and blocking current flow in the other. But interband tunnel diodes use quantum-mechanical tunneling to superimpose a momentary large current pulse, at discrete voltage levels, on the normal diode characteristics.

"What this [momentary pulse of current] does is give you a current voltage that looks like the letter N," said Berger. "And that allows greater functionality at the circuit level, because now if you put a load line through that [N shape] you actually have multiple intersection points, so it's very easy to create back-to-back tunnel diodes that will latch to a high state or a low state."

Berger said his tunnel diode can be made suitable for nearly any application served by silicon and gallium arsenide today, merely by scaling the thickness of the quantum confinement layer to sculpt the current density precisely for specific applications.

"The [quantum] probability that tunneling will occur is exponentially related to the distance in between," said Berger. "By controlling that from anywhere between a few nanometers up to 10 or 12 nanometers, you can get a huge variation in the current density of these devices-as much as six orders of magnitude."

In 1999, Berger built an SRAM circuit using tunnel diodes that reduced the component real estate required so as to achieve four times the density of a conventional SRAM memory cell. Now he claims to have the process in place to begin building such devices on standard CMOS fab lines.

"You could replace a power-hungry SRAM memory circuit that requires six transistors with a tunnel-diode-based SRAM that still needs a couple of transistors to drive and read it but is much more compact-just two tunnel diodes and two transistors. We have begun to demonstrate that the tunnel diodes can be vertically stacked on top of the transistors," he said.

Berger's group and other collaborators are working on a demo chip that shows the extra processing steps needed to retrofit a standard CMOS fab for Berger's diodes.

Berger's work was funded by the National Science Foundation and the Office of Naval Research. He predicts that technology based on his work could reach end users in five to 15 years.