Save it and build the project by clicking Build > Build Project to generate the cyfxgpif2config.h file

4. Set CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT to '0' in the cyfxslfifosync.h file.

5. Build the project. This step generates the image file for the 8-bit Slavefifo application (for 24-bit Slavefifo if 24 Bit is selected in step 3)

Note: When the data bus width is changed to 8-bit, the address lines are mapped to GPIO 8 (A1) and GPIO 9 (A0), unlike GPIO 28 (A1) and GPIO 29 (A0) in the case of both 16-bit and 32-bit bus widths. Similarly, with the 24-bit bus width, address lines are mapped with GPIO 41 (A1) and GPIO 42 (A0). Pin mapping for address lines may change based on the number of control lines, data bus width, and number of address lines selected. Ensure that the external processor drives the address lines that are mapped to the GPIF interface per the selected bus width, number of address lines, and number of control lines.