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For the PHY address
detected, write to register 2, Control Register MAC (page 2) to set proper
RGMII Rx and Tx timing control bits.

For the PHY address detected,
configure the register 4 (autoneg copper advertisement reg) for 100 and 10 Mbps
for relevant values. You can also configure fields like asymmetric pause and
pause in this register.

For the PHY address
detected, configure the register 9 (1000 BaseT control register) to advertise
1000 Mbps (if gigabit mode is to be supported).