Increasing integrated circuit (IC) power density can result in high
temperature, reducing reliability, reducing performance performance, increasing
leakage power consumption, and increasing the cost of economical cooling. The
use of thermal analysis during early stages of the IC design can enable
temperature optimization techniques that would be impractical if thermal
analysis were deferred until packaging design. Many methods of integrated
circuit thermal analysis do not have sufficient performance and accuracy for
use in architectural design.

ISAC2(FATA/ThermalScope) is built on ISAC, a static and dynamic
thermal analysis software package. The initial version of ISAC was described here.

ISAC2 improved the time-domain solver in ISAC to achieve higher performance for
dynamic thermal analysis while maintaining similar accuracy. ISAC2 replaced the
original temperature update function in ISAC with a trapezoidal method based
temperature update function. The step size adaptation method in ISAC2 is based
on third-order finite divided temperature difference. ISAC2 also adds
quiescence detection for shorter simulation time.

ISAC2 consists of a device temperature solver, as well as a
chip-package analysis tool. Together, the thermal profile of a chip can be
computed down to the device-level, taking into account the nanoscale thermal
effects, such as the ballistic phonon effect. In the following, the device
solver, and the chip-package analysis tool will be described.

ISAC2 needs the AMD Core Math Library (ACML) to be available. ACML can be
downloaded from here.

Acknowledgments: This work was supported in
part by the Natural Science and Engineering Research Council under Discovery Grant
#388694-01, in part by the National Science Foundation under awards CNS-0347941 and
CCF-0702761, and in part by the Semiconductor Research Corporation under
Awards 2007-HJ-1593 and 2007-TJ-1589.