Improved precision of relational analysis by exploiting more equivalence information.

Improved loop analysis for loops with counters in memory.

Improved iterative decoding if the control flow targets are aligned.
If symbols are known for the aligned targets, they will be kept separate
like for sets of constants.

Improved precision of stack relative memory information.

When data is read from writable or unreadable sections,
the decoder provides an additional hint to declare the accessed area
as volatile. Declaring memory areas as volatile prevents the decoder
from accessing their data to reconstruct the control flow.

ARM:

Added support for ARMv8 AArch32 instructions.

Added support for cryptographic extension in AArch64 mode.

General improvements of the decoder, and improved switch table decoding for GCC specifically.

Improved handling of guarded execution.

Improved target alignment for indirect branches with mode switch.

C16x: improved precision of CP update handling.

PowerPC: improved switch table decoding.

TriCore: improved handling of switch tables.

V850:

Improved decoding of computed returns.

Improved SDA guessing for GHS.

FERET and EIRET now handled as end of program.

Cache and pipeline analysis

Improve performance of generic TimingProfiler pipeline.

Improve memory consumption and analysis time for large tasks with short call-string settings.

RH850: Improved timing analysis for data flash accesses.

C++ Call Target Analyzer

Now using the LLVM/Clang 7 toolchain.

Trace conversion

Support for the Infineon MTV TAB trace format.

Interactive MCDS tracing via Infineon DAS on TriCore AURIX devices.

Improved interrupt handling and trace coverage for PPC NEXUS traces.

Task switches can now be detected by specifying the memory cell that contains
the current active task ID. You can specify using the global attribute running_task: