Python Example: Building an Arb with 16-bit steps (SDG2000X/SDG6000X)

The SIGLENT SDG2000X and SDG6000X feature 16-bit voltage step resolution. This provides 65,535 discrete voltage steps that can cover the entire output range (20 Vpp into a High Z load) which can effectively be used to test A/D converters and other measurement systems by sourcing waveforms with very small changes.

In this example, we use Python 2.7 and PyVISA 1.8 to create a ramp waveform that is comprised of steps of the Least Significant Bit (LSB) from point 0 to 65535 on Channel 1.

We also implement the TrueArb function that allows you to specify the sample rate and also ensures that each sample is sourced.

NOTE: You will need to change the instrument ID to match your specific instrument. We also recommend setting the amplitude and other instrument parameters prior to enaling the output of the instrument.