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Abstract:

A temperature sensor includes: a gate voltage generation unit including a
bias resistor, a first source resistor, and a first MOS transistor and
configured to generate a gate voltage; and a variable voltage output unit
including an output resistor, a second source resistor, and a second MOS
transistor and configured to generate the variable voltage.

Claims:

1. A temperature sensor which compares a reference voltage having a
constant level according to temperature change with a variable voltage
having a variable level according to temperature change and generates a
temperature signal, comprising: a gate voltage generation unit comprising
a bias resistor, a first source resistor, and a first MOS transistor and
configured to generate a gate voltage, wherein resistance changes of the
bias resistor and the first source resistor based on temperature change
are offset by each other, and slope change of the gate voltage based on
the temperature change is determined according to a threshold voltage of
the first MOS transistor; and a variable voltage output unit comprising
an output resistor, a second source resistor, and a second MOS transistor
and configured to generate the variable voltage, wherein resistance
changes of the output resistor and the second source resistor based on
temperature change are offset by each other, and slope change of the
variable voltage based on the temperature change is determined according
to a threshold voltage of the second MOS transistor.

3. The temperature sensor of claim 1, wherein the gate voltage generation
unit comprises: the bias resistor coupled between a supply voltage and a
first node outputting the gate voltage; the first MOS transistor coupled
between the first node and a second node and driven in response to a bias
voltage; and the first source resistor coupled between the second node
and a ground voltage.

5. The temperature sensor of claim 1, wherein the variable voltage output
unit comprises: the output resistor coupled between a supply voltage and
a first node outputting the variable voltage; the second MOS transistor
coupled between the first node and a second node and driven in response
to the gate voltage; and the second source resistor coupled between the
second node and a ground voltage.

6. The temperature sensor of claim 1, wherein the first and second MOS
transistors are NMOS transistors.

7. A temperature sensor which compares a reference voltage having a
constant level according to temperature change with a variable voltage
having a variable level according to temperature change and generates a
temperature signal, comprising: a gate voltage generation unit comprising
a bias resistor having a resistance value set by a test mode or fuse
cutting, a first source resistor, and a first MOS transistor and
configured to generate a gate voltage, wherein resistance changes of the
bias resistor and the first source resistor based on temperature change
are offset by each other, and slope change of the gate voltage based on
the temperature change is determined according to a threshold voltage of
the first MOS transistor; and a variable voltage output unit comprising
an output resistor, a second source resistor, and a second MOS transistor
and configured to generate the variable voltage, wherein resistance
changes of the output resistor and the second source resistor based on
temperature change are offset by each other, and slope change of the
variable voltage based on the temperature change is determined according
to a threshold voltage of the second MOS transistor.

9. The temperature sensor of claim 7, wherein the gate voltage generation
unit comprises: a control signal generator configured to selectively
enable a plurality of control signals for setting the resistance value of
the bias resistor in response to a test mode signal, in the test mode;
the bias resistor coupled between a supply voltage and a first node
outputting the gate voltage; the first MOS transistor coupled between the
first node and a second node and driven in response to a bias voltage;
and the first source resistor coupled between the second node and a
ground voltage.

10. The temperature sensor of claim 9, wherein the control signal
generator comprises a plurality of fuses which are selectively cut to
selectively enable the plurality of control signals.

12. The temperature sensor of claim 7, wherein the variable voltage
output unit comprises: the output resistor coupled between a supply
voltage and a first node outputting the variable voltage; the second MOS
transistor coupled between the first node and a second node and driven in
response to the gate voltage; and the second source resistor coupled
between the second node and a ground voltage.

13. The temperature sensor of claim 7, wherein the first and second MOS
transistors are NMOS transistors.

14. A temperature sensor comprising: a bias resistor connected to a
supply voltage source; a first NMOS transistor connected between the bias
resistor and a first source resistor connected to a ground voltage
source; an output resistor connected to the supply voltage source; and a
second NMOS transistor connected between the output resistor and a second
source resistor connected to the ground voltage source, wherein the gate
of the second NMOS transistor is connected to the bias resistor and the
first NMOS transistor.

15. The temperature sensor of claim 14, further comprising: a control
signal generator configured to selectively enable a plurality of control
signals for setting the resistance value of the bias resistor in response
to a test mode signal.

16. The temperature sensor of claim 15, wherein the control signal
generator comprises a plurality of fuses which are selectively cut to
selectively enable the plurality of control signals.

Description:

CROSS-REFERENCES TO RELATED APPLICATIONS

[0001] The present application claims priority under 35 U.S.C 119(a) to
Korean Application No. 10-2011-0033433, filed on Apr. 11, 2011, in the
Korean intellectual property Office, which is incorporated herein by
reference in its entirety.

BACKGROUND

[0002] With increasing demand on high performance of electronic systems
such as personal computers or electronic communication devices, operation
speed and memory capacity of semiconductor memory devices such as DRAM
are being improved. A semiconductor memory device mounted in a mobile
system operated by a battery, such as a mobile phone or notebook
computer, requires low power consumption. Therefore, much research is
being actively conducted on a method for reducing an operating current
and a standby current.

[0003] A DRAM memory cell including one transistor and one storage
capacitor has a temperature-sensitive data retention characteristic.
Therefore, an operation condition of circuit blocks within a
semiconductor integrated circuit needs to be controlled according to a
variation of the surrounding temperature. For example, DRAM used in
mobile products controls a refresh period according to a variation of the
surrounding temperature. In order to control such an operation condition
depending on the variation of the surrounding temperature, a temperature
sensor such as a digital temp sensor regulator (DTSR) or analog temp
sensor regulator (ATSR) may be used. Such a temperature sensor serves to
sense a high temperature, thereby controlling an operation period so as
to reduce current consumption in a self refresh mode and monitoring the
surrounding temperature during a normal operation.

SUMMARY

[0004] An embodiment of the present invention relates to a temperature
sensor capable of easily recognizing variability of a temperature signal
even though a PVT variation occurs.

[0005] In one embodiment, there is provided a temperature sensor which
compares a reference voltage having a constant level according to
temperature change with a variable voltage having a variable level
according to temperature change and generates a temperature signal. The
temperature sensor includes: a gate voltage generation unit including a
bias resistor, a first source resistor, and a first MOS transistor and
configured to generate a gate voltage, wherein resistance changes of the
bias resistor and the first source resistor based on temperature change
are offset by each other, and slope change of the gate voltage based on
the temperature change is determined according to a threshold voltage of
the first MOS transistor; and a variable voltage output unit including an
output resistor, a second source resistor, and a second MOS transistor
and configured to generate the variable voltage, wherein resistance
changes of the output resistor and the second source resistor based on
temperature change are offset by each other, and slope change of the
variable voltage based on the temperature change is determined according
to a threshold voltage of the second MOS transistor.

[0006] In another embodiment, there is provided a temperature sensor which
compares a reference voltage having a constant level according to
temperature change with a variable voltage having a variable level
according to temperature change and generates a temperature signal. The
temperature sensor includes: a gate voltage generation unit including a
bias resistor having a resistance value set by a test mode or fuse
cutting, a first source resistor, and a first MOS transistor and
configured to generate a gate voltage, wherein resistance changes of the
bias resistor and the first source resistor based on temperature change
are offset by each other, and slope change of the gate voltage based on
the temperature change is determined according to a threshold voltage of
the first MOS transistor; and a variable voltage output unit including an
output resistor, a second source resistor, and a second MOS transistor
and configured to generate the variable voltage, wherein resistance
changes of the output resistor and the second source resistor based on
temperature change are offset by each other, and slope change of the
variable voltage based on the temperature change is determined according
to a threshold voltage of the second MOS transistor.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The above and other aspects, features and other advantages will be
more clearly understood from the following detailed description taken in
conjunction with the accompanying drawings, in which:

[0008] FIG. 1 illustrates the configuration of a semiconductor memory
device including a temperature sensor in accordance with an embodiment of
the present invention;

[0009]FIG. 2 is a circuit diagram of a variable voltage generation unit
included in the temperature sensor of FIG. 1;

[0010]FIG. 3 is a graph showing the characteristics of a gate voltage and
a variable voltage generated by the variable voltage generation unit of
FIG. 2;

[0011]FIG. 4 is a circuit diagram illustrating a variable voltage
generation unit included in a temperature sensor in accordance with an
embodiment of the present invention; and

[0012] FIG. 5 is a graph explaining the operation of the temperature
sensor illustrated in FIG. 1.

DESCRIPTION OF SPECIFIC EMBODIMENTS

[0013] Hereinafter, embodiments of the present invention will be described
with reference to accompanying drawings. However, the embodiments are for
illustrative purposes only and are not intended to limit the scope of the
invention.

[0014] FIG. 1 illustrates the configuration of a semiconductor memory
device including a temperature sensor in accordance with an embodiment of
the present invention.

[0015] Referring to FIG. 1, the temperature sensor 1 in accordance with an
embodiment of the present invention includes a reference voltage
generation unit 11, a variable voltage generation unit 12, and a
comparison unit 13. The reference voltage generation unit 11 is
configured to generate a reference voltage VREF remaining constant in
spite of varying temperature. The variable voltage generation unit 12 is
configured to receive a bias voltage VBIAS and generate a variable
voltage VTEMP having a variable level according to temperature change.
The comparison unit 13 is configured to compare the levels of the
reference voltage VREF and the variable voltage VTEMP and generate a
temperature signal TQ.

[0016] In an embodiment of the present invention, the variable voltage
VTEMP is set in such a manner as to have a level which linearly decreases
as the temperature increases. Therefore, when the variable voltage VTEMP
is at a lower level than that of the reference voltage VREF, the
comparison unit 13 generates an enabled temperature signal TQ because the
temperature is higher than the temperature corresponding to the reference
voltage VREF.

[0017] An internal circuit 2 is configured to receive the temperature
signal TQ and perform an internal operation based on temperature. The
internal circuit 2 may include a circuit for controlling an internal
operation. For example, when the internal circuit 2 is a refresh period
control circuit and the enabled temperature signal TQ is inputted, the
internal circuit 2 may reduce a refresh period so that a large number of
refresh operations are performed per unit time.

[0018] Referring to FIG. 2, the variable voltage generation unit 12 in
accordance with an embodiment of the present invention includes a gate
voltage generation section 121 and a variable voltage output section 122.
The gate voltage generation section 121 includes a bias resistor Rbias, a
first source resistor RS11, and a first NMOS transistor N11, and is
configured to generate a gate voltage VGATE. The variable voltage output
section 122 includes an output resistor Rout1, a second source resistor
RS12, and a second NMOS transistor N12, and is configured to generate a
variable voltage VTEMP. The bias resistor Rbias is coupled between a
supply voltage VL and a node nd11, the first NMOS transistor N11 is
coupled between the node nd11 and a node nd12 and driven in response to
the bias voltage VBIAS, and the first source resistor RS11 is coupled
between the node nd12 and a ground voltage VSS. The output resistor Rout1
is coupled between the supply voltage VL and a node nd13 outputting the
variable voltage VTEMP, the second NMOS transistor N12 is coupled between
the node nd13 and a node nd14 and driven in response to the gate voltage
VGATE, and the second source resistor RS12 is coupled between the node 14
and the ground voltage VSS.

[0019] The characteristics of the gate voltage VGATE and the variable
voltage VTEMP generated by the variable voltage generation unit 12 based
on temperature change may be checked with reference to FIG. 3.

[0020] Referring to FIG. 3, the level of the gate voltage VGATE linearly
increases as the temperature increases, and the level of the variable
voltage VTEMP linearly decreases as the temperature increases. The
linearity of the level changes of the gate voltage VGATE and the variable
voltage VTEMP based on the temperature change may be described in more
detail as the following equations.

[0021] First, the gate voltage VGATE may be expressed as the following
equation.

VGATE = VL - Rbias RS 11 [ VBIAS - Vth 1 -
α T - α T 0 ] ##EQU00001##

[0022] As known from the equation, resistance changes of the bias resistor
Rbias and the first source resistor RS11 based on the temperature change
are offset by each other. Therefore, since the level change of the gate
voltage VGATE based on the temperature change depends on a threshold
voltage Vth1 of the first NMOS transistor N11, the level change has
linearity.

[0023] Next, the variable voltage VTEMP may be expressed as the following
equation.

[0024] As known from the equation, resistance changes of the output
resistor Rout and the second source resistor RS12 based on temperature
change are offset by each other. Therefore, since the level change of the
gate voltage VTEMP based on the temperature change depends on a threshold
voltage Vth2 of the second NMOS transistor N12, the level change has
linearity.

[0025] Referring to FIG. 4, a variable voltage generation unit 12 in
accordance with an embodiment of the present invention includes a gate
voltage generation section 123 and a variable voltage output section 124.

[0026] The gate voltage generation section 123 includes a control signal
generator 121, a bias resistor 122, a first NMOS transistor N13, and a
first source resistor RS13. The control signal generator 121 is
configured to receive a test mode enable signal TM_EN and a test mode
signal TM<1:N> and generate a plurality of control signals
CTR<1:2N> which are selectively enabled by a test mode or fuse
cutting. The bias resistor 122 is coupled between a supply voltage VL and
a node nd15 and has a resistance value controlled according to the
control signals CTR<1:2N>. The first NMOS transistor N13 is
coupled between the node nd15 and a node nd16 and driven in response to a
bias voltage VBIAS. The first source resistor RS13 is coupled between the
node nd16 and a ground voltage VSS.

[0027] The control signal generator 121 generates the control signals
CTR<1:2N> which are selectively enabled according to the test
mode signal TM<1:N> when the test mode enable signal TM_EN is
enabled. Furthermore, the control signal generator 121 includes a
plurality of fuses. Thus, when the test mode enable signal TM_EN is
disabled, the control signal generator 121 generates the control signals
CTR<1:2N> which are selectively enabled according to a
selective cutting of the included fuses.

[0028] The variable voltage output section 124 includes an output resistor
Rout1, a second NMOS transistor N14, and a source resistor RS14. The
output resistor Rout1 is coupled between the supply voltage VL and a node
nd17 outputting a variable voltage VTEMP. The second NMOS transistor N14
is coupled between the node nd17 and a node nd18 and driven in response
to the gate voltage VGATE. The second source resistor RS14 is coupled
between the node nd18 and the ground voltage VSS.

[0029] The variable voltage generation unit 12 configured in such a manner
may control the resistance voltage of the bias resistor 122 according to
the control signals CTR<1:2N> which are selectively enabled by
a test mode or fuse cutting.

[0030] In accordance with the embodiments of the present invention, the
temperature sensor 1 generates the variable voltage VTEMP of which the
level linearly changes according to temperature change, and generates the
temperature signal TQ by comparing the variable voltage VTEMP with the
reference voltage VREF. That is, referring to FIG. 5, a variable voltage
VTEMP(new) generated by the temperature sensor 1 in accordance with an
embodiment of the present invention linearly decreases with a constant
slope according to the temperature change, unlike a variable voltage
VTEMP(old) generated according to a known art. Therefore, the variability
of the temperature signal TQ may be easily understood even though a PVT
variation occurs.

[0031] The embodiments of the present invention have been disclosed above
for illustrative purposes. Those skilled in the art will appreciate that
various modifications, additions and substitutions are possible, without
departing from the scope and spirit of the invention as disclosed in the
accompanying claims.

Patent applications by Hyun Sik Jeong, Seoul KR

Patent applications by Saeng Hwan Kim, Suwon-Si KR

Patent applications by Hynix Semiconductor Inc.

Patent applications in class By electrical or magnetic heat sensor

Patent applications in all subclasses By electrical or magnetic heat sensor