Module documentation for 0.99.3

clash-ghc - Haskell/GHC front-end for the CλaSH compiler

Contains code from the GHC compiler, see the
LICENSE_GHC file for license and copyright details pertaining to that code.

CλaSH - A functional hardware description language

CλaSH (pronounced ‘clash’) is a functional hardware description language that
borrows both its syntax and semantics from the functional programming language
Haskell. The CλaSH compiler transforms these high-level descriptions to
low-level synthesizable VHDL, Verilog, or SystemVerilog.

Features of CλaSH:

Strongly typed (like VHDL), yet with a very high degree of type inference,
enabling both safe and fast prototying using consise descriptions (like
Verilog).

Interactive REPL: load your designs in an interpreter and easily test all
your component without needing to setup a test bench.

Higher-order functions, with type inference, result in designs that are
fully parametric by default.

Synchronous sequential circuit design based on streams of values, called
Signals, lead to natural descriptions of feedback loops.

0.5.11 August 2nd 2015

0.5.10 July 9th 2015

New features:

Use new VHDL backend which outputs VHDL-93 instead of VHDL-2002: generated VHDL is now accepted by a larger number of tools.

Treat all so-called bottom values (error "FOO", let x = x in x, etc.) occuring in installed libraries as undefined.
Before, there were (very) rare situations where we couldn’t find the expressions belonging to a function and demanded a BlackBox, even though we knew the expression would be a bottom value.
Now, we stop demanding a BlackBox for such a function and simply treat it as undefined, thus allowing a greater range of circuit descriptions that we can compile.

0.5.9 June 26th 2015

New features:

Use new verilog backend which outputs Verilog-2001 instead of Verilog-2005: generated Verilog is now accepted by Altera/Quartus