What Are Variants and When to Use Them

What Are Variants?

In Simulink®, you can use the variant blocks to create a single model that caters
to multiple variant requirements. Such models have a fixed common structure and a
finite set of variable components. The variable components are activated depending
on the variant choice that you select. Thus, the resultant active model is a
combination of the fixed structure and the variable components based on the variant
choice.

The use of variant blocks in a model helps in reusability of the model for
different conditional expressions called variant choices. This approach helps you to
meet diverse customer requirements based on application, cost, or operational
considerations.

You can use these variant blocks depending on the model design:

Variant Subsystem: For
hierarchical model structure. The block is a template with two
Subsystem blocks to use as variant systems. You can add
Subsystem blocks, as well as Model blocks,
for variants.

Variant Model: For
hierarchical model structure. The block is a template with two
Model blocks to use as variant systems. You can add
Model blocks, as well as Subsystem blocks,
for variants.

Note

Sample time for single input Variant Source / Variant
Sink blocks can differ with multiple input Variant
Source / Variant Sink blocks. For more information on
sample time, see What Is Sample Time?

Use of a Variant Subsystem block provides these advantages:

Allows you to mix Model and Subsystem
blocks as variant systems

Supports flexible I/O, so that all variants do not need to have the same
number of input and output ports

To convert a Model block that contains variant models to a
Variant Subsystem block that contains Model blocks
that reference the variant models, right-click the Model block and
select Subsystems & Model Reference >
Convert to > Variant
Subsystem. Alternatively, you can use the
Simulink.VariantManager.convertToVariant function. Specify
the Model block name or block handle. The converted model produces
the same results as the original model.

If you want to simulate a model that represents an automobile with several
configurations. These configurations, although similar in several aspects, can
differ in properties such as fuel consumption, engine size, or emission standard.
Instead of designing multiple models that together represent all possible
configurations, you can use variants to model only the varying configurations. This
approach keeps the common components fixed.

This model contains two variant choices inside a single Variant
Subsystem block. Variant choices are two or more configurations of a
component in your model.

Advantages of Using Variants

Using variants in Model-Based Design provides several advantages:

Variants provide you a way to design one model for many systems.

You can rapidly prototype design possibilities as variants without having
to comment out sections of your model.

Variants help you develop modular design platforms that facilitate reuse
and customization. This approach improves workflow speed by reducing
complexity.

If a model component has several alternative configurations, you can
efficiently explore these varying alternatives without altering the fixed,
unvarying components.

You can use different variant configurations for simulation or code
generation from the same model.

You can simulate every design possibility in a combinatorial fashion for a
given test suite.

If you are working with large-scale designs, you can distribute the
process of testing these designs on a cluster of multicore computers.
Alternatively, you can map different test suites to design alternatives for
efficiently managing design-specific tests.

You can generate a reduced model with a subset of configuration from a
master model with many variants.

When to Use Variants

Variants help you specify multiple implementations of a model in a single, unified
block diagram. Here are three scenarios where you can use variants:

Models that are mostly similar but have slight variations, such as in
cases where you want to separate a test model from a debugging model.

The test model on the left has a fixed design. On the right, the same test
model includes a variant that is introduced for debugging purposes.

Simulink selects the active variant
during update diagram time and during code compile time.

Options for Representing Variants in Simulink

You can represent one or more variants as variant choices inside these
blocks.

Variant Source
and Variant Sink blocks

Variant Subsystem and
Variant Model blocks

Variant choice representation

Number of ports

Subsystem or Model
block

Allows choice hierarchy

No

Yes

Mismatched number of input and output ports among variant
choices

Simulink disables inactive ports

Simulink disables
inactive ports

Option to specify default variant

Yes

Yes

Supports control ports

No

Yes

Can be saved as standalone file

No

No

Supports physical modeling connection ports

No

Partially

Comment choice (%)

No

No

In addition, you can represent variant choices using Variant Source
and Variant Sink block. These blocks enable the propagation of
variant conditions throughout the model and can propagate conditions through model
reference hierarchy.

You can create variants at several levels inside your model hierarchy.

Mapping Inports and Outports of Variant Choices

A Variant Subsystem block is a container of variants choices that are
represented as Subsystem or Model blocks. The inputs
that the Variant Subsystem block receives from upstream models components map to the
input and output ports of the variant choices.

Subsystem and Model blocks representing variant
choices can have input and output ports that differ in number from the input and
output ports in the parent Variant Subsystem block. However, the
following conditions must be satisfied:

The names of the inports of a variant choice are a subset of the
inport names used by the parent variant subsystem.

The names of the output ports of a variant choice are a subset of the
output port names used by the parent variant subsystem.

If variant choices have control port, the name of data input port must
match with control port name.

During simulation, Simulink disables the
inactive ports in a Variant Subsystem block.

Variant Badges

Each Variant block has a badge associated with it. The color and icon of a Variant
badge indicate the status of the Variant block. It also provides quick access to few
Variant commands. You can right-click the Variant badge to access these
commands.

Variant Badge

Variant Source

Variant Sink

Variant Subsystem

Default Variant badge when no option is
selected.

Variant block with Label
selected as Variant control mode and an
active variant choice is selected from Label mode
active choice option.

Comment Out and Comment Through

Consider when you want to simulate a Simulink model by excluding some of its blocks from simulation and without
physically removing the blocks from the model. The Comment Out
and Comment Through commands in Simulink provide you with an option to exclude blocks from simulation.
Depending on your modeling requirement, you can use these options:

Comment Out: Excludes the selected block from
simulation. The signals are terminated and grounded.

Comment Through: Excludes the selected block from
simulation. The signals are passed through. To comment through a block, the
number of input ports and the output ports for the block must be
same.

To access the Comment Out or the Comment
Through options, right-click the block and in the context menu either
select Comment Out or Comment Through
based on your modeling requirement.

Alternatively, you can also select the block and press
Ctrl+Shift+X to comment out or press
Ctrl+Shift+Y to comment through.

You can use get_param and set_param commands
to view or change the commented state of a block programmatically. For
example,

get_param(gcb,'commented'); % To view the commented state of the
block

set_param(gcb,'commented','on'); % To comment out a
block

set_param(gcb,'commented','through'); % To comment through a
block

set_param(gcb,'commented','off'); % To uncomment a
block

When you comment out a block, the signal names at the output port of the block are
ignored. To include such signals during simulation, the signal name must be added at
the input port of the block.

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