DySPAN

The Dynamic Spectrum Access Networks (DySPAN) standards committee, formerly Standards Coordinating Committee 41 (SCC41), and even earlier IEEE P1900 Standards Committee, is sponsored by the Institute of Electrical and Electronics Engineers (IEEE). The group develops standards for radio and spectrum management,[1] its working groups and resulting standards, numbered in the 1900 range (starting with 1900.1), are sometimes referred to as IEEE 1900.X.

On March 22, 2007 the IEEE Standards Board approved its reorganization as Standards Coordinating Committee 41 (SCC41), Dynamic Spectrum Access Networks (DySPAN), the IEEE ComSoc and EMC sponsored this effort, as they did for IEEE 1900. The IEEE 1900 Committee ceased to exist at the inaugural meeting of SCC41 in April 2007, the work of the IEEE 1900.x Working Groups continued under SCC41. SCC41 voted to be directly answerable to ComSoc in December 2010, and was renamed as IEEE DySPAN-SC, at its December 2010 Meeting, the IEEE Standards Association Standards Board (SASB) approved the transfer of projects to the Communications Society Standards Board.[1]

Work in DySPAN SC claims that "Dynamic Spectrum Access is the real-time adjustment of spectrum utilization in response to changing circumstances and objectives", and that cognitive radio is a type of radio in which communication systems are aware of their environment and internal state and can make decisions about their radio operating behavior based on that information and predefined objectives."[2]

1900.1 Working Group on Terminology and Concepts for Next Generation Radio Systems and Spectrum Management

1900.2 Working Group on Recommended Practice for Interference and Coexistence Analysis

1900.3 Working Group on Recommended Practice for Conformance Evaluation of Software Defined Radio (SDR) Software Modules

1900.4 Working Group on Architectural Building Blocks Enabling Network-Device Distributed Decision Making for Optimized Radio Resource Usage in Heterogeneous Wireless Access Networks

1900.5 Working Group on Policy Language and Policy Architectures for Managing Cognitive Radio for Dynamic Spectrum Access Applications

1900.6 Working Group on Spectrum Sensing Interfaces and Data Structures for Dynamic Spectrum Access and other Advanced Radio Communication Systems

P1900.7 Working Group on Radio Interface for White Space Dynamic Spectrum Access Radio Systems Supporting Fixed and Mobile Operation

Proposed standards have "P" prepended to the name until they are ratified, the first to be published was 1900.2 in July 2008.[3] Next was 1900.1 on September 26, 2008.[4] Then 1900.4 was published on February 27, 2009.[5] Work then began on amendment P1900.4.1a for dynamic spectrum access networks in white space frequency bands, and P1900.4.1 for interoperability between components of the IEEE 1900.4 system.[6] The 1900.6 standard was published on April 22, 2011, and work began on an amendment 1900.6a.[7]

The IEEE 1900.4 Working Group is on "Architectural Building Blocks Enabling Network-Device Distributed Decision Making for Optimized Radio Resource Usage in Heterogeneous Wireless Access Networks"[8] It is a working group under the IEEE SCC41.

IEEE 1900.4 was published on February 27, 2009.

There are two projects for the 1900.4 Working Group starting April 2009:

1.
Institute of Electrical and Electronics Engineers
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The Institute of Electrical and Electronics Engineers is a professional association with its corporate office in New York City and its operations center in Piscataway, New Jersey. It was formed in 1963 from the amalgamation of the American Institute of Electrical Engineers, today, it is the worlds largest association of technical professionals with more than 400,000 members in chapters around the world. Its objectives are the educational and technical advancement of electrical and electronic engineering, telecommunications, computer engineering, IEEE stands for the Institute of Electrical and Electronics Engineers. The association is chartered under this full legal name, IEEEs membership has long been composed of engineers and scientists. For this reason the organization no longer goes by the name, except on legal business documents. The IEEE is dedicated to advancing technological innovation and excellence and it has about 430,000 members in about 160 countries, slightly less than half of whom reside in the United States. The major interests of the AIEE were wire communications and light, the IRE concerned mostly radio engineering, and was formed from two smaller organizations, the Society of Wireless and Telegraph Engineers and the Wireless Institute. After World War II, the two became increasingly competitive, and in 1961, the leadership of both the IRE and the AIEE resolved to consolidate the two organizations. The two organizations merged as the IEEE on January 1,1963. The IEEE is incorporated under the Not-for-Profit Corporation Law of the state of New York and it was formed in 1963 by the merger of the Institute of Radio Engineers and the American Institute of Electrical Engineers. The IEEE serves as a publisher of scientific journals and organizer of conferences, workshops. IEEE develops and participates in activities such as accreditation of electrical engineering programs in institutes of higher learning. The IEEE logo is a design which illustrates the right hand grip rule embedded in Benjamin Franklins kite. IEEE has a dual complementary regional and technical structure – with organizational units based on geography and it manages a separate organizational unit which recommends policies and implements programs specifically intended to benefit the members, the profession and the public in the United States. The IEEE includes 39 technical Societies, organized around specialized technical fields, the IEEE Standards Association is in charge of the standardization activities of the IEEE. The IEEE History Center became an organization to the Engineering. The new ETHW is an effort by various engineering societies as a formal repository of topic articles, oral histories, first-hand histories, Landmarks + Milestones. The IEEE History Center is annexed to Stevens University Hoboken, NJ, in 2016, the IEEE acquired GlobalSpec, adding the provision of engineering data for a profit to its organizational portfolio

2.
IEEE Communications Society
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The IEEE Communications Society promotes the advancement of science, technology and applications in communications and related disciplines. It fosters presentation and exchange of information among its members and the community throughout the world. The Society maintains a standard of professionalism and technical competency. The IEEE Communications Society is a society of the IEEE. It coordinates the operation of several councils, task forces, and technical committees, the society participates in educational activities and in accreditation of higher education programs within its fields of interest. It operates about a working groups and committees on the development of industrial standards. As a fundamental element of the Society all members are invited - and these committees - networks of professionals with common interests in communications - usually meet twice a year at major conferences. Throughout the year, these committees also play a role in determining which events are technically co-sponsored by ComSoc

3.
IEEE Electromagnetic Compatibility Society
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The IEEE Electromagnetic Compatibility Society is an organizational unit and professional society of academic professors and applied engineers with a common interest, affiliated with the IEEE. The 50-year-old Society has members and chapters in every country throughout the world. As an active entity within the IEEE, benefits are provided to members as detailed below and this petition, which included a scope of technical interest, was approved by the IRE on 10 October 1957. The first meeting of the Administrative Committee of the newly formed group was held on 20 November 1957 in Asbury Park, officers were elected and the group was operations. Within five years, the Professional Group became the EMC Society of the IEEE, in 2007, the IEEE EMC Society celebrated its 50th anniversary at their yearly conference in Honolulu, Hawaii. To help celebrate, the Society’s celebration pin was flown in space shuttle mission, STS-118. This pin is mounted in a frame with a photograph of the astronauts, officers of the EMC Society, the IEEE EMC Society has evolved into an international, professional society within the IEEE. The Society has 65 chapters worldwide and membership of approximately 4,000, the governing body is identified as the Board of Directors consisting of a President, five Vice Presidents, and Directors-at-Large elected by the membership. emcs. org. The EMC Society is organized into different areas of interest, each with a Vice President who oversees operational aspects under his/her leadership, member Services Technical Services Communication Services Conferences Standards There are eleven Technical Committees of the IEEE EMC Society along with several specialized committees. These committees provide technical guidance to the Board of Directors and the general membership, each of the technical committees provides expertise in a particular technical area while other committees have a focus on Society operations worldwide

4.
DARPA
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The Defense Advanced Research Projects Agency is an agency of the U. S. Department of Defense responsible for the development of emerging technologies for use by the military. DARPA was created in February 1958 as the Advanced Research Projects Agency by President Dwight D. Eisenhower and its purpose was to formulate and execute research and development projects to expand the frontiers of technology and science, with the aim to reach beyond immediate military requirements. DARPA was created in response to the Soviet launching of Sputnik 1 in 1957, the name of the organization changed several times from its founding name ARPA, DARPA, ARPA, and DARPA. DARPA is independent from other research and development and reports directly to senior Department of Defense management. DARPA has about 240 employees, of whom 13 are in management, dARPA-funded projects have provided significant technologies that influenced many non-military fields, such as computer networking and graphical user interfaces in information technology. S. The mission statement has evolved over time, today, DARPAs mission is still to prevent technological surprise to the U. S. but also to create technological surprise for U. S. enemies. The creation of the Advanced Research Projects Agency was authorized by President Dwight D.15 and its creation was directly attributed to the launching of Sputnik and to U. S. realization that the Soviet Union had developed the capacity to rapidly exploit military technology. Initial funding of ARPA was $520 million, ARPAs first director, Roy Johnson, left a $160,000 management job at General Electric for an $18,000 job at ARPA. Herbert York from Lawrence Livermore National Laboratory was hired as his scientific assistant, Johnson and York were both keen on space projects, but when NASA was established later in 1958 all space projects and most of ARPAs funding were transferred to it. Johnson resigned and ARPA was repurposed to do high-risk, high-gain, far out basic research, ARPAs second director was Brigadier General Austin W. Betts, who resigned in early 1961. He was succeeded by Jack Ruina who served until 1963, Ruina, the first scientist to administer ARPA, managed to raise its budget to $250 million. In pursuit of this mission, DARPA has developed and transferred technology programs encompassing a range of scientific disciplines that address the full spectrum of national security needs. From 1958 to 1965, ARPAs emphasis centered on major issues, including space, ballistic missile defense. During 1960, all of its civilian space programs were transferred to the National Aeronautics and Space Administration and the military space programs to the individual Services. This allowed ARPA to concentrate its efforts on the Project Defender, Project Vela, and Project AGILE Programs, and to work on computer processing, behavioral sciences. The DEFENDER and AGILE Programs formed the foundation of DARPA sensor, surveillance, and directed energy R&D, particularly in the study of radar, infrared sensing, ARPA at this point played an early role in Transit a predecessor to the Global Positioning System. Fast-forward to 1959 when a joint effort between DARPA and the Johns Hopkins Applied Physics Laboratory began to fine-tune the early explorers’ discoveries, TRANSIT, sponsored by the Navy and developed under the leadership of Dr. Richard Kirschner at Johns Hopkins, was the first satellite positioning system. The agency was renamed the Defense Advanced Research Projects Agency in 1972, and during the early 1970s, it emphasized direct energy programs, information processing, concerning information processing, DARPA made great progress, initially through its support of the development of time-sharing

5.
Software-defined radio
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While the concept of SDR is not new, the rapidly evolving capabilities of digital electronics render practical many processes which used to be only theoretically possible. A basic SDR system may consist of a computer equipped with a sound card, or other analog-to-digital converter. Significant amounts of processing are handed over to the general-purpose processor. Such a design produces a radio which can receive and transmit widely different radio protocols based solely on the software used, Software radios have significant utility for the military and cell phone services, both of which must serve a wide variety of changing radio protocols in real time. In the long term, software-defined radios are expected by proponents like the SDRForum to become the dominant technology in radio communications, SDRs, along with software defined antennas are the enablers of the cognitive radio. Software defined antennas adaptively lock onto a signal, so that receivers can better reject interference from other directions. Wireless mesh network where every added radio increases total capacity and reduces the required at any one node. Each node only transmits loudly enough for the message to hop to the nearest node in that direction, reducing near-far problem, the ideal receiver scheme would be to attach an analog-to-digital converter to an antenna. A digital signal processor would read the converter, and then its software would transform the stream of data from the converter to any form the application requires. An ideal transmitter would be similar, a digital signal processor would generate a stream of numbers. These would be sent to a digital-to-analog converter connected to a radio antenna, the ideal scheme is not completely realizable due to the actual limits of the technology. However, in some applications it is not necessary to tune the signal to an intermediate frequency, real analog-to-digital converters lack the dynamic range to pick up sub-microvolt, nanowatt-power radio signals. Therefore, a low-noise amplifier must precede the conversion step and this device introduces its own problems, for example, if spurious signals are present, these compete with the desired signals within the amplifiers dynamic range. They may introduce distortion in the signals, or may block them completely. The standard solution is to put band-pass filters between the antenna and the amplifier, but these reduce the radios flexibility, real software radios often have two or three analog channel filters with different bandwidths that are switched in and out. The term digital receiver was coined in 1970 by a researcher at a United States Department of Defense laboratory, a laboratory called the Gold Room at TRW in California created a software baseband analysis tool called Midas, which had its operation defined in software. The term software radio was coined in 1984 by a team at the Garland, Texas Division of E-Systems Inc. to refer to a digital baseband receiver, a Software Radio Proof-of-Concept laboratory was developed there that popularized Software Radio within various government agencies. E-Systems Melpar sold the software radio idea to the US Air Force, Melpar built a prototype commanders tactical terminal in 1990-91 that employed Texas Instruments TMS320C30 processors and Harris digital receiver chip sets with digitally synthesized transmission

6.
IEEE-488
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IEEE488 is a short-range digital communications 8-bit parallel multi-master interface bus specification. IEEE488 was created as HP-IB and is commonly called GPIB and it has been the subject of several standards. Newer standards have largely replaced IEEE488 for computer use, in the late 1960s, Hewlett-Packard manufactured various automated test and measurement instruments, such as digital multimeters and logic analyzers. They developed the HP Interface Bus to enable easier interconnection between instruments and controllers, the bus was relatively easy to implement using the technology at the time, using a simple parallel bus and several individual control lines. For example, the HP59501 Power Supply Programmer and HP 59306A Relay Actuator were both relatively simple HP-IB peripherals implemented only in TTL, using no microprocessor, HP licensed the HP-IB patents for a nominal fee to other manufacturers. It became known as the General Purpose Interface Bus, and became a de facto standard for automated, as GPIB became popular, it was formalized by various standards organizations. In 1975, the IEEE standardized the bus as Standard Digital Interface for Programmable Instrumentation, IEEE488, the standard was revised in 1987, and redesignated as IEEE488.1. These standards formalized the mechanical, electrical, and basic protocol parameters of GPIB, in 1987, IEEE introduced Standard Codes, Formats, Protocols, and Common Commands, IEEE488.2. IEEE488.2 provided for basic syntax and format conventions, as well as device-independent commands, data structures, error protocols, and the like. IEEE488.2 built on IEEE488.1 without superseding it, while IEEE488.1 defined the hardware and IEEE488.2 defined the protocol, there was still no standard for instrument-specific commands. Commands to control the same class of instrument, e. g. multimeters, the United States Air Force, and later Hewlett-Packard, recognized this problem. In 1989, HP developed their TML language which was the forerunner to Standard Commands for Programmable Instrumentation, SCPI was introduced as an industry standard in 1990. SCPI added standard generic commands, and a series of instrument classes with corresponding class-specific commands, SCPI mandated the IEEE488.2 syntax, but allowed other physical transports. The IEC developed their own standards in parallel with the IEEE, with IEC 60625-1 and IEC 60625-2, national Instruments introduced a backward-compatible extension to IEEE488.1, originally known as HS-488. It increased the maximum rate to 8 Mbyte/s, although the rate decreases as more devices are connected to the bus. This was incorporated into the standard in 2003, over HPs objections. 1/IEC 60625-1, IEEE488 is an 8-bit, electrically parallel bus. The bus employs sixteen signal lines — eight used for data transfer. Every device on the bus has a unique 5-bit primary address, the standard allows up to 15 devices to share a single physical bus of up to 20 meters total cable length

7.
IEEE 754
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The IEEE Standard for Floating-Point Arithmetic is a technical standard for floating-point computation established in 1985 by the Institute of Electrical and Electronics Engineers. The standard addressed many problems found in the floating point implementations that made them difficult to use reliably and portably. Many hardware floating point units now use the IEEE754 standard, the international standard ISO/IEC/IEEE60559,2011 has been approved for adoption through JTC1/SC25 under the ISO/IEEE PSDO Agreement and published. The binary formats in the standard are included in the new standard along with three new basic formats. To conform to the current standard, an implementation must implement at least one of the formats as both an arithmetic format and an interchange format. As of September 2015, the standard is being revised to incorporate clarifications, an IEEE754 format is a set of representations of numerical values and symbols. A format may also include how the set is encoded, a format comprises, Finite numbers, which may be either base 2 or base 10. Each finite number is described by three integers, s = a sign, c = a significand, q = an exponent, the numerical value of a finite number is s × c × bq where b is the base, also called radix. For example, if the base is 10, the sign is 1, the significand is 12345, two kinds of NaN, a quiet NaN and a signaling NaN. A NaN may carry a payload that is intended for diagnostic information indicating the source of the NaN, the sign of a NaN has no meaning, but it may be predictable in some circumstances. Hence the smallest non-zero positive number that can be represented is 1×10−101 and the largest is 9999999×1090, the numbers −b1−emax and b1−emax are the smallest normal numbers, non-zero numbers between these smallest numbers are called subnormal numbers. Zero values are finite values with significand 0 and these are signed zeros, the sign bit specifies if a zero is +0 or −0. Some numbers may have several representations in the model that has just been described, for instance, if b=10 and p=7, −12.345 can be represented by −12345×10−3, −123450×10−4, and −1234500×10−5. However, for most operations, such as operations, the result does not depend on the representation of the inputs. For the decimal formats, any representation is valid, and the set of representations is called a cohort. When a result can have several representations, the standard specifies which member of the cohort is chosen, for the binary formats, the representation is made unique by choosing the smallest representable exponent. For numbers with an exponent in the range, the leading bit of the significand will always be 1. Consequently, the leading 1 bit can be implied rather than explicitly present in the memory encoding and this rule is called leading bit convention, implicit bit convention, or hidden bit convention

8.
VMEbus
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VMEbus is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. It is physically based on Eurocard sizes, mechanicals and connectors, but uses its own signalling system and it was first developed in 1981 and continues to see widespread use today. In 1979, during development of the Motorola 68000 CPU, one of their engineers, Jack Kister, the Motorola team brainstormed for days to select the name VERSAbus. VERSAbus cards were large,370 by 230 mm, and used edge connectors, only a few products adopted it, including the IBM System 9000 instrument controller and the Automatix robot and machine vision systems. Kister was later joined by John Black, who refined the specifications, a young engineer working for Black, Julie Keahey designed the first VERSAmodule card, the VERSAbus Adaptor Module, used to run existing cards on the new VERSAbus. Sven Rau and Max Loesel of Motorola-Europe added a mechanical specification to the system, the result was first known as VERSAbus-E but was later renamed to VMEbus, for VERSAmodule Eurocard bus. At this point, a number of companies involved in the 68000s ecosystem agreed to use the standard, including Signetics, Philips, Thomson. Soon it was standardized by the IEC as the IEC821 VMEbus and by ANSI. The original standard was a 16-bit bus, designed to fit within the existing Eurocard DIN connectors, however, there have been several updates to the system to allow wider bus widths. The current VME64 includes a full 64-bit bus in 6U-sized cards, the VME64 protocol has a typical performance of 40 MB/s. Other associated standards have added hot-swapping in VME64x, smaller IP cards that plug into a single VMEbus card, in the late 1990s, synchronous protocols proved to be favourable. The research project was called VME320, the VITA Standards Organization called for a new standard for unmodified VME32/64 backplanes. The new 2eSST protocol was approved in ANSI/VITA1.5 in 1999, over the years, many extensions have been added to the VME interface, providing sideband channels of communication in parallel to VME itself. Some examples are IP Module, RACEway Interlink, SCSA, Gigabit Ethernet on VME64x Backplanes, PCI Express, RapidIO, StarFabric, VMEbus was also used to develop closely related standards, VXIbus and VPX. The VMEbus had a influence on many later computer buses such as STEbus. The architectural concepts of the VMEbus are based on VERSAbus, developed in the late 1970s by Motorola, motorolas European Microsystems group in Munich, West Germany, proposed the development of a VERSAbus-like product line based on the Eurocard mechanical standard. To demonstrate the concept, Max Loesel and Sven Rau developed three prototype boards, a 68000 CPU board, a memory board, a static memory board. They named the new bus VERSAbus-E and this was later renamed VME, short for Versa Module European, by Lyman Hevle, then a VP with the Motorola Microsystems Operation

9.
VHDL
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VHDL is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose programming language. VHDL was originally developed at the behest of the U. S Department of Defense in order to document the behavior of the ASICs that supplier companies were including in equipment. The idea of being able to simulate the ASICs from the information in this documentation was so attractive that logic simulators were developed that could read the VHDL files. The next step was the development of logic synthesis tools that read the VHDL, a problem not solved by this edition, however, was multi-valued logic, where a signals drive strength and unknown values are also considered. This required IEEE standard 1164, which defined the 9-value logic types, scalar std_logic, Minor changes in the standard added the idea of protected types and removed some restrictions from port mapping rules. In addition to IEEE standard 1164, several child standards were introduced to extend functionality of the language, IEEE standard 1076.2 added better handling of real and complex data types. IEEE standard 1076.3 introduced signed and unsigned types to facilitate arithmetical operations on vectors, IEEE standard 1076.1 provided analog and mixed-signal circuit design extensions. Some other standards support wider use of VHDL, notably VITAL, in June 2006, the VHDL Technical Committee of Accellera approved so called Draft 3.0 of VHDL-2006. While maintaining full compatibility with older versions, this proposed standard provides numerous extensions that make writing and managing VHDL code easier and these changes should improve quality of synthesizable VHDL code, make testbenches more flexible, and allow wider use of VHDL for system-level descriptions. In 2008, Accellera released VHDL4.0 to the IEEE for balloting for inclusion in IEEE 1076-2008, the VHDL standard IEEE 1076-2008 was published in January 2009. The IEEE Standard 1076 defines the VHSIC Hardware Description Language or VHDL, the language has undergone numerous revisions and has a variety of sub-standards associated with it that augment or extend it in important ways. 1076 was and continues to be a milestone in the design of electronic systems, IEEE 1076-1987 First standardized revision of ver 7.2 of the language from the United States Air Force. IEEE 1076-1993 Significant improvements resulting from years of feedback. Probably the most widely used version with the greatest vendor tool support, introduces the use of protected types. IEEE 1076-2002 Minor revision of 1076-2000, rules with regard to buffer ports are relaxed. IEC 61691-1-1,2004 IEC adoption of IEEE 1076-2002 IEEE 1076-2008 Major revision released on 2009-01-26, among other changes, this standard introduces the use of external names. Such a model is processed by a program, only if it is part of the logic design

10.
JTAG
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The Joint Test Action Group is an electronics industry association formed in 1985 for developing a method of verifying designs and testing printed circuit boards after manufacture. In 1990 the Institute of Electrical and Electronics Engineers codified the results of the effort in IEEE Standard 1149. 1-1990, entitled Standard Test Access Port, JTAG implements standards for on-chip instrumentation in electronic design automation as a complementary tool to digital simulation. It specifies the use of a debug port implementing a serial communications interface for low-overhead access without requiring direct external access to the system address. The interface connects to an on-chip test access port that implements a protocol to access a set of test registers that present chip logic levels. The JTAG standards have been extended by many semiconductor chip manufacturers with specialized variants to provide vendor-specific features, in the 1980s, multi-layer circuit boards and non-lead-frame integrated circuits were becoming standard and connections were being made between ICs that were not available to probes. The Joint Test Action Group was formed in 1985 to provide a view from one IC pad to another so these faults could be discovered. The industry standard became an IEEE standard in 1990 as IEEE Std,1149. 1-1990 after many years of initial use. In the same year Intel released the first processor, the 80486, in 1994, a supplement that contains a description of the boundary scan description language was added. Further refinements regarding the use of all-zeros for EXTEST, separating the use of SAMPLE from PRELOAD and better implementation for OBSERVE_ONLY cells were made, since 1990, this standard has been adopted by electronics companies world-wide. Boundary-scan is now synonymous with JTAG, but JTAG has essential uses beyond such manufacturing applications. Although JTAGs early applications targeted board level testing, the JTAG standard was designed to assist with device, board, and system testing, diagnosis, and fault isolation. On most systems, JTAG-based debugging is available from the very first instruction after CPU reset, an in-circuit emulator uses JTAG as the transport mechanism to access on-chip debug modules inside the target CPU. Those modules let software developers debug the software of an embedded system directly at the machine instruction level when needed, System software debug support is for many software developers the main reason to be interested in JTAG. Many silicon architectures such as PowerPC, MIPS, ARM, x86 built an entire software debug, instruction tracing, frequently individual silicon vendors however only implement parts of these extensions. Some examples are ARM CoreSight and Nexus as well as Intels BTS, LBR, there are many other such silicon vendor-specific extensions that may not be documented except under NDA. The adoption of the JTAG standard helped move JTAG-centric debugging environments away from early processor-specific designs, processors can normally be halted, single stepped, or let run freely. One can set breakpoints, both for code in RAM and in ROM/flash. Data breakpoints are often available, as is bulk data download to RAM, most designs have “halt mode debugging”, but some allow debuggers to access registers and data buses without needing to halt the core being debugged

11.
Open Firmware
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It originated at Sun, and has been used by Sun, Apple, IBM, ARM and most other non-x86 PCI chipset vendors. Open Firmware allows the system to load platform-independent drivers directly from the PCI card, Open Firmware may be accessed through its Forth language shell interface. It achieves essentially the same functionality as the later EFI standard initiated at Intel, Open Firmware is described by IEEE standard IEEE 1275-1994, which was not reaffirmed by the Open Firmware Working Group since 1998 and has therefore been officially withdrawn by IEEE. Several commercial implementations of Open Firmware have been released to the Open Source community in 2006, including Sun OpenBoot, Firmworks OpenFirmware, the source code is available from the OpenBIOS project. Suns implementation is available under a BSD license, Open Firmware Forth Code may be compiled into FCode, a bytecode which is independent of computer architecture details such as the instruction set and memory hierarchy. A PCI card may include a program, compiled to FCode, in this way, it can provide platform-independent boot-time diagnostics, configuration code, and device drivers. FCode is also compact, so that a disk driver may require only one or two kilobytes. Therefore, many of the same I/O cards can be used on Sun systems, FCode implements ANS Forth and a subset of the Open Firmware library. Open Firmware furthermore defines a way to describe the hardware of a system. This helps the operating system to understand its host computer, relying less on user configuration. Being based upon an interactive programming language, Open Firmware can be used to efficiently test and it allows drivers to be written and tested interactively. Operational video and mouse drivers are the prerequisite for a graphical interface suitable for end-user diagnostics. Indeed, Apple shipped such an operating system in many Power Macintoshes. On Sun SPARC systems, the Open Firmware interface is displayed on the terminal before the bootstrapping of the system software. If a keyboard is connected, the video display will be used as the console terminal. If no keyboard is connected, then the first serial line on the system is used as the console. While the system software is running, various Open Firmware settings can be read or written using the eeprom command, on a PowerPC-based Macintosh, the Open Firmware interface can be accessed by pressing the keys ⌘ Cmd+⌥ Option+O+F at startup. Intel-based Macintoshes do not use Open Firmware, they use Extensible Firmware Interface, also, early versions connect Open Firmwares input and output to the Modem port by default

12.
IEEE 1284
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IEEE1284 is a standard that defines bi-directional parallel communications between computers and other devices. It was originally developed in the 1970s by Centronics, and was known as the Centronics port. In the 1970s, Centronics developed the now-familiar printer parallel port that became a de facto standard. Centronics had introduced the first successful low-cost seven-wire print head, which used a series of solenoids to pull the metal pins to strike a ribbon. A dot matrix print head consists of a series of pins arranged in a vertical row. Each pin is attached to some sort of actuator, a solenoid in the case of Centronics, which can pull the pin forward to strike a ribbon and the paper. The entire print head is moved horizontally in order to print a line of text, character sets on early printers normally used 7 by 5 pixels to produce 80-column text. As printers grew in sophistication, and the cost of memory dropped, printers began adding increasing amounts of buffer memory, the original port design was send-only, allowing data to be sent from the host computer to the printer. Separate pins in the port allow status information to be sent back to the computer and this was a serious limitation as printers became smarter and a richer set of status codes were desired. This led to an expansion of the system introduced by HP. This used the status pins of the port to form a 4-bit parallel port for sending arbitrary data back to the host.5 MByte/s. In 1991 the Network Printing Alliance was formed to develop a new standard, in March 1994, the IEEE1284 specification was released. 1284 included all of these modes, and allowed operation in any of them, in the printer venue, this allows for faster printing and back-channel status and management. Since the new standard allowed the peripheral to send large amounts of data back to the host and this included scanners, tape drives, hard disks, computer networks connected directly via parallel interface, network adapters and other devices. No longer was the required to purchase an expensive SCSI card—they could simply use their built-in parallel interface. The parallel interface has since been displaced by local area network interfaces. IEEE1284 can operate in five modes, Compatibility Mode, also known as Centronics standard or SPP, is an implementation with only a few differences from the original Centronics design. This mode is almost exclusively used for printers, the only signals that the printer can send back to the host are some fixed-meaning status lines that signal common error conditions, such as the printer running out of paper

13.
IEEE 1394
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IEEE1394 is an interface standard for a serial bus for high-speed communications and isochronous real-time data transfer. It was developed in the late 1980s and early 1990s by Apple, the 1394 interface is also known by the brand i. LINK, and Lynx. The copper cable it uses in its most common implementation can be up to 4.5 metres long, power is also carried over this cable allowing devices with moderate power requirements to operate without a separate power supply. FireWire is also available in wireless, Cat 5, fiber optic, the 1394 interface is comparable to USB though USB requires a master controller and has greater market share. IEEE1394 replaced parallel SCSI in many applications, because of lower implementation costs, FireWire is Apples name for the IEEE1394 High Speed Serial Bus. IEEE1394 is a bus architecture for high-speed data transfer. FireWire is a bus, meaning that information is transferred one bit at a time. Parallel buses utilize a number of different physical connections, and as such are more costly and typically heavier. IEEE1394 fully supports both isochronous and asynchronous applications, Apple intended FireWire to be a serial replacement for the parallel SCSI bus while providing connectivity for digital audio and video equipment. Apples development began in the late 1980s, later presented to the IEEE, in 2007, IEEE1394 was a composite of four documents, the original IEEE Std. 1394-1995, the IEEE Std. 1394a-2000 amendment, the IEEE Std, 1394b-2002 amendment, and the IEEE Std. 1394c-2006 amendment. On June 12,2008, all these amendments as well as errata and some technical updates were incorporated into a superseding standard, Apple first included FireWire in some of its 1999 Macintosh models, and most Apple Macintosh computers manufactured in the years 2000 through 2011 included FireWire ports. However, in February 2011 Apple introduced the first commercially available computer with Thunderbolt, Apple released its last computers featuring FireWire late 2012. By 2014 Thunderbolt had become a feature across Apples entire line of computers effectively becoming the spiritual successor to FireWire in the Apple ecosystem. This style was added into the 1394a amendment. This port is sometimes labeled S100 or S400 to indicate speed in Mbit/s, the system was commonly used to connect data storage devices and DV cameras, but was also popular in industrial systems for machine vision and professional audio systems. Many users preferred it over the more common USB2.0 for its then greater effective speed, benchmarks show that the sustained data transfer rates are higher for FireWire than for USB2.0, but lower than USB3.0. Results are marked on Apple Mac OS X but more varied on Microsoft Windows, implementation of IEEE1394 is said to require use of 261 issued international patents held by 10 corporations

14.
Precision Time Protocol
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The Precision Time Protocol is a protocol used to synchronize clocks throughout a computer network. On a local network, it achieves clock accuracy in the sub-microsecond range, making it suitable for measurement. In 2008, IEEE 1588-2008 was released as a standard, also known as PTP Version 2, it improves accuracy, precision. IEEE1588 is designed to fill a niche not well served by either of the two dominant protocols, NTP and GPS, IEEE1588 is designed for local systems requiring accuracies beyond those attainable using NTP. It is also designed for applications that cannot bear the cost of a GPS receiver at each node, the IEEE1588 standards describe a hierarchical master-slave architecture for clock distribution. Under this architecture, a distribution system consists of one or more communication media. An ordinary clock is a device with a network connection and is either the source of or destination for a synchronization reference. A boundary clock has multiple network connections and can accurately synchronize one network segment to another, a synchronization master is selected for each of the network segments in the system. The root timing reference is called the grandmaster, the grandmaster transmits synchronization information to the clocks residing on its network segment. The boundary clocks with a presence on that segment then relay accurate time to the segments to which they are also connected. A simplified PTP system frequently consists of ordinary clocks connected to a single network, a grandmaster is elected and all other clocks synchronize directly to it. IEEE 1588-2008 introduces a clock associated with equipment used to convey PTP messages. The transparent clock modifies PTP messages as they pass through the device, timestamps in the messages are corrected for time spent traversing the network equipment. This scheme improves distribution accuracy by compensating for delivery variability across the network, PTP typically uses the same epoch as Unix time. While the Unix time is based on Coordinated Universal Time and is subject to leap seconds, the PTP grandmaster communicates the current offset between UTC and TAI, so that UTC can be computed from the received PTP time. Synchronization and management of a PTP system is achieved through the exchange of messages across the communications medium, to this end, PTP uses the following message types. Sync, Delay_Req, Follow_Up and Delay_Resp messages are used by ordinary and boundary clocks, Pdelay_Req, Pdelay_Resp and Pdelay_Resp_Follow_Up are used by transparent clocks to measure delays across the communications medium so that they can be compensated for by the system. Transparent clocks and these messages associated with them are not available in IEEE 1588-2002, announce messages are used by the best master clock algorithm in IEEE 1588-2008 to build a clock hierarchy and select the grandmaster

15.
Scalable Coherent Interface
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The Scalable Coherent Interface or Scalable Coherent Interconnect, was a high-speed interconnect standard for shared memory multiprocessing and message passing used in the 1990s. The IEEE Std 1596-1992, IEEE Standard for Scalable Coherent Interface was approved by the IEEE standards board on March 19,1992, in response, a Superbus study group was formed in November 1987. Another working group of the association of the Institute of Electrical. It was essentially a subset of Futurebus features that could be implemented at high speed, along with minor additions to make it easier to connect to other systems. Most of the developers had their background from high-speed computer buses, the original intent was a single standard for all buses in the computer. The working group soon came up with the idea of using point-to-point communication in the form of insertion rings and this avoided the lumped capacitance, limited physical length/speed of light problems and stub reflections in addition to allowing parallel transactions. The use of rings is credited to Manolis Katevenis who suggested it at one of the early meetings of the working group. The working group for developing the standard was led by David B, David V. James was a major contributor for writing the specifications including the executable C-code. Different versions and derivatives of SCI were implemented by companies like Dolphin Interconnect Solutions, Convex, Data General AViiON, Sequent, Dolphin Interconnect Solutions implemented a PCI and PCI-Express connected derivative of SCI that provides non-coherent shared memory access. SCI was often used to implement non-uniform memory access architectures and it was also used by Sequent Computer Systems as the processor memory bus in their NUMA-Q systems. Numascale developed a derivative to connect with coherent HyperTransport and this structure allows new developments in physical interface technology to be easily adapted without any redesign on the logical level. Scalability for large systems is achieved through a directory based cache coherence model. In SCI each node contains a directory with a pointer to the node in a linked list that shares a particular cache line. SCI defines a 64-bit flat address space where 16 bits are used for identifying a node and 48 bits for address within the node, a node can contain many processors and/or memory. The SCI standard defines a packet switched network, SCI can be used to build systems with different types of switching topologies from centralized to fully distributed switching. With a central switch, each node is connected to the switch with a ringlet, in distributed switching systems, each node can be connected to a ring of arbitrary length and either all or some of the nodes can be connected to two or more rings. The most common way to describe these multi-dimensional topologies is k-ary n-cubes, the SCI standard specification mentions several such topologies as examples. The 2-D torus is a combination of rings in two dimensions, switching between the two dimensions requires a small switching capability in the node

16.
SystemVerilog
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In the semiconductor and electronic design industry, SystemVerilog is a combined hardware description language and hardware verification language based on extensions to Verilog. SystemVerilog started with the donation of the Superlog language to Accellera in 2002, the bulk of the verification functionality is based on the OpenVera language donated by Synopsys. In 2005, SystemVerilog was adopted as IEEE Standard 1800-2005, in 2009, the standard was merged with the base Verilog standard, creating IEEE Standard 1800-2009. The current version is IEEE standard 1800-2012, the feature-set of SystemVerilog can be divided into two distinct roles, SystemVerilog for RTL design is an extension of Verilog-2005, all features of that language are available in SystemVerilog. SystemVerilog for verification uses extensive object-oriented programming techniques and is closely related to Java than Verilog. The remainder of this article discusses the features of SystemVerilog not present in Verilog-2005, there are two types of data lifetime specified in SystemVerilog, static and automatic. Automatic variables are created the moment program execution comes to the scope of the variable, static variables are created at the start of the programs execution and keep the same value during the entire programs lifespan, unless assigned a new value during execution. Any variable that is declared inside a task or function without specifying type will be considered automatic, to specify that a variable is automatic place the automatic keyword in the declaration before the type, e. g. automatic int x. The static keyword is used in the same way, enhanced variable types add new capability to Verilogs reg type, Verilog-1995 and -2001 limit reg variables to behavioral statements such as RTL code. SystemVerilog extends the reg type so it can be driven by a driver such as gate or module. SystemVerilog names this type logic to remind users that it has this capability and is not a hardware register. The names logic and reg are interchangeable, a signal with more than one driver needs to be declared a net type such as wire so SystemVerilog can resolve the final value. Multidimensional packed arrays unify and extend Verilogs notion of registers and memories, SystemVerilog permits any number of such packed dimensions. A variable of packed array type maps 1,1 onto an integer arithmetic quantity, in the example above, each element of my_pack may be used in expressions as a five-bit integer. The dimensions to the right of the name are referred to as unpacked dimensions, as in Verilog-2001, any number of unpacked dimensions is permitted. Enumerated data types allow numeric quantities to be assigned meaningful names, variables declared to be of enumerated type cannot be assigned to variables of a different enumerated type without casting. The meta-values X and Z can be used here, possibly to represent illegal states, the built-in function name returns an ASCII string for the current enumerated value. New integer types, SystemVerilog defines byte, shortint, int and longint as two-state signed integral types having 8,16,32, a bit type is a variable-width two-state type that works much like logic

RuBee (IEEE standard 1902.1) is a two way, active wireless protocol designed for harsh environment, high security asset …

A typical RuBee radio tag, about 1.5 x .75 by 0.07 inches. It has a 4 bitCPU, 1 to 5 kB of sRAM, crystal, and lithium battery with expected life of five years., a clock. It could optionally have sensors, displays and buttons

This rack likes to vibrate (resonate) at the RuBee frequency

Three-Layer Security provides process free security for mission critical assets on racks with real-time inventory, on check in/out, and with sensitive exit entry detection of people and assets. Because RuBee is not blocked by people or by steel tags are read automatically without human assistance

Three-Layer RuBee Security compared to tracking technologies like bar codes and RFID. Bar codes and RFID become line-of-sight in harsh environments, blocked by people and by steel, and therefore require human assisted tag reads. In contrast RuBee visibility is not line-of-sight in harsh environments and provides process free security for mission critical assets because it is not blocked by steel or water