I am trying to write a preprocessor for VHDL files (a hardware description
language). This preprocessor converts the input file to a subset of the
language.

The tools I am planning to use to write this preprocessor are Yacc
and Lex, and I already have the VHDL grammar defined in Lex/Yacc.

I have a few question in mind, and would like to figure out if Yacc/Lex can
handle these situations before I start writing the code.

My first question is, what is the simplest way to parse multiple files.
E.g. In C, we have #include <filename>, and there is a similar statement
in vhdl. The preprocessor will (at least) need to extract the constants
and enumerated types defined in these included files, before processing
the main source file. How can I do this in Yacc/Lex???

My other question is how I can convert a branch of a parse tree, from one
form to another. An example of this conversion is as follows:
-- before preprocessor
<label> : for i in <lo> to <hi> generate
<block_label> : block
begin
<statements>
end;
-- after preprocessor
<block_label>_<generate_param> : block
constant i : integer = <generate_param>;
begin
<statements>
end block <block_label>_<generate_param>;

How should I perform this conversion? Should I ask Yacc to build a complete
parse tree for the whole input file, and then after yyparse() has returned,
execute the code to traverse the parse tree and modify the branches
corresponding to the above "<label> : for i in .... begin <statements> end; "?

Could this type of conversion be carried out while yyparse() is parsing the
input file, e.g. use the actions (or embedded actions) to convert the
above 'generate' statement once a "<label> : ... begin <statements> end" block
is found?

Please email me if I haven't clearly defined my questions. I am new to using
Yacc and Lex, and I might have used the incorrect terms in the above
description.