Intel’s Tick-Tock is dead as Moore’s Law to live on in new way

Intel is moving to a new design regime that will enable it to produce greater numbers of chips within its 10nm and 14nm microarchitectures

Intel is abandoning its decade-old Tick-Tock chip development methodology in favour of a new paradigm it calls Process Architecture Optimisation to ensure it makes optimal use of its new 10nm and 14nm chip architectures to cope with increasing volumes of data and the internet of things (IoT).

Under the Tick-Tock regime, Intel would introduce a new lithographic process in each product cycle (Tick) and an upgraded microarchitecture (Tock) in the next cycle.

It is planning to replace Tick-Tock with a new three-step cycle it calls Process Architecture Optimisation to enable higher performance architecture upgrades within 14nm and future 10nm microarchitectures.

In plain English, this means increased numbers of higher-performing chips without having to reinvent the wheel as much.

Introduced a decade ago, Tick-Tock was the bedrock of Intel’s process technology methodology and each year it would upgrade chip fabrication plans to be able to produce processors, all the while keeping step with Moore’s Law, under which chips would double in capacity approximately every two years.

Two years ago, Intel announced a $5bn investment decision to prepare its 4,500-strong Irish operations in Leixlip for future technologies.

Intel is planning to optimise the lifetime of its current 14nm benchmark and future 10nm process technologies.

In the company’s annual 10K report filing, the chip giant said it was preparing for a world where Intel’s technologies will feature in more and more data centres, devices and applications, driven largely by IoT.

Key to this will be system-on-a-chip Quark technologies developed by teams in Ireland that have already produced devices like the Galileo board and the Curie chip for wearables.

Extending the life of Moore’s Law

Intel is abandoning its Tick-Tock chip development methodology in favour of a new paradigm it calls Process Architecture Optimisation

Intel said: “As part of our R&D efforts, we plan to introduce a new Intel Core microarchitecture for desktops, notebooks (including Ultrabook devices and 2-in-1 systems), and Intel Xeon processors on a regular cadence. We expect to lengthen the amount of time we will utilise our 14nm and our next-generation 10nm process technologies, further optimising our products and process technologies while meeting the yearly market cadence for product introductions.

“Advances in our silicon technology have enabled us to continue making Moore’s Law a reality. In 2014, we began manufacturing our 5th generation Intel Core processor family using our 14nm process technology.

“In 2015, we released a new microarchitecture (our 6th generation Intel Core processor family), using our 14nm process technology. We also plan to introduce a third 14nm product, code-named ‘Kaby Lake’. This product will have key performance enhancements as compared to our 6th generation Intel Core processor family.”

It continued: “We have continued expanding on the advances anticipated by Moore’s Law by bringing new capabilities into silicon and producing new products optimised for a wider variety of applications.

“We expect these advances will result in a significant reduction in transistor leakage, lower active power, and an increase in transistor density to enable more, smaller, form factors, such as powerful, feature-rich phones and tablets with a longer battery life.

“For instance, we have accelerated the Intel Atom processor-based SoC roadmap for our mobile form factors (including tablets and phones), notebooks (including Ultrabook devices and 2-in-1 systems), the internet of things, and data centre applications, on our 32nm, 22nm, and 14nm process technologies. In addition, we offer the Intel Quark SoC, an ultra-low-power and low-cost architecture designed for the internet of things, such as industrial machines and wearable devices.”