Hardware Compilation

Along with a tutorial on how to compile digital circuits directly from texts
written in a programming language, a compiler was written (in Oberon)
consisting of the two modules HCL and HCA. The language is a small subset
of Oberon, called Oberon-00, whose syntax is listed below. HCL is the body
of the compiler containing scanner, parser and circuit generator. HCA is a
package of subroutines for generating circuits corresponding to arithmetic
operators.
The generated circuits are represented as Lola Data Structures. These are
essentially binary trees with the nodes standing for gates, inverters, registers.
The node type is defined in module LSB (Lola System Base) as
Signal = POINTER TO RECORDx, y: Signal;fct, val, u, v: SHORTINT
END ;

fct specifies the node's function, x and y are its operands, and val, u, v are
used in various ways by different applications, such as
PLD fuse map generators,
FPGA tools,
simulators,
and HCL. Registers are represented by double nodes,
where r.x is the register's clock, r.y.x its enable signal, and r.y.y its data input.

The field next establishes a linear list of named variables, i.e. the compiler's
symbol table. dsc is used in the case of structured variables and points to its
element variables. The field v.x of a variable v denotes the expression assigned
to the variable.

The command HCL.Compile translates an Oberon-00 program into a Lola
data structure. The command HCL.Show shows generated data structures in
the form of linear lists.

The compiler HCL also generates auxiliary variables with internal names. They
stand for elements in the sequencing state machine, and for subexpressions
in arithmetic expressions. For example, the assignment z := (a + b) + c is decomposed
into #1 := a + b, #2 := #1 + c, z := #2. Theses auxiliary variables do not enlarge
the generated circuits, but merely introduce names for internal nodes of the
data structure.