This is an updated guide to the Bus Pirate logic analyzer mode, it expands on the initial documentation posted earlier.

Bus Pirate firmware v3.0 introduced a logic analyzer mode that works with the SUMP open source logic analyzer client. The logic analyzer can record 4096 samples at up to 1MHz, each channel has a selectable sample trigger.

***BIG WARNING*** The Bus Pirate will never be a substitute for a ‘proper’ logic analyzer, the hardware isn’t designed for it. The Bus Pirate can’t store a lot of samples, it can’t feed live samples very fast, and speeds are in the kHz range, not MHz.

Despite the limitations of the Bus Pirate hardware, the logic analyzer worked well enough to examine decoded IR remote signals. It’s also well suited to debug environments where you can control the bus speed (and the Bus Pirate may already be connected for other reasons). It should also be able to look at most I2C traffic (400kHz clock).

SUMP follows a simple protocol. We’ve only implemented the minimum command set: reset, run, ID, speed (divider), samples, and trigger. Other commands are received, but the contents are ignored. Trigger direction, pre-sampling, and other advanced features could be handled with an update.

The Bus Pirate understands the SUMP initialization commands, no special configuration is required to put the Bus Pirate into logic analyzer mode. It will also return to user terminal mode automatically.

We can capture a maximum of 4K samples (actually 4096), but the Bus Pirate will send fewer depending on the recording size setting.

Speed settings 10Hz to 1MHz are valid. Higher speeds default to about 1MHz.

Click capture to start. The MODE LED lights to indicate that the analyzer is active.

Sampling can also be triggered by a change on one or more pins.

Enable the trigger by checking the enable box.

Check the mask bits (bits4-0) to set a trigger on one or more pins.

Click capture. The MODE LED lights to indicate that the analyzer is active. A change on any of the selected pins triggers sampling.

Note that sampling is triggered by a change on any of the selected pins. There’s currently no direction configuration. Channel triggers are set with mask bits 4-0, ordered according to the channel table.

Samples are sent to SUMP and displayed.

Improving the logic analyzer

The logic analyzer could be upgraded with a rolling sample buffer that can show activity prior to the trigger.

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on Tuesday, November 3rd, 2009 at 2:31 pm and is filed under Bus Pirate, logic analyzer.
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10 Responses to “Bus Pirate logic analyzer mode”

Had some error reports. I used portmon to look at the traffic, and after a few bytes sometimes there’s a read timeout. SUMP takes that to be an error, but really it’s latency from the USB->serial driver.

Changing the minimum read timeout (msec) in the FTDI driver setting to at least 4000 (device manager->ports->COMx properties->port settings->advanced in Windows) cleared any remaining problems on my system. Another way is to decrease the latency timer, but that hurts performance a lot.

Ideally, SUMP would have a simple text .ini file with settings for things like read timeout (one byte, really?), device types, and clock divider, so this stuff is easier to address. But that’s not how it’s built (yet)…

As a first experiment, I’m trying to do some simple consumer IR decoding as mentioned in this article. My first question is how can I enable power (+5V) from the bus pirate to power the IR detector? I tried going into terminal mode, setting up raw 2 wire mode so I can enable the volt reg. output. However after that it won’t go into sump logic analyzer mode.