EE6350 VLSI Design Lab

Intro

Welcome to the home page of EE6350 VLSI Design Lab for Spring 2014.

This graduate course focuses on the design, simulation, layout,
verification and tape-out of an IC design. MOSIS is offering access
to an IBM 0.18um
CMOS technology for this course. MOSIS fabricates the chips
that students subsequently test.

Electronic Organ

Single-Channel Class D Audio Amplifier

Spring 2014 Student Feedback

The course really provides a comprehensive overview of the complete
IC design process in a short span of 1 year. Must-take course for analog
designers, especially if you have sufficient confidence in simulations,
but never got a chance to tape out and test a real chip.

This is the best course that I've taken in Columbia university. I
have learn a lot, starting from the design, simulation, layout and
testing technique. Thanks to professor Peter Kinget and the TAs for
letting me become an expert in this field.

This course is heavier in terms of workload than the average graduate-level course, but the end product is that much more satisfying!

No pain no gain.

I learned a lot of new knowledge from this course and how to solve real problems. It's a very precious experience for me.

This course schedule is quite compacted, i.e. from concept to
fabrication in 3 months, but I learned enormously in the process. It
requires you to practice many skills as a real life electrical engineer,
including circuit analysis, practical and robust design, IC layout and
test, working with various constraints, PCB design and construction,
choosing components and designing for test. The end results is something
you can hold and demonstrate, and it is a great talking point during job
interviews.