Till now, CLS has been determined either by arch code or asL1_CACHE_BYTES. Only x86 and ia64 set CLS explicitly and x86 doesn'talways get it right. On most configurations, the chance is thatfirmware configures the correct value during boot.

This patch makes pci_init() determine CLS by looking at what firmwarehas configured. It scans all devices and if all non-zero valuesagree, the value is used. If none is configured or there is adisagreement, pci_dfl_cache_line_size is used. arch can set the dflvalue (via PCI_CACHE_LINE_BYTES or pci_dfl_cache_line_size) oroverride the actual one.

ia64, x86 and sparc64 updated to set the default cls instead of theactual one.

While at it, declare pci_cache_line_size and pci_dfl_cache_line_sizein pci.h and drop private declarations from arch code.