3.9.1. Enabling the MMU

To enable the MMU:

Program the TTB and domain access control
registers.

Program level 1 and level 2 page tables as required.

Enable the MMU by setting bit 0 in the control register.

You must take care if the translated address differs from
the untranslated address because several instructions following
the enabling of the MMU might have been prefetched with the MMU
off (using physical = VA - flat translation).

In this case, enabling the MMU can be considered as a branch
with delayed execution. A similar situation occurs when the MMU
is disabled. Consider the following code sequence:

MRCp15, 0, R1, c1, C0, 0 ; Read control register

ORR R1, #0x1

MCR p15,0,R1,C1, C0,0 ; Enable MMUS

Fetch Flat

Fetch Flat

Fetch Translated

You can enable the ICache and DCache simultaneously with the
MMU using a single MCR instruction.