IMPORTANT:
Please note that the Linux GPIO numbers above are different from both the physical pin numbers and the UP pinout. The Linux GPIO numbers are assigned to match the Raspberry Pi BCM GPIO numbering scheme.

I/O Information

Overview

The X5-Z8300 SoC includes 4 GPIO controllers which provide up to 187 GPIOs (depending on SKU), via pads which are shared with other functions such as I2C, SPI, etc.

These can be individually configured as inputs or outputs, and can generate edge- or level-triggered interrupts. However, since the X5-Z8300 uses 1.8V I/O, and is not capable of sinking or sourcing significant amounts of current, these cannot be connected directly to the external 40-pin I/O header where they may be used to drive LV-TTL or LV-CMOS electronics at 3.3V. Therefore, each of the 28 GPIO pins exposed on the 40-pin header are connected to the X5-Z8300 via a 74LVC1T45 level translator (a.k.a buffer), which translates between the 1.8V signal of the SoC and the 3.3V required at the external pin header as well as providing 24mA current source/sink capacity.

The level translators include a direction control pin which is used to select input or output mode. This needs to be controlled by software, so that the user can select the mode in which they wish to use the GPIO pin. Therefore, these control signals are driven by a pair of 16-bit PCA9555 I2C GPIO expanders.

In addition, 74LVC1T45 level translators are designed for push-pull applications (e.g. GPIO, SPI) and not suitable for open-drain applications (e.g. I2C). For this reason, NTS0104 level translators are also used on the I2C-capable pins along with a 74CBTLV3125 4-bit switch to dynamically select between the push-pull or the open-drain level translators for the I2C-capable header pins.

While all of this may sound a bit complex, the good news is that this is managed transparently for the end user by a driver in the Linux kernel which is included with the ubilinux distribution for UP. A pinctrl/gpio driver developed for the UP board presents a set of 28 "virtual" GPIO pins to the user via standard kernel interfaces. When the user enables and configures one of these GPIO pins, the driver transparently configures the level translators and switches as needed.

Known Limitations and Issues (UP Board Rev. A0.2)

There are some limitations and considerations which the user should be aware of:

The level-shifters are configured as outputs by default at power-on, and may be driving a high output signal (3.3V). This may have implications for users who are connecting external electronics such as motor drivers. This will be addressed in the final production version of the UP board.

Some of the SoC GPIO pins and the corresponding level translators and switches on the UP board support alternate functions such as I2C, SPI, etc. In general, the pin will be configured by default for the alternate function at boot time if the corresponding controller (e.g. I2C-1) is enabled in the BIOS. Otherwise, the pin will be configured for GPIO. Even so, if the user enables the pin for GPIO mode at run-time, the pin will be automatically reconfigured as such. More information can be found on: Pinout.

The SoC GPIO pins include configurable internal pull-up resistors, but these are not really effective when the level translators are configured in input mode. If pull-up or pull-down resistors are needed for stabilizing floating input signals on a header pin, the user would need to include these in the external circuit connected to the UP board.

When used as interrupt triggers, please be aware that there is no debounce logic included. If connecting to an input which does not produce a clean logic transition (e.g. a mechanical switch), then the user may want to consider adding some debounce logic at either the hardware or software level. The following article has some great general information on de-bouncing switch inputs: http://www.ganssle.com/debouncing.htm

Usage

The GPIOs may be used through the standard GPIO programming APIs provided by the Linux kernel. This includes the sysfs interface described here: https://www.kernel.org/doc/Documentation/gpio/sysfs.txt. Note that the GPIO pins for the external header are numbered 0-27 in Linux (refer to the above Pinout table for the exact mapping).

In addition, the following popular Python libraries have been ported to allow the GPIO pins to be used easily from Python scripts and to aid application porting from other similar platforms:

libMRAA

RPi.GPIO

GPIO

A total of 28 independent GPIO pins are provided on the I/O header. ubilinux includes kernel platform drivers developed for the UP board to provide Linux GPIO pin numbering in the range 0-27, emulating that of the Raspberry Pi.

More information regarding GPIO on UP can be found on this page: GPIO.

GPIO Example #1

To configure physical pin 37 above (Linux GPIO number 26) as an output pin and then set the output level high:

LEDs

The UP Board includes 3 LEDs (yellow, green, red) on the underside of the board (underneath the 4 USB2.0 Type-A sockets), which are controlled by the pin control CPLD on the board. As root, you can use the following commands to control the LEDs:

# Turn on the Green LED
echo 1 > /sys/class/leds/upboard\:green\:/brightness
# Turn off the Green LED
echo 0 > /sys/class/leds/upboard\:green\:/brightness

For other LEDS, replace "green" with "red" or "yellow" in the commands above.