Design and Verification engineer

The engineer will join the cluster verification team taking ownership over cluster related tasks such as: Generation/Test-Bench/Reference Model. He will also take part in specific features verification (FWS & performance testing, PFC, etc)

The engineer will participate in the verification plan activities and will influence u-Arch, design and verification tasks. He will also need to work with Chip-Design verification team, supporting them with integrating our environment in Full-Chip verification environment