l1dcachetest Description

l1dcachetest exercises the level 1 Data cache in the CPU module . The test writes, reads, and verifies access of multiple virtual addresses. The virtual addresses are chosen so that they cause targeted hits and misses in the cache. The test dynamically determines the size and organization of the cache and tunes the test accordingly to be effective on the l1dcache.

l1dcahetest is self-scaling and adaptive, scaling the size of the system. l1dcachetest is multthreaded. Selection of CPU IDs is one of the options. But if that option is not specified, the test automatically retrieves the number of CPUs in the system and creates that many threads of l1dcachetest to give coverage to the whole system at a given time. The test also determines the sizes and organization of l1cache.

l1dcachetest Options

To reach the following dialog box, right-click on the test name in the System Map and select Test Parameter Options. If you do not see this test in the System Map, you might need to expand the collapsed groups, or your system might not include the device appropriate to this test. Refer to the SunVTS User's Guide for more details.

FIGURE 11-1 l1dcachetest Test Parameter Options Dialog Box

TABLE 11-1 l1dcachetest Options

Option

Description

Processors

Selects the CPU IDs for which to run this test. The test uses all CPUs on the system by default. This parameter is optional.

Thrash Cycles

Specifies the number of iterations for data cache subtests. The default is 256.

PCLoop

Specifies the number of iteration for Prefetch Cache Subtests. The default is 256.

WCLoop

Specifies the number of iterations for Write Cache Subtests. The default is 256.

Performance Counters

Enables or diables the performance counter measurements related to data cache and prefetch cache events. The default is off.

Note - Only one l1dcachetest gets registered for all the CPUs in the system.

Note - The l1dcachetest is automatically bound to a processor. Do not use the Processor Affinity option for the l1dcachetest.

Selects the CPU IDs for which to run this test. The test uses all CPUs on the system by default. This parameter is optional.

The CPU IDs currently present in the system can be retrieved with psrinfo(1M) command. Specifying a CPU ID not present in the system or one that is offline induces an appropriate error messages from the test. For example, if you want to select CPU IDs 4, 5, 6, and 7, specify M=4+5+6+7.

count=number

Specifies the number of iterations for Data Cache Subtests. The default is 256.

pcloop=number

Specifies the number of iterations for Prefetch Cache Subtests.

The default is 256.

wcloop=number

Specifies the number of iterations for Write Cache Subtests. The default is 256.

perf=Enabled|Disabled

Enables or disables the Performance counter measurements related to Data Cache and Prefetch Cache events. The default is off.

dev=l1cache

Specifies the device to test. The default value is l1cache.

Note - If you do not set a value for count or pcloop, the test run with the default value of count and pcloop. To disable Data Cache subtests, specify count=0. For Prefetch Catch subtests, specify pcloop=0.