SPM : Software Management on Scratchpad Memory

Background

As the number of core increases, scalability is becoming an important criteria in computer architecture design. While cache has been adopted widely to accelerate the memory accesses transparently, it is getting more difficult to maintain cache-based architecture in the many-core systems, mainly due to the cache coherency traffic. Scratchpad Memory (SPM) is a software-managed SRAM memory, which does not have hardware logics to automatically capture the locality (e.g. tag arrays). It has been studied as a scalable and energy-efficient alternative to the caches since it has simple design and does not increase the unnecessary traffic in the bus as the core scales. On the other hand, the benefit comes at the cost of explicit management of data. Data transfer between main memory and the SPM should be managed either by programmer or compiler, typically via the direct memory access (DMA) instructions.

Optimization for Code Management

Overlay-based technique is a popular method to mange the code using a SPM. In this scheme, SPM is divided multiple regions and functions of a program are mapped to the one of the regions. Although there have been many studies to find a good mapping from the given program and SPM size, they keep the call graph and functions of the program unchanged. Therefore, their performance is limited by the existing calling relationships between functions and the code size of the functions. In this work, we proposed a function splitting technique that mitigate these fundamental limitations. The evaluation shows that our optimization technique improves performance by 16% on average, which can only be achieved by using 20% more SPM space if without function-splitting.