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Abstract:

Systems and methods are provided for decoding signal vectors in
multiple-input multiple-output (MIMO) systems, where the receiver has
received one or more signal vectors from the same transmitted vector. The
receiver combines the received vectors by vector concatenation The
concatenated vector may then be decoded using, for example,
maximum-likelihood decoding. In some embodiments, the combined signal
vector is equalized before decoding.

Claims:

1-20. (canceled)

21. A method for decoding a signal vector in a multiple-input
multiple-output transmission scheme, comprising: receiving, with a
receiver, multiple signal vectors of a first dimension (Nr)
corresponding to a common transmit signal vector of a second dimension
(Nt), wherein each of the received signal vectors is associated with
a channel response matrix of dimension Nr×Nt;
concatenating, with vector combining circuitry, K of the received signal
vectors into a combined received signal vector of dimension KNr,
wherein K is an integer variable greater than one; concatenating, with
matrix combining circuitry, K of the channel response matrices into a
combined channel response matrix of dimension KNr×Nt;
processing, with processing circuitry, the combined received signal
vector to produce a signal vector of dimension Nt, wherein
Nt<KNr; and decoding, with a decoder, the signal vector
using the combined channel response matrix.

22. The method of claim 21, wherein the decoding comprises soft-decoding
and produces soft information corresponding to the common transmit signal
vector.

23. The method of claim 21, wherein the decoding comprises hard-decoding
and produces hard information corresponding to the common transmit signal
vector.

24. The method of claim 21, wherein concatenating the received signal
vectors comprises creating a vector, {tilde over (y)}, where {tilde over
(y)}=[y.sub.1.sup.Ty.sub.2.sup.T . . . yNT]T and yi
is an ith received signal vector corresponding to the common transmit
signal vector, and wherein concatenating the channel response matrices
comprises creating a matrix, {tilde over (H)}, where {tilde over
(H)}=[H.sub.1.sup.TH.sub.2.sup.T . . . HNT]T, and Hi
corresponds to the channel response matrix for an ith transmission of the
common transmit signal vector.

26. The method of claim 21 further comprising calculating a matrix
parameter from the combined channel response matrix, wherein the combined
received signal vector is processed using the calculated matrix parameter
to produce the equalized signal vector of dimension Nt, wherein
Nt<KNr.

28. The method of claim 26, wherein calculating the matrix parameter from
the combined channel response matrix comprises performing QR
decomposition on the combined channel response matrix, and wherein
decoding the equalized signal vector comprises calculating a metric
∥{tilde over (Q)}*{tilde over (y)}-{tilde over
(R)}x∥2, where {tilde over (y)} is the combined received
signal vector, x is the common transmit signal vector, {tilde over (Q)}
and {tilde over (R)} are resulting matrices from QR decomposition, and
{tilde over (Q)}* is a transpose of {tilde over (Q)}.

29. A system for decoding a signal vector in a multiple-input
multiple-output transmission scheme, comprising: a receiver that receives
multiple signal vectors of a first dimension (Nr) corresponding to a
common transmit signal vector of a second dimension (Nt), wherein
each of the received signal vectors is associated with a channel response
matrix of dimension Nr×Nt; vector combining circuitry
that concatenates K of the received signal vectors into a combined
received signal vector of dimension KNr, wherein K is an integer
variable greater than one; matrix combining circuitry that concatenates K
of the channel response matrices into a combined channel response matrix
of dimension KNr×Nt; processing circuitry that processes
the combined received signal vector to produce an equalized signal vector
of dimension Nt, wherein Nt<KNr; and a decoder that
decodes the equalized signal vector using the combined channel response
matrix.

30. The system of claim 29, wherein the decoder is a soft-decoder that
produces soft information corresponding to the common transmit signal
vector.

31. The method of claim 29, wherein the decoder is a hard-decoder that
produces hard information corresponding to the common transmit signal
vector.

32. The system of claim 29, wherein the vector combining circuitry
concatenates the received signal vectors by creating a vector, {tilde
over (y)}, where {tilde over (y)}=[y.sub.1.sup.Ty.sub.2.sup.T . . .
yNT]T and yi is an ith received signal vector
corresponding to the common transmit signal vector, and wherein the
matrix combining circuitry concatenates K of the channel response
matrices by creating a matrix, {tilde over (H)}, where {tilde over
(H)}=[H.sub.1.sup.TH.sub.2.sup.T . . . HNT]T, and Hi
corresponds to the channel response matrix for an ith transmission of the
common transmit vector.

34. The system of claim 29, wherein the processing circuitry calculates a
matrix parameter from the combined channel response matrix and processes
the combined received signal vector using the calculated matrix parameter
to produce the equalized signal vector of dimension Nt, wherein
Nt<KNr.

36. The system of claim 34, wherein the processing circuitry calculates
the matrix parameter by performing QR decomposition of the combined
channel response matrix, and wherein the decoder calculates a metric
∥{tilde over (Q)}*{tilde over (y)}-{tilde over
(R)}x∥2, where {tilde over (y)} is the combined received
signal vector, x is the common transmit signal vector, {tilde over (Q)}
and {tilde over (R)} are resulting matrices from QR decomposition, and
{tilde over (Q)}* is a transpose of {tilde over (Q)}.

37. A non-transitory computer readable medium encoded with computer
executable instructions for decoding a signal vector in a multiple-input
multiple-output transmission scheme, the computer executable instructions
comprising instructions for: receiving multiple signal vectors of a first
dimension (Nr) corresponding to a common transmit signal vector of a
second dimension (Nt), wherein each of the received signal vectors
is associated with a channel response matrix of dimension
Nr×Nt; concatenating K of the received signal vectors
into a combined received signal vector of dimension KNr, wherein K
is an integer variable greater than one; concatenating K of the channel
response matrices into a combined channel response matrix of dimension
KNr×Nt; processing the combined received signal vector to
produce an equalized signal vector of dimension Nt, wherein
Nt<KNr; and decoding the equalized signal vector using the
combined channel response matrix.

40. The non-transitory computer readable medium of claim 37, wherein the
instructions for concatenating the received signal vectors comprise
instructions for creating a vector, {tilde over (y)}, where {tilde over
(y)}=[y.sub.1.sup.Ty.sub.2.sup.T . . . yNT]T and yi
is an ith received signal vector corresponding to the common transmit
signal vector, and wherein the instructions for concatenating the channel
response matrices comprise instructions for creating a matrix, {tilde
over (H)}, where {tilde over (H)}=[H.sub.1.sup.TH.sub.2.sup.T . . .
HNT]T, and Hi corresponds to the channel response
matrix for an ith transmission of the common transmit signal vector.

42. The non-transitory computer readable medium of claim 37 further
comprising instructions for calculating a matrix parameter from the
combined channel response matrix, wherein the instructions for processing
the combined received signal vector comprise instructions for processing
the combined received signal vector using the calculated matrix parameter
to produce the equalized signal vector of dimension Nt, wherein
Nt<KNr.

[0002] This invention relates to a technique for decoding a received
signal vector in a multiple-input multiple-output (MIMO) data
transmission or storage system, where the receiver may receive multiple
instances of the same transmitted signal vector.

[0003] In a data transmission or storage system, it is desirable for
information, often grouped into packets, to be accurately received at a
destination. A transmitter at or near the source sends the information
provided by the source via a signal or signal vector. A receiver at or
near the destination processes the signal sent by the transmitter. The
medium, or media, between the transmitter and receiver, through which the
information is sent, may corrupt the signal such that the receiver is
unable to correctly reconstruct the transmitted information. Therefore,
given a transmission medium, sufficient reliability is obtained through
careful design of the transmitter and receiver, and of their respective
components.

[0004] There are many strategies for designing the transmitter and
receiver. When the channel characteristics are known, the transmitter and
receiver often implement signal processing techniques, such as
transmitter precoders and receiver equalizers, to reduce or remove the
effects caused by the channel and effectively recover the transmitted
signal. Intersymbol interference (ISI) is one example of a channel effect
that may be approximately eliminated using signal processing.

[0005] However, not all sources of signal corruption are caused from
deterministic sources such as ISI. Non-deterministic sources, such as
noise sources, may also affect the signal. Due to noise and other
factors, signal processing techniques may not be entirely effective at
eliminating adverse channel effects on their own. Therefore, designers
often add redundancy in the data stream in order to correct errors that
occur during transmission. The redundancy added to the data stream is
determined based on an error correction code, which is another design
variable. Common error correction codes include Reed-Solomon and Golay
codes.

[0006] One straightforward way to implement a code is to use forward error
correction (FEC). The transmitter encodes the data according to an error
correction code and transmits the encoded information. Upon reception of
the data, the receiver decodes the data using the same error correction
code, ideally eliminating any errors.

[0007] Another way to implement a code for error correction is to use
automatic repeat request (ARQ). Unlike FEC, ARQ schemes use
error-detecting rather than error-correcting codes. The ARQ transmitter
encodes data based on an error-detecting code, such as a cyclic
redundancy check (CRC) code. After decoding the data based on the
error-detecting code, if an error is detected, the receiver sends a
request to the transmitter to retransmit that codeword. Thus, ARQ
protocols require a forward channel for communication from transmitter to
receiver and a back channel for communication from receiver to
transmitter. Ultimately, the receiver will not accept a packet of data
until there are no errors detected in the packet.

[0008] Finally, FEC and ARQ may be combined into what is known as hybrid
automatic repeat request (HARQ). There are at least three standard HARQ
protocols. HARQ type-I typically uses a code that is capable of both
error-correction and error-detection. For example, a codeword may be
constructed by first protecting the message with an error-detecting code,
such as a CRC code, and then further encoding the CRC-protected message
with an error-correcting code, such as a Reed-Solomon, Golay,
convolutional, turbo, or low-density parity check (LDPC) code. When the
receiver receives such a code, it first attempts FEC by decoding the
error correction code. If, after error detection, there are still errors
present, the receiver will request a retransmission of that packet.
Otherwise, it accepts the received vector.

[0009] HARQ type-II and type-III are different from HARQ type-I, because
the data sent on retransmissions of a packet are not the same as the data
that was sent originally. HARQ type-II and type-III utilize incremental
redundancy in successive retransmissions. That is, the first transmission
uses a code with low redundancy. The code rate of a code is defined as
the proportion of bits in the vector that carry information and is a
metric for determining the throughput of the information. Therefore, the
low redundancy code used for the first transmission of a packet has a
high code rate, or throughput, but is less powerful at correcting errors.
If errors are detected in the first packet, the second transmission is
used to increase the redundancy, and therefore the error correcting
capability, of the code. For example, if the first transmission uses a
code with a code rate of 0.80, a retransmission may add enough extra
redundancy to reduce the overall code rate to 0.70. The redundancy of the
code may be increased by transmitting extra parity bits or by
retransmitting a subset of the bits from the original transmission. If
each retransmission can be decoded by itself, the system is HARQ
type-III. Otherwise, the system is HARQ type-II.

[0010] It is beneficial for an ARQ or HARQ receiver to utilize data from
multiple transmissions of a packet, because even packets that contain
errors carry some amount of information about the transmitted packet.
However, due to system complexity, and in particular decoder complexity,
many practical schemes only use data from a small, fixed number of
transmissions. Therefore, it would be desirable to provide a system or
method for effectively utilizing information from an arbitrary number of
transmitted packets that does not drastically increase the complexity of
the system.

SUMMARY OF THE INVENTION

[0011] Accordingly, systems and methods for reliable transmission in
multiple-input multiple-output systems are disclosed, where a receiver
obtains multiple signal vectors from the same transmit signal vector and
combines them prior to decoding.

[0012] The transmitter, which has Nt outputs, may send an
Nt-dimensional signal vector to the receiver. The receiver, which
has Nr inputs, may receive an Nr-dimensional signal vector
corresponding the Nt-dimensional transmit vector. In accordance with
one aspect of the invention, the transmitter sends the same signal vector
multiple times to the receiver according to some protocol. Two protocols
that may be used are HARQ type-I and repetition coding, or a combination
of the two.

[0013] In one embodiment of the present invention, when the receiver has
N≧1 received vectors from the same transmit signal, the receiver
concatenates the received signal vectors into one NNr-dimensional
vector. The receiver may decode the combined vector directly using a
decoder, such as a maximum-likelihood decoder.

[0014] In a second embodiment of the invention, the N channel response
matrices, also referred to as channel matrices, which define how each of
the channels alter the transmitted signal in a noiseless scenario, are
also concatenated into a single NNr×Nt matrix. A
preprocessor processes the concatenated channel response matrix, also
called the concatenated channel matrix. Then, rather than directly
decoding the concatenated NNr-dimensional received vector, the
concatenated received vector is equalized according to information
obtained from preprocessing the concatenated channel matrix. The result
of the equalization operation is a processed signal vector that may be
decoded using the same decoder no matter how large or small N is. Thus,
the complexity of the receiver may be drastically reduced.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and other objects and advantages of the invention will be
apparent upon consideration of the following detailed description, taken
in conjunction with the accompanying drawings, in which like reference
characters refer to like parts throughout, and in which:

[0016]FIG. 1 is a high level block diagram of a multiple-input
multiple-output data transmission or storage system in accordance with
one embodiment of the invention;

[0017] FIG. 2 is a wireless transmission system in accordance with one
embodiment of the system in FIG. 1;

[0018]FIG. 3 is a block diagram of a transmitter in accordance with one
embodiment of the invention;

[0019]FIG. 4A is a signal constellation set for quadrature amplitude
modulation with four signal points;

[0020]FIG. 4B is a signal constellation set for quadrature amplitude
modulation with 16 signal points;

[0027]FIG. 9 is a diagram illustrating an example of symbol-level
combining using weighted addition;

[0028] FIG. 10 is one embodiment of FIG. 7 for a multiple-input
multiple-output system using concatenation-assisted symbol-level
combining and maximum-likelihood decoding;

[0029]FIG. 11A is diagram illustrating the input/output relationship for
the maximum-likelihood decoder of FIG. 10 when one signal vector is
received;

[0030]FIG. 11B is a diagram illustrating the input/output relationship
for the maximum-likelihood decoder of FIG. 11 when N signal vectors are
received;

[0031] FIG. 12 is a vector model of the concatenated system of FIG. 10;

[0032]FIG. 13 is a block diagram of a receiver that combines incoming
vectors, processes the combined vector, and decodes the vector;

[0033]FIG. 14 is one embodiment of FIG. 13, where the receiver performs
QR decomposition of the combined channel matrix and maximum-likelihood
decoding;

[0034] FIG. 15 is one embodiment of FIG. 14, where the receiver uses
zero-forcing equalization and decoding;

[0035]FIG. 16A is a block diagram of an exemplary hard disk drive that
can employ the disclosed technology;

[0036]FIG. 16B is a block diagram of an exemplary digital versatile disc
that can employ the disclosed technology;

[0037]FIG. 16c is a block diagram of an exemplary high definition
television that can employ the disclosed technology;

[0038]FIG. 16D is a block diagram of an exemplary vehicle that can employ
the disclosed technology;

[0039]FIG. 16E is a block diagram of an exemplary cell phone that can
employ the disclosed technology;

[0040] FIG. 16F is a block diagram of an exemplary set top box that can
employ the disclosed technology; and

[0041]FIG. 16G is a block diagram of an exemplary media player that can
employ the disclosed technology.

DETAILED DESCRIPTION

[0042] The disclosed invention provides a technique in a multiple-input
multiple-output data transmission or storage system to decode a signal
vector at a receiver, where the receiver may receive multiple signal
vectors from the same transmitted signal vector.

[0043]FIG. 1 shows an illustration of a basic data transmission or
storage system in accordance with one embodiment of the present
invention. Data, typically grouped into packets, is sent from transmitter
102 to receiver 112. During transmission, the signals may be altered by a
transmission medium, represented by channel 106, and additive noise
sources 108. Transmitter 102 has Nt outputs 104 and receiver 112 has
Nr inputs 110, so channel 106 is modeled as a multiple-input
multiple-output (MIMO) system with Nt inputs and Nr outputs.
The Nt input and Nr output dimensions may be implemented using
multiple time, frequency, or spatial dimensions, or any combination of
such dimensions.

[0044] In one embodiment, FIG. 1 represents a wireless communication
system, pictured in FIG. 2. In this preferred embodiment, transmitter 102
is a wireless server 204, such as a commercial gateway modem, and
receiver 112 is a wireless receiver 206, such as a commercial wireless
computer adapter. Channel 106 is space 208 between wireless server 204
and wireless receiver 206, which obstructs and attenuates the signal due
to at least multipath fades and shadowing effects. Typically, wireless
communication systems use spatial dimensions to implement multiple
dimensions in the form of multiple transmitting antennas 200 and
receiving antennas 202.

[0045] Returning to FIG. 1, transmitter 102 prepares bit sequence 100 into
signals capable of transmission through channel 106. For an uncoded
system, bit sequence 100 is a binary message, where the message carries
only information bits. Alternatively, for a coded system, bit sequence
100 may be an encoded version of the message. Thus, bit sequence 100 may
have originated from a binary data source or from the output of a source
encoder (not pictured).

[0046] One embodiment of transmitter 102 is shown in FIG. 3. Transmitter
102 converts bit sequence 100 into signals 104 appropriate for
transmission through channel 106 (FIG. 1). Bit sequence 100 is passed
through interleaver 300. Therefore, each bit in bit sequence 100 may be
assumed to be independent of all other bits in bit sequence 100. Bit
sequence 306 at the output of interleaver 300 is demultiplexed by
demultiplexor 308 across Nt paths. Each demultiplexed output 310 may
or may not go through another interleaver and/or coding block 302,
yielding bit sequences 312. Finally, bit sequences 312 are modulated with
modulators 304, and are transmitted as signals x1, . . . , xNt,
or x in vector form.

[0047] Modulators 304 group the incoming bits into symbols, which are
mapped and converted to signals according to a signal constellation set
and carrier signal. In one embodiment of the invention, modulator 304
uses quadrature amplitude modulation (QAM). Each symbol is mapped to a
signal point in the QAM signal constellation set, where the signal points
are differentiated from one another by phase and/or magnitude. For
example, FIG. 4A shows a 4-QAM signal constellation set in a complex
number plane. In this case, signal points 400A-400D are distinguishable
only by phase. Each signal point represents a different two-bit symbol
402: 400A represents "00," 400B represents "01," 400C represents "11,"
and 400D represents "10.". However, any other one-to-one mapping from
symbol to signal point is valid.

[0048] Similarly, FIG. 4B shows a 16-QAM signal constellation set, where
four-bit sequences 406 are combined into one symbol. Here, both the
amplitudes and the phase of signal points 404 may vary. FIG. 4B shows a
partial mapping from symbols 406 to signal points 404, where the each
symbol is shown closest to its corresponding signal point. However, as
before, any other mapping is possible. In general, an m-bit symbol may be
mapped according to an M-QAM signal set, where M=2m. Therefore, for
the transmitter configuration shown in FIG. 3, transmitter 102 is capable
of transmitting mNt bits concurrently.

[0049] In accordance with one embodiment of the present invention,
transmitter 102 sends the same vector, x, multiple times according to a
protocol that is also known and followed by receiver 112. Depending on
the protocol, there may be additional components in transmitter 102 that
are not shown in FIG. 3. It should be understood that transmitter 102 may
be altered in order to implement such protocols. For example, if an
automatic repeat request (ARQ) protocol is used, transmitter 102 may need
a buffer to store x, or equivalently bit stream 100, in the event that a
retransmission is requested.

[0050] Even though x is transmitted, receiver 112 in FIG. 1 actually
receives yi, where

yi=HX+ni 1≦i≦N (1)

For clarity, FIG. 5 shows the components of each vector in equation (1).
Index i represents the ith instance that the same transmitted vector, x,
is transmitted. yi is an Nr×1 vector, where each vector
component is the signal received by one of the Nr inputs of receiver
112. Hi 500 is an Nr×Nt channel matrix that defines
how channel 106 alters the transmitted vector, x. ni is an
Nr×1 vector of additive noise. Note that the characteristics
of channel 106, reflected in matrix 500, and noise sources 108, and
therefore received signal 110, may be different for each instance i.
Differences arise because each transmission of x occurs at a different
time or through a different medium.

[0051] In one embodiment, noise sources 108 may be modeled as additive
white Gaussian noise (AWGN) sources. In this case, noise sources 108 are
independent and identically distributed (i.i.d). That is, the noise that
affects any of the Nr components in any ni does not affect the
noise for any other component in ni. Also, all of the noise sources
have the same probabilistic characteristics. Furthermore, each component
of ni has zero mean and is random in terms of both magnitude and
phase, where the magnitude and the phase are also independent. This type
of noise source is called an i.i.d. zero mean circularly symmetric
complex Gaussian (ZMCSCG) noise source. If the variance of each component
is N0, then the conditional probability distribution function (pdf)
of the received signal, Pr{y|x,H}, is given by

Equation (2) will be used with reference to maximum-likelihood decoding
discussed in greater detail below in connection with FIG. 10.

[0052] Receiver 112 may use one or more of the N received copies of x to
determine the information that was transmitted. Receiver 112 may combine
multiple received vectors into a single vector for decoding, thereby
utilizing more than one, and possibly all, of the transmitted signal
vectors. The combining scheme disclosed in the present invention will be
discussed in greater detail below in connection with FIGS. 7-15.

[0053] In one embodiment of the invention, receiver 112 receives multiple
instances of a common transmit vector using a retransmission protocol.
For example, the transmitter and receiver may use a HARQ type-I protocol.
The flow chart of the steps taken by transmitter 102 and receiver 112 are
shown in FIG. 6A and FIG. 6B, respectively. FIG. 6A shows a transmitter
following a stop-and-wait protocol, where the transmitter waits until a
signal vector has been accepted by the receiver before sending the next
signal vector. Other protocols, such as go-back-N, selective repeat, or
any other suitable protocol may be used in place of stop-and-wait.
Therefore, it should be understood that FIG. 6A may be modified in order
to implement a different protocol.

[0054] FIG. 6B shows a simplified flow chart of a HARQ type-I receiver
protocol in accordance with one aspect of the invention. At some time,
receiver 112 receives yi at 600, corresponding to the ith
transmission of x. At 602, receiver 112 combines all received vectors
corresponding to transmitted signal x, that is y1, . . . , yi,
into a single vector, {tilde over (y)}, and decodes the combined vector.
In FIG. 6B, decoding refers to determining the CRC-protected message
based on the combined signal vector. Other possible decoding outputs will
be discussed in greater detail below in connection with FIG. 7. Errors in
the data may be corrected by combining the received signal vectors such
that the combined signal vector, {tilde over (y)}, is correctable by
decoding. Following decoding, error detection is performed at step 604,
which in this case involves checking the CRC of the decoded vector. If
errors are detected, the receiver sends a negative acknowledgement (NACK)
message to the transmitter at 606. Upon receipt of the NACK, the
transmitter sends the same transmitted signal vector, which is received
at 600 as yi+1. yi+1, is different from yi even though the
same transmit signal vector x is used at the transmitter, because
yi+1 is transmitted at a later time than yi and is affected by
different noise and channel characteristics. The i+1 vectors are combined
and decoded, as described previously. This procedure occurs N times,
until by combining and decoding N received vectors, no CRC error is
detected. At this point, the receiver sends an acknowledgment (ACK)
message at 608 back to the transmitter to inform the transmitter that the
vector has been successfully received. Also, since there are no errors in
the data, the receiver passes the data to the destination at 610.

[0055] In a second embodiment of the invention, the transmitter sends a
signal vector, x, a fixed number of times, irrespective of the presence
of errors. For example, the receiver may obtain N transmissions of x from
repetition coding. N copies of x are transmitted simultaneously, or
within some interval of time. The receiver combines y1, . . . ,
yN, and decodes the combination. Repetition coding may be useful
when there is no feasible backchannel for the receiver to send
retransmission requests.

[0056] HARQ type-I and repetition coding are two protocols that may be
used in different embodiments of the present invention. Alternatively,
repetition coding and HARQ can be combined such that multiple vectors are
received at 500 before combining and decoding at 502. The invention,
however, is not limited to the two protocols and their combination
mentioned here. Currently, the IEEE 802.16e standard uses HARQ and
repetition coding, so these particular protocols merely illustrate
embodiments of the invention. Any protocol that allows the receiver to
receive multiple copies of the same transmitted vector fall within the
scope of the present invention.

[0057]FIG. 7 is a block diagram of receiver 112 in accordance with one
embodiment of the present invention. Furthermore, it illustrates one way
to implement combining and decoding at 602 in FIG. 6B. Combiner 702,
which may or may not use channel information 710 provided from channel
combiner 700, combines the received vectors. This technique is called
symbol-level combining, because the combiner operates on the symbols of
the signal vector. Combined received vector 706 is decoded using decoder
704. Decoder 704 may use channel information 708 provided by combiner 700
to operate on combined received vector 706. A decoder refers to a
component that uses a signal to make a decision as to the data that was
transmitted. Accordingly, decoder 704 may return an estimate of the
signal vector, x. It may return soft information or hard information. If
decoder 704 returns hard information, it may have been the result of
hard-decoding or soft-decoding. For a coded system, decoder 704 may
return coded information or decoded information.

[0058] For single input, single output (SISO) systems, where
Nt=Nr=1, one way to implement the combiner of FIG. 7 is shown
in FIG. 8. The received symbols, y1, . . . , yN, are combined
by taking a weighted sum of the symbols. Weights 802 for the received
symbols are conventionally chosen to maximize the signal-to-noise ratio
(SNR), a technique called maximal ratio combining (MRC). MRC with ML
decoding is a preferred method for decoding multiple received signals in
the presence of AWGN. Either hard-decoding or soft-decoding may be
performed, depending on the situation (e.g. uncoded system, coded system,
etc.).

[0059]FIG. 9 shows an example of MRC, or any other weighted addition
combining, for a SISO system. The signal constellation set is 4-QAM,
which was previously described in connection with FIG. 4A. Signal points
900A-900D represent the magnitude and phase of the transmitted symbol.
For illustration purposes, assume that the transmitter is sending the
symbol, "00" (900A) to the receiver using a HARQ type-I protocol. Assume,
for the purpose of illustration, that the channel does not attenuate,
amplify, or alter the signal in any way. Therefore, ideally, the
magnitude and phase of a received signal is the same as the transmitted
signal. If, due to additive noise, 904 is actually received, it will be
incorrectly decoded as "01," because it is closer to signal point 900B
than 900A. Note that an ML decoder will make this decision if the noise
is AWGN. The error-detecting code may then detect the presence of the bit
error, resulting in a request for a retransmission. On the second
transmission, 906 is received. If 906 is decoded on its own, it will be
incorrectly decoded as "10." However, by weighted addition, the resulting
combined symbol falls approximately on dotted line 908. The combined
symbol is now closest to signal point 900A and will be decoded correctly
as "00." The above example shows how error correction can be performed by
combining vectors that, decoded individually, have errors. Thus, using a
symbol-level combining scheme may also result in fewer retransmissions in
a HARQ type-I protocol.

[0060] Note that HARQ type-II and HARQ type-III are not applicable to
symbol-level combining, as described above. The symbols being transmitted
are not always the same in successive transmissions, because HARQ type-II
and HARQ type-III utilize incremental redundancy and therefore change the
bit stream being transmitted.

[0061] The extension from SISO to general MIMO systems for decoding
multiple received vectors for the same transmit vector is not
straightforward. Thus, the present invention discloses a different form
of symbol-level combining, called Concatenation-Assisted Symbol-Level
(CASL) combining, that is extendable to MIMO systems.

[0062] FIG. 10 shows a simplified diagram of a CASL Combining decoder
using maximum-likelihood decoding in accordance with one embodiment of
the invention. Combiner 1002 concatenates each of the received vectors
into a single, NNr-dimensional vector {tilde over (y)} 1006. The
combined vector 1006 is then decoded using ML decoder 1004, which uses
concatenated matrix 1008 from combiner 1000. Based on the received
vector, an ML decoder for a MIMO system, such as decoder 1004, picks a
valid transmit vector that has the highest probability of being sent.
Mathematically, this corresponds to choosing the transmit vector that
maximizes equation (2). Equivalently, for an AWGN channel, an ML decoder
picks the values of a valid transmit signal vector x that minimizes the
magnitude of the noise. Thus, the metric implemented by decoder 1004 is
∥{tilde over (y)}-{tilde over (H)}x∥2. For a coded
system, an ML decoder may also decode the received vector by choosing the
most likely codeword that was sent, and obtaining the corresponding
message.

[0063] When the system of FIG. 10 has received only one instance of x,
where

y1=H1x+n1, (3)

the concatenation steps performed by combiners 1002 and 1000 are trivial.
Vector 1006 is simply y1, and vector 1008 is simply H1. The ML
decoder 1004 may estimate the Nt×1 common transmitted signal
vector 104 from the Nr×1 signal vector 1006. For clarity, the
input/output relationship of the decoder when only one signal vector has
been received is shown in FIG. 11A.

[0064] When the system of FIG. 10 has received N signal vectors
(N≧2), the channel matrices and received signal vectors are
combined by combiners 1000 and 1002, yielding combined signal vector 1006
and combined channel matrix 1008. For system modeling purposes, the noise
vectors are also concatenated. Thus, the combined vectors are

{tilde over (y)}=[y1Ty2T . . . yNT]T
(4)

n=[n1Tn2T . . . nNT]T (5)

{tilde over (H)}=[H1TH2T . . . HNT]T
(6)

{tilde over (y)} and n are the NNr×1 concatenated received
signal vector and concatenated noise vector, respectively, and {tilde
over (H)} is the NNr×Nt concatenated channel matrix.
After concatenation, the new channel model for the system is shown in
equation (8). For clarity, FIG. 12 shows each component of the vectors
and matrix in equation (8). Note that equations (7) and (8) are
equivalent, since there is no loss of information in concatenation.
Therefore, if an optimal decoder is used, the system has optimal
performance.

yi=Hix+ni, i=1, . . . , N. (7)

{tilde over (y)}={tilde over (H)}x+n. (8)

[0065] Following concatenation, decoder 1004 estimates the transmitted
signal from the NNr×1 signal vector {tilde over (y)} 706 using
the ML metric, ∥{tilde over (y)}-{tilde over
(H)}x∥2, as previously defined. For clarity, the
input/output relationship of a decoder with N received vectors is shown
in FIG. 11B.

[0066]FIG. 11B shows that the number of inputs into decoder 1004 varies
with the number of received vectors. Therefore, to implement the block
diagram of FIG. 10, decoder 1004 may need to include separate decoders
for each possible N. However, using a separate decoder for each N would
drastically increase both the amount and complexity of the hardware. In
addition, since it would be impractical and impossible to implement a
different decoder for all N≧1, the decoding flexibility of the
receiver would be limited.

[0067] Therefore, FIG. 13 is a block diagram of a simplified
implementation of receiver 112 in accordance with one embodiment of the
present invention. FIG. 13 differs from FIG. 7 for at least the reason
that FIG. 13 has signal processor 1314 between combiner 1302 and decoder
1304. With proper design of signal processor 1312, a single decoder may
be implemented for all N. In particular, the signal processing techniques
enable decoder 1304 to implement only the decoder for N=1, when no
combining is necessary. The decoder used for N=1 is hereafter called a
basic decoder, and the decoder used for any integer N>1 is hereafter
referred to as a general decoder.

[0068] Two detailed embodiments of FIG. 13 are disclosed below to
illustrate the use of signal processing to enable reuse of the basic
decoder. One embodiment uses an equalizer based on QR decomposition of
the channel matrix prior to maximum-likelihood decoding. The other
embodiment utilizes zero-forcing (ZF) equalization, followed by a simple,
linear decoder. This simple decoder will be referred to as a zero-forcing
decoder. Maximum-likelihood decoding and zero-forcing equalization and
decoding represent two strategies that may be used in the present
invention. The present invention, however, is not limited to any
particular type of signal processing or decoding. For example, a minimum
mean squared error (MMSE) equalizer/decoder may also be used. As shown
below for ML and ZF, each of these decoding strategies implements
potentially different signal processing in order to enable reuse of the
basic decoder. To show that the decoder is capable of reuse for all N,
the basic decoder for each of the following systems is described first.
Then, the general decoder is described and shown to be the same as the
basic decoder.

[0069]FIG. 14 is a block diagram for ML decoding of processed received
signals. The channel matrix is first concatenated and preprocessed by
combiner/preprocessor 1400. In this case, pre-processing involves
factoring the combined channel matrix into a matrix with orthonormal
columns, Q, and a square, upper-triangular matrix R. Matrices Q and R are
used by signal processor 1412 and decoder 1404. The advantage of applying
QR factorization to the channel matrix will become apparent below.

[0070] When only one signal vector has been received by the system in FIG.
14, concatenation by combiners 1400 and 1402 is trivial. The received
signal can be represented as

y 1 = H 1 x + n 1 = Q 1 R 1 x +
n 1 . ( 10 ) ( 9 ) ##EQU00002##

Using the channel information provided by combiner/preprocessor 1400,
signal processor 1412 multiplies the received vector by Q1*, where
Q1* is the transpose of Q1, yielding

Equation (12) follows from equation (11) because
Q1*Q1=INt, where INt is the Nt×Nt
identity matrix, when Q1 has orthonormal columns.

[0071] Since only one vector is received by the receiver in FIG. 14,
decoder 1404 is a basic decoder. Using the Nt×1 signal vector
Q'yt, basic decoder 1404 estimates the Nt×1 common
transmitted vector x. Decoder 1404 may still implement the same decoding
scheme as basic decoder 1004, except decoder 1404 picks a valid transmit
signal vector x that minimizes Q1*n1 The decoder metric,
therefore, is ∥Q1*y1-R1x∥2.

[0072] When multiple signal vectors (N>1) have been received by the
system in FIG. 14, the N channel matrices and N received vectors are
concatenated at 1400 and 1402, respectively. The concatenation operation
is shown in equations (4) and (6) for the channel matrices and received
vectors, respectively. Equation (6) is reproduced in equation (13) for
convenience. In addition to concatenation, combiner/preprocessor 1400
performs QR decomposition on the combined channel matrix. That is, it
determines the values of {tilde over (Q)} and {tilde over (R)} in

H ~ = [ H 1 T H 2 T H N T ] T
= Q ~ R ~ , ( 14 ) ( 13 ) ##EQU00004##

where {tilde over (Q)} is an NNr×Nt matrix with
orthonormal columns, and {tilde over (R)} is an Nr×Nt
upper triangular matrix. Accordingly, concatenated received signal vector
1406 can be represented as

y ~ = H ~ x + n ~ = Q ~ R ~ x
+ n ~ , ( 16 ) ( 15 ) ##EQU00005##

where {tilde over (Q)} and {tilde over (R)} are defined in equation (14)
and n is a noise vector defined in equation (5). Following concatenation,
signal processor 1412 multiplies concatenated received vector 1406 by
{tilde over (Q)}*, yielding

[0073] Since multiple vectors have been received by the receiver in FIG.
14, ML decoder 1404 is a general decoder. Similar to the basic decoding
case, general ML decoder 1404 picks the vector x that minimizes the
metric, ∥{tilde over (Q)}*{tilde over (y)}-{tilde over
(R)}x∥2.

[0074] There is no loss of information from the operation performed by
equalizer 1412, namely multiplying equation (16) by {tilde over (Q)}*.
This is because the Nt columns of {tilde over (Q)}, which span the
same space as the columns of {tilde over (H)}, can be thought of as an
NNr dimensional orthonormal basis for the Nt dimensional
subspace where the transmitted signal lies. By multiplication of {tilde
over (Q)}*, the dimension of the signal and noise vectors are reduced
from NNr to Nt. The dimension of the transmitted signal vector
was originally Nt, so there is no loss of information from the
multiplication by {tilde over (Q)}*. Furthermore, the noise parts lying
in the reduced dimension do not affect the decoding process. Therefore,
since FIG. 14 uses an optimal, ML decoder, the system has optimal
performance.

[0075] Because of the multiplication by {tilde over (Q)}*, which is
performed by signal processor 1412, the size of the signal processor
output, vector 1414 or {tilde over (Q)}*{tilde over (y)}, is reduced to
Nt. This is the same dimension as when only one signal vector is
received. Therefore, the dimension of the input to ML decoder 1404 for
N>1 is the same as the dimension of the basic decoder, which enables
the same decoder to be used for arbitrary N. Thus, by processing the
combined signal with {tilde over (Q)}* prior to decoding, the complexity
of decoder 1404 may be drastically reduced.

[0076] A second embodiment of the block diagram in FIG. 13 is shown in
FIG. 15. The block diagram in FIG. 15 uses zero-forcing (ZF) equalization
and decoding. Zero-forcing is a technique used to ideally eliminate the
effect of a channel, H, from a received vector, y, by multiplying the
received vector by the channel inverse, H-1. The result is generally
a signal similar to the transmitted signal, but with correlated and
amplified noise. Thus, a zero-forcing decoder is a non-optimal form of
decoding. However, it is effective in many circumstances and has much
lower complexity than ML decoding.

[0077] When only one signal vector has been received by the system in FIG.
15, concatenation by combiner 1402 is trivial, and signal vector 1408 is
simply y1, where

y1=H1x+n1. (19)

Concatenation by combiner/preprocessor 1500 is also trivial. However,
combiner/preprocessor 1500 also preprocesses channel matrix 1508, which
is simply H1 in this case, to supply appropriate information to
signal processor 1512. In particular, it determines the inverse of the
channel matrix, H1-1. Signal processor 1512 uses the inverse to
perform zero-forcing equalization on vector 1408. It multiplies vector
1408 by H1-1, yielding

[0078] Since only one signal vector is received by FIG. 15, ZF decoder
1504 is a basic decoder. Using H-1y1 and ignoring the
correlation between the noise components, basic ZF decoder 1504 may try
to estimate the Nt×1 common transmitted signal vector, x.

[0079] One valuable aspect of the zero-forcing technique employed by the
system in FIG. 15 comes from the fact that each component of 1514 may be
decoded separately. For an ML decoding scheme, such as the one shown in
FIG. 14, the decoder has to consider the transmitted vector as a whole in
order to calculate ∥{tilde over (y)}-{tilde over
(H)}x∥2. Instead, to estimate the kth component of x,
decoder 1510 implements a method to calculate the metric,

[0080] The subscript k indexes the kth element of a vector, and the
subscript k,k indexes the (k,k)th element of a matrix. Since x has a
dimension of Nt, k takes on the values 1, . . . , Nt, and the
metric is implemented for each of the Nt signals.

[0081] Now considering the case with N received signal vectors
(N≧2), the channel model can again be expressed as

{tilde over (y)}={tilde over (H)}x+n, (25)

where the components of equation (25) are shown more clearly in FIG. 12.
{tilde over (y)} is obtained by the system in FIG. 15 by combiner 1402
and {tilde over (H)} is obtained by combiner/preprocessor 1500. In
addition, combiner/preprocessor 1500 preprocesses {tilde over (H)} to
supply appropriate information to zero-forcing equalizer 1512. In
particular, it calculates the pseudo-inverse of {tilde over (H)}, {tilde
over (H)}.sup.†, where {tilde over (H)}.sup.†=({tilde over
(H)}*{tilde over (H)})-1{tilde over (H)}*.

[0082] The zero-forcing equalizer 1512 attempts to recover the transmitted
signal vector by multiplying the received vector in equation (25) by the
pseudo-inverse, {tilde over (H)}.sup.†. The result of the
equalizer is

[0084] Since the receiver of FIG. 15 has multiple received vectors,
zero-forcing decoder 1504 is a general decoder. The general ZF decoder
estimates the Nt×1 transmitted signal vector, x, from the
Nt×1 signal vector {tilde over (H)}.sup.†{tilde over
(y)} and ignoring the correlation between the noise components. Similar
to the basic decoding case, to estimate the kth component of x, the
decoder implements a method to calculate the metric,

The subscript k indexes the kth element of a vector, and the subscript
k,k indexes the (k,k)th element of a matrix. Since x has a dimension
of Nt, k takes on the values 1, . . . , Nt, and the metric is
implemented for each of the Nt signals.

[0085] Because of the multiplication by {tilde over (H)}.sup.†
performed by signal processor 1512, the size of the signal processor
output, vector 1514 or {tilde over (H)}.sup.†{tilde over (y)}, is
reduced to Nt. This is the same dimension as when only one signal
vector is received. Therefore, the dimension of the input to ML decoder
1504 for N>1 is the same as the dimension of the basic decoder, which
enables the same decoder to be used for arbitrary N. Thus, by processing
the combined signal with {tilde over (H)}.sup.† prior to decoding,
the complexity of the decoder 1504 may be drastically reduced.

[0086] Similar to the ML case above, QR decomposition may also be
performed on the channel matrix in the zero-forcing case to reduce
computation complexity. Before combiner/preprocessor 1500 computes the
pseudo-inverse of the combined channel matrix, it factors the matrix,
{tilde over (H)}, into a matrix with orthonormal columns, {tilde over
(Q)}, and a square, upper-triangular matrix {tilde over (R)}:

H ~ = [ H 1 T H 2 T H N T ] T
= Q ~ R ~ , ( 31 ) ( 30 ) ##EQU00011##

Following QR decomposition, combiner/preprocessor 1500 calculates the
inverse of {tilde over (Q)}{tilde over (R)}, which is {tilde over
(R)}-1{tilde over (Q)}*.

The subscript k indexes the kth element of a vector, and the
subscript k,k indexes the (k,k)th element of a matrix. Since x has a
dimension of Nt, k takes on the values 1, . . . , Nt, and the
metric is implemented for each of the Nt signals.

[0088] The above embodiments described in connection with FIGS. 7, 10, and
13-15 may concatenate all received signal vectors and channel matrices.
Alternatively, a subset of the received signal vectors and channel
matrices may be combined. For example, a received signal and the
corresponding channel matrix may be discarded if the magnitude of a
component in the received signal vector is below a certain threshold.

[0089] Referring now to FIGS. 16A-16G, various exemplary implementations
of the present invention are shown.

[0090] Referring now to FIG. 16A, the present invention can be implemented
in a hard disk drive 1600. The present invention may implement either or
both signal processing and/or control circuits, which are generally
identified in FIG. 16A at 1602. In some implementations, the signal
processing and/or control circuit 1602 and/or other circuits (not shown)
in the HDD 1600 may process data, perform coding and/or encryption,
perform calculations, and/or format data that is output to and/or
received from a magnetic storage medium 1606.

[0091] The HDD 1600 may communicate with a host device (not shown) such as
a computer, mobile computing devices such as personal digital assistants,
cellular phones, media or MP3 players and the like, and/or other devices
via one or more wired or wireless communication links 1608. The HDD 1600
may be connected to memory 1609 such as random access memory (RAM), low
latency nonvolatile memory such as flash memory, read only memory (ROM)
and/or other suitable electronic data storage.

[0092] Referring now to FIG. 16B, the present invention can be implemented
in a digital versatile disc (DVD) drive 1610. The present invention may
implement either or both signal processing and/or control circuits, which
are generally identified in FIG. 16B at 1612, and/or mass data storage of
the DVD drive 1610. The signal processing and/or control circuit 1612
and/or other circuits (not shown) in the DVD 1610 may process data,
perform coding and/or encryption, perform calculations, and/or format
data that is read from and/or data written to an optical storage medium
1616. In some implementations, the signal processing and/or control
circuit 1612 and/or other circuits (not shown) in the DVD 1610 can also
perform other functions such as encoding and/or decoding and/or any other
signal processing functions associated with a DVD drive.

[0093] The DVD drive 1610 may communicate with an output device (not
shown) such as a computer, television or other device via one or more
wired or wireless communication links 1617. The DVD 1610 may communicate
with mass data storage 1618 that stores data in a nonvolatile manner. The
mass data storage 1618 may include a hard disk drive (HDD). The HDD may
have the configuration shown in FIG. 16A. The HDD may be a mini HDD that
includes one or more platters having a diameter that is smaller than
approximately 1.8''. The DVD 1610 may be connected to memory 1619 such as
RAM, ROM, low latency nonvolatile memory such as flash memory and/or
other suitable electronic data storage.

[0094] Referring now to FIG. 16c, the present invention can be implemented
in a high definition television (HDTV) 1620. The present invention may
implement either or both signal processing and/or control circuits, which
are generally identified in FIG. 16c at 1622, a WLAN interface and/or
mass data storage of the HDTV 1620. The HDTV 1620 receives HDTV input
signals in either a wired or wireless format and generates HDTV output
signals for a display 1626. In some implementations, signal processing
circuit and/or control circuit 1622 and/or other circuits (not shown) of
the HDTV 1620 may process data, perform coding and/or encryption, perform
calculations, format data and/or perform any other type of HDTV
processing that may be required.

[0095] The HDTV 1620 may communicate with mass data storage 1627 that
stores data in a nonvolatile manner such as optical and/or magnetic
storage devices for example hard disk drives HDD and/or DVDs. At least
one HDD may have the configuration shown in FIG. 16A and/or at least one
DVD may have the configuration shown in FIG. 16B. The HDD may be a mini
HDD that includes one or more platters having a diameter that is smaller
than approximately 1.8''. The HDTV 1620 may be connected to memory 1628
such as RAM, ROM, low latency nonvolatile memory such as flash memory
and/or other suitable electronic data storage. The HDTV 1620 also may
support connections with a WLAN via a WLAN network interface 1629.

[0096] Referring now to FIG. 16D, the present invention implements a
control system of a vehicle 1630, a WLAN interface and/or mass data
storage of the vehicle control system. In some implementations, the
present invention may implement a powertrain control system 1632 that
receives inputs from one or more sensors such as temperature sensors,
pressure sensors, rotational sensors, airflow sensors and/or any other
suitable sensors and/or that generates one or more output control signals
such as engine operating parameters, transmission operating parameters,
and/or other control signals.

[0097] The present invention may also be implemented in other control
systems 1640 of the vehicle 1630. The control system 1640 may likewise
receive signals from input sensors 1642 and/or output control signals to
one or more output devices 1644. In some implementations, the control
system 1640 may be part of an anti-lock braking system (ABS), a
navigation system, a telematics system, a vehicle telematics system, a
lane departure system, an adaptive cruise control system, a vehicle
entertainment system such as a stereo, DVD, compact disc and the like.
Still other implementations are contemplated.

[0098] The powertrain control system 1632 may communicate with mass data
storage 1646 that stores data in a nonvolatile manner. The mass data
storage 1046 may include optical and/or magnetic storage devices for
example hard disk drives HDD and/or DVDs. At least one HDD may have the
configuration shown in FIG. 16A and/or at least one DVD may have the
configuration shown in FIG. 16B. The HDD may be a mini HDD that includes
one or more platters having a diameter that is smaller than approximately
1.8''. The powertrain control system 1632 may be connected to memory 1647
such as RAM, ROM, low latency nonvolatile memory such as flash memory
and/or other suitable electronic data storage. The powertrain control
system 1632 also may support connections with a WLAN via a WLAN network
interface 1648. The control system 1640 may also include mass data
storage, memory and/or a WLAN interface (all not shown).

[0099] Referring now to FIG. 16E, the present invention can be implemented
in a cellular phone 1650 that may include a cellular antenna 1651. The
present invention may implement either or both signal processing and/or
control circuits, which are generally identified in FIG. 16E at 1652, a
WLAN interface and/or mass data storage of the cellular phone 1650. In
some implementations, the cellular phone 1650 includes a microphone 1656,
an audio output 1658 such as a speaker and/or audio output jack, a
display 1660 and/or an input device 1662 such as a keypad, pointing
device, voice actuation and/or other input device. The signal processing
and/or control circuits 1652 and/or other circuits (not shown) in the
cellular phone 1650 may process data, perform coding and/or encryption,
perform calculations, format data and/or perform other cellular phone
functions.

[0100] The cellular phone 1650 may communicate with mass data storage 1664
that stores data in a nonvolatile manner such as optical and/or magnetic
storage devices for example hard disk drives HDD and/or DVDs. At least
one HDD may have the configuration shown in FIG. 16A and/or at least one
DVD may have the configuration shown in FIG. 16B. The HDD may be a mini
HDD that includes one or more platters having a diameter that is smaller
than approximately 1.8''. The cellular phone 1650 may be connected to
memory 1666 such as RAM, ROM, low latency nonvolatile memory such as
flash memory and/or other suitable electronic data storage. The cellular
phone 1650 also may support connections with a WLAN via a WLAN network
interface 1668.

[0101] Referring now to FIG. 16F, the present invention can be implemented
in a set top box 1680. The present invention may implement either or both
signal processing and/or control circuits, which are generally identified
in FIG. 16F at 1684, a WLAN interface and/or mass data storage of the set
top box 1680. The set top box 1680 receives signals from a source such as
a broadband source and outputs standard and/or high definition
audio/video signals suitable for a display 1688 such as a television
and/or monitor and/or other video and/or audio output devices. The signal
processing and/or control circuits 1684 and/or other circuits (not shown)
of the set top box 1680 may process data, perform coding and/or
encryption, perform calculations, format data and/or perform any other
set top box function.

[0102] The set top box 1680 may communicate with mass data storage 1690
that stores data in a nonvolatile manner. The mass data storage 1690 may
include optical and/or magnetic storage devices for example hard disk
drives HDD and/or DVDs. At least one HDD may have the configuration shown
in FIG. 16A and/or at least one DVD may have the configuration shown in
FIG. 16B. The HDD may be a mini HDD that includes one or more platters
having a diameter that is smaller than approximately 1.8''. The set top
box 1680 may be connected to memory 1694 such as RAM, ROM, low latency
nonvolatile memory such as flash memory and/or other suitable electronic
data storage. The set top box 1680 also may support connections with a
WLAN via a WLAN network interface 1696.

[0103] Referring now to FIG. 16G, the present invention can be implemented
in a media player 1760. The present invention may implement either or
both signal processing and/or control circuits, which are generally
identified in FIG. 16G at 1704, a WLAN interface and/or mass data storage
of the media player 1700. In some implementations, the media player 1700
includes a display 1707 and/or a user input 1708 such as a keypad,
touchpad and the like. In some implementations, the media player 1700 may
employ a graphical user interface (GUI) that typically employs menus,
drop down menus, icons and/or a point-and-click interface via the display
1707 and/or user input 1708. The media player 1700 further includes an
audio output 1709 such as a speaker and/or audio output jack. The signal
processing and/or control circuits 1704 and/or other circuits (not shown)
of the media player 1700 may process data, perform coding and/or
encryption, perform calculations, format data and/or perform any other
media player function.

[0104] The media player 1700 may communicate with mass data storage 1710
that stores data such as compressed audio and/or video content in a
nonvolatile manner. In some implementations, the compressed audio files
include files that are compliant with MP3 format or other suitable
compressed audio and/or video formats. The mass data storage may include
optical and/or magnetic storage devices for example hard disk drives HDD
and/or DVDs. At least one HDD may have the configuration shown in FIG.
16A and/or at least one DVD may have the configuration shown in FIG. 16B.
The HDD may be a mini HDD that includes one or more platters having a
diameter that is smaller than approximately 1.8''. The media player 1700
may be connected to memory 1714 such as RAM, ROM, low latency nonvolatile
memory such as flash memory and/or other suitable electronic data
storage. The media player 1700 also may support connections with a WLAN
via a WLAN network interface 1716. Still other implementations in
addition to those described above are contemplated.

[0105] The foregoing describes systems and methods for decoding a signal
vector, where the receiver may obtain receive multiple instances of the
same transmit signal vector. The above described embodiments of the
present invention are presented for the purposes of illustration and not
of limitation. Furthermore, the present invention is not limited to a
particular implementation. The invention may be implemented in hardware,
such as on an application specific integrated circuit (ASIC) or on a
field-programmable gate array (FPGA). The invention may also be implement
in software.