Belgian Lab Brews New Chip Recipe

Belgium doesn’t frequently conjure up comparisons with Silicon Valley. But a research group there thinks it has come up with a nifty way to make much faster semiconductors.

The organization known as Imec says it has demonstrated a practical way to fabricate key parts of transistors on chips from what the industry calls III-V materials, while still using a cost-effective variety of silicon wafers.

Devices like lasers and radio components have long been made using such materials, whose name comes from their positions on the periodic table of elements. But they are ordinarily made from entirely different kinds of wafers in different factories.

Aaron Thean, Imec’s director of research and development for logic-chip technology, says electrons move 10 to 100 times faster through the III-V materials than through silicon. As engineers seek to reduce the power consumption of future chips, such a change in the underlying materials can allow performance gains to increase while reducing power consumption to preserve battery life, he says.

In years past, chip makers simply reduced the size of silicon-based transistors to add more features at ever-lower costs. As that process reached a point of diminishing returns, semiconductor makers were forced to start adding different materials and even change the shape of transistors.

In the latest phase, Intel scooped rivals by being the first to fabricate those tiny switches using three-dimensional fin-like elements, creating faster transistors known as FinFETs.

Imec’s approach is based on first fabricating FinFETs using silicon. The group’s engineers then selectively replace those conventional fins with substitutes using the III-V materials indium gallium arsenide and indium phosphide.

Significantly, the modified FinFETs can be used for specific functions where speed is paramount while coexisting alongside silicon fins.

“You can mix and match, which is nice,” Thean says.

Moreover, Imec says it has demonstrated this trick on 12-inch silicon wafers, the foundation of most high-volume chip manufacturing these days. Most components created from III-V materials are usually produced in much smaller volumes on specialty wafers that are two to six inches across, he says. Bigger wafers mean lower costs per chip.

Of course, just making conventional FinFETs is pretty challenging, as Thean acknowledges. Only Intel has managed to do so in high volumes so far, and the company recently announced a one-quarter delay for delivering its next production recipe (which is rated at 14 nanometers–billionths of a meter–and also incorporates FinFETs).

Imec predicts its new-style FinFETs will not be applied until chip makers start developing chips with circuitry measured at seven nanometers. That’s two technology generations ahead of what Intel is now racing to perfect, a technology that probably won’t enter volume production until 2018, Thean says.

Whether to actually use the new production approach, of course, will be a decision for individual companies that are partners with Imec, which include Intel, Samsung, Sony, Qualcomm, Toshiba and Taiwan Semiconductor Manufacturing Co.