So you thought you would find here an impartial, knowledgeable comparison of RISC OS with the more popular and better known operating systems? Think again; I have been so steeped in RISC OS, since even before its appearance two decades ago, were that possible, and I am so ignorant of other operating systems, that I cannot honestly deliver to you a balanced picture. Well, that is the modern usage of apology over with, so let us get on to the older sense. Note: This is the 2nd entry to our Alternative OS Contest which runs through 14th July!

History

In the late 1970s Acorn (http://www.mcmordie.co.uk/acornhistory/acornhistory.shtml) was a small company in Cambridge, UK, producing electronic equipment for laboratories. My first microcomputer was an Acorn Atom, produced in 1980 with 2K of RAM, using a 6502 CPU. Acorn went on to win the BBC's commission for a microcomputer to be used in UK schools as part of an educational series of broadcasts. Its success with the resulting BBC B microcomputer made the company a household name in the UK. This machine was designed to be usable as a front end to more powerful second processors. However, Acorn found that all the currently available CPUs, from Motorola, National Semiconductor, Intel and Texas Instruments, were simply not fast enough at handling interrupts to work satisfactorily in this role. So they decided to manufacture their own! Thus was born, in 1986, the ARM (Acorn Risc Machine) CPU architecture. The Acorn Archimedes was the first microcomputer in the world for public sale to use a RISC (Reduced Instruction Set Computer) design. Its new operating system, RISC OS, was designed specifically for the ARM CPU.

This history is important, because it was to set the design-parameters for RISC OS. Acorn was selling to teachers and schoolchildren, and academics. The Archimedes could not be too expensive, and it had to be easy to use. This meant compromise. A cut-down multi-user OS, or a converted business system was not appropriate. RISC OS was a clean sheet design, for a personal, single-user microcomputer. It had a graphical user interface - the second to appear for public consumption (Apple's Lisa got there first). In fact the window manager was also the task manager, so the GUI was no bolt-on extra. Considerable effort went into making it easy to use and consistent. If this catered for the inexpert, the geek was kept happy too. RISC OS consists of an expandable cluster of modules (what an overloaded word); software packages in ROM or loaded into RAM. If you do not like some feature of RISC OS, well then, unplug the relevant module and substitute your own. Writing modules is not completely straightforward, but the excellent programmer's reference manuals (PRMs) have made it possible for many third party modules to be written. In a word, RISC OS has been designed to be totally under the user's control, like a motorcycle that can be dismantled and put together again on the kitchen floor. This feeling, that what is in the machine is the user's, not some piece of magic graciously licensed by a distant authority, goes a long way toward explaining why RISC OS users remain so.

The decision to provide RISC OS in ROM may well have been influenced by its use in schools. Early models of the Archimedes were usable with half a megabyte of RAM and no hard disc, GUI and all. ROMming the OS has big advantages for security. The only disadvantage is when you need to update; modern RISC OS hardware lets you reflash the ROMs when you are safely disconnected from the internet.

Remember the 640K limit on RAM that IBM machines once had? Well Acorn suffered a similar blindness when gazing into the crystal ball. The ARM chips up to and including version 3 used a cunning ruse to save memory and gain speed. All the registers in an ARM CPU are 32 bits wide. Those early versions used a 26-bit address bus (giving a 64Mb limit to the address space) and used the 8 extra bits in register R15 (the program counter) as status flags. This meant that both program counter and status flags could be saved by storing a single register. RISC OS was initially designed around this trick, alas. When the hugely successful ARM Holdings was spun off from Acorn and Acorn broken up to make this possible, new ARM designs appeared with a separate status register to cope with proper 32 bit addressing. The ARM 6 and 7, and Digital's brilliant StrongARM chip all had 26-bit compatibility modes, so RISC OS, which lived on under a sort of user buy-out, could and did use these chips. But the writing was on the wall. Why should ARM chip manufacturers bother with providing a compatibility mode for the small numbers of users of an obscure operating system? RISC OS had to be rewritten for 32-bit compatibility if it were to take advantage of newer ARM CPUs, a daunting undertaking for a small business. My own computer uses an XScale CPU and a 32-bit version of RISC OS.