The Lighting processors of the HP A600 and A600+ were good performing for 1982. They filled the entry and mid range slots of the HP 1000 A Series quite well. The additional floating point support of the A600+ in 1984 helped considerably as well, but what was needed for truly better performance on the high end was hardware math support. While the HP A600 took only 9 months to design and release, the A700, released at the same time, took somewhat longer. The A600 was based on the AMD 2901, which had been released way back in 1975. The A700 Phoenix was based on its successor, the AM2903. The 2903 added a few important features to the bit-slicer. Hardware multiply and divide support,support for more registers, and easier ways to access them, and parity generation. This is why the A700 took longer to design, the A600 design was begun half way through the A700 to fill the lower end, where the features of the 2903 wouldn’t be as missed.

The A700 performs at the same 1 MIPS as the A600 but supports 205 standard instructions (compared to 182 for the A600 and 239 for the A600+). It adds more register reference instructions, dynamic mapping, I/O and more math based instructions. Cycle time is actually slightly slower, 250ns compared to 227ns for the A600 but the 2903 allows more efficiency making up for the difference. A typical FMP instruction take 13.75-25.25 microseconds compared to 16.6-26.6 on the 2901 powered A600. This is a direct result of the hardware multiply hardware included in the 2903. The A600+, with its faster 2901C’s completes the same instruction in 17-21.1 microseconds, FASTER then the A700. But the A700 has a trick up its sleeve….

The Largest CPU Museum!

In my daily hunt for new processors, and other chips for the museum, as well as information about new chips, I constantly come across interesting chips, in strange locations. Here you will get a chance to learn WHERE many of the chips in the museum come from and what they are.