Tag Archives: Silicon

The researchers at Stanford University have discovered two ultrathin semiconductors – hafnium diselenide and zirconium diselenide. They share or even exceed some of the very important characteristics of silicon. Silicon has a great property of forming “rust” or silicon dioxide (SiO2) by reacting with oxygen. As the SiO2 acts as an insulator, chip manufacturers implement this property to isolate their circuits on a die. The most interesting fact about these newly discovered semiconductors is, they also form “rust” just like silicon.

An enlarged cross-section of an experimental chip made of ultrathin semiconductors

The new materials can also be contracted to functional circuits just three atoms thick and they require much less energy than silicon circuits. Hafnium diselenide and zirconium diselenide “rust” even better than silicon and form so-called high-K insulator. The researchers hope to use these materials to design thinner and more energy-efficient chips for satisfying the needs of future devices.

Apart from having the ability to “rust”, the newly discovered ultrathin semiconductors also have the perfect range of energy band gap – a secret feature of silicon. The band gap is the energy needed to switch transistors on and it is a critical factor in computing. Too low band gap causes the circuits to leak and make unreliable. Too high and the chip takes excessive energy to operate and becomes inefficient. Surprisingly, Hafnium diselenide and zirconium diselenide are in the same optimal range of band gap as silicon.

All this and the diselenides can also be used to make circuits which are just three atoms thick, or about two-thirds of a nanometer, something silicon can never do. Eric Pop, an associate professor of electrical engineering, who co-authored with post-doctoral scholar Michal Mleczko in a study paper, said,

Engineers have been unable to make silicon transistors thinner than about five nanometers, before the material properties begin to change in undesirable ways.

If these semiconductors can be integrated with silicon, much longer battery life and much more complex functionality can be achieved in consumer electronics. The combination of thinner circuits and desirable high-K insulation means that these ultrathin semiconductors could be made into transistors 10 times tinier than anything possible with silicon today. As Eric Pop said,

There’s more research to do, but a new path to thinner, smaller circuits – and more energy-efficient electronics – is within reach.

Imec, the world-leading research and innovation hub in nano-electronics and digital technology, announced last month its prototype implantable chip that aims to give patients more intuitive control over their arm prosthetics. The thin-silicon chip is said to be world’s first for electrode density. Creating a closed-loop system for future-generation haptic prosthetics technology is the aim of researchers.

What is special about this chip?

The already available prosthestics are efficient and have their own key features; like giving amputees the ability to move their artificial arm and hand to grasp and manipulate objects. This is done by reading out signals from the person’s muscles or peripheral nerves to control electromotors in the prosthesis. Good news is that revolutionary features are coming! The future prosthetics will provide amputees with rich sensory content. This can be done by delivering precise electrical patterns to the person’s peripheral nerves using implanted electrode interfaces.

The goal behind working on this new technique is to create a new peripheral nerve interfaces with greater channel count, electrode density, and information stability according to Rizwan Bashirullah, director of the University of Florida’s IMPRESS program (Implantable Multimodal Peripheral Recording and Stimulation System)

Fabricated amazingly in a small scale!

A prototype of ultrathin (35µm) chip with a biocompatible, hermetic and flexible packaging is now available. On its surface are 64 electrodes, with a possible extension to 128. This large amount of electrodes is used for fine-grained stimulation and recording. As the short video shows, the researchers will insert the package and attach it to a nerve bundle using an attached needle which will give better results compared to other solutions usually wrapped around nerve bundles.

“Our expertise in silicon neuro-interfaces made imec a natural fit for this project, where we have reached an important milestone for future-generation haptic prosthetics,” commented Dries Braeken, R&D manager and project manager of IMPRESS at imec. “These interfaces allow a much higher density of electrodes and greater flexibility in recording and stimulating than any other technology. With the completion of this prototype and the first phase of the project, we look forward to the next phase where we will make the prototype ready for long-term implanted testing.”

The Defense Advanced Research Projects Agency’s (DARPA) Biological Technologies Office sponserd this work of University of Florida researchers under the auspices of Dr. Doug Weber through the Space and Naval Warfare Systems Center. For more details about this topic check this article.

Today’s market requirements change faster than the typical development time for a new device or the ability of designers of SoCs to know. To solve this problem, FPGAs/MCUs are used so developers can change the configuration/firmware later.

As known, MCU IP is static and you can’t change the silicon design (RTL design) after fabrication. FPGA chips are used to overcome this limitation but the FPGA high cost is a concern compared to the price of the MCUs. From this point a new technology called Embedded FPGA (eFPGA) was invented. This technology can give the flexibility of allowing SoCs to be customized post-production with no high expenses.

The idea behind eFPGA is to embed the FPGA core to SoCs without the other components of typical FPGA chips such as: surrounding ring of GPIO,SERDES, and PHYs. This core can be customized in a post-production stage with no need to change the RTL design and manufacturing the chips again.

Moreover, eFPGA is expected to have a brilliant future and to be adapted widely according to the CEO of Flex Logix Technologies in an article published on Circuit Cellar magazine. That’s because of increasing mask cost: approximately $1 million for 40 nm, $2 million for 28 nm, and $4 million for 16 nm, and the need for constantly changing in standards and protocols besides application of AI and machine learning algorithms.

SiFive, the first fabless provider of customized, open-source-enabled semiconductors, had recently announced the availability of its Freedom Everywhere 310 (FE310) system on a chip (SoC), the industry’s first commercially available SoC based on the free and open RISC-V instruction set architecture.

The Freedom E310 (FE310) is the first member of the Freedom Everywhere family of customizable SoCs. Designed for microcontroller, embedded, IoT, and wearable applications, the FE310 features SiFive’s E31 CPU Coreplex, a high-performance, 32-bit RV32IMAC core. Running at 320+ MHz, the FE310 is among the fastest microcontrollers in the market. Additional features include a 16KB L1 Instruction Cache, a 16KB Data SRAM scratchpad, hardware multiply/divide, a debug module, flexible clock generation with on-chip oscillators and PLLs, and a wide variety of peripherals including UARTs, QSPI, PWMs, and timers. Multiple power domains and a low-power standby mode ensure a wide variety of applications can benefit from the FE310.

Furthermore, SiFive launched an open source low-cost HiFive1 software development board based on FE310. As part of this availability, SiFive also has contributed the register-transfer level (RTL) code for FE310 to the open-source community.

The Arduino compatible HiFive1 was live on a crowdfunding campaign on Crowdsupply and the board reached around $57,000 funding. Check this video to know more about HiFive1:

SiFive is now fulfilling a dream of a lot of developers: a custom silicon designed just for you! With the RTL code open, chip designers are now able to customize their own SoC on top of the base FE310 by accessing the open source files provided on Github. But don’t worry, even if you don’t have the expertise needed to develop your own core, SiFive is offering a new service called “ chips-as-a-service” that can customize the FE310 to meet your unique needs. All you need is to register here dev.sifive.com, try out your ideas and finally contact the company to finalize the design of your new chip.

This service has completely a new business model for silicon chips businesses, and SiFive is willing to establish a “chip design factory” that can handle 1000 new chip designs a year. It is said that SiFive can start manufacturing the cusomized MCUs in less than 6 months after making sure that each use case is compatible with the Freedom E310 core.

“We started with this revolutionary concept — that instruction sets should be free and open – and were amazed by the incredible rippling effect this has had on the semiconductor industry because it provided a viable alternative to what was previously closed and proprietary,” said Krste Asanovic, co-founder and chief architect, SiFive. “In the few short months since we’ve announced the Freedom Platforms, we’ve seen a tremendous response to our vision of customizable SoCs. The FE310 is a major step forward in the movement toward open-source and mass customization, and SiFive is excited to bring the opportunity for innovation back into the hands of system architects.”

Opening the source of processors’ core has its pros and cons for SiFive. A new business model is assigned to SiFive due to the “chips-as-a-service” feature but in the same time it will open up some new ventures for smaller companies and hardware manufacturers to compete with the market dominating companies. Open source MCUs will bring a lot of updates to the hardware development scene and will pave the way for a whole new business of customized chip design provided by talented hardware system developers and architects.

To know more about the custom design feature visit the developers section of SiFive dev.sifive.com. Documentation of the SiFive new chip is available here and also source codes and files of the RTL code are provided at Github.

Silicon technology has made tremendous progress towards ever higher device cut-off frequencies. Nowadays all RF components for mm-Wave sensing applications up to 120 GHz can be realized.Silicon Radar is a german company that designs and delivers Millimetre Wave Integrated Circuits (MMICs) on a technologically advanced level, manufactured in affordable Silicon-Germanium-Technology (SiGe). It has just introduced new development kits using GHz CMOS radar MMICs, which are built using SiGe or SiGe:C from IHP.

“We offer high frequency circuits for radar solutions, phased-array-systems and wireless communications, for both custom specific ASIC design and supply of standard circuits in frequency range from 10GHz X-band up to 200GHz and above,” said the firm.

A research team led by faculty scientist Ali Javey at Berkeley Lab have debuted the smallest transistor ever reported. A gate structure of just 1 nm long can bring Moore’s law back again after the demonstration of the recent Silicon (Si) transistor with 5 nm gate. It was predicted that transistors will fail below 5 nm gate because of some short channel effects that would change the transistor characteristics, but the new finding is proving that wrong.

Model showing the transistor structure

Because of current leakage that would happen in less than 5-nm Si transistors, the exploration of new channel materials that have more ideal properties than Si should begin. The researchers used carbon nanotubes and molybdenum disulfide (MoS2), an engine lubricant commonly sold in auto parts shops. MoS2 is part of a family of materials with immense potential for applications in LEDs, lasers, nanoscale transistors, solar cells, and more. Fortunately, MoS2 electronics properties as thin layers will limit leakage that happen in Si alternatives.

While the researchers started using MoS2 as the semiconductor material, they recognized the hardship of constructing the gate using it.Thus, they turned to carbon nanotubes, hollow cylindrical tubes with diameters as small as 1 nanometer. This structure made it easier to control the flow of electrons effectively.

This project is just a proof of concept and researchers have not yet found a way to mass-produce it or integrate it in chips. They could break the myth of the Si transistor 5-nm gate limit and they paved the way for future researchers to demonstrate a new device architecture.

With such a small scale it will be an unexpected future of tiny devices that use lots of transistors, since all the technology we use nowadays are made of transistors with minimum 7nm geometry.

A group of researchers from the Cardiff University has demonstrated the first practical laser that has been grown directly on a silicon substrate. by Graham Prophet:

The lasing structure was formed in indium arsenide/gallium arsenide layers grown directly on a silicon substrate; the research group notes that previous work has involved wafer bonding techniques to merge electrical and optical (lasing) structures.

Lasers built on silicon are a step towards fully integrated photonics – [Link]

PORTLAND, Ore.—Today Yole Development predicted that power transistors would radically shift from silicon wafers to silicon carbide (SiC) and gallium nitride (GaN) substrates—to achieve higher power in smaller spaces, according to its GaN and SiC Devices for Power Electronics Applications report.

One of the big drivers behind the shift is the electric vehicle (EV) and hybrid electric vehicle (HEV) industries, which Yole predicts will be majorly pushing the SiC technology to minimize the size of the power electronics using them.

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