The following reply was made to PR bin/46978; it has been noted by GNATS.
From: "Joerg Sonnenberger" <joerg%netbsd.org@localhost>
To: gnats-bugs%gnats.NetBSD.org@localhost
Cc:
Subject: PR/46978 CVS commit: src/external/gpl3/gcc/dist/gcc/config/i386
Date: Sat, 6 Oct 2012 14:10:46 +0000
Module Name: src
Committed By: joerg
Date: Sat Oct 6 14:10:46 UTC 2012
Modified Files:
src/external/gpl3/gcc/dist/gcc/config/i386: i386.h
Log Message:
PR 46978: ICE on spilling MMX registers
GCC/i386 has code to lower the required alignment for long long to 32bit
as the CPU doesn't need more. It is also using the same mode for setting
up the MMX registers and in turn, the stack slots reserved for spilling
require 32bit alignment. The actual vector types used keep the original
64bit alignment, so when the compiler wants to spill a MMX register, it
hits an assertion. Fix this by using the vector type as raw type for MMX
registers.
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.2 -r1.2 \
src/external/gpl3/gcc/dist/gcc/config/i386/i386.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.