tag: electrochemical deposition

Packaging houses continue to ramp up fan-out wafer-level packages in the market, but customers want lower cost fan-out products for a broader range of applications, such as consumer, RF and smartphones.
So in R&D, the industry for some time has been developing next-generation fan-out using a panel-level format, a technology that could potentially lower the cost of fan-out. But there are ... » read more

The electrochemical deposition (ECD) equipment market for IC packaging is heating up as 2.5D, 3D and fan-out technologies begin to ramp.
[getentity id="22817" e_name="Applied Materials"] recently rolled out an ECD system for IC packaging. In addition, Lam Research, TEL and others compete in the growing but competitive ECD equipment market for packaging.
ECD—sometimes referred to as pl... » read more

Through-silicon vias (TSVs) for 3D integration are superficially similar to damascene copper interconnects for integrated circuits. Both etch the via, into either silicon or a dielectric, line it with a barrier against copper diffusion, then deposit a seed layer prior to filling the via with copper using some form of aqueous deposition. In both processes, the integrity of the diffusion barrier ... » read more