In-System Programmable High Density PLD

The ISPLSI3448 is a High-Density Programmable Logic
Device containing 672 Registers 224 Universal I/Os, five
Dedicated Clock Inputs, 14 Output Routing Pools (ORP)
and a Global Routing Pool (GRP) which allows complete
inter-connectivity between all of these elements. The
ISPLSI3448 features 5V in-system programmability and
in-system diagnostic capabilities. The ISPLSI3448 offers
non-volatile reprogrammability of the Logic as well as the
interconnect to provide truly reconfigurable systems.
The basic unit of Logic on the ISPLSI3448 device is the
Twin Generic Logic Block (Twin GLB) labelled A0, A1...N3.
There are a total of 56 of these Twin GLBs in the ISPLSI3448 device. Each Twin GLB has 24 inputs, a program-
mable AND array and two OR/Exclusive-OR Arrays, and
eight outputs which CAN be configured to be either com-
binatorial or registered. All Twin GLB inputs come from
the GRP. By Lattice Semiconductor Corp.