On Thursday 26 November 2009 07:12:59 pm Sergei Shtylyov wrote:> Bartlomiej Zolnierkiewicz wrote:> > >>>>>MWDMA0 timings cannot be met with the PIIX based controller> >>>>>programming interface.> >>>> >>>>>This change should be safe as this is how we have been doing> >>>>>things in IDE it8213 host driver for years.> >>>> >>>>>Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>> >>>>>---> >>>>>Verified with the documentation (similar case as with pata_efar).> > >>>>Uhhh, no...> > >>>>Too many damn drivers.> > >>>>Too much damn duplication.> > >>>>Too much damn subtle differences here and there.> > >>>>The hardware is probably fine for MWMDA0 when it comes to pata_{efar,it8213},> >>>>it just not documented properly in the data sheet.> > >>> How so with pata_efar? The active/recovery bitfields are still 2-bit > >>>wide, no?> > >>Yes but when TIMEx bit is disabled we are using XFER_PIO_SLOW timings.> > 600 ns cycle vs spec'ed 480 ns? Is it really worth it?

960 ns actually

> >>All data sheets including original Intel ones are a complete crap when it> >>comes to explicitly documenting this behavior.> > > OTOH all drivers set TIMEx for MWDMA0 currently.. ?> > ... which would give a grossly overclocked timing.