Comments

DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache
enabled by default. So we have to take care and flush/invalidate the
cache before/after the DMA operations.
Please note that the receive buffer alignment to 32 byte boundary comes
from the old driver version I don't know if it is really needed or
alignment to cache line size is enough.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
---
drivers/net/davinci_emac.c | 41 +++++++++++++++++++++++++++++++++++++++--
drivers/net/davinci_emac.h | 5 +++--
2 files changed, 42 insertions(+), 4 deletions(-)

On Thu, Nov 10, 2011 at 6:39 PM, Ilya Yanok <yanok@emcraft.com> wrote:
> DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache> enabled by default. So we have to take care and flush/invalidate the> cache before/after the DMA operations.>> Please note that the receive buffer alignment to 32 byte boundary comes> from the old driver version I don't know if it is really needed or> alignment to cache line size is enough.>> Signed-off-by: Ilya Yanok <yanok@emcraft.com>
I don't understand. Didn't you just submit a patch to disable dcache
on all boards with EMAC?

Hi Andy,
On 12.11.2011 02:11, Andy Fleming wrote:
>> DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache>> enabled by default. So we have to take care and flush/invalidate the>> cache before/after the DMA operations.>>>> Please note that the receive buffer alignment to 32 byte boundary comes>> from the old driver version I don't know if it is really needed or>> alignment to cache line size is enough.>>>> Signed-off-by: Ilya Yanok <yanok@emcraft.com>>> I don't understand. Didn't you just submit a patch to disable dcache> on all boards with EMAC?
Yes, on all arm926ejs boards. Look, arm926ejs has no implementation for
{flush,invalidate}_dcache_range and I really have no time now to
implement them. So I've just added no-op cache operations for
CONFIG_SYS_DCACHE_OFF case to fix the compilation of DaVinci board.
But it turned out that the builds are still broken because some DaVinci
boards using EMAC do not disable D-Cache.
Regards, Ilya.