To fully comply with the personal computer industrial standard, W9825G6EH is sortedinto the following speed grades: -6/-6C and -75. The - 6 is compliant to the 166MHz/CL3 or133MHz/CL2 specification.

The – 6C is compliant to the 166MHz/CL3 specification. The -75 iscompliant to the 133MHz/CL3 specification.Accesses to the SDRAM are burst oriented.

Consecutive memory location in one page can beaccessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE
command.

Column addresses are automatically generated by the SDRAM internal counter in burstoperation. Random column read is also possible by providing its address at each clock cycle.

Themultiple bank nature enables interleaving among internal banks to hide the precharging time.By having a programmable Mode Register, the system can change burst length, latency cycle,interleave or sequential burst to maximize its performance.