Method for Expanding Monocytes - The invention relates to an ex vivo method for expanding monocytes, macrophages or dendritic cells, which method comprises inhibiting the expression or the activity of MafB and c-Maf in monocytes, macrophages or dendritic cells; and expanding the cells in the presence of at least one cytokine or an agonist of cytokine receptor signaling.

2012-05-17

20120122208

Tubular Bioreactor System for Use in Bone and Cartilage Tissue Engineering - A bioreactor system includes a growth chamber having an inlet, an outlet, and defining a cavity, a media reservoir is in fluid communication with the inlet, and a pump configured to perfuse a media from the reservoir into the inlet and through the growth chamber. A plurality of discrete scaffold members is packed within the growth cavity. Spaces between adjacent scaffold members define pores. The media is movable around the scaffold members and through the pores via the pump.

2012-05-17

20120122209

Undifferentiated Stem Cell Culture Systems - The present disclosure provides methods for maintaining and propagating undifferentiated pluripotent stem cells (SC) in suspension. The methods comprise culturing such SC in a non-adherent culture dish under conditions comprising a basic serum free medium and one or more of a basic medium, a serum replacement, an extra cellular matrix component and a factor supporting expansion of said SC. A specific and preferred culture condition comprise supplementing Neurobasal™ medium with KO serum replacement (KOSR). These conditions allowed for large scale and long term propagation of undifferentiated pluripotent SC. The culture system comprising suspended undifferentiated pluripotent SC were found to have many applications including in methods for directed as well as spontaneous differentiation of the SC into somatic cells. Also disclosed herein is a method of deriving SC, preferably human embryonic SC from human embryos via the formation of cell clusters.

2012-05-17

20120122210

CARRIER PEPTIDE FRAGMENT AND USE THEREOF - A method for transferring a foreign substance includes the steps of: preparing a construct for transferring a foreign substance that contains a carrier peptide fragment including either the amino acid sequence KKRTLRKNDRKKR (SEQ ID NO. 1) or an amino acid sequence formed by the substitution, deletion, and/or addition (insertion) of 1, 2, or 3 amino acid residues in the amino acid sequence, and a foreign substance of interest that is bonded to the N-terminus and/or C-terminus of the carrier peptide fragment; supplying the construct for transferring a foreign substance to a test sample that contains a target eukaryotic cell; and incubating the test sample that has been supplied with the construct for transferring a foreign substance to thereby transfer the construct into the eukaryotic cell in the test sample.

2012-05-17

20120122211

GENERATION OF NEURAL STEM CELLS FROM UNDIFFERENTIATED HUMAN EMBRYONIC STEM CELLS - The present invention relates to the generation of neural cells from undifferentiated human embryonic stem cells. In particular it relates to directing the differentiation of human ES cells into neural progenitors and neural cells and the production of functioning neural cells and/or neural cells of a specific type. The invention also includes the use of these cells for the treatment of neurological conditions such as Parkinson's disease.

METHOD FOR CULTURING STEM CELLS - In the field of biological technology, a stem cell culture method is provided. The method includes preparing an amniotic epithelial cell feeder layer that is not treated to lose the division ability; and seeding the stem cells onto the amniotic epithelial cell feeder layer, and culturing in a culture medium. The stem cell culture method according to the present invention does not require the treatment of the feeder layer cells to lose the division ability, and is thus simple and safe, thereby effectively solving the problem of contamination caused by animal-derived ingredients in culture of human stem cells at present, greatly reducing the culture cost of the stem cells, and providing a safe, effective, and inexpensive stem cell culture method for the industrialization of the stem cells in the future.

2012-05-17

20120122214

METHOD FOR PRODUCING CELL MEDICINE - It is an object of the present invention to provide a method for producing a cell medicine that is effective for diseases while causing a low risk to these diseases. The present invention provides a method for producing a phagocyte that expresses a foreign protein, which comprises: a step of introducing a protein expression vector into an induced pluripotent stem cell; and a step of inducing the induced pluripotent stem cell, into which the protein expression vector has been introduced, to differentiate into a phagocyte.

2012-05-17

20120122215

PLACENTAL STEM CELL POPULATIONS - The present invention provides placental stem cells and placental stem cell populations, and methods of culturing, proliferating and expanding the same. The invention also provides methods of differentiating the placental stem cells. The invention further provides methods of using the placental stem cells in assays and for transplanting.

2012-05-17

20120122216

OLIGOMERIC COMPOUNDS AND COMPOSITIONS FOR USE IN MODULATION OF SMALL NON-CODING RNAS - Compounds, compositions and methods are provided for modulating the expression and function of small non-coding RNAs. The compositions comprise oligomeric compounds, targeted to small non-coding RNAs. Methods of using these compounds for modulation of small non-coding RNAs as well as downstream targets of these RNAs and for diagnosis and treatment of disease associated with small non-coding RNAs are also provided.

2012-05-17

20120122217

METHODS AND COMPOSITIONS FOR REDUCING TARGET GENE EXPRESSION USING COCKTAILS OF siRNAS OR CONSTRUCTS EXPRESSING siRNAS - The present invention concerns methods and compositions involving the production or generation of siRNA mixtures or pools capable of triggering RNA-mediated interference (RNAi) in a cell. Compositions of the invention include kits that include reagents for producing or generating siRNA pools. The present invention further concerns methods using polypeptides with RNase III activity for generating siRNA mixtures or pools that effect RNAi, including the generation of a number of RNA molecules to the same target gene.

2012-05-17

20120122218

Harnessing Cell Dynamics to Engineer Materials - The invention features synthetic materials and methods for inducing cell behavior. Matrix materials induce cell differentiation and cell manipulation based on mechanical and physical characteristics of the materials rather than chemical characteristics.

2012-05-17

20120122219

POROUS COMPOSITE BIOMATERIALS AND PRODUCTION METHOD OF THE SAME - The invention discloses a porous composite biomaterial comprising of poly(γ-glutamic acid)-g-chondroitin sulfate (γ-PGA-g-CS) copolymer and poly(ε-caprolactone). The composite biomaterial provides a three-dimensional microenviroment for using as a scaffold for tissue engineering and for supporting the attachment and proliferation of cells. The invention also discloses a method of producing a porous composite biomaterial.

2012-05-17

20120122220

METHOD AND APPARATUS FOR MAINTENANCE AND EXPANSION OF HEMOPOIETIC STEM CELLS AND/OR PROGENITOR CELLS - A method of preparing a stromal cell conditioned medium useful in expanding undifferentiated hemopoietic stem cells to increase the number of the hemopoietic stem cells is provided. The method comprising: (a) establishing a stromal cell culture in a stationary phase plug-flow bioreactor under continuous flow on a substrate in the form of a sheet, the substrate including a non-woven fibrous matrix forming a physiologically acceptable three-dimensional network of fibers, thereby expanding undifferentiated hemopoietic stem cells ; and (b) when a desired stromal cell density has been achieved, collecting medium from the stationary phase plug-flow bioreactor, thereby obtaining the stromal cell conditioned medium useful in expanding the undifferentiated hemopoietic stem cells.

2012-05-17

20120122221

CULTURE MEDIUM AND HYDROPHILIC COMPOSITE THEREOF - A hydrophilic composite includes a carbon nanotube structure and a protein layer. The carbon nanotube structure has at least one carbon nanotube film. The protein layer covers one surface of the carbon nanotube structure, and is coupled to the at least one carbon nanotube film. The carbon nanotube structure is disposed on a substrate.

MUTATED PROTOPORPHYRINOGEN IX OXIDASE (PPX) GENES - Provided are compositions and methods relating to gene and/or protein mutations in transgenic or non-transgenic plants. In certain embodiments, the disclosure relates to mutations in the protoporphyrinogen IX (PPX) gene. In some embodiments the disclosure relates to plants that are herbicide resistant.

CARRIER PEPTIDE FRAGMENT AND USE THEREOF - The method for transferring a foreign substance provided by the present invention includes the steps of: preparing a construct for transferring a foreign substance that contains a carrier peptide fragment including either the amino acid sequence WRRQARFK (SEQ ID NO. 1) or any amino acid sequence formed by the substitution, deletion, and/or addition (insertion) of 1, 2, or 3 amino acid residues in the amino acid sequence, and a foreign substance of interest that is bonded to the N-terminus and/or C-terminus of the carrier peptide fragment; supplying the construct for transferring a foreign substance to a test sample that contains a target eukaryotic cell; and incubating the test sample that has been supplied with the construct for transferring a foreign substance to thereby transfer the construct into the eukaryotic cell in the test sample.

2012-05-17

20120122226

Apparatus and Method for Indicating Biological Content within a Container - An apparatus for indicating biological content within a container is provided. The apparatus includes a medical sterilization container having a cover removably attached to the medical sterilization container. An enclosable, sterilizable interior compartment is formed by the medical sterilization container and the cover, wherein the interior compartment is sized to house at least one medical instrument. A biological indicator is located at least partially in communication with the interior compartment, wherein the biological indicator provides at least one indication of biological content within the interior compartment after the medical sterilization container and cover are subjected to a sterilization process.

2012-05-17

20120122227

GUIDED STRUCTURED TESTING KIT - A guided structured testing kit comprising a test strip container, a test strip meter, a testing protocol advisor, and at least one of diagnostic test strip is presented. The diagnostic test strip comprising a support element, a glucose reagent provided on the support element, and a glycemic context code provided on the support element. The glycemic context code can be machine-readable. The glycemic context code signals a glycemic context to a test strip meter, either upon insertion of the diagnostic test strip or by a user manually inputting the glycemic context into the test strip meter. A method for performing a guided structured test is also provided.

2012-05-17

20120122228

Compositions And Methods For The Detection Of Chemical Warfare Agents - Compositions for detection of chemical warfare agents that comprise oximate anion reactive sites and fluorophore cores. Methods for detecting a chemical warfare agents that comprise providing a detector molecule comprising an oximate anion reactive site and a fluorophore core and detecting fluorescence from the detector molecule. Methods for enhancing the reactivity of an oximate nucleophile that comprise introducing an oxime into an aprotic solvent and deprotonating the oxime to form the oximate nucleophile with a base that creates noncoordinating anions.

2012-05-17

20120122229

METHODS OF ASSAYING FOR TETRAHYDROCANNABINOL - The invention provides a method of assaying for tetrahydrocannabinol in a body fluid, said method comprising contacting a sample of body fluid with an imine capable of reacting with tetrahydrocannabinol to yield a quinone imine, and detecting the formation of a quinone imine, characterised in that said sample is contacted with said reagent compound at a pH of at least 10.5.

2012-05-17

20120122230

METHODS FOR IDENTIFYING HIGH FOULING HYDROCARBON AND FOR MITIGATING FOULING OF PROCESS EQUIPMENT - Methods for determining the fouling propensity of a hydrocarbon stream and for reducing fouling are provided. In one method, the fouling propensity of a hydrocarbon stream is determined by obtaining a parameter value indicative of the fouling propensity at no less than two different temperatures, and an activation energy of fouling by the hydrocarbon stream is derived therefrom. In another method, the thus obtained parameter value at no less than two different temperatures and the activation energy are used to select proper heating fluids and operating temperature and to determine whether to add an antifoulant to the hydrocarbon stream to reduce fouling at a given temperature.

2012-05-17

20120122231

SPECIMEN TESTING DEVICE AND METHOD THEREOF - The present invention relates to a specimen testing device and method thereof, and it is an object of the present invention to provide a compact and reliable specimen testing device and method thereof. The specimen testing device includes one, two or more test cartridge containers which comprise a plurality of accommodation parts which accommodate or can accommodate a specimen and one, two or more reagent solutions or testing tools used for testing the specimen, and which visibly display specimen information for identifying or managing the specimen and test information showing test content; an automatic testing unit which is attached with or supports the testing tools and which causes a reaction of the specimen and the reagent solution accommodated in the test cartridge containers to obtain a predetermined optical state; an optical measurement unit which measures the optical state obtained by the automatic testing unit; and a digital camera which captures an image of content including the specimen information and the test information and displayed on the one, two or more test cartridge containers to obtain image data.

2012-05-17

20120122232

CASSETTE FOR SAMPLE PREPARATION - A cassette for preparing a sample is disclosed herein. The cassette includes a housing, which encloses the structures and the processes used to prepare the sample.

2012-05-17

20120122233

METHOD FOR RISK STRATIFICATION IN STABLE CORONARY ARTERY DISEASE - An in vitro method for the risk stratification of patients with stable arteriosclerosis, especially stable coronary artery disease, is disclosed wherein the concentration of procalcitonin is determined in the circulation of such patients using a highly sensitive PCT assay, and wherein within the range of PCT concentrations in the typical normal range of healthy individuals cutoff values are defined which distinguish groups of individual patients with stable arteriosclerosis in accordance with personal cardiac risk, and patients are allotted to one of said risk groups on the basis of their individual PCT concentrations.

2012-05-17

20120122234

FLUIDIC INDICATOR DEVICE - Disclosed is a fluidic assay device for assaying at least one property of a liquid sample comprising: a liquid sample application region; at least one test flow path in liquid flow communication with the sample application region; a reference flow path in liquid flow communication with the sample application region; and a junction region, at which the test flow path and the reference flow path contact one another, the junction region typically comprising an outlet, conduit, chamber or other portion which permits the onward flow of liquid; wherein a liquid flowing along the reference flow path, upon reaching the junction region, has the effect of preventing the flow of liquid along the test flow path. The invention relates to a fluidic device for the passage of a liquid and an assay device suitable for measurement of the amount and/or presence of an analyte in, or property of, a fluid sample.

2012-05-17

20120122235

Devices and Methods for Detection of Biomolecular Interactions - Devices, systems, and methods are provided for the detection of biomolecular interactions. The interactions between one or more target DNA strands, one or more receptor DNA strands, and one or more probe DNA strands, if necessary, are used to detect the one or more target DNA strands. The one or more target DNA strands or the one or more probe DNA strands may be coupled to a magnetic bead, and the one or more receptor strands may be coupled to the Hall device.

HOMOGENEOUS NONCOMPETITIVE DETECTION OF POST TRANSLATIONAL MODIFICATIONS FOR USE IN HIGH THROUGHPUT ASSAYS - A non-competitive immunoassay method for detection of post-translationally modified (PTM) proteins is disclosed. The method will enable the direct detection of PTM proteins in solution or on solid phase with a single reagent addition step, and with improved selectivity for specific PTM sites on target proteins. The key to the method is the use of a secondary binding molecule that specifically recognizes the immune complex between the primary antibody and the antigen.

2012-05-17

20120122238

VMP-Like Sequences of Pathogenic Borrelia - The present invention relates to DNA sequences encoding Vmp-like polypeptides of pathogenic Borreliae, the use of the DNA sequences in recombinant vectors to express polypeptides, the encoded amino acid sequences, application of the DNA and amino acid sequences to the production of polypeptides as antigens for immunoprophylaxis, immunotherapy, and immunodiagnosis. Also disclosed are the use of the nucleic acid sequences as probes or primers for the detection of organisms causing Lyme disease, relapsing fever, or related disorders, and kits designed to facilitate methods of using the described polypeptides, DNA segments and antibodies.

BIOASSAYS USING PLASMONIC SCATTERING FROM NOBLE METAL NANOSTRUCTURES - The present invention relates to detecting and/or measuring scattering effects due to the aggregating metallic nanostructures or the interaction of plasmonic emissions from approaching metallic nanoparticles. The scattering effects may be measured at different angles, different wavelengths, changes in absorption and/or changes in polarization relative to changes in the distances between nanoparticles.

MEANS AND METHOD AND MEANS FOR DIAGNOSING PROSTATE CARCINOMAS - The present invention relates to a method, preferably an ex vivo method, for diagnosing prostate carcinomas and/or predisposition thereof comprising determining at least one metabolite in a test sample of a subject suspected to suffer from prostate carcinomas or to have a predisposition therefor and comparing said at least one metabolite to a reference, whereby prostate carcinomas or a predisposition therefor is to be diagnosed. Moreover, the present invention encompasses a collection of metabolites, a data collection comprising characteristic values of metabolites and a storage medium comprising said data collection. Furthermore, the present invention also relates to a system comprising means for comparing characteristic values of metabolites of a sample operatively linked to a data storage medium. Further encompassed by the present invention are diagnostic means comprising at least one metabolite and the use of said at least one metabolite for the manufacture of diagnostic means for or for diagnosing prostate carcinomas. Finally, the present invention pertains to a method for identifying prostate carcinoma-related metabolites.

2012-05-17

20120122244

Method Of Identifying Compounds That Inhibit Fertilization - A method of identifying compounds that inhibit fertilization is provided. The method can include selecting compounds that bind to equatorin protein. Two types of equatorin protein, a long form and a short form, can be present in the testis. The amino acid sequence of mouse equatorin from positions 101 to 146 including the 138th O-glycosylated threonine residue contains an epitope recognized by anti-equatorin antibody MN9 that has an effect of inhibiting fertilization. In addition, the MN9 antibody also binds to human sperm. Compounds that bind to the epitope can inhibit fertilization. Both forms of mouse equatorin can be used as well as human equatorin to identify compounds that inhibit fertilization.

2012-05-17

20120122245

ALLOYED METAL COLLOID - Provided is a metal colloid having higher visibility and higher sensitivity than a gold colloid and a Au-core Pt-shell composite colloid and suitable as a labeling agent for use in a test such as an immunoassay. An alloyed Au/Pt composite colloid formed by mixing a gold salt and a platinum salt with at least one reducing agent selected from the group consisting of an amino acid and a derivative thereof, an oligopeptide and a derivative thereof, and an amino sugar in the presence of an alkali, thereby reducing the gold salt and platinum salt.

2012-05-17

20120122246

METHOD FOR MANUFACTURING MAGNETIC MEMORY CHIP DEVICE - A method for manufacturing a magnetic memory chip device comprises the steps of: writing information in each of a plurality of magnetic memory chips formed on a silicon wafer; adhering a high magnetic permeability plate on a back face of the silicon wafer after writing information, the high magnetic permeability plate having a higher magnetic permeability than silicon and having a thickness of 50 um or more; dicing the silicon wafer into respective magnetic memory chips after adhering the high magnetic permeability plate.

2012-05-17

20120122247

ELECTRONIC DEVICE INCLUDING A MAGNETO-RESISTIVE MEMORY DEVICE AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE - A process of forming an electronic device can include forming a stack including a tunnel barrier layer. The tunnel barrier layer can have a ratio of the metal atoms to oxygen atoms of greater than a stoichiometric ratio, wherein the ratio has a particular value. The process can also include forming a gettering layer having a composition capable of gettering oxygen, and depositing an insulating layer over the gettering layer. The process can further include exposing the insulating layer to a temperature of at least approximately 60° C. In one embodiment, after such exposure, a portion of the gettering layer is converted to an insulating material. In another embodiment, an electronic device can include a magnetic tunnel junction and an adjacent insulating layer lying within an opening in another insulating layer.

2012-05-17

20120122248

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, there is provided a method of manufacturing a semiconductor device having a buffer circuit. In the method, a plurality of semiconductor elements is formed on a semiconductor substrate. The plurality of semiconductor elements are connected in parallel to each other in the buffer circuit. In the method, driving forces of the formed semiconductor elements is evaluated. In the method, one mask is selected from a plurality of masks based on the evaluating. The plurality of masks are formed in advance to have different wiring mask patterns to cause the numbers of semiconductor elements connected in parallel with each other among the plurality of semiconductor elements of the buffer circuit to be different from each other. In the method, a wiring pattern corresponding to the wiring mask pattern is formed by using the selected one mask.

2012-05-17

20120122249

DOPANT MARKER FOR PRECISE RECESS CONTROL - A semiconductor device is formed by implanting recess markers in a material during deposition and using the recess markers during etching of the material for precise in-situ removal rate definition and removal homogeneity-over-radius definition. An embodiment includes depositing a layer of material on a substrate, implanting first and second dopants in the material at first and second predetermined times during deposition of the material, etching the material, detecting the depths of the first and second dopants during etching, calculating the removal rate of the material in situ from the depths of the first and second dopants, and determining from the removal rate a stop position for etching. Embodiments further include depositing a layer of material on a substrate, laterally implanting a first dopant and a second dopant in the material at a predetermined depth during deposition of the material, etching the material, detecting the positions and intensities of the first and second dopants during etching, and calculating lateral homogeneity of the material in situ from the intensities of the first and second dopants. Embodiments further include in situ corrective action for the removal process based on the determined removal rate and lateral homogeneity.

2012-05-17

20120122250

APPARATUS AND METHOD FOR MANUFACTURING LED PACKAGE - An apparatus for manufacturing an light emitting diode (LED) package, includes: a heating unit heating an LED package array in a lead frame state in which a plurality of LED packages are installed to be set in an array on a lead frame; a testing unit testing an operational state of each of the LED packages in the LED package array by applying a voltage or a current to the LED package array heated by the heating unit; and a cutting unit cutting only an LED package determined to be a functional product or an LED package determined to be a defective product from the lead frame to remove the same according to the testing results of the testing unit.

2012-05-17

20120122251

STACKED TYPE SEMICONDUCTOR MEMORY DEVICE AND CHIP SELECTION CIRCUIT - A stacked type semiconductor memory device of having a structure in which a plurality of semiconductor chips is stacked and a desired semiconductor chip can be selected by assigning a plurality of chip identification numbers different from each other are individually assigned to the plurality of semiconductor chips comprising: a plurality of operation circuits which is connected in cascade in a stacking order of the plurality of semiconductor chips and outputs the plurality of identification numbers different from each other by performing a predetermined operation; and a plurality of comparison circuits which detects whether or not each the identification number and a chip selection address commonly connected to each the semiconductor chip are equal to each other by comparing them.

2012-05-17

20120122252

METHOD FOR INSPECTING SUBSTRATE, SUBSTRATE INSPECTION APPARATUS, EXPOSURE SYSTEM, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - There is provided a method for inspecting a substrate including: irradiating an illumination light onto a first surface or a second surface opposite to the first surface, of a substrate in which a pattern having a periodicity and extending from the first surface to an inside of the substrate is formed in the first surface, the illumination light having a permeability to permeate the substrate to a predetermined depth; detecting a light reflected from or transmitted through the substrate due to irradiation of the illumination light; and inspecting the substrate by utilizing information based on the periodicity of the pattern obtained from detection of the light reflected from or transmitted through the substrate.

2012-05-17

20120122253

APPARATUS AND METHOD OF ALIGNING AND POSITIONING A COLD SUBSTRATE ON A HOT SURFACE - Embodiments of the invention contemplate a method, apparatus and system that are used to support and position a substrate on a surface that is at a different temperature than the initial, or incoming, substrate temperature. Embodiments of the invention may also include a method of controlling the transfer of heat between a substrate and substrate support positioned in a processing chamber. The apparatus and methods described herein generally may also provide an inexpensive and simple way of accurately positioning a substrate on a substrate support that is positioned in a semiconductor processing chamber. Substrate processing chambers that can benefit from the various embodiments described herein include, but are not limited to RTP, CVD, PVD, ALD, plasma etching, and/or laser annealing chambers.

2012-05-17

20120122254

WHITE LIGHT-EMITTING DIODE PACKAGE STRUCTURE FOR SIMPLIFYING PACKAGE PROCESS AND METHOD FOR MAKING THE SAME - A white light-emitting diode package structure for simplifying package process includes a substrate unit, a light-emitting unit, a phosphor unit and a conductive unit. The light-emitting unit is disposed on the substrate, and the light-emitting unit has a positive conductive layer and a negative conductive layer. The phosphor unit has a phosphor layer formed on the light-emitting unit and at least two openings for respectively exposing one partial surface of the positive electrode layer and one partial surface of the negative electrode layer. The conductive unit has at least two conductive wires respectively passing through the two openings in order to electrically connect the positive electrode layer with the substrate unit and electrically connect the negative electrode layer with the substrate unit.

2012-05-17

20120122255

WHITE LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - Provided is a white LED including a reflector cup; an LED chip mounted on the bottom surface of the reflector cup; transparent resin surrounding the LED chip; a phosphor layer formed on the transparent resin; and a light transmitting layer that is inserted into the surface of the phosphor layer so as to form an embossing pattern on the surface, the light transmitting layer transmitting light, incident from the phosphor layer, in the upward direction.

2012-05-17

20120122256

METHOD FOR MANUFACTURING LIGHT EMITTING DIODE - A method for manufacturing light emitting diodes includes steps of: providing a base have an upper conductive layer and a lower conductive layer on a top face and a bottom face thereof, respectively; forming a plurality of through holes in the base; defining a plurality of grooves to divide the upper and lower conductive layers into discrete strips; forming a connection layer on an inner circumferential face of each hole to connect the opposite strips of the upper and lower conductive layers; filling a supporting layer in an upper portion of each hole; forming a reinforcing layer on the supporting layer and the upper conductive layer; fixing chips on the reinforcing layer and electrically connecting the chips with the strips of the upper conductive layer; forming an encapsulant on the reinforcing layer; and cutting the base into individual LEDs along the holes.

METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE - One embodiment provides a method for manufacturing a semiconductor light emitting device, including: forming a semiconductor light emitting device wafer, by: forming a plurality of semiconductor layers on a principal surface of a substrate; and forming a P-type semiconductor layer on the semiconductor layers as an uppermost layer; and forming a plurality of surface irregularities on the P-type semiconductor layer, by putting the semiconductor light emitting device wafer into a heat treating furnace; and performing a heat treatment on the semiconductor light emitting device wafer with (i) a mixed gas of hydrogen and ammonia or (ii) a mixed gas of nitrogen and ammonia.

2012-05-17

20120122259

METHOD OF MANUFACTURING MEMS DEVICES PROVIDING AIR GAP CONTROL - Methods and apparatus are provided for controlling a depth of a cavity between two layers of a light modulating device. A method of making a light modulating device includes providing a substrate, forming a sacrificial layer over at least a portion of the substrate, forming a reflective layer over at least a portion of the sacrificial layer, and forming one or more flexure controllers over the substrate, the flexure controllers configured so as to operably support the reflective layer and to form cavities, upon removal of the sacrificial layer, of a depth measurably different than the thickness of the sacrificial layer, wherein the depth is measured perpendicular to the substrate.

2012-05-17

20120122260

ARRAY OF ALPHA PARTICLE SENSORS - An array of radiation sensors or detectors is integrated within a three-dimensional semiconductor IC. The sensor array is located relatively close to the device layer of a circuit (e.g., a microprocessor) to be protected from the adverse effects of the ionizing radiation particles. As such, the location where the radiation particles intersect the device layer can be calculated with coarse precision (e.g., to within

2012-05-17

20120122261

CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE - A method for manufacturing a pixel sensor cell that includes a photosensitive element having a non-laterally disposed charge collection region. The method includes forming a trench recess in a substrate of a first conductivity type material, and filling the trench recess with a material having second conductivity type material. The second conductivity type material is then diffused out of the filled trench material to the substrate region surrounding the trench to form the non-laterally disposed charge collection region. The filled trench material is removed to provide a trench recess, and the trench recess is filled with a material having a first conductivity type material. A surface implant layer is formed at either side of the trench having a first conductivity type material. A collection region of a trench-type photosensitive element is formed of the outdiffused second conductivity type material and is isolated from the substrate surface.

2012-05-17

20120122262

THIN FILM SOLAR CELL MODULE AND METHOD OF MANUFACTURING THE SAME - A thin film solar cell module includes a front substrate; a plurality of thin film solar cells disposed on the front substrate; a rear substrate disposed on the thin film solar cells; a plurality of inter-connection terminals electrically connected to the thin film solar cells, respectively, and exposed to an exterior surface of at least one of the front and rear substrates; and a connector electrically connecting the inter-connection terminals in a series or parallel configuration.

2012-05-17

20120122263

METHOD FOR PRODUCING PHOTOVOLTAIC CELL - The method for producing a photovoltaic cell includes applying, on a partial region of one surface side of a semiconductor substrate, a first n-type diffusion layer forming composition including an n-type impurity-containing glass powder and a dispersion medium; applying, on at least a region other than the partial region on the surface of the semiconductor substrate, a second n-type diffusion layer forming composition which includes an n-type impurity-containing glass powder and a dispersion medium and in which a concentration of the n-type impurity is lower than that of the first n-type diffusion layer forming composition, where the first n-type diffusion layer forming composition is applied; heat-treating the semiconductor substrate on which the first n-type diffusion layer forming composition and the second n-type diffusion layer forming composition are applied to form an n-type diffusion layer; and forming an electrode on the partial region.

2012-05-17

20120122264

METHOD FOR PRODUCING PHOTOVOLTAIC CELL - The method for producing a photovoltaic cell includes applying, on a partial region of one surface side of a semiconductor substrate, a first p-type diffusion layer forming composition including a p-type impurity-containing glass powder and a dispersion medium; applying, on at least a region other than the partial region on the surface of the semiconductor substrate, a second p-type diffusion layer forming composition which includes a p-type impurity-containing glass powder and a dispersion medium and in which a concentration of the p-type impurity is lower than that of the first p-type diffusion layer forming composition, where the first p-type diffusion layer forming composition is applied; heat-treating the semiconductor substrate on which the first p-type diffusion layer forming composition and the second p-type diffusion layer forming composition are applied to form a p-type diffusion layer; and forming an electrode on the partial region.

2012-05-17

20120122265

METHOD FOR PRODUCING PHOTOVOLTAIC CELL - The method for producing a photovoltaic cell includes applying an n-type diffusion layer forming composition including an n-type impurity-containing glass powder and a dispersion medium onto a first region on one surface side of a semiconductor substrate; applying a p-type diffusion layer forming composition including a p-type impurity-containing glass powder and a dispersion medium onto a second region other than the first region on the surface of the semiconductor substrate where the first region is provided; a thermal diffusion process in which an n-type diffusion layer and a p-type diffusion layer are formed by heat-treating the semiconductor substrate onto which the n-type diffusion layer forming composition and the p-type diffusion layer forming composition are applied; and forming an electrode on each of the first region where the n-type diffusion layer is formed and the second region where the p-type diffusion layer is formed, respectively.

2012-05-17

20120122266

POROUS LIFT-OFF LAYER FOR SELECTIVE REMOVAL OF DEPOSITED FILMS - A porous lift off layer facilitates removal of films from surfaces, such as semiconductors. A film is applied over a patterned porous layer, the layer comprising openings typically larger than the film thickness. The porous material and the film are then removed from areas where film is not intended. The porous layer can be provided as a slurry, dried to open porosities, or fugitive particles within a field, which disassociate upon the application of heat or solvent. The film can be removed by etchant that enters through porosities where the film does not bridge the spaces between solid portions, so that the etchant attacks both film surfaces

2012-05-17

20120122267

CONTINUOUS LARGE AREA IMAGING AND DISPLAY ARRAYS USING READOUT ARRAYS FABRICATED IN SILICON-ON-GLASS SUBSTRATES - A vertically-integrated image sensor is proposed with the performance characteristics of single crystal silicon but with the area coverage and cost of arrays fabricated on glass. The image sensor can include a backplane array having readout elements implemented in silicon-on-glass, a frontplane array of photosensitive elements vertically integrated above the backplane, and an interconnect layer disposed between the backplane array and the image sensing array. Since large area silicon-on-glass backplanes are formed by tiling thin single-crystal silicon layers cleaved from a thick silicon wafer side-by-side on large area glass gaps between the tiled silicon backplane would normally result in gaps in the image captured by the array. Therefore, embodiments further propose that the pixel pitch in both horizontal and vertical directions of the frontplane be larger than the pixel pitch of the backplane, with the pixel pitch difference being sufficient that the frontplane bridges the gap between backplane tiles.

2012-05-17

20120122268

SELENIZATION OF PRECURSOR LAYER CONTAINING CULNS2 NANOPARTICLES - A method of fabrication of thin films for photovoltaic or electronic applications is provided. The method includes fabricating a nanocrystal precursor layer and selenizing the nanocrystal precursor layer in a selenium containing atmosphere. The nanocrystal precursor layer includes one of CuInS

ETCHING METHOD FOR USE WITH THIN-FILM PHOTOVOLTAIC PANEL - The present invention relates to a chemical etching method to electrically isolate the edge from the interior of a thin-film photovoltaic panel comprising a substrate and a photovoltaic laminate. The method comprises a step to dispense an etching paste comprising two or more acids on the laminate periphery; an optional step to apply heat to the laminate; and a step to remove the etching paste. The method is further characterized by the chemical removal of at least two chemically distinctive layers of the laminate at the periphery where the etching paste is applied. The method may be used to produce a thin-film photovoltaic panel.

2012-05-17

20120122271

ETCHING METHOD TO INCREASE LIGHT TRANSMISSION IN THIN-FILM PHOTOVOLTAIC PANELS - The present invention relates to a chemical etching method for removing portions of material from the photovoltaic laminate of a thin-film photovoltaic panel. The method involves disposing a pre-determined pattern of an etching paste onto the back electrode of the photovoltaic laminate, and then removing the etching paste after a sufficient dwell time.

2012-05-17

20120122272

HIGH-THROUGHPUT FLAT TOP LASER BEAM PROCESSING FOR BACK CONTACT SOLAR CELLS - Flat top beam laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, back surface field formation, selective doping, and metal ablation. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, that are either planar or textured/three-dimensional. These techniques are highly suited to thin crystalline semiconductor, including thin crystalline silicon films.

ANISOTROPIC SEMICONDUCTOR FILM AND METHOD OF PRODUCTION THEREOF - The present invention relates generally to the field of macro- and microelectronics with the potential for large-scale integration, optics, communications, and computer technology and particularly to the materials for these and other related fields. The present invention provides an anisotropic semiconductor film on a substrate, comprising at least one solid layer of material that comprises predominantly planar graphene-like carbon-based structures and possesses anisotropy of conductivity, and wherein the layer thickness is in a range from approximately 5 nm to 1000 nm.

2012-05-17

20120122275

METHODS OF FABRICATING ORGANIC THIN FILM TRANSISTORS - Disclosed is a method for forming banks during the fabrication of electronic devices incorporating an organic semiconductor material that includes preparing an aqueous coating composition having at least a water-soluble polymer, a UV curing agent and a water-soluble fluorine compound. This coating composition is applied to a substrate, exposed using UV radiation and then developed using an aqueous developing composition to form the bank pattern. Because the coating composition can be developed using an aqueous composition rather than an organic solvent or solvent system, the method tends to preserve the integrity of other organic structures present on the substrate. Further, the incorporation of the fluorine compound in the aqueous solution provides a degree of control over the contact angles exhibited on the surface of the bank pattern and thereby can avoid or reduce subsequent surface treatments.

2012-05-17

20120122276

THERMAL EVAPORATION APPARATUS, USE AND METHOD OF DEPOSITING A MATERIAL - A thermal evaporation apparatus for depositing of a material on a substrate is described. The apparatus can comprise material storage means; heating means to generate a vapour of the material in the material storage means; vapour outlet means comprising a vapour receiving pipe having vapour outlet passages, and emission reducing means arranged such that an external surface of the vapour outlet means directed to said substrate exhibits low emission. Also the use of the apparatus, and a method of depositing a material onto a substrate by thermal evaporation are described.

2012-05-17

20120122277

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE - An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

2012-05-17

20120122278

Method Of Manufacturing Semiconductor Package Board - Disclosed herein is a method of method of manufacturing a semiconductor package board, including: providing a substrate including a connection part formed on one side thereof, the connection part being provided thereon with a solder layer; disposing a conductive heat generator equipped with current wiring on the solder layer; applying current to the current wiring and thus heating the solder layer to attach a semiconductor chip to the connection part; and removing the current wiring from the conductive heat generator. The method is advantageous in that the semiconductor chip is attached to the substrate by applying current to the current wiring of the conductive heat generator to locally heat only the solder layer, thus reducing thermal stress and preventing the deformation of the substrate.

2012-05-17

20120122279

SYSTEM FOR CLAMPING HEAT SINK - A system for clamping a heat sink that prevents excessive clamping force is provided. The system may include a heat sink, a semiconductor device, a printed circuit) board, and a cover. The semiconductor device may be mounted onto the circuit board and attached to the cover. The heat sink may be designed to interface with the semiconductor device to transfer heat away from the semiconductor device and dissipate the heat into the environment. Accordingly, the heat sink may be clamped into a tight mechanical connection with the semiconductor device to minimize thermal resistance between the semiconductor device and the heat sink. To prevent excessive clamping force from damaging the semiconductor device, loading columns may extend between the cover and the heat sink.

2012-05-17

20120122280

ANTIFUSE STRUCTURE FOR IN LINE CIRCUIT MODIFICATION - An antifuse structure and methods of forming contacts within the antifuse structure. The antifuse structure includes a substrate having an overlying metal layer, a dielectric layer formed on an upper surface of the metal layer, and a contact formed of contact material within a contact via etched through the dielectric layer into the metal layer. The contact via includes a metal material at a bottom surface of the contact via and an untreated or partially treated metal precursor on top of the metal material.

2012-05-17

20120122281

METHOD FOR FABRICATING A GaN-BASED THIN FILM TRANSISTOR - A method for fabricating a GaN-based thin film transistor includes: forming a semiconductor epitaxial layer on a substrate, the semiconductor epitaxial layer having a n-type GaN-based semiconductor material; forming an insulating layer on the semiconductor epitaxial layer; forming an ion implanting mask on the insulating layer, the ion implanting mask having an opening to partially expose the insulating layer; ion-implanting a p-type impurity through the opening and the insulating layer to form a p-doped region in the n-type GaN-based semiconductor material, followed by removing the insulating layer and the ion implanting mask; forming a dielectric layer on the semiconductor epitaxial layer; partially removing the dielectric layer; forming source and drain electrodes; and forming a gate electrode.

2012-05-17

20120122282

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES - A method of manufacturing semiconductor devices includes forming a plurality of lines arranged in a direction over a semiconductor substrate, forming mask patterns over the semiconductor substrate wherein the mask patterns intersect the lines, and forming junctions in the semiconductor substrate between the lines by performing an ion implantation process.

2012-05-17

20120122283

METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method includes forming a plurality of dummy gate structures on a substrate, each dummy gate structure including a dummy gate electrode and a dummy gate mask, forming a first insulation layer on the substrate and the dummy gate structures to fill a first space between the dummy gate structures, planarizing upper portions of the first insulation layer and the dummy gate structures, removing the remaining first insulation layer to expose a portion of the substrate, forming an etch stop layer on the remaining dummy gate structures and the exposed portion of the substrate, forming a second insulation layer on the etch stop layer to fill a second space between the dummy gate structures, planarizing upper portions of the second insulation layer and the etch stop layer to expose the dummy gate electrodes, removing the exposed dummy gate electrodes to form trenches, and forming metal gate electrodes in the trenches.

2012-05-17

20120122284

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a plurality of gate structures including a metal on a substrate having an isolation layer, forming first insulating interlayer patterns covering sidewalls of the gate structures, forming first capping layer patterns and a second capping layer pattern on the gate structures and the first insulating interlayer patterns, the first capping layer patterns covering upper faces of the gate structures, and the second capping layer pattern overlapping the isolation layer, partially removing the first insulating interlayer patterns using the first and the second capping layer patterns as etching masks to form first openings that expose portions of the substrate, forming metal silicide patterns on the portions of the substrate exposed in the forming of the first openings, and forming conductive structures on the metal silicide patterns.

2012-05-17

20120122285

MEMORY DEVICE HAVING TRAPEZOIDAL BITLINES AND METHOD FO FABRICATING SAME - A memory device and a method of fabrication are provided. The memory device includes a semiconductor substrate and a charge trapping dielectric stack disposed over the semiconductor substrate. A gate electrode is disposed over the charge trapping dielectric stack, where the gate electrode electrically defines a channel within a portion of the semiconductor substrate. The memory device includes a pair of bitlines, where the bitlines have a lower portion and a substantially trapezoidal shaped upper portion.

2012-05-17

20120122286

METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE - In a method of manufacturing a semiconductor device, a first etching mask and a second etching mask are formed sequentially on a metal gate structure on a substrate and a first insulating interlayer covering a sidewall of the metal gate structure respectively. An opening is formed to expose a top surface of the substrate by removing a portion of the first insulating interlayer not overlapped with the first etching mask or the second etching mask. A metal silicide pattern is formed on the exposed top surface of the substrate. A plug on the metal silicide pattern is formed to fill a remaining portion of the opening. Further, a planarization layer may be used as the second etching mask.

2012-05-17

20120122287

LOCALIZED COMPRESSIVE STRAINED SEMICONDUCTOR - One aspect of the present subject matter relates to a method for forming strained semiconductor film. According to an embodiment of the method, a crystalline semiconductor bridge is formed over a substrate. The bridge has a first portion bonded to the substrate, a second portion bonded to the substrate, and a middle portion between the first and second portions separated from the substrate. The middle portion of the bridge is bonded to the substrate to provide a compressed crystalline semiconductor layer on the substrate. Other aspects are provided herein.

2012-05-17

20120122288

METHOD OF FABRICATING A SILICIDE LAYER - During a salicide process, and before a second thermal treatment is performed to a silicide layer of a semiconductor substrate, a thermal conductive layer is formed to cover the silicide layer. The heat provided by the second thermal treatment can be conducted to the silicide layer uniformly through the thermal conductive layer. The thermal conductive layer can be a CESL layer, TiN, or amorphous carbon. Based on different process requirements, the thermal conductive layer can be removed optionally after the second thermal treatment is finished.

2012-05-17

20120122289

SEMICONDUCTOR DEVICE MANUFACTURING METHOD - Provided is a semiconductor device manufacturing method for a capacitor having a dielectric film which can be formed into a thin film, can be formed at a low temperature, and has a readily controllable property. The manufacturing method includes: forming, on a conductor for serving as one electrode of a capacitor, a manganese oxide film for serving as a dielectric film of the capacitor; and forming, on the manganese oxide film, a conductive film for serving as the other electrode of the capacitor.

2012-05-17

20120122290

SYSTEMS AND METHODS FOR FABRICATING SELF-ALIGNED MEMORY CELL - Systems and methods are disclosed to form a resistive random access memory (RRAM) by forming a first metal electrode layer; depositing an insulator above the metal electrode layer and etching the insulator to expose one or more metal portions; depositing a Pr

2012-05-17

20120122291

Nonvolatile Memory Elements - Nonvolatile memory elements that are based on resistive switching memory element layers are provided. A nonvolatile memory element may have a resistive switching metal oxide layer. The resistive switching metal oxide layer may have one or more layers of oxide. A resistive switching metal oxide may be doped with a dopant that increases its melting temperature and enhances its thermal stability. Layers may be formed to enhance the thermal stability of the nonvolatile memory element. An electrode for a nonvolatile memory element may contain a conductive layer and a buffer layer.

2012-05-17

20120122292

Methods of Forming a Non-Volatile Resistive Oxide Memory Array - A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another.

2012-05-17

20120122293

METHOD OF FORMING MIM CAPACITOR STRUCTURE IN FEOL - A capacitor structure includes a semiconductor substrate; a first capacitor plate positioned on the semiconductor substrate, the first capacitor plate including a polysilicon structure having a surrounding spacer; a silicide layer formed in a first portion of an upper surface of the first capacitor plate; a capacitor dielectric layer formed over a second portion of the upper surface of the first capacitor plate and extending laterally beyond the spacer to contact the semiconductor substrate; a contact in an interlayer dielectric (ILD), the contact contacting the silicide layer and a first metal layer over the ILD; and a second capacitor plate over the capacitor dielectric layer, wherein a metal-insulator-metal (MIM) capacitor is formed by the first capacitor plate, the capacitor dielectric layer and the second capacitor plate and a metal-insulator-semiconductor (MIS) capacitor is formed by the second capacitor plate, the capacitor dielectric layer and the semiconductor substrate.

2012-05-17

20120122294

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In one embodiment, a method of manufacturing a semiconductor device includes successively forming first and second films to be processed on a semiconductor substrate. The method further includes removing a predetermined region of the second film by etching, to form a slit part including sidewall parts and a bottom part, the sidewall parts including side surfaces of the second film, and the bottom part including an upper surface of the first film. The method further includes supplying oxidizing ions or nitriding ions contained in plasma, generated by a microwave, a radio-frequency wave, or electron cyclotron resonance, to the sidewall parts and the bottom part of the slit part by applying a predetermined voltage to the semiconductor substrate, thereby performing anisotropic oxidation or anisotropic nitridation of the sidewall parts and the bottom part of the slit part.

2012-05-17

20120122295

SEMICONDUCTOR DEVICE WITH RECESS AND FIN STRUCTURE - The semiconductor device includes an active region, a recess, a Fin channel region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess is formed by etching the active region and its neighboring device isolation structure using an island shaped recess gate mask as an etching mask. The Fin channel region is formed on the semiconductor substrate at a lower part of the recess. The gate insulating film is formed over the active region including the Fin channel region and the recess. The gate electrode is formed over the gate insulating film to fill up the Fin channel region and the recess.

2012-05-17

20120122296

METHODOLOGY FOR WORDLINE SHORT REDUCTION - The method of forming a wordline is provided in the present invention. The proposed method includes steps of: (a) providing a plurality of SASTIs with a plurality of first POLY cells deposited thereon; and (b) depositing a first fill-in material having a relatively high etching rate oxide-like material in the plurality of SASTIs and on each side wall of the plurality of first POLY cells.

2012-05-17

20120122297

METHOD OF FABRICATING A NONVOLATILE MEMORY DEVICE - A method of fabricating a nonvolatile memory device includes providing a substrate having active regions defined by a plurality of trenches, forming a first isolation layer on the substrate having the plurality of trenches, forming a sacrificial layer on the first isolation layer to fill the trenches, the sacrificial layer including a first region filling lower portions of the trenches and a second region filling portions other than the lower portions, removing the second region of the sacrificial layer, forming a second isolation layer on the first isolation layer and the first region of the sacrificial layer, forming air gaps in the trenches by removing the first region of the sacrificial layer, and removing a portion of the first isolation layer and a portion of the second isolation layer while maintaining the air gaps.

2012-05-17

20120122298

METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE - Defects in a semiconductor substrate are reduced. A semiconductor substrate with fewer defects is manufactured with high yield. Further, a semiconductor device is manufactured with high yield. A semiconductor layer is formed over a supporting substrate with an oxide insulating layer interposed therebetween, adhesiveness between the supporting substrate and the oxide insulating layer in an edge portion of the semiconductor layer is increased, an insulating layer over a surface of the semiconductor layer is removed, and the semiconductor layer is irradiated with laser light, so that a planarized semiconductor layer is obtained. For increasing the adhesiveness between the supporting substrate and the oxide insulating layer in the edge portion of the semiconductor layer, laser light irradiation is performed from the surface of the semiconductor layer.

FILM STRESS MANAGEMENT FOR MEMS THROUGH SELECTIVE RELAXATION - An apparatus comprising a microelectromechanical system. The microelectromechanical system includes a crystalline structural element having dislocations therein. For at least about 60 percent of adjacent pairs of the dislocations, direction vectors of the dislocations form acute angles of less than about 45 degrees.

2012-05-17

20120122301

METHOD OF MANUFACTURING GaN-BASED FILM - A method of manufacturing a GaN-based film includes the steps of preparing a composite substrate, the composite substrate including a support substrate in which a coefficient of thermal expansion in its main surface is more than 0.8 time and less than 1.0 time as high as a coefficient of thermal expansion of GaN crystal in a direction of a axis and a single crystal film arranged on a main surface side of the support substrate, the single crystal film having threefold symmetry with respect to an axis perpendicular to a main surface of the single crystal film, and forming a GaN-based film on the main surface of the single crystal film in the composite substrate, the single crystal film in the composite substrate being an SiC film. Thus, a method of manufacturing a GaN-based film capable of manufacturing a GaN-based film having a large main surface area and less warpage without crack being produced in a substrate is provided.

2012-05-17

20120122302

Apparatus And Methods For Deposition Of Silicon Carbide And Silicon Carbonitride Films - Methods for deposition of silicon carbide films on a substrate surface are provided. The methods include the use of vapor phase carbosilane precursors and may employ plasma enhanced atomic layer deposition processes. The methods may be carried out at temperatures less than 600° C., for example between about 23° C. and about 200° C. or at about 100° C. This silicon carbide layer may then be densified to remove hydrogen content. Additionally, the silicon carbide layer may be exposed to a nitrogen source to provide reactive N—H groups, which can then be used to continue film deposition using other methods. Plasma processing conditions can be used to adjust the carbon, hydrogen and/or nitrogen content of the films.

2012-05-17

20120122303

SEMICONDUCTOR STRUCTURE HAVING WIDE AND NARROW DEEP TRENCHES WITH DIFFERENT MATERIALS - Disclosed is a method of forming a semiconductor device structure in a semiconductor layer. The method includes forming a first trench of a first width and a second trench of a second width in the semiconductor layer; depositing a layer of first material which conforms to a wall of the first trench but does not fill it and which fills the second trench; removing the first material from the first trench, the first material remaining in the second trench; depositing a second material into and filling the first trench and over a top of the first material in the second trench; and uniformly removing the second material from the top of the first material in the second trench, wherein the first trench is filled with the second material and the second trench is filled with the first material and wherein the first material is different from the second material.

2012-05-17

20120122304

System and Method for Transferring Substrates in Large Scale Processing of CIGS and/or CIS Devices - The present invention provides methods for fabricating a copper indium diselenide semiconductor film. The method includes providing a plurality of substrates having a copper and indium composite structure, and including a peripheral region, the peripheral region including a plurality of openings, the plurality of openings including at least a first opening and a second opening. The method includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the furnace including a holding apparatus. The method further includes introducing a gaseous species into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature to at least initiate formation of a copper indium diselenide film on each of the substrates.