here's a patchset that provides the ability to inject MCEs in hardwareon AMD by writing directly into MCA registers and calling the #MCexception handler. This allows more thorough testing of MCE core, EDACand RAS code in general (oh yeah, or you can simply play with it).

Here's how to do that:

1. Make sure to set (debugfs-mnt-point)/mce/fake_panic to 1 otherwise yourmachine will panic

This will generate an almost random Data Cache (u selects the CPUfunctional unit to generate MCEs for) MCE and inject it. I know, thescript needs a bunch of cleaning and fixing but all in good time, asthey say.

def __gen_dc_mce(self, mce): """ Generate a DC MCE signature. Some of the fields are overlapping and not valid for all families but this is ok since we want to check the error path too when generating an invalid MCE or the MCi_STATUS somehow got corrupted """

if self.valid(): ret.append("Val") if self.overflow(): ret.append("Over") if self.uncorrected(): ret.append("UC") if self.err_enabled(): ret.append("EN") if self.miscv(): ret.append("MiscV") if self.addrv(): ret.append("AddrV") if self.pcc(): ret.append("PCC") if self.cecc(): ret.append("CECC") if self.uecc(): ret.append("UECC") if self.scrub(): ret.append("Scrub")