MEDIA LIBRARY MONITORING SYSTEM AND METHOD - Embodiments of methods and systems comprise collecting data associated with a library or library components and storing the collected data in repository. By collecting data associated with a library or library components and storing the collected data in a repository, the degradation of library components can be monitored and the reliability of library components determined, allowing unreliable components to be bypassed or replaced, enhancing the reliability of the library and preventing data loss.

2012-07-19

20120185590

Data Center Inventory Management Using Smart Racks - A user interface (UI) is accessible on a display to depict and control a plurality of smart racks in a data center is disclosed. The UI includes first, second and third graphical displays. The first graphical display depicts smart racks in the data center so as to mimic a physical arrangement of the smart racks. The second graphical display depicts a plurality of blade hosts in a smart rack in the plurality of smart racks, so as to mimic a physical arrangement of the plurality of blade hosts. The first and second graphical display may include visual indicators to depict error and warning conditions. The third graphical display depicts blade information about a blade host in the plurality of blade hosts. The blade information includes system information, a list of virtual machines hosted on the blade host, and a physical location of the blade host in the data center.

2012-07-19

20120185591

WEB SERVICE SYSTEM, SCHEDULE EXECUTION APPARATUS AND CONTROL METHOD THEREOF - A schedule execution unit accesses a storage unit for storing a call list registered in a database and determines whether or not there is a Web service call to be executed. If the presence of a Web service call to be executed is confirmed, the schedule execution unit reads out the Web service address and process details and calls the Web service. By so doing, the apparatus that provides the function and the apparatus that carries out the call can be separated, thus enabling a particular program to be executed simply and flexibly according to a schedule.

2012-07-19

20120185592

NETWORK PERFORMANCE ESTIMATING APPARATUS AND NETWORK PERFORMANCE ESTIMATING METHOD, NETWORK CONFIGURATION CHECKING METHOD, COMMUNICATION MANAGING APPARATUS, AND DATA COMMUNICATION METHOD - A network performance estimating apparatus includes a network-configuration depicting unit configured to generate, from a designed network, network configuration information indicating a connection relation of ports among communication apparatuses and store, as attribute information, apparatus identification information including input peculiar information for each communication apparatus name and apparatus type of the communication apparatuses, a communication-apparatus-attribute-information acquiring unit configured to acquire, communication performance of the communication apparatuses specified by the apparatus identification information from peculiar information in which apparatus model names and communication performance are stored in association with each other, a token-circulation-order determining unit configured to determine, from the network configuration information, token circulation order indicating order in a designed network, and a performance estimating unit configured to calculate communication performance of the designed network using the token circulation order and the communication performance of the communication apparatuses.

2012-07-19

20120185593

LICENSE REDISTRIBUTING METHOD, MODERATOR AND LICENSE CONTROLLING SYSTEM THEREOF - The present invention provides a method for redistributing the license tokens to the traffic nodes to make the license tokens can be efficiently distributed to the traffic node. The method including: collecting usage information of each of the traffic nodes; determining a set of license tokens for each of the traffic nodes; and commanding a first group of traffic node(s) to release license tokens and commanding a second group of traffic node(s) to request license tokens based on the usage information and the set of license tokens. A moderator, used in a license controlling system which can efficiently redistribute the license tokens among the traffic nodes, is provided and a controlling system which including this moderator is also provided.

2012-07-19

20120185594

CONGESTION CONTROL IN CACHING ENABLED VIDEO NETWORKS - The present invention relates to a method, related system, related congestion monitoring device and related media delivery personalization devices for controlling congestion in a media delivery network that includes a media delivery server and a plurality of client devices. The media delivery server is coupled over the media delivery network to each client device of the plurality of client devices. The media delivery server delivering media to a client device over a path between the media delivery server and the client device. The related method includes the steps of monitoring congestion in the media delivery network and subsequently adapting a level of personalization of the delivering of media to the client device based on the congestion monitored.

2012-07-19

20120185595

Traffic Localization Mechanism For Distributed Hash Table Based Peer-To-Peer Networks - Provided is a method for localizing peer-to-peer traffic. The method includes receiving, by a first node, a request message from a second node of a peer-to-peer network. The method includes accessing a table based on the request message to determine if the second node is associated with a local network. The table stores a plurality of keys and node information indicating a relationship between the first node and the local network. The node information is stored in relation to each of the plurality of keys. The method includes transmitting a response message to the second node if the second node is associated with the local network.

2012-07-19

20120185596

METHOD AND SYSTEM FOR MANAGING ACCESS TO A RESOURCE - The present invention relates to a method and a system for managing access to a resource, copies of which are hosted in apparatuses of one or more networks. The method comprises obtaining a list comprising a plurality of references pointing to the plurality of copies of the resource; for each of said references, determining at least one accessibility rating representing the accessibility of the corresponding copy for the given user device, and, based on the at least one accessibility rating, deciding between keeping the corresponding reference in the list or deleting it therefrom, to obtain an updated list; and selecting a reference from the updated list for the given user device to access the resource.

2012-07-19

20120185597

MOBILE NETWORK TRAFFIC COORDINATION ACROSS MULTIPLE APPLICATIONS - Systems and methods for mobile network traffic coordination across multiple applications are disclosed. In one aspect, embodiments of the present disclosure include a distributed proxy and cache system, including, a local proxy on a mobile device for intercepting a data request made via a mobile device, and a proxy server coupled to the mobile device and a content server to which the data request is directed. One embodiment includes, delaying transfer of a first data transfer request initiated by a first application until another data transfer request initiated by a second application is detected on the mobile device and transferring, the first data transfer request of the first application and the other data transfer request of the second application a single transfer operation over the network.

2012-07-19

20120185598

DYNAMIC APPLICATION PROVISIONING IN CLOUD COMPUTING ENVIRONMENTS - A method for dynamically provisioning a machine with applications to assist with work is a cloud computing environment is described. In one embodiment, such a method includes identifying a machine available for provisioning with at least one application. The method identifies work associated with a cloud computing environment. Responsive to identifying the work, the method determines how the machine can most optimally assist with the work. The method then dynamically provisions the machine with at least one application selected to enable the machine to most optimally assist with the work. A corresponding apparatus and computer program product are also disclosed.

2012-07-19

20120185599

METHODS FOR CONTROLLING ONGOING TRIGGERED SUPL SESSION BY SLP AND NETWORK-SIDE SUPL AGENT - A method for controlling an ongoing network-initiated triggered session in compliance with a Secure User Plane Location (SUPL) standard is provided, and the method proposes that the SUPL Agent sends a request to the SUPL Location Platform (SLP), so that the SLP further indicates the target SUPL Enabled Terminal (SET) to pause the ongoing network-initiated triggered session via a SUPL TRIGGERED STOP message. Also, a method for controlling an ongoing SET-initiated triggered session is provided, and the method proposes that the SLP indicates the target SET to pause the ongoing SET-initiated triggered session via a SUPL TRIGGERED STOP message.

2012-07-19

20120185600

Control of Codec Negotiation for Communication Connection - The invention relates to a session control entity, method and a computer program product for receiving a request for a session, deciding on removal of a user plane gateway from a user plane of the session, extracting, when the user plane gateway is to be removed, a first codec list in the second encoding and removing the first codec list from the request for the session. Further, removing a second codec list in the first encoding from the request for the session, deriving a third codec list, when the user plane gateway is to be removed, from the first codec list, or, when the user plane gateway is not to be removed, from the second codec list, including in the request for the session, a third codec list in the first encoding, and transmitting the request for the session.

2012-07-19

20120185601

Method For Optimally Utilizing A Peer To Peer Network - In accordance with an embodiment of the invention, there is provided a method for splitting a load of monitoring a peer to peer network. The method has a first node in the peer to peer network receiving information reported by a second node in the peer to peer network, including information concerning which nodes are connected to the second node. The method further has the first node connecting to nodes different from the nodes that are connected to the second node using the received information. The method still further has the first node reporting information, including information concerning which nodes are connected to the first node, such that the second node also has access to the reported information, thereby splitting the load of monitoring the peer to peer network among the first and second nodes.

2012-07-19

20120185602

METHOD FOR SECURE USER PLANE (SUPL) VERSION NEGOTIATION - The subject matter disclosed herein relates to a system and method for negotiating a version of Secure User Plane Location (SUPL) between a network entity and a SUPL enabled terminal. In a particular implementation, a SUPL initiation message is transmitted from a network entity to a SUPL entity, where the SUPL initiation message identifies a plurality of SUPL versions capable of supporting a desired service. A response is received from the SUPL entity that is based, at least in part, on an ability of the SUPL entity to support at least one of the plurality of versions.

2012-07-19

20120185603

RELAY SERVER AND RELAY COMMUNICATION SYSTEM - In a relay server, a routing group information sharing unit shares routing group information, which is prepared by grouping routing control points including at least two of a first relay server in a relay group, a second relay server in the relay group, a client terminal connected to the first relay server, and a client terminal connected to the second relay server. A routing session establishment unit establishes a routing session, which enables a communication packet to be routed via the routing control points, for each group indicated in the routing group information while referring to relay server information.

2012-07-19

20120185604

SYSTEM AND METHOD FOR INDICATING CALLEE PREFERENCES - A system and method of communicating callee device preferences to a network is present. A first device identification is transmitted. The first device identification at least one of identifies the callee device and describes a capability of the callee device. A caller capabilities pattern is encoded into a first session initiation protocol (SIP) message. The caller capabilities pattern describes an attribute of a candidate caller device. An action pattern is encoded into the first SIP message. The action pattern defines an action and the network is configured to take the action. The action pattern is associated with the caller capabilities pattern. The first SIP message is transmitted to the network.

2012-07-19

20120185605

METHODS AND APPARATUS FOR DETERMINING AND/OR USING A COMMUNICATIONS MODE - Methods and apparatus for determining whether two or more communications devices, e.g., wireless terminals, in a communications system should communicate using direct peer to peer communications or via one or more infrastructure elements, e.g., base stations, are described. The determination whether a given pair of communications devices should communicate using direct peer to peer communications, rather than via the infrastructure element(s), is determined by a control device. The control device instructs various wireless terminals to make various signal measurements and/or transmit signals to be measured. Based on the signal measurements the control device estimates interference caused by the direct peer to peer link to the existing communications devices, the direct peer to peer link channel quality and/or interference caused to such a direct peer to peer link by existing communications devices which are communicating using peer to peer signaling and makes a mode decision based on such information.

2012-07-19

20120185606

WIRELESS NETWORK CONNECTION SYSTEM AND METHOD - The present invention provides a device, system, method and computer-program product for transferring information between a host computer and a wireless network. The device and system comprise an operatively linked mass storage module and modem module. The mass storage module is configured to transfer information with a host computer. The modem module is configured to transfer information with one or more wireless networks. Communication between the host computer and the mass storage module is at least in part using file system input/output protocols. One or more virtual drivers are provided on the host computer to enable communication with the modem module without installation of modem specific drivers.

2012-07-19

20120185607

APPARATUS AND METHOD FOR STORING AND PLAYING CONTENT IN A MULTIMEDIA STREAMING SYSTEM - To store and play contents streamed in a multimedia streaming system, an operating method of a server in the multimedia streaming system includes receiving a transmission request for a Media Presentation Description (MPD) file; and transmitting the MPD file including a flag indicating whether it is possible to generate a media file that is playable by a media file player by concatenating transmitted segments.

2012-07-19

20120185608

DYNAMIC INDEX FILE CREATION FOR MEDIA STREAMING - Systems and methods for providing index files for streaming media over a network are disclosed. These systems and methods provide for receiving requests for a media file and responding to these requests by generating corresponding index files used in streaming the media file. The index file can then be provided to the requesting entity. These systems and methods, which can be utilized together with a dynamic chunk generator, enable the insertion of advertisements at any point during playback of the media file.

2012-07-19

20120185609

PRESENTING MULTIPLE POSSIBLE SELECTABLE DOMAIN NAMES FROM A URL ENTRY - A multiending controller within a network detects a URL entry including at least a portion of a particular domain name. The multiending controller automatically selects multiple possible domain names for at least said portion of said particular domain name, wherein each of the multiple possible domain names includes a separate one of multiple ending types available for a domain. The multiending controller directs output of the multiple possible domain names for selection by a user.

2012-07-19

20120185610

Method and Device for Transcoding - Embodiments of the present invention provide a method and device for transcoding, which belongs to the computer media processing field. The method includes: receiving multiple multimedia source files selected by a user and a transcoding target parameter inputted by the user; separating each of the multiple multimedia source files into an audio stream and a video stream; according to the transcoding target parameter, transcoding each audio stream and each video stream obtained from the separation; merging transcoded audio streams and transcoded video streams of the multiple multimedia source files into at least one multimedia target file. The device includes: a receiving unit, a separating unit, a transcoding unit and a merging unit. The present invention extends transcoding modes, improves user experience, and has high practicability.

2012-07-19

20120185611

THREAT IDENTIFICATION AND MITIGATION IN COMPUTER MEDIATED COMMUNICATION, INCLUDING ONLINE SOCIAL NETWORK ENVIRONMENTS - A method for combating electronic communication that may cause an individual to adopt extremist or terrorist philosophies. The method comprises intercepting electronic communication intended for or initiated by the individual over an Internet communication medium, identifying electronic communication, as intercepted, that relate to extremist or terrorist philosophies, analyzing content of the electronic communication that relates to extremist or terrorist philosophies, injecting counter-narrative content to the individual's communication stream to counter determined content, and displaying text associated with one or more of the method steps on a display screen.

2012-07-19

20120185612

APPARATUS AND METHOD OF DELTA COMPRESSION - A method includes aligning a reference window and target window for compression of a target data stream in terms of a reference data stream. The anchors are determined by examining the target data stream and reference data streams. The target data stream is aligned with respect to the reference data streams using the anchors. Pattern matching between the aligned target data stream and reference data stream is done to delta compress the target data stream.

2012-07-19

20120185613

Method and System of Transferring a Message in a Session Initiation Protocol Based Communications Network - Method of transferring a message in a Session Initiation Protocol based communications network, from a first node to a third node via a second node. The method comprises the steps of: storing, in a repository associated with the first node, a group identifier associated with a plurality of second nodes; deriving, by the first node, on the basis of the group identifier a network address corresponding to one second node of the plurality of second nodes; and transmitting the message to the third node via the second node derived by the first node.

2012-07-19

20120185614

Network Interface for Use in Parallel Computing Systems - A network device comprises a controller that manages data flow through a network interconnecting a plurality of processors. The processors of the processor plurality comprise a local memory divided into a private local memory and a public local memory, a local cache, and working registers. The network device further comprises a plurality of cache mirror registers coupled to the controller that receive data to be forwarded to the processor plurality. The controller is responsive to a request to receive data by transferring requested data directly to public memory without interrupting the processor, and by transferring requested data via at least one cache mirror register for a transfer to processor local cache, and to processor working registers.

2012-07-19

20120185615

Querying A Device For Information - In one embodiment, the present invention includes a method for receiving in a processor complex a first write request from a peripheral device, obtaining information of the processor complex responsive to the first write request, and transmitting a second write request from the processor complex to the peripheral device including the information. Other embodiments are described and claimed.

2012-07-19

20120185616

USB Version Recognition Device - A USB version recognition device includes an indication module, a USB connector, an information source module, and a control module. The USB connector is for connecting with a USB device and receiving a first version message of the USB device. The information source module stores a second version message therein and is connected to the USB connector. The controller module is connected to the indication module and the information source module, and is able to compare the first version message with the second version message to generate an operating version message and show the latter via the indication module.

2012-07-19

20120185617

PORTABLE ELECTRONIC DEVICE, CONTROL METHOD, AND CONTROL PROGRAM - The portable electronic device includes an operation unit, a storage unit, a setting unit, and a control unit. The operation unit inputs characters. The storage unit stores a first conversion table and a second conversion table different from the first conversion table. The second conversion table is different from the first conversion table. The setting unit sets a first mode and a second mode. In a case in which the first mode has been set by the setting unit, the control unit refers to the first conversion table when characters input by way of an operation of the operation unit is converted into another characters. In a case in which the second mode has been set by the setting unit, the control unit refers to the second conversion table when characters input by way of an operation of the operation unit is converted into another characters.

2012-07-19

20120185618

METHOD FOR PROVIDING SCALABLE STORAGE VIRTUALIZATION - A method, apparatus and computer program product for providing scalable storage virtualization is presented. Storage virtualization management functions are provided in a first device, and storage virtualization Input/Output (I/O) functions are provided in a second device. An interface is provided between the first device and the second device, wherein the first device manages and updates I/O functions of the second device. I/O operations are performed between the second device and at least one storage device.

2012-07-19

20120185619

IDENTIFYING WHEN A SELF-POWERED DEVICE IS ELECTRICALLY CONNECTED TO A MEDICAL DEVICE - In some aspects, a method includes determining whether a universal serial bus (USB) peripheral device is connected to a USB monitoring device that is connected to a medical device and drawing power from the medical device. The medical device is configured for use in a medical procedure with a patient. The method also includes determining whether the USB peripheral device is drawing power from the medical device if the USB peripheral device is determined to be connected to the USB monitoring device.

2012-07-19

20120185620

BUFFERING APPARATUS FOR BUFFERING MULTI-PARTITION VIDEO/IMAGE BITSTREAM AND RELATED METHOD THEREOF - An exemplary buffering apparatus for buffering a multi-partition video/image bitstream which transmits a plurality of compressed frames each having a plurality of partitions includes a first bitstream buffer and a second bitstream buffer. The first bitstream buffer is arranged to buffer data of a first partition of the partitions of a specific compressed frame. The second bitstream buffer is arranged to buffer data of a second partition of the partitions of the specific compressed frame.

2012-07-19

20120185621

Detection and Processing of Preselected Image Blocks in a KVM System - A method, operable in a keyboard, video, mouse (KVM) system in which multiple target computers connected to a KVM switch are accessible via the KVM switch by a remote computer connected to the KVM switch, each of the target computers having a video output, and in which one or more preselected images are each associated with corresponding actions, the method includes monitoring the video output of at least some of the target computers connected to the KVM switch to search for one of the preselected images in the video output; and when one of the preselected images is detected in a video output of one of the target computers, taking the corresponding actions associated with that image.

2012-07-19

20120185622

MATCHING METHOD, SYSTEM AND DEVICE FOR DATA EXCHANGE BETWEEN A COMMUNICATION OBJECT AND A PROCESSING UNIT - A matching device carries out data exchange between a processing unit and a wireless peripheral device and/or a communication object associated with the peripheral device. The matching device includes a communication interface with the processing unit; a wireless communication interface with the wireless peripheral device; information stating means for stating technical capacity information to the processing unit, enabling the latter to select an appropriate driver/communication means; and data-processing means. The data-processing means is capable of carrying out a matching of an exchange protocol and/or formats of data to be exchanged between the processing unit and the communication object. The technical capacities stated by the stating means pertains to the wireless peripheral device and/or to the communication object associated therewith, the technical capacities being considered to pertain to the matching device by the processing unit. The invention also pertains to a system and method for implementing the matching device.

2012-07-19

20120185623

APPARATUS AND METHODS FOR SERIAL INTERFACES - Apparatus and methods for serial interfaces are provided. In one embodiment, an integrated circuit operable to communicate over a serial interface is provided. The integrated circuit includes analog circuitry, registers for controlling the operation of the analog circuitry, and a distributed slave device including a primary block and a secondary block. The registers are accessible over the serial interface using a shared register address space. Additionally, the primary block is electrically connected to the serial interface and to a first portion of the registers and the secondary block is electrically connected to the primary block and to a second portion of the registers.

2012-07-19

20120185624

Automated Cabling Process for a Complex Environment - A method is provided for cabling a plurality of hardware components. A chassis controller establishes a wireless connection to a wireless device. The chassis controller, via a wireless interface, transmits a chassis map to the wireless device over the wireless connection. The chassis controller, via the wireless interface, transmits to the wireless device, an indication of a first port to be cabled over the wireless connection, the first port. The first port is of a first hardware component of the plurality of hardware components. The chassis controller tests the first port to determine whether cabling of the first port has been performed correctly.

2012-07-19

20120185625

Method for operating a fieldbus interface - A method for operating a fieldbus interface (FI) connected to a fieldbus of process automation technology. The method includes the following: tapping data traffic on the fieldbus by the fieldbus interface; and registering tapped configuration information relative to cyclic data traffic on the fieldbus by the fieldbus interface.

BUS HOST CONTROLLER AND METHOD THEREOF - A bus host controller and a method thereof are provided. If a terminal device coupled to the bus is a non-periodic device, the bus host controller places a higher priority on data packet transferring request than start-of-frame (SOF) packet transferring request.

2012-07-19

20120185628

Locking/Unlocking CPUs to Operate in Safety Mode or Performance Mode Without Rebooting - An embodiment of the invention provides a method for changing a multi-processor system from a performance mode to a safety mode while the system continues to run software. When an external event or exception occurs, context is switched from the performance mode to the safety mode. After context is switched, at least one pair of CPUs is synchronized to operate in the safety mode. In addition, a multi-processor system may be switched form the safety mode to the performance mode while the software continues to operate.

2012-07-19

20120185629

MOBILE PHONE - A mobile phone includes an earphone and a main body. The earphone includes a first universal serial bus (USB) interface, a first USB audio module connected to the first USB interface, a battery module connected to the first USB interface, a speaker module connected to the first USB audio module, a first BLUETOOTH module connected to the speaker module and the battery module, a microphone module connected to the first BLUETOOTH module, and a first antenna module connected to the first BLUETOOTH module. The main body includes a second USB interface, a second USB audio module connected to the USB interface, a control module connected to the second USB audio module, a detecting module connected to the second USB interface and the control module, a second BLUETOOTH module connected to the control module, and a second antenna module connected to the second BLUETOOTH module.

OPERATION METHOD FOR A COMPUTER SYSTEM - A device receives a standard command. The device judges whether an address field and/or a data length field and/or a data field of the standard command includes at least one of a vendor command, a vendor data and a checkword. The device judges whether the address field and/or a data length field and/or the data field of the standard command matches a vendor predetermined pattern. If matched, the device performs a vendor operation based on the vendor command and/or the vendor data of the standard command.

2012-07-19

20120185632

IMPLEMENTING PCI-EXPRESS MEMORY DOMAINS FOR SINGLE ROOT VIRTUALIZED DEVICES - A method, system and computer program product are provided for implementing PCI-Express memory domains for single root virtualized devices. A PCI host bridge (PHB) includes a memory mapped IO (MMIO) domain descriptor (MDD) and an MMIO Domain Table (MDT) are used to associate MMIO domains with PCI memory VF BAR spaces. One MDD is provided for each unique VF BAR space size per bus segment connecting a single root IO virtualization (SRIOV) device to the PCI host bridge (PHB). The MDT used with the MDD includes having a number of entries limited to a predefined total number of SRIOV VFs to be configured. A VF BAR Stride, which may be further implemented as a VF BAR Stride Capability Structure, is provided to reduce the number of MDDs required to map SRIOV VF BAR spaces. A particular definition of the MDD is provided to reduce the number of MDDs required to at most one per SRIOV bus segment below a PHB.

2012-07-19

20120185633

ON-CHIP ROUTER AND MULTI-CORE SYSTEM USING THE SAME - A table for changing destination has a destination address in a shared memory and an identifier of a router directly connected to a destination core, in association with each other, and is set by a source core. A search unit performs a first search for searching whether the table has an effective entry having the same address as the destination address in the shared memory, and stored in a header of a write request packet received by the source core. A route calculation unit performs a route calculation with a destination that is a router of an identifier of the entry, if the effective entry is found as a result of the first search. A header generator stores the router identifier obtained by the route calculation in a hop router field of the header of the write request packet, and sets a rerouted flag representing a change in destination.

2012-07-19

20120185634

COMPUTER SYSTEM AND METHOD FOR INHERITING HBA IDENTIFIER OF PCI CARD - A PCI card's HBA identifier table held in an IODC in an IO slot expansion unit is read and recorded on a PCIe switch register of a PCIe switch. After a server blade is powered on so that an EFI is activated, the EFI reads the HBA identifier table recorded on the PCIe switch register and updates an HBA identifier of an HBA mounted in each PCI card. The HBA mounted in the PCI card operates with the updated HBA identifier of the PCI card. Thus, even when the PCI card is replaced by a new PCI card because of failure or the like, the new PCI card can operate with the same HBA identifier as that before the replacement. Therefore, a user does not have to register the HBA identifier of the PCI card newly in a device connected to the PCI card.

2012-07-19

20120185635

REDUNDANT DATA BUS SYSTEM - There are configured a first transmission path, along which data is transmitted/received between a controller and a first microcomputer through a first driver, and a second transmission path, along which data is transmitted/received between the controller and the first microcomputer through a second driver. The controller transmits an operation check signal to the first microcomputer through the first or second transmission path, and receives a response signal from the first microcomputer through the first or second transmission path.

2012-07-19

20120185636

Tamper-Resistant Memory Device With Variable Data Transmission Rate - A high capacity, secure and tamper-resistant computer data memory device. The device uses a plurality of dedicated memory controller elements in communication with an anti-tamper module that generates a tamper response when a predetermined tamper event occurs. The tamper response may be provided as the erasure or zeroization of the contents of a memory in the devices such as erasing one or more encryption keys. The elements of the device are preferably provided in a stacked configuration with rerouted I/O pads to obfuscate the I/O and function of the devices in the stack. In one embodiment, a data transfer governance means is provided. In a further embodiment, a current negotiation means is disclosed to permit the device to request a predetermined current from a host device. In a yet further embodiment, a portable safe house computing device is provided.

2012-07-19

20120185637

RECOVERING FAILED WRITES TO VITAL PRODUCT DATA DEVICES - A method for maintaining vital product data (VPD) contained in an EEPROM (Electrically Erasable Programmable Read-Only Memory) on a field replaceable unit (FRU) of a computer system that has a cache. The method includes maintaining a copy of the VPD in the cache, retrieving the copy of the VPD from the cache upon receiving a read request of the VPD, and, upon receiving a write request to write data to the VPD, writing the data to the copy of the VPD, determining whether the VPD in the EEPROM is in synchronization with the copy of the VPD in the cache, and, if the VPD and the copy of the VPD are in synchronization, writing the data to the EEPROM.

2012-07-19

20120185638

METHOD AND SYSTEM FOR CACHE ENDURANCE MANAGEMENT - A system and method for cache endurance management is disclosed. The method may include the steps of querying a storage device with a host to acquire information relevant to a predicted remaining lifetime of the storage device, determining a download policy modification for the host in view of the predicted remaining lifetime of the storage device and updating the download policy database of a download manager in accordance with the determined download policy modification.

2012-07-19

20120185639

ELECTRONIC DEVICE, MEMORY CONTROLLING METHOD THEREOF AND ASSOCIATED COMPUTER-READABLE STORAGE MEDIUM - An electronic device including a NAND flash memory, an auxiliary memory, and a controller is provided. A code for detecting a read command sequence of the NAND flash memory is stored in the auxiliary memory. During a boot procedure of the electronic device, the controller reads the code from the auxiliary memory and executes the code to obtain the read command sequence of the NAND flash memory, so as to access content stored in the NAND flash memory according to the read command sequence.

2012-07-19

20120185640

CONTROLLER AND METHOD FOR CONTROLLING MEMORY AND MEMORY SYSTEM - A memory controller for multiple addressing modes is provided. The memory controller includes a transmitting unit and a control unit. The transmitting unit transmits an identification message to a non-volatile memory. According to whether the non-volatile memory feeds back an acknowledgement message in response to the identification message, the control unit determines an addressing mode to be used for communicating with the non-volatile memory.

2012-07-19

20120185641

Distributed Storage Service Systems and Architecture - Various methods, devices and systems are described for providing distributed storage services. A data storage device is capable of initiating a communication session with an external entity such as a local host computer (and vice versa) coupled directly to the data storage device, a remote server computer, or directly with remote data storage devices with or without intervention by a local host computer.

2012-07-19

20120185642

ASSIGNING A DATA ITEM TO A STORAGE LOCATION IN A COMPUTING ENVIRONMENT - A computer implemented method, system, and/or computer program product assigns a data item to a storage location in a computing environment. A request to store a data item is detected. A determination is made as to whether a volatile memory in the second computer comports with an isolation rule for the data item. In response to determining that the volatile memory in the second computer comports with the isolation rule for the data item, access time for data in the volatile memory in the second computer is compared with access time for data in a local hard drive in a first computer. The data item is then selectively stored in either the volatile memory in the second computer or the local hard drive in the first computer as determined by their relative access times.

2012-07-19

20120185643

SYSTEMS CONFIGURED FOR IMPROVED STORAGE SYSTEM COMMUNICATION FOR N-WAY INTERCONNECTIVITY - Storage systems configured for improved N-way connectivity among all of a plurality of storage controllers and all of a plurality of storage devices in the system. All controllers of the storage system are coupled through a switched fabric communication medium to all of the storage devices of the storage system. Thus, the back-end interface of each storage controller of the storage system is used for all communications with any of the storage devices as well as for any communications among the controllers to coordinate the N-way distribution of stored data in a declustered RAID storage environment. This use of the back-end channel for all storage controller to storage device N-way connectivity as well as controller to controller N-way connectivity eliminates the need for a dedicated inter-controller interface for such N-way connectivity and eliminates the over-utilization of a front-end (e.g., network) communication path for providing N-way connectivity in the storage system.

STORAGE SYSTEM AND MANAGEMENT METHOD THEREOF - A storage system including a first storage apparatus having at least one volume to be provided to a host computer, a second storage apparatus connected to the first storage apparatus and having a second volume having a pair relationship with a first volume, and a management apparatus. The management apparatus includes a user interface for setting an attribute of functions related to at least one volume of the first storage apparatus and at least one volume of the second storage apparatus. The management apparatus compares an attribute of a first function related to the first volume and an attribute of a second function related to the second volume, and sets the attribute of the second function to be consistent with the attribute of the first function. The management apparatus there commands restoration of the first volume or the second volume to a state before the set the attribute operation.

2012-07-19

20120185646

FILE SERVER, FILE MANAGEMENT SYSTEM AND FILE MANAGEMENT METHOD - When receiving a file access from the client, the file access program refers to the mapping table, and processes an access to files of on volumes of RAID groups. The file server analyzes the file access states, and groups the files depending on the access time period, defines the file migration pattern based on the grouping, migrates the files, and then carries out a power management operation like a spin-down/-up operation on the RAID groups based on the migration pattern.

2012-07-19

20120185647

Systems and Methods for Managing Stored Data - A method of managing stored data can include mapping data storage bins to a storage tier based on a bin access value associated with each data storage bin after a current time window ends, such that a first bin access value associated with a data storage bin that is mapped to a storage tier is greater than or equal to a second bin access value associated with a most frequently accessed data storage bin that is mapped to a next highest-performing storage tier, and when the data storage bin was not mapped to a current storage tier after a previous time window ended, determining a time weighting factor to be applied to an access frequency associated with the current time window, wherein a next bin access value associated with the data storage bin is calculated using the time weighting factor.

2012-07-19

20120185648

STORAGE IN TIERED ENVIRONMENT FOR COLDER DATA SEGMENTS - Exemplary method, system, and computer program embodiments for storing data by a processor device in a computing environment are provided. In one embodiment, by way of example only, from a plurality of available data segments, a data segment having a storage activity lower than a predetermined threshold is identified as a colder data segment. A chunk of storage is located to which the colder data segment is assigned. The colder data segment is compressed. The colder data segment is migrated to the chunk of storage. A status of the chunk of storage is maintained in a compression data segment bitmap.

2012-07-19

20120185649

VOLUME RECORD DATA SET OPTIMIZATION APPARATUS AND METHOD - A method for optimizing a plurality of volume records stored in cache may include monitoring a volume including multiple data sets, wherein each data set is associated with a volume record, and each volume record is stored in a volume record data set. The method may include tracking read and write operations to each of the data sets over a period of time. The method may further include reorganizing the volume records in the volume record data set such that volume records for data sets with a larger number of read operations relative to write operations are grouped together, and volume records for data sets with a smaller number of read operations relative to write operation are grouped together. A corresponding apparatus and computer program product are also disclosed.

2012-07-19

20120185650

CACHE DEVICE, DATA MANAGEMENT METHOD, PROGRAM, AND CACHE SYSTEM - A deleted cache determining part determines a cache data which is to be deleted from a data storing part in a case where a sum of a data amount of a data which is recorded to the data storing part and a data amount of a cache data which is stored to the data storing part and a data amount of a buffer data which is stored to the storing part is equal to or more than a predetermined threshold, and an accumulated data control part deletes the cache data which is determined by the deleted cache determining part from the data storing part.

2012-07-19

20120185651

MEMORY-ACCESS CONTROL CIRCUIT, PREFETCH CIRCUIT, MEMORY APPARATUS AND INFORMATION PROCESSING SYSTEM - Disclosed herein is a memory-access control circuit including: a prefetch-size-changing-command detection section configured to detect a command to change a prefetch size of data transferred from a memory to a prefetch buffer; a transfer-state monitoring section configured to monitor a state of transferring data between the memory and the prefetch buffer; and a prefetch-size changing section configured to immediately change the prefetch size in the prefetch buffer when the command to change the prefetch size is detected and no state of transferring data between the memory and the prefetch buffer is being monitored and to change the prefetch size in the prefetch buffer after completion of the state of transferring data between the memory and the prefetch buffer when the command to change the prefetch size is detected and the state of transferring data between the memory and the prefetch buffer is being monitored.

2012-07-19

20120185652

COMPUTER ARCHITECTURES USING SHARED STORAGE - A method providing a persistent common view of data, services, and infrastructure functions accessible via a plurality of shared storage systems of a virtual shared storage system. The method includes applying different governance policies at two or more shared storage systems of the virtual shared storage system. The method includes transferring content from a particular shared storage system to a requesting device without using at least one of a server session, an application-to-server session, and an application session. The content corresponds to at least one of data, a service, and an infrastructure function provided via the particular shared storage system.

2012-07-19

20120185653

COMPUTER ARCHITECTURES USING SHARED STORAGE - A method includes providing a persistent common view of data, services, and infrastructure functions accessible via one or more shared storage systems of a plurality of shared storage systems of a virtual shared storage system. The method includes applying different governance policies to two or more shared storage systems of the plurality of shared storage systems. The method includes restricting access to first content accessible via a first shared storage system of the plurality of shared storage systems based on a security level associated with a data consumer. The first content corresponds to at least one of first data, a first service, and a first infrastructure function.

2012-07-19

20120185654

SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM INCLUDING RANDOM CODE GENERATION CIRCUIT, AND DATA PROGRAMMING METHOD - A semiconductor apparatus includes a plurality of linear feedback shift registers configured to receive a plurality of seed codes as initial values and generate respective random codes under a control of a clock signal, a code combination section configured to logically combine the plurality of random codes generated by the plurality of linear feedback shift registers and generate a final random code, and a data conversion unit configured to convert input data based on the final random code and output conversion data.

2012-07-19

20120185655

DISK CONTROLLER CONFIGURED TO PERFORM OUT OF ORDER EXECUTION OF WRITE OPERATIONS - A controller for a disk drive includes first memory storing first write operations and second write operations received in a first order. A processor arranges the first write operations and the second write operations in a second order based on respective track sectors associated with the first and the second write operations. The second order is different than the first order. A memory controller transfers write operation data corresponding to the first write operations and the second write operations to a disk formatter in the second order in response to a single command from the processor.

SYSTEMS AND METHODS FOR RECOVERING ELECTRONIC INFORMATION FROM A STORAGE MEDIUM - In one embodiment of the invention, a method is provided for retrieving certain electronic information previously stored on certain storage media after a threshold set in the storage retention criteria has been exceeded in an electronic information storage system that stores electronic information on storage media in accordance with a storage retention criteria is provided. The method includes storing a record in a memory associated with a system manager that assigns the storage retention criteria to the certain electronic data, designating the storage media available for overwrite after the threshold set in the storage retention policy has been exceeded, identifying the certain storage media available for overwrite, and retrieving information from the certain media after the threshold set in the storage retention policy has been exceeded.

2012-07-19

20120185658

PERFORMING WRITING OPERATIONS USING A QUEUE OF AVAILABLE PAGES - A method for performing a write operation on a computer system having a main store, including a plurality of pages, and a backing store, the write operation including a processing step for processing data of the write operation and a writing step for writing the processed data to the backing store. The method includes reserving a set of pages, among the plurality of pages, in the main store, retrieving a required number of pages from the reserved set in accordance with the size of the data, processing the required number of pages of the data using the retrieved pages, writing the processed data to the backing store, and returning the retrieved pages to the reserved set upon finishing the writing.

USING A HEARTBEAT SIGNAL TO MAINTAIN DATA CONSISTENCY FOR WRITES TO SOURCE STORAGE COPIED TO TARGET STORAGE - Provided are a method, system, and program for using a heartbeat signal to maintain data consistency for writes to source storage copied to target storage. A copy relationship associates a source storage and target storage pair, wherein writes received at the source storage are transferred to the target storage. A determination is made whether a signal has been received from a system within a receive signal interval. A freeze operation is initiated to cease receiving writes at the source storage from an application in response to determining that the signal has not been received within the receive signal interval. A thaw operation is initiated to continue receiving write operations at the source storage from applications after a lapse of a freeze timeout in response to the freeze operation, wherein after the thaw operation, received writes completed at the source storage are not transferred to the target storage.

2012-07-19

20120185661

DOMAIN BASED ACCESS CONTROL OF PHYSICAL MEMORY SPACE - Domains can also be used to control access to physical memory space. Data in a physical memory space that has been used by a process sometimes endures after the process stops using the physical memory space (e.g., the process terminates). In addition, a virtual memory manager may allow processes of different applications to access a same memory space. To prevent exposure of sensitive/confidential data, physical memory spaces can be designated for a specific domain or domains when the physical memory spaces are allocated.

2012-07-19

20120185662

Limited use data storing device - Embodiments of methods and systems for controlling access to information stored on memory or data storage devices are disclosed. In various embodiments, methods of retrieving information from a data storage device previously deactivated by modification or degradation of at least a portion of the data storage device are disclosed.

2012-07-19

20120185663

Memory Interface Converter - A digital system is provided with a memory interface converter to couple a memory device that understands a type of command protocol to a memory controller that generates a different type of command protocol. The memory interface converter includes a first memory interface configured to couple to a host controller memory interface having a first signal protocol and a second memory interface configured to couple to one or more memory devices having a different second signal protocol. A decoder is configured to decode commands received on a command input port and to convert the received commands into commands for a command output port. A state machine is configured to emulate memory states according to the first signal protocol, and another state machine is configured to emulate memory controller states according to the second signal protocol.

2012-07-19

20120185664

Synchronous Global Controller for Enhanced Pipelining - The present invention relates to a system and method for adjusting timing of memory access operations to a memory block. In one embodiment, a controller may be in communication with a memory block. The controller may be adapted to adjust timing of a memory access operation to the memory block by extending a portion of a clock pulse to compensate for delay associated with the memory block. The delay may correspond to a predecoder delay or a global decoder delay. The clock pulse may be a read clock pulse or a write clock pulse. In one embodiment, the controller may be adapted to adjust timing of a read clock pulse differently from a write clock pulse

2012-07-19

20120185665

WIRELESSLY CONFIGURABLE MEMORY DEVICE - A configurable memory includes an interface section, a plurality of memory modules, and an internal configuration section. The interface section includes a millimeter wave (MMW) transceiver and interfaces with one or more external components. Each the plurality of memory modules includes a memory MMW transceiver and a plurality of memory cells. The internal configuration section includes a memory management unit and a memory management MMW transceiver. The memory management unit is operable to determine configuration of at least some of the plurality of memory modules to form a memory block, identify an interface MMW transceiver to provide a wireless link to the memory block, and generate a configuration signal based on the determined configuration and the identified interface MMW transceiver. The memory management MMW transmits the MMW configuration signal to the identified interface MMW transceiver and the MMW transceivers of the memory modules.

2012-07-19

20120185666

METHOD AND APPARAUTS FOR DATA STORAGE AND ACCESS - A query cache stores queries and corresponding results of the queries, the results of the queries being derived from a primary store. A differential store stores a pointer to data of the primary store which has changed and which affects the result of the queries stored in the query store. A new query may be satisfied by accessing the corresponding query in the query store and determining, by reference to the differential store, whether data relating to the query in the primary store has changed since the query store was compiled and, completing the new query, by accessing the corresponding data in the primary store, if applicable. Data in the differential store may be arranged and partitioned according to labels. The partitioning may be varied according to predetermined rules.

2012-07-19

20120185667

VIRTUAL-MEMORY SYSTEM WITH VARIABLE-SIZED PAGES - A method for managing a virtual memory system configured to allow variable-sized pages is provided. The size of a page is not required to be a power of two. Variable, arbitrarily-sized pages are mapped to a contiguous segment or virtual address space. The method also provides for efficient relocation, insertion, and removal of data in a virtual memory region. The method also provides virtual lookup-tables.

2012-07-19

20120185668

MEMORY MANAGEMENT UNIT AND APPARATUSES HAVING SAME - The memory management unit includes a page table correlating respective virtual addresses with corresponding physical addresses, first translation lookaside buffer (TLB) lookup logic that provides one of a first virtual address and a first physical address according to whether a page number of the first virtual address matches a frame number of the first physical address, a first queue buffer that stores and provides the first virtual address, and second TLB lookup logic that determines and provides a first page physical address using the first virtual address to access the page table when the page number of the first virtual address does not match the frame number of the first physical address.

2012-07-19

20120185669

PROGRAM INSPECTION METHOD AND NON-TRANSITORY, COMPUTER READABLE STORAGE MEDIUM STORING INSPECTION PROGRAM - A method has generating an access address information file from an access-destination address list including addresses of access destinations accessed by a program and access types indicating whether write access or read access is made to the individual addresses, generating a configuration-map constraint information file that includes the plurality of address ranges being included in a memory map that includes access attributes indicating whether read access or write access is permitted in the individual memory areas of the target apparatus, a page ID serving as identification information of the certain address range represented by the page and a constraint represented by an access attribute of the page, and inspecting, for each page ID, whether or not the access type for the page ID included in the access address information file contradicts the constraint represented by the access attribute for the page ID included in the configuration-map constraint information file.

2012-07-19

20120185670

SCALAR INTEGER INSTRUCTIONS CAPABLE OF EXECUTION WITH THREE REGISTERS - A processing core implemented on a semiconductor chip is described. The processing core includes logic circuitry to identify whether vector instructions and integer scalar instructions are to be executed with two registers or three registers, where, in the case of two registers input operand information is destroyed in one of two registers, and, in the case of three registers input operand is not destroyed. The processing core also includes steering circuitry coupled to the logic circuitry. The steering circuitry is to control first data paths between scalar integer execution units and a scalar integer register bank such that two registers are accessed from the scalar register bank if two register execution is identified for the scalar integer instructions or three registers are accessed from the scalar integer register bank if three register execution is identified for the scalar integer instructions. The steering circuitry is also to control second data paths between vector execution units and a vector register bank such that two registers are accessed from the vector register bank if two register execution is identified for the vector instructions or three registers are accessed from the vector register bank if three register execution is identified for the vector instructions.

2012-07-19

20120185671

COMPUTATIONAL RESOURCE PIPELINING IN GENERAL PURPOSE GRAPHICS PROCESSING UNIT - This disclosure describes techniques for extending the architecture of a general purpose graphics processing unit (GPGPU) with parallel processing units to allow efficient processing of pipeline-based applications. The techniques include configuring local memory buffers connected to parallel processing units operating as stages of a processing pipeline to hold data for transfer between the parallel processing units. The local memory buffers allow on-chip, low-power, direct data transfer between the parallel processing units. The local memory buffers may include hardware-based data flow control mechanisms to enable transfer of data between the parallel processing units. In this way, data may be passed directly from one parallel processing unit to the next parallel processing unit in the processing pipeline via the local memory buffers, in effect transforming the parallel processing units into a series of pipeline stages.

2012-07-19

20120185672

LOCAL-ONLY SYNCHRONIZING OPERATIONS - Performing a series of successive synchronizing operations by a core on data shared by a plurality of cores may include a first core indicating an upcoming synchronizing operation on shared data. A second memory layer stores the shared data and tracks the first core's ownership of the shared data. The second memory layer is shared via coherency operations among the first core and one or more second cores. The first core may perform one or more synchronization operations on the shared data without requiring interaction from the second memory layer.

2012-07-19

20120185673

RECONFIGURABLE PROCESSOR USING POWER GATING, COMPILER AND COMPILING METHOD THEREOF - Provided is a reconfigurable processor that may process a first type of operation in first mode using a first group of functional units, and process a second type of operation in second mode using a second group of functional units. The reconfigurable processor may selectively supply power to either the first group or the second group, in response to a mode-switch signal or a mode-switch instruction.

2012-07-19

20120185674

EXTENDING A PROCESSOR SYSTEM WITHIN AN INTEGRATED CIRCUIT - A method of extending a processor system within an integrated circuit (IC) can include executing program code within the processor system implemented within the IC, wherein the IC includes a programmable fabric. The processor system further can be coupled to the programmable fabric. A process can be performed using a process-specific circuit implemented within the programmable fabric in lieu of using the processor system. A result of the process from the process-specific circuit can be made available to the processor system.

2012-07-19

20120185675

APPARATUS AND METHOD FOR COMPRESSING TRACE DATA - An apparatus and method for compressing trace data is provided. The apparatus includes a detection unit configured to detect trace data corresponding to one or more function units performing a substantially significant operation in a reconfigurable processor as valid trace data, and a compression unit configured to compress the valid trace data.

HARDWARE THREAD DISABLE WITH STATUS INDICATING SAFE SHARED RESOURCE CONDITION - A technique for indicating a safe shared resource condition with respect to a disabled thread provides a mechanism for providing a fast indication to other hardware threads that a temporarily disabled thread can no longer impact shared resources, such as shared special-purpose registers and translation look-aside buffers within the processor core. Signals from pipelines within the core indicates whether any of the instructions pending in the pipeline impact the shared resources and if not, then the thread disable status is presented to the other threads via a state change in a thread status register. Upon receiving an indication that a particular hardware thread is to be disabled, control logic halts the dispatch of instructions for the particular hardware thread, and then waits until any indication that a shared resource is impacted by an instruction has cleared. Then the control logic updates the thread status to indicate the thread is disabled.

2012-07-19

20120185679

Endpoint-Based Parallel Data Processing With Non-Blocking Collective Instructions In A Parallel Active Messaging Interface Of A Parallel Computer - Endpoint-based parallel data processing with non-blocking collective instructions in a parallel active messaging interface (‘PAMI’) of a parallel computer, the PAMI composed of data communications endpoints, each endpoint including a specification of data communications parameters for a thread of execution on a compute node, including specifications of a client, a context, and a task, the compute nodes coupled for data communications through the PAMI, including establishing by the parallel application a data communications geometry, the geometry specifying a set of endpoints that are used in collective operations of the PAMI, including associating with the geometry a list of collective algorithms valid for use with the endpoints of the geometry; registering in each endpoint in the geometry a dispatch callback function for a collective operation; and executing without blocking, through a single one of the endpoints in the geometry, an instruction for the collective operation.

TRACER CONFIGURATION AND ENABLEMENT BY RESET MICROCODE - A microprocessor is provided with a reset logic flag and corresponding reset microcode that selectively enables the reset microcode to set up and enable debug logic before the microprocessor subsequently fetches and executes user instructions. When the reset logic flag is set to a debug mode, the reset microcode configures and enables the microprocessor's debug logic before the microprocessor subsequently fetches and executes user instructions. When the reset logic flag is set to a normal mode, the reset microcode refrains from configuring and enabling the microprocessor's debug logic. The reset logic flag is indicated by an alterable fuse or a debugger-programmable scan register. Debug configuration initialization values are also provided by several alternative structures, including the reset microcode itself, alterable fuses, and debugger-programmable scan registers. Corresponding methods are also provided for configuring the debug logic of a microprocessor.

2012-07-19

20120185682

METHOD AND SYSTEM FOR POST-BUILD MODIFICATION OF FIRMWARE BINARIES TO SUPPORT DIFFERENT HARDWARE CONFIGURATIONS - A firmware data processing system may be operable to allocate a configuration area in the firmware binary image file for customizable settings. During the firmware build process for the firmware binary image file, default configuration information may be inserted into this configuration area. This default configuration information may be either actual default setting values or indicator to use the default setting values. During post-build modification process, a separately created utility application may be operable to read in the original firmware binary image file, select new settings, and insert new configuration information into the configuration area. The utility application may also be operable to create a new firmware binary image file with reproduced checksums or other error detection mechanisms required for the original firmware binary image file, based on the new configuration information in the configuration area.

2012-07-19

20120185683

SYSTEM AND METHOD FOR TAMPER-RESISTANT BOOTING - Disclosed herein are systems, methods, and non-transitory computer-readable storage media for booting a computing device having an encrypted storage medium using full disk encryption, referred to as tamper-resistant boot. The system retrieves a kernel cache and a kernel cache digest from an unencrypted storage medium and verifies the authenticity of the kernel cache based on the credentials and the kernel cache digest. Initiation and execution of the operating system is performed if the kernel cache is authentic. In one embodiment, the system verifies the authenticity of a request to disable tamper-resistant booting by utilizing a password verifier and a password proof.

2012-07-19

20120185684

BOOTING A MOBILE ELECTRONIC DEVICE WITH A LOW BATTERY BASED ON A DYNAMIC BOOT THRESHOLD - A method, an apparatus, and a computer program product for booting the apparatus with a low-energy battery are provided. In a first configuration, the apparatus monitors a level of the battery while the battery is charging. The apparatus attempts a boot of the apparatus when the level is greater than or equal to a dynamic boot threshold. The apparatus increases the dynamic boot threshold when the boot is unsuccessful and repeating the monitoring and the attempting based on the increased dynamic boot threshold. In a second configuration, the apparatus detects a connection to an external power source. The apparatus attempts a boot using an FLCB protocol that is based upon power drawn directly from the external power source upon detecting the connection to the external power source. The apparatus attempts the boot as part of an ATC protocol when the boot using the FLCB protocol is unsuccessful.

2012-07-19

20120185685

DATA PROCESSING APPARATUS AND COMPUTER-READABLE RECORDING MEDIUM - Disclosed is a data processing apparatus providing a predetermined function by executing a program for the data processing apparatus, including a first storage unit that stores encoded execution starting data for starting execution of the program; a first decode key storage unit that stores a first decode key capable of decoding the encoded execution starting data; a start up unit that obtains the first decode key from the first decode key storage unit when turning on the power is accepted and decodes the encoded execution starting data by the first decode key to start executing the program; and an authentication confirmation unit that sends a request for authentication to an external apparatus after the start up unit starts executing the program and starts providing the predetermined function when obtaining an authentication result indicating the apparatus is authenticated from the external apparatus.

2012-07-19

20120185686

Method, Apparatus and Computer Program for Loading Files During a Boot-Up Process - Embodiments of the invention relate to a method, apparatus and computer program. More particularly, embodiments relate to identifying at least one new file to be loaded in a computing device during a boot-up process of said computing device. Also, determining if loading at least one of the identified new file(s) causes the computing device to crash. Also, updating a list on the computing device in dependence on whether the loading of the identified new file(s) causes the computing device to crash. Also, loading at least one file in the computing device during a boot-up process in dependence on the list, to prevent the computing device crashing during the boot-up process.

2012-07-19

20120185687

SEMICONDUCTOR DEVICE - A semiconductor device which can reduce the peak value of the rush current generated during a transition from resume mode to normal mode. The semiconductor device has a plurality of daisy-chained memory modules. Each of the memory modules includes a memory array, a switch for controlling, in resume mode, source voltage supply to a constituent element of the memory module, and a delay circuit which receives a resume control signal ordering a transition from resume mode to normal mode and outputs a resume control signal delayed from the inputted resume control signal to the memory module of the next stage.

2012-07-19

20120185688

PROCESSOR MODE LOCKING - Implementations of the present disclosure are directed to a method, system and computer-readable medium for operating a processor in a data processing apparatus in a first processing mode; setting one or more control bits of a control register of the processor to configure the processor to operate in a different second processing mode; providing a virtual register in a virtual machine executing on the data processing apparatus, the virtual register having one or more locking bits corresponding to the control bits of the control register; setting a value of the one or more locking bits of the virtual register; and in response to setting the value of the one or more locking bits, preventing the processor from being configured to operate in the first processing mode.