GPGPU Finds Its Groove in HPC

By Michael Feldman

September 21, 2010

The NVIDIA GPU Technology Conference (GTC) kicked off on Tuesday amid a flurry of news that suggests the GPGPU HPC business is quickly moving into the mainstream. After just four years since the introduction of commercial-grade GPU computing, the technology has become firmly established and is poised to spill out across every application domain that has a need for data-parallel computing.

At this stage, GPU computing technology is especially apparent in the high performance computing arena. As of today, nearly all the major and minor OEMs that serve this market have announced NVIDIA GPU-equipped systems, including IBM, Cray, HP, SGI, Dell, Appro, T-Platforms, Bull, Supermicro and Tyan, among others. NVIDIA, which used to offer its own standalone Tesla GPU 1U box (the S-series products), has exited the server business, apparently passing that task off to server maker NextIO. As of today, NVIDIA is only providing Tesla cards (C-series) and modules (M-series) to the market.

Actually, that’s not quite accurate. One new Tesla product that was indirectly announced this week is the X2070, an M-series variant specifically designed for challengingly-dense blade form factors. The new module takes up less than half the real estate of the M2070 board and, like it’s predecessor, has PCIe connectivity and uses a passive heat sink for cooling. The X2070 graphics chip is the same one used by the M2070, so has the same performance characteristics (515 DP gigaflops) and memory capacity (6 GB GDDR5). NVIDIA has made no formal announcement of the X2070. The only reason we know about it at all is because Cray and T-Platforms this week announced future blades based on the new Tesla.

Cray will add the X2070 as an option on its XE6 (“Baker”) supercomputer line. “This is something we feel is mature enough to be in a scalable production supercomputer system,” said Barry Bolding, vice president of Cray’s products division. At this point, the company is not releasing any information about the new blade design or even the availability date for the new offering, although Bolding did say that they’re aligning their shipping dates very closely with the release of the X2070. In other words, they’ll be ready when NVIDIA comes through with the hardware.

Russian HPC cluster vendor T-Platforms had a lot more to say about its upcoming Tesla X2070-based blade, which they’re calling the TB2-TL. Known for designing extra-dense blades, T-Platforms has managed to stuff 16 blades, consisting of 32 X2070 GPUs and 32 Intel Xeon CPUs (low voltage L5600 “Westmere” processors) into a 7U chassis. To maximize bandwidth, each X2070 is routed through an Intel 5520 North Bridge chip and has a dedicated single port QDR InfiniBand chip. A single enclosure delivers 17.5 peak teraflops. Like the Cray XE6, the TB2-TL is aimed at large clusters and petascale supercomputers.

According to Alexey Nechuyatov, director of product marketing for T-Platforms, they’re looking into the possibility of offering the TB2-TL in the US, most likely through a system integrator. Despite the presence of established US-based vendors with GPU-equipped blades, like Cray, IBM, and Dell, Nechuyatov believes the unique design of its new GPU offering (not to mention aggressive price point of around $300K per enclosure) could find an audience in the states. “We might be outnumbered,” he said, “but never outgunned.” T-Platforms is planning to make the TB2-TL available for the Russian market in Q4 2010, and for Europe in Q1 2011.

Adding to the GPU blade rush is IBM, who will be adding Tesla M2070 GPUs to its popular BladeCenter offering. NVIDIA is especially happy to have IBM sign on for another Tesla-based product, having added the iDataPlex dx360 M3 back in May. That product paired two Intel CPUs with two Tesla M2050 GPUs in a rackmount server. The new BladeCenter variant uses the HS22 as the base blade, to which up to four M2070 expansion blades can be added. At its maximum configuration, up to 7 GPUs can be placed in a 7U enclosure. It is expected to be available in Q4 2010.

On the software side, the developer community seems to be as enamored with GPU acceleration as the OEMs. NVIDIA estimates there are currently about 100 thousand active NVIDIA GPU developers today, from a standing start in 2007. Much of this activity is directed at HPC codes. Whether it’s in astrophysics, molecular dynamics, bioinformatics, or climate modeling, the level of impact in those communities is continuing to increase. Developers in these areas, and others, are porting their existing CPU-based codes or doing ground-up application development specifically targeting GPU platforms.

In climate and weather modeling, in particular, there are a range of models that are being targeted or retargeted to GPU platforms via CUDA. They include such codes as the Weather Research and Forecasting (WRF) model being developed at NCAR and elsewhere; the ASUCA Weather Model developed by Tokyo Tech and the Japan Meteorological Agency; and the Non-hydrostatic Icosahedral Model (NIM) at the NOAA. There are also major efforts for tsunami simulations, CO2 modeling, and ocean circulation codes being conducted on GPU platforms.

The CUDA development tools have been the key enabler for the whole ecosystem. Thanks to NVIDIA’s early dominance in GPGPU, CUDA C/C++ has emerged as the most widely used GPU programming environment for developers. There’s even talk now of targeting CUDA to CPUs, given that the language is inherently suited to multicore and manycore architectures. “To some extent, CUDA is becoming the most widely used parallel programming model,” said Sumit Gupta, senior product manager with the NVIDIA’s Tesla GPU Computing Group. “So if a university wants to teach parallel programming, they often end up doing GPU programming.”

Today, there are a number of attempts to create CPU ports of CUDA. There are two academic projects: one out of the University of Illinois, Urbana-Champaign called MCUDA, and another out of Georgia Tech called Ocelot. Now The Portland Group (aka PGI), has stepped up with a commercial CUDA CPU compiler. At GTC this week, PGI announced its intentions to offer a CUDA C for x86 development platform, which it hopes to demonstrate at SC10 in November.

If successful, developers will be able to write CUDA applications that can be run on either GPUs or CPUs. This, of course, was the whole idea behind OpenCL, the open standard language for multicore/manycore architectures. But since NVIDIA publishes the CUDA APIs, for all practical purposes it too is an open standard. Anyone — including AMD, by the way — could create a CUDA port for any processor with parallel hardware features. NVIDIA officially maintains it is agnostic regarding what people use to program their hardware, but the company’s enthusiasm for its home-grown CUDA software is abundantly clear.

CPU support aside, the GPGPU ISV community continues to gain momentum, as is evident if you peruse the exhibit hall and session list at GTC. Besides scientific computing, the technology has also expanded into business intelligence (Jedox Palo, Empulse Parstream and Milabra Display Ads), factory automation (Dalsa and MvTech), electronic design automation (Rocketick and Agilent), and ray tracing/rendering (Autodesk 3ds Max, Bunkspeed and Lightworks).

On Tuesday, ANSYS announced it had implemented GPU acceleration for its ANSYS Mechanical product, a widely used software package used for industrial designs. Using the GPU, they have realized a 2X speedup compared to its CPU-only implementation. That’s a fairly modest gain compared to 10x to 500X speedups some people claim for more science-heavy codes. But for industrial design, cutting simulation times in half is a big deal.

NVIDIA, itself, is using Agilent software for chip design, running the app on a small in-house GPU cluster. The company is also evaluating the GPU-accelerated Rocketick chip verification tool. Early results look promising according to NVIDIA’s Gupta. “We also use ANSYS Mechanical for our designs, and we’ll definitely use the GPU version of that,” he said, “So we’re eating our own dog food.”

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