Agreed. Atom simply cannot hold a candle to the Fusion platforms, and with awesomazing sub-5W quad core ARM chips on the way and Windows being ported to ARM...there's just too much superior competition in every potential Atom market, unless they give it a heavy makeover.

I'm all for an instruction set that doesn't require a license from a competitor.

The only way to get an X86 license these days is to create a technology so revolutionary that Intel needs it, but then patent it and trade the rights to that patent for a license. Hell, the only reason AMD hasn't been bullied out of the market is because they invented x86-64 and Intel's EM64T is literally a clone of AMD64.

But these days CISC is a superior architecture, considering its literally just a RISC core with a bunch of extra stuff tacked on. The extra complexity leads to larger power draw, but also a lot of speedup that would have to be handled by the RISC compiler or even the programmer.

Honestly, I can't see ARM leaving the ultra-portable scene. Anything that isn't severely battery limited will likely continue to run an X86 architecture.

What needs to happen is we need to get ARM, AMD, nVidia, Microsoft and probably VIA and Qualcomm into a room, lock the door, and not let them out until they form a new open standard instruction set to replace x86 and break free from Intel's chains.

What needs to happen is we need to get ARM, AMD, nVidia, Microsoft and probably VIA and Qualcomm into a room, lock the door, and not let them out until they form a new open standard instruction set to replace x86 and break free from Intel's chains.

I'm all for an instruction set that doesn't require a license from a competitor.

The only way to get an X86 license these days is to create a technology so revolutionary that Intel needs it, but then patent it and trade the rights to that patent for a license. Hell, the only reason AMD hasn't been bullied out of the market is because they invented x86-64 and Intel's EM64T is literally a clone of AMD64.

But these days CISC is a superior architecture, considering its literally just a RISC core with a bunch of extra stuff tacked on. The extra complexity leads to larger power draw, but also a lot of speedup that would have to be handled by the RISC compiler or even the programmer.

Honestly, I can't see ARM leaving the ultra-portable scene. Anything that isn't severely battery limited will likely continue to run an X86 architecture.
What needs to happen is we need to get ARM, AMD, nVidia, Microsoft and probably VIA and Qualcomm into a room, lock the door, and not let them out until they form a new open standard instruction set to replace x86 and break free from Intel's chains.

I'm all for an instruction set that doesn't require a license from a competitor.

The only way to get an X86 license these days is to create a technology so revolutionary that Intel needs it, but then patent it and trade the rights to that patent for a license. Hell, the only reason AMD hasn't been bullied out of the market is because they invented x86-64 and Intel's EM64T is literally a clone of AMD64.

But these days CISC is a superior architecture, considering its literally just a RISC core with a bunch of extra stuff tacked on. The extra complexity leads to larger power draw, but also a lot of speedup that would have to be handled by the RISC compiler or even the programmer.

Honestly, I can't see ARM leaving the ultra-portable scene. Anything that isn't severely battery limited will likely continue to run an X86 architecture.

What needs to happen is we need to get ARM, AMD, nVidia, Microsoft and probably VIA and Qualcomm into a room, lock the door, and not let them out until they form a new open standard instruction set to replace x86 and break free from Intel's chains.

CISC isn't better than RISC. Anymore, it is at a disadvantage because its complex instructions take extra time and power to decode. This die space and power consumption could be better used for increasing processing power or lowering TDP. CISC only exists because RISC used to use too much RAM.

Remember, there is a huge cost for creating and optimizing a new architecture. This ISS would need to be a VLIW or RISC architecture. Intel already has the Itanium EPIC architecture (VLIW) and could open it up if they wanted. VLIW offers what is probably the best performance per unit; however, because VLIW is very dependent on having a good compiler, I don't know if that is something the industry would want to count on (VLIW is the reason why ATI can get large performance gains with a few driver optimizations). The SPARC architecture is also open and is a RISC architecture. The problem isn't creating a new open architecture, the problem is spending billions or even trillions to recompile, re-optimize and reprogram everything.

I think that Intel's level of "scared" will depend on how good bulldozer is. Intel faces ZERO competition from ARM in the over 10w TDP category and doesn't have competition (besides AMD) until it reaches the HPC 180w+ TDP range (POWER, AMD, and SPARC primarily). If ARM increases its performance, little things like faster memory controllers, higher clockspeeds, more instructions/clock, etc will erode most of ARM's power efficiency advantage. If bulldozer is significantly better than the core2 architecture, then Intel will be scared.Edited by hajile - 2/20/11 at 7:10am