Speeding Up NMOS

By Ed Sperling
For years—decades, in fact—the NMOS transistor world has been on cruise control. NMOS is naturally faster and its performance has scaled better than PMOS.

PMOS has had a cost advantage. But lately, it has been catching up in performance, too. In fact, at 20nm the two transistor types have proven nearly equal in performance—but not for long. NMOS is about to get a big boost.

The solution for NMOS, it turns out, is much finer control of how materials are deposited on these devices—the same approach that helped improve performance in PMOS transistors. The key is in selective doping, which has been used for PMOS transistors to reduce resistance. As it turns out, by applying the same techniques to NMOS, the same kinds of performance gains can be achieved.

“This is the first time we’ve needed housekeeping on the NMOS side,” said Kathryn Ta, managing director for strategic marketing in Applied Materials Silicon Systems Group. “Things have improved so much on PMOS that we have had to address NMOS.”

This is particularly useful for improving performance in mobile electronics applications, because scaling features is no longer providing the same kinds of benefits. While finFETs and fully depleted silicon on insulator help control the leakage—thereby allowing chipmakers to boost the clock speed—they do little to actually improve the performance of the transistors themselves. That requires a materials approach, and selective deposition of new materials—in the case of NMOS, phosphorus and carbon—results in a 20% performance boost without increasing leakage, according to Schubert Chu, product unit head at Applied Materials.

“At 16nm and 10nm you’re going to see additional epi-related applications,” said Chu, noting that likely will require III-V materials for NMOS and IV materials for PMOS.