Silicon photonics has emerged as a promising solution to realize high performance computing (HPC) systems required in the Big Data era. Having various applications in the domains of HPC, data centers, sensors and bio-sensing, aerospace, etc., it has attracted researchers from academia and industries in different fields to explore different benefits and challenges of this technology. As an emerging area, it demands multidisciplinary collaborations and contributions, from material science and engineering, to realizing low-loss CMOS compatible components, as well as software CAD and design tools to explore the design space of the resulting complex devices and systems.

The North American Workshop on Silicon Photonics for High Performance Computing (SPHPC) is bringing together experts in Silicon Photonics and in High Performance Computing (HPC architects, interconnect architects, HPC systems modeling) to discuss the needs for Silicon Photonics based HPC interconnects, and the main challenges that must be addressed to accelerate their development. It is comprised of invited talks of the highest caliber from both academia and industry as well as from different disciplines. This is the event for meeting professionals in the field as well as exchanging and exploring new ideas.

In general, we expect to address and discuss the following questions at SPHPC:

Are 200G or 400G links and switches absolutely required in the next years? Or can double- or quad-rail 100G be satisfying solutions?

Is the lack of interconnect bandwidth really an obstacle for HPC system scaling?

Are parallel programmers bracing for bandwidth scarce environments (as they are preparing for the end of Moore’s Law)? Or are they betting on progresses in photonics?

Is low $/Gb/s the only goal or are there other metrics to optimize for, e.g. bandwidth density, energy efficiency?

Are HPC system architects well aware of the true potential, and true limitations, of silicon photonics?

Do silicon photonics experts understand well what is and isn’t required for HPC interconnects?

Is interconnect power consumption an important issue? Or is it dominated by the cost issue anyway?

SPHPC offers a number of free registrations to graduate students working in the area of silicon photonics and high performance computing. Graduate students should submit a one page summary including: 1) short summary of their Ph.D. thesis project; and 2) a paragraph describing how attending SPHPC would improve and help their thesis project.

Please submit the one page summary along with your CV (single PDF file) on EasyChair (Submit your One Page Summary) by April 25, 2018 May 5, 2018. The submission title should be “STUDENT NAME_AFFILIATION_SPHPC2018”.