Abstract

Existing low power testing techniques either focus on reducing the switching activity neglecting supply voltage, or perform supply voltage scaling without attempting to minimize switching activity. In this paper we propose LPScan (Low Power Scan), which integrates supply scaling and switching activity reduction in a single framework to reduce test power. For a shift frequency of 125MHz, the LPScan algorithm when applied to circuits from the ISCAS, OpenCores and ITC benchmark suite, produced power savings of 80% in the best case and 50% in the average case, compared to the best known algorithm [1]