The Khronos Group - a non-profit industry consortium to develop, publish and promote open standard, royalty-free media authoring and acceleration standards for desktop and handheld devices, combined with conformance qualification programs for platform and device interoperability.

Altera Corporation today announced its OpenCL for FPGAs Early Access Program (EAP), enabling customers to get a first look at Altera's OpenCL for FPGA solution. Altera has partnered with Acceleware to offer a course titled "OpenCL for Altera FPGAs" which provides detailed training on the OpenCL language and how to use it with Altera FPGAs. The course is available for OpenCL EAP customers only and will be held in a variety of regions.
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FPGA is a large array of fine-grained programmable elements that can be configured in such a way to efficiently solve many complex problems. The primary method of design entry for FPGAs is through Hardware Design Languages (HDLs) such as VHDL or Verilog. This talk by Deshanand Singh of Altera, at the FPL2012 conference, explores techniques o program FPGAs at a level of abstraction that is closer to traditional software-centric approaches using OpenCL.
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AnandTech takes a look at Altera's OpenCL SDK for their FPGA. Altera introduced a private beta for OpenCL on FPGAs late last year and the SDK has now been made public. Altera's implementation is built on top of OpenCL 1.0 but offers custom extensions to tap into the unique features of FPGAs.
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Altera announced that its SDK for OpenCL is conformant to the OpenCL 1.0 standard and is now included on the Khronos Group list of OpenCL conformant products. Altera is the only company to offer an FPGA-optimized OpenCL solution, allowing software developers to harness the massively parallel architecture of an FPGA for system acceleration. Altera will demonstrate its OpenCL solutions at the 2013 Linley Processor Conference, being held October 16-17 in Santa Clara, Calif.
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An informative 25 minute introduction on how to program Altera FPGAs with OpenCL. Presented by Acceleware, the webinar begins with an overview of the OpenCL programming model and data parallelism, before discussing simple OpenCL syntax, kernels and memory spaces. The second part of the webinar examines how OpenCL is mapped to Altera FPGA architecture and how to compile an OpenCL kernel. The presentation concludes with a summary of OpenCL optimizations techniques.
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Altera has published a new whitepaper written by Acceleware, which compares OpenCL programing on GPUs and Altera FPGAs. The paper provides a brief overview of the OpenCL programming model and then focuses on how OpenCL kernels are executed on Altera FPGAs compared to GPUs. The key differences in optimization techniques for targeting FPGAs is also presented.
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Altera Corporation announced Electronics Weekly magazine selected the Altera SDK for OpenCL as its design tool of the year at the annual Elektra European Electronics Industry Awards gala in London. These accolades represent the latest in a series of awards and recognitions the Altera SDK for OpenCL has received since its release in 2012. Today, Altera offers the industry's only OpenCL-conformant solution that allows software programmers to easily implement OpenCL applications on FPGA accelerators.
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