PART 1IntroductionFeeling somewhat curious about the reports that inferior Thermal Interface Material (TIM) ships from the factory inside Ivy Bridge (IB) chips, I found myself taking my new 3770K out of the safety of its socket this afternoon and on to my desk where it went under the knife. About 15 min later, I finalized the divorce of its Internal Heat Spreader (IHS) and its Printed Circuit Board (PCB). It was surprisingly simple to do; a standard razor blade (0.009") and a little bit of patience was all that was required. After cleanup and application of fresh TIM, I sought to put a nice story together for you readers covering how to do procedure yourself and sharing my results and the methods used to arrive at them.

Removing the IHS from an i7-3770KMaintain a level blade and gently insert it between the green part of the chip (PCB), and the silver part (IHS). I found it best to start on a corner. From what I've read, care needs to be taken not to scrap the PCB, as key parts of the chip reside very close to the surface. Slowly and gently, rock the blade between the two until it penetrates. Then slide it around the perimeter. See the pics to visualize the die so you don't push the blade in too far. The IHS will come off easily once you have completed severing the glue which is removed with gentle scraping with credit card or finger nails; isopropyl alcohol doesn't help much. When finished cleaning up both pieces, apply TIM to the die, place it back in the MB, and gently place the IHS on it. Lock it into place in the MB with the mounting bracket that will hold the IHS to the chip securely thus keeping you from having to glue down the IHS.

I'm a pretty big fan of Arctic Silver 5 (AS5) and used it both on the die, and on the outside of the IHS. My "factory" configuration had a good 120 h of load/idle cycles on it. As you probably know, AS5 has a breakin period associated with it...200 h according to Arctic Silver Incorporated. One can argue that this claim is valid based on the delta temp data.

Data Collection and AnalysisI wanted to generate robust and statically valid conclusions about the efficiency of entire process; results are drawn from a fairly large data set looking at the populations of temperatures and VID values. Temps and vcore values were collected via lm-sensors driven by a simple shell script which queried it every 2 sec logging the results to a file (see the end of this section for the script).

These data were annotated and distributions were analyzed to see if the different TIMs under the IHS really makes a difference. Note that there are too many variable to control for this sort of analysis to be 100 % iron clad. For example, TIM spreading variations, mounting techniques, variations in hardware, etc. Even room temp can't be rigorously controlled. My office is air conditioned and ranged from 75-77 F when I ran the stress tests. In retrospect, I would have located the PC in my basement which has very consistent ambient temps but hind sight is always 20/20!

Methods of StressingI use linux, but key stress testers are cross platform. Intel BurnTest for windows is based on linpack from Intel which is available for many platforms. The settings I used were 25k problem sizes and 25k leading dimensions with 4 KB alignment.

On top of linpack, I ran a compile job looped in the background (nice=19) set to use 8 threads to further scarfs-up any unused CPU cycles.

System Specs and SettingsAsus P8Z77-V ProIntel 3770K @ 45x100Cooling is an NH-D14 with both fans; my system manages their speed but they are both running on max for the stress tests (1,200 RPM for the 140mm and 1,300 RPM for the 120mm).

The BIOS is running using a vcore in offset mode so the vcore is automatically controlled by the BIOS and is dependent on load. Mine is stable with a setting of +0.0200 and here are the other key voltages and settings in case you're wondering:

ResultsI ran the stress test described above for ~2 h period and used the geometric mean of the temps per core as the "average" temperature over that time period. I repeated this for a total of 4 nights, but lost the data on day 1 due to an overwrite on my part! Here are the average corresponding temps per day; there is a nice decrease out to day 3 where it more or less plateaus off. Perhaps that is the AS5 "breaking-in." Also note the error bars correspond to the measured ambient temp which ranged between 75-77 F or 1.1 C. You can see that some values at day 3 and 4 are not different when accounting for this:

As well, here is a plot of the delta temp, that is, the values subtracted from the stock results indicating the magnitude of temperature decrease:

And to be sure this horse has been beaten well after it died, here are the results compiled in a table:

ConclusionFor this example, a decrease in load temps was observed after delidding an Intel 3770K and replacing the factory TIM with AS5. The magnitude of the temperature reduction was not even across all cores, and ranged for -2C to -12C. The data are consistent with Arctic Silver Inc.'s claim that the TIM requires a break in period. This has to be one of the cheapest modifications to gain lower operating temperatures which can be converted into higher voltage and likely higher clock rates. The unevenness of the decrease is puzzling. Since the overall rank order of temps was retained after the TIM replacement, perhaps it has to do with some physical unevenness in the IHS, in the base of the HS, or on the CPU die itself. Investigating this is beyond the scope of this exercise.

PART 2IntroductionThe above analysis was conducted using both a non-lapped IHS on the CPU and a non-lapped heatsink. I have since lapped both parts and repeated the experiment. My results seem to confirm that lapping these CPUs give minimal albeit real benefits. Others have reported no gains.

Lapping PartsThe process of lapping in detail will not be reviewed here, but in summary, one uses wet/dry sandpaper and a flat surface (glass usually) to slowly and iteratively grind an uneven surface. The goal of lapping is not be to make a mirror surface, rather, it is to make flat surface.

As evident in the photos, the IHS on this 3770K was quite concave, that is, higher in the middle than elsewhere. "Flatness" was achieved in this case when no more silver color remained on the IHS.

Stress TestingIn addition to the linpack+gcc method described above, mprime (this is the linux version of prime95) running large FFTs was coupled with the same gcc compile stress to give another endpoint. By default, mprime runs with a background nice level (nice=19) and gcc ran with priority (nice=10). This is in contrast to the linpack+gcc setup where linpack ran with a higher priority and gcc ran with a background priority. This was by design.

In the linpack stress, gcc was employed to add further stress since linpack does not stress all cores evenly during a given run. In contrast, mprime does a very efficient job leveling load across all cores for a given calculation. Here gcc was given priority over mprime since the very nature of compiling code will lead to uneven usage.

ResultsRather than showing a per-core analysis which would make for a rather busy graph (4 cores x 2 conditions), a more simplistic "Lapped" and "Non-lapped" average results across all 4 cores is shown for each of the stress methods:

The delta temp spread for the averaged results ranged from 0 to -9 for the mprime+gcc experiments and from -1 to -12 for the linpack+gcc experiments.

Each line is relate to the factory TIM/unlapped result represented by the y=0 dashed black line. Again, these are delta temps which are relative to that factory result. The pink line shows the average drop in temp across all 4 cores for the unlapped results while the blue line shows the average drop in temps across all 4 cores for the lapped IHS and for the lapped HS. The data show a real but trivial difference after lapping both parts for most days. The exception being in the linpack+gcc stress on day 3. Here the average deltas are within error of each other based solely on the fluctuation in ambient temp.

ConclusionBased on these data, lapping an i7-3370K and the heatsink used to cool it produces minimal benefits in heat dissipation gains.

Last edited by graysky on Sat Aug 04, 2012 5:37 am, edited 12 times in total.

In my experience of AS5 yes there is def a break in period and it's not short either. But it does drop down when you hit that.I would have tried a thermal compound that didn't need a break in period I've tried Gelid GC-2 and MX-4 I would say both are close to the performance of AS5 without the break in period, some might argue they are a tad better that is open to debate field use says to me the differences are very small if notable at all.

Nothing wrong in using AS5, but not ideal unless you can def go to the break in period and then look at it.

Congratulations, you beat Idontcare to this! Brave man you are, I didn't yet buy an Ivy because I want to delid but felt unsecure.IMO the MX-4 wold have been a better choice, that's what I plan to use. AFAIK the MX-4 is better and supposed to last longer than AS-5.A possible explanation for the uneven gain in temps could be uneven distribution of the AS-5 inside the heatspreader.But to confirm this or not you'd have to do all this again, and maybe get worse temps.

Thanks again for the experiment. While there was a lot of variation in temperature decrease between the cores, the worst core temp still went from 80C to 73C. Impressive. It makes you wonder wtf the decision making process was at Intel to use this crappy thermal compound....

It wouldn't make sense for them to cheap out with compound esp as they have to offer a warranty on these processors.No idea but I supposed maybe you save 50cents per CPU for compound and well you add that up over a lot of CPU's and it's a nice bit of cash saved! That's how some companies operate bottom line margin all the way.

I'm just picking a figure out of the air maybe it's another reason I can't think of one right now though!You'd think the quantities Intel buy thermal paste at and well you would get a nice discount from the manufacturer.

3) Considering the die's shape, I suspect that heatsink orientation could make a difference. If your D14's heatpipes run parallel to the core, the outer pipes might not do much. Would you be willing to test this?

This is what I like to see, proper testing. I had no idea there would be a problem of this magnitude, as I know very few people who use i7s, but sure enough here is a very thorough study of the issue. Thanks for doing this for the good of all.

As to the question "why", I have couple of ideas. Intel using sub-par greese due to cost reasons does not seem very likely, as others have explained. Instead:

1) Tolerances and gap between IHS and the die. The reason CPUs nowadays have IHS in the first place is to protect the CPU die; under no circumances may the IHS press so tightly against the die the die breaks. Because we're talking about small fractions of millimeters here, it's very hard to mass manufacture metallic parts that would be just the right size in every case; this means Intel has to leave a bit larger than ideal gap to avoid having to replace CPUs due to die breaking even when the IHS assembly gets closer to the die than on average.

When you replaced the thermal grease, you also removed a very thin layer of the rubber between IHS and the PCB - this fraction might mean your IHS is now closer to the die and thus more vulnerable to breaking if worst comes to worst, but also reducing the thermal resistance between IHS and the die.

2) Position of the IHS. As your IHS is now not fixed to the PCB, it can move tiny amounts in sideways directions. When you apply pressure to the IHS by tightening your cooler, the IHS has more freedom to move to optimal position, which again takes it closer to the die and increases the risk of die breaking.

3) IVB core being long and narrow. When the area is the same, long and narrow object twists and breaks more easily than square object. It's possible Intel needs thus larger tolerances for the IHS to avoid die damage.

4) Long-term properties of the greese. It is possible Intel has had CPUs returned to them because thermal greese went bad over years and this has made them stick to a greese where long-term behaviour is known.

Thanks for the additional data. I'd modify the conclusion to say it produces minimal benefits in heat dissipation gains for this particular cooler. Other coolers may have significantly poorer base flatness/fit.

One thing with the lapping is that the tight metal frame of the LGA socket may also bend the IHS slightly. Ie. it's not 100% certain completely flat IHS gives best results. Per my understanding the LGA socket frame is of harder metal than IHS and the pressure applied is high, whereas IHS is almost pure copper and thus gives in easily.

I was able to drop my vcore offset from +200 mV down 150 mV to +5 mV and have a stable system as evaluated by: 5 h of mprime large/FFTs, 2 h of continuous compiling, 2 h of systest 64M, and 2 h of linpack+gcc. Lower operating temps have their tangibles. This is @ 45x100. I'll now switch over to 47x100 to see if I can drop the vcore by a proportional amount and might try 48x100. Just wanted to update.

But all those tests involve the tim placed on the plate over the actual chip as opposed to underneath that plate.

For example, you might have only one tenth of a millimeter of TIM on top of the plate, but maybe 2 millimeters under neat it.

I just made up these thicknesses for the purposes of illustration. I don't know what they are in reality. I just want to point out you are dealing with apples and oranges here. And in fact I don't think I would ever personally attempt such an operation on my own CPU. It looks too tricky for me.

I apologize to graysky for linking the (other) thread at Anandtech, but it's even better documented:http://forums.anandtech.com/showthread. ... &t=2261855Someone claims that by replacing the MX-4 with Liquid Ultra, he got another 8 degrees lower temps.To me this is kind of risky, Liquid Ultra may be conductive, it also 'eats' some metals.

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