Podcast

Video

It is one of the world's most sophisticated pieces of silicon microcircuitry, custom-built by Cisco Systems to be the massive brainpower necessary for making modern communications happen.

The Cisco QuantumFlow Processor is the "engine" for the company's breakthrough networking device, the Aggregation Services Router (ASR) 1000 Series. Soon, the ASR 1000 will be sending digital content around the globe, making video clearer, data faster, music sweeter, and the Internet even more interesting.

The company says the QuantumFlow Processor, which runs at greater than 1-gigahertz speeds, gives the ASR 1000 several orders of magnitude greater performance than any router in its class, especially when carrying out more complex tasks.

The chip set is as advanced as any silicon circuitry ever made, containing 40 integrated core processors and 800 million transistors. Multi-core chips like the QuantumFlow harness together multiple processors onto one semiconductor, effectively increasing their collective capabilities like horses pulling a wagon.

That's a huge advantage, considering that most networking chips can only handle one packet stream or "thread" at a time. The QuantumFlow Processor, however, is able to handle four threads per each of its 40 cores, making it possible to manage 160 digital packets at once.

But getting all these separate "conversations" working harmoniously together is no simple task. "That's an N-squared problem," says Stefan Dyckerhoff, vice president and general manager of Cisco's Midrange Router business unit. "And that's where Will Eatherton and his group of engineers provided the necessary technological advances."

A NEW APPROACH TO SILICON

Based on the success of his previous work for the company's last milestone product, the CRS-1, company executives asked Eatherton to head a team to do what Cisco has never done: design every aspect of a high-end microprocessor in-house. "That was the mission," Eatherton says. "It definitely was not a turn-the-crank kind of project."

By directly controlling all facets of the chip set's development, Eatherton says Cisco was able to optimize the QuantumFlow Processor for the specific demands of today's Internet protocol (IP) networks, specifically tuning the silicon to offer much improved support for complicated video and audio communications. "By doing it ourselves and tapping our networking expertise, we were able to get the QuantumFlow to do many more tasks much faster than any router processor ever made," he says.

Eatherton's team, for example, pioneered new algorithms and architectural designs for more efficiently coordinating how a multi-core chip manages all the parallel traffic flowing through it. In another innovative step, the group wrote the QuantumFlow's software in the widely used programming language "C", which makes it much easier and faster for Cisco and its customers to turn on new features and services with the ASR 1000.

The QuantumFlow chip set, which contains 40 patented technologies, provides Cisco's new router with the crucial horsepower needed to run "stateful" features with no loss of speed. A stateful connection is when a router or other networking device keeps track of an entire packet stream and can recognize which digital packets of information belong with which other packets, where those are supposed to go, and what, exactly, they are supposed to do.

Most Internet routers until recently have been "stateless" and treated each packet in isolation. While the advantages of stateful features are obvious to network managers, the problem has been with designing routers that are smart enough and powerful enough to juggle all of these tasks without dropping the proverbial ball (or packet, in this case).

This wasn't such a big problem when the Internet was just a simple pipe pumping data from one computer to another. But these days, everyone is multitasking. Modern IP networks now not only shepherd massive amounts of information but also handle telephone calls, streaming music, instant messaging, and the most demanding traffic of all, video. Add the complexities of wireless communications, and routers these days have a tough job.

Until now, there has been more or less an even trade-off between router speed and feature capability. "In many cases, network managers would only turn on certain features for brief periods so they wouldn't slow down the network," Dyckerhoff says. "But, obviously, that's not ideal."

A COSMIC MOMENT

The QuantumFlow project didn't start out with the ASR 1000 series router specifically in mind. Rather, Cisco simply asked Eatherton, a Cisco Distinguished Engineer, to design the technology that could power the multimedia communications networks of the 21st century.

Michael Beesley, the architect behind the ASR 1000, says it was a "cosmic moment" when he heard what Eatherton's team was up to. "I was positively giddy, like a young child," Beesley says. "Whilst I had defined what the processor had to do, I didn't really define what was inside that box. I then met Will, and he said 'I have this microprocessor, and it's looking for a product.' Unbeknownst to each other, we had been coming at the problem from two directions at the same time. I was proclaiming to the world that we were going to build the world's best router, but Will and his team made it true."

Eatherton's group powered on the QuantumFlow Processor in February 2007. Engineers who had been working on the project flew in from the around the world as the team methodically put the chip set through its paces.

Any significant problems in the silicon design at this point would have been devastating, requiring at least a nine-month delay to produce a new processor. Unlike software, chip development is like chiseling a novel into stone. It takes a lot of time and edits are not viable. "We were on pins and needles," Eatherton says. "People were living at Cisco for the first month or two. That was an exciting time as layer by layer the system lit up."

It definitely was not a turn-the-crank kind of project.

Will Eatherton

When the chip set, nicknamed "Popeye" and "Spinach," tested clean in record time, the team knew it had indeed achieved all it had hoped. Eatherton, who views the QuantumFlow Processor as the culmination of his career, says Cisco's increasing focus on advanced silicon design paid off in spades. "It was a long time in the coming," he says. "The QuantumFlow was really an extension of what we have learned over the past 10 years."

Cisco also made two crucial acquisitions to bring in the expertise required to design the chip set completely in-house. In 2002 it purchased Navarro Networks, a 25-employee company in Plano, Texas, that specialized in high-performance microchips for networking. The QuantumFlow Processor and ASR 1000 efforts also benefited from the acquisition in 2004 of Procket Networks, a start-up focused on building big and powerful routers for managing the central pipelines of digital communications.

Such a blue-sky effort required a steadfast commitment from Cisco. With more than 100 engineers working on the project for more than five years, the QuantumFlow Processor cost roughly $100 million. Just to get the effort off the ground, Eatherton and his team spent more than a year hashing out ideas and running "what-if" simulations while testing theories of how to best build a chip to take on the multi-tasking demands of modern networks.

At times, Eatherton worried that Cisco might not be able to stomach the risks of such an ambitious project, eventually losing faith somewhere along the way. But that never happened.

Eatherton, a marathon runner who opted into electrical engineering because physics didn't seem challenging enough, is certainly glad Cisco had as much faith in him as he had in his idea for a new era in networking. "We had a meager beginning and some folks even laughed at us," he says. "I think you have to be a little naive and a little optimistic to pursue something like this that's never been done. But eventually our group took hold and we made it through to the end. I may be a little biased, but I think it turned out pretty well."