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ENGN3213: Digital Systems and Microprocessors L#8 5 CMOS gates Gates are very easy to build using MOSFET transistors (recall; transistors can be considered as a voltage controlled switch) p-type conduct when the input=0 n-type conduct when the input=1

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ENGN3213: Digital Systems and Microprocessors L#8 7 Review of Gate Processing A NOT gate inverts its single input An AND gate produces 1 if both input values are 1 An OR gate produces 0 if both input values are 0 An XOR gate produces 0 if input values are the same A NAND gate produces 0 if both inputs are 1 A NOR gate produces a 1 if both inputs are 0

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ENGN3213: Digital Systems and Microprocessors L#8 8 Can combine gates To make different logic outputs B A out

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ENGN3213: Digital Systems and Microprocessors L#8 10 INPUTOUTPUT ABA AND B 000 100 010 111 In order for the Output of an AND Logical Function to be TRUE: input A AND input B must both be TRUE. This is Positive Logic. Using the Same Function -It is also correct to say: If either input A OR input B (or both) is NOT TRUE the Output Will be FALSE. This is Negative Logic. Positive vs Negative Logic A B Out

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ENGN3213: Digital Systems and Microprocessors L#8 12 SOP and POS Any logical expression can be reduced to either a "Sum-of-Products" form or a "Product-of-Sums" form

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ENGN3213: Digital Systems and Microprocessors L#8 13 DeMorgan's Theorem Proof Duality between AND and OR means that any logic function can be implemented by using just OR and NOT gates (NOR), or by just AND and NOT gates (NAND) "break the line, change the sign"

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ENGN3213: Digital Systems and Microprocessors L#8 14 CMOS NAND gate The NAND gate is by far the most important It is cheapest to construct It can be used to produce all other logic operations

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ENGN3213: Digital Systems and Microprocessors L#8 15 CMOS NAND gate The NAND gate is by far the most important It is cheapest to construct It can be used to produce all other logic operations XOR

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ENGN3213: Digital Systems and Microprocessors L#8 16 NAND Gate Implementation De Morgan’s law tells us that is the same as By definition, is the same as  All sum-of-products expressions can be implemented with only NAND gates.

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ENGN3213: Digital Systems and Microprocessors L#8 28 Design Considerations In addition to logic functions, a designer must be concerned with a number of physical characteristics of digital logic circuits, including the following: –Propagation delays –Gate fan-in and fan-out restrictions –Power consumptions –Size and weight.

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ENGN3213: Digital Systems and Microprocessors L#8 29 Programmable Arrays of Logic Gates Until now, we learned about designing Boolean functions using discrete logic gates We will now describe a technique to arrange AND and OR gates (or NAND and NOR gates) into a general array structure Specific functions can be programmed Can use programmable logic arrays (PLA) or programmable array logic (PAL)

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ENGN3213: Digital Systems and Microprocessors L#8 32 Programmable Logic Device Basic Ideas of PLD – A PLD consists of an array of AND gates and an array of OR gates – Each input feeds both a non-inverting buffer and an inverting buffer to produce the true and inverted forms of each variable. (i.e. the input lines to the AND-gate array) – The AND outputs are called the product lines – Each product line is connected to one of the inputs of each OR gate – Three fundamental types of standard PLDs: PROM, PAL, and PLA

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ENGN3213: Digital Systems and Microprocessors L#8 33 PALs and PLAs Pre-fabricated building block of many AND/OR gates (or NOR, NAND) "Personalized" by making or breaking connections among the gates Programmable Array Block Diagram for Sum of Products Form

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ENGN3213: Digital Systems and Microprocessors L#8 35 Programmable Read-Only Memory (PROM) Each possible minterm AND gate is present (fixed AND) plane and configurable OR plane Can use it to do address decoding Can also be use to implement logic functions

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ENGN3213: Digital Systems and Microprocessors L#8 38 Implementation of ROMs ROM can be implemented using orthogonal arrangement of wires –optional connection at each intersection –decoder puts logic ‘1’ on exactly one of the horizontal wires - this can be detected at output if connection present Some PROMs are configured by breaking connections –high voltage placed across one input and one output at a time –high current flow causes “fuse” at intersection to “blow” Other PROMs can be erased and reprogrammed (EPROMs) stored functions –  m (0,1,3,4,6),  m (0,1,3,5,7),  m (2,3,6,7),  m (0,3,4,6)

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ENGN3213: Digital Systems and Microprocessors L#8 43 Field Programmable Gate Arrays FPGA roots are in the CPLDs of the 1980's Invented by Ross Freeman (co-founder of Xilinx) in 1984. FPGAs can be used to construct more complex circuits Applications of FPGAs include DSP, aerospace, defense systems, computer vision, speech recognition, cryptography etc. FPGAs especially find applications in any area or algorithm that can make use of the massive parallelism offered by their architecture. Chip contains a large number (1,000s to 100,000s) of configurable building blocks CAD tools map high level circuit to basic blocks, configuring function generators & other configurable elements as needed

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ENGN3213: Digital Systems and Microprocessors L#8 44 FPGA An FPGA contains both logic blocks and programmable routing (interconnects) A logic block is a circuit block that is replicated in an array in an FPD A logic block consists of clusters of logic cells Each logic cell contains a Look up table (LUT). –They are called Configurable Logic Blocks (CLB) by Xilinx. –based on Look-Up Tables. Most commercial FPGAs have 4-input LUTs –The logic blocks of most SRAM-based FPGAs consist of logic cells –A logic cell consists of a LUT, a flip flop, and connection to adjacent cells. –A logic slice consists of 2 logic cells. –Xilinx counts closer to 2.25 logic cells per slice because they can do more per configurable logic block (CLB) than other architectures

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ENGN3213: Digital Systems and Microprocessors L#8 48 Things You Should Know ROMS –Each possible minterm AND gate is present (fixed AND) plane and configurable OR plane –how large a ROM is needed for given set of logic equations? PLAs –Limited number of AND gates –Programmable AND and OR gates. PALs –Programmable AND plane –how are logic functions represented? FPGAs –components of FPGA and how they relate to each other –components of typical logic cell (Configurable Logic Block) –how circuits can be mapped onto CLBs