xRC: How to extract parasitics w.r.t local substrate?

Hello all! Is possible to have Calibre extract parasitic capacitances with respect to multiple ground nodes, according to which local substrate the parasitics are located in?

I have an ADC module with 2 power domains: vdd_A/vss_A (amplifiers' "quiet" analog) and vdd_SW/vss_SW (sampling switches' "noisy" analog). Each domain is implemented in its own deep-Nwell, which means that all the devices in each domain see a "local" p-substrate that is isolated from the local substrate of the other domain, and also from the "global" p-substrate area lying in between the 2 deep-Nwell regions (which in my layout is tied to a node called vss_SUBSTRATE). Thus both in layout and schematic "vss_A", "vss_SW" and "vss_SUBSTRATE" correspond to separate, electrically isolated nodes.

The problem is that in my extractions all the parasitic capacitors are tied to whatever node I specify in the field "Ground node name" in Calibre Interactive: if I specify "vss_A", then the parasitics of the devices in the vdd_SW/vss_SW deep-Nwell region are also tied to "vss_A"; if I specify "vss_SW", then the parasitics from the vdd_A/vss_A deep-Nwell are also tied to "vss_SW"; if I specify "vss_SUBSTRATE", then all the parasitics caps are tied to this node. (BTW, If I specify more than one net name in the "Ground node name" field, then Calibre creates a fictitious net name by concatenation of the names provided, and ties all the parasitics to that fictitious node!). Thus all these extracted netlists are erroneous because they imply a coupling between domains that in reality doesn't exist, due to the extracted parasitics being tied to the same electrical node!

Is there a way I can instruct Calibre to tie all the parasitics in the "vdd_A/vss_A" region to the vss_A node, the ones in the "vdd_SW/vss_SW" region to vss_SW, and only the interconnection parasitics of the routing between these regions (lying above the global substrate) to "vss_SUBSTRATE"?

Thanks in advance for any help!

Regards,

Jorge.

P.S. I referred without success to the section "Extracting With Multiple Substrates" on the xRC User Manual, but I think it's more related to developing SVRF rules to handle layers for actual physical diffferent substrate materials. In my case the physical layers are the same, the only difference is their geographical location (and their electrical isolation by means of the deep-Nwell walls). Also, the workaround of creating separate layouts and schematics for the various domains and extracting them separately is not really a solution, because of its poor scalability to larger modules in the ADC, which contain even more power domains!

The short answer to "can Calibre do it?" is "yes." The long answer is, "yes, but it's complicated."

Take a look at the CalibrePEX GUI under PEX Options > Netlist > Format. Right under the "Ground node name" option you named is "Ground layer name". This is what you're looking for. However, using it is tricky, because, usually, the right answer is a derived layer name that is buried in the Calibre rule deck. Most of the time, an SVRF PEX deck puts all of your N-well, isolated P-well, etc. layers through some logic permutations to come up with layers that are fit to use in DEVICE statements for the backgate tap. Those layers are the ones you want to put in the "Ground layer name" text box. The formatter will tap parasitic caps associated with those layers to whatever nodes the layers connect to. That gets parasitics associated with your PFET N-wells to tap VDD instead of VSS. It should work just as well for isolated P-wells.

Wish I could be of more help, but it really depends on your process and your rule deck. It's possible there are marker layers in your process specifically for the purpose of indicating analog grounds and wells, but you'll need to look at your process docs and/or the rule deck.

For more info, check the PEX Ground Layer docs in the SVRF manual and maybe hit up SupportNet.

Hi Vern, thanks so much for your reply. It seems that indeed it's complicated and I will take some time to get this figured out, so I'll leave it for after-tapeout mode. I'll come back here to comment on what I find (unfortunately I am a PhD student so I have no posting rights in SupportNet )

I am wondering though how this issue is handled in real world designs. I find it hard to believe that verification people just make amends with the idea of having all the parasitics tied to the same node when simulating chips with multiple power domains!!!

Hi Jorge. You should try using the pex ground layer statement, and add all of the well names there. Then, it will pick up the lvs name of the substrate, instead of the generic node 0. For example, you could say pex ground layer nwell awell. Then if your nwell is connected to vss_analog in one section, and a different nwell is connected to vss_digital, then ground name will be different depending on which nwell you're inside of. Try this out, and let me know if it works.

Hi Karen! Thank you very much for your reply. I tried your suggestion and used the name of the deep-Nwell layer (DNW) in the "Ground layer name" field, and I finally got Calibre to attach the parasitics of the different deep-Nwell regions (i.e. power domains) to different nodes! The problem, however, is that the LVS names of those regions are actually the local supply nodes and not the grounds, since, for obvious reasons, the deep-Nwells are tied to the positive supply. So for instance, in my example, I am getting the parasitic caps tied to vdd_A and vdd_SW, instead of vss_A and vss_SW.

Following the suggestion of Vern, I took a look in my rule deck and noticed that there is a layer called "psub" which seems to correspond to the (isolated) psub regions inside each deep-Nwell. So I put that layer as the ground layer name and almost all the parasitics are now being (correctly) tied either to vss_A or vss_SW according to the region!

The remaining problem is the parasitics of the local substrates and deep-N-wells themselves, which are still being tied to the "0" node. For example, the capacitances between the vss_SW region (local p-substrate) and vdd_SW (the deep-N-well underneath it) and the capacitance between the vdd_SW (deep-N-well) and vss_SUBSTRATE (the global p-substrate underneath it), are tied in the extracted netlist to node "0" instead of vdd_SW and vss_SUBSTRATE, respectively. I can force all these remaining nodes to be tied together to a net of my choice using the "Ground node name" field, so if I specify "vss_SUBSTRATE" there I get the caps for the deep-N-well regions correctly connected, though the ones for the local p-substrates are now wrong.

I guess this is as far as I can go, and even though not completely correct, probably the netlists extracted this way will be much accurate than the ones I use to simulate, where all the parasitics were tied to the same node (I would normally choose "vss_SUBSTRATE").

...If someone knows an alternative approach to achieve this type of extraction, please let us know!