It is quite possible that somebody could ask this question earlier. However after some browsing I couldn't find any answer. I have found a related subject viewtopic.php?f=3&t=13991&hilit=unix only. So I am very curious why did Unix miss Archimedes in the 80s? It looks like a big mystery for me. There were Unix variants for PDP-11 with 32 KB RAM only, 68000, 8088, 80186, z8000, ... All these listed CPUs don't have MMU or FPU. IMHO Archimedes with Unix was capable to be one of the best Unix PC of the 80s.

That's good to know Rob... but let's not forget the unreleased ARX which was what Acorn intended to use, but which wasn't looking likely to finish in time (or at all), and so ARTHUR was born.

ARX was an unreleased Mach-like operating system written in Modula-2+ developed by Acorn in the UK, and later at Palo Alto, for their new ARM based Archimedes range. It used C and Acorn Extended Modula-2.
ARX was a pre-emptive multitasking, multithreading, multi-user operating system.

The project team, led by Paul Fellows, was given just five months to develop Arthur entirely from the ground up—with the directive "just make it like the BBC micro". It was intended as a stop-gap until ARX could be completed. However, the latter was delayed time and again, and was eventually dropped when it became apparent that the Arthur development could be extended to have a window manager and full desktop environment.

Edit: tidy up wikipedia quotes

Last edited by BigEd on Sun Aug 05, 2018 5:35 pm, edited 1 time in total.

but let's not forget the unreleased ARX which was what Acorn intended to use, but which wasn't looking likely to finish in time (or at all), and so ARTHUR was born.

Have to admit that I'd forgotten about ARX Was it Unix like?

There's a list of Acorn's operating systems here. Of course, there were other offerings that were developed outside of Acorn (like some of those I mentioned above). I even remember talk of an Archimedes OS being developed by Computer Concepts - I think this was before Acorn released RISC OS.

Thank you very much! It is a shame for me that I completely missed this information. R140 has even a MMU. However Wikipedia said that it was a Unix-like system not just Unix... It is also interesting to get some statistics like in an Byte's article https://archive.org/stream/byte-magazin ... 7/mode/2up.

That's a good question: I think probably not, on the inside. Certainly not derived from Unix. In terms of capabilities, perhaps somewhat: multi user, multi process, pre-emptive. But I'm not sure any ARX materials survive - no wait, someone claims there are sources. It seems Acorn purged Modula-2 from their world, and the ARC (Acorn's PARC) became part of Olivetti.

ARX was written in a variant of Modula-2 called Acorn Extended Modula2
(similar to Modula-2+) which adds support for multithreading and exception
handling to the basic language. The language was ported to the ARM from
the 16032 version used to write Panos. Presumably this means that ARX was
optimised towards the AEM2 runtime requirements. The Modula2 compiler
(and presumably ARX itself) was 'lost' to Olivetti when they took over
sole control of the Palo Alto facility.

The O.S. 'ran in user mode', suggesting that it was microkernel based. The
synchronisation primitives of the original microkernel were sufficiently
slow that the SWP instruction was subsequently added to the ARM ISA to
allow user mode code to implement semaphores without going via the
microkernel.

It ran, but with a big performance hit - possibly as a result of spending
half it's time jumping in and out of superviser mode (I can think of a few
other microkernel based O.S. implementations which are said to suffer from
this).

That's a good question: I think probably not, on the inside. Certainly not derived from Unix. In terms of capabilities, perhaps somewhat: multi user, multi process, pre-emptive. But I'm not sure any ARX materials survive - no wait, someone claims there are sources. It seems Acorn purged Modula-2 from their world, and the ARC (Acorn's PARC) became part of Olivetti.

A post from the BBC Micro mailing list looked promising - Acorn ARX anybody? - but I don't think that anything came from it.

an Archimedes OS being developed by Computer Concepts - I think this was before Acorn released RISC OS.

Possibly that was to be called "Impulse" or perhaps "Zebedee" but was "dropped before it was finished."

I'm going to quote from a mail I received from Charles Moir in 2012 on this subject. Normally I wouldn't quote private mail but I hope nobody minds too much - it's not doing much good sitting in my mail folder.

Anyway we decided what was needed was a 'real operating system' i.e. a modern, properly multi-tasking, multi-threaded, hardware protected memory spaces, type of OS (none of this cooperative multi-tasking) that took advantage of the ARM / MEMC controller chips (which were always designed to support real multi-tasking.)

That was Impulse. We got quite far with it - to the extent it was running and even had the beginning of Windows manager running.

There's a lot more behind that story, including an Archimedes-on-a-card that they couldn't get approved by Acorn.

The O.S. 'ran in user mode', suggesting that it was microkernel based. The
synchronisation primitives of the original microkernel were sufficiently
slow that the SWP instruction was subsequently added to the ARM ISA to
allow user mode code to implement semaphores without going via the
microkernel.

I was aware of this reason for implementing the SWP instruction in hardware, but something else I once read was that LDM or STM instructions had previously been used as a mechanism for implementing mutexes in an atomic way. Anyone got any idea how that would've worked (or even where I read it)?

I was aware of this reason for implementing the SWP instruction in hardware, but something else I once read was that LDM or STM instructions had previously been used as a mechanism for implementing mutexes in an atomic way. Anyone got any idea how that would've worked (or even where I read it)?

SWP was implemented in 1992. It was surprising at least for me that Intel implemented such kind of instruction useful for mutexes even in 1978 - XCHG. I am a bit curious why to use LDM/STM with single CPU with one core? Are there systems with multiple ARMs before 1992?

The Archimedes received a lukewarm response at its launch because personal computing appeared to be consolidating behind the IBM PC standard while Acorn had introduced a computer with a new processor, a new operating system, and no base of software to provide users with the applications they needed.

This sounds like a remarkable oddity for a Unix-computer.
It is a bit off topic... When was the first co-processor for ARM made? ARMv2 has a lot of instruction to support a co-processor...

In July 1993 Acorn finally released the FPA10 Floating Point Accelerator for the A540, A5000 and R260 which boosted floating point performance by a factor of 50. The Acorn A5000 and A540 FPA upgrade kit installation instructions provides more information about installation and use of the FPA10. The FPA Support disc is available in the Software section.

Last edited by BigEd on Tue Aug 07, 2018 7:15 pm, edited 1 time in total.

Acorn AKA20 FP Co-processor
Acorn FP co-processor for R140 and Archimedes A400 series. Only compatible with the ARM 2.
Before developing the FPA11, Acorn's hardware solution to floating point on the ARM was with a custom bridge chip (Acorn FPPC) to convert the ARM's FP instructions to the Western Electric WE32206 FP chip.

• If you have an Archimedes 440, you must return your computer to your supplier for an
internal modification before fitting the co-processor card.
• If you have an Acorn R140, Archimedes 410/1, 420/1 or 440/1 computer (or 440 modified as
mentioned above), install the co-processor in accordance with the following instructions

Last edited by BigEd on Tue Aug 07, 2018 7:29 pm, edited 2 times in total.

I was aware of this reason for implementing the SWP instruction in hardware, but something else I once read was that LDM or STM instructions had previously been used as a mechanism for implementing mutexes in an atomic way. Anyone got any idea how that would've worked (or even where I read it)?

That does sound familiar to me as well, although I've also got no idea where I would have read it. No information in the PRMs on how to implement a mutex/semaphore, so maybe it was from a magazine?

It's reasonable to assume the non-SWP version would have been an implementation of Peterson's Algorithm, but since that doesn't require LDM/STM, maybe the example we're thinking of was actually something different. Or maybe our memories are just bad

One benefit of LDM/STM is that (on old architectures) they can atomically read/write multiple words of memory without requiring interrupts to be disabled (useful if you're interacting with user-mode code). (On new architectures, LDM/STM isn't atomic for multi-core use, and may not even be atomic for single-core use - some CPUs have a low-latency option that allows an executing LDM/STM to be cancelled if an interrupt occurs. Once the IRQ handling is complete the instruction will be restarted.)

The Archimedes received a lukewarm response at its launch because personal computing appeared to be consolidating behind the IBM PC standard while Acorn had introduced a computer with a new processor, a new operating system, and no base of software to provide users with the applications they needed.

This sounds like a remarkable oddity for a Unix-computer.

I think that's a reference to the original Archimedes range launched in 1987 with the Arthur operating system. Acorn didn't release RISCiX until 1988.