MicroConverter Technical Note - uC009

a Addressing 16MB of External Data Memory

1.0 INTRODUCTION : 2.1 ADDRESSING UP TO 16 MBYTES OF

Although a standard 8051 can only address up to 64kBytes of EXTERNAL DATA MEMORYexternal data memory, a feature unique to MicroConverters To address up to 16MBytes of external data memory then thewith an external data memory interface allows addressing of up hardware should be configured as shown in figure 2.to 16MB of external data memory. MicroConverter SRAMAs is shown in section 2.0, the MicroConverter is still fully D0-D7compatible with the standard 8051 for addressing up to P0 (DATA)64kBytes of external data memory. LATCH A0-A7

To implement the 24bit external data memory addressing, all ALE

that is required by the user is to add an addition latch tomultiplex the data on Port 2 as described in section 2.1. P2 A8-A15

LATCHAlthough both the external program memory and the external A16-A23data memory are accessed by some of the same pins, both theexternal data memory and external program memory can be RD OEused together. For simplicity, and especially considering that WR WEthe MicroConverter family now supports parts with 62kBytesof internal code space, this tech note will assume that the useris running from internal code space. Fig 2: External Data Memory Interface (16MByte Address Space) In this configuration Port 0 outputs the low address (A0àA7)2.0 ADDRESSING UP TO 64 KBYTES OF while Port 2 outputs the high address (A8àA15) and the page EXTERNAL DATA MEMORY address (A16àA23). As shown in figure 3 and figure 4 the falling edge of ALE is used to latch the low address and theTo address up to 64kBytes of external data memory then the page address for the external memory requiring an extra latchhardware should be configured as shown in figure 1. This for the multiplexing of Port 2. The read (RD) and (WR) writeinterface is standard to any 8051 compatible MCU. strobes are used as normal to activate the external memory. M icroConverter SRAM As shown in figure 3 if the MicroConverter is writing data to P0 D0-D7 the external memory, the data (D0àD7) will be automatically (DATA) outputted at Port 0 after the falling edge of ALE has been used to latch the address. The falling edge of the WR strobe is used LATCH A0-A7

MicroConverter Tech Note – uC009

If the MicroConverter is performing a read operation, port 0 Notes:

will be left to float after the falling edge of ALE. The falling 1. The toggling of the ALE can be diabled by settingedge of the RD strobe will enable the read operation of the PCON.4. This is often used to save power and toXRAM which must output the data (D0àD7) at Port 0 and reduce EMI. By default ALE is enabled.give it time to settle before the read strobe returns high. Again In both of the implementations above make sure thatrefer to the timing specifications in the relevant datasheet for ALE has not been disabled by a previous write to themore details on external data memory interface timings. PCON SFR. If ALE has been disabled then the low address or the page address will not be latched for the M ISS ING A L E F O R M O V X external data memory. M A C H INE C Y C L E 1 M A C H INE C Y C L E 2 2. Because the high address (A8àA15) is present at theAL E time of the RD or WR strobe then this MicroConverter interface is 100% backward RD compatible with any standard 8051 interface as shown in section 2.0.WR t A C C= t R L D V

P0 P0 DPL DATA P0 3. On the big memory parts as well as 62kBytes of

flash/EE program memory an extra 2kBytes of P2 P2 DPP DPH P2 internal XRAM is available to the user. WhileFALLING EDGE OF ALE USED accesses to this memory are made, none of the P0, P2, FOR EXTE RNAL LAT CH RD or WR pins will change during the access to internal XRAM. Fig 4: XRAM Read Operation (e.g. MOVX A, @DPTR)