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H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L23/00—Details of semiconductor or other solid state devices

H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor

H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions

H01L23/495—Lead-frames or other flat leads

H01L23/49541—Geometry of the lead-frame

H01L23/49548—Cross section geometry

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed

H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L23/00—Details of semiconductor or other solid state devices

H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor

H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions

H01L23/495—Lead-frames or other flat leads

H01L23/49503—Lead-frames or other flat leads characterised by the die pad

H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof

H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes

H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes the devices having separate containers

H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00

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H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

H01L2224/02—Bonding areas; Manufacturing methods related thereto

H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process

H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas

H01L2224/061—Disposition

H01L2224/0612—Layout

H01L2224/0613—Square or rectangular array

H01L2224/06134—Square or rectangular array covering only portions of the surface to be connected

H01L2224/06136—Covering only the central area of the surface to be connected, i.e. central arrangements

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H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

H01L2224/42—Wire connectors; Manufacturing methods related thereto

H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process

H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector

H01L2224/4805—Shape

H01L2224/4809—Loop shape

H01L2224/48091—Arched

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H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

H01L2224/42—Wire connectors; Manufacturing methods related thereto

H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process

H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector

H01L2224/481—Disposition

H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive

H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked

H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71

H01L2224/732—Location after the connecting process

H01L2224/73201—Location after the connecting process on the same surface

H01L2224/73215—Layer and wire connectors

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H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups

H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00

H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00 the devices having separate containers

H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00 the devices having separate containers the devices being of a type provided for in group H01L27/00

H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement

H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

H01L24/42—Wire connectors; Manufacturing methods related thereto

H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process

H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00

H01L2924/0001—Technical content checked by a classifier

H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00

H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected

H01L2924/151—Die mounting substrate

H01L2924/153—Connection portion

H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface

H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Abstract

Invertible microfeature device packages and associated methods for manufacture and use are disclosed. A package in accordance with one embodiment includes a microfeature device having a plurality of device contacts, and a conductive structure electrically connected to the contacts. The conductive structure can have first and second package contacts accessible for electrical coupling to at least one device external to the package, with the first package contacts accessible from a first direction and the second package contacts configured to receive solder balls and accessible from a second direction opposite the first. An encapsulant can be disposed adjacent to the microfeature device and the conductive structure and can have apertures aligned with the second package contacts to contain solder balls carried by the second package contacts. Accordingly, the package can be connected in either a face-up or face-down orientation, and/or can be connected to another, similar device in either a face-to-face arrangement or a back-to-back arrangement.

Description

CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional of U.S. patent application No. 10/651,913, entitled “INVERTIBLE MICROFEATURE DEVICE PACKAGES AND ASSOCIATED METHODS” filed Aug. 29, 2003, which is incorporated herein by reference in its entirety.

TECHNICAL FIELD

The present invention relates generally to invertible microfeature device packages and associated methods for manufacturing and installing such packages.

BACKGROUND

Microfeature devices, such as memory chips, are typically incorporated into a device package prior to installation in an end product. The package can include an encapsulant that protects the chip, and a leadframe that connects chip terminals (located on the chip and surrounded by the encapsulant) with package terminals that are accessible from outside the package. The package terminals can accordingly provide for communication between the chip and devices located external to the package.

The package terminals are typically arranged in a pattern that conforms to industry developed standards, so that the package is installable in a wide variety of electronic devices. Such standards have been developed for ball grid array (BGA) arrangements and quad flat no-lead (QFN) plastic package arrangements. However, device packages manufactured to be compatible with one standard attachment arrangement are typically not compatible with others. Accordingly, the versatility of such device packages is limited, and package manufacturers and suppliers must therefore manufacture and inventory packages compatible with a multitude of attachment arrangements.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A-1C illustrate a method for attaching a microfeature device to a conductive structure in accordance with an embodiment of the invention.

FIG. 2 is an isometric illustration of a portion of a microfeature device attached to a conductive structure in accordance with an embodiment of the invention.

FIGS. 3A-3C illustrate a method for packaging the microfeature device and the conductive structure shown in FIGS. 1A-2.

FIGS. 4A and 4B illustrate opposing outwardly facing surfaces of a package formed in accordance with an embodiment to the invention.

FIGS. 5A-5B illustrate a microfeature device package attached to a support member in two positions, one inverted relative to the other.

FIG. 6 is a partially schematic, cross-sectional illustration of a device package having two microfeature devices stacked in accordance with an embodiment of the invention.

FIG. 7 is a partially schematic, cross-sectional side view of a device package having microfeature devices stacked in accordance with another embodiment of the invention.

FIG. 8 is a block diagram illustrating features of a system that incorporates one or more packaged microfeature devices in accordance with an embodiment of the invention.

DETAILED DESCRIPTION

A. Introduction

The present invention is directed to invertible microfeature device packages and associated methods for manufacturing and installing such packages. The term “microfeature device” is used throughout to include a device formed from a substrate upon which and/or in which submicron circuits or components, and/or data storage elements or layers are fabricated. Submicron features in the substrate include, but are not limited to, trenches, vias, lines, and holes. These features typically have a submicron width (e.g., ranging from, for example, 0.1 micron to 0.75 micron) generally transverse to a major surface (e.g., a front side or a back side) of the device. The term microfeature device is also used to include substrates upon which and/or in which micromechanical features are formed. Such features include read/write head features and other micromechanical features having submicron or supramicron dimensions. In any of these embodiments, the substrate is formed from suitable materials, including ceramics, and may support layers and/or other formations of other materials, including but not limited to metals, dielectric materials and photoresists.

A microfeature device package system in accordance with one aspect of the invention includes a microfeature device, a plurality of device contacts electrically coupled to structures within the microfeature device, and a conductive structure electrically connected to at least one of the plurality of device contacts. The conductive structure can have a plurality of first and second package contacts accessible for electrical coupling to at least one device external to the package. The first package contacts can be accessible from a first direction for coupling, and the second package contacts can be configured to receive solder balls and can be accessible from a second direction for coupling, the second direction being opposite the first direction. An encapsulant can be disposed adjacent to the microfeature device and the conductive structure, and can have apertures with aperture walls aligned with the second package contacts to contain solder balls carried by the second package contacts. Accordingly, the packaged microfeature device can be oriented in one direction for coupling to one type of substrate, and can be inverted for coupling to another type of substrate for which solder balls provide the intervening electrical connection.

A microfeature device package in accordance with another aspect of the invention includes a first microfeature device having a plurality of first device contacts and a second microfeature device having a plurality of second device contacts. The second microfeature device is coupleable to the first microfeature device in either of two orientations wherein in a first orientation the second device contacts face toward the first device contacts, and in a second orientation the first and second device contacts face in opposite directions. A conductive structure is positioned at least proximate to the first and second microfeature devices and is electrically connected to at least one of the first device contacts and to at least one of the second device contacts.

A method for forming a microfeature device package in accordance with another aspect of the invention includes disposing a conductive structure at least proximate to a microfeature device, with the conductive structure having a plurality of first and second package contacts. The microfeature device can further have a plurality of device contacts electrically coupled to structures within the microfeature device. The method can further include orienting the conductive structure with the first and second package contacts accessible for electrical coupling to devices external to the package. The first package contacts can be accessible from a first direction for coupling and the second package contacts can be accessible from a second direction for coupling, with the second direction opposite the first direction. The method can further include electrically coupling the conductive structure to the device contacts of the microfeature device, and disposing an encapsulant adjacent to the conductive structure. The encapsulant can include apertures aligned with the second package contacts, and aperture walls positioned to contain solder balls at the second package contacts.

B. Methods and Apparatuses in Accordance with the Embodiments of the Invention

Specific details of the invention are set forth in the following description and in FIGS. 1A-8 to provide a thorough understanding of certain embodiments of the invention. One skilled in the art, however, will understand that the present invention may have additional embodiments, and that other embodiments of the invention may be practiced without several of the specific features explained in the following description.

FIGS. 1A-1C are partially schematic, cross-sectional side views illustrating initial portions of a process for forming a package in accordance with an embodiment of the invention. Referring first to FIG. 1A, the package can include a conductive structure 120, for example, a leadframe 121 having a plurality of leadfingers 122. Each leadfinger can include a first end portion 123a, a second end portion 123b, and an intermediate portion 124 between the end portions 123a, 123b. The first end portion 123a can include an end surface 125 facing in a first direction A and the intermediate portion 124 can face in a second direction B, opposite the first direction A. As described in greater detail below, the end surfaces 125 can form first package contacts 113 accessible from the first direction A, and the intermediate portions 124 can form second package contacts 114 accessible from the second direction B. The second end portions 123b can support tape strips 111 or other adhesive media for attachment to a microfeature device, as described in greater detail below with reference to FIG. 1B.

Referring now to FIG. 1B, a microfeature device 130 can be attached to the tape strips 111 prior to being electrically coupled to the conductive structure 120. In one aspect of the embodiment, the microfeature device 130 can include a memory device and in other embodiments, the microfeature device 130 can include another type of device, for example, a processor device. In any of these embodiments, the microfeature device 130 can include a first surface 131 facing in the first direction A, and a second surface 132 facing in the second direction B. Device contacts 133 (e.g., bond pads) can be positioned at or proximate to the second surface 132 to provide for electrical communication between the conductive structure 120 and structures or features located within the microfeature device 130.

Referring now to FIG. 1C, the microfeature device 130 and the conductive structure 120 can be inverted as a unit. Wirebonds 112 can then be connected between the second end portions 123b of the leadfingers 122 and the device contacts 133 to provide for electrical communication between the microfeature device 130 and the conductive structure 120. In other embodiments, conductive pathways between the device bond pads 133 and the conductive structure 120 are formed from other connecting elements.

FIG. 2 is a partially schematic, isometric illustration of a portion of the microfeature device 130 and the conductive structure 120 described above with reference to FIGS. 1A-1C. As shown in FIG. 2, the conductive structure 120 can include a first terminal portion 126 and a second terminal portion 127. The first terminal portion 126 can include the first package contacts 113 facing in the first direction A, and the second terminal portion 127 can include the second package contacts 114 facing in the second direction B. In one aspect of this embodiment, the first package contacts 113 include the generally flat end surfaces 125 of the leadfingers 122. The second package contacts 114 can include flat, disk-shaped surfaces of the leadfinger intermediate portions 124. In other embodiments, the first package contacts 113 and the second package contacts 114 can have different shapes that also face in opposing directions, and (as described in greater detail below) support solder ball connections at the second package contacts 114 and other connections, including QFN connections, at the first package contacts 113.

Referring now to FIG. 3A, the microfeature device 130 and the conductive structure 120 can next be at least partially surrounded with an encapsulant 140. In a particular aspect of this embodiment, the encapsulant 140 can include apertures 141 aligned with the second package contacts 114. In one embodiment, the apertures 141 are etched or otherwise formed in the encapsulant 140 after the encapsulant 140 has been disposed over the conductive structure 120 and the microfeature device 130. In another embodiment, the apertures 141 are formed in the encapsulant 140 as the encapsulant is disposed over the conductive structure 120 and the microfeature device 130. In either embodiment, the apertures 141 can include aperture walls 142 positioned adjacent to the second package contacts 114 to support solder balls, as described below with reference to FIG. 3B.

Referring now to FIG. 3B, solder balls 115 can be disposed on the intermediate portions 124 of the lead fingers 122 through the apertures 141 of the encapsulant 140. Accordingly, the solder balls 115 can form a conductive portion of the second package contacts 114. In one aspect of this embodiment, the solder balls 115 can be disposed as part of the package manufacturing process. In another embodiment, the solder balls 115 can be disposed in a post-manufacture step. In still a further embodiment, the solder balls 115 can be eliminated (for example, when only the first package contacts 113 will be coupled to external devices) although the second package contacts 114 can remain configured to support the solder balls 115.

Referring next to FIG. 3C, a complete package 110 can be formed by singulating the conductive structure 120 from adjacent conductive structures (not shown), which are connected to other microfeature devices 130. The singulation process can also reduce an overall width of the package 110, while leaving the first package contacts 113 accessible for coupling to external devices from the first direction A, and the second package contacts 114 accessible for coupling to external devices from the second direction B.

FIG. 4A is a plan view of an embodiment of the package described above with reference to FIG. 3C, as seen from the first direction A. As shown in FIG. 4A, the first package contacts 113 can be disposed around the periphery of the package 110 to form a first pattern 150A (e.g., a QFN arrangement). Accordingly, the first package contacts 113 are suitable for coupling to other devices compatible with a standard QFN contact arrangement. As is also shown in FIG. 4A, the first surface 131 of the microfeature device 130 can be exposed (or can remain exposed) after the process of forming the package 110 has been completed. Accordingly, the rate at which heat is transferred away from the microfeature device 130 can be enhanced by virtue of the increased exposed surface area of the first surface 131.

FIG. 4B is a plan view of an embodiment of the package 110 described above with reference to FIG. 3C, as seen from the second direction B. As shown in FIG. 4B, the second package contacts 114 can be disposed inwardly from the edges of the package 110 and can form a second pattern 150b that is different than the first pattern 150a described above with reference to FIG. 4A. The second pattern 150b can be suitable for coupling the package 110 to devices having a standard BGA interface.

FIGS. 5A and 5B illustrate the package 110 connected to support members while in each of two oppositely facing orientations, in accordance with an embodiment of the invention. Referring first to an embodiment shown in FIG. 5A, the package 110 can be positioned proximate to a support member 160a with the first surface 131 of the microfeature device 130 and the first package contacts 113 facing toward the support member 160a. The support member 160a can include an external terminal portion that includes support member bond pads 161a aligned with the corresponding first package contacts 113. Solder paste 162 can be disposed between the first package contacts 113 and the support member bond pads 161a to electrically couple the package 110 to the support member 160a, using standard QFN bonding techniques. In one embodiment, the support member 160a can include a printed circuit board having internal and/or surface mounted circuitry, and in other embodiments, the support member 160a can include other devices. When the package 110 is connected to the support member 160a in the manner shown in FIG. 5A, the solder balls 115 can be eliminated because the connection between the package 110 and the support member 160a is provided by the first package contacts 113.

Referring now to FIG. 5B, a device package 110 having exactly the same configuration as that shown in FIG. 5A can be inverted so that the second package contacts 114 and the second surface 132 of the microfeature device 130 face toward a support member 160b. The support member 160b can include support member bond pads 161b arranged in a standard BGA pattern. Accordingly, the solder balls 115 can be connected between the second device package 110 and the support member bond pads 161b using standard BGA bonding techniques to provide for the electrical link between the support member 160b and the microfeature device 130.

One feature of an embodiment of the microfeature device package 110 described above with reference to FIGS. 1A-5B is that the package 110 has different types and arrangements of package contacts. Accordingly, the package 110 can be placed in a first orientation to connect to a device having a first coupling arrangement (for example, a QFN-compatible device) and can be inverted for attachment to a device having a different type of attachment arrangement (for example, a BGA-compatible device). An advantage of this feature is that the same package 110 can be used in either installation. Accordingly, a manufacturer need not maintain separate production lines or separate inventories of packages suitable for coupling to external devices having different types of coupling arrangements. As a result, the cost for producing the microfeature devices 110 can be reduced when compared with the cost of producing existing devices.

FIG. 6 is a partially schematic, cross-sectional side elevation view of a stacked device package 610 that includes two microfeature devices 130, shown in FIG. 6 as a first microfeature device 130a and a second microfeature device 130b. In one aspect of this embodiment, the first microfeature device 130a is installed in a first package 110a, and the second microfeature device 130b is installed in a second package 110b. The packages 110a, 110b can be generally similar to the package 110 described above with reference to FIGS. 1A-5B. In other embodiments, the packages 110a, 110b can have other arrangements. In a particular embodiment, second package contacts 114a of the first package 110a are arranged to form a mirror image of the second package contacts 114b of the second package 110b. Accordingly, output signals from one of the packages 110a, 110b can provide input signals to the other package. In any of the foregoing embodiments, the first microfeature device 130a and the second microfeature device 130b are electrically coupled to each other with a conductive structure 620, as described below.

In one aspect of this embodiment, the conductive structure 620 can extend between and around the microfeature devices 130a, 130b. In a particular aspect of this embodiment, the conductive structure 620 can include a first leadframe 121a (which can form a portion of the first package 110a) and a second leadframe 121b (which can form a portion of the second package 110b). In a further particular aspect of this embodiment, the first microfeature device 130a and the second microfeature device 130b are oriented so that a second surface 132a of the first microfeature device 130a faces toward a second surface 132b of the second microfeature device 130b. Accordingly, first device bond pads 133a of the first microfeature device 130 face toward second device bond pads 133b of the second microfeature device 130, and a first surface 131a of the first microfeature device 130a faces away from a first surface 131b of the second microfeature device 130b. In another embodiment, the orientations of the first and second microfeature devices 130a, 130b can be inverted, for example, as described in greater detail below with reference to FIG. 7. In either embodiment, the stacked device package 610 can include couplers 616 that electrically connect the first microfeature device 130a to the second microfeature device 130b. For example, the couplers 616 can include solder balls connected between the first leadframe 121a and the second leadframe 121b. In other embodiments, the couplers 616 can include other conductive structures.

In one aspect of an embodiment shown in FIG. 6, the stacked device package 610 includes two arrays 613 of first package contacts 113, shown as a first array 613a and a second array 613b. Both package contact arrays 613a, 613b have similar or identical layouts. Accordingly, the stacked device package 610 can be positioned with either the first contact array 613a or the second contact array 613b facing toward a support member 660. The support member 660 can include support member bond pads 661 positioned to make electrical contact with either the first contact array 613a or the second contact array 613b. Solder paste 662 or another conductive medium can provide for physical and electrical coupling between the contact array 613 and the support member bond pads 661.

FIG. 7 is a cross-sectional side elevation view of a stacked device package 710 having the first and second packages 110a, 110b stacked in an arrangement that is inverted from that shown in FIG. 6. Accordingly, the first surface 131a of the first microfeature device 130a faces toward the first surface 131b of the second microfeature device 130b, and the second surfaces 132a, 132b of the devices 130a, 130b face away from each other. As a result, it is the second package contacts 114a, 114b (arranged in two arrays 714a, 714b) that are exposed for coupling to a support member 760. Couplers 716 (e.g., solder paste couplers) can physically and electrically connect the first leadframe 121a to the second leadframe 121b to form the conductive structure 720. In another embodiment, the conductive structure 720 can have other arrangements. In any of these embodiments, either of the contact arrays 714a, 714b can be aligned with corresponding support member bond pads 761 to provide for physical and electrical communication between the support member 760 and the stacked device package 710.

One feature of the stacked device packages described above with reference to FIGS. 6 and 7 is that the microfeature devices 130 are positioned either face-to-face or back-to-back, for example, either with the first surfaces 131a, 131b facing toward each other, or with the first surfaces 131a, 131b facing in opposite directions. One advantage of this feature is that the exposed package contacts can have the same arrangement, whether the package is face up or face down. Accordingly, the effort required to correctly orient the stacked device package for coupling to the support member can be reduced when compared with existing devices.

FIG. 8 is a block diagram illustrating components of a system 800 in which one or more packages of the type described above with reference to FIGS. 1A-7 can be incorporated. In one aspect of this embodiment, the system 800 includes a processor 801 coupled to an input device 803 and an output device 804. The processor 801 can also be coupled to a memory module 802. In one aspect of this embodiment, the system 800 includes a computer and in other embodiments, the system 800 can include other devices, for example, a telecommunication device. In any of these embodiments, the system 800 can include one or more packages 810 incorporated, for example, in the processor 801 and/or in the memory module 802. The packages 810 can have a stacked arrangement (generally similar to that described above with reference to FIGS. 6 and 7) or an unstacked arrangement (generally similar to that described above with reference to FIGS. 1A-5B). In either embodiment, the packages can be mounted to a support member (e.g., a printed circuit board) in accordance with any of the arrangements described above. In any of the foregoing embodiments, the packages 810 can be more easily integrated into the system 800, as described above, and can have a reduced cost when compared with conventional packages, also as described above. Accordingly, the system 800 can be less expensive to manufacture than conventional systems.

From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the spirit and scope of the invention. Accordingly, the invention is not limited except as by the appended claims.

Claims (17)

1. A microfeature device package, comprising:

a microfeature device having an at least generally planar first surface facing a first direction and an at least generally planar second surface facing a second direction opposite from the first direction;

first and second device contacts positioned proximate to the second surface of the microfeature device, the device contacts being electrically coupled to structures within the microfeature device;

a conductive leadframe positioned at least proximate to the second surface of the microfeature device, the leadframe having first and second elongated leadfingers, individual first and second leadfingers having a first end surface, a second end surface, and a generally flat intermediate surface between the first and second end surfaces, individual first end surfaces having a first package contact facing in the first direction, individual intermediate surfaces having a second package contact facing in the second direction;

a first wirebond connected between the first device contact and the first leadfinger;

a second wirebond connected between the second device contact and the second leadfinger; and

an encapsulant disposed adjacent to the microfeature device and the leadframe, the encapsulant having apertures aligned with the second package contacts, the apertures having aperture sidewalls containing solder balls at the second package contacts, the first and second package contacts being accessible for coupling to devices external to the package, the first package contacts being accessible for coupling from the first direction, and the second package contacts being accessible for coupling from the second direction, wherein the encapsulant is positioned against the conductive leadframe proximate to the first package contacts.

2. The package of claim 1, further comprising:

a first solder ball disposed on the intermediate surface of the first leadfinger; and

a second solder ball disposed on the intermediate surface of the second leadfinger.

3. The package of claim 1 wherein the first contacts are arranged in a first pattern and the second contacts are arranged in a second pattern different than the first pattern.

4. The package of claim 1 wherein the microfeature device includes a first microfeature device, and wherein the package further comprises a second microfeature device stacked relative to the first microfeature device and electrically connected to the conductive leadframe.

5. A microfeature device package, comprising:

a first microfeature device having a plurality of first device contacts;

a second microfeature device having a plurality of second device contacts, the second microfeature device being coupleable to the first microfeature device wherein the second device contacts face away from the first device contacts;

a conductive structure positioned at least proximate to the first and second microfeature devices, the conductive structure being electrically connected to at least one of the first device contacts and to at least one of the second device contacts, wherein the conductive structure has a plurality of first and second package contacts accessible for electrical coupling to at least one device external to the package, the first package contacts being accessible from a first direction and the second package contacts being accessible from a second direction opposite the first direction; and

an encapsulant disposed adjacent to the first and second microfeature devices and the conductive structure, the encapsulant having apertures with aperture walls aligned with the first or second package contacts and containing solder balls carried by the first or second package contacts, the encapsulant being positioned against the conductive structure proximate to the first and second package contacts.

6. The package of claim 5 wherein the conductive structure includes:

a first leadframe wirebonded to the first device contacts;

a second leadframe wirebonded to the second device contacts; and

a plurality of couplers electrically connected between the first and second leadframes.

7. The package of claim 5 wherein the first package contacts are arranged in a first pattern and the second package contacts are arranged in a second pattern, with the second pattern being at least approximately the same as the first pattern.

8. The package of claim 5 wherein an arrangement of the first device contacts mirrors an arrangement of the second device contacts.

9. The package of claim 5 wherein at least one the first device contacts includes an input contact and at least one of the second device contacts includes an output contact, further wherein the conductive structure is coupled between the at least one first device contact and the at least one second device contact to direct output signals from the second microfeature device to the first microfeature device.

10. The package of claim 5 wherein at least a portion of the conductive structure is positioned between the first and second microfeature devices.

11. The package of claim 5 wherein at least a portion of the conductive structure extends around peripheral edges of the first and second microfeature devices.

12. A microfeature device package, comprising:

a first microfeature device having at least one first device contact;

a second microfeature device having at least one second device contact and being stacked relative to the first microfeature device;

a first conductive leadframe positioned at least proximate to the first microfeature device, the first leadframe having at least one elongated first leadfinger, the first leadfinger having a first end surface, a second end surface and a generally flat, intermediate surface between the first and second end surfaces, the intermediate surface and the second end surfaces facing in opposite directions, the first leadframe further having a first terminal portion that includes the intermediate surface or the second end surface of the first leadfinger;

a first wirebond connected between the at least one first device contact and the at least one first leadfinger;

a second conductive leadframe positioned at least proximate to the second microfeature device, the second leadframe having at least one elongated second leadfinger, the second leadfinger having a first end surface, a second end surface and a generally flat, intermediate surface between the first and second end surfaces, the intermediate surface and the second end surfaces facing in opposite directions, the second leadframe further having a second terminal portion that includes the intermediate surface or the second end surface of the second leadfinger;

a second wirebond connected between the at least one second device contact and the at least one second leadfinger;

a conductive coupler connected between the first and second leadframes;

an encapsulant disposed adjacent to the first and second microfeature devices, the encapsulant having apertures with aperture walls aligned with the first and second terminal portions accessible to provide electrical coupling with devices external to the package, the first terminal portion being accessible from a first direction for coupling, the second terminal portion being accessible from a second direction for coupling, the second direction being opposite the first direction, the encapsulant being positioned against the first and second conductive leadframes and proximate to the first and second terminal portions; and

a plurality of solder balls disposed in the apertures of the encapsulant and in electrical contact with the first or second terminal portions.

13. The package of claim 12 wherein the first terminal portion includes a plurality of first package contacts arranged in a first pattern, and wherein the second terminal portion includes a plurality of second package contacts arranged in a second pattern, with the second pattern being different than the first pattern.

14. The package of claim 12 wherein the first terminal portion includes a plurality of first package contacts arranged in a first pattern, and wherein the second terminal portion includes a plurality of second package contacts arranged in a second pattern, with the second pattern being at least approximately the same as the first pattern.

15. The package of claim 12 wherein at least one the first device contacts includes an input contact and at least one of the second device contacts includes an output contact, further wherein the conductive structure is coupled between the at least one first device contact and the at least one second device contact to direct output signals from the second microfeature device to the first microfeature device.

16. The package of clam 12 wherein at least a portion of the conductive structure is positioned between the first and second microfeature devices.

17. The package of claim 12 wherein at least a portion of the conductive structure extends around peripheral edges of the first and second microfeature devices.