Growth of 3C-SiC on Si Molds for MEMS Applications

Abstract:

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A hetero-epitaxial 3C-SiC growth process in a low-pressure hot-wall CVD reactor has
been developed on planar Si (100) substrates. The growth rate achieved for this process was about
10 μm/h. The process consists of silane/propane/hydrogen chemistry with HCl used as a growth
additive to increase the growth rate. 3C-SiC has also been grown on 22, 52 and 123 +m deep etched
MEMS structures formed by DRIE of (100) Si at a rate of about 8 +m/h. Secondary electron
microscopy (SEM), atomic force microscopy (AFM) and X-ray diffraction (XRD) were used to
analyze the quality of the 3C-SiC films.

Abstract: Crystal growth of 6H-SiC in two non-basal directions is reported. The two explored
surfaces are the {1-103} plane, named qC-face, and the {1-10-3} plane, named qSi-face. The asgrown
bulk surfaces exhibit a smooth structure with a small ridging effect originating from the
miscut of the seed crystals. Layers, epitaxially grown on the chemically-mechanically polished qCface,
nicely replicate the original crystal structure and show no sign of polytype mixing. Lowtemperature
photoluminescence measurements collected on the epilayers exhibit near bandedge
spectral characteristics indicative of good quality 6H-SiC.

Abstract: The carbonization conditions (acetylene pressure and heating rate) to obtain close carbonized layer covered on Si(001) substrate without thermal pits is studied. Subsequent hetero-epitaxial 3C-SiC with smooth surface have been grown by low-pressure CVD. Single-crystalline carbonized layers could be grown at 1050°C by using suitable carbonization processes. The surfaces of Si were covered with single-crystalline 3C-SiC layers at an early stage of carbonization, preventing out-diffusion of Si atoms from Si substrates. 3C-SiC epi-film have RMS = 0.4nm but no single domain. The protrusion density of the film was an order of 1000 cm-2.

Abstract: 4H-SiC epitaxial growth on 2˚ off-axis substrates using trichlorosilane (TCS) is presented. Good surface morphology was obtained for epilayers with C/Si ratios of 0.6 and 0.8 at a growth temperature of 1600°C. The triangle defect density was reduced to a level below 5 cm-2 at 1600°C and below 1 cm-2 at 1625°C for a C/Si ratio of 0.8. Photoluminescence (PL) measurements were carried out with band-pass filters of 420 nm, 460 nm, and 480 nm to detect stacking faults. A stacking fault density of below 5 cm-2 was achieved at 1600°C and 1625°C with a C/Si ratio of 0.8. The optimal conditions for TCS growth were a C/Si ratio of 0.8 and a growth temperature of 1600°C. The evaluation of stacking faults and etch pit density indicated that the use of 2˚ off-axis substrates and TCS is effective for reducing basal plane dislocations. Comparing these results to those using silane (SiH4) with HCl added, it was demonstrated that TCS is much more suitable for obtaining high-quality epilayers on 2º off-axis substrates.

Abstract: We present our recent results on of 10 × 100 mm 4H-SiC epitaxy by a warm-wall planetary reactor at a growth rate of 10 μm/h. The epilayers grown by this high-throughput reactor show specular surfaces and good uniformities of thickness and doping. The intra-wafer and wafer-to-wafer thickness uniformities are 2.0% and 0.5%, respectively, while intra-wafer and wafer-to-wafer doping uniformities are 14.0% and 3.4%, respectively. The obtained surface RMS roughness is 0.2 nm. These results suggest that this 10 × 100 mm warm-wall planetary reactor provides very promising prospect on the mass production of 4H-SiC epilayers, which will further promote the development of SiC-based electronic devices.