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Description
Chip designers are packing more and more transistors on a chip, increasing not only chip power and performance, but also the potential for errors at the signal level. As a result, a whole set of fault tolerance techniques have been developed for designing circuits so that they detect and either mask or recover from faults which result from these errors. Self-checking circuits are an important part of creating a fault tolerant system.

Written by a leading researcher in self-checking circuit design, this book examines all the major techniques for hardware fault tolerance and presents the most comprehensive coverage available on techniques for implementing self-checking circuits, providing a uniquely valuable reference for today's practicing designers.