Candidate will be responsible for designing ASICs/FPGAs/CPLDs that contain high-speed digital circuits. Candidate will work with systems engineers to translate system requirements into ASIC/FPGA/CPLD requirements, and functional and performance specifications. The candidate will then implement the design along with other team members. Upon delivery of completed boards, candidate will be responsible for ASIC/FPGA/CPLD board-level integration and test, working in concert with system and software engineers.

If you want to associate with a forward-thinking organization that is at the forefront of RF technology and services, and work with a committed visionary team of first-rate senior executives and engineers with a proven track record of success, send your resume to