'''coreboot v4''' is the current stable coreboot tree recommended for productive use and for porting new boards.

'''coreboot v4''' is the current stable coreboot tree recommended for productive use and for porting new boards.

−

* If a device is not supported by coreboot v4, try [[Supported_Chipsets_and_Devices#Devices_supported_in_coreboot_v1|checking coreboot v1]] or [[Supported_Chipsets_and_Devices#Devices_supported_in_coreboot_v3|coreboot v3]] for support.

+

* If a device is not supported by coreboot v4, try [[Supported_Chipsets_and_Devices/v1|checking coreboot v1]] or [[Supported_Chipsets_and_Devices/v3|coreboot v3]] for support.

* In general it is '''not''' recommended to use coreboot v3 &mdash; this was an experimental development tree which is gradually being merged into v4.

* In general it is '''not''' recommended to use coreboot v3 &mdash; this was an experimental development tree which is gradually being merged into v4.

−

* Also, coreboot v1 should be avoided (if v4 can be used instead for your board), as it has been unmaintained for a long time. However, it is definately desirable to port boards from v1 to v4 whereever possible.

+

* Also, coreboot v1 should be avoided (if v4 can be used instead for your board), as it has been unmaintained for a long time. However, it is definitely desirable to port boards from v1 to v4 whereever possible.

See also [[Supported Motherboards]].

See also [[Supported Motherboards]].

Line 19:

Line 19:

! align="left" | Status

! align="left" | Status

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| Fam14h - G-Series

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| Fam12h - Llano

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| AMD

| AMD

Line 55:

Line 63:

| Intel&reg;

| Intel&reg;

| 3100

| 3100

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Intel&reg;

+

| 5000P

| style="background:lime" | OK

| style="background:lime" | OK

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

Line 79:

Line 91:

| Intel&reg;

| Intel&reg;

| 945

| 945

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Intel&reg;

+

| SCH US15W (Poulsbo)

| style="background:lime" | OK

| style="background:lime" | OK

Line 169:

Line 185:

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| AMD

| AMD

−

| RS780/RS785?

+

| RS780/RS785

| style="background: lime " | OK

| style="background: lime " | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

Line 175:

Line 191:

| SB700/SB7x0

| SB700/SB7x0

| style="background: lime " | OK

| style="background: lime " | OK

−

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| SR56x0

+

| style="background: lime " | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| SB5100

+

| style="background: lime " | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| SB800

+

| style="background: lime " | OK

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| Broadcom

| Broadcom

Line 236:

Line 263:

| Intel&reg;

| Intel&reg;

| EP80579 (Tolapai)

| EP80579 (Tolapai)

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| Intel&reg;

+

| SCH US15W (Poulsbo)

| style="background:lime" | OK

| style="background:lime" | OK

Line 319:

Line 350:

| F71889

| F71889

| style="background:lime" | OK

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Fintek

+

| F81865F

+

| style="background:yellow" | WIP

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

Line 378:

Line 413:

| PC87366

| PC87366

| style="background:#eeeeee" | ?

| style="background:#eeeeee" | ?

+

|- bgcolor="#eeeeee" valign="top"

+

| NSC

+

| PC87382

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| NSC

+

| PC87384

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| NSC

+

| PC87392

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| NSC

| NSC

Line 551:

Line 598:

| Intel&reg;

| Intel&reg;

| EP80579 (Tolapai)

| EP80579 (Tolapai)

−

| style="background: lime" | OK

+

| style="background: yellow" | OK<sup>20</sup>

|}

|}

Line 564:

Line 611:

<sup>14</sup> Working, but not widely tested, yet. Works with single DIMM DDR2.<br />

<sup>14</sup> Working, but not widely tested, yet. Works with single DIMM DDR2.<br />

<sup>15</sup> The Intel 3100/EP80579 UARTs and watchdog timer are integrated as a Super I/O-like device; only the UARTs have been tested so far.<br />

<sup>15</sup> The Intel 3100/EP80579 UARTs and watchdog timer are integrated as a Super I/O-like device; only the UARTs have been tested so far.<br />

<sup>17</sup> MCP55 and CK804 are supported, but no open documents are available from NVIDIA.<br />

<sup>17</sup> MCP55 and CK804 are supported, but no open documents are available from NVIDIA.<br />

<sup>18</sup> Partially supported, but not all features implemented.<br />

<sup>18</sup> Partially supported, but not all features implemented.<br />

<sup>19</sup> Only support for serial port 1 implemented, everything else is unsupported so far due to lack of datasheet.<br />

<sup>19</sup> Only support for serial port 1 implemented, everything else is unsupported so far due to lack of datasheet.<br />

−

</small>

+

<sup>20</sup> Working, but not widely tested, yet. Works with single DIMM DDR2.<br />

−

−

== Devices supported in coreboot v3 ==

−

−

<div style="color: #ff0000">coreboot v3 was an experimental development tree of coreboot which should not be used anymore (there are only very few exceptions)! Most features from v3 are gradually being merged into v4.</div>

−

−

{| border="0" valign="top"

−

| valign="top"|

−

−

'''Northbridges'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Northbridge

−

! align="left" | Status

−

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| Geode&nbsp;LX

−

| style="background:lime" | OK

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| Geode&nbsp;K8

−

| style="background:orange" | WIP

−

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 82443BX&nbsp;(440BX)

−

| style="background:orange" | WIP

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 945

−

| style="background:orange" | WIP

−

−

|- bgcolor="#eeeeee" valign="top"

−

| VIA

−

| CN700

−

| style="background:orange" | WIP

−

−

|}

−

−

| valign="top"|

−

−

'''Southbridges'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Southbridge

−

! align="left" | Status

−

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| AMD-8111

−

| style="background:yellow" | ?

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| AMD-8132

−

| style="background:yellow" | ?

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| AMD-8151

−

| style="background:yellow" | ?

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| CS5536

−

| style="background:lime" | OK

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| RS690

−

| style="background: lime " | OK

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| SB600

−

| style="background: lime " | OK

−

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 82371EB&nbsp;(PIIX4E)

−

| style="background:orange" | WIP

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 82801GX&nbsp;(ICH7)

−

| style="background:orange" | WIP

−

−

|- bgcolor="#eeeeee" valign="top"

−

| NVIDIA

−

| MCP55

−

| style="background:orange" | WIP<sup>1</sup>

−

−

|- bgcolor="#dddddd" valign="top"

−

| VIA

−

| VT8237R

−

| style="background:orange" | WIP

−

−

|}

−

−

| valign="top"|

−

−

'''Super I/Os'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Super&nbsp;I/O

−

! align="left" | Status

−

−

|- bgcolor="#eeeeee" valign="top"

−

| Fintek

−

| F71805F

−

| style="background:orange" | WIP

−

−

|- bgcolor="#dddddd" valign="top"

−

| ITE

−

| IT8712F

−

| style="background:lime" | OK

−

|- bgcolor="#dddddd" valign="top"

−

| ITE

−

| IT8716F

−

| style="background:lime" | OK

−

−

|- bgcolor="#eeeeee" valign="top"

−

| VIA

−

| VT1211

−

| style="background:orange" | WIP

−

−

|- bgcolor="#dddddd" valign="top"

−

| Winbond&trade;

−

| W83627HF

−

| style="background:lime" | OK

−

|- bgcolor="#dddddd" valign="top"

−

| Winbond&trade;

−

| W83627THG

−

| style="background:lime" | OK

−

−

|}

−

−

| valign="top"|

−

−

'''CPUs'''

−

−

{| border="0" style="font-size: smaller"

−

|- bgcolor="#6699dd"

−

! align="left" | Type

−

! align="left" | CPU

−

! align="left" | Status

−

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| Geode LX

−

| style="background:lime" | OK

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| K8

−

| style="background:orange" | WIP

−

−

|- bgcolor="#dddddd" valign="top"

−

| Generic

−

| i586

−

| style="background:orange" | WIP

−

−

|- bgcolor="#eeeeee" valign="top"

−

| Intel

−

| Core Duo / Core 2 Duo

−

| style="background:orange" | WIP

−

−

|- bgcolor="#dddddd" valign="top"

−

| VIA

−

| C7

−

| style="background:orange" | WIP

−

−

|}

−

−

|}

−

−

<small>

−

<sup>1</sup> MCP55 and CK804 are supported, but no open documents are available from NVIDIA.

−

</small>

−

−

== Devices supported in coreboot v1 ==

−

−

Not all devices have been ported from coreboot v1 to coreboot v4, yet (check "v4?" field). If you want to work on such a port contact us on the [[Mailinglist|mailing list]].

−

−

{| border="0" valign="top"

−

| valign="top"|

−

−

'''Northbridges'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Northbridge

−

! align="left" | Status

−

! align="left" | v4?

−

−

|- bgcolor="#eeeeee" valign="top"

−

| Acer

−

| M1631

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| Alpha

−

| Tsunami

−

| style="background:#dddddd" | ?

−

| style="background:#dddddd" | &mdash;<sup>3</sup>

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| AMD76x

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 430TX

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 440BX

−

| style="background:#dddddd" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 440GX

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 82815EP

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 82830

−

| style="background:#dddddd" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 82860

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| E7500

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| E7501

−

| style="background:#dddddd" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| E7505

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| Micron

−

| 21PAD

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| Motorola

−

| MPC107

−

| style="background:#dddddd" | ?

−

| style="background:#dddddd" | &mdash;<sup>3</sup>

−

|- bgcolor="#eeeeee" valign="top"

−

| NSC/AMD

−

| GX1

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| VIA

−

| VT694

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| VIA

−

| VT8601

−

| style="background:#dddddd" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| VIA

−

| VT8623

−

| style="background:#dddddd" | ?

−

| style="background:lime" | Yes

−

|}

−

−

| valign="top"|

−

−

'''Southbridges'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Southbridge

−

! align="left" | Status

−

! align="left" | v4?

−

−

|- bgcolor="#eeeeee" valign="top"

−

| Acer

−

| M1535

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| Acer

−

| M1543

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| AMD

−

| AMD766

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| AMD

−

| AMD768

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| Intel&reg;

−

| 82801

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| Intel&reg;

−

| 82801CA

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| Intel&reg;

−

| 82801DB

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| Intel&reg;

−

| 82870

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| Intel&reg;

−

| PIIX4E

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| NSC/AMD

−

| CS5530

−

| style="background:#dddddd" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| NSC

−

| SCX200

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| VIA

−

| VT8231

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| VIA

−

| VT8235

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| VIA

−

| VT82C686

−

| style="background:#eeeeee" | ?

−

| style="background:yellow" | WIP<sup>2</sup>

−

|- bgcolor="#dddddd" valign="top"

−

| Winbond&trade;

−

| W83C553

−

| style="background:#dddddd" | ?

−

| style="background:#dddddd" | &mdash;<sup>3</sup>

−

|}

−

−

| valign="top"|

−

−

'''Super I/Os'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Super&nbsp;I/O

−

! align="left" | Status

−

! align="left" | v4?

−

−

|- bgcolor="#eeeeee" valign="top"

−

| Acer

−

| M1535

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| ITE

−

| IT8671F

−

| style="background:#dddddd" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| NSC

−

| PC87309

−

| style="background:lime" | OK

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| NSC

−

| PC87351

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| NSC

−

| PC97307

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| NSC

−

| PC97317

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| SiS

−

| 950

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| SMC

−

| FDC37B72X

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| SMC

−

| FDC37B78X

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| SMC

−

| FDC37B807

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| SMC

−

| FDC37C669

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| SMC

−

| FDC37C67X

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| SMC

−

| FDC37N769

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| VIA

−

| VT1211

−

| style="background:#dddddd" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#dddddd" valign="top"

−

| VIA

−

| VT8231

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| VIA

−

| VT82C686

−

| style="background:#dddddd" | ?

−

| style="background:yellow" | WIP<sup>2</sup>

−

|- bgcolor="#eeeeee" valign="top"

−

| Winbond&trade;

−

| W83627HF

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| Winbond&trade;

−

| W83877TF

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| Winbond&trade;

−

| W83977EF

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes<sup>1</sup>

−

|}

−

−

| valign="top"|

−

−

'''North-/Southbridges'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | North/South

−

! align="left" | Status

−

! align="left" | v4?

−

−

|- bgcolor="#eeeeee" valign="top"

−

| NSC

−

| SCX200

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| SiS

−

| 540

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| SiS

−

| 550

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| SiS

−

| 630

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| SiS

−

| 635

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| SiS

−

| 730

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#dddddd" valign="top"

−

| SiS

−

| 735

−

| style="background:#dddddd" | ?

−

| style="background:red" | No

−

|- bgcolor="#eeeeee" valign="top"

−

| ST

−

| STPC

−

| style="background:#eeeeee" | ?

−

| style="background:red" | No

−

|}

−

−

'''CPUs'''

−

−

{| border="0" style="font-size: smaller"

−

|- bgcolor="#6699dd"

−

! align="left" | Type

−

! align="left" | CPU

−

! align="left" | Status

−

! align="left" | v4?

−

−

|- bgcolor="#eeeeee" valign="top"

−

| Alpha

−

| EV6

−

| style="background:#eeeeee" | ?

−

| style="background:#eeeeee" | &mdash;<sup>3</sup>

−

|- bgcolor="#dddddd" valign="top"

−

| PowerPC

−

| ?

−

| style="background:#dddddd" | ?

−

| style="background:#dddddd" | &mdash;<sup>3</sup>

−

|- bgcolor="#eeeeee" valign="top"

−

| x86

−

| AMD

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| x86

−

| Intel&reg;

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|- bgcolor="#eeeeee" valign="top"

−

| x86

−

| VIA

−

| style="background:#eeeeee" | ?

−

| style="background:lime" | Yes

−

|}

−

−

|}

−

−

<small>

−

<sup>1</sup> The W83977EF works fine with the W83977TF code in coreboot v4 (the pre-RAM serial part at least).<br />

−

<sup>2</sup> Pre-RAM serial output works in coreboot v4, but the rest is not supported, yet.<br />

−

<sup>3</sup> Will not be ported anytime soon, we focus on x86 in coreboot v4.<br />

</small>

</small>

__FORCETOC__

__FORCETOC__

Revision as of 16:59, 1 February 2013

coreboot v4 is the current stable coreboot tree recommended for productive use and for porting new boards.

In general it is not recommended to use coreboot v3 — this was an experimental development tree which is gradually being merged into v4.

Also, coreboot v1 should be avoided (if v4 can be used instead for your board), as it has been unmaintained for a long time. However, it is definitely desirable to port boards from v1 to v4 whereever possible.

4 The W83977EF works fine with the W83977TF code (the pre-RAM serial part at least).5 Pre-RAM serial output works fine, but nothing else, yet.9 Works mostly, but currently there are some limitations as to which RAM DIMMs can be used.12 All these Super I/O chips should be supported by the "smscsuperio" driver. Only the ASUS A8000 is tested, though. The floppy disk controller, the parallel port, the serial ports (COM1 + COM2), and the keyboard should work for all chips. More advanced stuff may need more work, though.13 The ASUS A8000 Super I/O seems to be a rebranded SMSC DME1737.14 Working, but not widely tested, yet. Works with single DIMM DDR2.15 The Intel 3100/EP80579 UARTs and watchdog timer are integrated as a Super I/O-like device; only the UARTs have been tested so far.16 Two implementations: Rev B-C supported in coreboot, Rev D-E support via AGESA17 MCP55 and CK804 are supported, but no open documents are available from NVIDIA.18 Partially supported, but not all features implemented.19 Only support for serial port 1 implemented, everything else is unsupported so far due to lack of datasheet.20 Working, but not widely tested, yet. Works with single DIMM DDR2.