Product Announcement DGS-3426
Date: Dec 16,2005 Product
24-port Gigabit L2+ Stackable Management Switch with 4 Combo SFP and 2 open slots for optional Description: 10GE modules Revision:
A1 Availability: End of Dec, 2005 Picture: Why Sell
DGS-3400 series is the Layer 2+ members of D-Link xStack product line. All DGS-3400 This
series provides 24/48 10/100/1000Mbps Gigabit Ethernet ports, 4 combo SFP and 10G Product:
open slots for optional 10GE modules. 10/100/1000Mbps Gigabit Ethernet ports allow you to connect to another LAN switches, or directly connect to the power users with Gigabit access. 4 combo SFP ports provide the fiber connectivity. 10GE open slots in the back-panel can be plugged with 10GE XFP modules for fiber uplinks or 10GE copper modules for inter-device connection. Also DGS-3400 series can be stacked with 10G copper module providing up to 40G stacking bandwidth, or cab stack with DGS/DXS-3300 series with D-Link SIM technology. And the third 10GE slot of DGS-3427 is available for more advanced network architecture like providing 10GE uplink for a Ring stack or dual 10GE uplinks for a ring stack for uplink load sharing & fail-over.

With the latest technology, DGS-3400 series Switches provide L2 plus features including IPv4/v6 static routing, QoS and ACL filtering. Packet routing and protocol filtering/inspection make the Switch act even as the Layer 4 switches.

QoS
Per flow bandwidth control 802.1p support 8 Queues per Port CoS Based on Switch Port CoS Based on MAC address CoS Based on 802.1p priority CoS Based on VLAN CoS Based on Protocol type CoS Based on TOS CoS Based on DSCP CoS Based on IPv4/v6 address CoS Based on IPv6 Traffic class CoS Based on IPv6 flow label CoS Based on TCP/UDP port

ACL (Access Control List)
Per Port ACL Maximum 768 Rules Based on Switch Port Based on MAC address Based on 802.1p priority Based on VLAN Based on Protocol type Based on TOS Based on DSCP Based on IP address Based on IPv4/v6 address Based on IPv6 Traffic class Based on IPv6 flow label Based on TCP/UDP port CPU interface filtering