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AR# 41985

Description

The ISE software can generate the following error message for a Spartan-6 MIG MCB design:

"ERROR:PhysDesignRules:2268 - Invalid configuration (incorrect pin connections and/or modes) on block:<hierarchy/memcx_infrastructure_inst/BUFPLL_MCB_INST>:<BUFPLL_MCB_BUFPLL_MCB>. In order to ensure proper reset behavior, the GCLK, LOCKED and LOCK pins all need to be connected appropriately. Please see AR#35976 for specific details."

This error message can indicate that an older version MIG design witha previousversion of the BUFPLL_MCB instantiation is being compiled in ISE tools version 12.2 or higher.

This error message can also indicate that the sys_rst signal to the Spartan-6 MIG or MPMC design has been incorrectly (permanently) asserted in the user's design.

Solution

The ISE tools 12.2 and greater use an updatedBUFPLL_MCB primitive for Spartan-6 FPGA that has two additional ports.TheLOCKED and GCLK ports have been added to address a reset issue that existed with the Spartan-6 FPGA BUFPLL_MCB block in ISE tools 12.1 and prior versions; see (Xilinx Answer 35976). If a design that has been generated by an earlier version of MIG is compiled in ISE tools 12.2 or higher, the tools will generate the error message above. This error message can be caused by using the old version of the BUFPLL_MCB without the additional ports, or if the reset port to the PLL driving the BUFPLL_MCB is tied such that it is permanently asserted. If the error above is generated and the design uses the newer version of the BUFPLL_MCB, the user should check the PLL reset connection to ensure it is controlled appropriately and not permanently enabled.