ARM is pleased to announce a port of binutils, gas and ld to its
AArch64 architecture.
Please note that while these tools have been used to build a large
body of software, they cannot yet be considered complete. We believe
that the code is now in a state where it is worth starting the process
of a public review.
In order to ensure that the assembler and disassembler remain
synchronized we have implemented a unified instruction description
table in opcodes that is shared by both the assembler and the
disassembler. A generator is used at compile time to generate both
the decoding decision tree used by the disassembler and the various
functions required by both disassembler and assembler.
No target independent changes are required to support this port beyond
those that are necessary for any new target (such as adding
relocations to bfd/reloc.c).
There are still a number of features that require some further
work. Issues that we are aware of include:
- Linker support for garbage collection of unused sections.
- Further memory and TLS models
- Support for ifunc.
The patches to support this are separated as follows:
0/6 - This message
1/6 - Toplevel configury changes
2/6 - opcode changes
3/6 - bfd changes
4/6 - gas changes
5/6 - ld changes
6/6 - binutils changes
R.