Pipelined Implementation of Densely Packed Decimal Encoding

Abstract

The BCD (Binary Coded Decimal) is one of the most popular encoding scheme for decimal numbers in which each digit is represented by its own binary sequence. A decimal digit
(base 10) , 0 through 9, can be can be represented as a sequence of 4 bits in BCD encoding scheme. However, when representing decimal numers, 0 through 9, only 10 out
of 16 possible binary sequences are used. Tien Chi Chen and Irving T. Ho proposed an encoding scheme in 1975 now known as Chen-Ho encoding.It encodes three decimal digits
in 10 bits (which require 12 bits in BCD encoding scheme) using an algorithm which can be applied or reversed using only simple Boolean operations, but limited to the fact that
number of digits should be a multiple of 3. An improvement to the encoding which has the same advantages but is not limited to multiples of three digits was described by
M.F. Cowlishaw called Densely Packed Decimal (DPD) encoding allows arbitrary-length decimal numbers to be coded eciently. The IEEE-754-2008 Packed Decimal Encoding
(PDE) is a way of encoding decimal numbers. The core of the packed-decimal encoding IEEE-754-2008 is the DPD encoding sceme. The DPD encoding (BCD to DPD) and the decoding (DPD to BCD)mechanism must be very fast as it is applied for every decimal number in every calculation. Moreover, DPD encoding can also be used in data communication which can help in reducing the number of bits to be transmitted or
received. This thesis includes the work for a pipelined implementation of a DPD encoder and decoder, its simulation on hardware using VHDL and Xilinx Spartan 3E FPGA.