This Monday, June 26, 2006, Intel will launch its new Woodcrest processor, a server processor based on Intel's Core architecture. The new processor family, dubbed Xeon DP, will use Socket LGA-771 and include support for multiple-CPUs -- which enables a system to support more than one Woodcrest processor, as opposed to being limited to just a single Core 2 processor per system. Despite the significant difference, every other aspect of Woodcrest is virtually identical to Core 2 Duo for the desktop.

Intel's new Woodcrest processor comes at us with the intention to compliment and ultimately replace Dempsey, Intel's latest dual-core Xeon processor based on the NetBurst microarchitecture. While both Dempsey and Woodcrest are based on 65nm processes, Woodcrest will focus a great deal on power consumption efficiency. Both Dempsey and Woodcrest have a TDP envelope of 130W, but the performance is much higher on Woodcrest giving better performance-per-Watt. Being a NetBurst component, Dempsey scaled high in clockspeed, reaching up to 3.73GHz on a 1066MHz FSB. It also employed a 2x2MB L2 cache structure versus Woodcrest's shared 4MB L2 cache. Another detail to note is that Dempsey is capable of processing up to four threads simultaneously thanks to Hyper-Threading, versus Woodcrest's maximum of two -- Hyper-Threading is not enabled on the first Core 2 Duo nor Woodcrest Xeons.During some demonstrations of Woodcrest, Intel stated that when compared to AMD's Opteron processor, Woodcrest can be up to 33% more efficient in power consumption. Actual tests however indicated that Woodcrest is about 10% to 15% lower in some situations. As for evolution, Intel says that the new Woodcrest is two to three times better in power efficiency over the previous Dempsey core. AMD also recently published its opinion on server power consumption.

Unfortunately, here's the kicker. Numerous channel vendors have contacted DailyTech claiming that availability of Woodcrest will not be for another two weeks. Synnex and ASI will be the only US distributors with any quantity, and then general availability begins WW31. One vendor sent DailyTech a memo claiming "[the] second week of August is when we start to get box [processors] in volume." Several vendors will announce system builds with the processors immediately, but there will be no channel availability. Motherboards are already widely available as every Socket 771 motherboard that supports Dempsey also supports Woodcrest. Intel will ship Woodcrest Xeon DP in the following configurations:

Intel Xeon Processor

Processor Brand

ProcessorNo.

Core /FSB

L2 Cache

Price @Launch

Xeon Processor DP(Woodcrest Bin-0)

5160

3.0GHz /1333MHz

4MB

$850

Xeon Processor DP(Woodcrest Bin-1)

5150

2.66GHz /1333MHz

4MB

$690

Xeon Processor DP(Woodcrest Bin-2)

5140

2.33GHz /1333MHz

4MB

$455

Xeon Processor DP(Woodcrest Bin-3)

5130

2.0GHz /1333MHz

4MB

$320

Xeon Processor DP(Woodcrest Bin-4)

5120

1.86GHz /1066MHz

4MB

$260

Xeon Processor DP(Woodcrest Bin-5)

5110

1.60GHz /1066MHz

4MB

$210

All Woodcrest processors will sport 4MB of L2 cache and are
manufactured at 65nm. Prices will start at $210 and increase up to $850
in batches of 1000. With Woodcrest it's evident that most if
not all of the world's top server companies will be shipping systems
with the new processor. One of the most anticipated uses of Woodcrest will be Apple, which is expected to be releasing Woodcrest based systems later this year.Woodcrest will be accompanied by DDR2 memory, running at either DDR2-533 or DDR2-667. On Intel's Bensley platform, Xeon DP systems will be limited in the graphics department -- systems will only support a single-lane PCI Express setup. However, memory performance should see a nice boost thanks to the use of fully-buffered DIMMs (FB-DIMMs).

Looking further down the road, Intel's Clovertown will feature quad-cores -- two Woodcrest dice stamped onto a single package. This gives Clovertown systems the ability to scale up to eight CPU cores. Intel also says that Clovertown will deliver power consumption levels on par with Woodcrest. Later this year, Intel will also release Xeon MP Tulsa, the final processor based on the NetBurst architecture. Tulsa may be the last NetBurst processor from Intel, but it will be the company's first x86 processor to support shared L3 cache. Intel's Itanium 2 Montecito processor will be the company's first shared-L3 processor.

Looking through into 2007, Intel is expected to introduce Tigerton, a new Xeon MP processor set to replace Tulsa. Tigerton is expected to contain at least four cores and have support for SMP configurations of four or more processors per system. With Tigerton, Intel is also expected to include a technology it currently calls "dedicated high-speed interconnect." The new technology gives each processor a direct pathway to the chipset. This will prove to be much faster than today's front-side bus technology. Actual launch dates for Tigerton are still unknown.

quote: Personally, I reckon the stories of tight supply on NGMA chips is probably FUD. For starters, the world is absolutely drowning in leaked engineering samples and the press are currently being buried in samples, too

Some problems with this assessment...
1. Intel's total 65nm production capacity has only just crossed the 50% mark according to Paul Otellini. This includes all 65nm chips (Yonah, Pressler, Cedar Mill, etc...)

2. Only 2 Fabs (large ones, D1D and F12) are currently running and ramping 65nm, with 2 smaller Fabs just now coming online (F24 and D1C). However D1D is already cutting back on 65nm in order to get ready for 45nm at the end of next year.

3. Producing Engineering Samples says nothing about yields. They can produce amazing chips that are low yield and still come up with 10k+ just from their attempts to tweak the yield process. However, for production that isn't cost effective...

4. Merom has a HUGE die size (almost twice that of Yonah) because it's going from 2MB to 4MB of cache. This means that they can only produce half the number with the same wafer space.

So, tight supply should be expected...and remember that it takes ~3 months to complete a wafer.

Yup, all fair points, although my experience in the past is that sample availability has in past definitely reflected general availability. When yields and are very low, the sample number do tend to go down and it's the press that feel it first - as you would expect, customers / system integrators are first priority for samples.

I also don't think that Intel having only 50% 65nm capacity is a major impediment. there are plenty of netburst chips being made on 65nm that I presume are being dropped to make way for NGMA chips.

In short, I'm fairly sure that as these things go (ie the launch of a brand new CPU architecture) NGMA chips will have perfectly good availability. I'm sure that anyone who really cares about these things will be able to get hold of one. And givne the great pricing Intel is they'll be getting them for surprisingly little money. From an end user perspective NGMA is all good, plain and simple.

quote: my experience in the past is that sample availability has in past definitely reflected general availability

You are forgetting that these are unique times...

1. Intel has never been so far behind for so long before
2. Intel has never waged a preview campaign so early and with so much marketing before.
3. Intel has never lost so much revenue share (as opposed to market share) before, let alone in such a short period of time.

quote: I also don't think that Intel having only 50% 65nm capacity is a major impediment. there are plenty of netburst chips being made on 65nm that I presume are being dropped to make way for NGMA chips

Actually, the Netburst chips won't be dropped this year...in fact Intel just released another new stepping for them.

According to Intel's own numbers, NGMA will certainly be in tight supply...but this should not come as a surprise to anyone considering that they have pushed it's release ahead so much from it's initially planned launch (Q1 07). Rembember that the equipment and everything else has to be designed and ordered years in advance...

1. Intel has never been so far behind for so long before
2. Intel has never waged a preview campaign so early and with so much marketing before.
3. Intel has never lost so much revenue share (as opposed to market share) before, let alone in such a short period of time.

And what specific relevance to availability do those three things have?

Actually, you responded to his assertion that availability of engineering samples correlates to general availability, which means that your 3-item list was attempting to disprove that assertion (that the relative wide availability of engineering samples does not, in this case, indicate wide availability of the chips when they ship). In effect, you are talking about the general availability.

quote: you responded to his assertion that availability of engineering samples correlates to general availability, which means that your 3-item list was attempting to disprove that assertion

Because he based that assertion on past experience...
My point was that times have changed as have Intel's marketing strategies (shipping of Engineering Samples in this case is a Marketing Division responsibility).

quote: The marketing division cannot ship what isn't available. A change in marketing strategy doesn't necessarily have anything to do with actual available supply

Uh-huh...but I don't get your point. caboose wasn't saying that they didn't ship ESs because they couldn't produce them, he just made the point that Intel has previously tended not to ship many ES chips when the production run was in low volume...
Producing all of the ES chips to date is like 20-30 wafers worth (out of 100s-1000s), even if the yields are terrible. Supply has nothing to do with it.

Marketing is the division that decides how many ES chips to ship and who to ship them to. Even with an absolutely horribly yielding chip, manufacturing would be able to supply whatever they need for that...

1. Caboose said that he figures that supplies will be higher than expected on Conroe because Intel has so many Engineering samples out there. His reasoning is that the only time Intel has sent out numerous Engineering Samples in the past, they have had a large volume of production chips stockpiled.

2. I pointed out that the decision of how many ES chips to ship is a marketing decision, and it has nothing to do with what kind of inventory is available.

3. I also pointed out that even though the marketing people have always followed the pattern he suggest in the past, the situation Intel has found itself in over the last few years is probably responsible for them changing this strategy.