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The contents of this register are returned over SPI when an instruction byte is clocked into the radio. The NOP instruction can be clocked in to retrieve this register quickly.

The RX_DR and TX_DS interrupt bits might both be set, if the radio receives an ack packet that includes a payload. The TX_DS and MAX_RT interrupts will never be fired at the same time. The interrupt bits must be cleared manually by writing “1”s to them after the interrupts have been handled. (See this FAQ for a discussion on why interrupt bits are commonly cleared by writing “1”s to them despite the rule seeming counterintuitive at first.)

The RX_P_NO field holds the number of the Rx pipe that received the packet at the head of the Rx FIFO. When that packet is removed from the FIFO (using the R_RX_PAYLOAD instruction), RX_P_NO holds the number of the Rx pipe that received the next packet, or 111 if there are no more packets in the FIFO.

The radio driver doesn’t currently take advantage of the Tx FIFO to load multiple packets for transmission, so it doesn’t use TX_FULL.