MSP10-512/256 Core 100G MACsec IP Core

General Description

Implementation of the new LAN security standard IEEE 802.1ae (MACsec) requires the NIST standard AES cipher in the GCM mode for encryption and message authentication, as well as header parsing and formatting operations on the transmitted and received packets. MACsec Security Processor (MSP) IP cores by IP Cores, Inc. are designed for high data rates and implement complete line-rate packet processing with no per-packet CPU intervention. The MSP10-512/256
cores are tuned for 100 Gbps applications on modern FPGAs that require 256 bit AES keys.

Applications

Symbols

Pin Description

Synchronous enable signal. When LOW the core ignores all its inputs and all its outputs must be ignored.

Sink Interface

D[511:0]

Input

Databus data signal

Dready

Output

Databus ready signal

Dvalid

Input

Databus valid signal

Dstart

Input

Databus startofpacket signal. Indicates that the first word of the input packet is driven into the core on the D bus.

Dlast

Input

Databus endofpacket signal

Dbcn[5:0]

Input

Databus empty signal. Asserted together with last, indicates the number of unused bytes in the LSB of the D bus.

Derror[1:0]

Input

Databus error signal. MSP10-512D only. Allows the core to receive the Rx error indicators (typically fcs_error and rx_error) from the MAC. The core does not interpret these and simply passes them through to the source interface alongside with its own errors.

Source Interface

Q[511:0]

Output

Databus data signal

Qready

Input

Databus ready signal

Qvalid

Output

Databus valid signal

Qstart

Output

Databus startofpacket signal. Indicates that the first word of the input packet is driven by the core onto the Q bus.

Qlast

Output

Databus endofpacket signal

Qbcn[5:0]

Output

Databus empty signal. Asserted together with last, indicates the number of unused bytes in the LSB of the D bus.

Qerror[31:0]

Output

Databus error signal. Can be asserted at different times and usually indicates the need for the external circuitry to take specific action (see the details below).

Configuration. The signals in this group typically have constant values during the core operation