Hybrid Memory Cube Specification Finalized – Stacked DRAM

More than 100 developer and adopter members of the Hybrid Memory Cube Consortium (HMCC) announced earlier this week that they’ve reached consensus for the global standard that will deliver a much-anticipated, disruptive memory computing solution. Developed in only 17 months, the final specification marks the turning point for designers in a wide range of segments—from networking and high-performance computing, to industrial and beyond—to begin designing Hybrid Memory Cube (HMC) technology into future products. A major breakthrough with HMC is the long-awaited utilization of advanced technologies to combine high performance logic with state-of-the-art DRAM.

The next goal for the consortium is to further advance standards designed to increase data rate speeds from 10, 12.5 and 15 gigabits per second (Gb/s) up to 28 Gb/s for SR and from 10 Gb/s up to 15 Gb/s for USR. The next-generation specification is projected to gain consortium agreement by the first quarter of 2014.

“The consensus we have among major memory companies and many others in the industry will contribute significantly to the launch of this promising technology.” said Jim Elliott, Vice President, Memory Planning and Product Marketing, Samsung Semiconductor, Inc. “As a result of the work of the HMCC, IT system designers and manufacturers will be able to get new green memory solutions that outperform other memory options offered today.”