Welcome

on this new website (created on July 2010). Here the properties of RS flip-flops are fully and correctly described.On this basis, a previously unknown pulse circuit is presented, which again provides the basis for a new asynchronous JK flip-flop / JK latch.

You want to record a way you traveled, and at different positions add pauses, pictures and textes. You want to show the result dynamically together with a statistics and at last create a mp4-file of the result. Then, you will find here the exact description of a app for your smartphone.
During recording you can use your phone for all other tasks!
To show the video, please use a suitable browser (for example firefox).

But why alternative?Alternative, because the properties described here are fundamentally different in one significant detail from the official international doctrine (at the time of publication of this website!). Thus this representation is with one exception (in my opinion has joined http://www.elektronik-kompendium.de) contrary to all (known to me) explanations in reference books and the internet. On the following pages is also clear that the hitherto customary representation resulted in no problems. But It restricts the possibilities of RS flip-flops in consequence of incorrect conclusions.

This page is also designed for those who resist taking a holistic view of the properties of the RS flip-flop. Either they do not understand my comments or maybe they will not understand it. And it is not to difficult. As intelligent electronic technician or hobbyist, you will understand it. And you will understand how much nonsense is written anywhere in the world to this topic. To date (end of 2013) the German Wikipedia has already made some progress, the English Wikipedia is still far behind. But to understand something you must be able to think and not only to write off and to quote.

Honestly, the two new circuits (Ideal pulse circuit and asynchronous JK flip-flop / JK latch) are theoretically not to be understood simply, even for experts. Because some 'experts' come quickly to the conclusion, "..but there must surely occur RACE CONDITIONS, that can not work at all".. But it works correctly!! And why it still works, is to be explained on this site. Whoever it theoretically not immediately understand can simply test the circuits practical, or even easier to use the attached simulation program (excel file).
Under the menu RS flip-flop, I investigate the different views in the literature and the Internet.

1. Most recently - Some have already responded! (As of 11/01/2010)

The actual release for the creation of this site has been the negative reaction of apparently co-responsible of the German and English Wikipedias to my discussion posts (since 2007), in which I requested to correct the desriptions of the RS flip-flop. Since they there not want to learn I had to do it yourself!

However, had the German Wikipedia the publication of my circuits shown in the following pages of the "ideal pulse circuit" and "non-clocked JK flip-flop", while the English Wikipedia deleted after a short time my article with the two circuits. If you look Nov. 2010 to the Wikipedia pages, is a significant change note.
In the German Wikipedia will appear in the truth table and in the description no longer with R=S=1 (NOR), the reference to meta- or instability.
Unfortunately, at this point is to find but still the misleading example of a seesaw. This still shows R=S=1 has instable.
In the English Wikipedia is not discussed more on the way R=S=1. The former truth table, which identified at R=S=1, no change in the previously current state, is missing.
On 01/01/2011, new changes were made and so on. For instance R=S=1 is now called 'restricted combination' (Feb. 2011)
Further changes should not be mentioned here.

2. Objective and conclusions

The statements on this website shall show that the standard definition or description of the RS flip-flop should be revised. Furthermore, it should be clear how to built up an ideal pulse circuit without RC combination. This one is for instance the basis for the development from asynchronous JK flip-flops / JK latches. Furthermore there are easy ways to build monolithic circuits.
The circuits shown in this site are everywhere of advantage where possible high frequency limit must be achieved or where there is no clock signal, etc.