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Trim-Alterable Mlc Chip Cavity

Publishing Venue

IBM

Related People

Fritz, RA: AUTHOR

Abstract

This article discloses the design for a multi-layered ceramic (MCL) module which estimates the need for different chip sizes for different sized chips, thereby standardizing modules for a particular I/O count package. Fig. 1 illustrates the current practice in which the modules have the "finger pads" at a ceramic level above the chip bond pad which generally dictates the minimum sized chip which can be installed. Thus, as the chip gets smaller, the wire length increases, thereby creating a yield in reliability problems due to wire shorting together. Note also that the chip cavity requires tow different sized punches to allow for the wire bond pads (finger pads). Fig. 2 illustrates the proposed design in which one less layer of metallurgy is required.

Country

United States

Language

English (United States)

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Trim-Alterable Mlc Chip Cavity

This article discloses the design for a multi-layered ceramic (MCL) module
which estimates the need for different chip sizes for different sized chips, thereby
standardizing modules for a particular I/O count package. Fig. 1 illustrates the
current practice in which the modules have the "finger pads" at a ceramic level
above the chip bond pad which generally dictates the minimum sized chip which
can be installed. Thus, as the chip gets smaller, the wire length increases,
thereby creating a yield in reliability problems due to wire shorting together. Note
also that the chip cavity requires tow different sized punches to allow for the wire
bond pads (finger pads). Fig. 2 illustrates the proposed design in which one less
layer of metallurgy is required. Thus, the chip cavity only requires one sized
punch, and the wires may be bonded to the finger pads on the lower layer of
ceramic. The chip bond pad is "put down" as part of the circuit metallurgy and
made oversized, as illustrated in Fig. 3A, to allow a trimming operation similar to
resistor trimming. Following this, the metallurgy is plated, and then the pad is
trimmed to the size of the chip, as illustrated in Fig. 3B, and the finger-pad's trim
separated from the bond pad.