The circuitry is pretty simple here; it just seems to use 2 74'670s for PRG banking and 2 for CHR banking. (So the hardware makes it look like it should support up to 2 MiB of PRG and 512 KiB of CHR.)

There's additionally the 8 KiB PRG-RAM, as you graciously desoldered.

Any chance you could provide better photographs (i.e. brighter light, no shadows, higher resolution), or else just sit down with a continuity meter and determine what pins connect to what? Some things are easy (e.g. we know that the register file outputs have to connect to PRG A13…A20 and CHR A11…A18; and their inputs at least mostly connect to CPU D0…D7), but knowing the rest of the connectivity would make diagnosing/debugging easier.

It seems very likely that there's some assumption made in the GAL's programming that allows the game to boot correctly on a famiclone that isn't true on the famicom.

For example, Disch's notes for mapper 246 say that the PRG bank at $E000 is set to $FF on boot, which might be implemented using some logic in the GAL in combination with the 74'670's /OE pins, rather than actually writing a value to the '670 during boot.

The bright side is that, if we can figure out the full connectivity of the GAL, we should be able to generate a new fusemap for it that would let it work on a famicom as well. This is what I can tell from the photos, as far as the GAL is concerned:

There's a bunch of interesting questions here, although I'm not entirely certain whether any of them will help make it work.

First the random irrelevant musing:Disch's notes suggest that only the 6 KiB of RAM from $6800-$7FFF are used, but if the registers are only decoded over $6000-$600F (as is possible if it's connected to CPU A4…A14, /ROMSEL, and M2), the RAM could be present over the entire 8KiB range, and only waste 4 bytes of it.

The /RE output has to be what's used here for initial power up. Somehow, the hardware has to assume that when /RE is high, the outputs of the '670s are HiZ (and then float high).

Mind, I'm not certain why they would float high; the 74LS series part should float to somewhere around 2V or so, which shouldn't be high enough for CMOS .... wait a moment. Do the famiclones run at 3V instead of 5V? If that's what's wrong, you could try adding large pullups to the PRG 74'670's outputs (around 10kΩ)

Last edited by lidnariq on Tue Mar 22, 2016 2:36 pm, edited 1 time in total.

Er, what orientation was the LED? It tentatively sounds like you connected the anode to /RE, and the cathode to ground? So lit = +5V, off = 0V, and somewhere inbetween = oscillating?

That's a little confusing.

Really, oscillating at all is confusing. With the GAL, I don't see how it could have enough leftover state to detect when the CPU has reset. It does sound like it's executing bad code, as you expected.

Anyway, the headphone thing: connect probe-10k resistor-headphones-ground. The 10k resistor will limit current to quiet enough that it won't be painful to hear, but enough current will still flow that you'll hear a click when the voltage changes.

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