Title : ( Securing Embedded Processors against Power Analysis based Side Channel Attacks using Reconfigurable Architecture )

Power analysis based side channel attacks are
significant security risk in embedded applications.
Reconfigurable architecture has already been proposed as a
security improvement method for run time monitoring systems
or implementing critical parts of cryptographic applications.
Here we propose reconfigurable architecture as a hardware
countermeasure against power analysis based side channel
attacks. We augment an embedded processor with a
reconfigurable functional unit (RFU). By random execution of
custom instructions on the RFU we mask power analysis based
side channel attacks. Moreover we devised an automatic design
flow to generate RFU and its configuration bits from
cryptographic algorithms’ source code. Obfuscation of base
processor power traces as our primary goal is complied with
RFUs covering in average about 30% of object code. We also
report the power traces for our secure processor and the
overall timing and area overhead. The correlation coefficient is
calculated for AES and SHA cryptographic algorithms and
experimental results show our method produces power traces
close to random traces. Our approach is completely generic
and can be used for any cryptographic application. Compared
to previous methods, our work costs no runtime overhead and
an average of 27% area overhead.