Controlled Data and Resource Sharing in Multi-Core Platforms

Sandhya Dwarkadas, Department of Computer Science, University of Rochester, Rochester, New York, USA

Date and Time

Wednesday, March 10th, 2010 at 13.30

Location

Polacksbaken, room 2446

Abstract

Technology projections indicate the possibility of 50 billion transistors on a chip in a few years, with the processor landscape being dominated by multi-core designs.

Developing correct and reliable software that takes advantage of the multiple cores to deliver high performance, while at the same time ensuring performance isolation, remains a growing challenge.

In this talk, I will begin by describing our changes to existing coherence mechanisms in order to control data sharing --- in particular, to monitor memory, isolate data modifications, support fine-grain protection, and improve the efficiency of fine-grain sharing. I will discuss the utility of the mechanisms for a range of applications and show how monitoring and isolation can be combined to support one parallel programming construct --- transactional memory.

The prevalence of multi-core processors also implies more ubiquitous resource sharing at several levels. Controlled resource sharing is essential in order to provide performance isolation, dictating the need for resource-aware policies within the operating system.

As time permits, I will also describe our efforts in combining resource utilization prediction, resource control mechanisms, and resource-aware policies in order to effect performance isolation at the operating system level and improve multi-core resource utilization.