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If you are interested in one or more of the topics below, please follow the respective links that will lead you to a short registration form. After registering you will be able to view all webinar recordings and videocasts free of charge.

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Automotive analog ICs are required to function without incidents over the expected product lifetime of 10 years and longer. This may equally apply to industrial and medical designs. While the goal of achieving zero incidences is the same, the actual operating conditions such as bias conditions and duty cycles, can vary considerably. The hot carrier injection (HCI) lifetime of high-voltage transistors is one of the critical areas that need to be considered.X-FAB offers a suite of readily available process reliability documentation and support information including comprehensive Safe Operating Area (SOA) characterization to help you on your path towards achieving first-time-right designs. This webinar will provide an overview of the HCI reliability related material available for the 40 V and 60 V transistors of X-FAB’s 180 nm high-voltage SOI process (XT018). This is followed by a step-by-step guide of how to effectively utilize the given information to gauge the HCI lifetime based on a circuit example.

More complex designs, shorter time to market and less time for engineering – these are the challenges IC designers are facing today. X-FAB addresses these to assist you in your design process. This 10th webinar of X-FAB’s first-time-right series will look at advancements made related to PDK features and design methodology since starting the series three years ago. This webinar will showcase innovative PDK features and design methods which help you maximize design productivity and achieve first-time-right functional silicon. Watch this webinar and learn about new capabilities such as dummy structure generation flow for improved design robustness, simplified analysis of operating condition check results and advanced IP features for power/performance/area optimization.

The best performance of a semiconductor component will not necessarily lead to success if it cannot be manufactured with a suitable quality. In order to achieve highest quality at reasonable costs, very challenging solutions need to be developed and integrated into semiconductor technologies. To enable advanced analog/mixed-signal products for a safe application in harsh environments such as automotive or avionics and for consumer markets, built-in robustness is paramount. The webinar will show the requirements, solutions and consequences for X-FAB’s semiconductor manufacturing processes and their architecture. Important aspects such as process and primitive device selection, process capability, primitive device reliability and chip-package interaction will be addressed. Finally, guidelines for the development and qualification of robust products and a safe launch process will be presented.

Designs are becoming more complex with different parts of the design often being developed by separate teams across the globe. Whilst X-FAB’s open platform processes offer a huge flexibility and modularity, they are also complex in terms of required and forbidden module combinations. This webinar will show how we can help you set up your development projects in the right way to work efficiently together in a large, distributed team, to avoid any conflict when combining the different parts of the design, and to meet your timelines and cost targets.

With the SpecXplorer, X-FAB offers a comprehensive, easy-to-use web application with powerful filter and search capabilities. Instead of going through hundreds of pages of PDF documents, this tool supports a fast and easy comparison between different process families, helps you find the right module combination for selected devices and enables you to filter the process data to what you really need for your project. A recent addition of SpecXplorer now supports a consistent usage of the module and device selection throughout the design flow by interfacing with X-FAB’s comprehensive project setup scripts.

Nowadays, achieving Human Body Model (HBM) robustness levels from 2kV up to 8kV is a requirement for nearly every newly-designed IC. Designing ESD-robust analog/mixed-signal devices can be a challenging and often daunting task for designers. ESD simulation of integrated circuits from device level up to full chip level is therefore needed to reach this goal without multiple design iterations.This webinar will showcase how these challenges can be addressed using X-FAB’s ESD Design Checker tool which enables a “virtual“ ESD test on circuit level at an early design stage, providing a first rough estimation of the ESD robustness of the IC. The tool helps in determining ESD discharge paths and identifying possible ESD weak points, thus enabling designers to reduce design cycle time and to achieve first-time-right functional silicon.

Today’s state-of-the-art SOI processes support very compact deep-trench-isolated high-voltage devices with a significantly smaller footprint than is possible with conventional isolation schemes, fulfilling the needs of the growing smart power IC market. While the low RDSon of these devices helps to create very area-efficient drivers, it introduces new challenges to the design of the metal interconnect and the distribution of high current densities. This webinar will discuss how these challenges can be addressed using the latest design and verification tools. In addition, possibilities for layout automation using a pcell-based driver metallization will be shown. This highly automated layout flow enables designers to quickly evaluate several different layout variants and architectures avoiding error-prone manual layout.

Elevated levels of integration combined with growing demands for greater cost effectiveness in electronic system implementations (from automotive right through to consumer applications) are increasing the need for IC electro-static discharge (ESD) robustness at the system level. System level ESD is a concern when any IC pin is directly connected to the “outer world”. These external pins have to be able to withstand high energy ESD pulses or else the system's long term operation could be put at risk.In the latest of its series of informative webinars, X-FAB will discuss the implementation of ESD protection regarding system-level ESD and high energy ESD pulses. It will cover the difference between component and system-level ESD protection, provide insights on how to apply characterization methods such as the Human Metal Model (HMM) and Long-Duration Transmission Line Pulsing (LD-TLP). The presenter will also share best practices for safeguarding against system-level ESD and high energy ESD pulses.

Image sensors are used more and more in daily life, not only in mobile phones, cars and computers, but also in areas such as medical, industrial and scientific applications. There are various challenges in pixel design, and especially so for large 4 transistor pixels which are necessary for high speed applications. This webinar will give practical suggestions on the design of three- and four transistor pixels. It will provide some tips how to improve the speed of large pixels and generally on how to optimize designs that require large silicon areas. You will also receive information about X-FAB’s newly released 0.18µm process platform XS018 which is optimized for image sensor applications and comes with features such as a pinned photo diode for 4 transistor pixel designs and low dark current.

Low-noise design is one of many challenging tasks for mixed-signal designers. Knowing how to reduce low-frequency noise is crucial for achieving an optimal signal-to-noise ratio. This webinar presents a short overview of the various noise types in MOSFETs and explains how they relate to typical devices in circuit designs. It also explores methods for achieving an accurate simulated noise model – another essential consideration for first-time-right low-noise designs. X-FAB strongly emphasizes the accuracy of the noise characterization and the models used to depict transistor behavior across different conditions. X-FAB also factors in how special low-noise devices used at critical circuit points can influence total noise performance. This webinar showcases application examples, provides valuable information about X-FAB's new low-noise CMOS devices and highlights the advantages of using these devices in your design.

Reducing power consumption is unquestionably a top priority for analog/mixed-signal designs due to growing demand for battery-powered mobile applications. Responding to this need, X-FAB will offer a free webinar worldwide. This webinar explains how a unique combination of technology – a CPF/UPF (Common / Unified Power Format) design specification and X-FAB’s digital standard cell libraries – makes low-power designs more reliable and reusable. Come find out how to prepare and apply low-power design specifications with CPF and UPF standards that can help shorten design cycles and reduce errors at each design stage. Also learn how X-FAB’s digital standard cells with multi-voltage/ power shut-off are implemented, and how they work together with a power aware tool chain to enhance low power design flows. X-FAB’s reference kit supports fast and easy adoption of such power aware design flows by providing a realistic design and detailed documentation.

An increasing number of applications such as automotive engine management require electronic systems which operate reliably at temperatures above 150°C. Designers are facing the challenges of dealing with changes in electrical characteristics, higher leakage current and thermally accelerated degradation.This webinar looks at the device physics, electrical properties of MOSFETs and NVMs, and degradation mechanisms at elevated temperatures up to 200°C. It will discuss the behaviour of CMOS when it is operated at higher temperatures and how the issues which arise can be mitigated by process architecture and design techniques. In addition, X-FAB’s broad portfolio of bulk and SOI CMOS processes for use at high temperatures up to 225°C will be presented.

To meet stringent quality requirements like 0 ppm, it's essential to build in robust quality and verify it during product design development. This webinar will review the impact of manufacturing variations and tolerances in semiconductor processes for zero-failure-quality targets. It will introduce countermeasures like six-sigma design practice, design centering, robustness indicator figures (RIF) and statistical reliability modeling. Quality verification and robustness validation concepts will be discussed, as well as selected quality assurance methods that can be applied in the manufacturing chain.

First-time-right in analog design depends not only on proper consideration of process variations and design sensitivities but also on device reliability. Device aging can jeopardize performance and long-term product success and therefore should be taken into account as early as possible in the development. This webinar provides an overview of reliability physics and considerations and gives guidance on reliability conscious circuit design. Critical issues are discussed and future options for a reliability-aware design flow are indicated.

Is there magic that makes analog designs successful? How can designs achieve ESD (electro-static discharge) specifications? Do DFM methods make designs more robust? This webinar answers these questions and provides tips & tricks for analog design.

This webinar session provides guidance through the EDA environment and describes the interaction among EDA tools, design methodology and PDKs to optimize the design process. It uses selected reference flows and best practice examples for critical components during the design phase.

This webinar session focuses on the importance of proper characterization data for successful analog design, and discusses how modeling and process characterization can make life easier for analog design engineers. It covers statistic modeling approaches, model quality assurance and process calibration.

Showing first-time-right performance statistics from X-FAB's customer base, this first session outlines the challenges involved in achieving first-time-right analog designs. It talks about what impact the choice of process architecture makes, and discusses the pros and cons of different process architectures including SOI and BCD.

What happens when optical signals are converted to electrical signals? Focusing on the optical to electrical conversion process, this webinar sheds some light on the basics of light interaction from reflection, transmission, polarization and refraction to absorption with semiconductors devices. It explores electrical fields, recombination and lifetime, doping profiles, band structures and pn-junctions to determine what happens when light has been converted into electron-hole pairs.This webinar provides a solid overview of passive and active optical sensor elements manufactured in a mixed-signal CMOS process or added during post processing.

Everyone agrees that developing an IC is a challenging process with multiple trade-offs. You have to balance performance, size and cost requirements to decide how best to integrate customized memories. It’s fairly straightforward for ROM and RAM volatile memories because of well-established compiler solutions. But non-volatile memories (NVM) for trimming, data storage and programming require special consideration. X-FAB makes customizing complex embedded NVM solutions (such as EEPROM, OTP and NVSRAM) fast, easy and with minimal risks for errors. This webinar includes a live demo of an NVM compiler for NVRAM often used for data storage. You’ll see how easy and fast it is to customize your memory block design using the front-end design data (black box layout, a simulation model, a datasheet and a test specification) you receive from X-FAB within minutes via e-mail.

Are you challenged with having to design a device that requires bidirectional isolation and has several voltage levels integrated on a single chip without latch-up? If that is the case, you should join our upcoming webinar introducing XT018, the world’s first trench-isolated SOI (silicon on insulator) foundry technology offering for 200V MOS capability at 180nm. The presentation covers the general benefits and trade-offs of using SOI technology vs. a silicon bulk process. It highlights features such as super-junction architecture for 100V to 200V devices with complete dielectric isolation, the possibility to apply defined handle wafer potentials, and a highly flexible modular approach for selecting specific technology features that meet your exact needs.

Ever been stuck with the “one product, one process” rule when what you really needed was access to a world-class quality process for multiple applications? Not anymore. X-FAB is presenting a webinar on its open-platform MEMS inertial sensor processes including its new 3D inertial sensor technology. Learn how you can use X-FAB’s design partner, MicroMountains Applications, or apply your own design to X-FAB’s ready-to-use processes to run high or low wafer volumes without long and costly process development. Find out how X-FAB can help you get to market faster and secure high-quality manufacturing for inertial sensors. You’ll get an overview of both inertial sensor technologies and IP blocks from X-FAB, as well as design and test support from MicroMountains Applications.

Sensors are everywhere, serving as an interface between our analog world and the digital world of data processing in electronic systems. If you are looking for solutions for low noise amplification and temperature drift, non-linearity or signal offset compensation, don’t miss this free webinar. It helps designers select the right technology for low-noise and high-precision sensor interfaces. You’ll get tips for achieving excellent matching for robust circuits, and see how X-FAB’s sophisticated modelling enables first-time-right analog and mixed-signal designs.

Overwhelmed by the complexity of 700V designs due to cross talk, ESD, reliability or latch-up issues? Are your design challenges compounded by chip size and time-to-market issues? This webinar showcases X-FAB's new CMOS-based process for ultra-high-voltage apps such as AC LED lighting, ultra-low standby/no-load power and other power conversion and control applications. The combination of this cost-competitive process architecture and X-FAB’s design support enables first-time-right/first time functional designs for high-voltage lighting and power supply applicatio

Electrostatic discharge (ESD) is a serious threat to integrated circuits (ICs) that can cause irreversible damage. This webinar on ESD protection will show you solutions on how to eliminate ESD threats in complex analog/mixed-signal and high-voltage designs. It covers an overview of various ESD protection concepts, and explains the structures and schemes available to protect against electrostatic discharge in X-FAB’s enhanced 0.35 and 0.18 micrometer XH035 and XH018 high-voltage foundry processes. The webinar presentation also highlights similarities and differences among ESD protection concepts, outlining the advantages and disadvantages of each in circuit designs.

This webinar shows how X-FAB can support & manufacture your power system-on-chips (SoC) with its latest 0.18 micrometer technology (XP018). This foundry process for power management applications comes with a unique combination of high-voltage and high-density non-volatile memory (NVM) options with the lowest mask count in the industry. Find out why it is well-suited for cost optimized migration of existing solutions in larger geometries to 180 nanometers. It also covers the various memory options and its competitive RDSon for switching and power control in the 15V, 25V, 40V, 60V range.

In this webinar you will learn about the technologies and support X-FAB offers to help you solve the complex challenges of automotive design. You’ll see how X-FAB drives automotive requirements as an integral part of its business processes – from process development to design and prototyping support to mass production, including its zero ppm approach, 6-sigma modeling, high-temperature characterization, process robustness, defect density and extended ESD support. In short, you’ll learn how X-FAB’s focus on automotive ICs can make your job far easier.

Are you looking for a highly reliable embedded non-volatile memory (NVM) solution in an advanced technology node that is easy to integrate into your design? One that can serve as a platform for developing complete product families? This free webinar introduces X-FAB’s new XH018 eFlash option – the industry’s most cost-effective combination of high voltage and embedded flash for complex SoCs. Find out how it works and why eFlash is ideally suited for for high-speed microcontroller, digital power and automotive applications.

Reliability is a critical performance factor for semiconductor technologies. This webinar describes the physical phenomena that can lead to device degradation during circuit operation, and deduces reliability models for CMOS technologies. These models can be used for design optimization (“Design for Reliability”) to enable very robust products, and for reliability risk assessment for advanced operating conditions such as high temperature and high voltage. The webinar covers the most relevant failure mechanisms in CMOS technologies and suggests practical design techniqu

This free webinar introduces X-FAB’s Hall effect sensor device that detects and measures magnetic fields directly on the chip, making magnetic field-sensing design much faster. You’ll learn how the Hall sensor element – available as a completely characterized building block in X-FAB’s 0.18 micrometer modular high-voltage technology, XH018 – can be combined with other features of the XH018 process to enable a broad range of applications. For example, contactless detection or measurement of magnetic fields, and applications in which a magnetic field is used for indirect measurement of distance, position, rotational angle, speed or an electric current.

In the past five years we have seen a huge step in the evolution of MEMS applications. Traditionally, inkjet printer heads and automotive applications have dominated MEMS volume production. Today, demand for MEMS is particularly high in the consumer and mobile sector with further applications appearing every day. Part of this MEMS revolution has been the changing requirements for associated ASIC CMOS intelligence. This webinar covers various aspects of X-FAB’s MEMS foundry offering with a particular focus on the integration of CMOS with MEMS devices. Examples of how integration can be achieved, considerations for designers, cost advantages and trade-offs are being discuss

Emerging applications in the field of lithium-ion battery management and Power over Ethernet require operating voltages of up to 100V, robust primitive devices and low on-resistance. This free webinar on the XH035 100V foundry process will cover new primitive devices now available, along with what capabilities they add to the process. It will show example circuits using the new devices, including an external MOSFET driver, class AB output and battery stack cell monitor to demonstrate typical utilization of the devices in applications such as voltage/power regulators, audio drivers, battery charge controller and other applicatio

The integration of custom analog circuitry into a silicon chip requires a full understanding of the process architecture and uses completely different methods compared with those used for digital designs. This webinar briefly covers the digital design arena before entering into in-depth discussion of analog layout techniques. It explores the integration of X-FAB-supported primitive devices into complex integrated chips in detail, including diffusions, wells and associated layers that can be merged. The session also covers derivation of "well" combinations from the design layers, and gives guidelines for high-voltage interconnects across these well regions to avoid parasitic leakage paths.

Get an overview of the optical functions and features available as part of X-FABs More-than-Moore technology offering, including the impacts on spectral sensitivity, signal bandwidth, and noise margins. Explore what you need to consider when starting to design your optical product.

X-FAB steps beyond logic and memory scaling to deliver “More than Moore” value for customers. Instead of following Moore’s Law, X-FAB integrates technology features that interact with the analog world, and provides a comprehensive design ecosystem. It includes services and tools for developing diversified power/HV, MEMS, opto and analog products; a 24-hour technical hotline service; a portfolio of technically mature, extensive libraries and IP; a broad spectrum of primitive devices; and flexible prototyping options – all backed by X-FAB’s 15 years of solid analog/mixed-signal foundry expertise.

At high temperature, designers are faced with additional technological and design challenges. These issues and how to address them are discussed in this presentation. The webinar looks at X-FAB's high temperature solutions, in particular its latest High Temperature Modular CMOS process (XA035), a comprehensive CMOS offering with High Voltage (HV), RF, and EEPROM integration that is suitable for temperatures up to 175C. The presentation also covers high temperature modelling, application specific reliability and design for reliability.