Programmable-Logic-Array-PLA

The PLA is consists of AND-OR arrays on a single chip both arrays are programmable as shown in figure below. The number of AND and OR gates and their inputs are fixed for a given PLA chip. The AND arrays provide the product terms, and the OR arrays logically sum the product terms and thereby generate a SOP expression. The AND array is used to form the product terms. The AND gate has all the input variables in complemented and uncomplemented form and it has nichrome fuse link in series with each diode. The OR array is used to provide the sum of the product term outputs of the AND array. The sum terms are generated by opening the fuses. Here, the AND gate in the AND array has six inputs, the connection to an AND gate is programmable. The PLA seems to be efficient in terms of area needed on an IC chip. Hence, PLAs are often included as part of larger chips. The PLAs can be used to implement combinational and sequential logic circuits. The following steps can be used for implementing combinational logic functions on PLA, 1) Draw the truth table. 2) Derive the Boolean equations. 3) Modify equations to get in SOP form. 4) Find the input connections of AND array to generate product terms. 5) Find the input connections of OR array to generate sum terms. 6) Find connections required for INVERT/NON-INVERT array to set the outputs. 7) Configure the PLA. The commercially available PLA ICs are shown in table.

IC No.

PLA/FPLA

No. of I/Ps

No. of O/Ps

Packaging

82S200

PLA

16

8

28 pin DIP

82S201

PLA

16

8

28 pin DIP

82S100

FPLA

16

8

28 pin DIP

82S101

FPLA

16

8

28 pin DIP

DM7575

PLA

14

8

24 pin DIP

DM7576

PLA

14

8

24 pin DIP

Fig_Programmable Logic Array (PLA)

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