When Anwar Ghuloum came to work at Intel in 2002, the company was supreme among chip makers, mainly because it was delivering processors that ran at higher and higher speeds. “We were already at three gigahertz with Pentium 4, and the road map called for future clock speeds of 10 gigahertz and beyond,” recalls Ghuloum, who has a PhD from Carnegie Mellon and is now one of the company’s principal engineers. In that same year, at Intel’s developer conference, chief technology officer Pat Gelsinger said, “We’re on track, by 2010, for 30-gigahertz devices, 10 nanometers or less, delivering a tera-instruction of performance.” That’s one trillion computer instructions per second.

But Gelsinger was wrong. Intel and its competitors are still making processors that top out at less than four gigahertz, and something around five gigahertz has come to be seen, at least for now, as the maximum feasible speed for silicon technology.

It’s not as if Moore’s Law–the idea that the number of transistors on a chip doubles every two years–has been repealed. Rather, unexpected problems with heat generation and power consumption have put a practical limit on processors’ clock speeds, or the rate at which they can execute instructions. New technologies, such as spintronics (which uses the spin direction of a single electron to encode data) and quantum (or tunneling) transistors, may ultimately allow computers to run many times faster than they do now, while using much less power. But those technologies are at least a decade away from reaching the market, and they would require the replacement of semiconductor manufacturing lines that have cost many tens of billions of dollars to build.

So in order to make the most of the technologies at hand, chip makers are taking a different approach. The additional transistors predicted by Moore’s Law are being used not to make individual processors run faster but to increase the number of processors inside a chip. Chips with two processors–or “cores”–are now the desktop standard, and four-core chips are increasingly common. In the long term, Intel envisions hundreds of cores per device.

But here’s the thing: while the hardware problem of overheating chips lends itself nicely to the hardware solution of multicore computing, that solution gives rise in turn to a tricky software problem. How do you program for multiple processors? It’s Anwar Ghuloum’s job to figure that out, with the help of programming groups he manages in the United States and China.

Microprocessor companies take a huge risk in adopting the multicore strategy. If they can’t find easy ways to write software for the new chips, they could lose the support of software developers. This is why Sony’s multicore PlayStation 3 game machine was late to market and still has fewer game titles than its competitors.

The Problem with SiliconFor the first 30 years of microprocessor development, the way to increase performance was to make chips that had smaller and smaller features and ran at higher and higher clock speeds. The original Apple II computer of 1977 used an eight-bit processor that ran at one megahertz. The PC standard today is a 64-bit chip running at 3.6 gigahertz–effectively, 28,800 times as fast. But that’s where this trajectory seems to end. By around 2002, the smallest features that could be etched on a chip using photolithography had shrunk to 90 nanometers–a scale at which unforeseen effects caused much of the electricity pumped into each chip to simply leak out, making heat but doing no work at all. Meanwhile, transistors were crammed so tightly on chips that the heat they generated couldn’t be absorbed and carried away. By the time clock speeds reached five gigahertz, the chip makers realized, chips would get so hot that without elaborate cooling systems, the silicon from which they were made would melt. The industry needed a different way to improve performance.