Switch instructionsThere are two switch instructions, one ($D5) for contiguous cases and the other ($D9) for noncontiguous cases. They work exactly like a C switch statement with the left register as the variable to test.

For the contiguous switch, the first 16-bit word after the instruction is the twos-complement negative of the smallest case value. The next 16-bit word is the number of cases. Then comes the default jump target, followed by the target for each in-range value of left. Example:

Code:

.byte $D5 ; contiguous switch instruction.word -4, 5 ; smallest case 4, 5 cases.word DefaultTarget ; jumps to this address if left was < 4 or > 8.word Target4 ; jumps to this address if left was 4.word Target5 ; jumps to this address if left was 5.word Target6 ; jumps to this address if left was 6.word Target7 ; jumps to this address if left was 7.word Target8 ; jumps to this address if left was 8

For the non-contiguous switch, the first 16-bit word after the instruction is the number of cases. Then comes a table of comparison values followed by jump targets. After all the value-target pairs, the default target comes last. Example:

Load effective addressInstructions $DE and $DF load a register with the value of the argument + the frame pointer, i.e. with the effective (absolute) address of a local variable. They can be used to pass a pointer to a local variable as a function argument, or in conjunction with the bitfield instructions.

BitfieldsThere are three bitfield instructions: one to extract (load from) a signed bitfield, one to extract an unsigned bitfield, and one to insert (store to) a bitfield. For all three bitfield instructions, the first byte after the instruction is the size of the bitfield in bits, and the following byte is the bit position counting from the LSB. The entire bitfield must fit into a 16-bit word (i.e. size + pos < 16)

The two extraction instructions work like the dereference instruction: the address of the bitfield is in left, and the bitfield also gets extracted to left. The insertion instruction takes the value to insert in left, and the address to insert to in right (like the pop-store instruction without the pop).

Last edited by AWJ on Tue May 16, 2017 5:42 pm, edited 1 time in total.

Extension and bool conversion16-bit instructions only use the lower halves of the registers and leave stale data in the upper halves, so it is necessary to sign-extend or zero-extend when doing arithmetic on mixtures of 16-bit and 32-bit data. Conversely, the bool conversion instruction is needed because the conditional jump instructions only check the (non-)zeroness of the lower half of left.

Instruction $B728Instruction $B728 is probably supposed to be the long version of logical NOT ($CA) but actually has the same effect as instruction $B71D. None of the games I have inspected uses this instruction (the binary sequence $B7 $28 is nowhere to be found in the ROMs) so if it is a bug it seemingly went undetected for as long as Koei used this interpreter.

Last edited by AWJ on Tue May 16, 2017 7:58 pm, edited 1 time in total.

BitfieldsThere are three bitfield instructions: one to extract (load from) a signed bitfield, one to extract an unsigned bitfield, and one to insert (store to) a bitfield. For all three bitfield instructions, the first byte after the instruction is the size of the bitfield in bits, and the following byte is the bit position counting from the LSB. The entire bitfield must fit into a 16-bit word (i.e. size + pos < 16)

I was going to ask if the fields were little- or big-endian, but I suppose unless you're trying to make machines interoperable with the states of each other (hardly necessary) it doesn't matter.

BitfieldsThere are three bitfield instructions: one to extract (load from) a signed bitfield, one to extract an unsigned bitfield, and one to insert (store to) a bitfield. For all three bitfield instructions, the first byte after the instruction is the size of the bitfield in bits, and the following byte is the bit position counting from the LSB. The entire bitfield must fit into a 16-bit word (i.e. size + pos < 16)

I was going to ask if the fields were little- or big-endian, but I suppose unless you're trying to make machines interoperable with the states of each other (hardly necessary) it doesn't matter.

Little-endian. That's what I meant by "counting from the LSB". A bitfield with a position of 0 is aligned with the LSB of the word it's in, so no shifting is needed on insertion or extraction.

I've been thinking about something similar for the 65816, but with the "word-code" being a list of addresses to jump to.

That of course is what Forth normally does, at least in the indirect-threaded code (ITC) and direct-threaded code (DTC) models. On the 6502.org forum, Bruce Clark presents the idea of using the 16-bit S (stack-pointer) register as the instruction pointer in DTC Forth on the '816, at http://forum.6502.org/viewtopic.php?t=586 . Basically the program itself is on the hardware stack! The earlier idea of a two-instruction NEXT in ITC Forth on the '816, which he mentions at the top of the head post, is discussed at http://forum.6502.org/viewtopic.php?t=584 . Just when you get all comfy with some method, along comes Bruce with some wild idea to turn everything upside down and get you to consider a very different approach that may be a lot better in some situations.

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