The execution performance of this new technology has been measured on average at 15 times faster than the nearest commercial solution using standard benchmarks.

Many current System-on-Chip (SoC) hardware platforms, for example mobile and server devices, incorporate multi-core embedded processors coupled with hardware accelerators, all executing in parallel. The performance of existing, single-threaded virtual platform simulators does not adequately scale for these SoCs, creating a barrier to efficient virtual platform-based software development.

QuantumLeap eliminates this barrier by allocating the simulated cores across all the processors in a host machine. By ensuring the efficient synchronization of these cores, near linear scaling of the simulation across the multiple host processors has been observed, with the impact of inter-core communication kept to a minimum. Furthermore, QuantumLeap provides a transparent use model, with no change required to the software-under-test, the virtual platform models or the development environment, while ensuring fully deterministic simulation execution.

“The serial simulation of today’s embedded, multi-core SoCs is totally impractical for rigorous software verification, even given the abstraction provided through current virtual platform simulation techniques,” notes Simon Davidmann, CEO of Imperas. “We have solved this with QuantumLeap, which can simulate a multi-core ARM® Cortex™-A9 platform running standard benchmarks at execution speeds up to 16 Billion Instructions-Per-Second running on a standard 3.4 GHz quad core host PC, an astounding result by any measure.”

Imperas Simulation Technology Performance Innovation
Imperas’ simulation technology is based on a Just-In-Time (JIT) Code Morphing engine that streams simulation execution to maximize performance, providing the fastest software processor models available today. The company’s ToolMorphing™ algorithm further extends this capability by neutralizing the performance impact of the running of software verification tools within simulation.

The QuantumLeap accelerator extends this approach to include parallel engine execution, spreading a virtual platform simulation across multiple host PC processors. QuantumLeap’s proprietary synchronization algorithm minimizes the impact of communication between the parallel cores, allowing them to scale across available host PC processors as much as possible.

QuantumLeap operates on platforms that incorporate both Asymmetric Multi-Processing (AMP) and Symmetric Multi-Processing (SMP) schemes. It has been designed to effectively handle the inter-core communication overhead challenges associated with the most complex SMP processor architectures including, for example, devices based on the state-of-the-art ARM Cortex-A57 and Imagination MIPS Warrior P5600 multi-core processors.

QuantumLeap allows full access to the Imperas Multi-core Software Development Kit (M*SDK) verification capabilities. The accelerator includes the ToolMorphing and SlipStreamer™ capabilities, such that the full tool suite operates with minimal impact to performance and no adverse affect on simulated software operation. QuantumLeap also operates with the full Open Virtual Platforms™ (OVP™) model library, allowing the entire, 125+ range of processor models to be accelerated.

“Our customers need to develop and deliver bug free, high quality embedded software in their products, and to achieve this many employ large regression test environments continuously throughout code development,” continued Davidmann. “QuantumLeap can dramatically change their engineering operation by enabling full execution of multi-trillion instruction regression tests every night to ensure the highest possible software quality and shave months off their schedules.”

Availability
The QuantumLeap accelerator is available immediately, with pricing provided upon application. The full range of Imperas technology, including QuantumLeap, will be demonstrated in the Imperas booth, number 520, at ARM TechCon, October 29–31, 2013. Benchmark information is also available at the Imperas website.

About Imperas
Imperas Software was founded in 2008 to develop and deliver embedded software development systems. The company’s comprehensive product line enables the rapid creation of high-performance virtual platforms and the efficient development of embedded software utilizing those platforms. Imperas’ technology allows for software engineering schedules to be significantly reduced while improving the quality of products relying on embedded systems. In 2008 Imperas founded the Open Virtual Platforms (OVP) consortium to improve the availability of open model libraries and virtual platform infrastructure. Leading communications, automotive, consumer electronics and embedded processor companies rely on Imperas for the development of their electronic products. The company’s corporate headquarters is located near Oxford, UK and it maintains support and sales organizations in Silicon Valley, California and Tokyo, Japan. For more information about Imperas, please go to www.imperas.com.