Tag Archives: SFDR

The AD9144 is a four-channel, 16-bit, 2.8-GSPS DAC that supports high data rates and ultra-wide signal bandwidth to enable wideband and multiband wireless applications. The DAC features 82-dBc spurious-free dynamic range (SFDR) and a 2.8-GSPS maximum sample rate, which permits multicarrier generation up to the Nyquist frequency.

With –164-dBm/Hz noise spectral density, the AD9144 enables higher dynamic range transmitters to be built. Its low SFDR and distortion design techniques provide high-quality synthesis of wideband signals from baseband to high intermediate frequencies. The DAC features a JESD204B eight-lane interface and low inherent latency of fewer than two DAC clock cycles. This simplifies hardware and software system design while permitting multichip synchronization.

The DAC is supported by an evaluation board with an FPGA Mezzanine Card (FMC) connector, software, tools, a SPI controller, and reference designs. Analog Devices’s VisualAnalog software package combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface that enables users to customize their input signal and data analysis.

The AWG18 is an arbitrary waveform generator designed for use with Applicos’s ATX-series of test systems. The waveform generator features an 18-bit resolution at a 300 megasamples-per-second (MSPS) data rate and oversampling at a 600-MSPS or 1.2 gigasamples-per-second (GSPS) rate.

Testing analog systems with high-speed 14- and 16-bit data converters requires extremely clean signals. The traditional approach of filtering away the harmonics is insufficient when dealing with a high signal-to-noise ratio (SNR), maintaining a high spurious-free dynamic range (SFDR), or when a low “close-in carrier noise” is preferred. In these cases, the extra precision from an 18-bit signal value can create a reliable test-stand operation and reduce random failures.

Many applications need to use signals other than sine waves to make additional time domain measurements. To accommodate this, the AWG18 has two signal paths: one path starts at DC for time domain and general-purpose measurements that require high-level accuracy. The other path runs from 10 to 100 MHz and is optimized for dynamic signal generation in this frequency range. The typical total harmonic distortion (THD) for frequencies up to 50 MHz is above 100 dBc.

The MCP3913 and the MCP3914 are Microchip Technology’s next-generation family of energy-measurement analog front ends (AFEs). The AFEs integrate six and eight 24-bit, delta-sigma ADCs, respectively, with 94.5-dB SINAD, –106.5-dB THD, and 112-dB Spurious-Free Dynamic Range (SFDR) for high-accuracy signal acquisition and higher-performing end products.

The MCP3914’s two extra ADCs enable the monitoring of more sensors with one chip, reducing its cost and size. The programmable data rate of up to 125 ksps with low-power modes enables designers to scale down for better power consumption or to use higher data rates for advanced signal analysis (e.g., calculating harmonic content).

The MCP3913 and the MCP3914 improve application performance and provide flexibility to adjust the data rate to optimize each application’s rate of performance vs power consumption. The AFEs feature a CRC-16 checksum and register-map lock, for increased robustness. Both AFEs are offered in 40-pin uQFN packages. The MCP3913 adds a 28-pin SSOP package option.

The MCP3913 and the MCP3914 AFEs cost $3.04 each in 5,000-unit quantities. Microchip Technology also announced the MCP3913 Evaluation Board and the MCP3914 Evaluation Board, two new tools to aid in the development of energy systems using these AFEs. Both evaluation boards cost $99.99.