KeyStone I training: network coprocessor (NETCP) overview

Hello, and welcome to the KeyStone Training. We're going to be talking about the network coprocessor. We're going to start with covering what exactly is the network coprocessor, and then we're going to get into network coprocessor block diagram.
And then we're going to cover some background on internet protocol classification levels to get into some of the motivation for what the packet coprocessor is. And then we're going to get to the Packet DMA and Queue Manager subsystem channel allocation that's used for communication with the network coprocessor.
So what is the network coprocessor? The network coprocessor consists of the following four modules-- the packet accelerator, the security accelerator, the gigabit ethernet switch subsystem, and the packet DMA, which is an interface to the multicore navigator.
So let's talk about the purpose of the network coprocessor. The motivation for the network coprocessor is to use hardware accelerators to do the layer two, layer three, and layer four processing, as well as doing encryption and decryption that was required to be done in software.
The goals for both the packet accelerator and the security accelerator is mainly to offload the DSP to allow it to do things like header classification, matching, encryption, decryption, and some interface to the network. Some key security applications include IPsec tunnel endpoint support for LTE and eNB, secure RTP between gateways, and the air cypher interface for 3GPP and Wimax security processing.
The network coprocessor has four main modules which are the packet accelerator, which is responsible for doing the layer two, layer three, and layer four processing. There's also the security accelerator, which is responsible for doing encryption, decryption, and authentication. There's also the ethernet switch subsystem, which is responsible for sending data over a 802.3 compliant ethernet network. And lastly there's the packet DMA controller, which is responsible for communicating between the network coprocessor and the multicore navigator.
The multicore navigator has a separate packet DMA instance for each of the peripherals that use packet DMA. The packet DMA controller in the network processor is used to communicate with the multicore navigator. Once a packet has been sent from the network coprocessor to the multicore navigator using the packet DMA then the packet can be accessed by the DSP.
So now let's give an overview of the packet classification layers supported by the packet accelerator. The packet accelerator provides the ability to classify packets based on layer two, layer 3, and layer four packet headers. Layer two, the MAC layer, refers to MAC, VLAN and LC SNAP headers. Layer three, the IP layer, refers to IP headers, such as IPv4 or IPv6. Layer four, the transport layer, refers to UDP, TCP, and other layer four headers.
Let's discuss how to use the multicore navigator to communicate with the network coprocessor. Let's begin with transmitting data to the network coprocessor. To transmit data, queues 640 through 648 must be used. Each of these queues is hard mapped to a particular packet DMA channel and corresponds to a specific location within the network coprocessor.
For receive, any of the queues may be used. For communication with the host, general purpose queues or the high or low priority accumulation queues will probably be used. Unlike the transmit queues, the packet DMA receive channels that are not tied to a specific receive queue.
Thanks for your time. For more information, refer to the documentation below.

Details

Date:
November 9, 2010

Network Coprocessor (NETCP) Overview provides an introduction to the NETCP, which includes the Packet Accelerator (PA), Security Accelerator (SA), and Ethernet Subsystems.