8 Summary Implementing ombinational Logic Implementing a SOP expression is done by first forming the ND terms; then the terms are ORed together. Show the circuit that will implement the oolean expression X = + D + DE. (ssume that the variables and their complements are available.) Start by forming the terms using three 3-input ND gates. Then combine the three terms using a 3-input OR gate. D D E X = + D + DE 2009 Pearson Education, Upper Saddle River, NJ ll Rights Reserved

9 Summary Karnaugh Map Implementation For basic combinational logic circuits, the Karnaugh map can be read and the circuit drawn as a minimum SOP. Karnaugh map is drawn from a truth table. Read the minimum SOP expression and draw the circuit. changes across this boundary Group the 1 s into two overlapping groups as indicated. 2. Read each group by eliminating any variable that changes across a boundary. 3. The vertical group is read. changes across this boundary 4. The horizontal group is read. The circuit is on the next slide: 2009 Pearson Education, Upper Saddle River, NJ ll Rights Reserved

10 Summary continued ircuit: X = + The result is shown as a sum of products. It is a simple matter to implement this form using only NND gates as shown in the text and following example Pearson Education, Upper Saddle River, NJ ll Rights Reserved

14 NND Logic Summary Recall from DeMorgan s theorem that = +. y using equivalent symbols, it is simpler to read the logic of SOP forms. The earlier example shows the idea: X = + The logic is easy to read if you (mentally) cancel the two connected bubbles on a line Pearson Education, Upper Saddle River, NJ ll Rights Reserved

15 NOR Logic Summary lternatively, DeMorgan s theorem can be written as + =. y using equivalent symbols, it is simpler to read the logic of POS forms. For example, X = ( + )( + ) gain, the logic is easy to read if you cancel the two connected bubbles on a line Pearson Education, Upper Saddle River, NJ ll Rights Reserved

18 Selected Key Terms Universal gate Negative-OR Negative-ND Either a NND or a NOR gate. The term universal refers to a property of a gate that permits any logic function to be implemented by that gate or by a combination of gates of that kind. The dual operation of a NND gate when the inputs are active-low. The dual operation of a NOR gate when the inputs are active-low Pearson Education, Upper Saddle River, NJ ll Rights Reserved

28 10. During the first three intervals for the pulsed circuit shown, the output of a. G 1 is LOW and G 2 is LOW b. G 1 is LOW and G 2 is HIGH c. G 1 is HIGH and G 2 is LOW d. G 1 is HIGH and G 2 is HIGH D D G 1 G 2 G Pearson Education, Upper Saddle River, NJ ll Rights Reserved 2008 Pearson Education

THE NAND GATE The NAND gate is a popular logic element because it can be used as a universal gate: that is, NAND gates can be used in combination to perform the AND, OR, and inverter operations. The term

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