Complementary metal oxide semiconductor (CMOS) device scaling involves many technological challenges in terms of junction formation, in particular for 3D sequential integration and Fully-depleted Silicon on Insulator (FDSOI) architectures. In this thesis, the physical phenomena involved during the junction formation at a low processing temperature (i.e. ≤ 600°C) have been studied. Such a process relies on Solid Phase Epitaxial Regrowth (SPER) of an amorphous region to activate the dopants. A new model based on Kinetic Monte Carlo (KMC) method has been developed in order to simulate SPER at the atomistic scale. This model has been used to understand the regrowth anisotropy and provide an explanation for the formation of defects as well as to get insight into the influence of a non-hydrostatic stress and the presence of electrically active dopants on the regrowth kinetics.