IBM 650

Part of the first IBM 650 computer in Norway (1959), known as "EMMA". 650 Console Unit (right, an exterior side panel is missing), 533 Card Read Punch unit (middle, input-output). 655 Power Unit is missing. Punched card sorter (left, not part of the 650). Now at Norwegian Museum of Science and Technology in Oslo.

An IBM 650 at Texas A&M University. The IBM 533 Card Read Punch unit is on the right.

The IBM 650 Magnetic Drum Data-Processing Machine is one of IBM's early computers, and the world’s first mass-produced computer.[1][2] It was announced in 1953 and in 1956 enhanced as the IBM 650 RAMAC with the addition of up to four disk storage units.[3] Almost 2,000 systems were produced, the last in 1962.[4] Support for the 650 and its component units was withdrawn in 1969.

The IBM 7070 (signed 10-digit decimal words), announced 1958, was expected to be a "common successor to at least the 650 and the [IBM] 705".[7] The IBM 1620 (variable length decimal), introduced in 1959, addressed the lower end of the market. The UNIVAC Solid State (a two-address computer, signed 10-digit decimal words) was announced by Sperry Rand in December 1958 as a response to the 650. None of these had a 650 compatible instruction set.

Rotating drum memory models provided 1,000, 2,000, or 4,000 words of memory (a signed 10-digit number or five characters per word) at addresses 0000 to 0999, 1999, or 3999 respectively.[20][21] Words on the drums were organized in bands around the drum, fifty words per band, and 20, 40, or 80 bands for the respective models. A word could be accessed when its location on the drum surface passed under the read/write heads during rotation (rotating at 12,500 rpm, the non-optimized average access time was 2.5 ms). Because of this timing, the second address in each instruction was the address of the next instruction. Instructions could then be interleaved, placing many at addresses that would be immediately accessible when execution of the previous instruction was completed. Instructions read from the drum went to a program register (in current terminology, an instruction register). Data read from the drum went through a 10-digit distributor. The 650 had a 20-digit accumulator, divided into 10-digit lower and upper accumulators with a common sign. Arithmetic was performed by a one-digit adder. The console (10 digit switches, one sign switch, and 10 bi-quinary display lights), distributor, lower and upper accumulators were all addressable; 8000, 8001, 8002, 8003 respectively.

Sixty 10-digit words of magnetic core memory at addresses 9000 to 9059; a small fast memory (this device gave a memory access time of 96µs, a 26-fold raw improvement relative to the rotating drum), needed for a tape and disk I/O buffer. (5 extra operation codes)

Three four-digit index registers at addresses 8005 to 8007; drum addresses were indexed by adding 2000, 4000 or 6000 to them, core addresses were indexed by adding 0200, 0400 or 0600 to them. If the system had the 4000 word drum then indexing was by adding 4000 to the first address for index register A, adding 4000 to the second address for index register B, and by adding 4000 to each of the two addresses for index register C (the indexing for 4000-word systems only applied to the first address). The 4000-word systems required transistorized read/write circuitry for the drum memory and were available before 1963. (18 extra operation codes)

The 650 instructions consisted of a two-digit operation code, a four-digit data address and the four-digit address of the next instruction. The sign was ignored on the basic machine, but was used on machines with optional features. The base machine had 44 operation codes. Additional operation codes were provided for options, such as floating point, core storage, index registers and additional I/O devices. With all options installed, there were 97 operation codes.[22]

The Table lookup (TLU) instruction could high-equal compare a referenced 10-digit word with 48 consecutive words on the same drum band in one 5ms revolution and then switch to the next band in time for the next 48 words. This feat was about one-third the speed of a one-thousand times faster binary machine in 1963 (1500 microseconds on the IBM 7040 to 5000 microseconds on the 650) for looking up 46 entries as long as both were programmed in assembler. There was an optional Table lookup Equal instruction, with the same performance.

The Read (RD) instruction read an 80 column card of numeric data into ten memory words; the distribution of digits to words determined by the card reader's control panel wiring. When used with the 533 Reader Punch unit's Alphabetic device, a combination of numeric and alphanumeric columns (maximum of 30 alphanumeric columns) could be read.[23] An expansion feature allowed more alphanumeric columns but certainly not over 50, as only ten words (five characters per word) were stored on the drum by a card read operation.

IBM 650 at Texas A&M, opened up to show rear of front panel, vacuum tube modules and storage drum

This one-card program, taken from the 650 Programming Bulletin 5, IBM, 1956, 22-6314-0, will set most of the drum storage to minus zeros. The program includes examples of instructions being executed from the console switches and from an accumulator.

To begin, a load card is keypunched with 80 consecutive digits (the 2nd column below) so that, when read, drum locations 0001 through 0008 contents will be as shown.[25]

The console digit switches (address 8000) are manually set to a Read instruction with data address 0004.

loc- op|data|next
ation |addr|instruction
| |addr

8000 RD 70 0004 xxxx Read load card into 1st band read area

Each drum band has a read area; these read areas are in locations 0001-0010, 0051-0060, 0101-0110 and so on. Any address in a band can be used to identify that band for a read instruction; the address 0004 identifies the 1st band. Execution begins then, from the console with the reading of the 8 words on the load card into locations 0001-0008 of the 1st memory band. In the case of reading a load card, the "next instruction address" is taken from the data address field, not the next instruction address field (shown above as xxxx). Thus execution continues at 0004

8003 STL 20 1999 0003 Store lower accumulator (that accumulator was reset to 0- by the RSU instruction above)
The "1999" data address is decremented, below, on each iteration.
This instruction was placed in the upper accumulator by the RSU instruction above.
Note: this instruction, now in the upper accumulator, will be decremented and then
executed again while still in the accumulator.

0003 AU 10 0001 8003 Decrement data address of the instruction in the accumulator by 1
(by adding 10000 to a negative number)

The STL's data address will, eventually, be decremented to 0003, and the AU ... instruction at 0003 will be overwritten with zeros. When that occurs (the STL's next instruction address remains 0003) execution continues as follows:

UNIVAC Solid State announced by Sperry Rand in December 1958 as a response to the IBM 650. In June 1959, Remington Rand announced that it had written an IBM 650 emulator program to ease conversion.[33]

^A 12 punch can be used to identify cards as load cards. Load cards are directly read into words 1-8 of the specified storage band

^IBM Reference Manual: Floating-Decimal Interpretive System for the IBM 650(PDF). IBM. 1956, 1959. pp. 63, xxi. 28-4024. This is a reprint of IBM 650 Technical Newsletter No. 11, March 1956, form 31-6822Check date values in: |date= (help) . This reference manual contains the following report, noting that In its external characteristics, the interpretive system described in this report owes much to the IBM Speedcoding System for the 701.Wolontis, V.M. Complete Floating Decimal Interpretive System for the IBM 650 Magnetic Drum Calculator. Bell Laboratories, Inc, Murray Hill, New Jersey.

^650 Programming Bulletin 2. IBM. 1956. p. 40. 22-6294-0. The Interpretive routine described here is a fixed decimal three address system that provides for mathematical, logical, and input-output operations. The logic for this system was obtained from the Complete Floating Decimal Interpretive System for the 650 that was developed by the Bell Laboratories, Murray Hill, New Jersey.