I success to reproduce the bug in my emulator.
In fact, when display is switched ON, you probably render the line again.
But the sprite have already been parsed for line N+1 so you render the line with incorrect parsed sprite data.

EDIT : I don't know if it's correct but if you do this when display is switched ON/OFF :

I remember I compared emulator output with megadrive 2 output on my TV when trying to improve original video mode emulation and I *think* similar glitch was occuring above the two first rings in the bottom screen (disappears if you collect the rings)

But I'm not sure anymore...

the following comment is correct though: in my case, sprites for the next line are indeed already parsed when rendering the line again, which is incorrect

Eke wrote:I remember I compared emulator output with megadrive 2 output on my TV when trying to improve original video mode emulation and I *think* similar glitch was occuring above the two first rings in the bottom screen (disappears if you collect the rings)

But I'm not sure anymore...

the following comment is correct though: in my case, sprites for the next line are indeed already parsed when rendering the line again, which is incorrect

These are the vertical borders: there are actually 243 visible lines but only 224 of them are "active", the rest being filled with the border color (top border being a little "higher" than bottom border)

in PAL Mode, there are 288 visible lines, with only 224 (or 240 depending on the display size) being active

Those areas are generally hidden by the TV edges but not always, depends on TV specification as well as video connection;

Thank you Eke !!!
I note that on real hardware, DMA seems to be switched ON during active AREA.
Perhaps this can help to ajust timings?
On my emulator, the DMA is switched ON during blanking area approx. at cycle 640.

As we already discussed in other threads, Sonic 2 only check the HBLANK flag before switching the display OFF then ON, so this has something to do with HBLANK flag occurence period regarding to the real blanking area...

It might be that the last VDP status read occurs as the very end of the blanking area or maybe that the flag is cleared after the active area started (we know it is supposed to be cleared at Hcount=0x07 but still don't know the relation with hblank/hdisplay)...

What "seems" to happen is that the register write (used to switch display ON) is sometime processed after some visible pixels have already been drawn, resulting in a wider left border (and flickering as it does not happen on every frame, indicating the timings are really tight).

It would be interesting to see if the width of the additional border color part is always the same (I bet it could be a multiple of 16 pixels)