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A. The Supervisor Engine 32 PISA is an intelligent services supervisor for the Cisco Catalyst 6500 Series modular switches, delivering superior deep packet inspection, application awareness, security, availability, and manageability services for the networks of small and medium-sized business, enterprises, and service providers.

The PISA on the Cisco Catalyst 6500 Series Supervisor Engine 32 PISA provides hardware acceleration of intelligent services such as network-based application (NBAR) and flexible packet matching (FPM) at multigigabit speeds, in addition to the management and control plane functions traditionally provided by the multilayer switch feature card (MSFC). The Supervisor Engine 32 PISA is offered with the Policy Feature Card 3B (PFC3B), to ensure feature and performance compatibility with the Cisco Catalyst 6500 Supervisor Engine 32.

Q. Is the PISA available as a daughter card upgrade on the Supervisor Engine 32?

A. No. The PISA is only available in the form of two new supervisor engine options on the Cisco Catalyst 6500.

Q. What is the difference between the MSFC2A and the PISA?

A. The PISA is a superset of the MSFC2A. The PISA provides all the management and control plane functions traditionally provided by the MSFC2A. In addition, it provides hardware acceleration of intelligent services such as NBAR and FPM at multigigabit speeds.

Q. Does the Supervisor Engine 32 PISA support all the hardware features supported on the Supervisor Engines 32?

A. Yes. The Supervisor Engine 32 PISA is offered with the PFC3B, delivering the same features and services available on the Supervisor Engines 32.

Q. What are the architectural capabilities of the PISA on the Supervisor Engine 32 PISA?

Q. Can two Supervisor Engine 32 boards be used in a high-availability configuration?

A. Yes. The Supervisor Engine 32 PISA supports nonstop forwarding/stateful switchover (NSF/SSO) on the uplinks on the active as well as the standby supervisor. In order to support high availability same type of supervisors should be used on the Cisco Catalyst 6500.

A. NBAR is not SSO aware in the initial Supervisor Engine 32 software release. However, SSO awareness for NBAR is planned for a subsequent release. Since FPM is a stateless feature, SSO awareness does not apply to this functionality.

Services and Scalability Overview

Q. What is the hardware acceleration performance of intelligent services such as NBAR and FPM on the PISA?

A. The PISA is capable of accelerating intelligent services such as NBAR and FPM at 2-Gbps speeds for Internet mix (IMIX) traffic, which is optimal for standard campus access networks of typical enterprises using a pair of Gigabit Ethernet Small Form-Factor Pluggable (SFP) uplinks to each distribution layer switch. The PISA also provides support for OC48/STM16 interfaces for WAN/MAN deployments. A future software release of the Supervisor Engine 32 PISA will provide the capability to define "intelligent" traffic that can be redirected to the PISA for acceleration, essentially allowing these networks to operate at multigigabit speeds.

Q. What do I need to do in order to get maximum services acceleration performance on the Supervisor Engine 32 PISA?

A. In order to obtain maximum performance, two external gigabit uplinks on the Supervisor Engine 32 PISA need to be converted into a dedicated PISA channel interface. Please refer to the release notes for details on PISA channel configuration.

Q. How deep can packets be inspected for intelligent services such as NBAR and FPM on Supervisor Engine 32 PISA?

A. FPM and NBAR can look as far as 4 KB into the packet. NBAR custom policies are however restricted in the first release to 256 bytes into the packet.

Q. Are jumbo frames supported with NBAR and FPM on the Supervisor Engine 32 PISA?

A. Jumbo frames are supported with the Supervisor Engine 32 PISA. The initial release will allow up to 4K bytes frames to be inspected.

Q. What are the deep packet inspection and application policy scalability limits for NBAR on Supervisor Engine 32 PISA?

Q. How does the system decide if a packet needs to be hardware accelerated by PISA?

A. The decision to send traffic to PISA is primarily based on whether intelligent services such as NBAR and FPM are configured on an interface. If either of these features is configured, traffic is redirected to PISA for deep packet inspection; otherwise it flows through the regular PFC data path.

Q. Where do I go to download NBAR PDLM's for Supervisor Engine 32 PISA?

Q. What provisioning and monitoring tools are available for NBAR support on the Supervisor Engine 32 PISA?

A. The QoS Policy Manager (QPM) can be used for provisioning and monitoring NBAR on the Supervisor Engine 32 PISA. In addition, NBAR monitoring is supported by Cisco QoS partners such as AdvenNet, Computer Associates, InfoVista, and Micromuse.

Q. What provisioning and monitoring tools are available for FPM support on the Supervisor Engine 32 PISA?

A. FPM provisioning can be managed through the flexible configuration option on the Cisco Security Manager. A future release of Cisco Security Manager will support the FPM policy management and monitoring on the Supervisor Engine 32 PISA.