I'm working on a board similar to the AXIS developer board: I've mounted
the ETRAx100, but I'm still using elinux. This board was configured to use
8MB DRAM (only a chip) and it worked fine.
Then I added one more 8MB chip.
I connected the two DRAM modules like illustrated on page 34 of AXIS
ETRAX100 Data sheet (or page 5-10 of ETRAX100LX Data Sheet)
I tried to use either both banks of group 0
DRAM size 16
R_DRAM_TIMING 5611
R_DRAM_CONFIG 12200057
or bank 0 of the two groups
DRAM size 16
R_DRAM_TIMING 5611
R_DRAM_CONFIG 12374040
In both case I wasn't allowed to use more then 8MB... but when I look at
/proc/meminfo I see there are 16MB.
using a logic analyzer I noticed that only the first DRAM chip is used by
ETRAX100: RAS1 or RAS2
signals are only used during refresh cycles.
the DRAM modules I'm using are
MT4LC4M16R6: 4M*16 EDO DRAM, 10 column addresses and 12 row addresses
is there something wrong in my registers configuration or is there something
that limit the max DRAM size?
Thanks