Personal supercomputer for only $100!

For only $100, the Parallella is a personal supercomputer based on a Zynq All Programmable SoC from Xilinx and an Epiphany multi-core processor from Adapteva.

Some time ago I wrote a blog From RTL to GDSII in Just Six Weeks about a guy Andreas Olofsson who left his job, formed a company called Adapteva, and – working in his basement and living off his pension fund – single-handedly invented a new computer architecture. Andreas designed his own System-on-Chip (SoC) from the ground up – Including learning how to use all of the EDA tools – then took the device all the way to working silicon and a packaged prototype... and that's when things really started to get interesting!

The chip that Andreas designed is called the Epiphany. This is an array of processor cores, each equipped with its own local memory and a single-precision floating-point engine. Everything is designed so as to offer optimum performance while consuming as little power as possible. Epiphany is extremely scalable – The Epiphany-III (implemented at the 65nm node) boasts an array of 16 processors, while the Epiphany-IV (implemented at the 28nm node) features an array of 64 processors.

The end result is that, when operating at peak performance, running at 800MHz, the Epiphany-IV offers 100 Gflops of raw computing power while consuming only 2W. This means that, at 50Gflops/Watt, the Epiphany-IV is 50 to 100X more efficient than anything else out there.

Well, I just heard from Andreas. His current project is to create an open source personal supercomputer platform that anyone can buy for only $100, and that can be used to implement the most compute-intensive tasks like embedded and robotic vision, software-defined radios, and … well, almost anything really.

This supercomputer, which is called the Parallella, is based on a combination of the Zynq-7000 All Programmable SoC from Xilinx and the Epiphany from Adapteva as illustrated in the block diagram below.

The Zynq-based Parallella personal supercomputer

Initially there will be two versions of this little beauty -- the version equipped with an Epiphany E16 (16 cores) will cost only $100, while the version equipped with an Epiphany E64 (64 cores) will cost only $199. I'm told that, even when running flat out, the Parallella equipped with an Epiphany E64 will consume as little as 5W!

The guys and gals at Adapteva are currently using a Zynq evaluation board to extensively prototype the user experience of the Parallella boards. In our chat earlier, Andreas told me: "The user experience of running Ubuntu (one of the more popular flavors of Linux) on the Zynq is fantastic!" The picture below shows Andreas' Zynq evaluation board with an Epiphany daughter card plugged in via one of the FMC connectors.

A Zynq development board with an Epiphany daughter card

Are you familiar with Kickstarter.com? This is a funding platform for creative projects -- everything from films, games, and music to art, design, and technology. If people like a particular project, they can pledge money to make it happen. It's only if the project succeeds in reaching its funding goal that the backers' credit cards are charged -- if the project falls short, no one is charged.

The point is that Andreas and the folks at Adapteva have set Parallella up as a Kickstarter project. If you are interested, you can click here to learn more and -- if you wish -- make a pledge. Pledges can be as little as $15 or as much as $10,000 or more.

In order to proceed, they need to raise $750,000 by the Kickstarter deadline of Saturday 27 October at 6:00 p.m. Eastern Daylight Time. I personally have every confidence that if they get the money they will succeed. After all, this project is led by the man who single-handedly designed a silicon chip in his basement.

It's not often you get a chance to really "make a difference" in this world. I just pledged $99 myself. For this, when the project succeeds, I will receive my own Epiphany E16-based Parallella loaded with all of the development tools required to implement almost any project of my dreams. What say you? Are you with me?

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Those who funded will know by now that they met their 750K goal, so I'm looking forward to receiving my dev boards. It's a fascinating project, and it was partly the idea of these guys designing cutting-edge silicon in their basement that encouraged me to put in a few $. As someone said back there, it takes you back to the good old days!

Big processing power at 5watts power consumption. Initially there will be lot of requirement for the applications in the mobile plate form. Later on desk top systems also.Probably after its launch this will be tuned up further with feed back from the users.

Thanks for the explanation, I will try to understand it as a layman of Computer engineeing: are you saying that some commercial simulation tools still can't run on this supercomputer? Such as Ansys, Silvaco...these are popular simulation tools for semicopnductor.Is it possible to make them run in the near future?

This is very interesting. I have an assortment of platforms: Arduino Uno, Raspberry Pi, Altium NanoBoard and have just ordered an Arduino Due.
To me this is just as exciting as the January '75 Popular Electronics article introducing the Altair 8800. I ordered one right away and nothings been the same since.
My interests have included machine vision and the platforms I have now, except maybe the NanoBoard, are totally inadequate.
As soon as I figure out how I will cough up the $99 donation.

Thank you. Yes, we got lucky with our choice of the Zynq, it has generated an incredible amount of really positive interest.(not even related to the goal of this project:-)) I guess that's what they call "fortuitous serendipity".

With the right software, we numerical simulations could be a great fit. The challenge right now is that the software infrastructure for parallel programming still needs a lot of work. That's one of the driving reasons for starting this project. Ironically, the challenge of boot strapping ubiquitous parallel programming is a serial process.

This is very interesting.
I myself have just finished developing a 64-processor chip targeted at Ethernet packet inspection and filtering.
The processor cores are optimised hardware implementations of the "Berkeley Packet Filter" processor.
Ref:
http://en.wikipedia.org/wiki/Berkeley_Packet_Filter
http://www.tcpdump.org/papers/bpf-usenix93.pdf
The 64-processor cores are implemented on a Xilinx Virtex-6 FPGA and makes good use of its DSP48E1 primitives and on-chip block-rams to achieve single-cycle operation for most instruction op-codes.
This allows 4x10Gbps of Ethernet packets to be inspected, analysed and filtered at full-line rate on the chip.
This means you can now replace a full rack of servers with a single PCIe card.
Here is the finished product:
http://www.telesoft-technologies.com/images/docs/DX-OEM-GEN-MK-DS-33862-02-MPAC-IP-6010-4x10GbE.pdf
This product has applications in:
Cyber security
Network intrusion detection (IDS)
Lawful intercept
Virus Signature Detection
etc.