This patch provides code paths which allow the natsemi driver to use theexternal MII port on the chip but ignore any PHYs that may be attached to it.The link state will be left as it was when the driver started and can beconfigured via ethtool. Any PHYs that are present can be accessed via the MIIioctl()s.

This is useful for systems where the device is connected without a PHYor where either information or actions outside the scope of the driverare required in order to use the PHYs.

Signed-Off-By: Mark Brown <broonie@sirena.org.uk>

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Previous versions of this patch exposed the new functionality as a moduleoption. This has been removed. Any hardware that needs this should beidentifiable by a quirk since it unlikely to behave correctly with anunmodified driver.

/* Initial port:+ * - If configured to ignore the PHY set up for external. * - If the nic was configured to use an external phy and if find_mii * finds a phy: use external port, first phy that replies. * - Otherwise: internal port.@@ -815,7 +822,7 @@ * The address would be used to access a phy over the mii bus, but * the internal phy is accessed through mapped registers. */- if (readl(ioaddr + ChipConfig) & CfgExtPhy)+ if (np->ignore_phy || readl(ioaddr + ChipConfig) & CfgExtPhy) dev->if_port = PORT_MII; else dev->if_port = PORT_TP;@@ -825,7 +832,9 @@