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Solution

This occurs because the algorithm used to implement symmetric and asymmetric cores is slightly different. If the memory is symmetric, the algorithm uses the parity bits in the block memory. If the memory is asymmetric, the algorithm does not use the parity bits in the block memory. This is because the parity bits complicate the implementation of a generic algorithm for asymmetric ports.

So, if asymmetric ports are used, the algorithm does not use the parity bits for the primitives. This results in a RAMB16_S9_S18 primitive, effectively becoming a primitive; where Port A is 2048 x 8 and Port B is 1024 x 16. As this is the case, a third block RAM is needed to create the given memory.

There is no plan to change the algorithm of Dual Port Block memory core; however, all the engineering effort will be focused on improving the new Block Memory Generator Core. The new core already has the improved algorithm.

Selectable Memory Algorithm

The Block Memory Generator Core arranges block RAM primitives according to one of two algorithms: the minimum area algorithm and the selectable primitive algorithm. With the minimum area algorithm, it will optimize for the minimum block RAM usage, and when it is possible for the parity bits to be used, the core will use them.