Patent application title: LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME

Abstract:

Disclosed are a light emitting device and a method for manufacturing the
same. A light emitting diode comprises a plurality of Un-GaN layers and a
plurality of N-type semiconductor layers, an active layer on the N-type
semiconductor layer, and a P-type semiconductor layer on the active
layer, wherein at least two of the Un-GaN layers and at least two of the
N-type semiconductor layers are alternatively stacked on each other.

Claims:

1. A light emitting device comprising:a plurality of Un-GaN layers and a
plurality of N-type semiconductor layers;an active layer on the N-type
semiconductor layer; anda P-type semiconductor layer on the active
layer,wherein at least of the Un GaN layers and at least of the N-type
semiconductor layers are alternatively stacked on each other.

2. The light emitting device as claimed in claim 1, wherein the Un-GaN
layers and the N-type semiconductor layers are formed by stacking a first
Un GaN layer, a first N-type semiconductor layer, a second Un-GaN layer,
and a second N-type semiconductor layer.

3. The light emitting device as claimed in claim 2, wherein the first and
second N-type semiconductor layers comprise GaN and the second N-type
semiconductor layer comprise at least two layers.

4. The light emitting device as claimed in claim 2, wherein the second
N-type semiconductor layer has a dislocation density lower than a
dislocation density of the first N-type semiconductor layer.

5. The light emitting device as claimed in claim 2, wherein the second
N-type semiconductor layer has an impurity concentration lower than an
impurity concentration of the first N-type semiconductor layer.

6. The light emitting device as claimed in claim 2, wherein the first and
second Un-GaN layers have a thickness in a range of 0.5 μm to 1 μm.

7. The light emitting device as claimed in claim 2, wherein the first and
second N-type semiconductor layers have a thickness in a range of 1 μm
to 1.5 μm.

8. The light emitting device as claimed in claim 1, wherein the Un-GaN
layers and the N-type semiconductor layers are formed by stacking a first
Un GaN layer, a first N-type semiconductor layer, a second Un-GaN layer,
a second N-type semiconductor layer, a third Un-GaN layer, and a third
N-type semiconductor layer.

10. The light emitting device as claimed in claim 8, wherein the second
N-type semiconductor layer has a dislocation density lower than a
dislocation density of the first N-type semiconductor layer, and the
third N-type semiconductor layer has a dislocation density lower than a
dislocation density of the second N-type semiconductor layers.

11. The light emitting device as claimed in claim 8, wherein the second
N-type semiconductor layer has an impurity concentration lower than an
impurity concentration of the first N-type semiconductor layer, and the
third N-type semiconductor layer has an impurity concentration lower than
an impurity concentration of the second N-type semiconductor layer.

12. The light emitting device as claimed in claim 8, wherein the first,
second, and third Un-GaN layers have a thickness in a range of 0.3 μm
to 0.6 μm.

13. The light emitting device as claimed in claim 8, wherein the first,
second, and third N-type GaN layers have a thickness in a range of 0.5
μm to 1 μm.

14. A method for manufacturing a light emitting device, the method
comprising the steps of:alternatively forming a plurality of Un-GaN
layers and a plurality of N-type semiconductor layers on a
substrate;forming an active layer on the N-type semiconductor layer;
andforming a P-type semiconductor layer on the active layer.

15. The method as claimed in claim 14, wherein the Un-GaN layers and the N
type semiconductor layers are formed by stacking a first Un-GaN layer, a
first N-type semiconductor layer, a second Un-GaN layer, and a second
N-type semiconductor layer.

16. The method as claimed in claim 15, wherein the second Un-GaN layer and
the second N type semiconductor layer are formed by flowing a smaller
amount of TMGa into a chamber having a higher temperature and a lower
pressure as compared with a condition for manufacturing the first Un-GaN
layer and the first N-type semiconductor layer.

17. The method as claimed in claim 15, wherein the second N-type
semiconductor layer has an impurity concentration lower than an impurity
concentration of the first N type semiconductor layer.

18. The method as claimed in claim 14, wherein the Un-GaN layers and the
N-type semiconductor layers are formed by stacking a first Un-GaN layer,
a first N-type semiconductor layer, a second Un-GaN layer, a second
N-type semiconductor layer, a third Un-GaN layer, and a third N-type
semiconductor layer.

19. The method as claimed in claim 18, wherein the second Un-GaN layer and
the second N-type semiconductor layer are formed by flowing a smaller
amount of TMGa into a chamber having a higher temperature and a lower
pressure as compared with a condition for manufacturing the first Un-GaN
layer and the first N-type semiconductor layer, andthe third Un-GaN layer
and the third N-type semiconductor layer are formed by flowing a smaller
amount of TMGa into a chamber having a higher temperature and a lower
pressure as compared with a condition for manufacturing the second Un GaN
layer and the second N-type semiconductor layer.

20. The method as claimed in claim 18, wherein impurities implanted into
the second N-type semiconductor layer are less than impurities implanted
into the first N-type semiconductor layer, and impurities implanted into
the third N-type semiconductor layer are less than impurities implanted
into the second N-type semiconductor layer.

[0002]The embodiment relates to a light emitting diode and a method for
manufacturing the same.

[0003]A light emitting diode is formed by sequentially stacking a buffer
layer, an unintentionally doped GaN layer (Un-GaN layer), an N-type GaN
layer, an active layer, and a P-type GaN layer on a substrate.

[0004]The light emitting diode has a characteristic in which electrons are
inserted into holes on the active layer to emit light if power is applied
to the N-type GaN layer and the P-type GaN layer.

[0005]Meanwhile, since the substrate has a lattice constant different from
that of the N-type GaN layer, dislocation may occur, and the buffer layer
and the Un-GaN layer reduce a difference between lattice constants of the
substrate and the GaN layer.

[0006]However, the buffer layer and the Un-GaN layer have a limitation in
the reduction of the difference of the lattice constants, and the
dislocation density may be increased due to the Un-GaN layer.

SUMMARY

[0007]The embodiment provides a light emitting device and a method for
manufacturing the same.

[0008]The embodiment provides a light emitting device and a method for
manufacturing the same, capable of reducing dislocation density.

[0010]According to the embodiment, a light emitting device comprises a
plurality of Un-GaN layers and a plurality of N-type semiconductor
layers, an active layer on the N-type semiconductor layer, and a P-type
semiconductor layer on the active layer, wherein at least two of the
Un-GaN layers and at least two of the N type semiconductor layers are
alternatively stacked on each other.

[0011]According to the embodiment, a method for manufacturing a light
emitting device, comprises the steps of alternatively forming a plurality
of Un-GaN layers and a plurality of N-type semiconductor layers on a
substrate, forming an active layer on the N-type semiconductor layer, and
forming a P-type semiconductor layer on the active layer.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012]FIG. 1 is a view used to explain a light emitting diode according to
the first embodiment; and

[0013]FIG. 2 is a view used to explain a light emitting diode according to
the second embodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014]In the description of the embodiments, when layers (films), regions,
patterns, or elements are described in that they are formed on or under
substrates, layers (films), regions, or patterns, it means that they are
formed directly or indirectly on or under the substrates, layers (films),
regions, or patterns.

[0015]The thickness and size of each layer shown in the drawings can be
simplified or exaggerated for the purpose of convenience or clarity. In
addition, the elements may have sizes different from those shown in
drawings in practice.

[0016]Hereinafter, a light emitting diode and a method for manufacturing
the same with reference to accompanying drawings.

[0017]FIG. 1 is a view used to explain a light emitting diode according to
a first embodiment.

[0018]The light emitting diode according to the first embodiment comprises
a substrate 10, a buffer layer 20, a first Un-GaN layer 31, a first
N-type GaN layer 32, a second Un-GaN layer 33, a second N-type GaN layer
34, an active layer 40, a P-type GaN layer 50, and an ohmic electrode
layer 60. A first electrode layer 70 is formed on the second N-type GaN
layer 34, and a second electrode layer 80 is formed on the ohmic
electrode layer 60.

[0019]As shown in FIG. 1, the light emitting diode according to the first
embodiment includes the first and second Un GaN layers 31 and 33 and the
first and second N-type GaN layers 32 and 34, which are alternatively and
repeatedly stacked on the buffer layer 20.

[0020]As shown in FIG. 1, the Un-GaN layer and the N-type GaN layer are
repeated twice.

[0021]According to the first embodiment, the first N-type GaN layer 32 is
formed between the first and second Un-GaN layers 31 and 33, thereby
preventing the occurrence of a dislocation density due to the first and
second Un-GaN layers 31 and 33. According to the first embodiment, a
plurality of Un-GaN layers are provided, in which each Un-GaN layer is
thinner than an Un-GaN layer provided in a single layer structure of the
Un-GaN layer and an N-type GaN layer according to the related art.
Similarly, each N-type GaN layer may be thin a conventional N-type GaN
layer.

[0022]In other words, the increase of dislocation density occurring as the
Un-GaN layer becomes thick is prevented by forming a plurality of thin
Un-GaN layers.

[0023]For example, the first and second Un-GaN layer 31 and 33 may have
thicknesses in the range of 0.5 μm to 1 μm, and the first and
second N-type GaN layers 32 and 34 may have thicknesses in the range of 1
μm to 1.5 μm.

[0024]According to the first embodiment, the dislocation density of the
first and second N-type GaN layers 32 and 34 is reduced as the N-type GaN
layers become close to the active layer 40, that is, distant from the
buffer layer 20.

[0025]To this end, the first and second Un-GaN layers 31 and 33 and the
first and second N-type GaN layers 32 and 34 are formed in a chamber
having a higher temperature and a lower pressure while reducing the
amount of TMGa flowed into the chamber as the Un GaN layers and the
N-type GaN layers are close to the active layer 40.

[0026]Further, since a dislocation density may be increased as the
concentration of impurities is increased in the first and second N-type
GaN layers 32 and 34, the concentration of N type impurities is decreased
as the N-type GaN layers become close to the active layer 40.

[0027]FIG. 2 is a view used to explain a light emitting diode according to
a second embodiment.

[0028]The light emitting diode according to the second embodiment
comprises a substrate 10, a buffer layer 20, a first Un-GaN layer 31, a
first N-type GaN layer 32, a second Un-GaN layer 33, a second N-type GaN
layer 34, a third Un-GaN layer 35, a third N-type GaN layer 36, an active
layer 40, a P-type GaN layer 50, and an ohmic electrode layer 60. A first
electrode layer 70 is formed on the third N-type GaN layer 36, and a
second electrode layer 80 is formed on the ohmic electrode layer 60.

[0029]As shown in FIG. 2, the light emitting diode according to the second
embodiment has the first, second, and third Un-Ga layers 31, 33, and 35
and the first, second, and third N-type GaN layers 32, 34, and 36
alternatively stacked on the buffer layer 20.

[0030]As shown in FIG. 2, the Un-GaN layers and the N-type GaN layers are
repeated three times.

[0031]Although it is not shown, the Un-GaN layers and the N-type GaN
layers may be repeated four times according to another embodiment.

[0032]According to the second embodiment, the first and second N-type GaN
layers 32 and 34 are alternately provided in relation to the first,
second, and third Un-GaN layers 31, 33, and 35, thereby preventing the
increase of dislocation density by the first, second, and third Un-GaN
layers 31, 33, and 35. According to the second embodiment, a plurality of
Un-GaN layers are provided. In this case, the first, second, and third
Un-GaN layers 31, 33, and 35 are thinner than an Un-GaN layer provided in
a single layer structure of the Un-GaN layer and an N-type GaN layer
according to the related art. Similarly, the first, second, and third
N-type GaN layers 32, 34, and 36 may be thin a conventional N-type GaN
layer.

[0033]In other words, the increase of dislocation density occurring as the
Un-GaN layer becomes thick is prevented by forming a plurality of thin
Un-GaN layers.

[0034]For example, the first, second, and third Un GaN layers 31, 33, and
35 may have thicknesses in the range of 0.3 μm to 0.6 μm, and the
first, second, and third N-type GaN layers 32, 34, and 36 may have
thicknesses in the range of 0.5 μm to 1μ.

[0035]According to the second embodiment, the dislocation density of the
N-type GaN layer is reduced as the N-type GaN layer becomes close to the
active layer 40, that is, distant from the buffer layer 20.

[0036]To this end, the Un-GaN layer and the N-type GaN layer are formed in
a chamber having a higher temperature and a lower pressure while reducing
an amount of TMGa flowed into the chamber as the Un-GaN layer and the
N-type GaN layer are close to the active layer 40.

[0037]Further, since a dislocation density may be increased as the
concentration of impurities is increased in the first, second, and third
N-type GaN layers 32, 34, and 36, the concentration of N-type impurities
is decreased as the N-type GaN layers become close to the active layer
40.

[0038]As described above, in the light emitting diode according to the
embodiments, a plurality of thin Un-GaN layers are provided, and the
N-type GaN layers are provided between the Un-GaN layers in order to
prevent the increase of dislocation density caused by the Un-GaN layers.
Accordingly, the increase of the dislocation density in the Un-GaN layer
can be prevented due to the N-type GaN layer.

[0039]In addition, the light emitting diode according to the embodiments
is provided such that dislocation density is decreased as the N-type GaN
layer becomes close to the active layer 40.

[0040]Accordingly, the dislocation density of the N-type GaN layer in
contact with the active layer 40 is decreased so that the light emitting
characteristic of the light emitting diode can be improved.

[0041]Hereinafter, a method for manufacturing the light emitting diode
according to the embodiment will be described in detail with reference to
FIG. 2.

[0042]The buffer layer 20 is formed on the substrate 10. For example, the
substrate 10 includes at least one of Al2O3, Si, SiC, GaAs,
ZnO, and MgO.

[0043]The buffer layer 20 is used to reduce a difference between lattice
constants of the substrate 10 and the GaN layer stacked on the substrate
10. For example, the buffer layer 20 may have a stacking structure such
as AlInN/GaN, InxGa1-xN/GaN, or
AlxInyGa1-x-yN/InxGa1-xN/GaN.

[0044]For example, the buffer layer 20 may be grown by flowing TMGa and
TMIn at a flow rate of 3×105 Mol/min into the chamber, in
which the substrate 10 is positioned, and flowing TMA1 at a flow rate of
3×106 Mol/min into the chamber together with hydrogen gas and
ammonia gases.

[0045]The first Un-GaN layer 31, the first N-type GaN layer 32, the second
Un-GaN layer 33, the second N-type GaN layer 34, the third Un-GaN layer
35, the third N-type GaN layer 36 are sequentially formed on the buffer
layer 20. The first, second, and third Un-GaN layers 31, 33, and 35 and
the first, second, and third N-type GaN layer 32, 34, and 36 may be
formed through a metal-organic vapor chemical deposition (MOCVD) process.

[0046]First, the first Un-GaN layer 31 is formed on the buffer layer 20.
For example, the first Un-GaN layer 31 may be formed by flowing NH3
(3.7×10-2 Mol/min) and TMCa
(2.9×10-4-3.1×10-4Mol/min) gas in a state in which
the chamber is adjusted to have internal pressure of 500 Torr to 700 Torr
and the internal temperature in the range of 1040quadrature to
1050quadrature.

[0047]Then, the first N-type GaN layer 32 is formed on the first Un-GaN
layer 31. For example, the first N-type GaN layer 32 is formed by flowing
NH3 (3.7×10-2 Mol/min), TMGa
(2.9×10-4-1×10-4 Mol/min), a SiH4 gas
including N-type impurities such as Si in a state in which a chamber is
adjusted to have an internal pressure of 500 Torr to 700 Torr and an
internal temperature the temperature in the range of 1040quadrature to
1050quadrature.

[0048]In this case, the first N-type GaN layer 32 may have a dislocation
density of 1010/cm1 or less. In addition, Si may be implanted
into the first N-type GaN layer 32 with the concentration of
7×1018/cm2.

[0049]The second Un-GaN layer 33 is formed on the first N-type GaN layer
32. The second Un-GaN layer 33 is formed by flowing a less amount of TMGa
gas in a chamber with a lower pressure under a higher temperature as
compared with the process of performing the first Un-GaN layer 31.

[0050]For example, the second Un-GaN layer 33 may be formed by flowing
NH3 (3.7×10-2 Mol/min) and TMGa
(1.9×10-4-2.1×10-4 Mol/min) gas in a state in which
a chamber is adjusted to have an internal pressure of 300 Torr to 500
Torr and an internal temperature in the range 1050° C. to
1060° C.

[0051]The second N-type GaN layer 34 is formed on the second Un-GaN layer
33. The second N-type GaN layer 34 is formed by flowing a less amount of
a TMGa gas and an SiH4 gas in a chamber with a lower pressure under
a higher temperature as compared with the process of performing the first
N-type GaN layer 32.

[0052]For example, the second N-type GaN layer 34 may be formed by flowing
NH3 (3.7×10-2 Mol/min), TMGa
(1.9×10-4-2.1×10-4 Mol/min), and a SiH4 gas
including N-type impurities such as Si in a state in which a chamber is
adjusted to have an internal pressure of 300 Torr to 500 Torr and an
internal in the range of 1050 to 1060.

[0053]In this case, the second N-type GaN layer 34 may have the
dislocation density of 109/cm3 or less. In addition, Si may be
implanted into the second N type GaN layer 34 with the concentration of
5×1018/cm2.

[0054]The third Un-Gan layer 35 is formed on the second N-type GaN layer
34. The third Un GaN layer 35 is formed by flowing a less amount of a
TMGa gas in a chamber with a lower pressure under a higher temperature as
compared with the process of performing the second Un-GaN layer 33.

[0055]For example, the third Un-GaN layer 35 may be formed by flowing
NH3 (3.7×10-2 Mol/min) and TMGa
(1.4×10-4-1.6×10-4 Mol/min) gas in a state in which
a chamber is adjusted to have an internal pressure of 200 Torr to 300
Torr and an internal temperature in the range of 1060° C. to
1070° C.

[0056]The third N-type GaN layer 36 is formed on the third Un-GaN layer
35. The third N-type GaN layer 36 is formed by flowing a less amount of a
TMGa gas and an SiH4 gas in a chamber with a lower pressure under a
higher temperature as compared with the process of performing the second
N-type GaN layer 34.

[0057]For example, the third N-type GaN layer 36 may be formed by flowing
NH3 (3.7×10-2 Mol/min), TMGa
(1.4×10-4-1.6×10-4 Mol/min), and a SiH4 gas
including N-type impurities such as Si in a state in which a chamber is
adjusted to have an internal pressure of 200 Torr to 300 Torr and an
internal temperature in the range of 1060° C. to 1070° C.

[0058]In this case, the third N-type GaN layer 36 may have the dislocation
density of 108/cm3 or less. In addition, Si may be implanted
into the third N-type GaN layer 36 with the concentration of
3×1018/cm2.

[0059]The active layer 40 is formed on the third N-type GaN layer 36. For
example, the active layer 40 may have a multi-quantum well structure
including InGaN/GaN which is grown at a nitrogen gas atmosphere by
flowing TMGa and TMIn into the chamber.

[0060]The P-type GaN layer 50 is formed on the active layer 40. For
example, the P-type GaN layer 50 may be grown by supplying TMGa
(7×10-6 Mol/min), TMAl(2.6×10-5 Mol/min),
(EtCp2Mg) (Mg(C2H5C5H4)2)
(5.2×10-7 Mol/min), and NH3(2.2×10-1 Mol/min
using hydrogen as a carrier gas.

[0061]The ohmic electrode layer 60 is formed on the P-type GaN layer 50.
For example, the ohmic electrode layer 60 includes at least one of ITO,
CTO, SnO2, ZnO, RuOx, TiOx, IrOx, and
GaxOx.

[0062]After the above stacking structure is formed, a mask layer (not
shown) is formed on the ohmic electrode 60. The ohmic electrode layer 60,
the P-type GaN layer 50, the active layer 40, and the third N-type GaN
layer 36 are selectively etched so that a portion of the third N-type GaN
layer 36 is exposed upward.

[0063]The first electrode layer 70 is formed on the third N-type GaN layer
36, and the second electrode layer 80 is formed on the ohmic electrode
layer 60.

[0064]Accordingly, the light emitting diode according to the embodiments
can be manufactured.

[0065]In the light emitting diode and the method for manufacturing the
same according to the embodiments, the Un-GaN layer and the N-type GaN
layer are alternatively stacked, thereby reducing the dislocation density
on the N-type GaN layer adjacent to the active layer.

[0066]Further, in the light emitting diode and the method for
manufacturing the same according to the embodiments, a plurality of
Un-GaN layers and N-type GaN layers are provided. In this case, the
Un-GaN layers and the N-type GaN layers are formed by reducing an amount
of TMGa flowed into the chamber while increasing the temperature of a
chamber and reducing the pressure of the chamber step by step.
Accordingly, the dislocation density of the N-type GaN layer adjacent to
the active layer may be more reduced.

[0067]In the light emitting diode and the method for manufacturing the
same according to the embodiments, a plurality of Un-GaN layers and a
plurality of N-type GaN are formed. In this case, the N-type GaN layer is
formed by reducing an amount of N-type impurities step by step.
Accordingly, the dislocation density of the N-type GaN layer adjacent to
the active layer can be more reduced.

[0068]Any reference in this specification to "one embodiment," "an
embodiment," "example embodiment," etc., means that a particular feature,
structure, or characteristic described in connection with the embodiment
is included in at least one embodiment of the invention. The appearances
of such phrases in various places in the specification are not
necessarily all referring to the same embodiment. Further, when a
particular feature, structure, or characteristic is described in
connection with any embodiment, it is submitted that it is within the
purview of one skilled in the art to effect such feature, structure, or
characteristic in connection with other ones of the embodiments.

[0069]Although embodiments have been described with reference to a number
of illustrative embodiments thereof, it should be understood that
numerous other modifications and embodiments can be devised by those
skilled in the art that will fall within the spirit and scope of the
principles of this disclosure. More particularly, various variations and
modifications are possible in the component parts and/or arrangements of
the subject combination arrangement within the scope of the disclosure,
the drawings and the appended claims. In addition to variations and
modifications in the component parts and/or arrangements, alternative
uses will also be apparent to those skilled in the art.