Manual to use the simulator for

computer organization and

architecture

Developed by the Department of CSE, IIT kharagpur

This simulator has been developed as a virtual lab which is an initiative of Ministry ofHuman Resource and Development(MHRD) under National Mission of Educationthrough ICT to provide an interactive environment over the internet for creating andconducting different laboratory experiments by sharing the costly equipments and theresources.Introduction:

This simulator provides an interactive environment for creating and conducting simulatedexperiments on computer organization and architecture. It supports gate level design to CPU design.

Figure 1. Main interface of the simulator

Features of the simulator:

The main features of the simulators are as follows:

Logic:

The simulator supports 5 valued logic. So the simulator supports wired AND for bus based design.These 5 states along with their corresponding wire values are as follows:

Truth table for 5 valued logic used in the simulator:

NOT Tri State Buffer

Graphical organization of the simulator:

The simulator contains a pallete on the right hand side. This pallete contains all the components and tools . Tools are used to act up on the components.

a toolbar on the top which contains several buttons. These buttons are: save/open simulate (after creating a circuit, this button has to be pressed to simulate the circuit and to get output) plot graph (to plot input-output wave form) undo/redo delete zoom in/zoom out increment/decrement LED (for digital LED which can also be used as input and display) start/stop clock pulse to check the name or pin configuration of a component changing connection types checking the user identification

a canvas in the middle where the circuits will be designed.

A toolbar on the left side which contains the following buttons:

set port to set the number of input and output ports for a circuit. Set Label and set name to set the label contents and the name of different components. load memory to load the memory content to the inbuilt memory(4 bit address and 12 bit data) for performing the computer design experiment. Data can be load either from file or through form. Show memory to show the content of the in built memory. ASM chart to load the ASM (algorithimic state machine) chart for a controller.

Tools: Different tools are: Selection tool- used for selecting components Marquee tool- used for selecting many components at a time by draggiung the mouse in the design area(editor). Connection tool- used for connecting components. Clonning tool used to create cloned components.

Components:

Components have been catagorized according to their functionality and put into different drawers inthe pallete. The area under every drawer is scrallable, if you are unable to see all the components ina particular drawer just click on the area and scroll. Different drawers:

Circuits- contains 8 and 16 terminal circuits and flow container which can hold other circuit components.

Logic gates- contains all kinds of basic logic gates with 2 and 3 inputs. Display and inputs- contains all kinds of component needed to give input to the circuit along with free running clock and displaying outputs of the circuit.

Adders- contains different types of adder circuits.

Other Components- contains different kinds of components like decoders, multiplexers,

arithmetic logic units(ALU), memory elements(RAM cell), cache memory(without any replacement policy)required to design combinational circuits. Control Unit- contains a controller whose state table(Moore m/c) can be loaded from the interface. Computer Design- contains a single instruction CPU and a Memory (4 bit address and 12 bit data, can be loaded by user)Building a circuit:Adding components:To add the components to the editor select any component(first click on the selection tool then clickon the desired compoent) then finally click on the position of the editor window where you want toadd the component.

Pin configuration for a pallete component:

The pin configuration of a component can be seen in two ways: selecting the component and press the 'show pinconfig' button in the left toolbar whenever the mouse is hovered on any canned component of the palette.Pin numbering starts from 1 and from the bottom left corner(indicating with the circle) andincreases anticlockwise.

Connecting components:

To connect any two components select the Connection tool in the palette, and then click on the Source terminal and click on the target terminal(no drag and drop, simple click will serve the purpose). After the connection is over click the selection tool in the pallete. To move any components select the Selection Mode and drag the component after selecting it. Users can connect only from a source terminal to the destination terminal. This facility prevents the user from design errors. Any input terminal can be connected only once, but any output terminal can be connected to multiple number of terminals. For any component, all the upper terminals are input terminals and all lower terminals are output terminals. At any time instant, the value of a wire is denoted by the wire color. As the simulator supports 5 valued logic, a wire may have 5 different colors. Initially the wire value is set to unknown specific wire colors for 5 different states have been given at the begining of this manual.

Other functionalities: undo, redo, delete, zoom in, zoom out facilities are provided. Users can save their circuits with .logic extension and reuse them. User can load data through interface or can load from text file. The text file must contains only binary values. The whole row of a data must be written in seperate line. For example: if memory location 0011 should contain a word of 100101111001, then the fourth line of the text file must contain only 100101111001. on other data should be written in that line.

Figure 2. Interface to load memory for computer design experiment

For loading ASM chart, enter the number of states, inputs and output control signals. The name of the control signals can be changhed as per the requirement. Now, the state table can be added using the drop down box as shown in Figure 3.Figure 3. Interface to load state chart (ASM chart) to the controller for computer design experiment The circuit drawer contains a label component, which can be used to keep any note in the canvas during circuit design.

Figure 4. Screenshot of a running 4 bit shift register made up of master slave flipflops with a labelat the bottomSimulationg a circuit:

After building the circuit press the simulate button in the top toolbar to get the output. If the circuit contains a clock pulse input, then the 'start clock' button will start the simulation of the whole circuit. Then there is no need to again press the 'simulate' button. If the circuit contains multiple clock inputs, then select all of them using control key then press start clok button. Start clock button will generate contineous pulses to all the selected clock components, if any of the clock pulse is needed to be fixed in the desired value, then press control button and deselect the desired clock component. For starting again the deselected clock component press control key and select it. The plot graph button will give the input-output wave form of the circuit for a simulation. So if the circuit contains free running clock then the circuit will keep simulating itself and will generate a contineous wave form as shown in the following screenshot:

Due to 5 valued logic gate level flipflop design is not supported by this simulator at present time. For designing sequential circuits, all types flipflops are provided as a module.Description of Components:

General components:

1. Digital display: it can be used to give input and as well as to see the output in the decimal format, its right most terminal is the LSB(least significant bit) and the left most terminal is the MSB(most significant bit), in the editor after selecting a particular digital display you can use 'Increment LED' and 'Decrement LED' buttons in the top left corner of the simulator to increment and decrement its value respectively.

2. Bit display: it displays a single bit value.

3. V+: it gives 1 as input.

4. Ground: it gives 0 as input.

5. Bit switch: it gives 1/0 input, it toggels its value with a double click.

R/W' = 1 for read operation, R/W' = 0 for write operation

10. Direct Mapped Cache:

pin-30 = A3, pin-29 = A2, pin-28 = A1, pin-27 = A0 (thise 4 pins are used to give address input). A3 is the most significant bit and A0 is the least significant bit. A3 and A2 will be compared with the tag. A1 and A0 will select the corrsponding set.

Pin-26 = R/W'D(selects whether user wants to input in the set of cache or cache mapping)

pin-25 = M1, pin-24 = M0 (M1 is the most significant bit and M0 is the least significant bit). thiese two bits are used for cache writhe purpose, it selects the particular set of which user wants to give inputs to the valid bit, tag bits and data bits.

Pin-23 = Den(this is an enable input which has to set for any write purpose in the cache).

Pin-21 = valid bit

pin-20 = T1, pin-19=T0 (T1 is the most significant bit and T0 is the least significant bit). These are tag bits.

Pin-18 = D1, pin-17 = D0 (D1 is the most significant bit and D0 is the least significant bit). These are data bits.

Pin-14 = Hit/Miss bit (if it gives 1 then hit otherwise miss)

pin-15 = F1, pin-16 = F0 (F1 is the most significant bit and F0 is the least significant bit). These are output data bits and will be given only when there is a hit.