Dolphin Integration reduces 65nm silicon area

PARIS - EDA and IP company Dolphin Integration SA has introduced a panoply of
silicon IPs optimized for high density so that designers can increase
the density of their SoC by up to 10 percent.

Dolphin Integration (Meylan, France) claimed that the 65nm High Density
Panoply represents a complete solution for the whole logic design to
address the cost reduction challenge at the architectural level.