Fast-track Verilog for VHDL Users

Intermediate Level - 2 days

Fast-track Verilog for VHDL Users is an intensive 2-day conversion-training course teaching the application of the Verilog® Hardware Description Language for programmable logic and ASIC design. It is not suitable for engineers who haven’t already attended the Comprehensive VHDL course or are not well practised in VHDL based design.

By emphasising the similarities and highlighting the differences between the VHDL and Verilog languages and the associated design flows, this course fast-tracks delegates through the Verilog learning curve. It is designed to enable VHDL based engineers to be Verilog-ready for transition to SystemVerilog application. (Check out scheduling and packaging options with SystemVerilog for Designers, Comprehensive SystemVerilog and Modular SystemVerilog.)

The syllabus covers the Verilog language, coding for register transfer level (RTL) synthesis, developing test fixtures, and using Verilog tools. A number of supplementary topics are also available, including a preparatory overview of SystemVerilog.

Workshops comprise approximately 50% of class time, and are based around carefully designed exercises to reinforce and challenge the extent of learning. Because Doulos is an independent company, our clients can choose the design tools used during the workshops.

Who should attend?

Engineers proficient in VHDL who need to be conversant with Verilog to evaluate or migrate to SystemVerilog

Engineers who are proficient in VHDL but need to become competent in the application of, and interaction with, the Verilog HDL as well.

What will you learn?

The differences and similarities between VHDL and Verilog

How to use the Verilog language for hardware design and logic synthesis

How to write thorough Verilog text fixtures to verify your designs

How to avoid common mistakes when coding Verilog for synthesis

Pre-requisites

Delegates must have attended the Doulos Comprehensive VHDL course (or equivalent) and have a good working knowledge of VHDL and digital hardware design. No previous knowledge of Verilog is required.

Course materials

Doulos Course materials are renowned as the most comprehensive and user friendly available. Their style, content and coverage is unique in the HDL training world and has made them sought after resources in their own right. Course fees include:

Fully indexed course notes providing a concise Verilog reference

Workbook full of practical examples to help delegates apply their knowledge