a question about dm642 EDMA and function DAT_copy

Hi everyone,
In my program, i have set 6 EDMAs for image capturing and displaying,
they are set to transfer data from FIFO to SDRAM or SDRAM to FIFO. And
now I have to use function DAT_copy() to transfer data between
SRAM(L2) and SDRAM(external memory). Before call DAT_copy(), i call
CACHE_wbInvL2() to coherence. But the data that i get wasn't right.
And i use the example that ti company have given in my program, the
data also wrong.
The type of my dsp is DM642.
Dose the number of EDMA that running at the same times in DM642 have a
limit, like can't exceed 6 at the same time.

Posted by Brad Griffis●May 10, 2008

rbmm756@gmail.com wrote:

> Hi everyone,
> In my program, i have set 6 EDMAs for image capturing and displaying,
> they are set to transfer data from FIFO to SDRAM or SDRAM to FIFO. And
> now I have to use function DAT_copy() to transfer data between
> SRAM(L2) and SDRAM(external memory). Before call DAT_copy(), i call
> CACHE_wbInvL2() to coherence. But the data that i get wasn't right.
> And i use the example that ti company have given in my program, the
> data also wrong.
> The type of my dsp is DM642.
> Dose the number of EDMA that running at the same times in DM642 have a
> limit, like can't exceed 6 at the same time.

Your writeback-invalidate is likely the issue. By doing that you are
causing data that is currently cached to be pushed out to external
memory. This could very well be overwriting your data buffers in
external memory.
If you are using DAT_copy (which is QDMA based) to move your data
buffers from external memory to internal memory then you do not need to
perform any user-initiated coherence operations. For buffers stored in
L2 memory the hardware will keep everything coherent for you. So as
long as you use the *DAT_copy* to move data in between L2 and SDRAM you
don't need to worry about the cache.
On the other hand, if you decided to just process the buffers directly
in external memory and let the cache help you out, in that case the
procedure for handling the cache would be:
1) Block invalidate (NO WRITEBACK) the memory range corresponding to
your incoming video data.
2) Read the incoming video data, process, and write to output buffer.
3) Block writeback the memory range corresponding to the output array
(a writeback invalidate is also ok, but not necessary and potentially
less efficient).
Brad

Posted by Brad Griffis●May 10, 2008

rbmm756@gmail.com wrote:

> Hi everyone,
> In my program, i have set 6 EDMAs for image capturing and displaying,
> they are set to transfer data from FIFO to SDRAM or SDRAM to FIFO. And
> now I have to use function DAT_copy() to transfer data between
> SRAM(L2) and SDRAM(external memory). Before call DAT_copy(), i call
> CACHE_wbInvL2() to coherence. But the data that i get wasn't right.
> And i use the example that ti company have given in my program, the
> data also wrong.
> The type of my dsp is DM642.
> Dose the number of EDMA that running at the same times in DM642 have a
> limit, like can't exceed 6 at the same time.

Your writeback-invalidate is likely the issue. By doing that you are
causing data that is currently cached to be pushed out to external
memory. This could very well be overwriting your data buffers in
external memory.
If you are using DAT_copy (which is QDMA based) to move your data
buffers from external memory to internal memory then you do not need to
perform any user-initiated coherence operations. For buffers stored in
L2 memory the hardware will keep everything coherent for you. So as
long as you use the *DAT_copy* to move data in between L2 and SDRAM you
don't need to worry about the cache.
On the other hand, if you decided to just process the buffers directly
in external memory and let the cache help you out, in that case the
procedure for handling the cache would be:
1) Block invalidate (NO WRITEBACK) the memory range corresponding to
your incoming video data.
2) Read the incoming video data, process, and write to output buffer.
3) Block writeback the memory range corresponding to the output array
(a writeback invalidate is also ok, but not necessary and potentially
less efficient).
Brad

Posted by ●May 7, 2008

Hi everyone,
In my program, i have set 6 EDMAs for image capturing and displaying,
they are set to transfer data from FIFO to SDRAM or SDRAM to FIFO. And
now I have to use function DAT_copy() to transfer data between
SRAM(L2) and SDRAM(external memory). Before call DAT_copy(), i call
CACHE_wbInvL2() to coherence. But the data that i get wasn't right.
And i use the example that ti company have given in my program, the
data also wrong.
The type of my dsp is DM642.
Dose the number of EDMA that running at the same times in DM642 have a
limit, like can't exceed 6 at the same time.