The CA555 and CA555C are highly stable timers for use inprecision timing and oscillator applications. As timers, thesemonolithic integrated circuits are capable of producing accu-rate time delays for periods ranging from microsecondsthrough hours. These devices are also useful for astableoscillator operation and can maintain an accurately con-trolled free running frequency and duty cycle with only twoexternal resistors and one capacitor.

The circuits of the CA555 and CA555C may be triggered bythe falling edge of the waveform signal, and the output ofthese circuits can source or sink up to a 200mA current ordrive TTL circuits.

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operationof the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1.

JA

is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications

T

A

= 25

o

C, V+ = 5V to 15V Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

CA555, LM555

CA555C, LM555C, NE555

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

DC Supply Voltage

V+

4.5

-

18

4.5

-

16

V

DC Supply Current (Low State),(Note 2)

I+

V+ = 5V, R

L

=

-

3

5

-

3

6

mA

V+ = 15V, R

L

=

-

10

12

-

10

15

mA

Threshold Voltage

V

TH

-

(

2

/

3

)V+

-

-

(

2

/

3

)V+

-

V

Trigger Voltage

V+ = 5V

1.45

1.67

1.9

-

1.67

-

V

V+ = 15V

4.8

5

5.2

-

5

-

V

Trigger Current

-

0.5

-

-

0.5

-

µ

A

Threshold Current (Note 3)

I

TH

-

0.1

0.25

-

0.1

0.25

µ

A

Reset Voltage

0.4

0.7

1.0

0.4

0.7

1.0

V

Reset Current

-

0.1

-

-

0.1

-

mA

Control Voltage Level

V+ = 5V

2.9

3.33

3.8

2.6

3.33

4

V

V+ = 15V

9.6

10

10.4

9

10

11

V

Output Voltage

V

OL

V+ = 5V, I

SINK

= 5mA

-

-

-

-

0.25

0.35

V

Low State

I

SINK

= 8mA

-

0.1

0.25

-

-

-

V

V+ = 15V, I

SINK

= 10mA

-

0.1

0.15

-

0.1

0.25

V

I

SINK

= 50mA

-

0.4

0.5

-

0.4

0.75

V

I

SINK

= 100mA

-

2.0

2.2

-

2.0

2.5

V

I

SINK

= 200mA

-

2.5

-

-

2.5

-

V

Output Voltage

V

OH

V+ = 5V, I

SOURCE

= 100mA

3.0

3.3

-

2.75

3.3

-

V

High State

V+ = 15V, I

SOURCE

= 100mA

13.0

13.3

-

12.75

13.3

-

V

I

SOURCE

= 200mA

-

12.5

-

-

12.5

-

V

Timing Error (Monostable)

R

1

, R

2

= 1k

to 100k

,

C = 0.1

µ

F

Tested at V+ = 5V, V+ = 15V

-

0.5

2

-

1

-

%

Frequency Drift with Temperature

-

30

100

-

50

-

ppm/

o

C

Drift with Supply Voltage

-

0.05

0.2

-

0.1

-

%/V

CA555, CA555C, LM555, LM555C, NE555

8-5

Schematic Diagram

Typical Applications

Reset Timer (Monostable Operation)

Figure 1 shows the CA555 connected as a reset timer. In thismode of operation capacitor C

T

is initially held discharged by

a transistor on the integrated circuit. Upon closing the "start"switch, or applying a negative trigger pulse to terminal 2, theintegral timer flip-flop is "set" and releases the short circuitacross C

T

which drives the output voltage "high" (relay ener-

gized). The action allows the voltage across the capacitor toincrease exponentially with the constant t = R

1

C

T

. When the

voltage across the capacitor equals 2/3 V+, the comparatorresets the flip-flop which in turn discharges the capacitor rap-idly and drives the output to its low state.

Output Rise Time

t

R

-

100

-

-

100

-

ns

Output Fall Time

t

F

-

100

-

-

100

-

ns

NOTES:

2. When the output is in a high state, the DC supply current is typically 1mA less than the low state value.

3. The threshold current will determine the sum of the values of R

1

and R

2

to be used in Figure 4 (astable operation); the maximum total

R

1

+ R

2

= 20M

.

Electrical Specifications

T

A

= 25

o

C, V+ = 5V to 15V Unless Otherwise Specified (Continued)

PARAMETER

SYMBOL

TEST CONDITIONS

CA555, LM555

CA555C, LM555C, NE555

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

6

THRESHOLD

7

RESET

DISCHARGE

V-

RESET

DISCHARGE

3

OUTPUT

OUTPUT

FLIP-FLOP

TRIGGER

COMPARATOR

THRESHOLD

COMPARATOR

4.7K

830

4.7K

D

2

D

1

Q

3

Q

4

Q

7

Q

5

Q

2

Q

1

10K

Q

8

Q

6

100

100K

Q

9

Q

11

Q

12

1K

Q

10

5K

Q

13

Q

16

7K

D

3

Q

14

Q

15

Q

17

3.9K

Q

19

Q

20

Q

21

Q

18

8

V+

CONTROL

VOLTAGE

5K

6.8K

5K

4.7K

220

4.7K

5

2

4

1

TRIGGER

D

4

NOTE: Resistance values are in ohms.

CA555, CA555C, LM555, LM555C, NE555

8-6

Since the charge rate and threshold level of the comparatorare both directly proportional to V+, the timing interval is rel-atively independent of supply voltage variations. Typically,the timing varies only 0.05% for a 1V change in V+.

Applying a negative pulse simultaneously to the reset termi-nal (4) and the trigger terminal (2) during the timing cycledischarges C

T

and causes the timing cycle to restart.

Momentarily closing only the reset switch during the timinginterval discharges C

T

, but the timing cycle does not restart.

Figure 2 shows the typical waveforms generated during thismode of operation, and Figure 3 gives the family of timedelay curves with variations in R

1

and C

T

.

Repeat Cycle Timer (Astable Operation)

Figure 4 shows the CA555 connected as a repeat cycletimer. In this mode of operation, the total period is a functionof both R

1

and R

2.

T = 0.693 (R

1

+ 2R

2

) C

T

= t

1

+ t

2

where t

1

= 0.693 (R

1

+ R

2

) C

T

and t

2

= 0.693 (R

2

) C

T

the duty cycle is:

Typical waveforms generated during this mode of operationare shown in Figure 5. Figure 6 gives the family of curves offree running frequency with variations in the value of(R