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Keynote speech on Challenges in the design of future SoCs and the role of Reconfigurable Computing at the DASIP conference

Cagliari, Italy- October 10 2013- Ioannis Sourdis presents a keynote on 'Challenges in the design of future SoCs and the role of Reconfigurable Computing' at the DASIP Conference on Design and Architectures for Signal and Image Processing.

In the first part of his keynote, Ioannis Sourdis will first address challenges in the design of future SoCs. The “golden” CMOS era is long gone: technology scaling does not deliver any longer significant performance speedup, the increasing power density poses severe limitations in chips, and transistors become less reliable. New, more efficient design techniques are needed to improve power efficiency, to increase SoC performance and functionality, and to provide fault-tolerance at lower (power, energy and performance) costs. Ioannis will outline future directions for the design of more efficient, adaptive SoCs using reconfigurable hardware.

In the the second part of his keynote, Ioannis Sourdis focuses on the design of future fault-tolerant SoCs. He will describe the concepts of the DeSyRe FP7 European project, and he will outline how the DeSyRe SoC architecture exploits a flexible reconfigurable hardware substrate coupled with runtime system optimization and management techniques. The result is a SoC which is on-demand adaptive not only to the various fault-types and fault rates, but also to the application requirements and system constraints.