Intel only recently began to sell makers and users supercomputers on the benefits of its new Xeon Phi chip line. But the company can point to early progress, and this week is discussing its next move.

Engineers in China decided to use 48,000 of the unusual chips inside Xianhe-2, a supercomputer that just officially placed No. 1 on a twice-yearly ranking of the world’s 500 most powerful computers. That system, whose name means Milky Way-2, also has 32,000 Intel Xeon chips of the sort used in more conventional servers.

What’s the difference? Ordinary Xeons, which have dominated the ranks of supercomputers for years, typically have one to eight of what the industry calls “brawny” processor cores–calculating engines that each can handle fairly complex computing tasks. The forthcoming version of the chip used in the Chinese system, called the E5-2600 v2, has twelve cores.

Xeon Phis have quite a few more electronic brains, but each one is smaller and simpler. The initial version of the chip has 61 cores. The idea is to pass certain calculating jobs–those that can be easily broken up to be gang-tackled by a greater number of computing engines–from the Xeons to the Phi chips to get results faster.

The use of such helper chips, called accelerators or co-processors, has become an increasingly popular way to reach higher performance levels with supercomputers without creating massive electricity bills. Most systems that use the approach have been assembled using Nvidia or Advanced Micro Devices graphics chips, or GPUs, which have hundreds of simple processors.

Intel’s rival Xeon Phi, formally introduced six months ago, is being used in 11 systems that placed on the latest Top500 list. Nvidia chips are used in 39 machines, while three use AMD’s Radeon GPUs.

Mixing multiple chips based on different internal designs is sometimes called “heterogeneous” computing. Rajeeb Hazra, vice president and general manager of Intel’s technical computing group, is using a supercomputing conference in Germany to broach a different spin on the trend–what he is calling “neo-heterogeneity.”

The idea is that using the Xeon Phi as an accelerator–rather than a graphics chips with an entirely different design–has a big payoff because it is more familiar to program than GPUs. That’s because each of its cores is based on the same x86 design found in most personal computers and servers, Intel says.

And Intel has a plan to bring even greater programming efficiency with the next version of the Xeon Phi.

The current model of the chip is built using the company’s current production process. Hazra says the next version, code-named Knight’s Landing, will jump from circuitry rated at 22 nanometers–billionths of a meter–to a 14-nanometer process that should bring further speed and power-reduction benefits. He did not disclose precisely when Knight’s Landing will arrive, but no 14-nanometer products are expected to hit the market until the first half of 2014.

More importantly, Knight’s Landing can be used in two ways. It can work as today’s Xeon Phi versions do, as a co-processor to an ordinary Xeon, typically placed on a separate circuit board. But it can also essentially replace the Xeon and be used as the main processor in a system.

Used in that way, Hazra says, Knight’s Landing will ease the programming complexities associated with shifting parts of programs to a different part of a system. It will also be packaged for the first time with memory chips known as DRAMs, to reduce delays associated with moving data back and forth to other parts of a system.

Don’t expect GPU fans to give up the race. Sumit Gupta, general manager of Nvidia’s Tesla accelerated computing business unit, notes that accelerators now account for 30% of the aggregated performance of systems on the Top500 list. And the company has more powerful GPUs on its roadmap to keep boosting supercomputer performance.