Abstract

A high-linearity and high-efficiency MMIC power amplifier is demonstrated adopting a new on-chip adaptive bias circuit, which improves efficiency at the low output power level and linearity at the high output power level automatically. The intelligent two-stage W-CDMA power amplifier using the newly proposed adaptive bias circuit extends the maximum linear output power of 0.6dB and exhibits an improvement of average power usage efficiency by 1.85 times with a quiescent current of 36mA.

Abstract

A high-linearity and high-efficiency MMIC power amplifier is demonstrated adopting a new on-chip adaptive bias circuit, which improves efficiency at the low output power level and linearity at the high output power level automatically. The intelligent two-stage W-CDMA power amplifier using the newly proposed adaptive bias circuit extends the maximum linear output power of 0.6dB and exhibits an improvement of average power usage efficiency by 1.85 times with a quiescent current of 36mA.