Philosophy: My focus is on prevention as well as the diagnosis and management of a wide range of medical conditions treating patients from the ages of 15 and up. I am very comfortable and experienced in treating ...

Work:

Education:

Specialty: B.a in business administration 1994 to 1997

School: University Of Phoenix - Phoenix, AZ

Skills:

Detail-oriented, innovative, driven, persistent, knowledgeable in fashion trends, project managerial skills, strong analytical thinker, hard working, excellent verbal and written communication skills, Work well under pressure, a high level of initiative, resourceful, technical proficiencies, the ability to support multiple individuals in a fast-paced environment, ability to handle multiple and competing priorities while adhere to deadlines

News

JoseDelgado, who was waiting for his own parole hearing Thursday, lives at the same halfway house as Dingman and has known him for about a year. He said Dingman stands out as a hard worker who has learned his lesson.

Abstract: A bonded wafer has a first handle wafer 12, a device layer 10', an interconnect layer 14, and a number of vias filled with conductive material that extends between the surfaces 6, 8 of the device layer 10'. the interconnect layer 14 has conductors that connect internal device ...

Abstract: The present invention induces provides a gettering trench on the front surface of a device substrate. In one embodiment it induces stress and simultaneously forms a gettering zone 40 for gettering impurities in an integrated circuit structure. In another embodiment, the trench...

Abstract: A bonded wafer has a first handle wafer 12, a device layer 10', an interconnect layer 14, and a number of vias filled with conductive material that extends between the surfaces 6, 8 of the device layer 10'. the interconnect layer 14 has conductors that connect internal device ...

Abstract: The present invention induces provides a gettering trench on the front surface of a device substrate. In one embodiment it induces stress and simultaneously forms a gettering zone 40 for gettering impurities in an integrated circuit structure. In another embodiment, the trench...

Abstract: A method of forming a high-quality complementary transistor device using bonded wafer technology. The invention includes bonding a handle wafer to a first epitaxial layer and then providing dopants to form the respective N and P buried layers in said first epitaxial layer. A s...

Abstract: A method including forming an alignment moat of a first depth on a first surface of a substrate and performing all backside processing, forming a first oxide layer on the first surface and oxide bonding it to a handling wafer by oxide bonding. The substrate is then thinned fro...

Integrated circuit air bridge structures and methods of fabricating same

Abstract: Conductive elements which provide interconnections (air bridges between circuits) and components such as capacitors and inductors may be incorporated in the devices in a manner to reduce parasitic effects in the operation of the devices while providing close spacing which enha...

Abstract: A process including forming peaks and valleys in a bonding surface of a first wafer so that the peaks are at the scribe lines which define dice. The peaks and not the valleys of the first wafer is bonded to a bonding surface of a second wafer. The device forming steps are perfo...

Abstract: A handle wafer has a cavity coated with a dielectric. A device wafer is bonded to the handle wafer. Metal lines, devices or circuits fabricated on device layer overlay the cavity in the handle wafer thus reducing parasitic capacitances to the handle wafer and crosstalk through...

Abstract: A low temperature coefficient resistor (TCRL) has some unrepaired ion implant damage. The damaged portion raises the resistance and renders the resistor less sensitive to operating temperature fluctuations A polysilicon thin film low temperature coefficient resistor and a method ...Claim: What is claimed is: 1. In a process for forming an integrated circuit with MOS and bipolar devices in a single semiconductor substrate, the process comprising: forming one or more first buried layers with a dopant having a first diffusion coefficient; forming one or more second b...