Claiming to provide designers with the highest density FPGA per board area, the folks at <Altera have announced the availability of new 8 × 8 mm2 packaging (M164) for its family of 65-nm Cyclone III FPGAs.

Designers of space-constrained high-volume applications in consumer, military, and industrial markets can now take advantage of: "The combined lowest power and density leadership of the Cyclone III devices."

The new 8 × 8 mm2 164-pin package with up to 16 K logic elements (LEs) extends the Cyclone III FPGA's high-density small-package offering that includes 14 × 14 mm2 256-pin (U256) and 17 × 17 mm2 484-pin (U484) packages. Each of these packages is claimed to offer the highest amount of logic and I/Os for its footprint, allowing engineers to use FPGAs in new applications, such as handheld radios, satellite phones, I/O modules, and consumer displays.

Cyclone III devices deliver from 5K to 120 K LEs, up to 4 Mbits of memory, and up to 288 digital signal processing (DSP) multipliers. Built on TSMC's 65-nm Low-Power (LP) process, the Cyclone III family includes devices that are qualified for commercial, industrial and extended temperatures.

For more information about Cyclone III FPGAs, including white papers, handbooks and webcasts, visit www.altera.com/cyclone3.