Non-Transparent Bridge Enables Connectivity

Non-Transparent Bridge Enables Connectivity: White Paper

IntroductionThe Intel® Xeon® processor C5500/C3500 series is the next generation of high-performance, multi-core architecture targeted for embedded, and storage use cases. Based on 45nm technology, the architecture integrates multiple processor cores, memory controller, PCI Express* (PCIe) interface, Crystal Beach DMA engines, and I/O virtualization blocks in a single chip. Augmenting several embedded features is the integration of Non-Transparent Bridge (NTB) which enables high speed connectivity between one Intel Xeon Processor-based platform to another (or other IA or non-IA platform via the PCIe interface).

This paper provides a detailed look at the non-transparent bridge device integrated into the Intel Xeon processor C5500/C3500 series.

IntroductionThe Intel® Xeon® processor C5500/C3500 series is the next generation of high-performance, multi-core architecture targeted for embedded, and storage use cases. Based on 45nm technology, the architecture integrates multiple processor cores, memory controller, PCI Express* (PCIe) interface, Crystal Beach DMA engines, and I/O virtualization blocks in a single chip. Augmenting several embedded features is the integration of Non-Transparent Bridge (NTB) which enables high speed connectivity between one Intel Xeon Processor-based platform to another (or other IA or non-IA platform via the PCIe interface).

This paper provides a detailed look at the non-transparent bridge device integrated into the Intel Xeon processor C5500/C3500 series.