The potential of active inductors (AIs) has been typically reduced by lack of accurate design methodologies and limitations due to the inherent noise sources. This project deals with these 2 open problems for a high-frequency CMOS AI characterized by high-quality issue, low-power consumption, and low noise. First, it reports an effective design methodology for the implementation of high-frequency CMOS AIs with a high-quality factor. In specific, it shows how, through an advanced little-signal circuit model, to carry out an accurate and reliable style at high frequency (over 10 GHz) in fashionable nanoscale CMOS method. The look methodology is validated through cases of study at 13 GHz implemented in a very commonplace ninety-nm CMOS process and characterised experimentally. The results show that the AI exhibits an equivalent inductance close to 3.2 nH with an associated quality factor close to 200. After, it reports a noise analysis. It shows that the AI exhibits a very low level of noise, enabling its application to the implementation of high-quality factor low-noise LC tank in high-frequency building blocks of radio frequency front-ends. The results show that the AI exhibits a noise power spectral density under -one hundred fifty dBm/Hz.

Did you like this research project?

To get this research project Guidelines, Training and Code... Click Here

PROJECT TITLE :Design, Evaluation and Application of Approximate High-Radix Dividers - 2018ABSTRACT:Approximate high radix dividers (HR-AXDs) are proposed and investigated during this paper. High-radix division is reviewed and

LEGAL

FOLLOW US

Disclaimer : MTech Projects, is not associated or affiliated with IEEE, in any way. The IEEE Projects mentioned here are mentioned in the context of student projects, whose ideas are derived from IEEE publications, and not projects of or by IEEE