Since the release of the first-generation specification two years ago, the complexity of digital SoC architectures has increased significantly as more functions are embedded into battery-powered devices such as mobile phones, handheld gaming consoles and portable media players.

"The PWI 2.0 standard enables simple two-wire implementation of advanced power management technologies such as adaptive voltage scaling and back-biasing in multi-domain architectures," said Ravindra Ambatipudi, director of Advanced Power Products, National Semiconductor, in a statement. "PWI 2.0 technology enables device manufacturers to offer new processor-intensive features such as digital multimedia processing and broadcasting with improved battery life while maintaining supply-chain flexibility."

Introduced Oct. 2003, the PowerWise interface specification defines a two-wire serial bus connecting SoCs with PMICs. The interface is specifically defined to provide master-to-slave communication, optimized for control of a voltage regulation system that enables system designers to dynamically adjust the supply and back-bias voltages on digital processors.
Available now, the PWI 2.0 specification is royalty- and license-free. The specification is available for download at the following website.