Important Short Questions and Answers: Memory and Programmable Logic

Digital Principles and System Design - Memory and Programmable Logic - Important Short Questions and Answers: Memory and Programmable Logic

1.List
basic types of programmable logic devices.

Read only memory Programmable
logic Array Programmable Array Logic

2.Explain
ROM

A read only memory (ROM) is a
device that includes both the decoder and the OR gates within a single IC
package. It consists of n input lines and m output lines. Each bit combination
of the input variables is called an address. Each bit combination that comes
out of the output lines is called a word. The number of distinct addresses
possible with n input variables is 2n.

3. Define address and word:

In a ROM, each bit combination of
the input variable is called on address. Each bit combination that comes out of
the output lines is called a word.

4.State the
types of ROM

.
Masked ROM.

. Programmable Read only Memory

. Erasable Programmable Read only
memory.

. Electrically Erasable
Programmable Read only Memory.

5.What is
programmable logic array? How it differs from ROM?

In some cases the
number of don’t careditionsconis
excessive, it is more economical to use a secondtype
of LSI component called a PLA. A PLA is similar to a ROM in concept; however it
does not provide full decoding of the variables and does not generates all the
minterms as in the ROM.

6. Explain PROM.

PROM (Programmable Read Only Memory)

It allows user to store data or
program. PROMs use the fuses with material like nichrome and polycrystalline.
The user can blow these fuses by passing around 20 to 50 mA of current for the
period 5 to 20μs.The blowing of fuses is called
programming of ROM. The PROMs are one time programmable.Once
programmed, the information is stored permanent.

7. Explain EPROM.

EPROM (Erasable Programmable Read Only Memory)

EPROM use MOS
circuitry. They store 1’s andas a0’spacket of
charge in a buried layer of the IC chip.We can
erase the stored data in the EPROMs by exposing the chip to ultraviolet light
via its quartz window for 15 to 20 minutes. It is not possible to erase
selective information. The chip can be reprogrammed.

8. Explain EEPROM.

EEPROM (Electrically Erasable
Programmable Read Only Memory) EEPROM also use MOS circuitry. Data is stored as
charge or no charge on an insulated layer or an insulated floating gate in the
device.

EEPROM allows selective erasing
at the register level rather than erasing all the information since the
information can be changed by using electrical signals.

9. What is RAM?

Random Access Memory-Read and write operations can be carried
out.

10. What is programmable logic array? How it
differs from ROM?

In some cases the
number of don’t care conditions is excessive, it is more economical to type of
LSI component called a PLA. A PLA is similar to a ROM in concept; however it
does not provide full decoding of the variables and does not generates all the
minterms as in the ROM.

11. What is mask - programmable?

With a mask programmable PLA, the user must submit a PLA
program table to the manufacturer.

12. What is field programmable logic array?

The second type of PLA is called
a field programmable logic array. The user by means of certain recommended
procedures can program the EPLA.

13. List the major differences between PLA and PAL

Both AND and OR arrays are
programmable and Complex Costlier than PAL PAL, AND arrays are programmable OR
arrays are fixed Cheaper and Simpler.

14. Define PLD.

Programmable Logic Devices
consist of a large array of AND gates and OR gates that can be programmed to
achieve specific logic functions.

PROM is Programmable Read Only
Memory. It consists of a set of fixed AND gates connected to a decoder and a
programmable OR array.

17. Define PLA

PLA is Programmable Logic Array
(PLA). The PLA is a PLD that consists of a programmable AND array and a
programmable OR array.

18. Define PAL

PAL is Programmable Array Logic.
PAL consists of a programmable AND array and a fixed OR array with output
logic.

19. Why was PAL developed?

It is a PLD that was developed to
overcome certain disadvantages of PLA, such as longer delays due to additional
fusible links that result from using two programmable arrays and more circuit
complexity.

20. Why the input variables to a PAL are buffered

The input variables to a PAL are buffered to prevent loading
by the large number of AND gate inputs to which available or its complement can
be connected.