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EMC verification

While following inevitable technological advance and facing faster rise time of digital logic signals, most nowaday high-speed electronics designers feel concern about the electromagnetic radiation (EMR) of their designs.

Many of them are aware of multilayer boards to provide better electromagnetic compatibility (EMC), than double-sided ones, and embedding traces between planes to suppress EMR dramatically. Though there are a lot of double-sided boards where high-speed signal traces routed on outer layers due to the overriding factor of cost. Nevertheless, this “cost” doesn’t include only the expense of the board development and manufacturing, but also the “cost” of violating design rules for timing, topological, thermal and other product aspects.

So the real challenge many designers are faced with is the achievement of good EMC parameters in a cost-effective period. That is why early stage simulations are required to quantify EMC issues and thus assess the efficiency of specific EMC rules or EMC solutions to be implemented.

By using high-speed analysis and verification techniques Edality can help you overcome a difficulties of the EMC issues early in the design cycle in such a way that layout reengineering will be eliminated and the product will be marketed on time.