Bytom, Poland. 3rd of September 2014-The DRPIC1655X is a
low-cost,
high performance, 8-bit, fully static soft IP Core, intended to operate with fast, dual ported memory. It’s been designed with a special concern about low power consumption, assuring
the best power use, price and performance combination available on the PIC IP cores market. – Especially now, when we see more demand from IoT projects – explains Jacek Hanke, DCD’s CEO – efficient solutions like DRPIC1655X are the right answer, cause one can find them for less than $1 in 10K quantities. Of course FPGA netlist is also available.

The DRPIC1655X Microcontroller perfectly fits in applications ranging from high-speed automotive and appliance motor control, to low-power remote transmitters/receivers, pointing devices and telecom processors. Built-in power save mode makes this IP core perfect for applications, where the power consumption aspect is critical.

The DRPIC1655X soft core is software-compatible with the industry standard PIC 16XXX Microcontrollers. It implements enhanced Harvard architecture (separate instruction and data memories), with independent address and data buses. The 14 bit program memory and 8-bit dual port data memory allow instruction fetch and data operations to occur simultaneously. The
advantage of this architecture is that
instruction fetch and memory transfers can be overlapped by multi stage pipeline, so that the next instruction can be fetched from program memory, while the current instruction is executed with data, from the data memory.

The DRPIC1655X architecture is
4 times faster compared to standard architecture. Most instructions are executed within 1 system clock period, except the instructions, which operate directly on PC (GOTO, CALL, RETURN) program counter. - This situation requires the pipeline to be cleared and subsequently refilled – adds Hanke - This operation takes additional one clock cycle.
Last but not least, the DRPIC165X is delivered with
fully automated testbench,
complete set of tests and
DoCD TM on-chip hardware debugger, which allow easy package validation, at each stage of SoC design flow.

Unlike other on-chip debuggers,
DoCDTM provides a non-intrusive debugging of running application. It can halt, run, step into or skip an instruction, read/write any contents of microcontroller, including all registers, SFRs, including user defined peripherals, data and program memories.

In 2014 Digital Core Design celebrates its 15th Anniversary. The company founded in 1999, since the beginning stands in the forefront of the IP Core market. High specialization and profound customer service enabled to introduce more than 70 different architectures. Among them is the world’s fastest 8051 IP Core, the DQ80251, which is more than 66 times faster than the standard solution. As an effect, over 300 hundred licensees have been sold to more than 500 companies worldwide. Among them are the biggest enterprises like e.g. Sony, Siemens, General Electric and Toyota. But a lot of DCD’s customers are small businesses, R&D laboratories or front/back end offices, which require exact solution tailored to their project needs. Rough estimations say that more than 250 000 000 devices around the globe have been based on Digital Core Design’s IP Cores.