HDI Stackup: Routing A .4mm Pitch

Here is the first of many HDI examples we will be sharing. This is a .4mm BGA pitch on a 6×6 matrix. It has 4 – 5 mil trace/space, with 4 mil lasers and 8 mil pads. The routing strategy includes stacked and staggered vias.

This PCB has 4 mil vias. The material thickness between layers 1 – 2 should be 4 mils, max. The aspect ratio rule requires 4 mils of dielectric between layers 1 – 2. Stackups must be kept symmetrical, so there must also be 4 mils of dielectric between layers 7 – 8.

Layer One: Signal

For outer layers like layer 1 of the BGA breakout, the outermost pins can simply be fanned out. There is no need to worry about routing between pads. The outer layer pad size is determined by the chip’s footprint. Pad size depends on BGA ball size. Pad size does not need to be the same size as balls. Solderballs are always smaller than pads.

Layer Two: Ground

This stackup shows layer two with layer one pads. The pads have been offset. There is mostly short routing because it is a ground plane. Short stub fan out is used throughout the BGA. We don’t want to “cut up” the ground on layer two. Longer routing will be found on layer three. The BGA is connected to ground on layer 7. Other areas outside the BGA are connected to layer two.

Layer Three: Signal

The third BGA row was routed on layer three. The four middle pins could not have been routed before. The second BGA row was completely routed on layer three as well: it had been fanned out on layer two and has now been completely routed out.

Summary

A large majority of the .4mm routed pitch BGAs require HDI.

If your IC designer leaves enough space, the best location for a mechanical through via is within the center of the BGA.

To meet BGA requirements, it is okay to break other PCB design rules. Within tight BGAs, all bets are off.

Tie signal to ground outside densely populated areas.

For better power feed, tie to ground planes using through vias. Return paths run more smoothly when closer to signal layers. Return paths are also crucial for high speed signals.

Copper layer thickness defines trace/space.

Route less on ground planes to keep its integrity—don’t cut up the ground planes.

Pad size, BGAs, and routing on outer layers are determined by chip size and pitch.