The Quest For Zero Power Logic

Quantum cellular automate (QCA) shows great promise in succeeding CMOS for logic used to fabricate digital integrated circuits. By 2025, it may be the primary means used to fabricate the engines of our electronic devices.

What if a logic state was distinguished not by the flow of electrons, but by their individual positions? It’s not science fiction. It’s an area of research called quantum cellular automata (QCA), which is part of a quest to find the successor to the aging field effect transistor (FET) as well as a solution to the density versus power dissipation problem that occurs at molecular geometries. In fact, this technology may be the next revolutionary change in the semiconductor industry.

Background

The humble FET has been the workhorse of the modern semiconductor industry for applications in computing as well as high-performance analog and mixed-signal devices. Moore’s law has predicted that the number of transistors integrated on a single device would double roughly every two years. Intel and other semiconductor manufacturers have developed CMOS processes that continue to meet or exceed Moore’s predicted improvements in integration and fabrication. However, building a smaller transistor is only part of the problem. A power density relationship ultimately will halt the reduction in size of FETs unrelated to the ability to fabricate them.

Developments such as the FinFET, now used on the Ivy Bridge family of Intel processors, have continued to improve the density of transistors found on modern digital ICs. However, the power each transistor dissipates is based on several factors. In general, complementary transistors found in modern CMOS dissipate power while switching states, but also “leak” current while in a static state due to short channel effects and electron tunneling.

In the recent past, this leakage was minimal. But when scaling to geometries below 45 nm where the density of transistors dramatically increases, the leakage current rivals the dynamic power of the device. Scaling further continues to place more transistors in the same physical area, increasing both the dynamic and static leakage power density. It is believed this power dissipation versus density will limit the scaling before the fabrication process limits are reached.

With this impending limit, the quest for a replacement for FET-based logic has been the Holy Grail of the semiconductor industry. Several single-electron candidates such as resonant tunneling diodes (RTD) and tunneling phase logic (TPL) offer advantages over traditional FET structures. One area of research in single-electron structures based on an old concept reaching back to the first part of the 20th century called cellular automata (CA), though, has great promise in the computing world.

A CA is a state machine made from a grid of cells where each cell can only exist in a finite number of states. The cells affect each other based on either a physical law or programmatic rules that are fixed in time. In other words, the rules do not change. As an input cell changes state, it affects the state of adjacent cells, which propagates through the system. Basic CA is familiar to many of us in the form of software programs such as the computer program “Game of Life,” written by John Horton Conway in 1970.

Stanislaw Ulam developed the concept of CA in the 1940s while he was employed at Los Alamos National Laboratory. Further study continued throughout the 1950s and 1960s, but it wasn’t until Conway’s game that interest in the field expanded outside of government institutions and universities. CA can be manifested in any finite number of dimensions, although two dimensions (planar) such as Conway’s game are most applicable to logic. In the two-dimensional form, CA is a regular grid of cells. The grid typically is square, but it also can be hexagonal, like a honey comb.

Quantum Dot Cellular Automata

One area of CA that shows great promise is called quantum dot cellular automata (QDCA), or simply quantum cellular automata (QCA). QCA is not a new idea. It has been around since the early 1990s, when a group of researchers proposed using quantum dots to form the cells. A quantum dot can confine a single electron. A cell comprising four quantum dots is arranged in a square. After it’s charged with two electrons, the cell will settle into one of two states (Fig. 1). By arranging cells into patterns, gates can be created.

1. A QCA cell comprises four quantum dots. The quantum dots do not scale with the cell.

Solid-state QCAs have been prototyped using e-beam lithography and have dimensions on the order of 20 nm—not far from the gate length of standard FETs found in CMOS. However, they don’t require a drain or source to operate. They simply need to be arranged into the correct pattern to form the logic.

QCA cells can be arranged to create logic “gates” by placing them near each other in a pattern. There are two fundamental gate structures in QCA. One is an inverter, and the other is called a “majority gate” (Fig. 2). A majority gate is fundamentally a three-input gate with a single output. In this configuration, the electric field effects of the inputs are additive, resulting in an output based on the majority state of the inputs—ones or zeros. It also can be thought of as a programmable block where one input selects the function of the other two inputs to be either an “AND gate” or an “OR gate.” All other logic functions can be made from these two structures.

2. There are two basic logic elements: the inverter or NOT gate (top), and the majority gate (bottom). This layout forms both gates along with the truth table of the majority gate.

Additionally, wires can be built by simply arranging cells in a line. There are also structures for converting traditional voltage inputs to QCA and outputs that convert the state of a QCA cell to a voltage for integration with existing digital technologies.

Directionality And Clocking

An interesting architectural phenomenon in QCA is that the direction of data flow is reversible. That is, unlike conventional CMOS logic where there is distinctly an input side and an output driver side, QCA can work symmetrically. This is useful in applications such as serialization and deserialization (SERDES) where the function is completely reversible. However, data in pipeline logic generally needs a fixed direction of flow or chaos ensues. The other issue is the loss of energy during state transitions, so a method to add gain to the system also must be implemented.

Both issues can be addressed via a buried clock layer below the quantum cells. This conductive material sits below all cells within a given clock “domain” and controls the gating of state transitions by raising and lowering the tunneling barrier between dots. By placing adjacent clock domains in quadrature (for example, 90° out of phase), the direction of logic flow can be controlled.

Fabrication Of QCA Logic

Initially, QCA logic will be built by following the traditional methods of silicon wafer fabrication. Today, QCA structures have been fabricated using electron beam lithography, which is slow and impractical for production volumes. However, extreme ultraviolet lithography and other nanolithographic techniques show promise in fabricating structures below 10 nm in production volumes.

One method called DNA tiling uses strands of DNA to self-assemble rafts containing tiles of QCA cells. Different patterns can be formed by using the various configurations of tiles, which contain the QCA cells in fixed positions. These rafts can then be “nudged” into trenches etched with more conventional methods to form circuits.

Conclusions

CMOS still has some life left, and for the near term it will continue to be the mainstay of high-performance logic designs. But due to power density and dissipation issues, CMOS will ultimately run out of scalability, pushing the industry to alternatives. QCA shows great promise in succeeding CMOS for logic used to fabricate digital integrated circuits. By 2025, it may be the primary means used to fabricate the engines of our electronic devices.

Richard Zarr is a technologist at Texas Instruments focused on high-speed signal and data path technology. He has more than 30 years of practical engineering experience and has published numerous papers and articles worldwide. He is a member of the IEEE and holds a BSEE from the University of South Florida as well as several patents in LED lighting and cryptography.

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