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Abstract

Disclosed is a latch and hold mechanism, for holding the match signal output of tag RAMS in cache memory, together with an associated latch clearing mechanism. This mechanism is used by diagnostic software to determine if the tag RAMS are functioning correctly.

Country

United States

Language

English (United States)

This text was extracted from an ASCII text file.

This is the abbreviated version, containing approximately
81% of the total text.

Diagnostic Capability for Tag RAMS

Disclosed is
a latch and hold mechanism, for holding the match
signal output of tag RAMS in cache memory, together with an
associated latch clearing mechanism.
This mechanism is used by
diagnostic software to determine if the tag RAMS are functioning
correctly.

The match
signal output of these tag RAMS indicates when a
current address on the bus "hits" a line stored in cache memory. If
the cache memory is, for example, two way set associative, there are
two match signal outputs, each of which provides an input to a
separate electronic latch.

Diagnostic
software includes a routine which accesses various
memory addresses in sequence, so that certain addresses result in
hits within one of the associative sets of cache memory, certain
other addresses result in hits in the other set of cache memory, and
other addresses result in cache misses.

After each
access, the diagnostic software executes several
steps to determine whether a cache hit should have occurred, and in
the case of set associative memory, which tag RAM match signal should
have been active. During this time, the
tag RAM match outputs are
maintained in the electronic latches so that a comparison can be
made. Using this comparison, the software
determines whether the tag
RAMS are working properly. If the
software determines that there
should be a match, but there is no match signa., of if there is a
signal when there should be no...