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PCBD-Oct2017

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12 The PCB Design Magazine • October 2017
by the I-Connect007 Team
When we began planning this issue on sig-
nal integrity, we arranged a conference call with
a variety of industry experts. Mike Steinberger
of SiSoft, Mark Thompson of Prototron Circuits,
and Yogen and Sunny Patel of Candor Indus-
tries joined editors Andy Shaughnessy, Patty
Goldman, Happy Holden and Publisher Barry
Matties on the call for a spirited discussion
about the challenges related to signal integrity
and some of the tricks of the trade for helping
ensure SI.
From the Front End
Steinberger began by sharing two issues he's
been studying, one large and one small. "The
large point is in the analysis of error-correcting
code performance on high-speed serial chan-
nels. When you look at the drive toward PAM4,
it is absolutely essential that you bring error-
correcting codes along. The fact of the matter
is that, when you have a fair amount of mar-
gin, NRZ does better than PAM4; but when you
start reducing the margin, the PAM4 bit error
rate doesn't degrade as quickly as the NRZ bit
error rate degrades. So when you're starting to
get the minimum amounts of margin, then FEC
is the way to go. But it's FEC operating in a con-
dition where it's got a relatively high error rate.
So error-correcting codes come as an essential
technology along with PAM4.
"But I think that the benefits of error-cor-
recting codes have been oversold, in that the
performance analyses for error-correcting codes
have been based on assumptions that are ap-
propriate for radio channels, like where you
have a lot of added noise—so a satellite chan-
nel or something like that. Therefore, the errors
are completely uncorrelated. On high-speed
serial channels, the errors are more correlated
than that, and people have not done the per-
formance estimate while taking this correlation
of errors into account. I did some simulations
and was able demonstrate that the correlation
of errors is due to the inter-symbol interference.
FEATURE