Developing code for SIMD type hardware architectures is a tedious job. This is caused by the absence of both a coherent methodological framework and a hardware independent tooling. Moreover, the inherently difficult nature of programming dedicated massively parallel embedded processors, complicates the matter. This paper describes a single framework, called IRIS, to generate code for SIMD architectures. This framework is illustrated with a concrete case ”Stochastic Image Quantisation”. IRIS is based on an incremental construction of executable representations, which converge to the final target implementation in a semi-automated way.