The two-day Workshop will feature more than 40 presentations from
RISC-V Foundation members

ZURICH — (BUSINESS WIRE) — April 30, 2019 —
RISC-V Foundation:

WHERE: ETH Zurich, Gloriastrasse 35, CH 8092 Zurich, Switzerland

WHEN: Tuesday, June 11 to Thursday, June 13, 2019

WHAT: The RISC-V Workshop Zurich will showcase the open,
expansive and international RISC-V ecosystem. The event will highlight
current and prospective projects and implementations that influence the
future evolution of the free and open RISC-V instruction set
architecture (ISA), with a focus on the momentum and growth of the
RISC-V Foundation across Europe and beyond.

The event will feature two full days of presentations and updates on the
RISC-V architecture, commercial and open-source implementations,
software and silicon, vectors and security, applications and
accelerators, simulation infrastructure and much more. RISC-V Foundation
members presenting at the Workshop include: AdaCore, CEA, CloudBEAR,
Dover Microsystems, Draper Labs, Embecosm, ETH Zurich, Hex Five
Security, Huawei, Microchip Technology, OneSpin Solutions, Princeton
University, Qamcom Research & Technology, Rambus, SiFive, Syntacore and
Western Digital. The third day of the event will feature meetings for
RISC-V Foundation members.

Tuesday, June 11, 2019:

Guiding the Future of RISC-V

When: 9:00 – 09:15 CEST

Who: Calista Redmond, RISC-V Foundation

Energy Efficient Computing from Exascale to MicroWatts: The RISC-V
Playground