3.3 What is an R-2R DAC?

Hello, and welcome to the Texas Instruments overview of architectures of precision DACs. In this presentation, we will cover the R-2R DAC, including basic architecture, common specification ranges, and a look at the advantages and disadvantages of designing with one.
The R-2R DAC is a more complex method of realizing a R-2R than, for instance, a string DAC. The chief benefit of the R-2R DAC is that the number of resistors required to realize the design is much fewer than the string DAC. We only need 1R and 2R pair for each bit of resolution.
An intuitive way to consider the R-2R DAC is as a binary weighted voltage divider. The 2R leg in parallel with each R resistor in series creates this binary weight. As a result, we only need one switch for each bit of resolution. The switch is either connected to ground or to the reference voltage. In a moment, we will get into more detail on the binary weighting.
Because of fewer resistors being present in the design, more complex trimming techniques can be employed, which leads to improved linearity. Mismatches in the resistors at the LSBs of the converter do not necessarily need to be matched as well, since their impact is lessened by the binary weighted nature of the divider.
If we examine the R-2R topology, it should be noticed that looking into the reference node of an R-2R DAC exhibits a dynamic input impedance. If you observe the switches for each R-2R leg, you will notice that they are either switched into the reference node or to the ground node, hence, a dynamic input impedance related to code. Generally, it is undesirable for a reference source to see a dynamic change in impedance because it requires time for the reference voltage to settle to the new impedance.
If the application calls for rapid cycling through codes, there may not be time to wait while the reference settles with each transition. For that reason, it is highly recommended that any R-2R DAC application includes a reference buffer. Some R-2R DACs may have a built-in buffer to help drive the reference. You can find out if your DAC does have one by looking at the input current to the reference pin. If it changes on a code to code basis, there is no reference buffer.
The mechanics of the switches in the R-2R DAC lead to higher glitch potential over some code transitions. In the case that a single bit in the latter changes, the glitch energy is comparable to the glitch energy seen in the string DAC. However, as code transitions induce change in more bits, glitch energy will be heightened.
Another contributor to higher glitch energy is the Break-before-Make switching present in the R-2R switches, implemented to avoid momentarily shorting the reference to ground. This instantaneous switching leads to higher glitch energy as a result of parasitic capacitance and inductance present in the circuit.
Now let's develop an understanding of the R-2R ladder and how binary weighting works. We will use the concepts of Thevenin equivalence and superposition to accomplish this. As we said before, applying the reference voltage to an arm will contribute a voltage to the DAC output. Let's take an example of the 3-bit R-2R ladder and apply Thevenin equivalent circuits to learn the voltage contribution of each arm.
First, let's start with a contribution from the V1. All other voltage sources other than V1 are shorted to ground as part of the superposition process. We know that the equivalent resistance looking back into the ladder from any point in the ladder is 2R, something you can prove as an exercise. For now, we will use that assumption to calculate the voltage contribution at the output as V1/2 as evidenced by the simple resistor divider created by the equivalent resistance looking back into the ladder.
Next, we will look at the contribution for V2. Again, we know that looking backwards into the ladder will show resistance of 2R, so we can immediately redraw the circuit to include this. Now, we will create a cut line where we will add the Thevenin equivalent circuit, which is a voltage source of V/2 and a resistor of R. This R gets combined with the R now in series in the ladder to give this new circuit. Again, we see the simple resistor divider would be VOUT. We now see that the contribution of the second arm to the output voltage is V2/4.
Finally, we'll look at the last arm's contribution, applying all the methods we've used so far. First, we make a cut line to insert a Thevenin equivalent circuit at Node 3 and combine the resulting resistor with the one in the ladder. Now, we will repeat this process by making another cut line, replacing with the Thevenin equivalent, and combining the resistors. Notice now that the equivalent voltage has become V3/4. Finally, we see the simple voltage divider at VOUT for a contribution V3/8. Now, you begin to see the pattern develop. By superposition, the arm at the MSB contributes a voltage of V1/2, the next arm contributes V2/4, and the final arm contributes V3/8.
Consider that in an R-2R ladder, when a bit of the code is set to 1, the corresponding switch in the ladder provides the reference voltage at that arm. Conversely, for a bit set to 0, the ladder is connected to ground.
We can then develop an equation for the ladder based on the reference voltage and the individual bits in the DAC code. If you extend this out to N number of arms in the resistor ladder, you get this equation.
In the example that we've shown here, with a 3-bit DAC set to code 101, we can apply the equation we've just developed. Notice the position of the switches where the blue switch is tied to ground and the red switches are tied to VREF. Putting this into the equation, the DAC output will be 5/8 of the reference voltage. This is exactly what we would expect the output voltage to be for binary code 101 in a 3-bit DAC.
Next, let's look at some common DC characteristics of an R-2R DAC. Here, we will use DAC9881, in 18-bit buffered output DAC, as an example. The DNL of DAC9881 is typically plus or minus 1/2 an LSB with a max of 1. The INL is typically 1 with a max of 2. You can see the strong linearity characteristics here, as architectures like the string DAC would have a very difficult time achieving this level of linearity at 16-bit resolution, let alone 18-bit.
The 0 code and gain errors are dependent almost entirely on the output amplifier that follows the resistor ladder. Keep in mind that the amplifier specs will change from device to device. Some R-2R DACs will not include an output amplifier, so these errors may be even less significant on those devices.
Now, we can look at the common AC specs for an R-2R DAC. Again, we will look at DAC9881. Settling time is fast, even if there are some that are faster. The slew rate of the amplifier will make a contribution to the settling time, especially if the settling range is specified across a very wide voltage range. Even if the resistor ladder itself is very fast, the output amplifier could drastically slow the settling time. DAC architectures that would be faster include unbuffered R-2Rs and MDACs, both of which don't include an output amplifier.
Glitch can become very high on R-2R DACs, due to the number of switches switching between code transitions. Here, we can see that the glitch changes depending on the reference voltage and what gain the output amplifier is set to.
Lastly, noise specs are middle of the road. The ladder resistance contributes to this noise, along with the existence and architecture of an output amplifier.
The strongest benefit of an R-2R DAC architecture is the high performance linearity due to strong resistor matching and the inherent benefits of the binary weighted parallel ladder structure. The equivalent impedance of the resistor ladder is typically lower than that of the string DAC impedance, and therefore, the DAC shows lower noise figures. Generally speaking, the R-2R DAC shows medium settling time when compared to the string DAC and MDAC.
One disadvantage of the R-2R DAC is the co-dependant loading on the reference. For cases where the DAC will be updated with great frequency, a buffer for the reference input may be necessary to improve reference settling time.
The strongest disadvantage of the R-2R DAC is the heightened glitch energy created as a result of the higher number of moving switches and Make-before-Break connection scheme. The switch is moving between VREF and ground versus different voltage potentials in the string DAC leads to longer settling time for the R-2R DAC. Internal design forces the output buffer to have a wide common mode voltage range, which will tend to make the device more expensive and provide some degradations to linearity.
Thank you for watching this video on the R-2R architecture of precision DACs. Please watch our other videos on precision DACs to learn more.

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Date:
April 4, 2016

This video explains the R-2R precision DAC architecture, starting with an overview of the architecture, followed by a circuit analysis of the DAC internals and a look at common specs for R-2R architecture DACs.

For more information on this architecture, check out the DAC Essentials blog series post on the resistor ladder.