The world cell phones market experienced a steady growth in latest years, driven by the increasing number of applications available on smartphones, tablet computers and PDAs. Today's portable devices integrate multiple communication capabilities with ever-increasing data transfer rates. In this scenario, the implementation of single-chip radio transceivers capable of operating over multiple standards is of great interest. The need for a higher integration level to reduce board size and cost led CMOS processes to fast become the technology of choice in RFIC development. However, to take full advantage of the switching characteristics of MOS transistors in CMOS, a digital approach started to be adopted in the RFIC design. On the contrary, the analog section of transceivers must cope with the limitations imposed by the adoption of scaled CMOS processes, for example the large flicker noise corner frequencies. In this context, the design of local oscillators (LOs) for signal (de)modu-lation is becoming a highly-demanding task. This is due to the need of oscillators with an increasingly-broad tuning range to comply with different radio-communication standards. In the traditional design approach, however, this generally leads to a non-optimum sizing of the active devices of the oscillators. This further exacerbates the impact of flicker noise, eventually resulting into unacceptable phase noise performances. The main purpose of this doctoral thesis is to provide a detailed quantitative analysis of the flicker noise up-conversion mechanisms, filling the gap towards a complete understanding of this phenomenon. In particular, it will be shown that harmonic distortion is the major 1/f^3 phase noise source in voltage-biased oscillator topologies, while the modulation of parasitics is the dominant effect in the current-biased counterparts. A detailed analysis is carried out in the framework of the so-called impulse sensitivity function. Basing on theoretical results, several techniques to mitigate or suppress the flicker noise up-conversion are presented, together with measurements results carried out on three different test chips which confirm the validity of the proposed analyses. Furthermore, a new accurate simulation technique to compute the impulse sensitivity function in oscillators is presented, which is easier and faster to be implemented with respect to the traditional method.