AWR InsightsJust another EDA Blogs weblog2018-01-26T18:44:58Zhttps://www10.edacafe.com/blogs/awr/feed/atom/WordPressDavid Vyehttps://www10.edacafe.com/blogs/awr/?p=2322018-01-26T18:44:58Z2018-01-22T18:53:43ZNI and our customers spend considerable time and effort deep in the development of technology that will enable next-generation communications. We have been working on 5G technology for several years now—long before the general public will experience its amazing capabilities. However, it is worth noting that we and a global audience will be treated to a first look at 5G in February with the Winter Olympics in PyeongChang, South Korea.

In addition to the athletic competition, this event will provide one of the first large-scale demonstrations of next-generation wireless media access thanks to 5G. Collaborators Intel and Korea Telecom (KT), with support from global equipment makers and chipmakers such as Samsung, LG, Nokia, Ericsson, ZTE, Qualcomm, Huawei, and others, will showcase select services to enhance the viewing experience with special networks set up in Gangneung Olympic Park, Gwanghwamoon, Seoul, and at other Olympic venues across Korea.

In its 5G service trials for the Winter Olympics, KT has been targeting a number of innovative telecommunication experiences such as interactive time-slicing (synthesized) images for purpose-built smartphones and tablets. The key 5G-based integrated services will provide ultra-real view services (first demonstrated in February 2016), with features that include:

Sync View – Transmits super-high-quality video in real time using an ultra-small camera, position sensor, and mobile communication module, enabling viewers to watch the games from the perspective of the players.

Interactive Time Slice – All 100 cameras installed at different angles will shoot what’s happening, letting viewers interactively choose the screen and angle they want to watch.

360° VR Live – Events will be captured and streamed by 360-degree cameras and using head-mounted display (HMD) equipment that offers virtual reality (VR) live views of virtually every place in the arena.

Omni Point View – Presents the event in virtual 3D space, enabling spectators to enjoy 3D virtual view from the perspectives of the player of their choice or at specific points they want on mobile devices in real time.

These features will provide the world with a first glimpse into the capabilities enabled by 5G breakthroughs. Interactive view-slicing viewing will allow users to zoom in on skaters in the indoor arena and rotate the image similar to visual effects encountered in movies such as The Matrix. To enable this feature, servers will pull images from a hundred cameras lining the arena, reconstituting them in real time to create a customizable view for each subscriber. The ability to spin a skater through 360 degrees in high definition requires that the system be able to deliver 400 megabytes per second, according to HongBeom Jeon, executive vice president at Korea Telecom1.

On the ski courses, the omni point system will let viewers track the progress of competitors with skiers wearing a GPS receiver to pass their location live to the KT servers. The GPS information will be synchronized with images pulled from cameras around the course and the servers will then synthesize the view seen by the competitors in real-time. KT has fitted the cameras with wireless transceivers to connect them in real time, pushing the low latency requirements called for in the 5G specification.

Other events will also provide an immersive user experience with a live view such as that of the bobsled course as any given team races through the turns, thanks to wireless cameras located in the bobsled cockpit. “Given that bobsleds travel at very fast speeds of up to 153 kilometers per hour, it is often difficult to connect them to a wireless network. However, KT has developed a new network frame suitable for fast speed environments,” remarked a company official.

Figure 1. Oh Sung-mok, vice president of KT’s network division, introduces new services running on 5G networks during a press conference in Seoul.

In addition, 5G technology will support drones equipped with video cameras. During a technical trial last September, images were sent from the top of a ski jump tower, and on the subsequent route, down to ground level, providing an alternative method to capture the athlete’s point of view and beyond. 5G and drones are also teaming up for autonomous drone delivery services.

Other 5G-enabled experiences include the mixed-reality (MR) Olympic torch relay and VR walkthrough. With mobile communications, the Olympic flame lit in Greece will travel to Pyeongchang via mobile phone as a virtual image, then on to a real torch, and then back to another torchbearer in the virtual space.

In an earlier limited test, KT engineers deployed three base stations in the center of Seoul that communicated with buses fitted with 28 GHz transceivers for autonomous driving. Of the three sites, two non-mobile cell sites supported 4-sector and 2-sector, respectively, while the third mobile site was equipped with a 5G base station and antenna that supported 2-sector. The bus was equipped with 5G devices by Samsung and Ericsson. The 5G base station and devices used an operating frequency band of 28 GHz capable of supporting maximum data rates of up to 20 Gbps per cell and 3.2 Gbps per device.

Figure 2. KT 5G autonomous driving bus.

Following the success of this test, KT has installed the equipment at Daegwallyeong Tunnels, which consists of six tunnels along Expressway 50, in order to provide services for drivers starting in February 2018. Visitors to the games can use the telecom operator’s self-driving 5G bus to move between skiing events around the resort. The bus will have screens inside to display the multimedia demonstrations, some using 3D display technologies.
Achieving this capability remains a challenge. Even with the three base stations arranged around Seoul’s central boulevard, KT found the signal strength to and from the bus varied much more than with LTE, with the biggest drops often occurring as the bus turned a corner. This represents one of the major obstacles of implementing 5G and its use of millimeter-wave (mmWave) spectrum in the real world. For the development of the new 5G systems operating up to 100 GHz, there is a need for accurate radio propagation models, an area that NI AWR Design Environment, specifically Visual System Simulator™ (VSS) addresses with channel models that are continually being enhanced to keep pace with the latest advances in technology.
Antenna system directivity of high-frequency communications has a key advantage for mobile operators when it comes to delivering gigabits per second to many users in a cell. With beam steering, a base station can direct more energy at individual users instead of dividing up transmissions into tiny packets that are allocated in round-robin fashion to receivers. But beamforming and other techniques such as Massive multiple-in-multiple-out (MIMO) rely on multiple antennas and the application of high-performance digital signal processing (DSP). Due to reflections from buildings in an urban environment, it is not possible to serve multiple users continuously with a single base station.
This is where densification of the network will come into play. Base-stations will need to cooperate so that if there is no path to a user, another one that is in range can take over. Another challenge with RF communications in the mmWave spectrum is that the waves propagate more like optical energy than radio waves. If the energy is sent in the wrong direction, the receiver will receive practically nothing. Seoul will be a great proving ground for working out these issues on a grand scale.
KT executives have publicly discussed their 5G deployment plans, which will initially make use of 28 GHz for hotspot urban and 3.5 GHz for urban and rural areas. Through the utilization of these spectrum, KT will be in a position to cover a wide range of use cases such as 4 K/8 K cameras, remote medical services, drones, and public service during the Games. Deployment will be expanded to support smart cities, smart factories, and other new infrastructure projects in the near future. Tech specialists at the Boston Consulting Group estimated in a recent report that mobile companies would have to spend $4 trillion (3.6 trillion euros) on research and investments by 2020 to develop 5G. South Korea alone has invested $1.6 billion aiming to commercialize 5G technology by 2020, according to the GSMA.3

One advantage operators have in deploying 5G early is the potential to use mmWave spectrum to support the infrastructure needed to deploy smaller, lower frequency base stations into dense urban areas more economically. The self-backhaul approach feeds data received on sub-6 GHz bands onto broadband mmWave links between base stations. This overcomes the problem that early mmWave systems are likely to have in dealing with mobile users and eliminates the costly need to lay down fiber networks for backhaul support of a network containing a high number of base stations.

Figure 3. Evolving technologies that will support future 5G networks.

We will be discussing more about this topic and related features in the next NI AWR Design Environment product release and in future technical articles, white papers, workshops, and webinars throughout 2018. In the meantime, learn more about 5G communications design through our recent articles on 5G power amplifier design, 5G filter design, mmWave phased-array automobile radar, and simulation of system metrics for 5G—all available in the NI AWR software resource library.

]]>0Sherry Hesshttp://www.awrcorp.comhttp://www10.edacafe.com/blogs/awr/?p=2182013-06-21T21:09:45Z2013-06-17T15:04:27ZWhen I first learned of NI’s Redefining campaign, I thought… yes, makes perfect sense and fits AWR extremely well. Our company was founded almost 20 years ago on the very idea of redefining design for microwave/RF engineers. We began this mission with the release of our flagship product, Microwave Office®, and have continued our tradition of innovation as the first with a Microsoft Office look and feel, the first to fully embrace the PC as the preferred platform, the first to open our environment to third-party vendor tools through our EM Socket™ interface, the first to offer the eye-catching real-time tuning feature…yup… AWR has been constantly evolving and redefining design with every new technology, product, and partner announcement.

If you look at our innovation timeline (snapshot below), you can see for yourself how we continually work to redefine the tools and technologies our customers require, request, and enjoy and that enable them to achieve design success by first virtually prototyping their MMICs, RF PCBs, RFICs, microwave modules, communication systems, radar systems, antennas, and more.

So this year as we embrace our parent company’s redefining campaign, we want to clearly say, “Hear, hear, we agree and support redefining design in all that we do—past, present and future.” Take a look at Analyst™, which has already begun to redefine the design flow for 3D FEM EM analysis by enabling users to move away from disparate point tools to analysis so seamlessly integrated within Microwave Office circuit design that it effectively makes EM a one-click option. Take a look at our forthcoming Visual System Simulator™ (VSS) software release with 802.11ac IP that’s been modularized so it lends itself not only to use within VSS but also within NI’s PXI hardware and LabVIEW software. Take a look at our many AWR Connected™ partners to see how our openness philosophy continues on today, providing our customers with a design flow and eco-system that is flexible and open to better satisfy their ever changing and challenging design needs.

Redefine, transform, evolve…whatever terminology you prefer, see how we do it so that you can as well, and how AWR software helps you stay ahead of the curve in this rapidly changing, high-tech world in which we live.

Nanjing University of Aeronautics and Astronautics (NUAA) is one of China’s premier learning and research institutions and has developed into a comprehensive university especially focused on aerospace engineering. Established in 1952, NUAA strives to provide a world-level research and education system for its 24,600 students, 600 of who are international students from over 30 countries.

THE DESIGN CHALLENGE

NUAA was searching for a more user-friendly, integrated alternative to the current set of high-frequency design tools used in the classroom. To objectively evaluate AWR’s Microwave Office® RF and microwave design software, the university chose to redesign an existing compact and high selectivity dual-band, dual-mode bandpass filter for GPS and WLAN applications. The filter was designed using a short, stub-loaded folded resonator with source load coupling. The 3dB fractional bandwidths of the two passbands were about 3.4 percent at 1.57GHz and 9.9 percent at 5.2GHz. Because there was interference between the main signal path and the folded arms of the resonator, it was necessary to generate five transmission zeros near the passband edges and in the upper stopband in order to improve the frequency selectivity and stopband performance.

THE AWR SOLUTION

AWR’s Microwave Office software’s advantages as they pertain to this design include both its integrated design environment and its ease-of-use. The filter design was implemented using AWR’s unique electromagnetic (EM) based X-model transmission line models (Figure 1). In contrast to conventional models, these highly accurate circuit models provide both electrical model and physical layout representation and yield fast simulation results that are as accurate as full EM simulation. Therefore, as soon as the filter schematic was drawn, the layout was readily available for EM verification and to send off for PCB fabrication.

Figure 1: Schematic and layout of the filter, composed of Microwave Office elements readily found within its components library.

Because the circuit model was simulated instantaneously, parameter tuning and preliminary optimization of the filter were straightforward. At the back end of the design flow, the layout was sent to AWR’s AXIEM® 3D EM simulator directly from the schematic – no geometry redraw was needed for the EM simulation (Figure 2).

Figure 2: AXIEM layout of the filter.

A parameterized full EM model was used in interpolation mode to enable fast offline execution of statistical analysis with full EM accuracy.

Following this methodology, NUAA was then able to do extensive yield sensitivity studies of PCB substrate dielectric constant (Er), board thickness (H), and geometric properties related to manufacturing tolerances. The design team discovered that the design was critically sensitive to variations in Er, which must be controlled within 0.1 percent and H within 20 μm for perfect yield. In contrast, the design was not very sensitive to geometry variations within regular processing tolerances (Figures 3 and 4).

NUAA appreciated the flexible methodology that the AWR Design Environment™ enabled. The ability to seamlessly switch between circuit and full EM simulation models at various stages of the design resulted in an efficient, robust, and user-error resilient design process. The evaluation proved that the measured results agreed extremely well with the AWR results, in particular the AXIEM EM simulated results (Figure 5).

]]>0Sherry Hesshttp://www.awrcorp.comhttp://www10.edacafe.com/blogs/awr/?p=1962013-05-06T19:54:49Z2013-05-01T20:33:53ZI recently agreed to co-chair the IEEE MTT-S Women in Engineering (WIE) / Women in Microwaves (WIM) organization. I have long been an advocate for advancing the cause of women in the world of RF and microwave engineering, actually back to my college days at Carnegie Mellon University (CMU) when I was one of only eight women in my EE graduating class of 110. Things have not improved much since then with women representing only 10 percent of IEEE WIE membership in the U.S. today. Asia and Europe fare far better with approximately 40 percent and 20 percent respectively.

Why do we care about this? Women are a key demographic in any market and a valuable resource to our “dwindling pool of resources” within our chosen profession. We need more engineers of either gender and diversity in terms of more women in our field will certainly add a different perspective to ideas and insights, as it’s true that not all minds think alike.

One of the first things any of us can do to contribute to this is to promote awareness. We need to find new and novels ways to encourage women to elect engineering as their career choice. I spoke recently with former WIE Chair Karen Panetta, who helped me clarify that we need to tap into the “wonderment” of our career choice and make it desirable to the younger generations. One way to do that is to highlight not only the successful women in our high-tech field like Yahoo CEO Marissa Mayer or Facebook COO Sheryl Sandberg, but also to talk about how our profession is what empowers the wireless revolution to take hold and thrive. Watching my kids text, chat and clamor for free WiFi access brings home to me how all of this technology—from products to infrastructure—is largely thanks to microwave theory and techniques.

My co-chair and esteemed colleague Dr. Rashuanda Henderson and I are already formulating plans for improving awareness, communications, and a sense of camaraderie. To that end, please make a point to support WIM by stopping by the reception at IMS 2013, Tuesday night from 6-9 p.m. at the Seattle Space Needle, Level 100!

Men and women alike, come by to say hello, share your ideas and become an advocate for WIM.

]]>0Sherry Hesshttp://www.awrcorp.comhttp://www10.edacafe.com/blogs/awr/?p=1872013-06-18T21:15:40Z2013-03-06T16:38:37ZGiven the recent fiscal cliff and the spending cut countdown, I’m wondering how many of you think this blog will be about our dwindling wallets and discretionary dollars? But alas, not so. This is about the emergence of the electronic wallet or rather the underlying technology that’s making it a reality…

Back in August, Time Magazine ran an article titled, “Bye Bye Wallet” written by Harry McCracken, who bravely spent (or rather attempted to spend) a weekend using nothing more than his Google Wallet. What I liked about this piece (in addition to the humor) was that within the first two paragraphs, he was talking about NFC – near field communication – technology that is enabling this trend.

For those of you not yet familiar with electronic wallet technology, Google Wallet requires a special chip in your phone, available at present on just a few Android models. You pay by simply tapping your phone on a credit-card reader equipped with NFC technology. NFC is being developed as a form of contactless communication between wireless devices like smartphones and tablets. It enables users to communicate with other NFC-compatible devices to share information instantly without any setup or physical connection. And of course, for these NFC-enabled devices to work properly, the antenna systems are a critical component.

As the world continues to become more and more connected via wireless technology, I’m finding it easier and easier to explain to others what my own company does and how it directly impacts their lives. And to see NFC within the first two paragraphs of a Time magazine article….surely did put a smile on my face that perhaps the day will soon be here when trying to explain what AWR software does is as simple as, “we help engineers to design the wireless products that you love so much!”

The X-band frequency range has been designated for critical military and public safety applications such as satellite communications, radar, terrestrial communications and networking, and space communications. It is important to ensure that these signals deliver quality, reliable, and secure communications. This application note describes the design and realization of a complex X-band transmission analyzer for use in real-time material testing.

The purpose of this analyzer is to gather complex-valued X-band transmission coefficients at high update rates of greater than 100,000 measurements per second. This note describes how manufacturing costs were minimized by integrating the many RF components in the device onto a single printed circuit board (PCB), how coupling issues between the RX and TX paths caused by the requirement for high dynamic range were addressed, and how EM simulator based tuning was used for the numerous distributed elements on the board to ensure optimal performance.

THE DESIGN FLOW

The design team at the Vienna University of Technology was tasked with designing from scratch and realizing this X-band transmission analyzer . The design ﬂow involved the design and optimization of several breeds of circuits, including critical elements such as bias-T and microstrip ﬁlters, all of which were designed using AWR’s circuit, system, and EM analysis software within the single, integrated AWR Design Environment™.

The PCB layout was done entirely within AWR’s Microwave Ofﬁce® circuit design software. Additionally, AWR’s Visual System Simulator™ (VSS) communication system design software was used to ﬁnd an optimal RX chain and to estimate the phase locked loop’s (PLL) phase noise properties. The PLL’s loop ﬁlter characteristics were optimized using the exact same schematic that was also used for carrying out the PCB layout. Finally, AWR’s AXIEM® 3D planar EM software was utilized for simulating the varied distributed element circuits, as well as to tackle shielding issues in the ﬁnal PCB design.(Figure 1 shows all relevant RF-circuits that were investigated during this project in order to design the resulting ﬁnal, outstanding overall system.)

Figure 1. PCB topologies investigated during the design flow.

Because all AWR’s technologies are integrated into a single design environment, the team was able to easily reuse structures and circuits from system models down to PCB layout structures. For example, EM simulations of the actual PCB traces could be checked against VSS models to see whether the designed shielding was sufﬁ cient. This approach enabled the designers to reuse highly optimized sub circuits in the ﬁ nal PCB design (Figures 2 and 3).

Microwave Ofﬁce software enables users to readily tune circuits based upon EM simulations. In this case, the design required that the X-band RF link, the high-speed serial bus, and the DC power supply be combined onto the same cable, thus requiring a bias-T for each and every X-band cable interface.

Figure 3. Final manufactured prototype.

In order to reduce assembly complexity and manufacturing costs, the circuit was realized using distributed elements. A classic radial stub approach was determined to be the best, considering tradeoffs between PCB real estate, circuit performance, and board complexity. For reasons emerging from signal post-processing, two different-sized radial stubs were used to ensure that the circuit would perform consistently over about 30 percent bandwidth (Figure 4). Using two unequal stubs made it possible to achieve constant low RF leakage over a broad frequency range, however, this architecture was more challenging to design because placing resonant structures in close proximity resulted in significant coupling effects. Typically this is less of a problem when dealing with multiple structures, all operating at the same frequency. Yet in this case, the coupling effects tended to disrupt the phase relations if not all length ratios were close to optimum.

Figure 4. Bias-T dimensions.

It was clear to the team that this issue could not be resolved using closed form approximations or simple models. For this reason, AXIEM and the Microwave Ofﬁce optimizers were the weapons of choice. Numerous runs were necessary to ﬁ nd a proper solution and to answer questions like “what’s the required clearance to the surrounding ground?” In the end, the same circuit was reused several times within the overall design without any issues.

The inner workings of the circuit could be understood using the current density derived by AXIEM (Figure 5).

Figure 5. Bias-T standing wave current density.

The current density’s maximum, which is equal to the phase center of the RF reﬂ ect, shifted with respect to the excitation frequency. This resulted in a frequency-independent virtual RF open exactly at the branch line intersection with the RF path. This was observed as current density minimum at this position. Therefore, the branch line was virtually “invisible” for the RF signal. All the RF leakage measurements as well as the simulations were combined, as shown in Figure 6. The ﬁnal circuit indeed shows the desired ﬂ at frequency response in leakage over a broad band and at constant low leakage.

Figure 6. Measured data vs. simulation.

THE MICROSTRIP FILTER

The microstrip ﬁlter design was carried out by deriving an equivalent lumped circuit from the design’s speciﬁ cations. This representation can easily be reformulated in terms of characteristic impedances, which is the starting point for any distributed ﬁlter design. After that, it is up to the designer to choose a transmission line topology that 1) can realize all the desired impedances, 2) enables a compact setup, and 3) can be manufactured with an available PCB process. In this situation, the Microwave Ofﬁce software environment assisted the design team with various tools like TX-Line® and simple transmission line models available for many topologies. It further enabled the designers to quickly gauge whether a certain substrate, topology, and tolerance mix could work. These decisions are critical to the overall success of the design and must be carefully considered.

Figure 7. X-band filters (standing wave current density).

The challenge with designing the microstrip ﬁ lter for this project was that the substrate needed to be quite thin in order to achieve a compact design in a 50Ω microstrip stack up. It was also problematic for the PCB manufacturer to deal with very narrow coupling gaps. The design team needed to ﬁnd an alternative to the classic edge-coupled microstrip design. The resultant design utilized two lines with higher characteristic impedance in parallel instead of a single line, which resulted in a larger range of achievable characteristic impedances. Figure 7 shows the two ﬁ lters in stop-band and pass-band excitation. Even though the design was complex due to the extensive use of circuit parameters, the simulation power as well as the hierarchical design capabilities of the Microwave Ofﬁ ce software made it possible to run the same optimization routines on both circuits. This not only reduced the design team’s time and effort, but also meant that the two blocks were exchangeable in the ﬁnal design.

Figure 8a. final prototype of the X-band transmission analyzer (outside).

CONCLUSION

This application note illustrates a complete design flow for the end-to-end design and realization of an X-band transmission analyzer. The ability to not only design and optimize several different circuits on a single PCB but also to work through many design iterations and verification steps at different abstraction layers was critical to achieving the project’s ambitious performance goals. Keeping design changes and parameter variations consistent through all abstraction layers was a challenging task that was made possible and ultimately successful with the help of the AWR Design Environment that offered complete integration of all the constituent design and verification steps.

Figure 8b. Final prototype of the X0band transmission analyzer (inside).

3D electromagnetic (EM) simulators are commonly used to help design board-to-chip transitions. AWR now makes life easier for circuit designers with the introduction of Analyst, a full featured, 3D EM finite element method (FEM) simulator. The key advantage of Analyst™ over other available 3D simulators is its tight integration within the Microwave Office® design environment, AWR’s circuit design and simulation platform. This application note highlights the unique features of Analyst by demonstrating the optimization of the transition from a board-to- -chip signal path. The example shows how the ability to access Analyst from within in the Microwave Office environment saves designers time and provides ready access to powerful layout and simulation tools that are not available in typical circuit design tools.

Analyst simplifies layout setup and drawing by offering preconfigured 3D parametric cells (Pcells) for the bond wires and ball grid arrays (BGAs). Hierarchy is supported in the EM layout, enabling easier reuse of designs. Tuning, optimization, and sensitivity and yield analysis can be quickly implemented through the use of parameterized layout, without having to leave the Microwave Office environment. Since Analyst is optimized for RF designers with automatic simulation settings for typical technologies, users usually do not need to go into the simulation settings of the software. Designers can now concentrate on their design, easily using 3D EM simulation when needed, without having to spend time learning a complicated third product tool. Indeed, if they already use AXIEM®, AWR’s planar EM simulation tool, they will find Analyst looks almost the same. The learning curve for making effective designs is therefore very short.

A BOARD-TO-CHIP TRANSITION

Figure 1 shows the board, module, and periphery of the chip being investigated. The signal goes from Port 1 on a trace on a PC board onto a module by means of a BGA, along a trace on top of the module, and over to Port 2 on the chip by means of a bond wire. The design goal is to have a return loss of greater than 20dB over the frequency range of interest, 10 to 20GHz.

Figure 1: The performance of the transition from Port 1 on the board to Port 2 on the chip is under investigation.

The Analyst simulation results for the return loss associate with the layout of this initial design are shown in Figure 2. Clearly, the design goal of greater than 20dB is not being met.

Figure 2: The return loss in dB is shown from 10 to 20GHz. The design goal of greater than 20dB across the frequency is not met.

The problem can be fixed using a three-stage strategy. First, the specific area(s) causing the poor performance need to be identified. Second, the designer needs to understand why that area of the layout is electrically behaving the way it is. For example, there could be extra inductance or capacitance in that section of the layout. Third, the problem needs to be corrected by modifying the layout.

Analyst has a number of features that designers can take advantage of as the design is modified. Analyst has the ability to simulate only portions of the layout, thereby reducing problem size and increasing simulation flexibility. Simulation ports can be added where needed so that the problem area of the layout can be probed for better understanding. Because Analyst is part of the Microwave Office environment, these ports can easily be added where the designer suspects extra capacitance is necessary. The Analyst results are then inserted into a schematic, capacitors are attached to the ports, and their values tuned and optimized. Finally, the layout is tweaked to give the desired extra capacitance (or inductance). Again, only the portion of the layout of interest need be simulated. Analyst is designed to minimize the amount of setup time required for a simulation.

Let’s now look at this design process in more detail. Starting with the launch area, the designer is focused on the return loss for Port 1. Only the part of the circuit close to the signal line running from Port 1 to Port 2 is relevant. Figure 3 shows the area of interest, in which the designer has drawn a new simulation boundary. The top half of the diagram shows the simulation boundary used. The bottom half of the figure shows the 3D view after initial meshing has occurred: the mesh in the air region above the board is not shown in the interests of clarity. (Note: viewing the mesh is not required of Analyst but is shown here for users’ benefit given prior familiarity with 3D FEM EM point tools.)

Figure 3: A simulation boundary is used to reduce the size of the problem. Note that the mesh for the air region is not shown in the 3D view.

The first port appears on the edge of the boundary. Analyst treats this as a wave port, standard to all FEM simulators. Traditionally, the designer is required to go through the time-consuming step of setting up this type of port manually in a 3D EM point tool. Additionally, the designer must set up the number of modes to be analyzed and define their port impedance definitions. Because these concepts are not very familiar to the mainstream circuit designer, Analyst has been preconfigured for reasonable settings for the port for typical layouts, enabling users to focus on their design instead of worrying about tweaking the settings. In situations where the preconfigured settings are not optimal, the default settings can be changed.

The bond wire is attached to a pad on the chip. A second port is attached to the pad. Notice that it is interior to the boundary, unlike Port 1, and so Analyst automatically treats it as an internal port. In this type of port, a voltage is excited from the port to the port’s ground. (The ground is specified with a mathematical “strap” from the port to its ground. The strap can be set by the designer to go to the nearest ground plane above or below the port.) Later on, variations on this port will be shown, where the designer uses differential ports in which three ports act as a group to excite a coplanar circuit. The key point here is that it is not necessary for the designer to manually configure the port settings, a common source of error in EM simulation.

LAYOUT OF THE CIRCUIT AND HIERARCHY

A number of interesting features in the Microwave Office environment were used to aid in drawing the circuit. First, the 3D bond wires and BGA balls were never drawn by hand. Rather, preconfigured Pcells were used. A Pcell is a model element that is controlled by parameters. For example, Figure 4 shows the Pcell used for the bond wires. The cell is placed in a schematic used for EM simulation. The figure shows it between two transmission lines.

Figure 4: A bond wire is drawn using a Pcell. The Pcell is shown as a symbol in a schematic, and has a 3D layout. No manual drawing is required.

It is easy to configure the profile of the bond wire using the Pcell properties menu, and place it in the EM layout. The 3D shape is automatically drawn, another feature highlighting how Analyst is optimized for ease-of-use for RF circuit design. Pcells are available for bond wires, tapered vias, bond straps, and BGA balls, to list the most commonly used elements.

The layout was drawn using hierarchy. There are three distinct levels of layout, as shown in Figure 5.

Figure 5: The layout was constructed using hierarchy

The chip level layout shows the chip pad locations. The module level layout uses the chip layout as a sub-cell. The final top level layout uses the lower two levels of layout. There are a number of advantages to this approach. First, EM simulations can be carried out on various levels of the layout as the design progresses. For example, if a spiral inductor is simulated on its own, then the cells can be joined at a higher level to easily look at more than one spiral on the chip without any drawing, redrawing, or manual setup manipulations. Hierarchy makes it easy to organize the layout, and carry out smaller EM simulations as the design is being developed. Second, remember that there is the option of associating a layout with a schematic. With hierarchy, designers now have the flexibility of sub-circuits in schematics.

IMPROVING THE TRANSITION

Next, the designer needs to figure out what the dominant source of reflection in the launch was. The next phase of the study is to isolate this source by systematically breaking the simulation region down further by adjusting the simulation boundary. The problem naturally breaks out into three regions: the line on the board up to the BGA balls; the transition from the board through the ball and vias to the signal line on top of the module; and transition from the module to the chip with a bond wire. Figure 6 shows the three regions that were used.

Figure 5: The layout was constructed using hierarchy

The designer was careful when specifying the boundary regions to make sure the enclosed structures were reasonably well isolated from the surrounding environment. An example of the issue is shown in Figure 7, which provides the detailed layout for the BGA transition simulation.

Figure 7: Different types of ports being used where needed.

The boundary was constructed with five sides in order to avoid coupling to other sections of the circuit. It depends on the technology being used, but typically a few substrate heights of distance are adequate for this type of problem. Analyst automatically sets the boundary to be an approximate open, where an impedance boundary condition mimics a perfect absorber to first approximation. Normally, this is the natural boundary condition to use, since the goal is to isolate the simulation region from other parts of the circuit. It is possible to override the default setting, but care is needed when choosing the boundary condition. For example, if a conducting boundary is chosen, it could actually short objects together in unintended ways.

The transition in Figure 7 also illustrates another interesting feature of Analyst. The location and type of ports used can be user-modified depending upon the circumstances. In Figure 7, Port 2 is a differential type of port. The current goes into the positive part of Port 2, and comes back on the neighboring ground returns, the ports of which are labeled with -2. The designer does need to make sure the ground for the ports is the same as the ground for the real layout. For example, the differential port’s grounds are the same as that of the module, and the return ground current is therefore the same as in real layout. The designer discovered that the second and third sections of Figure 6 needed the most improvement. The next step was to determine the specific causes of the poor performance. Extra ports were placed into the Analyst, and, once simulated, the results could then be placed into a schematic and the ports used to attach circuit elements. In this case, capacitors were added. This process is particularly easy in Microwave Office, because of the tight integration between the various parts of the software. The capacitor values can be tuned and optimized. To illustrate this procedure, Figure 8 shows that the designer added two more ports to Section 3 of the layout.

Ports 3 and 4 were inserted in the two most obvious trouble areas, near the bond wire and near the ball transition. Note that Port 4 is a differential port, which is the natural type of port to use in this situation, as it mimics the actual current flow in the real circuit. The current flows out of Port 4 and returns on the two ports labeled -4. The return current is coming back on the local ground of the port. The capacitor will be placed in the schematic from Port 4 to -4. Thus, the current return and local ground are all in agreement with the real layout. Port 3 is again a differential port, with the -3 part of the port attached to the local ground of the module.

The right half of Figure 8 shows the two capacitances added across Ports 3 and 4 in the schematic. Note that the capacitors are attached to ground symbols, which in this case means the local ground of the port, i.e., the negative port. The designer was surprised to find that the problem actually improved with negative capacitance at Port 4 near the BGA balls, i.e., inductance was required. Port 3, which is next to the bond wire, needed a positive capacitance.

Figure 8: Internal ports are added so that capacitance can be added and tuned on a schematic.

To physically realize the extra capacitance near the bond wire, a variety of techniques were tried, including doubling the bond wires to reduce their inductance and narrowing the gaps between the line and the side grounds in the module. The extra inductance near the BGA balls was accomplished by adding extra loop length to the ground return on the board. The final layout is shown in Figure 9.

Figure 9: The bond wire region is modiﬁ ed by doubling the bond wires, and reducing the gap from the pad to the side grounds.

The ground vias on the board were moved away from the ground balls for increased inductance. The left diagram in the figure shows the bond wire has been doubled and shortened to reduce inductance. The gap between the bond wire pad and side grounds has been decreased to increase capacitance. The right diagram shows the ground vias on the board being moved away from the ground balls to increase the loop inductance to compensate for the ball capacitance. The line on the module near the ball was also narrowed to increase inductance.

Finally, the entire structure was simulated for verification, as shown in Figure 10. The mesh is not shown in the air region for visual clarity. The return loss meets the desired specification, being more than 20dB over the frequency range of interest.

Figure 10: The whole layout is simulated. The return loss meets the speciﬁ cation of being more than 20 dB over the desired frequency range

CONCLUSION

In this application note, AWR’s Analyst finite element method 3D EM simulator was used to optimize the return loss for a board- to-chip transition. The novel features of Analyst were leveraged to speed up the study. Portions of the layout were simulated by redefining the simulation boundary and ports, without ever needing to manually redraw the structure. Pcells for the layout of the bond wires and BGA balls were used, so that these structures did not need to be manually drawn either. By adding extra internal ports, capacitance could be added to the parts of the transition quickly, and then the values could be tuned and optimized to determine where changes were needed. The preconfigured circuit simulation features in Analyst significantly reduced development time and allows designers to spend more of their time on circuit designs/behavior and less on the nuances of using a 3D EM point tool.

]]>0Joel Kirshmanhttp://www10.edacafe.com/blogs/awr/?p=892013-02-15T15:16:45Z2013-02-14T18:41:33ZUnderstanding and correctly predicting cellular, radar, or satellite RF link performance early in the design cycle has become a key element in product success. The requirements of today’s complex, high performance wireless devices are driving designers to assess critical measurements—noise figure (NF), 1dB gain compression (P1dB), third order intermodulation distortion versus output power (IM3dBc), and signal-to-noise ratio (SNR)—long before manufacturing begins. Traditional modeling methods such as rules of thumb and spreadsheet calculations (Friis equations) give limited insight on the full performance of an RF link in next-generation wireless products. This white paper highlights the advantages of using specialized RF system simulation software to accurately predict critical metrics for wireless RF links.

Figure 1: Traditional use of the spreadsheet as a system tool.

Simulation Software—A Novel Approach
Traditionally designers have used spreadsheets (Figure 1) to do calculations such as cascaded noise figure, P1db, compression point, and/or third order intercept point of an RF link. The advantages of using a spreadsheet are two-fold: data entry is simple and spreadsheet software is readily available. As wireless devices become more and more pervasive and complex, the limitations of spreadsheets become more apparent. In other words, spreadsheet responses are based on standard equations and therefore do not typically account for mismatch between components or noise at image frequency. In addition, spreadsheets do not normally support data files such as S2p, spur tables, etc., nor do they support yield analysis or optimization—techniques that are becoming increasingly important in order to produce high performance devices at a competitive price.

Figure 2: System simulation software tools start from a spreadsheet interface and automatically generate a system diagram.

A more modern approach is to use a tool such as AWR’s Visual System Simulator™ (VSS) software to determine system specifications (Figure 2). This tool is built specifically to exceed the capabilities of the traditional spreadsheet method and offer optimization features such as budget analysis and spur analysis. With this approach, designers can start from a spreadsheet interface to define the components (mixer, amplifier, etc.), whether file- or circuit-based, go on to define the circuit measurements such as cascaded noise figure and cascaded P1db, and also automatically generate a system diagram. This method provides far greater insight into what is happening. RF behavioral, circuit-based, and file-based models are available in VSS that account for voltage standing wave ratio (VSWR) effects and frequency dependence, as well as support yield analysis and optimization.

Example 1 – Accounting for PSD at the Input of a mixer
The first example in this white paper looks at a typical design that accounts for noise power spectral density (PSD) at the input of a mixer.

As Figure 3 shows, the RF link starts with the continuous wave (CW) source, followed by the amplifier, the filter, the attenuator, and finally the conversion. Looking at the low order (LO) path, there is a CW tone, an attenuator, a model representing a cable, the amplifier, and then it goes directly into the LO. When the analysis is run in the VSS software, a significant difference in the cascaded NF can be noted between the traditional spreadsheet, which shows 4.64dB, and the specialized software, which shows 11.45dB.

What’s happening to this link that is causing the discrepancy? The math was done correctly and entered into the spreadsheet, so the expectation is that the NF should be 4.6dB. The design was built and the analysis done, but the VSS simulation does not return anything close to 4.6dB. Why? The VSS tool is much more sophisticated than a spreadsheet and has lots of capabilities and measurements, so the next step would be to try doing a further analysis of the LO link.

Figure 4: The noise density analysis of the PSD at the beginning of the link is -138.6dBm/Hz due to thermal noise.

The analysis done here is to make the PSD measurement at the very beginning of the LO link. It can be seen in Figure 4 that the PSD at the input of the mixer’s LO is -138.6dBm/Hz. This is due to the fact that there is an amplifier prior to the LO input of the mixer. When there is gain and NF in the amplifier, what does that do to thermal noise? The NF goes up, as shown in Figure 4. Typical spreadsheet equations do not account for this, so while designers can follow the book and do everything right, the VSS software tool provides greater insight on the link.

Figure 5: Upon placing a filter after the amplifier, the noise density at the input of the mixer goes down to 174dBm/Hz and the software gives the expected measurement of 4.63dB.

What’s the solution to this problem? Place a filter after the amplifier and, as shown in Figure 5, the noise density at the input of the mixer goes down to 174dBm/Hz and the software gives the expected measurement of 4.63dB.

Figure 6: The behavioral filter is replaced with an actual circuit implementation.

Example 2 – Accounting for Reflections
The second example in this white paper shows how the behavioral filter can be replaced with an actual circuit implementation (Figure 6). The analysis is done and the S-parameters examined, specifically the S11 and S21.

Figure 7: The filter’s response changes with the inductance value, and the resulting noise figure of the link fluctuates. Changes in S11 and S21 result in cascaded measurement changes.

Going down to the circuit level, what happens if a particular component level is switched or if the inductance of one of the inductors in this filter is tuned? As the S11 response in the reflection is changed, once again the impact on NF can be seen (Figure 7). The filter’s response changes with inductance value, and the resulting NF of the link fluctuates as well. Changes in S11 and S21 result in changes in cascaded measurements.

Figure 8: The desired measurement of the third order intermodulation product is IM3dBc.

Two cases have now been demonstrated where the VSS simulation tool has differentiated from the typical spreadsheet. In the first case, the PSD running through the LO path causes the NF to go up due to the higher PSD in thermal, and in the second case, tuning or optimizing on the inductance value and changing the S11 changes the NF.

The final example (Figure 8) is a little more complicated. The goal here is to measure the ratio of a third order intermodulation product to the carrier IM3dBc.

Figure 9: Spreadsheet calculation for IM3dBc versus VSS measurement.

First, the typical spreadsheet process is used to define the components, and then the system is built in the software using a budget analysis tool such as VSS RFB™ (RF Budget Analysis) (Figure 9).

Once again, it can be seen that VSS does not agree with the standard spreadsheet measurement. The spreadsheet calculation is 39.577dBm and the VSS calculation is 30.845dBm (29.9dBm – 0.945dBm). Why do the two methods differ?

Figure 10: The third order intermodulation product is measured at the output of the second mixer and compared to the spreadsheet.

Let’s look more closely. The third order intermodulation product is measured at the output of the second mixer and compared to the spreadsheet (Figure 10). In the software, the intermodulation product is -92dBm, and the spreadsheet is calculating -97dBm. Only the ratio of that tone to the third order intermodulation product is being measured. To get to -97dBm, the previous value for the third order intermodulation is -101dBm, and -105dBm has been voltage combined to get to -97dBm. The software is calculating -92dBm—what is going on?

Figure 11: The RFI signal heritage window reveals a spur that falls on the IM3 product of -99dBm in addition to the expected -105dBm.

AWR’s VSS software offers a spur analysis tool called RFI™, short for RF Inspector, which enables users to understand the contributions to a particular spur and what causes the spur to be at that particular value—indicating there is something contributing to that third order intermodulation product to make it higher than expected, something that is folding into the third order intermodulation frequency (Figure 11).

Note there are no frequencies labeled, but there is a combination of Tones A, B, C in the index of one on the first LO, the combination of Tone A minus B minus C plus the LO is causing that value of -105dBm to be -99dBm. That is what the software calculated. Something folded over into that third order intermodulation product.

Figure 12: RFI reveals the output of the filter following the first mixer, Tones C, A, and B.

So, the voltage combined -95.5dBm + -101dBm equals -92dBm. What is coming into that mixer? At this point, RFI reveals that Tones C, A, and B are combined with the LO (Figure 12), and that value fell onto the third order modulation product. So how can the combination of Tones C, A and B in the LO be removed?

The mathematics in the spreadsheet can’t tell us what to do, but VSS’s spur analysis does. It suggests that a filter be placed to eliminate unwanted tones (Figure 13).

A filter can be placed at that point to eliminate any of the Tones—A, B, or C. The LO can’t be eliminated, but once one of the tones is suppressed, the software gives exactly what the spreadsheet said: -101dBm from the previous and -106dBm from VSS. (Note: if designers are worried, they can dive into -106dBm to see what contributed to that to make a difference from the -105dBm.)

Figure 14: Spectrum plots showing the output after the additional filter is added, the output after the second mixer, and the final output of 30.47dBm minus -9.32, equaling 39.79dBm.

So once again the software was able to find the problem and offer a solution. A filter is added, two of the tones are reduced, the measurement is made, and the results are now reconciled (Figure 14).

Conclusion
Using modern software tools to determine system specifications provides much more value than using a spreadsheet as the only method. The software provides for a richer set of models, real word effects accounted for in the calculations, optimization and yield analysis, as well as in-depth spur analysis. Software tools such as VSS give designers much more accuracy and automation in determining system requirements than working exclusively with and maintaining legacy spreadsheets.

]]>0Sherry Hesshttp://www.awrcorp.comhttp://www10.edacafe.com/blogs/awr/?p=802013-02-01T17:57:52Z2013-01-31T21:15:40ZJanuary started with a bang. Three weeks of travel, which meant a lot of time sitting on planes and waiting for them. The nice thing about this is that it gives me time to let my brain wander a bit and often times come upon new and interesting ideas that I can apply at AWR. This blog isn’t about that per se, but rather the Shock and Ah! I experienced as I was catching up on my reading with a couple of interesting articles during my travel time. On my iPad Flipboard app, I stumbled across an article in IEEE Spectrum about the next generation of Lego MindStorms, MindStorm EV3, which was unveiled at the recent Consumer Electronics Show in Las Vegas.

Lego Mindstorms is a collection combining Lego’s classic building blocks with programmable microcomputers that bring Lego creations to life. It talks about how this new toy, which has an EV3 intelligent brick, lets the builder program the robots without using a computer and that it is making robotics fun and fascinating for all ages. What attracted me to it outside of my own love for Legos is that National Instruments, AWR’s parent company, is a key technology provider of this product—the intuitive software platform for EV3 is based on NI’s LabVIEW graphical programming software. LabVIEW is the same software that powers some of the greatest innovations in the world and is already plug-n-play within the AWR Design Environment™ to provide a seamless RF/microwave design and test flow. How’s that for a bit ofShock and Ah!…that’s cool.

The second article was in the Southwest Airlines Spirit Magazine. Scanning articles and photos, I was shocked to see my local Manhattan Beach, CA Marine Avenue Community Park and ah’d to read how Stanford students were taking a four-month road trip with the SparkTruck, a van full of technology gadgets, trying to make technology fun and fascinating so as to inspire the next generation of would be engineers and scientists.

My third Shock and Ah is yet to happen. It will be at DesignCon. AWR will be within the NI exhibition area footprint at the show and while I know we’ll shock plenty of the attendees with not only our joint presence but also the scale of it, we’ll be ah’ing them too with the breadth of technology (hardware, software for design & test) that we’ll be demonstrating. Please come by to learn more if you are there so we can skip the shock and just get straight to the ahs … this is really cool!

]]>0Sherry Hesshttp://www.awrcorp.comhttp://www10.edacafe.com/blogs/awr/?p=732012-11-30T23:22:36Z2012-11-29T19:10:21ZA few months ago, I heard a news program on NPR about the Khan Academy and how it was started accidentally by Mr. Khan to help his niece with her math homework. Since he lived far away from her, he captured his helpful hints via YouTube and shared via the Internet. One thing led to another and now Khan has found himself the creator of something big.

Since that NPR special, I’ve had a few chances to visit the website. There are over 3,200 videos on a wealth of subjects. I found myself touring around and clicking on things like art history, science, economics, history and even SAT prep, and getting progressively more excited by the proposition that this is a tipping point to excite kids to continue to be curious about math and science as they get older.

The Khan Academy concept reminded me of Professor Fornetti’s ExploreRF YouTube Channel, which offers training courses and webinars in RF and microwave related subjects, and of course AWR’s own AWR.TV portal. Our numerous video tutorials and vignettes are meant to accomplish the same for RF/Microwave education as Khan is for mathematics. Both aim to excite current and future users to learn more about the wealth of capabilities in AWR’s software as well as the fundamental mathematic theories it solves.

AWR continues to be committed to helping university students learn more about RF/microwave design. To that end, we recently ran a contest to see if our strategies of supporting university engineering courses, awarding free software to engineering graduates, and sponsoring the IMS and EuMW Student Design Contests were having a positive impact. We were excited to find many success stories, two of which we have recently published. One design student at Istanbul University of Technology (read the story here>>) actually taught himself how to use Microwave Office through our documentation, extensive library of examples, and, most importantly, our AWR.TV videos. His journey resulted in a low noise amplifier design that won the Turkey Graduation Design Competition and was a finalist at the IMS Student Design Competition. Another student from Vienna University of Technology (read the story here>>) was able to design an X-band transmission analyzer from end to end thanks to several master’s degree courses that offered the use of Microwave Office, as well as attentive technical support. His design won the IMS Student Design Competition. Details on both of these stories can be found in the success stories included in this newsletter.

Khan Academy and Professor Fornetti; yep, I’m a fan of these new concepts for helping a breadth of students learn remotely through innovative means such as online videos. I hope they each expand and grow in “frequency” of content and exposure. Knowledge is always something we can use more of. And I certainly intend to follow this model for AWR and hopefully help many more aspiring engineering students to become great designers in the future.