(Cat? OR feline) AND NOT dog?
Cat? W/5 behavior
(Cat? OR feline) AND traits
Cat AND charact*

This guide provides a more detailed description of the syntax that is supported along with examples.

This search box also supports the look-up of an IP.com Digital Signature (also referred to as Fingerprint); enter the 72-, 48-, or 32-character code to retrieve details of the associated file or submission.

Concept Search - What can I type?

For a concept search, you can enter phrases, sentences, or full paragraphs in English. For example, copy and paste the abstract of a patent application or paragraphs from an article.

Concept search eliminates the need for complex Boolean syntax to inform retrieval. Our Semantic Gist engine uses advanced cognitive semantic analysis to extract the meaning of data. This reduces the chances of missing valuable information, that may result from traditional keyword searching.

Publishing Venue

Related People

Abstract

A scheme is disclosed to double the amount of message bandwidth in high performance or multiprocessor systems such that the high data bandwidth can be fully utilized without the expense of two full uni-directional message and address buses. The basic idea is to sort out the messages in the system into requests and replies and accordingly, allocate a full bi-directional bus for all the requests and a very narrow but uni-directional bus for replies from the memory side.

Country

United States

Language

English (United States)

This text was extracted from an ASCII text file.

This is the abbreviated version, containing approximately
54% of the total text.

Apparatus for High Throughput Protocols in
High-Performance Computer
Systems

A scheme is
disclosed to double the amount of message bandwidth
in high performance or multiprocessor systems such that the high data
bandwidth can be fully utilized without the expense of two full
uni-directional message and address buses.
The basic idea is to sort
out the messages in the system into requests and replies and
accordingly,
allocate a full bi-directional bus for all the requests and a very
narrow but uni-directional bus for replies from the memory side.

There are
several types of messages being sent between the
components in the system, for examples, a cache miss from the on-chip
caches to the L2 caches, return of a cache miss, a
cross-interrogation (XI) check from one cache to a remote cache, and
return of data from a cache to the memory or vice versa. In order to
simplify our description, the following implementation steps are
confined to the interconnection between a processor chip (with
on-chip L1 caches) and its L2 cache only.
Extensions to other
interconnections, say between L2 caches and the memory are done in
the same way; furthermore, the L2 cache can be shared by more than
one processor. Our disclosed
interconnect structure contains the
following ingredients:
1.
Message types: There are two types of messages in the system:
request and reply. All requests between components carry an
address and a request id; the
r...