Abstract

Many techniques have been proposed to quantize a digital colour image in order to reduce the representative number of colours to be suitable for presenting on different types of display screens. In addition, the techniques have been used to significantly reduce the amount of image data required to transfer over a communication network. Most of the published techniques are targetted for implementing on a general purpose multitasking computer with low restriction on time and resource utilizations. The drawback of these techniques relies on the fact that they cannot fulfill the requirement of some applications for real-time constraint and limited resources. In addition, most of the techniques are too complex for hardware realization. In this paper, an algorithm which is more suitable for time critical applications with an additional feature of simplicity to implement on FPGA (Field Programmable Gate Array) platforms is proposed and the details of its implementation and experimentation are presented. The dominate point of the proposed algorithm relies on the fact that it utilizes the weighted sum of the nearest distance along the axis under consideration, which is nontrivial to calculate, instead of the squared Euclidean distance to find the axis to split during. Also, the proposed algorithm has proved that by reducing the number of subspaces to be considered during the variance representative value calculation from 8 to 2 subspaces, the quality of quantized images are comparable to the previously proposed approaches. This makes it possible to further speed up the computational time of the quantization algorithm.