here's a handful of possibilities;
- chip designers often seperate core vcc/gnd and io vcc/gnd nets to limit noise in the core, and to
avoid io contentions affecting the core.
- more power pins improves io signal integrity due to closer return paths for signals
- how hard would a designer kick themselves if their beautiful design failed 1st silicon due to
power supply problems?

my vote for a change to the 877 pins would be to have a single pin, or even better just the clock
pins, used for ICD / ICP

>Are you saying that we should separately bypass/isolate these AVcc and AGND
>pins?

Yes!

>Is there any Mchip reference for this or is it hard-earned experience
>talking?

It came about as a result of using a 17C756 (in which they are labelled as
AVcc/AGND) while having poor results with a '74. One day, a lightbulb went off,
and all of a sudden it worked with the new power layout. Ever since then I've
used a fixed part (separated the two power/ground systems) in the schematic
package and have not had such problems any more.

I think it's an oversight on their part NOT to tell us this. What I can't
figure is how they get a '73/76 to work well, since it's the same die as the
40-pin part just a different bonding.

I never thought of it until just now, but I wonder how much resistance is
between the two grounds and two power supply pins.

>>Are you saying that we should separately bypass/isolate these
>>AVcc and AGND pins?

>Yes!

Using isolated power and ground planes in mixed analog-digital systems is
necessary. Digital noise wastes all analog signals specially if they are
high impedance.

>>Is there any Mchip reference for this or is it hard-earned
>>experience talking?
>
>It came about as a result of using a 17C756 (in which they are
>labelled as AVcc/AGND) while having poor results with a '74.
>One day, a lightbulb went off, and all of a sudden it worked with
>the new power layout. Ever since then I've used a fixed part
>(separated the two power/ground systems) in the schematic package
>and have not had such problems any more.

Which pins are for digital and what for analog? On 40 pin parts there are
pins 11,12 and 31,32. If I assume 11,12 for analog, there are then pins
13,14 as oscilator I/O with 20MHz...

>I think it's an oversight on their part NOT to tell us this. What I
>can't figure is how they get a '73/76 to work well, since it's the
>same die as the 40-pin part just a different bonding.

Probably two different cores but modified. The problem I see at 16C74 is,
port E has analog and digital I/O functions, what isn't on 16C73. What I
ask, how to layout power without getting the bounce from digital Vcc+Gnd to
analog Vcc+Gnd, when port E is fast switching digital output with high
current and port A works like AD. I think this is impossible, as I get
allways crosstalk via power from digital to analog on port E or on internal
Vref. And probably this is the point, why the new parts like 16F87x have
both configurable -/+ Vref inputs on port A.

Motorola has one nice application note about this problem. I can't remember
the number, but it is about designing with HC05/08 with comparators. It
explains how to design with MCU with one pair of Vcc+Gnd pins used for
switching 10mA LEDs and still get good resolution from AD.

>I never thought of it until just now, but I wonder how much
>resistance is between the two grounds and two power supply pins.

You don't know nothing about the chip layout. So only poeple from Microchip
can really say something constructive.

AndyK wrote:
>>How about to seperate the VCC to the A/D convertor section? This would reduce
>>the vulnerability of the A/D to supply noise and ground bounce problems.
>
>Have you ever tried it? Run your big PIC with just one power or ground and see
>the ADC results fall through the floor.
>
>The word I got was to treat the one near the ADC section as AVcc and AGND,
>because that's essentially what they are.
>

This is most unfortunate. Exactly the other side of the "AGnd" are
the oscillator pins, so this gnd pin makes a really great place to
return the little gnd-trace-island that you draw around the xtal/cap/cap
area on your pcb to help isolate and confine the hi-freq stuff.

So, instead of reducing overall noise, you end up directing it straight
into your AGnd. Gakkk. Wrost of all possible worlds. Why on earth would
Mchp do this? [a rough guess - no one in the company ever heard of
electrons?????????]

AndyK wrote:
>>How about to seperate the VCC to the A/D convertor section? This would reduce
>>the vulnerability of the A/D to supply noise and ground bounce problems.
>
>Have you ever tried it? Run your big PIC with just one power or ground and see
>the ADC results fall through the floor.
>
>The word I got was to treat the one near the ADC section as AVcc and AGND,
>because that's essentially what they are.
>

This is most unfortunate. Exactly the other side of the "AGnd" are
the oscillator pins, so this gnd pin makes a really great place to
return the little gnd-trace-island that you draw around the xtal/cap/cap
area on your pcb to help isolate and confine the hi-freq stuff.

So, instead of reducing overall noise, you end up directing it straight
into your AGnd. Gakkk. Wrost of all possible worlds. Why on earth would
Mchp do this? [a rough guess - no one in the company ever heard of
electrons?????????]