Jonathan Carter (PI)

For the past 15 years, CPU performance has improved at an exponential pace &emdash; doubling approximately every 18 months with remarkable consistency. In order to maintain performance improvements within the conservative power envelope allowed by practical system design, the historical trend of increasing clock rates at an exponential pace has given way to a chip-scale multiprocessor (CMP) design strategy where the performance of individual CPU cores stays constant and the number of cores increases at an exponential pace. Such a trend is unprecedented in the HPC design community and will likely break most of our existing software tools. This project is investigating the challenge of effectively utilizing computing systems with exponentially increasing numbers of cores per chip.