Back in April 2011, Toshiba and SanDisk jointly announced that they were the first to achieve a silicon fabrication breakthrough on the 19nm process node. The good news was that smaller, cheaper and higher capacity NAND flash could be stored in 2-bit-per-cell (MLC) transistors when 16 die are stacked into a single-chip package.

Rewind further back to 2008, and many analysts remember that SanDisk's former Chairman, Founder and CEO Eli Harari had questioned the industry's ability to scale below the 20nm process node. The company cited "uncertainties with Extreme Ultraviolet (EUV) lithography at such small scales, a process that had been hit with delays, lack of power sources and cost issues at the time.

Toshiba had started sampling its 19nm NAND flash shipments in April 2011 and hit volume production between July and September 2011. At the time, however, it was only sampling 2-bit-per-cell (MLC) products and had only intended to commercialize 3-bit-per-cell (TLC) later on.

In January 2012, Toshiba finally began manufacturing 19nm NAND flash on 3-bit-per-cell (TLC) 128Gb chips with the world's smallest die size at just 170mm2. The company has also been able to achieve the world's fastest write speeds on any 3-bit-per-cell (TLC) device at 18MB/s.

AnandTech recently published a comprehensive and informative overview of Triple-Layer Cell (TLC) NAND flash and its place in the consumer electronics industry which can be found here. Of course, the new TLC die shrink technology introduces a myriad of problems for voltage regulation, write amplification and ECC that all must be taken into consideration when manufacturing NAND flash at this small of a scale. Nevertheless, Toshiba claims it has optimized the peripheral circuit structure of the chips and uses air-gap technology for transistors, effectively reducing coupling between memory cells down to 5-percent.

We look forward to the first products from partnering vendors and expect them to be announced soon.