The first in Avago's growing family of 0402-packaged chips is the world's smallest RF amplifier, available in five frequencies ranging from 500 MHz to 12 GHz, but the company claims its packaging can go as high as 100 GHz. Other RF devices on Avago's list of candidates for the tiny 0402 package include analog and digital attenuators, broadband detectors, bypass- and high-gain amplifiers, octave-band detectors, gain blocks and RF switches.

The chips are being fabricated at Avago Technologies' Fort Collins (Colorado) six-inch fab, using its micro-electro-mechanical systems-like (MEMS-like) technique that downsizes radio frequency (RF) chips into packages that it claims consume only 5 percent of the volume and 10 percent of the board area of a standard SOT-343 package. An air cavity--the ultimate dielectric--is created under the wafer's cap and immediately above the RF circuitry to enhance RF speed. Providing direct contact between the package substrate and the monolithic microwave integrated circuit (MMIC), improves heat transfer from the device, as well as reduces the length of the RF signal path, thus providing less resistance compared with typical SMT.
Avago already had extensive experience in fabricating 0402-packaged discrete devices using a MEMS-like wafer-level capping technique for its thin-film bulk acoustic resonator (FBAR) line. An FBAR is essentially a micro-electro-mechanical system with no moving parts, since they sandwich a micron-scale layer of aluminum nitride piezoelectric material between two electrodes that resonate in the radio-frequency bands of cell phones and other wireless devices.

"For our FBAR filters, we have already made three-quarters of a billion hermetically sealed 0402 packages for discrete devices, we sell for cell phone handset customers," said marketing manager, Titus Wandinger. "Now we have adapted that technique to RF amplifiers, and we have plans for even higher integration in the future."

Fabbed in GaAs
Avgago's RF devices are already fabricated in gallium arsenide (GaAs), although it also runs CMOS on its Fort Collins line. To make the transition to the 0402 package, they lay down a wafer scale gasket to isolate each chip while it's still on the wafer, then bond a second blank GaAs wafer on top of the first wafer, effectively encapsulating each chip.

"For our RF amplifer, which is on a GaAs wafer, we use a GaAs capping wafer, but we can also use silicon wafers to cap silicon wafers, or even glass for very low-cost devices," said Wandinger.

After capping the wafer, they can dice it and the chips are ready to use--without wire bonding, without a lead frame and without the extra thickness of a plastic package. The leadless packages use vias within each chip to bring its connections down to the bottom, allowing standard SMT equipment to mount and solder them to boards.

"We knew that a chip-scale package would be the smallest possible form factor, plus for our RF integrated circuits chip-scale packaging eliminates the parasitic capacitance and dielectric loading that limits your high-frequency performance in traditional packages," said Wandinger.

The secret sauce that Avago is holding as a trade secret is the composition and deposition technique for the gasket that seals the chip before they are capped, en masse, while still on the wafer.

"Key for us is the gasket we use to seal each chip at the wafer level when we put the cap on," said Wandinger. "That gasket--which we had already perfected to hermetically seal our FBARs--provides a good structural seal as well as an effective moisture barrier."

Inside the package, Avago uses the ultimate dielectric--air gaps--to isolate its internal connections. The air gaps are formed in the same way as are the moving parts in MEMS devices. First, a sacrificial material is put on the circuit and a metal trace deposited on top. Then they etch away the sacrificial material from under the metal connection, which now forms a bridge over the circuitry, with nothing but an air gap isolating it, instead of the traditional dielectric material.

Instead of a flip-chip and solder-bump technique--which would invert the ground plane of chips on a printed circuit (PC) board, thereby interfering with the RF properties of the chip--the wafer-level chip-scale technique enables the chip to remain right-side-up on the PC board.

"We spent a lot of time perfecting the metallurgy on the bottom of our chips," said Wandinger. "In that way, the chips are ready to go as soon as they come out of the fab. Customers can insert them directly into any SMT line using all the standard techniques."