Thin-film transistors (TFTs) are core elements of novel display media on rigid or flexible substrates, radio-frequency identification tags on plastic foils, and other large area electronic applications. Microcrystalline silicon TFTs prepared at temperatures compatible with flexible substrates (150-200 degrees C) have gained much attention as potential elements for such applications due to their high charge carrier mobilities. Understanding the relationship between the structural properties and the charge transport is essential in realizing TFTs with high charge carrier mobility at low temperatures. In this study, top-gate staggered microcrystalline silicon TFTs were realized by plasma-enhanced chemical vapor deposition at maximum temperature of 180 degrees C. We investigated the correlation between the structural properties of the microcrystalline silicon channel material and the performance of the microcrystalline silicon TFTs. Transistors with the highest charge carrier mobility, exceeding 50 cm(2) /V s, were realized near the transition to amorphous growth. The results reveal that electronic defects at the grain boundaries of the silicon crystallites are passivated by the amorphous phase near the transition to amorphous growth. The crystalline volume fraction of the channel material will be correlated with the transistor parameters such as charge carrier mobility, threshold voltage, and subthreshold slope. (C) 2008 American Institute of Physics.