Excelero, a disruptor in software-defined block storage, was assigned US patent #9,971,519 today - its second US patent - governing a technique of performing NVMe access directly from a chip. This intellectual property (IP) will be utilized in upcoming SmartNIC-based versions of its flagship NVMesh Server SAN and provides customers with more efficient ways to use distributed NVMe using the open standard NVMf. Excelero is also in talks with NIC manufacturers about licensing this technology, which will help accelerate not just NVMesh, but also NVMf from any vendor.

IDC and Wikibon predict the NVMf market is "where the world is going," with present adoption focused on high-performance applications that require exceptionally high performance and low latency. However, there is pent-up demand for NVMf storage among a wider set of use cases, as enterprises and service providers seek to optimize their infrastructures in the same way as the Tech Giants.

Excelero's new patent describes a mechanism for efficient offloading of remote access to NVMe drives by performing the access directly from a network chip, FPGA with network capabilities or a SmartNIC. Doing this conserves precious central CPU cycles and avoids resource-consuming context switches for interrupt handling. Moreover, Excelero's innovation is applicable to web-scalers such as AWS, Azure and others with FPGA-based environments, in addition to enterprises looking to build scale-out IT architectures.

"There's a strong global market for FPGA-based solutions in particular that could make tremendous application of Excelero's latest patent innovation," said Lior Gal, CEO and co-founder of Excelero. "And with 13 additional patents pending, Excelero continues to innovate in ways to efficiently use NVMe at scale in the software-defined data center of the future."