The
First Public “SNEAK PEAK” at DSLGen, a platform independent
program generation system that produces optimized code (without
reprogramming) for multiple platform architectures. The target
computation is specified in a programming language independent form
and need not ever be changed unless the target computation changes.
The target platform architecture is specified separately in terms of
high level domain specific descriptors. Only the platform
specification needs to change when moving to a new platform.

The
demonstration version of the system is implemented for the following
platform architectures: Simple Von Neumann machine, a multicore with
threads machine, a vector machine (i.e., Intel’s SSE instruction
set) and a combination of multicore and vector. Other architectures
envisioned are: GPU (producing CUDA) , FPGA, DSP (Digital Signal
Processor) platform, and others.

DSLGen
is written in CommonLisp and CLOS (CommonLisp Object System).

The
demonstration will drill into the PATENTED technology underlying
DSLGen. It will examine the fundamentally new representation system
used (constraint based) and the tools that operate on that
representation. We will walk through an example generation and
introduce the tools along the way.