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ADC0 teensy 3.2

HELLO all
I am trying to read a differential signal using ADC0 of teensy 3.2 (pin10+,pin11-), but unfortunately i hav'nt get the right signal, I have used a sine wave with 1KHz as an input, I have compiled the following code:

HELLO all
I am trying to read a differential signal using ADC0 of teensy 3.2 (pin10+,pin11-), but unfortunately i hav'nt get the right signal, I have used a sine wave with 1KHz as an input, I have compiled the following code:

What do you expect to see, and what do you get? (IOW, what is exactly the problem?)

Otherwise, you should be aware that a ADC AND Serial.print statements in the same loop calls for problems

the freq of signal out of DAC read 6Hz on oscilloscope, its should be 1KHz!
to test ADC I connect a sine wave with different freqs to A9 and read the signal on serial plotter

with this simple code, I get a clear signal just up to 100Hz!
at 1000Hz the signal has been unclear although the sampling freq is very high!
is this mean that the ADC0 of my teensy board have damaged??
or what do you suggest??

What do you mean by "signal is unclear"? You send values to the DAC with a period of 500us which corresponds to a sampling rate of 2000Hz (No, that's not very high!). Thus, if you have studied and understood the Nyquist theorem, the maximum frequency which can be correctly reproduced at any sample rate fs is < fs/2. So, trying to output a 1kHz signal with 2kHz sampling frequency is already difficult. That's why digital audio systems use sampling frequencies above 44kHz to make sure that the audio band up to 20kHz will be correctly reproduced.

Second, any sampling process generates sidebands which are called aliasing. That's why behind every DAC, there must be a reconstruction filter, especially if you are working at high frequencies, relative to the sampling frequency. Simple digital audio systems using a DAC and no oversampling or any other digital technology for signal optimization need at least a 18dB/octave Bessel (linear phase) low pass filter to eliminate quantization noise (the famous DAC step edges) and intermodulation products.

Third, your simple example code (sampling period = 500us + CPU loop and calculation time, phase step= 0.02) is expected to show a frequency slightly below fs * 0.02 / (2 * pi) which corresponds perfectly to a result of around 6Hz.

I'd suggest that you study digital audio basics first before you complain about hardware or code not giving you the desired results...

Afterwards, we might talk about the ADC side, where you need either to use a synchronized sampling process or additional filtering to re-sample a just reconstructed signal.