here, the option -MM would cause the compiler to look into all sources for #include statements. it then would add those files to .depend file. the list then would be included in the makefile (note, the - left of include command is to prevent the make utility to complain when the .depend does not exist).

Since I eventually plan to include libraries from folders that are not in the directory tree with my source, I'm trying to learn the general process of using includes in makefiles. I'm working with very simple examples so that I can focus on one problem at a time.

actually it isn't an issue of using includes in makefiles but that the (pre)compiler needs information where to find the header files. relative paths in statements may cause some problems because it is relative to the current directory the makefile has at the time when it calls the compile statement. normally, it would be the folder where the makefile resides. but by include statements in the makefile itself or by other initialization stuff, it could be very well, that the current folder changed, and then the compile statement fails as well.

another issue is that the relative path will be converted to an absolute path by command interpreter. if your absolute path contains spaces, it would spoil the compile command cause spaces are separators for arguments. you could overcome this issue by using double quotes for the path:

the environment variables also could be defined outside of the makefile. or you use include environment variable which may have a number of absolute paths, separated by ; (similar to PATH environment variable). again note, paths with spaces must be properly quoted. you would use the include environment variable for globally used include folders, for example those of 3rd-party libraries. for object folders (.a, .so, .o) the counterpart of 'include' environment variable is 'lib'.

from your errors it is that the g++ call doesn't contain the -I option. in my opinion, the only explanation for the missing option is that the makefile you posted is not the makefile that was used when you run your test.

that could be due to your environment. unfortunately i never developed with mingw. you might check with the windows explorer whether there are other makefile files available. normally makefiles do not have an extension and never i experienced one with .txt file extension. you may look for makefile without extension or hellomake.mak or similar. I would assume that mingw uses another makefile and all your changes have no effect because of that.

do you know that the line with $(CC) must have a <TAB> character (and only a TAB) before the $(CC) ?

it looks as if the make utility would do a default compile for all object files and finally perform the $(CC) statement. you might use an alternate way by using a rule .c.o rather than adding the cc command. or first, try to separate linking and compiling:

Featured Post

Poor audio quality is one of the top reasons people don’t use video conferencing. Get the crispest, clearest audio powered by Dolby Voice in every meeting. Highfive and Dolby Voice deliver the best video conferencing and audio experience for every meeting and every room.

When writing generic code, using template meta-programming techniques, it is sometimes useful to know if a type is convertible to another type. A good example of when this might be is if you are writing diagnostic instrumentation for code to generat…

Written by John Humphreys
C++ Threading and the POSIX Library
This article will cover the basic information that you need to know in order to make use of the POSIX threading library available for C and C++ on UNIX and most Linux systems.
[s…