Postdoc Opening - MIT

The project is a close collaboration with the Singapore-MIT Alliance of Research & Technology (SMART)'s Low Energy Electronic Systems (LEES) center. LEES is an interdisciplinary research center led by MIT principal investigators spanning from materials, to devices, circuits and system design. The LEES center's mission lies in its unique fabrication process, enabling the integration of III-V devices with CMOS on the same die. Several application drivers have been shaping the ongoing LEES materials and device fabrication, one of which lies in high-performance on-die interconnects.

This project aims to model such interconnects within state-of-the-art physical design tools, so detailed simulations of the proposed interconnects can be carried out. This will enable characterizations vs existing metal interconnects to be carried out, as well as drive explorations of next-generation processor architectures.

The postdoc position is based at MIT with close, virtual collaboration with other researchers at MIT and Singapore, and occasional trips to Singapore. Interested candidates with suitable background should email their CV to peh@csail.mit.edu