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Abstract

Various methods are used to transfer data between two different systems having different bus structures. One of the common methods is to use a dual-ported memory. There are complications and performance constraints, however, with prior implementation using the dual-ported memory approach. The implementation described herein uses a video memory to simplify the logic and control circuitry necessary to support data exchange. This implementation enables two systems to have simultaneous access to the memory under certain conditions with no arbitration or time multiplexing constraints.

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United States

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English (United States)

This text was extracted from an ASCII text file.

This is the abbreviated version, containing approximately
44% of the total text.

Improved Method of Data Transfer Using Large Dual-Ported
Memories

Various
methods are used to transfer data between two
different systems having different bus structures. One of the common
methods is to use a dual-ported memory.
There are complications and
performance constraints, however, with prior implementation using the
dual-ported memory approach. The implementation described herein uses
a video memory to simplify the logic and control circuitry necessary
to support data exchange. This implementation
enables two systems to
have simultaneous access to the memory under certain conditions with
no arbitration or time multiplexing constraints.

This article
describes a method of exchanging large amounts of
data between two different system buses.
The exchange occurs between
a graphics system and a high-performance graphics workstation. The
graphics system uses a version of the VME bus, while the workstation
contains the IBM Low End Parallel Bus Architecture (LEPBA). To
transfer drawing lists and drawing orders from the workstation to the
graphics system, a unique type of dual-ported memory is used. The
dual- ported memory uses a new type of memory device (VRAM) usually
used for storing video information in a video display system. The
VRAM contains a serial port in addition to the normal parallel
random-access port. This implementation
uses 256K x 4 modules. A
row of data (512 x 4 bits in this system) can be transferred from
anywhere in the memory to the serial port. Once the data is in the
serial port, accesses to the parallel port and to the serial port can
be performed simultaneously. It is not
necessary to arbitrate or
share cycles, and the two buses can be asynchronous to each other.

Previous
implementations of this type of data transfer system
have used dual ported memory. This was
usually Static Random Access
Memory (SRAM) with the capability of fast access. Cycles were shared
between the two different buses. In a
system where the two buses had
separate independent clocks, the logic became more complex and time
critical.

A dual-ported
memory from several semiconductor manufacturers
implements the functions of a SRAM with the appropriate controls
built in. For any system using SRAM,
large memories are difficult to
implement because of the high-cost, high-power consumption and large
area required.

The present
data transfer system uses dual-ported RAM,
specifically a type of Dynamic Random-Access Memory (DRAM) called
VRAM or Video Random-Access Memory to obtain many of the benefits of
SRAM. The VRAM has the cost, power and
size advantages of DRAM.
VRAM is a DRAM with additional circuitry incorporated to allow serial
access as well as the traditional parallel access.

Fig. 1 shows
a block diagram of the Memory Access Graphics
Interface Card (MAGIC). Note that either
bus has access to the
parallel port of the VRAM, and the output of the serial sh...