Site Search

SECTION VII - 8051 STACK AND REGISTER BANKS

The 8051 microcontroller has a total of 128 bytes of RAM. Lets discuss the allocation of these 128 bytes of RAM and examine their usage as register and stack.

RAM [Random Access Memory] space allocation in 8051:

There are 128 bytes of RAM in the 8051. This 128 bytes of RAM inside the 8051 are assigned addresses 00 to 7FH. This 128 bytes are divided into three different groups as follows.

Total of 32 bytes from locations 00 to 1F hex are set aside for register banks and the stack.

Total of 16 bytes from locations 20H to 2FH are set aside for bit addressable Read/Write memory.

Total of 80 bytes from locations 30H to 7FH are used for read and write storage. These 80 bytes locations of RAM are widely used for the purpose of storing data and parameters by 8051 programmers.

RAM Allocation in the 8051:

7FH 80 BYTES

30H

2FH BIT ADDRESSABLE

20H

1FH REGISTER BANK 3

18H

17H REGISTER BANK 2

10H

0FH REGISTER BANK 1

08H

07H REGISTER BANK 0

00H

Register Banks in the 8051:

32 bytes of RAM are set aside for the register banks and stack. These 32 bytes are divided into 4 banks of registers in which each bank has 8 registers, R0 - R7. RAM locations from 0 to 7 are set aside for bank 0 of R0 - R7. 'R0' is the RAM location 0 of Bank 0, 'R1' is the RAM location 1, 'R2' is the RAM location 2 of Bank 0, and so on up to 'R7' is the RAM location 7 of Bank 0. The second bank of registers R0 - R7 starts at RAM location 08H and goes to location 0FH. The third bank of R0-R7 starts at memory location 10H and goes to location 17H. The fourth bank of R0-R7 starts at memory location 18H and goes to location 1FH.

8051 Register Banks and their RAM addresses:

BANK 0

7

R7

6

R6

5

R5

4

R4

3

R3

2

R2

1

R1

0

R0

BANK 1

7

R7

6

R6

5

R5

4

R4

3

R3

2

R2

1

R1

0

R0

BANK 2

7

R7

6

R6

5

R5

4

R4

3

R3

2

R2

1

R1

0

R0

BANK 3

7

R7

6

R6

5

R5

4

R4

3

R3

2

R2

1

R1

0

R0

Note: Bank 1 used the same RAM space as the stack. We must either not use register Bank 1, or we must allocate another area of RAM for the stack.

Example # 1:

Lets state the contents of RAM location after the following program.

MOV R0,#98H ;Load R0 with value 98H

MOV R1,#84H ;Load R1 with value 84H

MOV R2,#3EH ;Load R2 with value 3EH

MOV R3,#62H ;Load R3 with value 62H

MOV R4,#11H ;Load R4 with value 11H

Answer:

After execution of program, we have:

RAM location 0 has value 98H

RAM location 1 has value 84H

RAM location 2 has value 3EH

RAM location 3 has value 62H

RAM location 4 has value 11H

Default Register Bank:

When the 8051 powered up, which register bank of R0-R7 do we have access if RAM locations 00-1FH are set aside for the four register banks? The answer is 'Bank 0'. RAM locations 0,1,2,3,4,5,6 and 7 are accessed with the names R0,R1,R2,R3,R4,R4,R6 and R7 when programming the 8051. The easiest way is to refer to these RAM locations with names sich as R0,R2,R2,R3,R4,R5,R6, and R7 rather than by their memory locations 0,1,2,3,4,5,6, and 7.

Example # 2:

Lets state the contents of RAM location by using their direct addressing mode:

This is called direct addressing mode and used the RAM address location for the destination address.

MOV 00,#98H ;Load R0 with value 98H

MOV 01,#84H ;Load R1 with value 84H

MOV 02,#3EH ;Load R2 with value 3EH

MOV 03,#62H ;Load R3 with value 62H

MOV 04,#11H ;Load R4 with value 11H

How to Switch Register Banks:

Bank 0 is the default register bank when the 8051 is powered up. We can switch to other banks by use of the PSW [program status word] register. Bits D4 and D3 of the PSW are used to select the desired register bank:

Program status word Bit Bank Selection:

RS1 [PSW.4]

RS0 [PSW.3]

BANK 0

0

0

BANK 1

0

1

BANK 2

1

0

BANK 3

1

1

The D3 and D4 bits of register PSW are often referred to as PSW.4 and PSW.3, since they are be accessed by the bit-addressable instructions SETB and CLR. e.g. "SETB PSW.3" will make PSW.3=1 and select the register bank 1.

Example # 3:

Lets state the contents of the RAM locations after the following program:

SETB PSW.4 ;Select Bank 2

MOV R0,#98H ;Load R0 with value 98H

MOV R1,#84H ;Load R1 with value 84H

MOV R2,#3EH ;Load R2 with value 3EH

MOV R3,#62H ;Load R3 with value 62H

MOV R4,#11H ;Load R4 with value 11H

Answer:

By default, PSW.3=0 and PSW.4=0; therefore the instruction "SETB PSW.4" sets RS1=1 and RS0=0, thereby selecting register bank 2. Register bank 2 uses RAM locations 10H - 17H. After the execution of the above program we have the following:

RAM location 10H has value 98H

RAM location 11H has value 84H

RAM location 12H has value 3EH

RAM location 13H has value 62H

RAM location 14H has value 11H

What is Stack in the 8051?:

The stack is a section of RAM used by the CPU to store information temporarily. This information could me data or an address. The CPU needs this storage area since there are only a limited number of registers.

How Stack are Accessed in the 8051?:

The stack is a section of RAM. Which registers inside the CPU to point to it?. The register used to access the stack is called the stack pointer [SP]. The Stack pointer in the 8051 is only 8 bits wide, which means that it can take values of 00 to FFH. When the 8051 is powered up first, the stack pointer [SP] register contains value '07'. This means that RAM location 08 is the first location being used for the stack by the 8051.

The storing of a CPU register in the stack is called a 'PUSH', and loading the contents of the stack back into a CPU register is called a 'POP'. Register is pushed onto the stack to save it and popped off the stack to retrieve it.

Pushing onto the Stack:

The Stack pointer [SP] in the 8051 is pointing to the last used location of the stack. As data is being pushed onto the stack, the stack pointer [SP] is incremented by one. The following example below demonstrate this:

Example # 1:

Assuming the default position of stack area lets show the stack and stack pointer for the following program:

MOV R1,#24H

MOV R2,#11H

MOV R3,#0F2H

PUSH 1

PUSH 2

PUSH 3

Answer:

After PUSH 1

After PUSH 2

After PUSH 3

0B

0B

0B

0B

0A

0A

0A

0A F2

09

09

09 11

09 11

08

08 24

08 24

08 24

Start SP=07

SP=08

SP=09

SP=0A

In the example above when each PUSH is executed, the contents of the register are saved on the stack and the stack pointer [SP] is incremented by 1. With every byte of data saved one the stack, SP is incremented only once. To PUSH the registers onto the stack, we must use their RAM addresses.e.g, the instruction "PUSH 1" pushes register R1 onto the stack.

Popping From the Stack:

Popping is the opposite of pushing. Popping the contents of the stack back into a given register is the opposite process of pushing. With every pop, the top byte of the stack is copied to the register specified by the instruction and the stack pointer is decremented once.

The upper Limit of Stack:

In the 8051 RAM locations, 08 to 1F can be used for the stack. This is due to the fact that locations 20H to 2FH of RAM are reserved for bit-addressable memory and must not be used by the stack. If in a given program, we need more than 24 bytes [80H to 1FH = 24bytes] of stack, we can change the SP to point to RAM locations 30 - 7FH. This is done with the instruction "MOV SP,#XX"

Example #1:

Examining the stack, Lets show the contents of the registers and SP after execution of the following instructions. All values are in HEX.

POP 3 ;POP stack into R3

POP 5 ;POP stack into R5

POP 2 ;POP stack into R2

Answer:

After POP 3

After POP 5

After POP 2

0B 54

0B

0B

0B

0A F9

OA F9

0A

0A

09 76

09 76

09 76

09

08 6C

08 6C

08 6C

08 6C

Start SP=0B

SP=A

SP=09

SP=08

Stack and the CALL Instruction:

In addition to using the stack to save registers, the CPU also uses the stack to save the address of the instruction just below the CALL instruction. This is how the CPU knows where to resume when it returns from the called subroutine.

Example # 2:

Lets show the stack and stack pointer for the following instructions:

MOV SP,#5FH ;Make RAM location 60H,5F+1=60H first stack location

MOV R2,#25H

MOV R1,#12H

MOV R4,#0F3H

PUSH 2

PUSH 1

PUSH 4

Answer:

After PUSH 2

After PUSH 1

After PUSH 4

63

63

63

63

62

62

62

62 F3

61

61

61 12

61 12

60

60 25

60 25

60 25

Start SP = 5F

SP = 60

SP = 61

SP = 62

There is a Conflict between Back 1 and Stack:

Stack Pointer register points to the current RAM location available for the stack. As data is pushed onto the stack, SP is incremented, and stack pointer is decrement as data is popped off the stack into the registers. The reason that the stack pointer is incremented after the PUSH is to make sure that the stack is growing toward RAM location 7FH from lower addresses to upper addresses. If the stack pointer were decremented after PUSH instruction, we would be using RAM locations 7,6,5,,4,3,2,1,0, which belongs to R7 to R0 of bank 0. Bank 0 is the default register bank. The incrementing of the stack pointer for push instructions also ensures that the stack will not reach location 0 at the bottom of RAM, and consequently run out of space for the stack. The problem with the default setting of the stack is since SP=07, when the 8051 is powered up, the first location of the stack is RAM location 08 which also belongs to register R0 of register Bank 1. The register bank 1 and the stack are using the same memory space. So in a given program, we need to use register banks 1 and 2, we can reallocate another section of RAM to the stack. For example, we can allocate RAM locations 60H and higher to the stack as given in Example # 2 above.