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Abstract

Emitter function logic Is very compact, high speed logic. In contrast to the differential operation of conventional ECL type logic, EFL operates single ended. This allows the use of emitter followers and multi-emitter transistors Instead of separately isolated transistors. This and the elimination of half of the load resistors save considerable space in an IC layout.

Copyright

Motorola Inc. January 1982

Country

United States

Language

English (United States)

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EFL MASTER-SLAVE FLIP-FLOP By W. Eric Main and Roy Espe

STATEMENT OF PROBLEM

Emitter function logic Is very compact, high speed logic. In contrast to the differential operation of conventional ECL type logic, EFL operates single ended. This allows the use of emitter followers and multi-emitter transistors Instead of separately isolated transistors. This and the elimination of half of the load resistors save considerable space in an IC layout.

One of the most simple and compact circuit conflguratlons previously used for a master-slave D-type flip-flop utilizes first and second resistors which serve as simple current sources, and third and fourth resistors to provide the necessary offset to prevent a race condition during the clock transitions.

The circuit is not without potential problems, however. Because of the single-ended clock and the resistor current sources the current, and therefore the load voltage, are different on each phase of the clock. The worst effect is the reduced negative logic swing during the negative phase of the clock. This reduces the noise margin making the circuit more susceptible to falsing.

SOLUTION

This disadvantage can be overcome by making the offset resistors asymmetric or, in the extreme, putting all of the offset in the slave as shown in the Figure. Now the logic swing is never less than the desired level. Another benefit is the reduction in overswing of the negative portion of the slave during the positive portion of the clock.