PowerDRC/LVS is designed to process integrated circuit (IC) designs of various size at technology nodes 40nm and below for DRC, and 130nm and above for LVS, with run times which are fast and completely predictable. It is massively scalable and provides turnaround time that is up to an order of magnitude faster than existing solutions. PowerDRC/LVS achieves this scalability and turnaround time through the use of a unique data structure and innovative window scanning technique.

Foundry Support

During beta test period, POLYTEDA worked with wilde list of partners and evaluators to validate accuracy and performance for production. Contact us to learn more about the availability of foundry rule decks.

Availability and Demonstration

PowerDRC/LVS 1.7 is available now from POLYTEDA. Contact
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for more details.