The Wild40 Forced-Air, Conduction-Cooled OpenVPX 3U Chassis is equipped with a high performance backplane which is capable of Serial I/O signaling at rates up to 10Gbps on the Data and Expansion Planes. Each FPGA slot Data Plane 1 has a 2x PCIe gen3 connection to the Single Board Computer (SBC). Multiple 10Gbps capable High Speed Serial (HSS) and LVDS interfaces are provided on the backplane for Inter-board connectivity. For external connectivity there is LVDS from each FPGA card, along with Ethernet, USB and Serial port uplink from the SBC. Other global signals brought out externally include OpenVPX signals NVMRO and SYSRESET. There is a built in Ethernet switch providing a local 1GbE between the SBC and 4 FPGA slots.

In addition to digital external interfaces, there are 9 RF connections provided where 1 of them is brought to backplane and distributed with OpenVPX radial clocking to each FPGA slot. This can be used to provide a common reference clock to the clock analog I/O cards populated on the FPGA cards. The other 8 RF connections are intended for ADC and/or DAC channels on FPGA I/O cards. The 3rd MIL-38999 connector is for +28V power input and return.

A high velocity, rugged, military-grade fan provides ample cooling for up to 70°C ambient air.