MC9S12XD Family 16-bit Microprocessor Family (covers MC9S12XD64 through MC9S12XDP512 and MC3S12XDT256/MC3S12XDG128)Introduction Targeted at automotive multiplexing applications, the MC9S12XD Family will deliver 32-bit performancewith all the advantages and efficiencies of a 16-bit MCU. The S12X is designed to retain the lowcost, lowpower consumption, excellent EMC performance and code-size efficiency advantages enjoyed by usersof Freescale's previous 16-bit MC9S12 MCU family. Based around an enhanced S12 core, the MC9S12XD Family will deliver two to five times theperformance of a 25 MHz S12 whilst retaining a high degree of pin and code compatibility with the originalS12D - family. The MC9S12XD Family features the performance boosting XGATE co-processor. The XGATE, which isprogrammable in "C" language, has an instruction set which is optimized for data movement, logic andbit manipulation instructions. It runs at twice the bus frequency of the S12X and off-loads the CPU byproviding high speed data transfer (and data processing) between any peripheral module, RAMand I/Oports. This is particularly useful in applications such as automotive gateways where there are multiplebusses carrying heavy data traffic which would otherwise exert a heavy interrupt/processing load on theCPU.

Features The MC9S12XD Family will feature an enhanced MSCAN module which, when used in conjunction withXGATE, delivers FullCAN performance with virtually unlimited number of mailboxes and retainsbackwards compatibility with the MSCAN module featured on previous S12 products.Memory options will range from64 Kbytes to 512 Kbytes of Freescale's industry-leading, full automotivespec SG-Flash with additional integrated EEPROM. In addition to the rich S12 peripheral set, the MC9S12XD Family will feature more RAM, extra A/Dchannels, new timer features and additional LIN-compatible SCI ports compared with the original S12 DFamily.The MC9S12XD Family also features a new flexible interrupt handler which allows multilevelnested interrupts. The MC9S12XD Family has full 16-bit data paths throughout. The non-multiplexed expanded businterface available on the 144-pin versions allows an easy interface to external memories. The inclusionof a PLL circuit allows power consumption and performance to be adjusted to suit operationalrequirements. System power consumption is further improved with the new “fast exit from STOP mode”feature and an ultra low power wakeup timer. In addition to the I/Oports available in each module, up to 25 further I/O ports are available with interruptcapability allowing wakeup from STOP or WAIT mode. The MC9S12XD Family will be available in 144-pin LQFP(with optional external bus), 112-pin, and 80-pinoptions.• Upward compatible with MC9S12 instruction set• Enhanced indexed addressing• Additional (superset) instructions to improve 32-bit calculations andsemaphore handling• Access large data segments independent of PPAGE• Eight levels of nested interrupt• Flexible assignment of interrupt sources to each interrupt level.• One non-maskable high priority interrupt (XIRQ)• Wakeup interrupt inputs– IRQ and non-maskable XIRQ