New Wave Design & Verification is looking for an RTL Functional Verification Engineer using UVM methodology. Key responsibilities will include building UVM Testbenches from scratch, writing UVM based sequences to exercise constrained random and directed scenarios on the DUT, building scoreboard and coverage collectors for functional coverage.

Ideal candidates will be self-motivated, collaborative individuals with a degree in electrical or computer engineering. Candidates must have strong problem solving skills, be a good communicator, and work independently and as part of a team to achieve project and business objectives.

Qualifications:

A minimum of a Bachelor’s degree in Electrical Engineering, Computer Science/Engineering is required for this position.

Minimum Required skills:

Proficient in System Verilog and UVM test methodologies

Experience defining Test plans

Experience with constrained random test development and coverage specification and analysis

Experience in various simulation, synthesis tools and verification languages,