December 19902Philips SemiconductorsProduct specification4-bit bidirectional universal shift register74HC/HCT194FEATURES•Shift-left and shift-right capability•Synchronous parallel and serial data transfer•Easily expanded for both serial and parallel operation•Asynchronous master reset•Hold (“do nothing”) mode•Output capability: standard•ICCcategory: MSIGENERAL DESCRIPTIONThe 74HC/HCT194 are high-speed Si-gate CMOS devicesand are pin compatible with low power Schottky TTL(LSTTL). They are specified in compliance with JEDECstandard no. 7A.The functional characteristics of the 74HC/HCT194 4-bitbidirectional universal shift registers are indicated in thelogic diagram and function table. The registers are fullysynchronous.The “194” design has special features which increase therange of application. The synchronous operation of thedevice is determined by the mode select inputs (S0, S1).As shown in the mode select table, data can be enteredand shifted from left to right (Q0→Q1→Q2, etc.) or, rightto left (Q3→Q2→Q1, etc.) or parallel data can beentered, loading all 4 bits of the register simultaneously.When both S0and S1are LOW, existing data is retained ina hold (“do nothing”) mode. The first and last stagesprovide D-type serial data inputs (DSR, DSL) to allowmultistage shift right or shift left data transfers withoutinterfering with parallel load operation.Mode select and data inputs are edge-triggered,responding only to the LOW-to-HIGH transition of theclock (CP). Therefore, the only timing restriction is that themode control and selected data inputs must be stable oneset-up time prior to the positive transition of the clockpulse.

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