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The RF front-end -- often considered a black art by most engineers and comprising everything between antenna and digital baseband -- initially included all the filters, low-noise amplifiers and conversion mixers. As designs evolved, some of the traditional analog tasks, like filtering and up-down conversion, began to be
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DNA sequencing -- which provides vital information on genetics study, forensics, diagnostics and therapies -- has been an exclusive territory of high-end research labs with millions of dollars to spend because of the expensive chemical and optical equipment needed for research. That is changing, thanks to complex integrated circuits, a.k.a. systems-on-chip (SoC), which are overcoming cost and technical hurdles to bring the price of human
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This weekend, I took my son and eight of his friends to see Selma, a chronicle of Martin Luther King’s campaign to secure equal voting rights via an epic march from Selma to Montgomery, Alabama in 1965. Anirudh is 11 years old and is
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As I have mentioned before, Apple has changed the way we live on many different levels (iPod, iTunes, iPhone, iPad, etc…) and the Apple Ax SoC series is no different. You have to ask yourself how is Apple able to churn out a new industry leading SoC EVERY year? I
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Any SoC or IC design project, whether implemented at the same design site or multiple sites requires some data management tools to manage things such as a central data repository, revision management of files, etc., for effective co-ordination of work among different team members. Given the challenge of meeting the shrinking time-to-market windows, semiconductor companies are creating design centers wherever
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In the face of shrinking time-to-market windows, semiconductor companies are aggressively vying with each other to emerge with new or variants of existing ICs and SoCs to gain market share. The growth of the mobile market –wireless, networking, storage, and computing –
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Once upon a time, in 1987 to be specific, a French design team was trying to develop a 100% Made in France supercomputer. In fact, not really 100%, as the CPU chips were supposed to be made by Weitek, but we never saw any of these chips, probably too challenging to be designed right first time! Anyway, I was in charge of the design of the functions which could be used by every other design teams – 4 or 5 ASIC had to be designed,
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Please join me for an IP conversation in collaboration with ClioSoft on Wednesday, April 30th, 2014 @ 11:00 AM PST. At the EDPS Workshop IP day there were two interesting presentations on IP reuse. The first one was by Warren Savage of IPextreme: Top Ten Reasons Why Internal IP Reuse Fails. The second was by Ranjit Adhikary of ClioSoft: Making Design Reuse Work. Take a look at the slides and let’s talk about it.

In an era of SoCs with millions of gates, hundreds of IPs and multiple ways to verify designs through several stages of transformations at different levels of hierarchies, it is increasingly difficult to handle such large data in a consistent and efficient way. The hardware and software, and their interactions, have to be consistent through appropriate files and interfaces. The SoC has to be verified perfectly,
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One of the benefits of being part of SemiWiki is building relationships with a wide variety of companies covering every semiconductor design application imaginable. We are blessed, absolutely. Another benefit of being part of SemiWiki are the invitations to attend, participate, and even organize events such as EDPS. Last year I organized FinFET Day which was a huge success. This year I organized IP Day with a keynote from Martin Lund of Cadence and presenters from eSilicon,
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