Classifications

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes

G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources

G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels

G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

G09G3/3216—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using a passive matrix

G—PHYSICS

G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes

G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources

G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels

G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror

G—PHYSICS

G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes

G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources

G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels

G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix

G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror

G09G3/325—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver

G—PHYSICS

G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G2300/00—Aspects of the constitution of display devices

G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements

G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor

G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes

G—PHYSICS

G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G2300/00—Aspects of the constitution of display devices

G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements

G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor

G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes

G09G2300/0866—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes by means of changes in the pixel supply voltage

G—PHYSICS

G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes

G—PHYSICS

G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G2320/00—Control of display operating conditions

G09G2320/02—Improving the quality of display appearance

G09G2320/0238—Improving the black level

G—PHYSICS

G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS

G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION

G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes

G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources

G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels

G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

G09G3/3275—Details of drivers for data electrodes

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate

H01L27/28—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part

H01L27/32—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes [OLED]

H01L27/3241—Matrix-type displays

H01L27/3244—Active matrix displays

Abstract

A display including a current drive circuit capable of supplying a desired current to a light-emitting element in each pixel stably and accurately irrespective of the characteristic variations of active elements in the pixel, thereby providing a high-definition image. Each pixel is composed of a receiving transistor (TFT3) for receiving a signal current (Iw) from a data line (data) when a scanning line (scanA) is selected, a converting transistor (TFT1) for converting the current level of the received signal current (Iw) to a voltage level and holding the voltage level, and a driving transistor (TFT3) for allowing a drive current having a current level corresponding to the held voltage level to flow through light-emitting element (OLED). The converting thin film transistor (TFT1) generates the converted voltage level at its gate by allowing the signal current (Iw) through its channel, and a capacitor (C) holds the voltage level at the gate of the transistor (TFT1). The transistor (TFT2) allows the drive current having a current level corresponding to the voltage level held by the capacitor (C) to flow through the light-emitting element (OLED).

Description

Akira Itoda Manual current drive circuit and a display device using the same, the pixel circuit, and a driving method art

The present invention, such as an organic electroluminescence (EL) element, a current driving circuit for driving the light emitting element and the like Brightness by current is controlled, and the light-emitting element for each pixel by Ri driven to the current drive circuit comprising a display device, the pixel circuit, and a method of driving a light emitting element. More specifically, the current 驟動 circuit and a so-called active matrix type using the same to control the amount of current supplied to the I connexion light emitting element to the active element of the insulated gate field effect transistors evening or the like provided in each pixel related to the image display device

BACKGROUND

In general, the active-matrix display apparatus, arranging a large number of pixels in the Matrix focal displays an image Te cowpea to controlling the light intensity for each pixel according to the luminance information given. When using a liquid crystal as an electro-optical material, transmittance of the pixel changes in accordance with the write Murrell voltage written to each pixel. But active-matrix display apparatus using an organic elect port luminescence (EL) material as an electro-optical material, the basic operation is the same as in the case of using the liquid crystal. However, unlike a liquid crystal display, an organic EL display having a light-emitting element in each pixel, a so-called self-luminous, high image visibility than a liquid crystal display, backlight required, the advantages of such response speed is high having. Brightness of each light emitting element is controlled by the amount of current. That is, very different from the LCDs or the like in that the light-emitting element is a current-driven type or the current controlled.

As with liquid crystal display, an organic EL display is also possible with simple Ma Torikusu system and an active matrix system as a driving method. The former is difficult to realize a Deisupurei large and high definition of what structure is simple, the development of an active matrix system has been actively conducted. Active matrix method is controlled by an active element of the current flowing through the light-emitting element provided in each pixel is provided inside the pixel (typically, insulation gate type field effect transistor which is one type thin film transistor may be referred to as less TFT) to. The organic EL display of active matrix type is disclosed in JP-A-8- two hundred thirty-four thousand six hundred eighty-three example, an equivalent circuit of one pixel in FIG. Pixels emitting element OLE D, the first film Doranjisu evening TFT 1, consisting of the second thin film transistor TFT 2 and the storage capacitor C. Emitting element is an organic electroluminescence (EL) element. Since the organic EL element in which there are many cases rectifying property may be referred to as an OLED (organic light-emitting diode), in the figure by using a symbol of a diode as a light emitting element OLED. However, the light emitting element is not necessarily limited to 0 LED, as long as it is by connexion brightness to the amount of current flowing through the device is controlled. Moreover, not necessarily rectification is required in the light emitting element. In the illustrated example, the source of the TFT 2 as a reference potential (ground potential), while the anode of the light emitting element OLED (anode) is connected to Vdd (power supply potential), cathodes when de (cathode) to the drain of TFT 2 It is connected. On the other hand, the gate of the TFT1 is connected to the scanning line scan, the source is connected to the data line data, a drain connected to a gate one bets of the storage capacitor C and T FT2.

In order to operate the pixel, first, the scanning line scan a selected state, by applying a data potential Vw representing the brightness information to the data line data, TFT 1 becomes conductive, the holding capacitor C is charged or discharged, TFT 2 of gate one Doo potential is consistent with the data potential Vw. When the scanning line scan a non-selected state, TFT 1 is turned off, but TFT2 is disconnected from the electrical to de Isseki line data, TFT2 gate potential is stably held Te holding capacitor C Niyotsu. Current flowing through the light emitting element 0 LED via the TFT 2 becomes a value corresponding to the TFT2 gate Z-source voltage Vgs, the light-emitting element OLE D emits light with luminance corresponding to the amount of current supplied through the TFT 2 to continue.

Now, when the current flowing between the drain Z source of TFT 2 and I ds, which

Is a driving current flowing to the OLED. When TFT 2 is assumed to operate in the saturation region

, I ds can be expressed by the following equation.

I ds = · C o X · W / L / 2 (Vg s -V th) 2

= · C ox · W / L / 2 (Vw-V th) 2 2 · ■ · (1)

Here C ox is the gate Bok capacity Atari unit area, is given by the following equation.

Cox = £ 0 - £ r / d ... (2)

In (1) and (2), V th represents the threshold of the TFT 2, Z represents a mobilities of carriers, W is shows a channel width, L represents a channel length, epsilon theta is vacuum shows the dielectric constant, epsilon r indicates a dielectric constant of the gate insulating film, d is shows the thickness of the gate insulating film.

(1) According to the formula, to control the I ds by the potential Vw written into the pixel, it becomes possible to control the luminance of the light emitting element OLED as a result. Here, the reason to operate the TFT2 in the saturated region is as follows. That, I ds in the saturation region is controlled only by the Vg s, because the drain-source voltage Vd s was not dependent, even if variation Vd s by variations in the characteristics of OLED, a driving current I ds of a predetermined amount This is because it is possible to be supplied to the OLED.

As described above, in the circuit configuration of the pixel shown in FIG. 1, by performing writing by once Vw, until next rewritten one scanning cycle (one frame), the OLE D is emitting at a fixed luminance 維続to. When such pixels arrayed in a matrix as shown in FIG. 2, it is possible to configure the active matrix display device. As shown in FIG. 2, the conventional display device, driving a predetermined scanning cycle (for example, the frame period in accordance with the NTSC standards) and the scanning line sc an, 1 to sc ANN for selecting the pixel 25, the pixel 25 and de Isseki line data to provide a luminance information (data potential Vw) for are arranged in a matrix. While scanning lines sca II 1 to sca nN is connected to the scanning line driving circuit 21, the data line data is connected to the dynamic circuit 22 drive the data lines. While sequentially selecting the scanning lines scan 1 to sca nN by the scanning line driving circuit 21, by repeating the writing by Vw from the data lines da ta by the data line driving circuit 22, as possible out to display a desired image. In a simple matrix display device, the light emitting element included in each pixel, whereas the emission only on the chosen instants, at § active matrix display device shown in FIG. 2, each pixel even after the completion of writing because 25 of the light emitting element continues to emit light, in terms of lowered the level of the driving current of the light emitting element compared to the simple matrix type, it is advantageous in Deisupurei of taking divided large high resolution.

Figure 3 shows a sectional structure of the pixel 25 shown in FIG. 2 schematically. However, for ease of illustration, it represents the only OLED and TFT 2. OLED is transparent electrodes 10 is obtained by overlapping the organic EL layer 1 1 and the metal electrode 12 in this order. The transparent electrode 1 0 functions as the anode of the OLED is separated into Menmotogoto, for example, a transparent conductive film IT 0 like. Metal electrode 1 2 is commonly connected among pixels and functions as OLED force Sword. That is, the metal electrodes 12 are commonly connected to a predetermined power supply potential Vd d. The organic EL layer 1 1 has a composite film of extensive and for example, a hole transport layer and the electron transport layer. For example, depositing a D i amy ne as a hole transport layer on the transparent electrode 1 0 which functions as an anode (hole injection electrode), deposited A 1 q 3 as an electron transport layer thereon, further thereon a metal electrode 12 which functions as a force cathode (electron injection electrode) is deposited. Incidentally, Al q 3 represents an 8- hydr oxy qu i no linea 1 um in um. 0 LED having such a laminate structure is only one example. When applying a forward voltage between the anode cathode one de the OLED (about 1 0V) having such a configuration, occurs the injection of electrons and holes such as a carrier, light emission is observed. Operation of the OLED are believed to light emission by holes and electrons wheel feed injected electrons from the formed excitons from layer injected from Seianawa feeding layer.

On the other hand, TFT 2 and the gate electrode 2 formed on the substrate 1 made of glass or the like, a gate insulating film 3 superimposed on the top surface thereof, superposed above the gate electrodes 2 via the gate insulating film 3 It was composed of a semiconductor thin film 4. The semiconductor thin film 4 is made of, for example, polycrystalline silicon thin film. TFT 2 includes a source S, a channel C h and the drain D of the passage of the current supplied to the 0 LED. Channel Ch exactly positioned right above the gate one gate electrode 2. The TFT 2 of the bottom gate structure is more coated on the interlayer insulating film 5, the source electrode 6 and drain electrode 7 are formed thereon. OL ED described above via another interlayer insulating film 9 is deposited on top of these. In the example of FIG. 3 for connecting the anode of the OLED to the drain of TFT2, and a P-channel thin-film transistors as TFT2.

In an active matrix type organic EL display, TFT formed on a glass substrate In general as an active element (Th in F i lm Tr an sistor, thin film transistors), but is utilized, this is for the following reason. That is, the nature of the organic EL display is a direct view type, its size becomes relatively large, the cost and manufacturing facilities constraints, it is realistic to use a single crystal silicon emission substrate for the formation of the active element not. Furthermore, organic to extract light from the light emitting element, as Anodo (anode) of the organic EL layer, but usually a transparent conductive film I TO (I ndi urn T in 0 xide) is used, IT 0 in general often EL layer is deposited at a high temperature without resistance Erare, in this case 1 Ding 0, it is necessary to form before the organic £ layers are formed. Therefore, the manufacturing process is generally ing as follows.

Referring again to FIG. 3, first gate one Bok electrodes 2 on the glass substrate 1, a gate insulating film 3, an amorphous silicon (Amo r phou s S i 1 ic on, amorphous silicon down) a semiconductor thin film 4 consisting of sequentially deposited and is patterned to form the TFT2. Depending cases also be policy silicon (polycrystalline silicon) by heat treatment in Les such one Zaaniru amorphous silicon. In that case typically Kiyaria mobility than amorphous silicon is large, the large TF T 2 of the current drive capability can create Rukoto. Then, a I TO transparent electrode 1 0 as a Anodo of the light emitting element OLED. Subsequently, it deposited organic EL layer 1 1 to form a light-emitting element OLE D. Finally, to form the metallic electrode 1 2 which is a force cathode of the light emitting element of a metal material (e.g. aluminum).

In this case, extraction of the light since from the back side of the substrate 1 (lower surface side), the substrate 1 is required to use a transparent material (usually glass). From such circumstances, the Akute Eve matrix organic EL display, a relatively glass substrate 1 of large are used, it is normal to have Ru is used relatively easily T FT be formed thereon as an active element . Recently, Ru attempt mower which light is extracted from the front side of the substrate 1 (upper side). It shows a cross sectional structure of the case in FIG. Figure 3 differs from the light emitting element OLE D overlapped metal electrode 1 2 a, and the organic EL layer 1 1 and the transparent electrode 1 0 a sequentially is that using an N-channel transistor as the TFT 2.

In that case, the substrate 1 need not be transparent like glass, as the transistors forming the large-sized substrate, it is also common that TFT is utilized. However, amorphous silicon and policy silicon used to form the TFT, the crystallinity is poor in comparison with the single-crystal silicon, due to poor controllability of the conduction mechanism, formed TFT is that variation in characteristics is great knowledge It is. Particularly, in the case of forming a polysilicon T FT on a glass substrate relatively large, to avoid the glass substrate thermal deformation of the problem, usually Rezaaniru method is used as described above, a large glass substrate uniformly it is difficult to irradiate the laser energy, the state of crystallization of Helsingborg silicon can not be avoided that result in variations depending on the location in the substrate.

As a result, even TFT formed on the same substrate, the Vt h (threshold) is due connexion several hundred mV in pixels, not uncommon also vary 1 V or higher in some cases. In this case, also write the same signal potential Vw with respect for example different pixels, a result of V th varies by pixel, according supra (1), the current I ds flowing to the OLED is quite desirable varies greatly with the image Motogoto results in deviate from the value, it is not possible to expect a high image quality as a display. This not only V th, the carrier mobility; w, etc. (1) can be said also similar for the variation of each parameter Isseki of. Further, the variation of each parameter Isseki above, all regardless of the variation between the above-described pixels, each manufacturing lots, or inevitably be a certain degree also varies among products. In such a case, with respect to the desired current I ds to flow to OLED, de - about whether to set the evening line potential Vw, must be determined in accordance with the finished of each parameter for each product (1) some, but this is not only Oite the mass production of the display is unrealistic, characteristic variation of the TFT due to the environmental temperature, very to take action for aging of the TFT characteristics caused by further long-term use difficult. Disclosure of the Invention

An object of the present invention does not depend on variations in characteristics of an active element inside the pixel, a current drive circuit capable of supplying a desired current to the light emitting element or the like stably and accurately pixels, and using the same, a high-quality image as a result display device capable of displaying, the pixel circuits, and to provide a driving method of a light-emitting element.

It has taken the following means in order to achieve the above purpose. That display device according to the present invention, a scanning line driving circuit for sequentially selecting the scanning lines, the data lines including a current source for supplying a signal current that having a current level in generating and sequentially data lines in accordance with luminance information a drive circuit, with are arranged at intersections of the scanning lines and the data lines, Le and a plurality of pixels including a light emitting element of a current drive type which emits light accept the supply of the drive current, Ru. As a feature, the pixel includes a converting unit that holds the conversion from the data line when the scanning line is selected and a receiving unit Komu Ri acquire the signal current, the current level of the fetched signal current once the voltage level , it becomes a driving current having a current level corresponding to the voltage level held by the drive unit to flow to the light emitting element. Specifically, the converting unit, a gate, a source, and converting insulated gate field effect transistor evening having a drain and a channel, includes a capacitor connected to the gate, the converter insulated gate type field effect transistor, the voltage level of the signal current fetched by the receiving part is converted to flow in the channel is generated on the gate Bok, the capacitor holds the voltage level generated on the gate. Further, the conversion unit includes an Suitsuchi insulating gate type field effect transistor 揷入 between the drain and gate of the conversion insulated gate type electric field effect transistor. The switch insulated gate field effect transistor becomes conductive when converting the current level of the signal current to the voltage level, the drain and gate electrically connected to a reference source with the front Symbol converter insulated gate field effect transistor and while causing a voltage level to gate Bok to the Suitsuchi insulated gate type field effect transistor is shut off when holding the voltage level on the capacitor, the gate of the conversion insulated gate Bok-type field effect transistor and which separating the capacitance connected to the drain.

- In an embodiment, the driving unit includes a gate, a drain, a Bei example driving insulating gate type field effect transistor source and channel. The drive insulated gate Ichito field effect transistor passes a drive current having a current level corresponding to the accepted place it in the gate voltage level held in the capacitor to the light emitting element via the channel. Current level of the being and converting insulated gate field effect transistor evening gate and the gate of the drive insulated gate field effect transistor is connected directly to form a current mirror first circuit, the current level of the signal current drive current door is in such a proportional relationship. The drive insulated gate field effect transistor is formed in the vicinity of the converting insulating gate one preparative field effect transistor corresponding in the pixel, the variable changeover insulated gate field effect transistor equivalent threshold voltage a. The driving absolute Engeichito type field effect transistor operates in the saturation region, the driving current is supplied in accordance with the difference between the voltage level and the threshold voltage applied to its gate to the light emitting element.

In another embodiment, the drive unit is shared time division manner the conversion insulated gate field effect transistor between the conversion unit. The driving unit includes a driving said converting insulated gate field effect transistor after completing the conversion of the signal current the receiving part or al disconnected, the voltage level held in the conversion insulated gate field effect transistor while applying to the gate the driving current is supplied through the channel to the light emitting element. The drive unit comprises a control means for blocking unwanted current flowing in the light emitting element via the conversion insulated gate field effect tiger Njisu evening except during driving. It said control means to cut off the unnecessary current by controlling a voltage between terminals of two-terminal type light emitting element having a rectification action. Alternatively, said control means comprises an inserted control insulated gate field effect transistor between said converting insulated gate type field effect transistor and the light emitting element, the control insulating gate type field effect transistor, rendered non-conductive state during the non-driving of the light-emitting element disconnect said converter insulated gate field effect transient scan evening and the light emitting element, at the time 駔動 of the light emitting element is switched to the conductive state. In addition the control means may control the time and placing the light emitting element in the non-emission state by interrupting the drive current during non-driving, the ratio of the time that the placing the light emitting element by flowing a drive current during driving the light emitting state and to allow controlling the brightness of each pixel. Optionally, the drive unit, in order to stabilize the current level of the drive current flowing to the light emitting element through said converting insulating gate one preparative type field effect transistor, wherein the conversion insulating gate one preparative electric field having a potential fixing means for fixing the drain potential relative to the source of the effect transistor.

In development of the invention, the receiving unit, the converting unit and the driving unit constitute a current circuit combining a plurality of insulating gate Ichito type field effect transistors, one or two or more insulating gate type field effect transistor has a double gate structure for suppressing current leakage in the current circuit. The driving unit includes a gate, a drain and comprising an insulated gate field effect transistor having a source over scan, the light emitting element a drive current passing between the drain and the source in response to the applied voltage level to the gate flushed, the light emitting element is a two-terminal type having an anode and a power cathode, the force Sword is connected to the drain. Alternatively, the driving unit includes a gate, wherein the insulating gate one preparative type field effect transistor having a drain and a source, wherein the light emission drive current passing between the drain and the source according to the applied voltage level to the gate flowing in the element, the light - emitting element is a two-terminal having an anode and a power cathode, the anode is connected to the source. Further, the voltage level held by the converting part includes an adjusting means for supplying before SL driver and downward adjustment, Ru tightening the black level of the luminance of each pixel. In this case, the driver has a gate, a drain and includes an insulated gate field effect transistor having a source, said adjustment means, and raised the voltage between the gate and the source of the insulated gate field effect transistor gate the the applied voltage level adjusted downward. Alternatively, the driving unit includes a gate, a drain and includes an insulated gate field effect transistor having a source, the converting part is provided with a capacitor for holding and the voltage level is connected to the gate of the thin film transistor , the adjusting means comprises an additional capacitor connected to the capacitor, the voltage level to be applied to the gate one Bok of the insulated gate field effect transistor held in the capacitor adjusted downward. Alternatively, the driving unit includes a gate, includes an insulated gate field effect transistor to have a drain and a source, the converting unit is connected to the gate of one end the insulated gate field effect transistor and the voltage level of the coercive has a capacity of lifting, it said adjusting means adjusts the potential of the other end of the said capacitance when holding the voltage level converted by the converting unit to the capacitive, of the insulated gate field effect transistor the voltage level to be applied to the gate downregulating. Incidentally, the light emitting element is an organic elect port ELEMENT example o

The pixel circuit of the present invention has the following characteristics. First, the writing of brightness information into the pixels, carried out by passing the magnitude of the signal current corresponding to the luminance data line, the source-drain of the current pixel inside the converter insulated gate field effect transistor flows between, produce results gate-source voltage corresponding to the current level. Secondly, the gate-source voltage generated by the or gate potential, is formed inside the pixel, or be retained by the action of parasitic capacitive present, write end after a predetermined period of time, generally the keep the level. Third, the current flowing through the OLED, it and connected to said converting insulated gate field effect transistor itself in series, Moshiku it The a separately provided inside the pixel the transformation insulated gate field effect transistor evening is controlled by a gate commonly connected drive insulated gate field effect transistor, the gate-source voltage when the OLED drive, the gate and the source of the first conversion insulated gate field effect transistor Ji raw by Toku徵roughly equal arbitrariness between voltage. Fourth, at the time of writing, the data line and the pixel inside the take-insulating gate Ichito type field effect transistor controlled by the first scan line is conductive, Suitsuchi insulating controlled by the second run 査線between the gate and drain of the converting insulated gate field effect transistor with a gate-type field effect transistor is Ru are short-circuited. In summary, against to the luminance information in the conventional example are given in the form of a voltage value, that in the display device of the present invention is given in the form of a current value, i.e., wherein significant that a current writing inclusive type it is.

The present invention does not depend on variations in characteristics of TFT as already mentioned, although the precise purpose of flowing a desired current to 0 LED, by the first to fourth aspect, the present aim can be achieved explain why below. The following conversion insulated gate field effect transistor of the TFT 1, drive insulated gate one preparative field effect transistor TF T2, take-insulated gate field effect transistor TFT 3, switch insulating gate Ichito field effect the transistor referred to as TFT4. However, the present invention is not limited to the TFT (thin film tiger Njisu evening), it can be adopted widely insulating gate one preparative field effect transistor such as a single crystal silicon transistor formed over a single crystalline silicon substrate or a SO I substrate as an active element it is. Now, when writing the luminance information, a signal current flowing through the TFT 1 I w, gate-source voltage developed as a result TFT 1 and Vg s. Since time of writing is between the gate and the drain of the TFT 1 by TFT4 are short-circuited, TFT 1 operates in the saturation region. Therefore, Iw is found are given by the following equation.

I w = 1 · Cox 1 · W1ZL 1 2 (Vgs- Vt h 1) 2 ··· (3) wherein the meaning of each parameter Isseki is equivalent to the case (1). Next, when the current through the OLED and I dr V, I drv it is the current level is controlled by TFT 2 is connected to the 0 LED series. In the present invention, since the gate-source voltage (3) matches the type Vg s, assuming TFT 2 operates in a saturation region, the following equation holds.

I d rv = z2 'Cox2' W2ZL2Z2 (Vg s -V th 2) 2

... (4) The meaning of each parameter is equivalent to the case (1). The conditions for the thin film transistor evening insulated gate field effect type to operate in the saturation region, as the drain • source voltage Vd s, generally given by the following equation.

| Vd s |> | Vgs-Vt h | ... (5)

Here, the TFT1 and the TFT 2, because they are formed close inside a small pixel, considered virtually 〃 l = / z2, Cox l = Cox2, V th 1 = V th 2. Then, easily following equation from the time (3) and (4) it is derived.

I drv / Iw = (W2 / L2) / (Wl / L 1) ... (6)

Here it should be noted that, in equation (3) and (4), II, Cox, the value itself of the V th, the each pixel, each product itself or from varying for each production lot are common, ( since 6) does not include Isseki these parameters, the values ​​of I dr vZIw is that it does not depend on these variations in. For example, if the design and Wl = W2, L 1 = L 2, I dr I w = 1, i.e. I w and I drv is the same value. That regardless of the characteristic variation of the TFT, driving current I dr V flowing in 0LED, since exactly the same as the signal current Iw, can accurately control the light emission luminance of the OLE D as the result. While the above is an example, as described by the following examples, W 1, W2, LI, to set the ratio of how good connexion I w and I drv of L 2 is Ru determined freely, or Ru also der be used also the TFT 1 and the TFT2 in the same T FT.

Thus, according to the present invention, regardless of the characteristic variation of the TFT, it is possible to flow the correct current to OLED, according to a further (6), I w and I drv Togatan pure proportional it is also a great advantage in a relationship. That is, in the conventional example of FIG. 1, (1) as shown expression in a non-linear type and Vw and I dr V depending on the characteristics of the TFT, the voltage control of the driving side choice but complicated the resulting not. Further, (1) among the characteristics of the TFT shown in equation carrier mobility / z it is known to vary with temperature. In this case, in the conventional example according to (1), I drv is, thus resulting in light emission luminance changes in OL ED, but according to the present invention without such a concern, at stable to (6) the value of a given I drv a can be supplied to the OLED.

(4) is placed formula, but TFT 2 is assumed to operate in the saturation region, the present invention is effective also when T FT 2 is operated in the linear region. That is, when the TFT2 operates in the linear region, I d rw is given by the following equation.

I drv = / z2 - Cox 2 - W2 / L2 * {(Vgs -Vt h 2) Vd s 2-

Vd s 2 2/2} ... (7)

Vd s 2 is the drain-to-source voltage of the TFT 2. Here TFT 1, TF T 2 are arranged close, the resulting Vt h 1 = V th 2 = V th is made elevational one ones, (3), (7) Vgs from equation, V th and it can be erased, to obtain the following equation.

I drv = / z 2 - Cox 2 - W2 / L2 * {(2 I w L 1 / z 1 ■ C ox 1

• Wl) 1/2 Vd s 2- Vd s 2 2/2} ... (8)

Variations in this case, the relationship of I w and I drv, since but does not contain Vt h in equation (8) (6) shall not the simple proportional relationship as equation, Vt h the relationship of I w and I drv by (variations among variations and manufacturing port Tsu City of the screen) are left and right can be seen that there is no. That is, regardless of the variation of the V th, by writing Jo Tokoro of I w, it is possible to obtain the desired I drv. However, if the // and C o X is as varied in the screen, depending on these values, even when given a specific I w to the data line, the value of I drv determined from equation (8) and Baratsukuko since the, TFT 2 is desirably better to operate in the saturation region, as described above.

Further and by connexion controlling TFT 3 and TFT 4 on separate scan lines, at the time of completion of writing it is more preferable that the off state TFT4 prior to TFT 3. In the pixel circuit according to the present invention, TFT3 and TFT4 do not have to be the same conductivity type, the TFT3 and the TFT4 are the same or different conductivity types, the respective gate controlled by separate scanning lines, write end sometimes it is desirable to TFT4 prior to TFT 3 is configured so as to of I state.

Further, TFT 3, when controlling TFT 4 of the separate scan lines may be after completion writes, the TFT 4 by the operation of the scanning line and 0 n state, turns off the picture element unit of scanning line. This is because the gate and drain of TFT 1, and gate one bets TFT 2 is connected, TFT 2 of the gate voltage threshold of TFT 1 (Re This is approximately equal to the threshold value of the TFT 2), and the TFT 1, TFT 2 both because the off state.

Thus, by changing the timing of the turn-off signal, it is possible to easily freely change the brightness of the display device. A second scan line minute only for each color of RG B, if separately controlled even color balance adjustment can be performed easily.

Further, when it is desired to obtain the same time average brightness, the drive current of the particular good connexion emitting element 0LED reduce the proportion of light emission period (du ty) can be increased. BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a circuit diagram showing an example of a conventional pixel circuit.

Figure 2 is a block diagram showing a configuration example of a conventional display device. Figure 3 is a sectional view showing a configuration example of a conventional display device.

Figure 4 is a sectional view showing another configuration example of a conventional display device.

Figure 5 is a circuit diagram showing an embodiment of a pixel circuit according to the present invention.

Figure 6 is a waveform diagram showing an example of waveforms of signals in the embodiment of FIG. Figure 7 is a Proc diagram showing a configuration example of a display device using a pixel circuit according to the embodiment of FIG.

Figure 8 is a circuit diagram showing a modification of the embodiment of FIG.

Figure 9 is a circuit diagram showing another embodiment of a pixel circuit according to the present invention.

Figure 1 0 is a waveform diagram showing an example of waveforms of signals in the embodiment of FIG. Figure 1 1 is a circuit diagram showing a modification of the embodiment of FIG.

Figure 1 2 is a circuit diagram showing a modification of the embodiment of FIG.

Figure 1 3 is a circuit diagram showing a modification of the embodiment of FIG.

Figure 1 4 is a circuit diagram showing a modification of the embodiment of FIG.

Figure 1 5 is a circuit diagram showing another embodiment of a pixel circuit according to the present invention. Figure 1 6 is a circuit diagram showing a modification of the embodiment of FIG 5.

Figure 1 7 is a circuit diagram showing a modification of the embodiment of FIG 5.

Figure 1 8 is a circuit diagram showing another embodiment of a pixel circuit according to the present invention.

Figure 1 9 is a circuit diagram showing a modification of the embodiment of FIG 8.

2 0 is an illustration of the order to explain the case where the extinction of the pixel in scan line units in the circuit of FIG 9.

Figure 2 1 is a circuit diagram showing a modification of the embodiment of FIG 9.

2 2 is a circuit diagram showing a modification of the embodiment of FIG 9.

Figure 2 3 is a diagram showing a current characteristic through the conversion transistor of the circuit and the conventional circuit of FIG 2.

Figure 2 4 is a circuit diagram showing a modification of the embodiment of FIG 9.

2 5 is a diagram showing a data line potential of the circuit and the conventional circuit of FIG 3. Figure 26 is a circuit diagram showing another embodiment of a pixel circuit according to the present invention. Figure 27 is a circuit diagram showing another embodiment of a pixel circuit according to the present invention. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter will be described an embodiment of the present invention with reference to the accompanying drawings.

Figure 5 is an example of a pixel circuit according to the present invention. This circuit, conversion transistor TFT 1 which signal current flows, other driving transistor evening TFT 2 which controls the drive current flowing through the light-emitting element comprising an organic EL element or the like, by the control of the first scan line scan A connexion take-transistor TFT 3 for connecting or disconnecting the pixel circuit and the data line data, the second scan line scan switch transistor TFT 4 for short-circuiting the gate and the drain of the TFT 1 in the write period under the control of B, TFT 1 the gate-source voltage, capacity to hold even after the completion of writing (and the light emitting element 0 consists LED. Figure 5 TFT3 is PMOS, although other transistors are configured by NMO S, which is an example a is need not necessarily be executed in the street. capacitance C is connected to the one terminal to the gate of the TFT 1, although the other terminal is connected to GND (ground potential), it is not limited to GND May be a constant potential at will. 0 LED anode (anode) is connected to a positive supply potential Vd d.

Basically, the display device according to the present invention, a scanning line drive circuit for sequential selecting the scanning lines scan A and scan B, sequential data lines and generates a signal current I w having a current level corresponding to the luminance information a data line driving circuits including a current source CS for Kyo耠 the data, each scan line sc anA, with is arranged at the intersection of sc an, B and the data line data, light emission by receiving the supply of the drive current and a plurality of pixels including a light emitting element 0 LED current driven to. As a feature, the pixel shown in FIG. 5, once the voltage and receiving unit, the current level of the fetched signal current I w capturing signal current I w from the data line data when the scanning line sca nA is selected a conversion unit that holds the conversion level, a driving current having a current level corresponding to the voltage level held consisting of a drive unit to flow to the light emitting element OLED. Specifically, the variable section, the gate includes a source, a conversion film transistor capacitor TFT 1 having a drain and a channel, and a capacitor C connected to the gate Bok. Conversion film Trang register T FT 1 is a voltage level which is converted by passing the signal current I w captured by the receiving unit to the Chiyane Le is generated in the gate one Bok, capacitance C is generated in the gate It holds the voltage level. Further, the conversion unit includes a Suitsuchi TFT TF T4 inserted between the drain and the gate conversion use thin film transistor T FT 1. Switch use thin film transistor TFT4 becomes conductive when converting the current level of the signal current Iw to the voltage level, converting the thin film transistor TFT 1 drain and gate of the voltage level to be electrically connected relative to the source of the TFT 1 It gives rise to the gate. Also, it switches use thin film transistor TFT4 is cut off when holding the voltage level on capacitor C, disconnect the capacitor C connected gate and to the conversion use thin film transistor TFT 1 from the drain of the TFT 1.

Furthermore, the driving unit includes gain one Bok, drain, a driving thin film transistor TFT 2 having the source and channel. Driving thin film transistor TFT 2 passes a drive current to have a current level acceptance accordingly the voltage level held at the capacitor C to the gate one Bok to the light emitting device 0 LED via the channel. Conversion film transient gate one Bok and directly with the gate of the driving thin film transistor T FT 2 of static TFT 1 to be connected to constitute a force rent mirror circuit, the current level of the signal current I w and the current level of the driving current There was set to be proportional relationship. Driving thin film transistor TFT2 is formed in the vicinity of the conversion use thin film transistor TFT 1 that corresponds in a pixel, having the same threshold voltage and variable-over the thin film transistor TFT 1. Driving thin film transistor evening TFT 2 operates in a saturation region, the driving current is supplied in accordance with the difference between the voltage level and the threshold voltage applied to its gate to the light emitting device 0 LED.

The driving method of the present pixel circuit is as follows, showing the driving waveforms in Fig. First, when writing a selected state first scan line scan A, the second scan line scan B. In the example of FIG. 5, the low-level first scan line scan A, a second scan line scan B to the high level. By connecting the current source CS to the data line data in a state where both scanning lines are selected, the signal current I w flows in accordance with luminance information TFT 1. Current source CS is a variable current source controlled in accordance with the luminance information. At this time, since the gate-drain of TF T 1 is electrically shorted by the TFT 4 (5) equation is established, TFT 1 operates in the saturation region. Therefore, between the gate-source voltage Vg s given occurs in equation (3). Next, a first scan line scan A, a second scan line sca Itabeta deselected. Specifically, first, a TFT 4 and the off state and the second scan line scan B as a low level. This Yotsute Vg s is held by the capacitance C. Next With 0 ff state a first scan line sc anA as high, since the pixel circuit and the data line data are electrically isolated, then to another pixel through the data line data it is as possible out of writing. Here, the current source data CS is outputted as the current level of the signal current, the second scan line scan B is required to be effective at the time of the non-selected, then any level (e.g., the next pixel it may be of the write data). TFT2 is TFT 1 and the gate and source are commonly connected, and so are formed close together inside a small pixel, if TFT 2 is operating in the saturation region, the current flowing through the TFT2 (4) It is given in equation, which that is, the drive current I drv flowing through the light emitting element OLED. To operate the TFT 2 in the saturation region, as even in consideration of the voltage drop at the light emitting element OL ED noted that equation (5) holds, it may be given a sufficient positive potential V dd.

According to the above drive, the current I drv flowing through the light emitting element OLE D the preceding (6)

I drv = (W2 / L 2) / (Wl / L 1) - Iw

Given, regardless of the characteristic variation of the TFT, a value proportional to accurately Iw. For a proportionality constant (W2ZL2) (W1ZL 1), it can be determined to an appropriate value in consideration of various factors. For example, a relatively small value the current value to be supplied to the light emitting element OLE D of one pixel, when the example is a 1 O nA, as the actual problem, such a small current value accurately as the signal current I w be supplied, it is difficult Ikoto. In such a case, for example, (W2ZL 2) Z (Wl / L 1) = 1 if 1 0 0 become as designed, (6) 1 A, and the the current write operation easily as I w from equation become.

In the above example, TFT 2 is assumed to operate in the saturation region, the present invention is effective also when operating in the linear § region as described above. That is, when operating in TFT 2 Galli Nia region, the current I drv flowing through the light emitting element OLE D above (8)

I drv = / 2 - C ox 2 - W2 / L 2 * {(2 I w L \ / 1 · C ox 1

• Wl) 1/2 Vd s 2 - Vd s 2 2/2}

It is given by. In the above equation, Vd s 2 is determined by the current I drv flowing through the light emitting element OLE D and current - voltage characteristics of the light-emitting element OLE D. Given the characteristics of the potential and the light-emitting element OLE D of vd d is that a function of I drv only. In this case, 1 and 1 (11 * relationship, but not a simple proportional relationship as equation (6), given the I w, is I dr V satisfying the expression (8), an OLED becomes 驟動 current flowing. since the equation (8) does not contain V th, I due to variations in V th (variation of variations and manufacturing port Tsu each preparative for each pixel in the screen) w and I it can be seen that the relationship drv will not be dependent. that is, regardless by the variation of the V th, by writing predetermined I w, it is possible to obtain the desired I drv. Thus, TFT 2 when operating the linear region, because it requires a small TFT2 the drain-source voltage to Te ratio base case of the saturation region, power consumption is possible.

Figure 7 is an example of a display device configured by arranging the pixel circuits of FIG. 5 in a matrix. The operation thereof will be described below. First, a vertical start pulse (VS P) is input to the scanning line driving circuits B 23 containing same shift register and the scan line driver circuit A 2 1 including shift register. Scanning line drive circuit A 2 1, after the scanning line drive circuit B 23 is that received VSP, vertical clock (VCKA, VCKB) first run each in synchronization with 査線 sc anA l~scan AN, a second scan sequentially selects a line sc anB l~sc an BN. Current source CS corresponding to each data line data is provided to the data line driving circuit 2 in 2, and drives the data line at a current level corresponding to the luminance information. Current source CS is made the voltage Z-current converter circuit shown, and outputs a signal current according to the voltage representing the brightness information. Signal current flows to a pixel on a selected scanning line, current programming is performed by scanning line basis. Each pixel starts to emit light at an intensity corresponding to the current level. However, VCKA, compared VCKB, are slightly retarded cast by the delay circuit 24. Thus, as shown in FIG. 6, the second scan line sc ANB becomes unselected prior to the first scan line scan A.

Figure 8 is a modification of the pixel circuit of FIG. This circuit, the TFT2 in Fig. 5, a double gate structure connecting the two transistors TFT2 a and TFT 2 b in series, also the TFT4 in Fig. 5, TFT4 a two tiger Njisu evening series of TFT4 b it is obtained by the double-gate structure that is connected to. TFT 2 a and T FT 2 b and TFT 4 a and TFT 4 b than being commonly connected gates, basically the same operation as a single transistor, the pixel circuit of the result 8 also the same operation as the pixel circuit of FIG. However, a single transistor, in particular T FT, there is a case where the leakage current at the OFF time increases by some defect or the like. Therefore, it is preferable to employ a redundant configuration to connect a plurality of transistors in series if it is desired to suppress the leakage current. This way, even if one of the transistors leaks evening, the smaller the leakage of the other transistor, because the leakage as a whole can be suppressed. Taking the configuration as TFT 2 a and TFT 2 b in FIG. 8, by the leakage current is small, resulting in benefits that Viewing black level quality of better when the luminance zero (current zero). Further Taking the configuration described TFT 4 a and TF T4 b, produce the benefits of Ru can stably hold the luminance information written in the capacitor C. These will, can be similarly configured with three or more transistors in series. In this modification as described above, the receiving unit, the converting unit and the driving unit constitute a current circuit combining a plurality of thin film transistors TFT, 1 or 2 or more of the thin film transistor (TFT) in the current circuit It has a double gate structure for suppressing current leakage.

Figure 9 is another embodiment of the pixel circuit according to the present invention. This circuit, the transistor TFT 1 itself signal current I w flows, it is a feature to control the current I drv flowing through the light emitting element OLE D. In the pixel circuit shown in FIG. 5 described above, if the TFT1 and TFT2 properties (such as Vt h and //) are slightly different from each other, to be precise without satisfied (6), I w and I drv Although exactly may not proportional, such a problem does not occur in principle in the pixel circuit of FIG. The pixel circuit of Figure 9, another T FT 1, the first scan line scan A transistor TFT 3 for connecting or disconnecting the pixel circuit and the data line data by the control of the write control of the second scanning line sc ANB capacity order to also retain transient scan evening TFT 4, write end after the gate-source voltage of the TFT 1 for short-circuiting the gate one bets and drain of the TFT 1 during C, and the light emitting element OLED made of the organic EL device It is provided. Holding capacity C has one terminal connected to the gate of the TFT 1, although the other terminal is connected to GND (ground potential), or any fixed potential instead of GND. The anode of the light emitting element OLE D (anode) is connected to the anode line A arranged in each scanning line. TFT3 is PM0S, although other transistors are configured by NM0S, this is an example, not necessarily this street.

In this embodiment as described above, the driving of the pixel circuit has a conversion thin film transistor TFT 1 time divisionally shared between the converter unit. State, that is, the drive unit, which is a driving conversion use thin film transistor TFT 1 after completing the conversion of the signal current I w separately from the receiving unit, applying a voltage level held in the gate one preparative transformation for thin-film transistor TFT 1 in the driving current is supplied through the channel to the light emitting element OLE D. Further, drive kinematic unit comprises a control means for blocking unwanted current flowing through the light emitting element OLE D via the conversion use thin film transistor TFT 1 at times other than the drive. In this example, the control unit cuts off the unnecessary current light-emitting element 0 LED terminal voltage of the two-terminal having a Ryusaku integer controlled by Anodo line A.

Driving method of the times! ^ Are as follows, showing the drive waveform in Figure 1 0. First, when writing a selected state first scan line scan A, the second scan line scan B. In the example of FIG. 1 0, and the first scan line scan A and the low level, the second scan line sc an, B high. Here it connects the current source CS of the current value I w to the data line data, in order to prevent the Iw from flowing via the light emitting element OLED, Anodo line A of the light emitting element OLED light emitting element OLED becomes 0 ff state keep a low level (e.g., GND or negative potential) so. Thus, the signal current I w flows through the TFT 1. At this time, since the gate 'drain of TFT 1 are electrically short-circuited by TFT 4 (5) equation is established, TFT 1 operates in the saturation region. Accordance connexion, that between the gate and source resulting voltage Vg s given by (3). The first scan line scan A to the next, the second scan line scan B to a non-selected state. For details, first TFT4 and the 0 ff state a second scan line sc ANB as low level. This Yotsute TFT 1 resulting Vg s is held in the capacitor C. Then Ding the first scan line SC 311 eight as Korebe Le? By Ding 3 0 ff state, since the pixel circuits and the data 棣 data are electrically disconnected, then it is possible to perform the writing to another pixel through the de Isseki line data. Here, the Isseki de supplies current source CS as the signal current Iw, but the second scan line sc ANB is required to be effective at the time of the non-selected, then any value (e.g., the next pixel writing data of the - evening) and is may be. Then, the anode line A high. Since the TFT1 of Vg s is held by the capacitor C, if the TFT 1 operates in the saturation region, the current flowing through the TFT 1 coincides with I w of (3), which is namely, light emitting element 0L ED a driving current I dr V flowing through. That signal current Iw coincides with the drive current I drv of the light emitting element OLED. To operate the TFT 1 in the saturation region, as even in consideration of the voltage drop at the light emitting element OLED Note that (5) is established, it may be given a sufficient positive potential to the anode line A. According to the above driving, it flows also the OLED current I dr V does not depend on variations in characteristics of TFT, matching exactly I w. Figure 1 1 is a modification of the pixel circuit shown in FIG. In Figure 1 1, rather than Anodo line as shown in FIG. 9, one anode of the light emitting device OLED connected to the constant positive potential Vd d, the drain of TFT 1 and the light emitting element OLED force Sword (cathode) P-channel transistor TFT 5 is inserted between the. The gate of the TFT 5 is controlled by the drive line drv arranged in each scanning line. The purpose of inserting the TFT 5 is a TFT5 the drive line drv as high during the data writing and the off state is to signal current Iw is prevented from flowing through the light emitting element OLED. After writing lump can is completed, the TFT5 the dr V as a low level and on state, the driving current is supplied I drv to the light emitting element OLED. Everything else similar der this example the circuit of Figure 9 includes a TFT 5 connected to the light emitting element 0 LED in series, to cut off the current flowing to the OLED in response to a control signal Ru applied to TFT 5 It is possible . Control signal is applied to the gate of the TFT5 included in each pixel on the same scanning line through the Sodosen dr V provided in parallel with the scan lines scan. In this example, TFT 5 is inserted between the light emitting element 0L ED and TFT 1, it is possible by control of the gate potential of the TFT 5, to On'noofu current flowing through the light emitting device OLED. According to this example, is the time duration TFT 5 is you are turned on by the emission control signal to each pixel emits light. As the on-time and hand, when the time for one frame and T, time ratio i.e. duty pixel is emitting light is T generally. Temporal average brightness of the light emitting element changes in proportion to the duty. Therefore, by changing the O emissions time hand controls the TFT 5, it is also possible to variably adjust the screen brightness of the EL display conveniently and wide, range. In this embodiment as described above, the control means comprises a control thin film transistor TFT 5 that is inserted between the conversion use thin film transistor TFT 1 and the light emitting element 0 LED. Controlling thin film transistor TFT 5, at the time of non-driving of the light emitting element 0 LED detach nonconductive such as go-between conversion use thin film transistor TFT 1 and the light emitting element OLED, during the drive switches to the conductive state. Furthermore, the control means, and off-time of placing the light emitting element OLED to interrupt the driving current during non-driving to the non-luminescent Fushimi state, O down time by supplying a drive current during driving placing a light emitting element 0 LED in the light emitting state and controlling the rate, it can control the brightness of each pixel. According to this embodiment, after the display device writing the luminance information on each pixel in each scanning line, before brightness information of a next scanning line cycle (frame) is Ru newly written to each pixel in the scan line basis the light-emitting elements included can be turned off at once. According to this, it would be adjusted the time to turn off the lighting of the light emitting element after writing of the brightness information. That is, you can regulate the proportion of light emission time in one scanning cycle (duty). Adjustment of the light emission time (duty) corresponds to adjusting the drive current supplied to equivalently each light emitting element. Therefore, it is possible to adjust simply and freely display brightness by Rukoto to adjust the duty. More importantly, by setting the duty appropriately, it is possible to increase the equivalently drive current. For example, when the duty to 1 Bruno 1 0, equivalent brightness can be obtained even if the drive current to the 0 times. Signal current corresponding to this if the drive current to 1 0 times in order to be able to also to 1 0 times, it is not necessary to deal with the weak current level.

Figure 1 2 is another modification of the pixel circuit shown in FIG. In Figure 1 2, TFT 6 between the drain of the TFT 1 and the cathode of the light emitting element OLED is inserted, between the gate and drain of the TFT 6 TFT 7 is connected, the gate thereof a second scan line scan B It is controlled by. Is auxiliary capacitance C 2 is connected between the source and the GND potential of the TFT 7. While the driving method of this circuit is based on the manner similar to the case of the pixel circuit of FIG. 9 will be described below. Incidentally, 驟動 waveform Ru der similar to the case of FIG. 1 0. First, at the time of writing, the first scanning line scan A in a state where the anodic line A arranged in each scanning line so no current flows through the OLED as a low level (e.g., GND or negative potential), the second When the scanning line scan B to the selected state, the signal current I w flows through TFT 1 and TFT 6. Both TFT both, since the gate-source are short-circuited by the TFT 4 and TFT 7, respectively which operate in the saturation region. Then the first scan line scan A, a second scan line scan B to a non-selected state. This is Vg s that occurred TFT 1 and TFT 6 above by are respectively held by the capacitor C and the auxiliary capacitor C 2. Then by setting the 0 ff state first scan line scan A, since the pixel circuit and the data line data are electrically isolated, then the writing to another pixel through the data line data be able to. Following a high level Anodo line A in. Since Vg s of TFT 1 is held by the capacitor C, if operating in TFT 1 is a saturation region, the current flowing through the TFT1 coincides with I w of (3), flows which ie to the OLED a current I dr V. In other words, where the signal current Iw coincides with the drive current I d rv of the light emitting element OLED, a description of the operation of the TFT 6. In the pixel circuit of FIG. 9, as described above, since the signal current Iw driving current of the light emitting element OLED are both determined Te TFT 1 Niyotsu, (3) and (4) I w = I dr V Met. However, this current I ds flowing through the TFT 1 is when given by equation (1) in the saturated region, i.e. Ru der case of the I ds does not depend on the voltage Vd s drain-source. In However actual transistor, even Vgs is constant, there is a case where I ds becomes larger as Vd s is greater. This pinch-off point near the drain moves to the source one scan side by Vd s increases, giving you decrease the effective channel length is, or so-called short channel effect, the potential of the drain is an effect on the channel potential the conductivity of the channel changes Te, Ru der for so-called back gate Ichito effect. In this case, the current flowing through the transistor I ds, for example ing by the following equation. I ds = 〃 · C ox · W / LX2 ( Vg s -V th) 2 * (1 + λ · Vd s) ... (9)

Therefore, I ds will depend on Vd s. Here, λ is a positive constant. In this case, in the circuit of FIG. 9, if V ds is the same between when driving and when writing does not coincide with the I w and I drv.

In contrast, consider the operation of the circuit of Figure 1 2. If you focus on the operation of the TFT 6 in FIG. 12, the drain potential is typically not the same between the time of driving time of writing. For example, in the case towards the drain potential at the time of driving is high, also increases Vd s of TFT 6, if Atehamere it to (9), even Vg s is constant between the time of driving and the time of writing, I ds is who at the time of driving is increased. Both have not matched Te I drv is summer greater than I other words. However, I dr V is flows through the TFT 1, in which case the voltage drop across the TFT 1 is increased, the drain potential (source potential of the TFT 6) is Noboru Ue. Vgs of the results TFT6 becomes small, which acts to reduce the I dr V. As a result, the drain potential of the TFT 1 (source potential of the TFT 6) can not vary greatly, if noted TFT 1, in the time of driving at the time of writing I ds is large it can be seen that does not change. That is, that the I w and I dr V coincides fairly accurately. To better perform this operation, since the T FT 1, TFT 6 together is good to reduce the dependence of I ds for Vd s, it is desirable to operate both transistors in the saturation region. Since inter when writing TF Tl, TFT 6 both gate and drain are short-circuited, irrespective of the Brightness data written necessarily operate in both of the saturation region. To operate in the saturation region even when driving, taking into account the voltage drop at the light emitting element ◦ LED Note TFT 6 is to operate in the saturation region, it may be given a sufficient positive potential to the anode line A. According to this driving, the current I dr V flowing through the light emitting element OLED, regardless by the characteristic variation of the TFT, matching exactly Iw than the embodiment of FIG. Driver of the present embodiment as described above, in order to stabilize the current level of the driving current flowing through the light emitting element OLED through the conversion use thin film transistor TFT 1, the source of the conversion use thin film transistor TFT 1 of drain on criteria as potential fixing means for fixing the potential has a TFT 6, TFT 7 and C 2.

Figure 1 3 is another embodiment of the pixel circuit according to the present invention. The pixel circuit, 9, 1 1, similar to the circuit of FIG. 1 2, transistor TFT1 themselves through which the signal current I w is, but to control the current I dr V flowing through the light emitting element OLE D, Fig 3 in is characterized in that the light emitting element OLED is connected to the source side of the TFT 1. That is, the driving unit of the present pixel circuit, a gate includes a thin film transistor T FT 1 having a drain and a source, the driving current passing between the drain and the source in response to the voltage level applied to the gate to the light emitting element OLE D flow. Emitting element OLE D is a two-terminal type having an anode and a power cathode, the anode is connected to the source. In contrast, the driving of the pixel circuit shown in FIG. 9, the gate includes a thin film transistor having a drain and a source, the driving current passing between the drain and the source in response to the voltage level applied to the gate Bok while flowing through the light emitting element, the light-emitting element is a two-terminal type having an anode and a power cathode, the cathode is connected to the drain.

The pixel circuit of this embodiment, other TFT 1, a first scan line scan transistor connecting or disconnecting the picture element circuit and the data line data under the control of the A TFT 3, during the writing period by the control of the second scanning line scan B P channel gate potential of the transistor TFT 4, TFT 1 for short-circuiting the gate-drain of the TFT 1, which is inserted between the capacitor C, the drain of the TFT 1 and the power source potential Vd d for holding even after completion of writing to the comprising the transistors TFT 5, and the light-emitting element the 0 LED. In Figure 1 3, one terminal of the capacitor C for holding the substantially same value Vg s of TFT 1 in the time of driving at the time of writing is connected to GND. The gate of the TFT5 is controlled by the drive line drv. The purpose of inserting the TFT5 is the TFT5 the drive line dr V as a high level when data is written to the off state, is to flow the signal current Iw Te to base the TFT 1. After the writing is completed, the TFT5 the dr V as a low level and 0 n state, the driving current is supplied I drv to the light emitting element OLE D. Thus, drive how are the same as the circuit of Figure 1 1.

Figure 1 4 is a modification of the pixel circuit shown in FIG 3. In the Figure 1 3 and 1 4, one terminal of the capacitor C, 1 3, GND, but the point that is connected to the source of FIG. 1 4 In TFT 1 differs, in any case, the time of writing no functional difference in that it retains the Vg s of the TFT 1 roughly the same value between the time of driving.

Figure 1 5 is a development of the pixel circuit shown in FIG. This pixel circuit includes a downward adjustment to adjustment means for supplying to the drive unit has been the voltage level held Te cowpea to the converter, tighten the black level of the brightness of each pixel. Specifically, the drive unit, the gate includes a thin film transistor TFT 2 having a drain and a source, adjusting means is applied to the gate and raised the voltage between gate one preparative and source of the thin film transistor TFT 2 and a constant voltage source E for downwardly adjusting the voltage level. That is, by connecting the TFT2 against the source scan slightly higher potential E than the source potential of the TFT 1, tighten the Kurorebe Le.

Figure 1 6 is a modification of the pixel circuit shown in FIG 5. In this example, the adjustment procedure consists additional capacitance C 2 to which the gate of the thin film transistor TFT 2 and connected to the second scan line scan B, the voltage level to be held in the capacitor C for applying the thin film transistor TFT2 of the gate the adjusted downward. That is, the second scan line scan B in the non-selected switches to a low level, can be reduced slightly the gate potential of the TFT 2 in the action of the capacitor C 2. The display device as described above, the scanning line scan A for selecting the pixel is disposed on the data line data Togama Torikusu like giving luminance information for driving the pixels, each pixel is supplied that the light emission element 0 LED which luminance varies with the amount of current, the writing means for writing the brightness information given al or controlled and the data line data by the scanning line scan a to the pixel (TFT 1, TFT3, .C) and , and a driving means for controlling the amount of current supplied to the light emitting element OLE D in response to write 'Mareta luminance information (TFT 2), write the scan line sc 763 an, a selection of luminance information for each pixel in state, it carried out by applying an electrical signal I w corresponding to luminance information to the data line data, luminance information written to each pixel in each pixel even after the scanning line scan a was non-selective and summer held, the light emitting element 0 luminance information LED held for each pixel Flip was a lighted at a sustainable in brightness, contains a writing means (TFT 1, TFT3, C) adjusted downward to drive means brightness information written by the adjustment means for supplying (TFT 2) (C2) and de, it can be tightened pulling the gloom level of brightness of each pixel.

Figure 1 7 is a modification of the pixel circuit shown in FIG 5. In this example, adjustment procedure, when holding the voltage level converted by the T FT 1 to the capacitor C, and adjusting the electric position of the one end of the capacitor C, and the voltage level to be applied to the gate Bok the TFT 2 down to adjust. That is, by controlling the source potential control line S connected to one end of the capacitor C, tighten the black level. The potential control line S, when a lower potential than that at the time of writing, it is because the gate potential of the T FT2 decreases slightly by the action of the capacitor C. Potential control line S is controlled provided in a unit of scanning line. Potential control line S is set to "H" level during the writing, the write end after "L" level. When AVs amplitude, capacitance existing in the gate of the TFT 2 (gate capacitance, other parasitic capacity) is referred to as Cp, TFT 2 of the gate potential is lowered AVG = AVs * C / only (C + Cp), Vgs decreases . H, the absolute value of L potential can be set to arbitrary.

1 8 shows another embodiment of the pixel circuit according to the present invention. Circuit of the present example, two take-thin film transistor TFT3 and switch use thin film transistor TFT4 is the same one conductivity type (PMOS in Fig. 8). And in this example, as shown in Figure 1 8, in the write operation of those gates is connected to the common scan line scan, it is possible to control a common signal. The display device in this case, the scan line driver circuit B 23 in the shown to display device in FIG. 7 is not required.

Figure 1 9 is a modification of the pixel circuit shown in FIG 8. In this example, FIGS. 5, 8, 9, similarly to the circuit shown in FIG. 1. 1 to FIG. 1 7, the same conductivity type P-channel TFT or we constructed two films for thin film transistor TFT 3 and switch for capturing a different scanning lines gate of transistors TFT 4, that is connected to the first scan line scan a 及 beauty second scan line scan B, respectively to separately control. The reason for controlling separately, as is because there is a case where by controlling the TFT 3 and TFT 4 of a common signal as in the example of FIG. 1 8 is the following disadvantage occurs.

When writing for the pixels of a scan line is completed, when the level of the scanning line scan increases in the example of FIG. 1 8, Inpi one dance TFT 3 is gradually inevitably increases, eventually virtually unlimited large, that is, 0 ί f state. Therefore the potential of the data line data is increased gradually in this process, the current source for driving the data line da ta when raised to a certain extent loses the constant current property, the current value decreases.

As a specific example, consider the example where the data line data is driven by a PNP transistor BIP 1 as shown in FIG. 1 8. Constant value the current flowing through the base I b, when the current amplification factor) 8 Tiger Njisu evening IBIP 1, if it takes some voltage between collector evening-emitter evening transistor BIP 1 (e.g. 1 V) is, transistor motor BIP 1 operates as substantially a constant current source, the current size of the II b is supplied to the data line data. However, at the time of completion of writing, it continues to increase the potential of the data line when the impedance of the TFT3 rises, the transistor BIP 1 loses the constant current property enters the saturation region, the driving current is reduced than ^ 8 I b. If this time TF F 4 is in the on state, the current value this reduced flow in the TFT 1, will not correctly desired current value is written.

Therefore, more be TFT3 and TFT4 separate signal line, i.e. each of the first scan line sc anA, controlled by a second scan line sc ANB, the TFT4 prior to TFT 3 at the time of completion of writing a 0 ί f state desirable. In the pixel circuit according to the present invention, TFT3 and TFT4 do not have to be the same conductivity type as in the examples described above, the TFT3 and the TFT4 are the same or different conductivity types, the respective gate scan A and Gyoshi control by different scan lines that scan B, at the time of completion of writing it is desirable TFT 4 prior to TFT 3 is configured so as to o ί ί state. This also same applies Oite to the aforementioned embodiments explained with reference to the drawings.

Further, TFT 3, TFT 4 separate scanning lines sca nA to, when by connexion controlled sc ANB after completion of writing, the TFT4 by the operation of the second scan line scan B and on state, the pixel unit of scanning line it can be turned off. This is because the gate one bets' drain of TFT 1, and the gate of the TFT 2 is connected, the gate voltage of the TFT 2 is T FT 1 threshold (which is approximately equal to the threshold value of the TFT 2) becomes This is because TFT 1, TFT 2 both become off state. The waveform of the second sca nB, as shown in FIG. 20 (b), may be given a pulsed off signal, a continuous light-off signal as sc ANB 'shown in FIG. 20 (C) it may be given

0

Thus, by changing the timing of the turn-off signal, it is possible to easily freely change the brightness of the display device. Divided second scan line scan B for each color of RG B, if separately controlled even color balance adjustment can be performed easily. Further, when it is desired to obtain the same time average brightness, the particular good connexion emitting element 0 LED driving current to reduce the proportion of light emission period (du ty) can be increased. Since this also means that handle large write current or by itself, realize the write drive circuit to de Isseki line data are facilitated, shortened write required time. The moving image quality is improved by the light emission duty to about 50% or less.

Further, FIGS. 5, 8, 9, similarly to the circuit shown in FIG. 1. 1 to FIG. 1 8, the circuitry of FIG. 19, a and take-thin film transistor TFT3 and the conversion use thin film transistor TFT 1 as different conductivity types there. For example if the conversion use thin film transistor TFT 1 is N Ji Yanerutaipu, and a take-thin-film transistor TFT 3 as a P-channel type. This is due to the following reasons.

That is, when configuring the constant current drive circuit for driving the data line, the potential fluctuation of the data line is preferably as small as possible. This is because, as described above, the variation width of the data line conductive position is wide, on the data line driving circuit is easily constant current property is lost, also increases the amplitude of the scanning line sca nA for reliably onzo ff the TFT3 This is because it is disadvantageous in terms of power consumption.

Therefore, it is desirable that the voltage drop of the route from the data line via the TFT 3, TFT 1 reaches the ground is small. Therefore, in the example of FIG. 1 9 whereas TFT 1 is NMOS, and a PMOS the TFT 3, to suppress rather small voltage drop in the TFT 3. That voltage drop in the TFT 3, since the value of the write current I w is the maximum-out maximum bets, the voltage drop at the TFT3 when the write current I w is in order to reduce the amplitude of the data line is at the maximum it should be small. In the example of FIG. 1 9, when the write current I w is large also increases the potential of the data line in response to it, also increases the absolute value of the gate 'source voltage of the TFT 3 with it, the impedance of the TFT3 is acting on the down direction. In contrast, if the TFT3 is a NMOS, the write current I w is a better direction in which the gate-source voltage decreases enough to increase the impedance of the TFT3 is cause to rise, the rise of de Isseki line potential It tends to cause. Similarly, the case where the TFT1 in PMOS TFT 3 is better to configure in NMOS.

The conductive type of the TFT4 is be the same as or different from the TFT 3 are possible practical arrangement, if the same first scanning line scan A and the second scanning line sc an, B and the common potential in order to easily driven, more desirable.

Figure 21 is a modification of the pixel circuit shown in FIG 9. Although the pixel circuit according to the present embodiment is in the equivalent circuit manner is similar to the pixel circuit shown in FIG. 1 9, driving the conversion use thin film transistor TFT 1 of the channel width (W) and channel length (L) Ho ratio WZL thin Tran THIS evening the point that is set larger than the TFT2 of WZL different from the circuit of FIG 9. Why the WZL of TFT 1 is set larger than the WZL of TFT 2 as this is for reliable end the writing. This will be described using specific numerical values ​​/ JP00 / 04,763 below.

As a practical numbers, the maximum brightness 200 [cd / m 2] The size of the light emitting surface per pixel 1 00 [ΖΖΙΏ] X 1 00 [m] = 1 e - 8 [m 2], the light emission efficiency 2 [cd / When a], the drive current of the light emitting element OLE D at the maximum brightness 200 X 1 e - a 8/2 = 1〃 a. When you'll control 64 gradations, current values ​​electrostatic corresponding to minimum tone becomes 1 ^ ΑΖ64 = 1 6 [η Α] extent, it is extremely difficult to accurately supplying such a small current value. Further, since the TFT 1 is operating at a high impedance state, the circuit under the influence of such a parasitic capacitance of the data line da ta state takes a long time to stabilize, to finish writing in a predetermined scanning line period there is that you can not.

As shown in FIG. 21, if WZL = 1 00/1 0, TFT2 of WZL = 5/20 of TFT 1, the ratio of WZL 40 next, in order to obtain a 0 LED drive current 1 6 n A the write current to be supplied to the data line data becomes 1 6 nAx 40 = 640 nA, and the real numbers, it is possible to finish writing reliably. If TFT 1 and TFT 2 is formed of a plurality of transistors, it is obvious that taking into account the effective WZL should the above calculation.

Figure 22 is a development of the circuit shown in FIG 9. This pixel circuit is connected to the leak element LEK 1 between each data line data and a predetermined potential, thereby increasing the speed of black writing.

In the current writing type pixel circuit, a case of writing "black" corresponds to when the write current is zero. In this case, "white" level to the data line in the immediately preceding scan line cycle, a relatively large current is written, when the data line conductive position had become a relatively high level as a result, the "black" Immediately there is a need for a long time to write. The TFT 1 is because writing "black", the initial charge stored in such capacity C d of de one data line is that being Day scan charged, down the data line potential TFT 1 threshold the higher the I impedance of T FT 1 comes near, as shown characteristic curve ① in the figure 23 showing the current characteristics of the flow of TFT 1, "black" writing is not completed forever in theory. Since in reality is not performing writing a finite time, which is "gloom" level complete precipitation Manai, it appears as a so-called black floating phenomenon, reduce the contrast of the image. Therefore, in the circuit of Figure 22 is re one click element LEK 1 between the data line data and the ground potential GND, and specifically connects the NMOS transistor, the Vg has given a certain bias. Accordingly, as shown by the characteristic curve ② in FIG. 22, the "black J writing reliably completed. May be like a simple resistor as the leak element LEK 1, de Isseki lines in that case" white "when writing When the potential is raised, increasing the current flowing in proportion to the resistance, which leads to deterioration of reduction and power consumption of the current flowing through the TFT 1. in contrast, if operating the NMOS in the saturation region constant since the current operation, such adverse effects can be suppressed small. Incidentally, also the leak element consist of TFT, Oh it may be constituted by separate external components to the TFT process.

Figure 24 is a development of the circuit the circuit shown in FIG 9. This pixel circuit is connected to the initial value setting device PRC 1 between each data line da ta and a predetermined potential, performs initial value setting of the data line prior to writing by the operation of the device, a high speed write thereby achieving the reduction.

In the pixel of the current writing type, sometimes it needed a long time when writing gray near black. The potential of the data line in FIG. 25, the write start time indicates a case where 0V. In this, in case of writing "black" in the immediately preceding scan line cycle, if the threshold V th 1 of TFT 1 of the written pixel is 0 V as low as about, when the black writing some it has, like there are, may occur when having a leak element for-out 黑浮 as described above 对策.

In the conventional circuit, since the writing gray near the 0V initial value to "black", i.e., a very small current value, takes a long time to reach the equilibrium potential VBLA. For example it is conceivable to not reach the threshold of TF T 1 within a predetermined write time as indicated by a characteristic curve ① in the figure 25, in this case TFT 2 also turned off, not written correctly Gray, display image is in a state of so-called black crushed

O

In the circuit of Figure 24, the initial value set between the data line and the power supply potential Vd d - Connect the PM_〇_S transistor as (Purichiya di) element PRC 1, and the gate potential Vg, the first write cycle It has given a pulse. The data line potential as indicated by the characteristic curve ② in the figure 25 rises above the threshold V thl of TFT 1 This BALS application, then the balance of the operation of the write current I w and pixel inside the TFT since converges relatively quickly toward the determined equilibrium potential VBLA, correct Brightness data writing is possible with high speed. Incidentally, it can also be constituted by a separate external components to the TFT process precharge device to configure in T FT

O

Figure 26 is another embodiment of the pixel circuit according to the present invention. In this circuit, unlike the circuits of the examples described above, and the conductivity type of the TFT 1 and T FT 2 constituted by P-channel type (PMOS). Accordingly, N-channel type TFT 3 and N channel type (NMOS) of a different conductivity type as the T FT 1, also the same conducting Xi Eve and TFT4 even TFT3 in consideration of the controllability for the reasons described above ( is configured as NMOS).

In the circuit in FIG. 26, TFT 1, TFT 2 of the two transistors at the time of driving the light emitting element OL ED, operates with equal gate-source voltage, drain, source voltage is not necessarily equal. Operate the TFT 2 as previously described in the saturation region for the driving current of the write current I w and the light emitting element 0 LED is proportional exactly desirable. On the other hand, in the case of NMOS, but take the LDD (Ligh tly Doped Drain) structure in order to improve the operating breakdown voltage is generally, such as by series resistance component due LDD this case, the drain current in the saturation region drain- are susceptible to source CT / JP00 / 04763 voltage, in other words the constant current property is tend because of inferior to PMOS.

Therefore, the conversion use thin film transistor TFT 1 and the driving thin film transistor TFT 2, is preferably formed by PMOS.

The operation of the circuit, except the polarity of the element is decreased to the contrary, is basically the same as the circuit and the like of FIG 5.

Figure 27 shows another embodiment of the pixel circuit according to the present invention. In this circuit, unlike the circuits of the examples described above, the switch use thin film transistor TFT 4, instead of connecting between the conversion for thin film preparative Rungis evening TFT 1 drain and gate, directly connecting the drain and gate of the TFT 1 and is constituted by connecting TFT 4 between its connection point, the connection point between the TFT2 gate and capacity.

Also in the circuit of FIG. 27, and is basically capable of the same operation as the circuit and the like of FIG 5, also in this circuit, well the same or different conductivity type than the TFT3 and TFT 4, and have gates It is controlled by a first scan line scan a and separate scan lines that the second scan line sca nB, TFT 4 prior to TFT 3 is set to 0 ff state when writing end. Further, as explained with reference to FIG. 21, in order to reliably terminate the write at a predetermined scanning line period, it is desirable to set TFT1 size of the (WZL) greater than TFT2 size. Industrial Applicability

As described above, by the display element device using the current drive circuit and the same according to the present invention lever, regardless of the characteristic variation of the active elements (such as TFT), precisely to the signal current I w from the data line the drive current I dr V proportional (or corresponding), it is possible to flow a current driving type light-emitting device (such as an organic EL element). By arranging a larger number of pixel circuits including such current drive circuits in a matrix, it is possible to emit light at a desired luminance of each pixel accurately, it is possible to provide a high quality active matrix type display device in which '

Claims

Gen'ao required of range

1. A current drive circuit for supplying a drive current to the drive target,

And a control line,

A signal line to which a signal current is supplied with a current level according to the information, when the control line is selected, a receiving section for taking a signal current from the signal line,

A conversion unit for holding by converting the current level of the fetched signal current once the voltage level,

It converts the voltage signal held in the current signal and a drive unit for outputting the drive current

Current drive circuit.

2. The conversion unit includes a control terminal and a conversion Tran register having a first terminal and a second terminal, a capacitor connected to said control terminal

Current drive circuit according to claim 1, wherein.

3. The conversion unit includes a Suitsuchi transistor inserted between the first terminal and the control terminal of the conversion transistor,

The Suitsuchi transistor becomes conductive when converting the current level of the signal current into a voltage level, a first terminal and a control terminal electrically connected to the gate voltage level referenced to a second terminal of the conversion transistor while it gives rise to,

The Suitsuchi transistor is blocked when holding the voltage level on the capacitor, disconnecting the control terminal and the capacitor connected thereto of the conversion transistor from the first terminal

Current drive circuit according to claim 2, wherein.

4. The receiving unit includes a control terminal, the first having a terminal and a second terminal, the first terminal is connected to a first terminal of the pre-Symbol conversion transistor, a second terminal connected to the signal line, the control terminal includes a connected take-insulated-gate field-effect transistor to the control line,

The conversion unit includes a Suitsuchi transistor inserted between the first terminal and the control terminal of the conversion transistor

Current drive circuit according to claim 1, wherein.

5. Control pin of the control terminal and Suitsuchi transistor of the take-transistor is connected to the Re different control lines each, respectively

Current drive circuit according to claim 4, wherein.

6. Conductivity-type conductivity and the take-transistor of the conversion transistor are different

Current drive circuit according to claim 4, wherein.

7. The drive unit, control terminal and includes a driving Tran Soo evening having a first terminal and a second terminal,

The driving transistor supplying a driving current having a current level acceptance accordingly the voltage level held by the capacitor to the control pin

Current drive circuit according to claim 2, wherein.

8. The connected to the control terminal of the conversion transistor and the control pin of the driving transistor directly constitute a current mirror circuit, like the current level of the current level and the driving current of the signal current is proportional to It was

Current drive circuit according to claim 7 wherein.

9. The driving transistor, Ri Contact is formed in the vicinity of the converting transistor, having the equivalent threshold voltage and the conversion transistor

Current drive circuit according to claim 7 wherein.

1 0. Transistor size of the conversion transistor is set larger than the transistor size of the driving transistor evening

Current drive circuit according to claim 7 wherein.

1 1. The driving transistor operates in the saturation region, the driving current is supplied in accordance with the difference between the voltage level and the threshold voltage applied to the gate

Current drive circuit according to claim 9, wherein.

1 2. The driving transistor operates in the linear region

Current drive circuit according to claim 9, wherein.

1 3. The driving transistor operates in the linear region

Current drive circuit according to claim 1 0, wherein.

1 4. The drive unit is shared time division manner the conversion transistor between the conversion unit,

The driving unit includes a driving said conversion transistor after completing the conversion of the signal current separately from the receiving unit, driving through channel voltage level held in a state of being applied to the gate of the conversion Tiger Njisu evening a current flows

Current drive circuit according to claim 2, wherein.

1 5. The drive unit comprises a control means for blocking unwanted current through the conversion transistor except during driving

Current drive circuit according to claim 1 4, wherein.

1 6. The control means is provided with a control terminal and a first terminal and a second terminal, the first terminal being connected to the converting transistor consists braking patronage transistor second terminal is coupled to said driven object ,

It said control transistor disconnects the non-conducting state and a connexion the conversion transistor and said driven during non-driving of the driven object, switched to driving sometimes conduction state of the 驟動 target

Current drive circuit according to claim 1 5, wherein.

1 7. The drive unit, in order to stabilize the current level of the driving current flowing through the converting transistor, the potential fixing means for fixing the potential of the drain fin relative to the source of the converting transistor with a

Current drive circuit according to claim 1 4, wherein.

1 8. The receiving part, the converting unit and the driving unit constitute a Align was current circuit set a plurality of transistors,

Having Daburuge Ichito structure in order to suppress the one or more transistors are current leakage in the current circuit

Current drive circuit according to claim 1, wherein.

Between 1 9. The data line and a predetermined potential, the leak element is connected

Current drive circuit according to claim 1, wherein.

2 0. Between the data line and a predetermined potential, the initial value setting element for setting said data to an initial value is connected

Current drive circuit according to claim 1, wherein.

2 1. The drive insulated gate field effect transistor is a current driving circuit according to claim 7, wherein the P-channel type.

2 2. A current drive circuit for supplying a drive current to the drive target,

At least one control line,

And a signal line to which a signal current is supplied, the source is a reference potential connected to the converting insulated gate field effect transistor evening having a current level according to the information,

And connected to, for uptake gate connected to said control line insulated gate field effect transistor between the drain and the signal lines of the transformation insulating gate one preparative type field effect transistor,

A drive insulated gate field effect preparative Rungis evening connected between a reference potential and said driven object,

Kiyapashita which a first electrode connected in common to the gates of the gate and drive insulated gate field effect transistor of the converter insulated gate type field effect transistor, a second electrode connected to a reference potential ^,

And a said connected between the gate and the drain of the converting insulated gate field effect transistor, an insulated gate for Suitsuchi gate connected to said control line field effect DOO Rungis evening

Current drive circuit.

2 3. A current drive circuit for supplying a drive current to the drive target,

At least one control line,

And a signal line to which a signal current is supplied, the source is a reference potential connected to the converting insulated gate field effect transistor evening having a current level according to the information,

And connected, insulating capture gate connected to the control line gate one preparative field effect transistor between the drain and the signal lines of the transformation insulating gate one preparative type field effect transistor,

A drive insulated gate field effect preparative Rungis evening connected between a reference potential and said driven object,

A first electrode connected to the gate of the drive insulated gate field effect transistor, a capacitor second electrode is connected to a reference potential,

Wherein the gate of the converting insulating gate one preparative type field effect transistor, which is connected drive insulated gate field effect transistor evening gate and between the attachment point of the first electrode of the capacitor, gate one preparative said control and a connected Suitsuchi insulating gate one preparative electric field effect transistor to line

. Current drive circuit.

2 4. Control terminal and Suitsuchi insulated gate type field effect transistor control terminal of said take-insulated-gate field-effect transistor are connected to different control lines respectively

Current drive circuit according to claim 2 3 wherein.

2 5. Current driver circuit according to claim 2 3, wherein the transistor size is set larger than the transistor size of the driving transistor evening of the conversion transistor.

And 2 6. Scan line,

A data line to which a signal is supplied in accordance with the luminance information,

Have a pixel including a display element formed at the intersection of the data lines and the scanning lines,

The pixels, when the scanning line is selected, a receiving section for taking a signal supplied to the data lines,

And converting holding unit for holding and converts the accepted signal,

Converting the stored signals, that having a driving section for supplying to the display device

Eleven -.

Hyofu SoTadashi.

2 7. The captured signal is a current, the signal held by the converting holder is a voltage signal supplied to the display element is a current

Display device according to claim 2 6 wherein.

2 8. The conversion holder includes a first transistor having a control terminal, a capacitor connected to said control terminal

Display device according to claim 2 6 wherein.

2 9. The conversion retaining portion includes a second transistor connected between the first terminal and the control terminal of the first transistor

Display device according to claim 2 8 wherein.

3 0. The second transistor is rendered conductive a signal supplied to the data lines when the receiving unit captures in the non-conducting state after the signal is supplied to the conversion holder

Display device according to claim 2 9, wherein.

3 1. The receiving unit is connected to a first terminal of the first terminal of the first transistor, a third transistor second terminal is connected to the de Isseki line, said second transistor control terminal of the control terminal third transistor are connected to different scanning lines

Display device according to claim 2 9, wherein.

3 2. The driving unit and the converting holder is the same transistor

Display device according to claim 2 6 wherein.

3 3. The drive unit, a control terminal of the first transistor, and a third transistor having a control terminal connected

Display device according to claim 2 8 wherein.

3 4. The drive unit, the control terminal of the first transistor has a third transistor control terminal connected, the first and second, third transistor evening by the current mirror circuit constitute the

Display device according to claim 2 9, wherein.

3 5. The drive unit is in the first transistor

Display device according to claim 2 8 wherein.

3 6. To have a fourth transistor between said first transistor and the display element

Display device according to claim 35, wherein.

3 7. The first display element to a terminal of the first transistor is connected, a fourth transistor to the second terminal of the first transistor

Display device according to claim 35, wherein.

3 8. The driver and the converter retaining portion that is composed of a plurality of transistors

Display device according to claim 2 6 wherein.

3 9. The conversion holder includes a plurality of transistors having a control terminal, a plurality of Kiyapashita connected to said respective control terminals

Display device according to claim 2 6 wherein.

4 0. Said display element is connected to a first terminal of the third transistor, a constant voltage source is connected to a second terminal of said third transistor

The display device of claim 3 3, wherein.

4 1. Display device according to claim 3 4, wherein the control terminal of the said capacitor second transistor are connected.

4 2. The other end of the Capacity evening is connected to the second terminal of the first transistor

Display device according to claim 3 7, wherein.

4 3. The display device includes a layer containing an organic material at least one of the electrodes is transparent, and sandwiched between the electrodes

Display device according to claim 2 6 wherein.

4 4. Between the data line and a predetermined potential, the leak element is connected

Display device according to claim 2 6 wherein.

4 5. Between the data line and a predetermined potential, the initial value setting element for setting the initial value of the de Isseki before said scanning line is selected is connected

Display device according to claim 2 6 wherein.

And 4 6. Scan line,

A data line current signals are supplied in accordance with the luminance information,

And a pixel having an organic layer formed at intersections of the data lines and the scanning lines, the pixel, when the scanning line is selected, a receiving section for taking a current signal supplied to the data line ,

And converting holding portion for holding the fetched current signal to voltage conversion,

It converts the voltage signal the held, that have a current supplied 铤動 unit to the display device

Or small clothing 患直.

4 7. The brightness information is a voltage, supplied to the data line and converts the voltage into a current

Display device according to claim 4 6, wherein.

4 8. The conversion holder includes a first transistor having a control terminal, Kiyapashi the evening, which is connected to the control terminal

Display device according to claim 4 6, wherein.

4 9. The conversion retaining portion includes a second transistor connected between the first terminal and the control terminal of the first transistor

Display device according to claim 4 8, wherein.

5 0. The second transistor is rendered conductive a signal supplied to the data lines when the receiving unit captures in the non-conducting state after the signal is supplied to the conversion holder

Display device according to claim 4 9, wherein.

5 1. The receiving portion has a third transistor having a first terminal connected to a first terminal of said first transistor, a second terminal connected to said data lines,

A control terminal of the third transistor and the control terminal of the second transistor are connected to different scanning lines

Display device according to claim 4 9, wherein.

5 2. The driving unit and the converting holder is the same transistor

Display device according to claim 4 6, wherein.

5 3. The drive unit, a control terminal of the first transistor, and a third transistor having a control terminal connected

Display device according to claim 4 8, wherein.

5 4. The drive unit, the control terminal of the first transistor has a third transistor control terminal connected, the first and second, third transistor evening by the current mirror circuit constitute the

Display device according to claim 4 9, wherein. 5 5 wherein the drive unit is in the first transistor

Display device according to claim 4 8, wherein.

5 6 have a fourth transistor between said first transistor and the display element

Display device according to claim 5 5 wherein.

5 7. The first display element to a terminal of the first transistor is connected, a fourth transistor to the second terminal of the first transistor

Display device according to claim 5 5 wherein.

5 8. The driver and the converter retaining portion that is composed of a plurality of transistors

Display device according to claim 4 6, wherein.

5 9. The conversion holder includes a plurality of transistors having a control terminal, a plurality of capacitors connected to said respective control terminals

Display device according to claim 4 6, wherein.

6 0. Said display element is connected to a first terminal of the third transistor, a constant voltage source is connected to a second terminal of said third transistor

Display device according to claim 61, wherein.

6 1. The Capacity display device of evening the second transistor control terminal a connected claim 5 4 wherein the.

6 2. The other end of the capacitor second terminal of the first transistor is connected

Display device according to claim 5 7, wherein.

6 3. The display device includes a layer containing an organic material at least one of the electrodes is transparent, and sandwiched between the electrodes

Display device according to claim 4 6, wherein.

6 4. Between the data line and a predetermined potential, a display device according to claim 4 6, wherein a leak element is connected.

6 5. Between the data line and a predetermined potential, the initial value setting element for setting said data to an initial value is connected

Display device according to claim 4 6, wherein.

6 6. A scanning line driving circuit for sequentially selecting the scanning lines,

A data line driving circuit including a sequential current source to the data line and generates a signal current having a current level corresponding to the luminance information,

Together they are arranged at intersections of the scanning lines and the data lines, and a plurality of pixels including a light emitting element of a current drive type which emits light accept the supply of the drive current

A display device,

The pixels,

When the scanning line is selected, and receiving join the club to take a signal current from the data line,

A conversion unit for holding by converting the current level of the fetched signal current once the voltage level,

A driving current having a current level corresponding to the voltage level held a driving unit to flow to the light emitting element

Non-apparatus.

6 7. The converter may that includes a gate, a source, and converts insulating gate one preparative type field effect transistor having a drain and a channel, a capacitor connected to the gate

The display device of claim 6 6 wherein.

6 8. The conversion unit includes a Suitsuchi insulated gate type field effect transistor inserted between the drain and the gate one bets of the conversion insulated gate field effect transistor,

Insulating gate one preparative type field effect transistor for switch becomes conductive when converting the current level of the signal current into a voltage level, the conversion insulated gate field effect DOO Rungis evening drain and gate electrically connected while causing a voltage level relative to the source to gate one bets,

The Suitsuchi insulated gate type field effect transistor is blocked when holding the voltage level before Symbol capacity, disconnecting the gate and the capacitance connected to the converter insulated gate type field effect transistor from the drain

Display device according to claim 6 7, wherein wherein.

6 9. The receiving unit includes a drain and inserted take-insulated-gate field-effect transistor between the data line of the conversion insulated gate field effect transistor,

The conversion unit includes a drain and Suitsuchi insulated gate type field effect transistor inserted between a gate one bets of the conversion insulating gate one preparative field effect transistor

The display device of claim 6 6 wherein.

7 0. The gate of the gate Bok and switch for absolute Engeichito type field effect transistor of the take-insulated-gate field-effect transistor are connected to different scanning lines, respectively

Display device according to claim 6 9, wherein.

7 1. The switch insulated gate field effect transistor, the current level of the signal current conducts when converted into a voltage level, electrically the drain and gate one bets of the conversion insulated gate field effect DOO Rungis evening while it is causing a voltage level relative to the source gate connected,

The Suitsuchi insulated gate type field effect transistor is blocked when holding the voltage level before Symbol capacity, separated from the drain to the gate, and the capacitance connected to the converter insulated gate field effect transistor,

It said switch insulating gate one preparative field effect transistors, the unselected and summer the take-insulated-gate field-effect transistor Te display device according to claim 7 0 wherein is blocked before the non-conductive.

7 2. After said switch insulated gate field effect transistor and the take-insulated gate field effect transistor becomes nonconductive, 1 frame the Suitsuchi insulated gate field effect transistor evening after during a predetermined time in the period the made conductive, performs off by scan line basis

Display device according to claim 71, wherein.

7 3. Scan lines the switch insulated gate field effect transistor is connected is provided independently for each color of the three primary colors

Display device according to claim 71, wherein.

7 4. Conductivity-type conductivity and the take-insulated-gate field-effect transistor of the switch insulated gate field effect transistor is different

Display device according to claim 6 9, wherein.

7 5. The drive section includes a gate, a drain, a drive insulated gate type field effect transistor having a source and a channel,

The drive insulated gate one preparative field effect transistor passes a drive current having a current level acceptance accordingly the voltage level held by the capacitor to the gate to the light emitting element via the switch Yaneru

Display device according to claim 6 7, wherein.

7 6. The conversion insulated gate field effect transistor is connected to the direct and gates of said driving insulation gate type field effect transistor form a current mirror circuit, the current level the drive current of the signal current and the current level was set to proportional door ing

Display device according to claim 7 5, wherein.

7 7. The drive insulated gate field effect transistor is formed in the vicinity of the variable changeover insulated gate field effect transistors corresponding with the pixel, insulated gate field effect transistor evening equivalent for the conversion having a threshold voltage

Display device according to claim 7 5, wherein.

7 8. Transistor size of the conversion insulated gate field effect transistor is set larger than the transistor size of the driving insulating gate one preparative field effect transistor

Display apparatus according to claim 7 7 wherein.

7 9. The drive insulated gate type field effect transistor operates in the saturation region, the driving current is supplied in accordance with the difference between the voltage level and the threshold voltage applied to the gate of that to the light-emitting element

8 2. The drive unit is shared time division manner the conversion insulated gate field effect preparative Rungis evening between the conversion unit,

The drive unit, the conversion insulating gate after completing the conversion of the signal current - a preparative electric field effect transistor as a drive separately from the receiving unit, the voltage level held the converted insulating gate type field flowing a drive current to the light emitting element through the channel in a state applied to the gate of the effect transistor

Display device according to claim 6 7, wherein.

8 3. The drive unit comprises a control means for blocking unwanted current flowing in the light emitting element via the conversion insulated gate field effect transistors in addition to the time of driving

Display device according to claim 82, wherein.

8 4. Wherein, the display device according to claim 8 3, wherein for blocking unnecessary current by controlling a voltage between terminals of two-terminal type light emitting element having a rectification action.

8 5. Wherein, the said control insulated gate field effect transistor made from the inserted control insulated gate field effect transistor between the conversion insulated gate field effect transistor and the light emitting element, the rendered non-conductive state during the non-drive movement of the light emitting device disconnect said light emitting element and the converting insulated gate field effect transistor, switched to the conductive state during driving of the light emitting element

Display device according to claim 8 3 wherein.

8 6. The control means control the time and placing the light emitting element in the non-emission state by interrupting the drive current during non-driving, the proportion of time that placing the light emitting element by flowing a drive current during driving the light emitting state and made it possible to adjust the brightness of each pixel

Display device according to claim 8 3 wherein.

8 7. The drive unit, in order to stabilize the current level of the driving current flowing through the converter insulated gate field effect transistor the light emitting element through a source of the conversion insulated gate field effect transistor having a potential fixing means for fixing the drain of potential as a reference

Display device according to claim 82, wherein.

8 8. The receiving part, the converting unit and the driving unit constitute a current circuit combining a plurality of insulated gate field effect transistor,

One or more insulating gate one preparative type field effect transistor has a double gate structure for suppressing current leakage in the current circuit

The display device of claim 6 6 wherein.

8 9. The driving unit includes a gate, a drain and comprising an insulated gate field effect transistor having a source, the light emitting element a drive current passing between the drain and source Ichisu in accordance with the voltage level applied to the gate sink in,

The light emitting element is a two-terminal type having an anode and a power cathode, cathode one de is connected to the drain

The display device of claim 6 6 wherein.

9 0. The driving unit includes a gate, a drain and comprising an insulated gate field effect transistor having a source, the light emitting element a drive current passing between the drain and source Ichisu in accordance with the voltage level applied to the gate sink in,

The light emitting element is a two-terminal type having an anode and a power cathode, § Roh one de is connected to a source

The display device of claim 6 6 wherein.

9 1. It includes adjustment means for supplying the voltage level held by the driver to adjust down by the conversion unit, tighten the gloom level of brightness of each pixel

The display device of claim 6 6 wherein.

9 2. Between the de Isseki line and a predetermined potential, the leak element is connected

The display device of claim 6 6 wherein.

9 3. Between the data line and a predetermined potential, the initial value setting element for setting the initial value of the de Isseki before said scanning line is selected is connected

The display device of claim 6 6 wherein.

9 4. The drive unit includes a gate, a drain and an insulated gate field effect transistor having a source,

It said adjustment means, said insulated gate field effect transistor of the gate one bets and source - and raised the voltage between the scan voltage level applied to the gate downregulating

Display device according to claim 9 3 wherein.

9 5. The drive section includes a gate, a drain and an insulated gate field effect transistor having a source,

The conversion unit includes a capacitor for holding the connected and the voltage level on the gate of the thin film transistor evening,

Said adjusting means comprises an additional capacitor connected to the capacitor, the voltage level to be applied to the retained by said insulated gate field effect transistor evening gate to the capacitance downregulating

Display device according to claim 9 3 wherein.

9 6. The 驟動 portion includes a gate, a drain and an insulated gate field effect transistor having a source,

The converting unit has a capacity having one end for holding a and the voltage level is connected to the gate of the thin film transistor,

It said adjusting means adjusts the potential of the other end of the said capacitance when holding the voltage level had it occurred converted into the conversion unit in the capacity to be applied to the gate of the insulated gate field effect transistor down adjusting the voltage level

9 9. A scanning line driving circuit for sequentially selecting the scanning lines,

A data line driving circuit including a sequential current source to the data line and generates a signal current having a current level corresponding to the luminance information,

Together they are arranged at intersections of the scanning lines and the data lines, and a plurality of pixels including a light emitting element of a current drive type which emits light accept the supply of the drive current

And connected, insulated gate field effect transistor for taking the gate of which is connected to the scanning lines between the drain and the data lines of said converting insulated gate field effect transistor,

A drive insulated gate field effect bets transistor connected between a reference potential and the light emitting element,

A first electrode connected in common to the gates of the gate one preparative and drive insulated gate field effect transistor of the converter insulated gate type field effect transistor, and Capacity evening the second electrode is connected to a reference potential,

And a said connected between the converting Ze' gate gate one DOO field effect transistor and the drain, an insulated gate for Suitsuchi gate connected to the scan line field effect DOO Rungis evening

Table Fuso.

1 0 0. And the scanning line driving circuit for sequentially selecting the scanning lines,

A data line driving circuit including a sequential current source to the data line and generates a signal current having a current level corresponding to the luminance information,

Together they are arranged at intersections of the scanning lines and the data lines, and a plurality of pixels including a light emitting element of a current drive type which emits light accept the supply of the drive current

A display device,

The pixels,

Source and converting insulating gate one preparative field effect transistors evening connected to a reference potential,

And connected, insulated gate field effect transistor for taking the gate of which is connected to the scanning lines between the drain and the data lines of said converting insulated gate field effect transistor,

A first electrode connected to the gate of the drive insulated gate field effect transistor, and connected Capacity evening a second electrode to a reference potential, and the gate of the conversion insulated gate field effect transistors, for the drive is connected between connection points of the gate and the Capacity evening first electrode of the insulated gate field effect transistor, and a connected Suitsuchi insulation gate type electric field effect transistor gate to said scanning lines

Hyofu SoTadashi.

1 0 1. Control terminal and switch insulating gate one preparative field effect transistors evening control terminal of the take-insulated-gate field-effect transistor are connected to different scanning lines, respectively

Display device according to claim 1 0 0 wherein.

1 0 2. Transistor size of the conversion transistor is set larger than the transistor size of the driving transistor evening

Display device according to claim 1 0 0 wherein.

1 0 3. After said switch insulated gate field effect transistor and the take-insulated gate field effect transistor becomes nonconductive, said Suitsuchi insulated gate field effect transistor after during a predetermined time within one frame period the made conductive, performs off by scan line basis

Display device according to claim 1 0 1, wherein.

1 0 4. Are arranged at intersections of the scanning lines for supplying the data line and the selected pulse provides a current level of the signal current in accordance with luminance information, drives the light-emitting element of a current drive type that emits light by a driving current a pixel circuit,

A receiving portion Komu Ri acquire the signal current from the data line in response to a selection pulse from said scanning line,

A conversion unit for holding by converting the current level of the fetched signal current once the voltage level,

Pixel circuit and a drive unit for supplying a driving current having a current level corresponding to the voltage level held in the light-emitting element.

1 0 5. The converter may that includes a gate, a source, and converting insulated gate field effect transistor having a drain and a channel, a capacitor connected to the gate

Claim 1 0 4 pixel circuit according.

1 0 6. The conversion unit includes a drain and Suitsuchi insulated gate type field effect transistor inserted between a gate of said conversion insulated gate field effect transistor,

The switch insulated gate field effect transistor becomes conductive when converting the current level of the signal current to the voltage level, electrically connects the drain and gate one bets of the conversion insulating gate one preparative field effect DOO Rungis evening while it gives rise to the gate voltage level relative to the source and,

The Suitsuchi insulated gate type field effect transistor is blocked when holding the voltage level before Symbol capacity, disconnecting the gate and the capacitance connected to the converter for insulating gate one preparative type field effect transistor from the drain

The pixel circuit of claim 1 0 5, wherein wherein.

1 0 7. The receiving unit includes a drain and inserted take-insulated-gate field-effect transistor between the data line of the conversion insulated gate field effect transistor,

The conversion unit includes inserted the insulated gate field effect transistors evening for switch between the drain and the gate one bets of the conversion insulated gate field effect transistor

Claim 1 0 4 pixel circuit according.

1 0 8. The gate and the switch for insulation gate type field effect claim 1 0 7 The pixel circuit according gates that are connected to different scanning lines each of transistors of said take-insulated-gate field-effect transistor.

1 0 9. The switch insulated gate field effect transistor becomes conductive when converting the current level of the signal current to the voltage level, electrically connects the drain and gate of the conversion insulated gate field effect DOO Rungis evening while it is causing a voltage level relative to the source to gate one preparative and,

The switch insulated gate field effect transistor is blocked when holding the voltage level before Symbol capacity, separated from the drain to the gate, and the capacitance connected to the converter insulated gate field effect transistor,

The switch insulated gate field effect transistor, the pixel circuit of claim 1 0 8 wherein said take-insulating gate one preparative field effect transistor evening in the nonselective is interrupted before the non-conductive.

1 1 0. After said switch insulated gate field effect transistor and the take-insulated gate field effect transistor becomes nonconductive, said Suitsuchi insulated gate field effect transistor after during a predetermined time within one frame period the made conductive, performs off by scan line basis

The pixel circuit of claim 1 0 9, wherein.

1 1 1. Scan line the switch insulated gate field effect transistor is connected is provided independently for each color of the three primary colors

The pixel circuit of claim 1 0 5, wherein.

1 1 2. Conductivity type and said take-insulated-gate field-effect transistor evening conductivity type of said switch insulated gate field effect transistor is different

The pixel circuit of claim 1 0 7 wherein.

1 1 3. The driving unit includes a gate, a drain, includes a drive insulated gate one preparative type field effect transistor having a source and a channel,

The drive insulated gate field effect transistor passes a drive current having a current level acceptance accordingly the voltage level held by the capacitor to the gate Bok to the light emitting element via the switch Yaneru

The pixel circuit of claim 1 0 5, wherein.

1 1 4. The gate of the gate and the driving absolute Engeichito type field effect transistor of the converter insulated gate type field effect transistor is connected directly to a current mirror circuit, and the current level of the signal current and the current level of the drive current was set to proportional door ing

Claim 1 1 3 pixel circuit according.

1 1 5. The drive insulated gate field effect transistor is formed in the vicinity of the variable changeover insulating gate one preparative field effect transistor corresponding in the pixel, the conversion insulated gate field effect transistor evening having the same threshold voltage as in

Claim 1 1 3 pixel circuit according.

1 1 6. Transistor size of the conversion insulated gate field effect transistor is set larger than the transistor size of the driving insulating gate one preparative field effect transistor

The pixel circuit of claim 1 1 5 wherein.

1 1 7. The drive insulated gate type field effect transistor operates in the saturation region, the driving current is supplied in accordance with the difference between the voltage level and the threshold voltage applied to the gate of that to the light-emitting element

The drive unit includes a drive the conversion insulated gate type electric field effect transistor after completing the conversion of the signal current separately from the receiving unit, the holding voltage level of the conversion insulated gate field effect transistor flowing a driving current through the channel to the light emitting element while applying to the evening of the gate

The pixel circuit of claim 1 2 1 wherein.

1 2 1. The drive unit comprises a control means for blocking unwanted current flowing in the light emitting element via the conversion insulated gate field effect transient scan evening except during driving

The pixel circuit of claim 1 2 0 wherein.

1 2 2. The control unit cuts off the unnecessary current by controlling a voltage between terminals of two-terminal type light emitting element having a rectification action

The pixel circuit of claim 1 2 1 wherein.

1 2 3. Wherein, the said control insulated gate field effect transistor made from the inserted control insulated gate field effect transistor between the conversion insulated gate field effect transistor and the light emitting element, wherein disconnecting the converter insulated gate field effect transistor during the non-drive movement in the non-conducting state of the light emitting element and a light emitting element is switched to the conductive state during driving of the light emitting element

The pixel circuit of claim 1 2 1 wherein.

1 2 4. The control means may be used, for example, to shut off the drive current during non-driving places said light emitting element in the non-emission state, the percentage of time that flowing a drive current during driving placing the light emitting element in the light emitting state control to, and adjustable brightness of each pixel

The pixel circuit of claim 1 2 1 wherein.

1 2 5. The drive unit, in order to stabilize the current level of the drive current flowing to the light emitting element through said converting insulated gate field effect transistor, the source of the conversion insulated gate field effect transistor having a potential fixing means for fixing the drain potential relative to the

The pixel circuit of claim 1 2 0 wherein.

1 2 6. The receiving part, the converting unit and the driving unit constitute a current circuit combining a plurality of insulated gate field effect transistor,

Evening one or two or more insulating gate type field effect transistor has a double gate structure for suppressing current leakage in the current circuit

Claim 1 0 4 pixel circuit according.

1 2 7. The driving unit includes a gate comprises insulated gate field effect transistor having a drain and a source, wherein the light emission drive current passing between the drain and source Ichisu in accordance with the voltage level applied to the gate flow in the device,

The light emitting element is a two-terminal type having an anode and a power cathode, cathode one de is connected to the drain

Claim 1 0 4 pixel circuit according.

1 2 8. The driving unit includes a gate comprises insulated gate field effect transistor having a drain and a source, wherein the light emission drive current passing between the drain and source Ichisu in accordance with the voltage level applied to the gate flow in the device,

The light emitting element is a two-terminal type having an anode and a power cathode, § Bruno - de is connected to a source

Claim 1 0 4 pixel circuit according.

1 2 9. Includes adjustment means for supplying to said driving unit a voltage level held by the lower adjustment by the conversion unit, tighten the black level of the brightness of each pixel

Claim 1 0 4 pixel circuit according.

Between 1 3 0. The data line and a predetermined potential, the leak element is connected

Claim 1 0 4 pixel circuit according.

Between 1 3 1. The data line and the predetermined potential, the initial value setting element for setting said data to an initial value is connected

Claim 1 0 4 pixel circuit according.

1 3 2. The drive unit includes a gate, a drain and an insulated gate field effect transistor having a source,

It said adjusting means, said the voltage level applied to the gate and raised the voltage between the gate and the source over the scan of the insulated gate field effect transistor downward adjustment

The pixel circuit of claim 1 2 9 wherein.

1 3 3. The 驟動 portion includes a gate, a drain and an insulated gate field effect transistor having a source,

The conversion unit includes a capacitor for holding the connected and the voltage level on the gate of the thin film transistor,

Said adjusting means comprises an additional capacitor connected to said capacitor, a down-regulated voltage level to be applied to the gate of the capacity retained by said insulated gate field effect transistor

The pixel circuit of claim 1 2 9 wherein.

1 3 4. The drive unit includes a gate, a drain and an insulated gate field effect transistor having a source,

The converting unit has a capacity having one end for holding a and the voltage level is connected to the gate of the thin film transistor,

It said adjusting means adjusts the potential of the other end of the said capacitance when holding the voltage level had it occurred converted into the conversion unit in the capacity to be applied to the gate of the insulated gate field effect transistor down adjusting the voltage level

1 3 7. Arranged at intersections of the scanning lines for supplying the data line and the selected pulse provides a current level of the signal current in accordance with luminance information, drives the light-emitting element of a current 驟動 type which emits light by a driving current It shall apply in the pixel circuit,

And connected, insulated gate field effect transistor for taking the gate of which is connected to the scanning lines between the drain and the data lines of said converting insulated gate field effect transistor,

Are commonly connected to the gate of the gate one preparative and drive insulated gate field effect transistor of the first electrode and the converting insulated gate field effect transistor evening, and Capacity evening the second electrode is connected to a reference potential,

And a said connected between the gate and the drain of the converting insulating gate one preparative type field effect transistor, an insulated gate for Suitsuchi gate connected to the scan line field effect DOO Rungis evening

The pixel circuit.

1 3 8. Arranged at intersections of the scanning lines for supplying the data line and the selected pulse provides a current level of the signal current in accordance with luminance information, drives the light-emitting element of a current drive type that emits light by a driving current It shall apply in the pixel circuit,

Source and converting insulating gate one preparative field effect transistors evening connected to a reference potential,

Which is connected with the converter insulated gate-type drain of the field effect transistor between the data lines, and connected to take-insulated gate field effect transistor gate I to the scan lines,

A first electrode connected to the gate Bok of the drive insulated gate one preparative type field effect transistor, and Capacity evening the second electrode is connected to a reference potential,

The conversion insulating gate one preparative field effect transistor evening gate is connected between the contact Nyo from the first electrode of the gate and the capacitor of the drive insulated gate field effect transistor, the gate of the scanning lines and a connected Suitsuchi insulation gate type electric field effect transistor

The pixel circuit.

1 3 9. Control terminal and switch insulated gate field effect transistor control terminal of said take-insulated-gate field-effect transistor are connected to different scanning lines, respectively

The pixel circuit of claim 1 3 8, wherein.

1 4 0. Transistor size of the conversion transistor is set larger than the transistor size of the driving transistor evening

The pixel circuit of claim 1 3 8, wherein.

1 4 1. The after switch insulated gate field effect transistor and the take-insulated gate field effect transistor becomes nonconductive, said Suitsuchi insulating gate one preparative field after during a predetermined time within one frame period by conducting effect transistor performs off by scan line basis

The pixel circuit of claim 1 3 9 wherein.

1 4 2. Arranged at intersections of the scanning lines for supplying the data line and the selected pulse provides a current level of the signal current in accordance with luminance information, drives the light-emitting element of a current drive type that emits light by a driving current a driving method of a light emitting element,

A receiving procedure Komu Ri acquire the signal current from the data line in response to a selection pulse from said scanning line,

A conversion procedure for holding by converting the current level of the fetched signal current once the voltage level,

A driving current having a current level corresponding to the voltage level held and 驟動 procedures flowing to the light emitting element

The driving method of a light-emitting element.

1 4 3. The conversion procedure, a gate, a source, and converting insulated gate field effect transistor having a drain and a channel, includes the steps of using a capacitor connected to the gate,

In the procedure, the conversion insulated gate field effect transistor, a voltage level which is converted by passing the signal current fetched by the receiving procedure to the channel is generated in the gate, the capacitor is caused to the gate holding the voltage level

The driving method of a light emitting device according to claim 1 4 wherein.

1 4. The conversion procedure includes a procedure using drain and switch insulated gate field effect transistor inserted between a gate of said conversion insulated gate field effect transistor,

In the procedure, the Suitsuchi insulated gate type field effect transistor becomes conductive when the conversion insulating gate one preparative field effect transistor converts the current level of the signal current to the voltage level, the conversion insulating gate one DOO while it is causing a voltage level referenced to source gate type field effect transistor evening drain and gate electrically connected,

The Suitsuchi insulating gate one preparative field effect transistor is blocked when holding the voltage level before Symbol capacity, disconnecting the gate and the capacitance connected to the converter insulated gate type field effect transistor from the drain

1 4 5. The drive procedure, a gate, a drain, includes the steps of using the drive insulated gate type field effect transistor having a source and a channel,

In the procedure, the drive insulated gate field effect transistor passes a drive current having a current level acceptance accordingly the voltage level held by the capacity to gate Bok to the light emitting element via the channel

The driving method of a light emitting device according to claim 1 4 3 wherein.

1 4 6. The gate of the gate and the driving insulated gate field effect transistor of the converter insulated gate type field effect transistor is connected directly to constitute a current mirror first circuit, the driving current level of the signal current I that there is a proportional relationship with the current level of the current

The O engagement

The driving method of a light emitting device according to claim 1 4 5 wherein.

1 4 7. The drive insulated gate field effect transistor is formed in the vicinity of the variable changeover insulated gate field effect transistors corresponding with the pixel, insulated gate field effect transistor equivalent for the conversion having a threshold voltage

The driving method of a light emitting device according to claim 1 4 5 wherein.

1 8. The drive insulated gate type field effect transistor operates in the saturation region, the driving current is supplied in accordance with the difference between the voltage level and the threshold voltage applied to the gate of that to the light-emitting element

The driving method of a light emitting device according to claim 1 4 7 wherein.

The driving procedure disconnects the converting insulated gate field effect transistor after completing the conversion of the signal current from said receiving steps and driving, the retained voltage level of the conversion insulated gate field effect transistor flowing a driving current through the channel to the light emitting element at applied to the gate state

The driving method of a light emitting device according to claim 1 4 3 wherein.

1 5 0. The driving procedure includes a control procedure for blocking unwanted current flowing in the light emitting element via the conversion insulated gate field effect Trang register except during driving

The driving method of a light emitting device according to claim 1 4 9 wherein.

1 5 1. The control procedure to cut off the unnecessary current by controlling a voltage between terminals of two-terminal type light emitting element having a rectification action

1 5 2. The control procedure is a procedure using the inserted control insulated gate field effect transistor between said converting insulated gate field effect transistor and the light emitting element,

In the procedure, the control insulating gate type field effect transistor disconnects and said light emitting element and the converting insulated gate field effect transistor evening rendered non-conductive state during non-driving is switched to conductive state during driving

1 5 3. The control procedure, the time and placing the light emitting element in the non-emission state by interrupting the drive current during non-driving, the proportion of time that placing the light emitting element by flowing a drive current during driving the light emitting state control to, and adjustable brightness of each pixel

1 5 4. The driving procedure, in order to stabilize the current level of the driving current flowing through the converter insulated gate field effect transistor to the light emitting element Te Tsutsu, the source of the conversion insulated gate field effect transistor including potential fixing procedure for fixing the drain potential relative to the

1 5 5. The receiving procedure, the transformation procedure and the driving instructions are executed on a current circuit combining a plurality of insulated gate electric field effect transistors evening,

One or two or more insulating gate type field effect transistor, a driving method of a light-emitting device according to claim 1 4 3, further comprising a Daburuge Ichito structure for suppressing current leakage in the current circuit during each step.

1 5 6. The driving procedure, the gate is performed using an insulating gate type electric field effect transistor having a drain and a source, the driving current passing between the drain and the source in response to the voltage level applied to the gate flowing to the light emitting element, the light emitting element is a two terminal type having an anode and a power cathode, the force Sword is connected to the drain

The driving method of a light emitting device according to claim 1 4 wherein.

1 5 7. The driving procedure, a gate, a drain and performed using an insulating gate type electric field effect transistor having a source, a driving current according to the voltage level applied to the gate Bok passing between the drain and the source the flow to the light emitting element,

The light emitting element is a two-terminal type having an anode and a power cathode, the anode is connected to a source

The driving method of a light emitting device according to claim 1 4 wherein.

1 5 8. Includes adjustment procedure the pass voltage level held by the conversion procedure on the drive procedure and downward adjustment, tighten the black level of the brightness of each pixel

The driving method of a light emitting device according to claim 1 4 wherein.

1 5 9. The driving procedure, using a gate, a drain and an insulated gate electric field effect transistor having a source,

The adjustment procedure, the gate and source of the insulated gate field effect transistor - down adjusting the voltage level applied to raised the voltage between the scan gate

The driving method of a light emitting device according to claim 1 5 8, wherein.

1 6 0. The driving procedure, using a gate, a drain and an insulated gate electric field effect transistor having a source,

It said conversion conversion procedure uses the capacity for holding and the voltage level is connected to the gate of the thin film transistor,

The adjustment procedure, using the additional capacitance connected to the capacitor, the voltage level to be applied to the gate of the insulated gate field effect transistor held in the capacitor downregulating

The driving method of a light emitting device according to claim 1 5 8, wherein.

1 6 1. The driving procedure, using a gate, a drain and an insulated gate electric field effect transistor having a source,

The transformation procedure used capacity having one end for holding a and the voltage level is connected to the gate of the thin film transistor,

The adjustment procedure, by adjusting the potential of the other end of the said capacitance when holding the voltage level converted by said conversion step before Symbol capacity, to be applied to the gate of the insulated gate field effect transistor down adjusting the voltage level

The driving method of a light emitting device according to claim 1 5 8, wherein.

The driving method of a light emitting device according to claim 1 4 wherein.

1 6 3. And scanning lines for selecting the pixels, and data lines Ru give luminance information for driving the pixels are arranged in a matrix,

Each pixel, in accordance with the light-emitting element and a writing means for writing the brightness information given from and data lines are controlled by a scanning line in the pixel, the written brightness information which changes luminance by the amount of current supplied and a braking Gosuru drive means amount of current supplied to the light emitting element,

Writing of the brightness information for each pixel, in a state where the scanning line is selected, is performed Te cowpea in applying an electric signal corresponding to brightness information to the data line,

Brightness information written in each pixel is held in each pixel even after the scanning line was unselected and summer, with maintaining available-display device lighting with a brightness corresponding to the luminance information light emitting element which is held in each pixel there,

Lower adjusting includes adjusting means for supplying to said driving hands stage, the display device to tighten the black level of the brightness of each pixel brightness information written by said writing means.

1 6 4. Arranged at intersections of the scanning line for supplying a selection pulse and the data line for supplying a luminance information, a pixel circuit for driving a pixel having a light emitting element which emits light in accordance with the luminance information, scanning lines wherein and writing means for writing the brightness information given from connexion controlled and the data line to the pixel, and a driving means for controlling the amount of current that be supplied to the light emitting element in accordance with the written brightness information,

Writing of the brightness information for each pixel, in a state where the scanning line is selected, is performed Te cowpea in applying an electric signal corresponding to luminance information to the de Isseki line,

Brightness information written in each pixel is held in each pixel even after the scanning line was unselected and summer, the light emitting element of each pixel is a keep available-lighting with a brightness corresponding to the luminance information stored,

Wherein and brightness information written by the writing means comprise adjustment means for supplying to said driving hands stage downward adjustment, pixel circuits to tighten the black level of the luminance of each pixel.

1 6 5. And scanning lines for selecting the pixels, and data lines Ru give luminance information for driving the pixels are arranged in a matrix, each pixel is Brightness varies with the amount of current supplied a method of driving a display device including a light emitting element,

A write procedure for writing the brightness information given from O connexion controlled and the data lines to the scanning lines in the pixel, and a driving instructions for controlling a current amount you supplied to the light emitting device in accordance with the written brightness information It includes,

Writing of the brightness information for each pixel, in a state where the scanning line is selected, is performed by applying an electric signal corresponding to brightness information to the data line,

Brightness information written in each pixel is held in each pixel even after the scanning line was unselected and summer, the light emitting element of each pixel is a keep available-lighting with a brightness corresponding to the luminance information stored,

The brightness information written in One by the write procedure includes adjustments procedures adjusted downward to pass to the order of the drive hand tighten the black level of the brightness of each pixel