There is a Clk Input and a Reset Input.
Both are buffered with an opamp based comparator circuit.
They are looking for approximately +1.1V on a rising edge.
This means that you are not constrained to gate (pulse) signals to trigger them.

The Reset input resets your divisions clock counter to 1
There is a switch to select Mathematical or Musical divisions.
The Multiplication Outputs 25MS Trigger pulses.
The Division Outputs are on as long as your Clock source.

- Avg Current draw:

40 mA / -9 mA

- Peak Current Draw:

80 mA / -17 mA

Width = 4HP

Depth = 38mm

Video: Animodule - TikTok

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