Maarouf, US

Ahmed Maarouf, Mohegan Lake, NY US

Patent application number

Description

Published

20120000516

Graphene Solar Cell - A solar cell includes a semiconductor portion, a graphene layer disposed on a first surface of the semiconductor portion, and a first conductive layer patterned on the graphene layer, the first conductive layer including at least one bus bar portion and a plurality of fingers extending from the at least one bus bar portion.

01-05-2012

20120000521

Graphene Solar Cell And Waveguide - A solar cell includes a semiconductor portion, a graphene layer disposed on a first surface of the semiconductor portion, and a first conductive layer patterned on the graphene layer, the first conductive layer including at least one bus bar portion, a plurality of fingers extending from the at least one bus bar portion, and a refractive layer disposed on the first conductive layer.

Carbon Nanotube-Graphene Hybrid Transparent Conductor and Field Effect Transistor - A nanotube-graphene hybrid film and method for forming a cleaned nanotube-graphene hybrid film. The method includes depositing nanotube film over a substrate to produce a layer of nanotube film, removing impurities from a surface of the layer of nanotube film not contacting the substrate to produce a cleaned layer of nanotube film, depositing a layer of graphene over the cleaned layer of nanotube film to produce a nanotube-graphene hybrid film, and removing impurities from a surface of the nanotube-graphene hybrid film to produce a cleaned nanotube-graphene hybrid film, wherein the hybrid film has improved electrical performance. Another method includes depositing nanotube film over a metal foil to produce a layer of nanotube film, placing the metal foil with as-deposited nanotube film in a chemical vapor deposition furnace to grow graphene on the nanotube film to form a nanotube-graphene hybrid film, and transferring the nanotube-graphene hybrid film over a substrate.

05-23-2013

20130131383

Controlled Assembly of Charged Nanoparticles Using Functionalized Graphene Nanomesh - A method, an apparatus and an article of manufacture for attracting charged nanoparticles using a graphene nanomesh. The method includes creating a graphene nanomesh by generating multiple holes in graphene, wherein each of the multiple holes is of a size appropriate to a targeted charged nanoparticle, selectively passivating the multiple holes of the graphene nanomesh to form a charged ring in the graphene nanomesh by treating the graphene nanomesh with chemistry yielding a trap with an opposite charge to that of the targeted nanoparticle, and electrostatically attracting the target charged nanoparticle to the oppositely charged ring to facilitate docking of the charged nanoparticle to the graphene nanomesh.

05-23-2013

20130143000

Forming Patterned Graphene Layers - An apparatus and method for forming a patterned graphene layer on a substrate. One such method includes forming at least one patterned structure of a carbide-forming metal or metal-containing alloy on a substrate, applying a layer of graphene on top of the at least one patterned structure of a carbide-forming metal or metal-containing alloy on the substrate, heating the layer of graphene on top of the at least one patterned structure of a carbide-forming metal or metal-containing alloy in an environment to remove graphene regions proximate to the at least one patterned structure of a carbide-forming metal or metal-containing alloy, and removing the at least one patterned structure of a carbide-forming metal or metal-containing alloy to produce a patterned graphene layer on the substrate, wherein the patterned graphene layer on the substrate provides carrier mobility for electronic devices.

06-06-2013

20130143769

Graphene Nanomesh Based Charge Sensor - A graphene nanomesh based charge sensor and method for producing a graphene nanomesh based charge sensor. The method includes generating multiple holes in graphene in a periodic way to create a graphene nanomesh with a patterned array of multiple holes, passivating an edge of each of the multiple holes of the graphene nanomesh to allow for functionalization of the graphene nanomesh, and functionalizing the passivated edge of each of the multiple holes of the graphene nanomesh with a chemical compound that facilitates chemical binding of a receptor of a target molecule to the edge of one or more of the multiple holes, allowing the target molecule to bind to the receptor, causing a charge to be transferred to the graphene nanomesh to produce a graphene nanomesh based charge sensor for the target molecule.

06-06-2013

20130164882

TRANSPARENT CONDUCTING LAYER FOR SOLAR CELL APPLICATIONS - Disclosed is a method which includes forming a bottom metallic electrode on an insulating substrate; forming a semiconductor junction on the metallic electrode; forming a transparent conducting overlayer in contact with the semiconductor junction; and forming a metallic layer in contact with the transparent conducting overlayer, wherein the metallic layer is formed by a plating process. The plating process may be an electroplating process or an electroless plating process. The transparent conducting overlayer may be carbon nanotubes or graphene. The semiconductor junction may be a p-i-n semiconductor junction, a p-n semiconductor junction, an n-p semiconductor junction or an n-i-p semiconductor junction.

06-27-2013

20130164888

Graphene Solar Cell - A solar cell includes a semiconductor portion, a graphene layer disposed on a first surface of the semiconductor portion, and a first conductive layer patterned on the graphene layer, the first conductive layer including at least one bus bar portion and a plurality of fingers extending from the at least one bus bar portion.

06-27-2013

Ahmed A. Maarouf, Mohegan Lake, NY US

Patent application number

Description

Published

20140203467

METHOD OF FORMING GRAPHENE NANOMESH - A method of reducing the diameter of pores formed in a graphene sheet includes forming at least one pore having a first diameter in the graphene sheet such that the at least one pore is surrounded by passivated edges of the graphene sheet. The method further includes chemically reacting the passivated edges with a chemical compound. The method further includes forming a molecular brush at the passivated edges in response to the chemical reaction to define a second diameter that is less than the initial diameter of the at least one pore.

07-24-2014

20140205796

METHOD OF FORMING GRAPHENE NANOMESH - A graphene nanomesh includes a graphene sheet having a plurality of pores formed therethrough. Each pore has a first diameter defined by an inner edge of the graphene sheet. A plurality of passivation elements are bonded to the inner edge of each pore. The plurality of passivation elements defines a second diameter that is less than the first diameter to decrease an overall diameter of at least one pore among the plurality of pores.

07-24-2014

Fares K. Maarouf, San Diego, CA US

Patent application number

Description

Published

20120146686

PRE-EMPHASIS TECHNIQUE FOR ON-CHIP VOLTAGE-DRIVEN SINGLE-ENDED-TERMINATION DRIVERS - A transmitter configured for pre-emphasis is described. The transmitter includes a voltage-driven single-ended-termination driver circuitry. The voltage-driven single-ended-termination driver circuitry includes a first termination point and a second termination point. The transmitter also includes a pre-emphasis encoder circuitry. The pre-emphasis encoder circuitry receives a pre-emphasis signal. The transmitter may reduce signal loss in transmission lines by detecting a transition in a data stream, adjusting a source determination resistance and obtaining a gain from the adjusted source determination resistance.

06-14-2012

20130082744

Apparatus to Implement Symmetric Single-Ended Termination in Differential Voltage-Mode Drivers - A differential voltage mode driver for implementing symmetric single ended termination includes an output driver circuitry having a predefined termination impedance. The differential voltage mode driver also includes an output driver replica having independently controlled first and second portions. The first and second portions are independently controlled to establish a substantially equal on-resistance of the first and the second portions. The output driver replica controls the predefined termination impedance of the output driver circuitry.