Research, Computer Graphics and GPU

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If you have ever dreamed to see a chip operating at a transistor level, take a look at this crazy project presented at Siggraph this year: a transistor level simulator of the 6502 CPU (that was powering the Apple 2) !

Greg James, Barry Silverman, Brian Silverman who are leading this project built the simulator by reverse engineering the chip from high resolution die shots they used to reconstruct the full polygon model of the chip circuits !

Support for malloc() and free() in kernels: dynamic global memory allocation !

This is implemented with a new syscall linking mechanism that seems to allow kernel to be linked to precompiled system calls. Infos on the linking mechanism (.calltargets , .callprototype ) can be found in section 10.3 of the PTX ISA manual. I hope this mechanism will get exposed for user functions in the API !

64 bits addressing support in CUDA driver AP: Allows manipulating more than 4GB of device memory.

New System Management Interface (nvidia-smi) for reporting various hardware counters informations