(1) If the port pins PJ.4/LFXIN and PJ.5/LFXOUT are used as digital I/Os, they are connected by a 4-pF capacitor and a 35-MΩ resistor in series. At frequencies of approximately 1 kHz and lower, the 4-pF capacitor can add to the pin capacitance of PJ.4/LFXIN and/or PJ.5/LFXOUT.

(2) The input leakage current is measured with VSS or VCC applied to the corresponding pins, unless otherwise noted.

(3) The input leakage of the digital port pins is measured individually. The port pin is selected for input, and the pullup or pulldown resistor is disabled.

(4) An external signal sets the interrupt flag every time the minimum interrupt pulse duration t(int) is met. It may be set by trigger signals shorter than t(int).