The Edge Contamination Standard which appears to the naked eye as a bare silicon wafer. Microscopic polystyrene latex spheres are deposited at four distinct spot locations along its edge at an arc length of approximately 25 mm, and 10 mm deep.

A wafer cross section schematic of the ECS.

TAKE YOUR METROLOGY TO THE BRINK. The Edge Contamination Standard (ECS) is a bare silicon wafer that has microscopic latex spheres which have been spot deposited on the wafer's edge. The Edge Contamination Standard is designed for particle size standards calibration of instruments that detect and size particles standards on the substrate's wafer edge.

Edge Contamination Standards Product Description

VLSI Standards' particles size standards solution for wafer edge contamination metrology utilizes precise spot deposition of polystyrene latex spheres (PSL) onto four distinct regions on the substrate's wafer edge. Each deposition area covers the top and bottom near wafer edges, the top and bottom wafer bevels, and the apex or true edge of the wafer. This allows the user to perform both topside and backside wafer inspections to check the complete sensitivity of the edge contamination standard tool.

The PSL spheres deposited on the Edge Contamination Standard are highly spherical, have well-characterized optical properties and a very tight monodisperse size distribution. These parameters make PSL spheres a useful material for the calibration and monitoring of particle counting instruments. These PSL particle size standards come with nominal 0.5 Ám, 1.0 Ám, 2.0 Ám and 5.0 Ám PSL particle sizes. Approximately a few thousand PSL particles are located in each deposited region.

Although VLSI Standards provides you with the PSL particle count value on the calibration certificate, the Edge Contamination Standard ECS is designed to calibrate particle size standards and tool sensitivity, and not necessarily PSL particle count.