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Tag: Output Amplifier

One of the facts which I’ve been writing about, is that I possess the open-source version of ‘SPICE’, that is named ‘NG-SPICE’, and that this acronym stands for ‘Simulation Program, with Integrated Circuit Emphasis’. The full, associated suite of programs allows me to edit schematic diagrams graphically, but to export ‘Netlists’, so that I can then simulate the circuit – and see if it works.

And one of the facts which I have also been contemplating, is that by default, SPICE will put transistors, which correspond to micron-sized transistors, which will therefore never be able to drive output-loads, from a hypothetical IC, unless an explicit attempt is made, to design output-buffers, which can. These output-amplifiers have as function, that they should merely follow their input voltage, but draw as little current from their respective inputs as possible – that are outputs of other, more interesting ICs – while allowing low load-resistances to be connected to their own outputs, which correspond to plausible external components, such as 100Ω load-resistors.

I had posted an earlier, conceivable design, of such an output-buffer, which had a major flaw, that I also pointed out in the preceding posting: That amplifier could only produce a range of voltages, which was a direct function of what the Gate-Source threshold voltages would be, of the component transistors used. Hence, because I had also specified low-quality, outdated MOSFET transistors with high threshold-voltages, the output-voltage-range, was also modest but reasonable. But, newer transistors will have lower threshold voltages by design, which would, oddly enough, reduce the voltage-range of that amplifier. This would be an important consideration if the transistors were not in fact discrete, but needed to be incorporated onto the IC, where low-threshold-voltage transistors are already standard. Which means, that I needed to design a better output-buffer.

So below is a better output-buffer, schematic:

And these are the SPICE definitions, of the discrete transistors which I decided to base my design on again, both enhancement-mode MOSFETs:

The main disadvantage of this latest design would be, that the transistors which I labeled ‘X2′ and ‘X3′, do in fact conduct current to their combined inputs, which makes the additional transistor ‘X1′ necessary, since this amount of current would already be excessive, to connect to an output, of any pre-existing IC circuits. But then, the advantage goes so far, that ‘X2′ now models a level-shift, which exactly mirrors the level-shift of ‘X4′, and the voltage-level-shift of ‘X3′ now mirrors ‘X5′. There is design beauty in this. But one disadvantage now is, that the Gate-Source threshold-voltage of (1) n-Channel MOSFET (2.2V) plus (1) p-Channel MOSFET (3.2V) gets subtracted from the input-voltage, so that the available voltage-range still suffers, with respect to both the supply, and the input-voltage. Input-voltage now ranges from 5.4V to approximately 12.5V, which is closer to the range of supply-voltages than what the previous circuit allowed, and the resulting output-voltages are graphed below:

(Update 06/20/2018, 0h20 : )

There is another observation which I should add:

In the days of vacuum tubes, ‘transconductance’ was measured in Amperes / Volt, and was therefore given in ‘Mhos’, which were the reciprocal of Ohms. Apparently, in modern days, the transconductance of a MOSFET, also given as its ‘KP’, is in Amperes / Volt2 . This conscious design-decision must follow the real-world behavior of MOSFETs, but makes my earlier Math, of multiplying such a component-property by the series-resistance, to arrive at gain, incorrect. Gate-Source voltage-changes lead to current-changes, but greater Drain-Source voltages, lead to greater current-gain. This is good, because the actual gain of a MOSFET, reduces the apparent capacitance at its Gate.

In This earlier posting, I described how I can use the program ‘NG-SPICE’, along with its associated GUI-applications, to create and edit circuit diagrams, and then to simulate approximately how those would function if actually implemented as circuits.

‘SPICE’ stands for ‘Simulation Program, with Integrated Circuit Emphasis’. And one of the facts which I had lamented in the posting linked to above, was that it tends to produce default transistors, that correspond to transistors one would find on an IC, those having sizes of 1 micron and smaller. Therefore I faced the challenge which I believe professional IC-designers also face, which is, to make circuits small that contain many transistors, yet, to drive output-pins of the ICs in such a way, that at least, discrete components can be connected to those output-leads, without doing so collapsing the output-waveforms.

But, my hypothetical solution to this problem will be different, from the professionally-chosen solution. What I think gets done commercially, is that special output-transistors are put on the IC, that take up greater surface-area there than unit transistors do, and which are difficult to diagram in a schematic faithfully, to how schematics depict discrete-transistor circuits. My solution was to accept the legacy n-Channel, ‘2N7000′, and the legacy p-Channel, ‘BS250P’, discrete, enhancement-mode MOSFET transistors, in the spirit that bipolar-transistor solutions are to be avoided, if the main chip-technology was MOSFET, but to mark these components as being ‘special’ – even though ages ago, the discrete components would have been regarded as ‘normal’, while the IC components would have been regarded as ‘special’, I defined those discrete components within NG-SPICE, as subcircuits, which are therefore labeled with descriptors that begin with the letter ‘X…’ , as opposed to native MOSFETs, that are to be labelled with the letter ‘M…’ .

Here are the subcircuit, Netlist-definitions of these two, now-defunct transistor-types:

I understand that this was to be an exercise, at amplifying the output of a hypothetical IC, as if with discrete components that would need to be connected to the IC externally, but remember, that equivalent, low-quality MOSFETs can be incorporated into any chips which are to be manufactured, so that in the event that they are, external components would not be necessary.

I also understand that my schematic is imperfect, in that it creates voltage-level-errors, but that such errors would become irrelevant, if the output-amplifier was put inside a feedback-loop, that has high, open-loop gain, as such a feedback loop would also just correct the voltage fed in to the circuit of this posting, so that correct output-voltages nevertheless follow.

This is the schematic:

One reason for the voltage-level errors is the fact that in this schematic, ‘X1′ and ‘X3′ do not match, and that equally, ‘X2′ and ‘X4′ do not match. Even though ‘X1′ and ‘X2′ were meant to model the threshold-voltage, with which each transistor turns on, and then to apply the correct level-shifts to the gates of ‘X3′ and ‘X4′, the main problem in my design is, that ‘X1′ is of the p-Channel type, while ‘X3′ is of the n-Channel type, and vice-versa. There was never any guarantee, that the positive threshold-voltage of the n-Channel transistor, exactly mirrors the negative threshold-voltage, of the p-Channel transistor! But, unless such an amplifier is to place a load-current onto the input-terminal, I found no simple way to avoid this situation. As it stands, the input-terminal would offer minimum load on the circuit designed in the posting linked to above, because all it drives is floating gates. All this does is add some capacitance, while the driven output-resistance of 100Ω, is a direct function of the fact that the chosen, discrete MOSFETs, were only able to handle 200mA maximally.

Interestingly enough, the direction of the level-shift between ‘X1′ and ‘X3′ is the same, as the direction in which ‘X2′ and ‘X4′ shift the voltage-levels, which means that ‘VSD(X1)’ + ‘VDS(X2)’ == ‘VGS(X3)’ + ‘VSG(X4)’, for which reason the circuit can be expected to work anyway. And, neither the Source-Drain current through ‘X1′, nor that through ‘X2′, ever reverse, over the operating range.