S/390, zSeries and System z9/z10, IBM zEnterprise z196

Support for the zEnterprise z196 processor has been added.
+ When using the -march=z196 option, the compiler
+ will generate code making use of the following instruction
+ facilities:
+

+

Conditional load/store

+

Distinct-operands

+

Floating-point-extension

+

Interlocked-access

+

Population-count

+

+ The -mtune=z196 option avoids the compare and
+ branch instructions as well as the load address instruction
+ with an index register as much as possible and performes
+ instruction scheduling appropriate for the new out-of-order
+ pipeline architecture.

+

When using the -m31 -mzarch options the generated
+ code still conforms to the 32 bit ABI but uses the general
+ purpose registers as 64 bit registers internally. This
+ requires a Linux kernel saving the whole 64 bit registers when
+ doing a context switch. Kernels providing that feature
+ indicate that by the 'highgprs' string
+ in /proc/cpuinfo.