Codasip

Czech Republic

Codasip is a rapidly growing company focused on redefining embedded processing for the IoT era through groundbreaking RISC-V IP and automation technology. As a founding member of the RISC-V Foundation and the first to offer commercial RISC-V IP cores Codasip is a leader in this disruptive market. RISC-V is an open ISA available on a royalty free basis and is modular and extensible. Codasip offers a range of RISC-V cores covering the market from 8-bit core upgrades to high performance embedded applications. A key benefit of the RISC-V ISA is the ability to create custom extensions. Uniquely Codasip has the Studio automation tools to enable licensees to rapidly generate extended or custom cores and the supporting SDKs, verification environments and simulators. Codasip has offices and representatives in all the major regions of the world. For more information visit www.codasip.com

Services

Processor optimization services

IP Cores

Codix-Bk1 RISC-V 32-bit core with ‘zero-stage’ pipeline

The Bk1 is the smallest member of Codasip’s RISC-V family and has been optimized to achieve a low gatecount by using 16-registers and a ‘zero-stage’ pipeline. Starting around 9 kgates it is conceived as a natural migration path from embedded 8-bit processor cores and can deliver both greater computational performance and lower power. The standard version implements the RV32EMC instruction set (other variants are possible). Custom extensions are possible using Codasip design tools.

Codix-Bk3 RISC-V 32-bit core with 3-stage pipeline

The Bk3 processor is aimed at medium complexity embedded applications such as IoT edge devices and has a 3-stage pipeline. The standard version implements the RV32IMC instruction set but other variants are possible (such as using 16-registers and the E integer instructions). The Bk3 may be optionally used with instruction and data caches. The core starts around 20 kgates and custom extensions are possible using Codasip design tools.

Codix-Bk5 RISC-V 32-bit core with 5-stage pipeline

The Bk5 processor is aimed at higher complexity embedded applications such as industrial control devices and has a 5-stage pipeline. The standard version implements the RV32IMC instruction set and has a branch predictor but other variants are possible (such as optional single precision floating point). The Bk5 may be optionally used with instruction and data caches. The core starts around 26 kgates and custom extensions are possible using Codasip design tools.

Codix-Bk5 RISC-V 64-bit core with 5-stage pipeline

The Bk5-64 processor is aimed at higher complexity embedded SoCs that need to access more than a 4GB address space. Typical application areas are SSD and enterprise storage, or MAC layer protocol processing in wireless networking. It has a 5-stage pipeline, thirty-two 64-bit registers and a jump predictor. The standard version implements the RV64IM instruction set and optionally a single precision floating point [F] extensions. The Bk5-64 may be used with instruction and data caches. The core starts around 54 kgates and custom extensions are possible using Codasip design tool8 kgates.

Codix-He 16- or 32-bit compact core

The Codix-He core is aimed at embedded applications requiring a small silicon area. It has variable length instructions (16-, 24- and 32-bit) and has an optional parallel multiplier. The 16-bit version starts around 7 kgates and the 32-bit version starts around 18 kgates.