We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Firefox,
Internet Explorer 11,
Safari. Thank you!

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

The L2 cache is designed to overlay a real memory store of some sort, and I really doubt there's any way to get it to simply behave like another block of RAM. In theory you may be able to load values into the L2 cache and then lock them so an address range that's not really even there will look like a RAM, but you're not going to find anyone who can tell you how to do that or if it will really work or not. That would be entirely up to you to figure out. Let us know if you get it to work!

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

The L2 cache is designed to overlay a real memory store of some sort, and I really doubt there's any way to get it to simply behave like another block of RAM. In theory you may be able to load values into the L2 cache and then lock them so an address range that's not really even there will look like a RAM, but you're not going to find anyone who can tell you how to do that or if it will really work or not. That would be entirely up to you to figure out. Let us know if you get it to work!

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

Another posibility is to run code directly from a QSPI device, as execute in place mode. However, this is another advanced area that you would need to overcome some complexity (mostly with the linker) mostly by yourself.

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

Or if you need RAM have some unused block RAM in the PL, you could add an AXI4 BRAM interface and the RAM would appear in one of the master AXI address spaces... Not having any DDR3 would certainly simplify the board layout and reduce power consumption.

Re: Can the L2 Cache of ZYNQ be able to used as RAM just like the OCM?

I wrote a bootrom a while back that would load the second stage bootloader into the L2 and then execute from the L2. Obviously this was before DDR was initialized and translation tables were set up. So it is possible but if you wanted to do this after the system boots it would be very painful to figure out. Just adding BRAM would be much easier.