I've read a lot of threads (here and elsewhere) about decoupling caps, as well as articles and analysis. Nevertheless, I cannot find a capacitor able to meets the requirements of an IC manufacturer. Namely:

capacitance of 1uF

voltage rating between 10 and 20 VOLT

low ESR

"resonance frequency in the range of 20 MHz and higher." (cit.)

The fourth point is driving me crazy.
In 99.99% of cases ESL data are not reported at all on commercial data-sheets so I cannot select any product. When lucky is with you just generic sentences like "ideal for decoupling at high frequencies", "decoupling of ICs", etc. are reported.
I have found some potential candidates (i.e. Murata GQM series and other) but they offer a maximum of 0.1uF as capacitance.

I wrote also an email to the IC manufacturer but I'm still waiting for an answer since one week (they forwarded my question to their engineers. )

Are caps with above characteristics existing in real life?
Should I give up?

Most monolithic ceramic capacitors we used on TTL boards (ca. 1970-1985) were 50V or 100V. Using a capacitor with a higher breakdown voltage rating should not be a problem. The 1μF was always more for the transient current demand of the TTL chip. In addition we would add 0.1 μF and 0.01 μF to create a distributed capacitance profile of the entire board. The high frequency decoupling of the supply was mostly performed by the lower value devices. They have substantially less reactance at high frequencies. I think you are over thinking the problem.

Most monolithic ceramic capacitors we used on TTL boards (ca. 1970-1985) were 50V or 100V. Using a capacitor with a higher breakdown voltage rating should not be a problem. The 1μF was always more for the transient current demand of the TTL chip. In addition we would add 0.1 μF and 0.01 μF to create a distributed capacitance profile of the entire board. The high frequency decoupling of the supply was mostly performed by the lower value devices. They have substantially less reactance at high frequencies. I think you are over thinking the problem.

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Honestly, I have no idea if I'm over thinking or not.

So you suggest to use one "generic" MLCC as tank capacitor (I don't know if the term is correct) and add a second smaller one to absorb glitches generated from internal circuit switching? In this case I could narrow my search for high self-resonant caps to the 0.01-0.1uF range, I'm right?

The decoupling problem has actually shifted over the years due to the onrush of technology. In plain vanilla TTL there was always a large quiescent current consumption. The step change in current demand on individual chips could actually make a soft power supply droop below say 4.75 V which would compromise the integrity of the system. As we switched away from TTL to CMOS the nature of the problem changed. A static CMOS design draws very little quiescent current, but each time an output switches there is a momentary short from Vdd to GND. Power consumption in a CMOS circuit depends on the frequency and the square of the Vdd supply voltage. As switching frequencies goes up the +5V supply standard for TTL becomes less and less tenable. that is why we have seen a migration from +5V to 3.3V, 2.8V, 1.8V, 1.2V, and 0.8V. Each time we raise the frequency and lower the Vcc the decoupling problem changes.

So you suggest to use one "generic" MLCC as tank capacitor (I don't know if the term is correct) and add a second smaller one to absorb glitches generated from internal circuit switching? In this case I could narrow my search for high self-resonant caps to the 0.01-0.1uF range, I'm right?

Click to expand...

Yes, this is what I would recommend. A tank circuit is particular to RF work and has minimal application here since we are dealing with frequencies and inductances that do not require such considerations. When the wavelength of the highest frequency components of interest starts to approach the dimensions of the PC board then you can start worrying again. The wavelength for 20 MHz. is approximately 15 meters, which last time I checked my meter stick, would be an impressive PCB.

Perhaps you need to read up on capacitors. The manufacturers work very hard to make their capacitors non-resonant (by them self's).

Typically a .1uF ceramic cap is sufficient when placed close to the power pin. If you are very concerned with high frequency then change the cap to a .01uF and put a .1uF near it. Although, high frequency design is not solved by just caps placed close to the chip, you need a ground plane to make it work.

I will connect it to the PCB ground pour, even if many people think that in this way you will get a radio antenna spreading noise around.
Some people recommend to connect the GND side of the cap to the GND pin of the IC itself with the shortest path possible...

1) A 1uF may be a requirement, but I would put a 0.1uF in parallel.
2) What difference does a 10V range of breakdown voltages make? Answer: None what so ever. Select one with a rating > your Vcc times 2.
3) Select a ceramic cap. They are inherently low ESR.
4) Resonant frequency > 20MHz? If this is a requirement, then a 1uF ain't gonna cut it. The very BEST resonant freq for a 1uF chip is ~ 5MHz (series 1nH). Even a 0.1uF only has a best case resonant freq of 15MHz.

This illustrates the pitfalls of manufacturer's datasheets. A lot of times they are put together by people not that close to the design and they make "errors". The responsible engineers should be reviewing the final datasheet, but often times it is a "Looks okay to me" kind of check.

SMD is the way to go for low cost manufacturing and low inductance (no leads).

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Yeah, but I'm going to place the PCB in an environment rich of vibrations (a vehicle) and I would avoid SMT if not strictly necessary. I still 100% don't trust SMT for this applications (even if the board will be keep in place by soft silicon rubber).

I saw people soldering SMD caps using a huge amount of solder with a traditional soldering iron. It works, but a lot of inductance is added so that caps becomes almost useless for decoupling.
On the other had, to make orthodox soldering, you should put a controlled and extremely thin layer of solder paste and go for reflow. The drawback of this is the weakness of the contact, it is prone to be break by vibrations (sometimes just the deformation of the PCB can break it as temperature increases).

For above reasons I would feel really more comfortable if I could use 100% PTH-mounted components, even if books says I'm crazy. This is a typical case where theory encounter reality.

By placing the 0.1uF cap leads just 0.1 inch away from the IC's pin I will loss all the performance? There are documented analisys about this argument?

For above reasons I would feel really more comfortable if I could use 100% PTH-mounted components, even if books says I'm crazy.

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If you do this, you are crazy. If you are worried about vibration throwing your parts off the board, mount the board in a module and pot the thing with epoxy. Most SMD parts have such a low moment of inertia that vibration doesn't effect them much.

I've read a lot of threads (here and elsewhere) about decoupling caps, as well as articles and analysis. Nevertheless, I cannot find a capacitor able to meets the requirements of an IC manufacturer. Namely:

capacitance of 1uF

voltage rating between 10 and 20 VOLT

low ESR

"resonance frequency in the range of 20 MHz and higher." (cit.)

The fourth point is driving me crazy.
In 99.99% of cases ESL data are not reported at all on commercial data-sheets so I cannot select any product. When lucky is with you just generic sentences like "ideal for decoupling at high frequencies", "decoupling of ICs", etc. are reported.
I have found some potential candidates (i.e. Murata GQM series and other) but they offer a maximum of 0.1uF as capacitance.

I wrote also an email to the IC manufacturer but I'm still waiting for an answer since one week (they forwarded my question to their engineers. )

Are caps with above characteristics existing in real life?
Should I give up?

In most cases you might need a combination of supply decoupling capacitors.

One example scheme might be a 47u electrolytic for every 5 or 10 chips. You should have at least 0.1u per chip as close to the supply pins as possible. Some manufacturers go for 0.22u or even 0.47.

If there's a really difficult problem with HF noise on the rails, you may want to go to the extreme of also adding 0.01 or 0,001u caps in parallel with each 0.1.

You can get disc ceramic caps for RF use - but the types sold for supply decoupling get increasingly lossy as frequency goes up, they tend to dissipate supply rail spikes as a temperature rise, and are less likely to resonate with parasitic inductances in the supply rail traces. Very low loss decoupling capacitors can cause as much trouble as they cure!

Yeah, but I'm going to place the PCB in an environment rich of vibrations (a vehicle) and I would avoid SMT if not strictly necessary. I still 100% don't trust SMT for this applications (even if the board will be keep in place by soft silicon rubber).

I saw people soldering SMD caps using a huge amount of solder with a traditional soldering iron. It works, but a lot of inductance is added so that caps becomes almost useless for decoupling.
On the other had, to make orthodox soldering, you should put a controlled and extremely thin layer of solder paste and go for reflow. The drawback of this is the weakness of the contact, it is prone to be break by vibrations (sometimes just the deformation of the PCB can break it as temperature increases).

For above reasons I would feel really more comfortable if I could use 100% PTH-mounted components, even if books says I'm crazy. This is a typical case where theory encounter reality.

By placing the 0.1uF cap leads just 0.1 inch away from the IC's pin I will loss all the performance? There are documented analisys about this argument?

Click to expand...

I think your fears are mostly overblown. You can go with your gut if you want, but you need to own the ramifications.

@SLK001
(I hope that we are not going off-topic)
I'm pretty sure that parts will not fly away with SMT methods. This kind of failures are detected as a significant change of electric characteristics of the circuit. What I mean is that you can have micro fractures when the board is expanding and contracting with temperature.
Try to imagine two points A and B that get closer and then goes away one from the other. Repeat this process for years. If you have a rigid SMD component placed between A and B it will be cyclically stressed until it is cracked; this is a law of nature, we cannot do anything about it.
On the other hand, components mounted on leads have a natural flexibility: the lead can move/bend a little and "isolate" in such way the component from the "movements" of the board.
Potting will not change this.
(When I write "crack" I mean something that you cannot check with your eyes. The fracture is inside the body of the component)

This study from Vishay Electronics is quite intersting, and MLCC caps are the weakest component of the PCB.

About solder paste thickness: if you check recommended soldering specifications you will be surprised on how much thin the solder layer should be.