The system's SIP EnCoRe II process chambers use high power density sputtering sources that create dense, CVD-like conformal films for thin tantalum barrier and copper seed layers with minimal overhang, even at the bottom of very deep, small via holes. Also, sputtering target lifetime has been doubled to more than 20,000 wafers, reducing cost of ownership and maintenance requirements according to the Santa Clara, Calif., supplier of semiconductor equipment and services.
The system is fully qualified and slated for 65nm production by a major chipmaker.