The mP6 made use of the MMX instruction set and had three MMX pipelines which allowed the CPU to execute up to three MMX instructions in a single cycle. Its three integer units made it possible to execute three integer instructions in a single cycle as well and the fully pipelined floating point unit could execute up to two floating-point instructions per cycle. To further improve the performance the core utilized branch prediction and a number of techniques to resolve data dependency conflicts.[3] According to Rise, the mP6 should perform almost as fast as Intel Pentium II at the same frequencies.[5]

Despite its innovative features, the real-life performance of the mP6 proved disappointing. This was mainly due to the small L1 Cache.[5] Another reason was that the Rise mP6's PR 266 rating was based upon the old Intel Pentium MMX,[5] while its main competitors were the Intel Celeron 266, the IDT WinChip 2-266 and the AMD K6-2 266, that all delivered more performance in most benchmarks and applications.[5] The Celeron and the K6-2 actually worked at 266 MHz, and the WinChip 2's PR rating was based upon the performance of its AMD opponent.[5]

Silicon Integrated Systems (SiS) licensed the mP6 technology, and used it in the SiS 550, a system-on-a-chip (SoC) that integrated the mP6 CPU, the north and south bridges, and sound and video on a single chip. The SiS 550 saw use in some compact PCs and in consumer devices, such as DVD players. The SiS 551 chip was also marketed by DM&P as Vortex86 (M6127D).

Later DM&P took over mP6 design from SiS and continues development under Vortex86SoC product line.

DM&P further signed an agreement with Xcore to allow them to rebrand the chip as Xcore86.[6]