Ultra-low power 16-bit microcontroller core consumes less than 40 uA per MIPS.

GRENOBLE, France – November 2008 – Tiempo today announces its new chip, fully operational at first run, that silicon-proves its 16-bit microcontroller core IP – TAM16 – on a CMOS 130 nm general-purpose process. The chip logic has been entirely designed in Tiempo’s innovative asynchronous and delay insensitive technology.

The 16-bit microcontroller core offers a power-efficient instruction set, with fast, energy-efficient and easy-to-program interrupt management and peripheral communications, making it ideally suitable for ultra-low power embedded electronics. The core also integrates various peripherals such as interrupt controller, UART and cascadable timers, and is interfaced to standard ROM (incl. BIST) and RAM.

Chip core consumes down to 37 μA per MIPS when operating at 0.7 V (47 μA at 1.2 V), including leakage current of used general-purpose process. Power consumption of instructions that include communication with peripherals and memories - and that typically require 2 or 3 clock cycles with a synchronous microcontroller – was measured at 61 μA, i.e., less than 25 μA per (equivalent) MHz.

Thanks to its innovative design technology, the microcontroller instantaneously falls into sleep mode when no activity is detected and wakes-up in a few nanoseconds when activity resumes.

Targeted applications are ultra-low power chips for embedded electronics, e.g. power management chips, sensor networks, metering devices, RFID, smartcards, but also chips that must operate with low electromagnetic emissions, e.g. electronics for the automotive and medical industries.