Through a program called RapidStart, optimized for TSMC's 0.18-micron process, Cadabra said it can dramatically reduce its customers' overall library development time through use of a popular and proven starting point for the setup of cell architecture and scripts for Classic-SC.

"Cadabra is in the business of improving productivity for library developers and chip designers while delivering higher quality results," said Philippe Hurat, director of strategic marketingfor Cadabra. "RapidStart allows designers to quickly come up to speed on the use of the layout creation tools resulting in faster development cycles and higher quality layouts.

"In addition, RapidStart acts as an effective tool for training new users on the use of Classic-SC. We will continue to focus on tools and methodologies that are needed to implement an efficient Library Factory flow for our customers to generate application-specific libraries."

Included in RapidStart are setup files for the 0.18-micron design rules and a cell architecture that allows development of good quality standard cells. The cell architecture can be easily modified by creating a new physical specification file allowing for architectural exploration to achieve high
performance, low power or high density layouts. The user can utilize the cell netlists as a starting point and exercise the ATL scripts bundled in to create standard cell layouts. Additional cells can be created by providing new Spice netlists.

"TSMC has always been driven by its customers' needs, and time-to-market is a critical requirement for designers in the fabless, IDM and system house markets," said Kurt Wolf, director of marketing for TSMC North America in San Jose. "We support Cadabra's release of RapidStart based on TSMC technology because it will help customers develop high-quality designs while reducing library development time, and ultimately time-to-manufacturing."