The goal of this project to design a slice extender board, which contains non-volatile reprogrammable cpld to connect io lines as required. The configuration can be written in verilog or similar vhdl laguage, and a new config downloadable on the cpld's own jtag port.

Help and ideas needed:

How to use xmos jtag chain for programming a cpld ? Is it make sense ?

May be... Build a "hw in a loop" test system. 1) The cpld pins accessable trough jtag while normal operation... 2) some stimulator imp. may fit in a cpld too...