"vfAnalyst assumes symmetric multi-processing," the firm's CEO mike Beunder told Electronics Weekly. "There are a few platforms that do that, a quad core x86 for example, but the reality is you might have an ARM core and two DSPs."

Currently ARM Cortex-A9 and x86 architectures are supported, with more to follow.

"vfEmbedded has the specifics of an ARM core in terms of performance, so you put down an ARM and tell it what frequency it is going to run at," explained Beunder.

And accuracy?

"We do take some bus contentions into account and the bus width. We are not going down to the level of cycle-accurate simulations. Accuracy is between +/-10 and +/-15%," he said. "We have a second level of modelling that can take it to +/-5% for specific platforms and specific vendors, although this is not part of vfEmbedded," he said.

The partitioning process identifies the sections of code that can be run, in parallel, then the process of mapping allows the developer to decide which software partition to allocate to each processor core.

Separate memories, accelerators or other hardware in the architecture can be modelled by providing performance information. Code partitions can then be mapped onto the hardware for more accurate performance estimation.

"All we have to know, for example, is that there is a way of accelerating H.264. The level at which you need to provide information for the accelerator are generic variables available form third parties on the web," said Beunder. "You can drop on an x86, and if that performance is good enough, you can leave it there without thinking about the accelerator. "

Once the partitioning and mapping decisions are complete, the tool provides a set of step-by-step instructions, referred to as a recipe, from which those decisions can be implemented.

The firm claims vfAnalyst, the partitioning tool underneath, will not damage code.

"We partition only when it is legal to partition, this is 100% guaranteed," claimed Beunder.