But if you're saying that there is only DMA completion inetrrupt,
you *cannot* completely emulate SFF-8038i BMDMA since its interrupt
status is the (delayed) IDE INTRQ status. I suggest that you move
away from the emulation -- Alan has said it's possible.

As part of our efforts to get the Cavium OCTEON processor support

My suggestion then is not to emulate the ATA_DMA_INTR bit (always
returning it as 0)

No, this is not an option because you chain to ata_sff_host_intr().
However, DMA interrupt status is *not* a substitute for SFF-8038i
interrupt status (as it gets set on the S/G segment boundaries too), so
you should employ the pure software emulation for this bit, only
triggering before the control gets passed to ata_sff_host_intr().