How to use the operand cache and the instruction cache of SH7206?

Question:

How to use the operand cache and the instruction cache of SH7206 differently though they can be individually set to valid/invalid?

Answer:

Generally, both the operand cache and instruction cash are enabled and used, however, the performance might vary according to hit or miss-hit when using cache. It is used by cache off when such a variation is unwelcome.
Moreover, there are cases to make either the operand cache or the instruction cache invalid as follows.

(1) Operand cache is used but instruction cache is unused

The operand cache is used to access at high speed the variable into which the value changes frequently.
The instruction cache is not used to avoid the variation of the performance whenever executing it by cash hit/miss-hit even if the instruction cash is the same task. (Although the performance is inferior to the time the cache is used, it is always steady.)

(2) The instruction cache is used but operand cache is not used.

The instruction cache is used for eliciting performance.
Because it is necessary for operand cache to frequently guarantee coherency, the performance cannot be elicited consequently, or it is not used to avoid its process becoming complex.