IntroductionIn view
of the looming global energy crisis and an increasing desire to protect
our fragile environment, saving energy is crucial for efficient wireless
network operation. The power amplifier (PA) is the core of base stations
and repeaters and can account for more than half of their total power
consumption. Monitoring and controlling the PA can improve efficiency
and reduce operating costs; can maximize output power and achieve the
highest possible linearity; and can allow the system operator to discover
and solve problems, thus improving reliability and maintainability.

ADI has three options
for implementing a PA
monitor:1 a discrete solution, an integrated
solution based on the AD7294212-bit monitor and control system, and an integrated solution based on
the ADuC7026
precision analog
microcontroller.3 The discrete solution requires
many parts, a complicated PCB layout, and more PCB area, all of which
lead to higher cost. The AD7294 has a higher level of integration, lower
cost, and higher reliability, but it needs an external microcontroller
(MCU) to implement the functions. The ADuC7026 shares many of benefits
of the AD7294, but it includes the MCU. In addition, the ADuC7026 supports
external synchronized sampling, which is useful for TD-SCDMA applications.

This article describes
a reference design—based on the ADuC7026—that realizes the functions of
monitoring and controlling the power amplifier, including configuring
the output power, monitoring the voltage standing wave ratio (VSWR), monitoring
the laterally diffused metal oxide semiconductor (LDMOS) drain current
and temperature, and signaling an alarm when a parameter is over a predefined
threshold.

System Block
DiagramFigure
1 shows the block diagram of the PA monitor. The RF signal passes through
the voltage-variable attenuator (VVA), the ADL5323
predriver, the power amplifier, and the bidirectional coupler before it
is transmitted by antenna. The ADuC7026 MCU samples the temperatures and
currents of the two LDMOS stages in the PA module, as well as the forward-
and reverse power of the PA module. The MCU sends the sampled data to
the PC for display in the user interface (UI). The operator can adjust
the system parameters through the UI.

Figure
1. System block diagram.

PA Monitor ModuleTemperature
Monitoring: The power amplifier’s power consumption influences its
performance. The PA sometimes operates at a high quiescent point but at
low output power. Lots of energy is wasted heating the LDMOS devices,
thus decreasing their reliability. Monitoring the PA temperature and adjusting
its operating point can achieve best system performance.

Figure 2 shows the
functional block diagram of the temperature monitor, which uses the ADT75
digital temperature sensor to monitor the temperature of the two LDMOS
stages. Available in 8-lead MSOP and SOIC packages, the ADT75 digitizes
the temperature to a resolution of 0.0625°C.
Its shutdown mode reduces the typical supply current to 3 µA.

Figure
2. Temperature monitor functional block diagram.

Figure 3 shows the
flow chart for the temperature monitoring routine. After receiving the
temperature detection command, the ADuC7026 MCU sets the temperature detection
flag. Next, it reads the temperature data from the ADT75 via the I2C®
bus and transmits the data to the PC. Then, it looks at the ADT75’s overtemperature
pin (OS/ALERT) and turns on an LED if the temperature is over the threshold.
If the ADuC7026 receives the configure temperature threshold command,
it reads the configuration data from the PC and writes the threshold temperature
to the ADT75 via the I2C bus. If the microcontroller receives
the read temperature threshold command, it reads the threshold temperature
from the ADT75 and transmits it to the PC.

Figure
3. Flow chart for temperature monitoring routine.

Current Monitoring:
The PA performance can be improved by keeping the LDMOS drain current
stable over time and temperature; this also maintains the output power
in the expected range. The temperature and high-voltage supply influence
the drain current; the high-voltage supply also influences the drain voltage.
The LDMOS drain current can be measured with a high-voltage current-shunt
monitor. If the drain current is continuously monitored, an operator can
readjust the gate voltage when a voltage surge occurs on the high-voltage
supply to keep the LDMOS working at the best operating point.

Figure 4 shows the
functional block diagram of the current monitor, which uses the AD8211precision high-voltage current-shunt amplifier to sample the drain
current of the two LDMOS stages in the PA module. The AD8211 features
a fixed gain of 20 V/V, with a typical ±0.5%
gain error over the entire temperature range. The buffered output voltage,
which directly interfaces with typical analog-to-digital converters, is
sampled by the ADuC7026’s on-chip ADC. The drain current threshold is
set by the AD5243
digital potentiometer, which is controlled by the ADuC7026 via the I2C
bus. The output of the ADCMP600
comparator determines when the drain current is over or under the threshold.
The system lights the corresponding LED to alert the operator if the drain
current is over the threshold.

Figure
4. Current monitor functional block diagram.

VSWR Monitoring:
VSWR, a key parameter in antenna systems, provides a measure of the match
between all of the elements in the antenna system. Reverse power influences
the PA’s output power, and the transmitted signal is distorted if it is
too high. So, it is necessary to monitor VSWR to maintain optimal performance
in base stations.

Figure 5 shows the
functional block diagram of the VSWR monitor, which uses a bidirectional
coupler and the AD8364
dual TruPwrTM detector to measure forward-
and reverse power. The AD8364 two-channel, true-rms-responding RF power-measurement
subsystem precisely measures and controls the signal power. Its flexibility
allows easy monitoring and control of RF power amplifiers, radio transceiver
AGC circuits, and other communications systems. The AD8364 output can
be used to calculate VSWR and monitor the match on the transmission line.
A large VSWR indicates a problem with the antenna, so the operator should
protect the system by adjusting the PA gain or the power supply voltage.

Figure
5. VSWR monitor functional block diagram.

Autopower Control:
The transmitter must ensure that the power amplifier can satisfy the system
requirements and hold the output power at the desired value—high enough
to cover the expected area but low enough to keep from influencing another
base station. It should provide overpower protection to ensure that the
power amplifier does not operate in an overpower condition, which can
cause the power amplifier to saturate and the signal to have nonlinear
distortion. For these reasons, the output power must be tested and controlled
to make sure it remains steady.

Figure 6 shows the
functional block diagram of the autopower control loop, which comprises
the bidirectional coupler, TruPwr detector, microcontroller, and voltage-variable
attenuator. The bidirectional coupler transfers the forward power to the
TruPwr detector, which tracks the change in signal amplitude. The ADuC7026’s
on-chip ADC samples the output. The microcontroller compares the actual
output power with the expected power and uses a proportional-integral-derivative
(PID) algorithm to adjust the control voltage error, making the power
amplifier operate at the point of best performance.

Figure
6. Autopower control functional block diagram.

Figure 7 shows a
flow chart for the PID algorithm. First, the program initializes the control
parameter Kp, Ki, and Kd and sets the
expected output power. Next, the ADC samples the output of the AD8364.
The sampled data is then filtered and converted to power. Then, the difference
between the expected output power and the actual output power, the next
expected sample value, and the control voltage are calculated according
to the system transfer function, and the DAC registers are configured.
This completes one cycle of the sample and control process, which then
continues in a circular manner.

Figure
7. Flow chart for PID algorithm.

User InterfaceThe user
interface (UI) displays the detected data and responds to commands from
the operator. Figure 8 shows the flow chart for the UI. The serial port
should be opened and communication links should be started after the UI
is running. A different module can then be selected for detection and
control.

Figure
8. Flow chart for controlling the UI.

Figure 9 shows the
temperature test result. A user can change the high- and low-temperature
thresholds at any time. In the example, the high threshold is changed
from 35°C
to 31°C.
When the ambient temperature rises above the new threshold, the overtemperature
alarm light turns red and the PC sounds a continuous alarm.

Figure
9. Interface for showing temperature test result.

Hardware ConnectionFigure
10 shows the connection of the PA monitor demo. The main board is powered
by a 6-V adapter. It connects to the PC with a serial cable so that the
lower-end ADuC7026 MCU can communicate with the upper-end PC. The RF signal,
generated by the ADF4252
fractional-N PLL synthesizer evaluation board (EVB), is connected with
the RF input of the main board. The RF signal proceeds through the signal
chain as follows: RF Input®Variable Attenuator®PA Predriver®Bidirectional
Coupler®RF Output®Spectrum Analyzer. The output frequency of
the ADF4252 EVB is controlled by the PC through a parallel to serial cable.

Figure
10. Hardware connection for PA monitor demo.

ConclusionThis reference
design provides an integrated solution for monitoring and controlling
the PA in cellular base station (GSM, EDGE, UMTS, CDMA, TD-SCDMA), point-to-multipoint,
and other RF transmission systems. Using ADI’s ADuC7026 precision analog
microcontroller to implement the PA monitor application can add flexibility
with its multichannel, high-performance 12-bit ADC and DAC, as well as
its on-chip programmable logic array (PLA). Conversions can be initiated
by the external conversion input or the PLA conversion output. This is
helpful for TD-SCDMA applications, which need synchronized signals to
sample forward power. The advantage of the integrated PLA is obvious:
users can easily and compactly implement logic according to their requirements.
Moreover, all kinds of algorithms, such as PID control, VSWR monitor,
temperature monitor, and current monitor, can be realized by the ADuC7026,
so no other controllers are required. From a system design perspective,
this integrated solution can save PCB area, ease PCB layout, decrease
system cost, and improve reliability.

Neil
Zhao [neil.zhao@analog.com] has worked as a field applications
engineer with the China Applications Support Team at ADI for one
year. He provides technical support for horizontal analog products
across China. In January 2008, Neil graduated from Beihang University
with a master’s degree in communications and information systems.
He has published several articles.(return to top)

Mariah
Nie [mariah.nie@analog.com] is the manager of the China Applications
Support Team. She has worked at ADI for five years and is responsible
for supporting horizontal analog products across China. Mariah graduated
in 2003 from Beijing Institute of Technology with a master’s degree
in electrical engineering.(return to top)

Ning
Jia [ning.jia@analog.com]
is a field applications engineer with the China Applications Support
Team. At ADI for two years, he is responsible for providing technical
support for horizontal analog products across China. Ning graduated
in 2007 from Beijing University of Posts and Telecommunications
with a master’s degree in signal and information processing.(return to top)

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