The wiki is being retired!

Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!

Now place your payload in this directory and name it payload.elf. Complete the build with:

$ make

The resulting coreboot.rom file (512 KB) can now be flashed using e.g. flashrom.

Known issues

The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. See src/southbridge/nvidia/ck804/romstrap.inc and src/southbridge/nvidia/mcp55/romstrap.inc for details. On some of these boards, the MAC address is stored in a separate EEPROM, but you can't count on that.

halt -p / shutdown -P fails due to no acpi

possible issue if PCI card in PCI_1 causing hang

SATA ports 1 and 2 will not allow disk to be found SATA port 3 works and 4 is untested.

RAM

512mb ram, DIMM A1 ( 1x512mb ) - Boots

512mb ram, DIMM A2 ( 1x512mb ) - Hangs

512mb ram, DIMM B1 ( 1x512mb ) - Hangs

512mb ram, DIMM B2 ( 1x512mb ) - Hangs

1gb ram, DIMMs A2_B2 ( 2x512mb ) - Boots

1.5Gb Ram, DIMMS A2_B2_B1 (3x512Mb) - Hangs on Ram2.00

1.5Gb Ram, DIMMS A2_B2_A1 (3x512Mb) - Hangs on Ram2.00

1.5Gb Ram, DIMMS A2_B2_B1_A1 (4x512Mb) - Hangs on Ram2.00

If you can help out with this, please join the mailing list and let us know!

I, the copyright holder of this work, hereby release it into the public domain. This applies worldwide.

In case this is not legally possible:I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law.