Well my fist thought would be why the CAD SW designer had a separate switch for copper pours, clearance is clearance, and why you would not want to do a clearance check I don't know. I use OrCAD and Altium and I'm not sure about Altium, but OrCAD had a DRC button that checks everything. You can set the rules for pours differently (as you should) but DRC for clearances is DRC for all clearances. Sounds like designed by monkeys.

My second thought is why your PCB maker doesn't do a DRC check against their capabilities before they start the job, it seems totally silly unless they don't warrant their product and so don't care.

My final thought is why they didn't do a bare board test? My supplier does BBT on all boards at no extra cost, I might be loading $1000 worth of parts onto what is only a $5. bare board, why would I want to use an untested part? Would you build the whole board from untested parts from the manufacturer? I doubt they would sell untested parts because their reputation is important.

I don't know, maybe I'm an OCD sufferer, but for me the cost of repairing production boards would far outweigh the cost of a supplier that does DRC & BBT.

Had you checked the Gerber files with a Gerber viewer before sending the board to be manufactured?

On the other hand, a few years ago I used the Batch PCB service from SparkFun to make a board that had a filled outline (copper pour). I specified the RS-274X file format, with G36/G37 enabled. My Gerber viewer (ViewMate from Pentalogix) and the Batch PCB design checker both showed the copper pour was OK. But the board that came back only had the thin line around the outside edge of the copper pour. Luckily I had also used thick traces (this was the important GND net) to connect the pins, so the circuit worked. Maybe the board shop thought that the copper pour and the traces weren't both needed, so deleted the pour? Or they just accidentally deleted the copper pour? Who knows. When I sent an e-mail to Batch PCB, I never got a response. By the way, another copper pour on the other side of the same board was OK.

I am currently working on a board design that I plan to send to OSH Park. When I used ViewMate to view the Easy-PC v17 generated Gerber files, I was surprised (but shouldn't have been) to find that they did not totally match my design.

I had used 0 width lines to specify various filled outlines (yes, the Gerber specification explicitly says they are acceptable for creating G36 regions), but Easy-PC had changed them to 1 mil lines, without warning me. This caused all areas to grow by 1/2 mil on each side, which caused some clearances to be less than required.

Also, I had used some rounded rectangle pads. Easy-PC didn't use arcs for the corners, but instead generated 2 or 3 line segments to approximate the arc, which looks ugly. The Gerber specification has an example of how to write a macro to generate rounded rectangle pads -- it's actually easier than using line segments.

Not using enough resolution for the Gerber coordinates can also make the manufactured board vary from the design due to rounding errors. Ucamco (who produce the official Gerber file specification) actually suggest using 6 decimal places for inches, and 5 for millimetres.

In conjunction with unveiling of EE Times’ Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. One of Silicon Valley's great contributions to the world has been the demonstration of how the application of entrepreneurship and venture capital to electronics and semiconductor hardware can create wealth with developments in semiconductors, displays, design automation, MEMS and across the breadth of hardware developments. But in recent years concerns have been raised that traditional venture capital has turned its back on hardware-related startups in favor of software and Internet applications and services. Panelists from incubators join Peter Clarke in debate.