Introduction
Advanced Cooling Technologies, Inc., in conjunction with UCLA and the University of Michigan, has developed a vapor chamber or thermal ground plane (TGP) to efficiently transport and spread heat dissipated by high-power, high-heat flux electronic and optoelectronic devices. A schematic of a typical vapor chamber spreader is shown below in Figure 1.

The thermal resistance network for a vapor chamber includes the following five components: 1) resistance of the envelope wall where the heat is input, 2) resistance of the evaporator where the liquid working fluid is vaporized, 3) resistance of the vapor transport, 4) resistance of the condenser where the vapor condenses back to liquid, and 5) resistance of the envelope wall where the heat is rejected to a heat sink.

For high-heat flux, high-power vapor chamber or TGP applications, the evaporator resistance is the dominant resistance; and therefore, this was a primary design focus of the program. The other design focus was to develop a low CTE or CTE matched vapor chamber to allow for direct attachment of the microelectronics chip to the TGP without the need for a CTE compliant substrate and the associated thermal resistances of the substrate and additional interfaces.

The performance targets for this TGP development program are shown below in Table 1.

Table 1. Vapor chamber or TGP performance targets.

To achieve the thermal performance targets, the work effort focused on innovative wick structure designs to achieve extremely low evaporator thermal resistances at high-power levels and high-heat fluxes. Fabrication related performance targets focused on CTE matched materials, resulting in a vapor chamber that can be used in direct die attach applications. Hermeticity is essential for long life heat pipe operations. The primary target applications for this program were static, although the wick structures used have been demonstrated to be effective at up to 10 G acceleration loads.

Wick Structure Design
The purpose of the wick structure inside of the vapor chamber is to deliver the heat pipe working fluid to the heat input locations. At these locations, the heat causes the working fluid to evaporate or change phase from a liquid to a vapor. This vapor is at a slightly higher pressure than the vapor in the cooler areas of the vapor chamber (condenser region). This pressure difference causes the warmer vapor to flow to the condenser region, where it condenses back to a liquid, releasing the latent heat of vaporization. The wick structure absorbs this liquid and provides a flow path back to the evaporator. This cycle continues to transfer power from the evaporator regions of the vapor chamber to the condenser regions as long as there is a temperature difference between these two regions.

The capillary pressure generated by the wick structure must be greater than the pressure drops of the vapor flow and the liquid return flow, otherwise the liquid flow will be insufficient to accept all of the input heat. When this happens, the wick structure “dries out” and the temperature of the electronic component will rise rapidly until failure. Therefore, in order to design a vapor chamber for high-power, high-heat fluxes, there must be enough vapor space cross-sectional area to allow vapor to flow without significant resistance; and, there must be enough wick structure cross-sectional area to allow the liquid to flow without significant resistance.

For high-power and high-heat flux vapor chambers it would seem logical to have a very thick wick structure to deliver liquid at high flow rates to the evaporation sites. However, the large conduction thermal resistance of such a thick wick and the net reduction in the gap space available for vapor flows can lead to significant increase in the overall thermal resistance.

So, while a thick liquid delivery wick is favorable for maximum critical heat flux (capillary limit), a thin wick structure is favorable for low evaporator thermal resistance. To simultaneously have high power and low thermal resistance, the ideal wick structure will have separate features for liquid delivery/vapor escape and for evaporation heat transfer. In this program, two liquid supply structures were developed: one for lateral liquid delivery (converging wick) and one for perpendicular liquid delivery (post array). Both designs have significant fractions of the evaporator area where the wick structure is very thin, practically a one or two particle thick layer of sintered copper powder. They also have a significant fraction of area that is devoted to liquid delivery, the lateral fingers for the converging wick designs and the posts for the post array designs.

A typical set of test data is plotted in Figure 5 below. The vapor chamber evaporator resistance is calculated from the temperature difference between a thermocouple inserted in a well drilled into the heat input pedestal and a thermocouple inserted into a well that protrudes into the vapor space divided by the electrical power input to the copper heater block per square centimeter of heat input area. As seen in the plot, the evaporator thermal resistance decreases as the heat flux increases from 0 to about 400 W/cm2. This decrease is commonly observed in sintered powder metal wicks and is often attributed to the evaporation location receding deeper into the wick structure with increasing heat flux. Above 400 W/cm2, the wick structure begins to dry out and the thermal resistance increases until it reaches a critical limiting heat flux around 550 W/cm2.

Both the converging and the post wick structures were successful in demonstrating excellent performance. Heat fluxes up to 700 W/cm2 were demonstrated with 1 cm2 heat input and total power through a vapor chamber of nearly 2000 W was demonstrated with a heat input size of 4 cm2. In both of these examples, the evaporator heat flux met or exceeded the target of 0.05 – 0.1 °C/W/cm2.

Low CTE Materials and Construction
Vapor chambers and TGPs for electronics cooling have typically been manufactured using copper and aluminum. These materials are very effective in making a high conductivity vapor chamber and have been used to spread heat from localized hot spots to larger area heat sinks (liquid and air cooled). In these cases, the microelectronic chips are typically thermally coupled to the TGP through interface materials like greases and pads. These greases and pads allow for slippage between the chip and the TGP as the device heats up and the copper or aluminum TGP expands more than the microelectronic chip.

As the heat flux increases, greases and pads are no longer effective due to their relatively low thermal conductivity. Metallurgical bonds are far superior from a thermal resistance point of view; however, the differences in coefficient of thermal expansion (CTE) are too great and often lead to thermally induced fatigue failure of the joint. For example, silicon, gallium arsenide, and gallium nitride have CTEs of 2.6, 6.8, and 5.6 ppm/°C, respectively; while aluminum and copper have CTEs of 24 and 17 ppm/°C, respectively. To solve this issue, an intermediate substrate is often employed between the microelectronic chip and the TGP.

Unfortunately, this is one of the most significant and unfavorable thermal resistances for a high-power, high-heat flux electronic chip. The substrate material is typically a poor conductor and the additional interface joint adds another thermal resistance.

A thermally superior design would allow the microelectronic chip to be metallurgically bonded directly to the vapor chamber or TGP surface. To make that possible, the vapor chamber material of construction must be a CTE matched material to typical chip materials. In other words, the CTE for the TGP needs to be in the 3 to 6 ppm/°C range.

For this program, the material of choice for the envelope walls was Aluminum Nitride ceramic plates with Direct Bond Copper (DBC). Aluminum Nitride ceramic has a fairly high thermal conductivity (150 to 200 W/m-K) similar to aluminum and has a CTE of 4.5 ppm/°C. It is commercially available with thin layers of copper directly bonded to the surfaces.

The thin layers of copper are necessary for three reasons. First, copper is compatible with water, the most common and effective vapor chamber working fluid for microelectronics cooling. Compatibility for a heat pipe or vapor chamber means that the working fluid and the envelope material will not react and generate non-condensable gases or corrode and leak. Copper/water heat pipes have been used successfully for decades; therefore, utilizing this material system eliminates the need for extensive life testing that is required when new material/fluid combinations are proposed. The second reason for the copper layers allows for the use of conventional wick sintering and envelope sealing techniques. Again, using qualified sintering techniques and envelope sealing techniques eliminates the need for extensive life testing. And, for the third reason, the copper layer on the outside of the TGP allows for direct circuit etching onto the surface of the TGP.

Manufacturing of the low CTE vapor chambers starts by sintering the copper powder wick structure directly onto one of the copper layers on an Aluminum Nitride ceramic envelope plate. A thin ring of copper plated Kovar, also a low CTE material (5.9 ppm/°C), was used to space two envelope plates apart creating the vapor space above the sintered wick. Braze materials with proven compatibility with water were used to join the envelope sheets to the Kovar ring, forming the hermetically leak tight vapor chamber envelope. A small diameter fill tube was also brazed into the Kovar ring to allow for fluid charging and evacuation prior to permanently sealing the TGP. The brazing temperatures are well above the soldering temperatures typically used to attach microelectronic chips to substrates; and therefore, the low-CTE TGP will not be unfavorably affected by subsequent chip attach processes. The final CTE of the TGP devices was approximately 5.5 ppm/°C.

Figure 6 shows a variety of TGP sizes that were manufactured under this program. Larger sizes are only limited by material availability.

Potential Application
Any high-power, high-heat flux microelectronic chip would likely benefit from the vapor chamber or thermal ground plane technology (e.g. high power amplifiers, IGBTs, and SCRs). For this DARPA sponsored program, the technology demonstration application was vertical cavity surface emitting lasers (VCSELs). VCSELs can be manufactured using typical semiconductor manufacturing techniques; and therefore, can be manufactured very cost effectively. In fact, nearly every computer mouse in use today has a VCSEL chip.

Higher power lasers for metal cutting, welding, and some directed energy weapons are for the most part driven by edge emitting lasers. While these edge emitting lasers are in use today, their geometry limits packing density and they typically require microchannel coolers that are susceptible to erosion and corrosion. The TGP and VCSEL combination allows for tiling of the VCSEL chips (tight packaging density) and the heat spreading of the TGP allows for conventional low velocity cold plates as the heat sink, eliminating the need for the costly high pressure pumps and fluid conditioning equipment associated with microchannel coolers.

As a final demonstration of the TGP technology, several 10 cm x 10 cm TGPs were fabricated and prepared for direct VCSEL attach. Figure 7 is a photograph of a TGP with a surface pattern etched circuit directly onto the surface. The TGP has been gold plated and pads of Gold-Tin solder have been deposited for direct attach of VCSEL chips. The high performance converging wick structure that is inside of the TGP is shown in the smaller inset photograph.

Acknowledgments
This material is based upon work supported by the Defense Advanced Research Project Agency (DARPA) and Space and Naval Warfare Systems Center (SPAWARS-YSCEN), San Diego, CA under Contract No. N66001-08-C-2007. The views, opinions, and/or findings contained in this article/presentation are those of the author/presenter and should not be interpreted as representing the official views or policies, either expressed or implied, of the DARPA or the Department of Defense.