comm.SDRADIFMCOMMSReceiver System object

Description

The SDRADIFMCOMMSReceiver System object™ receives
data from a Xilinx® FPGA-based radio, allowing simulation and
development for various software-defined radio applications. The SDRADIFMCOMMSReceiver object
enables communication with a FPGA board on the same Ethernet subnetwork.

The SDRADIFMCOMMSReceiver System object is
a signal sink that receives data from an FPGA board and outputs a
column vector signal of fixed length. The first call to this object
can contain transient values, which results in packets containing
undefined data.

The diagram shows how MATLAB®, the SDRADIFMCOMMSReceiver System object,
and Xilinx FPGA hardware interface.

Note:
Starting in R2016b, instead of using the step method
to perform the operation defined by the System object, you can
call the object with arguments, as if it were a function. For example, y
= step(obj,x) and y = obj(x) perform
equivalent operations.

Data Path

The following diagram illustrates the data path for radio signal
reception (when the decimation filter, IF tuner, and DC blocking filter
are all specified in the object properties):

Supported Data Types

Port

Supported Data Types

Output

The output port supports the following complex data types
only:

Double-precision floating point

Single-precision floating point

16-bit signed integers

When you select a double or single data
type, the complex values are scaled to the range of [-1,1]. When
you select int16, the complex values are the raw
16-bit I and Q samples from the board.

Construction

H = comm.SDRADIFMCOMMSReceiver creates
an SDR receiver System object, H, that receives
data from an FPGA development motherboard with an Analog Devices FMCOMMS
daughterboard installed. The System object enables communication
with an SDR board on the same gigabit Ethernet subnetwork as the host.

H = comm.SDRADIFMCOMMSReceiver(Name,Value) creates
an SDR receiver System object, H, with the
specified property Name set to the specified Value. You can specify
additional name-value pair arguments in any
order as (Name1,Value1,...,NameN,ValueN).

An SDRADIFMCOMMSReceiver System object connects
to a device when you call the step method and stays connected until
you call the release method.

Properties

IPAddress

IP address of the radio

Specify the logical network location of the radio as a character
vector. The default is 192.168.2.2 for ADI radios.

Note:
If you are attaching two radios to the same host, note that
each radio must be located at a different IP address. Using the IPAddress
property for each System object, set the IP address
for each radio to a unique value, as shown here for a pair of SDRADIFMCOMMSReceiver and SDRADIFMCOMMSTransmitter System
objects (values shown are default for ADI FMCOMMS radios):

Specify the source of the center frequency as Property or Input
port. The default is Property. Set CenterFrequencySource to Input
port to specify the center frequency value using an input
to the step method. Set CenterFrequencySource to Property to
specify the center frequency value using the CenterFrequency property.

CenterFrequency

RF center frequency in Hz

Specify the desired center frequency as a double-precision,
nonnegative, finite scalar. This property applies when you set the CenterFrequencySource to Property.

The default is 2.4 GHz. The valid range of
values for this property is 400 MHz to 4 GHz.

ActualCenterFrequency

Actual RF center frequency in Hz

Reports the actual center frequency of the daughterboard. Desired
and actual center frequency can differ slightly due to quantization.
The value is NaN when the actual value is unknown.
Use synchronize to update the actual value. This
property is read only.

IntermediateFrequencySource

Source of RF intermediate frequency

Specify the source of the intermediate frequency as Property or Input
port. The default is Property. Set IntermediateFrequencySource to Input
port to specify the intermediate frequency value using an
input to the step method. Set IntermediateFrequencySource to Property to
specify the intermediate frequency value using the IntermediateFrequency property.

IntermediateFrequency

Desired intermediate frequency in Hz

The intermediate frequency (IF) tuner allows you to account
for the error in tuning between target center frequency and actual
center frequency and avoid unwanted interference by shifting it out
of the pass band of interest. Specify the desired intermediate frequency
as a double-precision, finite scalar. The default value is 0 Hz.
The valid range of values for this property is to , where is the analog-digital
converter (ADC) rate.

Reports the actual intermediate frequency. Desired and actual
intermediate frequency can be slightly different due to quantization.
The value is NaN when the actual value is unknown.
Use the synchronize method to update the actual
value. This property is read-only.

GainSource

Source of gain

Specify the source of the overall gain as Property or Input
port. The default is Property. Set GainSource to Input
port to specify the overall gain value via an input to the
step method. Set GainSource to Property to
specify the overall gain value via the Gain property.

Gain

Desired overall gain in dB

Specify the desired overall gain as a double-precision, nonnegative
scalar. The default value and the valid range of this property depend
on the RF daughterboard. This property applies when you set the GainSource to
the value Property. This property is tunable.

ActualGain

Actual overall gain in dB

Reports the actual overall gain of the daughterboard. Desired
and actual gain can differ slightly due to quantization. The value
is NaN when the actual value is unknown. Use synchronize to
update the actual value. This property is read only.

ADCRate

Desired ADC sampling rate in Hz

Specify the desired sampling rate as a double-precision, nonnegative
scalar. The default value is 98.304 MHz. The valid range of this property
is 39–100 MHz.

Note:
The 14-bit ADC value is returned as a sign-extended 16-bit value
in the hardware.

ActualADCRate

Actual ADC sampling rate in Hz

Reports the actual sampling rate of the RF signal. Desired and
actual sampling rate can differ slightly due to quantization. The
value is NaN when the actual value is unknown.
Use synchronize to update the actual value. This
property is read only.

DecimationFactor

Desired decimation factor

Specify the desired decimation factor as a double-precision,
nonnegative scalar. The default is 512. The baseband rate is ADCRate / DecimationFactor.

Reports the actual decimation factor of the daughterboard. Desired
and actual decimation factors can differ slightly due to quantization.
The value is NaN when the actual value is unknown.
Use synchronize to update the actual value. This
property is read only.

LostSamplesOutputPort

Output overrun flag

Set this property to true to specify for the step method to
output the number of lost samples during host—hardware data
transfers.

Zero indicates no data loss.

A positive number indicates that overruns or underruns
occurred.

The default value for LostSamplesOutputPort is
false, which means that the port is not enabled and no information
about dropped packets is displayed.

This port is a useful diagnostic tool to determine real time
operation of the System object. If your design is not running
in real-time, you can increase the decimation factor to approach or
achieve real-time performance.

Specify the complex output data type as double, single,
or int16. When you select double or single data
type, the complex values are scaled to the range of [-1,1]. When
selecting int16, the complex values are the raw
16-bit I and Q samples from the board. The default is int16.

This System object supports the following complex output
data types:

Double-precision floating point

Single-precision floating point

16-bit signed integers

FrameLength

Frame length

Specify the frame length of the output signal that the object
generates as a positive, scalar integer. Using values less than 366
can yield very poor performance. The default value is 3660.

When set to true, this property produces a set of contiguous
frames without an overrun or underrun to the radio. This setting
can help simulate models that cannot run in real time. When you enable
this property, specify the desired amount of contiguous data using
the NumFramesInBurst property. The default value
is false.

This property is valid when EnableBurstMode property
is set to true. The default number of frames in a burst is 20.

BypassUserLogic

Bypass user logic from target workflow

When you enable this property, the FPGA data path bypasses the
algorithm generated and programmed during the SDR workflow. This bypass
can help with debugging system bringup. The default value is false,
or not enabled.

BypassDCBlockingFilter

Bypass the DC bias removal filter

When true, the DC blocking filter to automatically reduce a
DC bias is bypassed. Enable this when the filter is also blocking
some signal and you need to use a different DC bias compensation scheme.
The default is false, which means to include the automatic DC blocking
filter.

Desired vs. Actual System Object Property Values

You can set the desired values in the receiver System object for
the following radio properties. However, due to quantization or range
issues, the actual values can differ from your desired values. The
actual values are stored in the properties that begin with Actual (see
table).