VLSI JOBS

Role : VLSI Design Engineers

Location : bangalore

Experince : 3-8 years

Salary : 5-25 lakhs

Details : General logic design concepts and experience in FPGA logic design • Experience in STA/Synthesis • Synthesis experience for Timing closure • Experience in using TCL/Perl. Basic Job Deliverable : • Should be able to analyze the timing failures, CDC and lint issues. • Should be able to understand the TCL files and strong debugging skills is desired