VLYNQ bus

VLYNQ bus Description

VLYNQ is a serial communications interface [full-duplex] that
enables the extension of an internal bus segment to one or more external
physical devices. The external devices are mapped into local, physical
address space and appear as if they are on the internal bus. Multiple
VLYNQ devices are daisy-chained, communication is peer-to-peer,
host/peripheral. Data transferred over the VLYNQ interface is 8B/10B
encoded and packetized.

The VLYNQ bus signals include 1 clock signal [CLK], and 1 to 8 Transmit
lines [TX0 and TX1], and 1 to 8 Receive lines [RX0 and RX1]. All VLYNQ
signals are dedicated and driven by only one device. The transmit pins of
one device connect to the receive lines of the next device. The VLYNQ bus
will operate at a maximum clock speed of 125MHz. However the actual clock
speed is dependent on the physical device with the VLYQN. So a device may
a clock speed other then 125MHz. For example a device may have an
internal 100MHz [maximum] clock rate, or external 80MHz [maximum] clock
rate.

If data packets contain four or 16 words, some of the overhead is
eliminated. So on a single channel, data bursts of four words per packet
can deliver an effective throughput of 133 Mbits/s. With 16 words per
packet, the throughput goes up to 178 Mbits/s. With the maximum eight
channels, an effective throughput of over 1400 Mbits/s can be achieved
with 16 words per packet. Both the direction and clock source may be
software configurable [may be device dependent]. Software may also be
used to set the internal clock speed [may be device dependent]. Unused
clock lines are held high via an internal pull-up. Unused RX or TX
lines may require an external 47k pull-down resistor [may be device
dependent].. Software select-able internal pull-downs for signals may be
provided on some devices.

The Packet format

SOP

10 bits [Start Of Packet]

CMD1

10 bits; or PktType, 10 bits

CMD2

10 bits; or AdMask, 10 bits

ByteCnt

10 bits [Byte Count]

Address

10 bits [could be up to 4 words]

Data

10 bits [could be 'N' words long]

EOP

10 bits [End Of Packet]

The VLYNQ bus is a the proprietary interface developed by Texas
Instruments for it's broadband products,
such as modems and wireless local area networks (WLANs); voice broadband processors, digital media
processors, and OMAP media processor chips.
Licensing agreements for VLYNQ may be obtained from TI.
Other types of IC Buses.