New Reconfigurable Architectures for Implementing FIR Filters with Low Complexity

Platform : VLSI

IEEE Projects Years : 2010

Abstractâ€”Reconfigurability and low complexity are the two
key requirements of finite impulse response (FIR) filters employed
in multistandard wireless communication systems. In this paper,
two new reconfigurable architectures of low complexity FIR
filters are proposed, namely constant shifts method and programmable
shifts method. The proposed FIR filter architecture
is capable of operating for different wordlength filter coefficients
without any overhead in the hardware circuitry. We show that
dynamically reconfigurable filters can be efficiently implemented
by using common subexpression elimination algorithms. The
proposed architectures have been implemented and tested on
Virtex 2v3000ff1152-4 field-programmable gate array and synthesized
on 0.18 Î¼m complementary metalâ€“oxideâ€“semiconductor
technology with a precision of 16 bits. Design examples show
that the proposed architectures offer good area and power
reductions and speed improvement compared to the best existing
reconfigurable FIR filter implementations in the literature.
Index Termsâ€”Channelizer, common subexpression elimination,
FIR filter, high level synthesis, reconfigurability.