I. The appeal contests the decision of the Examining Division to refuse the Appellant's European patent application No. 86 306 966.2 on the ground that the subject-matter of Claim 1 then on file was not novel in view of the prior art known from US-A-4 422 072 (D2).

II. In reply to a communication from the Board of Appeal, the Appellant filed a new Claim 1. The application now consists of:

Claims:

1 filed with the letter dated 8 January 1993 (received 13 January 1993),

2 filed with the letter dated 2 May 1991 (received 7 May 1993),

3 to 32 as originally filed, and

33 to 36 filed with the letter dated 12 October 1990 (received 16 October 1990);

Description:

pages 1, 2, 5 to 7, 10 to 17, 19 to 21 and 23 to 64, as originally filed,

pages 3, 4 and 4a (first submission) filed with the Statement of Grounds of Appeal (received 8 April 1992), and

pages 8, 9, 18 and 22 filed with the letter dated 12 October 1990;

Drawings:

sheets 1/19 to 19/19 as originally filed.

III. Claim 1 reads as follows:

"1. A configurable semiconductor integrated circuit which, as made, comprises an area (300) thereof formed with a plurality of logic circuits (10) at discrete sites (10S) respectively, each logic circuit being only capable of performing a simple logic function and comprising at least one logic circuit input and at least one logic circuit output, and a signal translation system (14) between inputs and outputs of the logic circuits, said signal translation system providing a plurality of direct connection paths (14A,B,C,F) between said inputs and outputs and wherein each connection path is electrically selectable as to its conduction state, and characterised in that said signal translation system, as made, is a restricted signal translation system by virtue of said direct connection paths extending, for each of said logic circuits (10R) within said area, from at least one logic output of that logic circuit to logic circuit inputs of a respective first set (FS) of some of other said logic circuits and from at least one logic circuit input of that logic circuit to logic circuit outputs of a respective second set (SS) of some of other said logic circuits, and wherein each first set for that logic circuit is different from the first set of any other logic circuit, and wherein each second set for that logic circuit is different from the second set of any other logic circuit."

Claims 2 to 36 are dependent on Claim 1.

IV. The Appellant argued that the subject-matter of Claim 1 was novel and involved an inventive step over the prior art known from D2 and requested that the decision under appeal be set aside. The Appellant also requested a refund of the appeal fee, arguing that the Examining Division had issued the decision under appeal without giving the Appellant an opportunity to be heard. The Appellant requested oral proceedings if the Board was considering dismissing the appeal.

Reasons for the Decision

1. The appeal is admissible.

2. The present Claim 1 differs from the one refused by the Examining Division in that the feature that each said logic circuit is only capable of performing a simple logic function has been transferred to the preamble and certain features of the restricted signal translation system, in particular those relating to the definition of the sets, have been clarified. In the opinion of the Board, these amendments do not infringe Article 123(2) EPC and the present Claim 1 meets the requirements of Article 84 EPC.

3. US-A-4 422 072 (D2) discloses a configurable semiconductor integrated circuit according to the preamble of Claim 1 of the present application (see D2, Figure 9 and the related description, beginning at column 10, line 32).

3.1. As shown in Figure 9 of D2, the logic circuits A0 to A31 all share the same first set of other logic circuits C0 to C9, the logic circuits A0 to A31 and D0 to D9 all share the same second set of other logic circuits NP0 to NP17, the logic circuits C0 to C9 all share the same second set of other logic circuits A0 to A31, and the logic circuits NP0 to NP17 all share the same first set of other logic circuits A0 to A31 and D0 to D9. Thus, each first set is not different from the first set of any other logic circuit and each second set is not different from the second set of any other logic circuit, so the connections between these logic circuits cannot be regarded as forming a restricted signal translation system in accordance with the characterising part of the present Claim 1.

3.2. It follows that document D2 does not destroy the novelty of the claimed subject-matter and the decision under appeal must be set aside.

4. The Board has not examined the dependent claims or the description and drawings (apart from looking at them to obtain an understanding of the invention) to see if they meet the requirements of the EPC, but makes use of its powers under Article 111(1) EPC to remit the case to the Examining Division for further prosecution, including adaptation of the description on pages 3 and 4 to the wording of Claim 1 (recited in paragraph III above).

5. For avoidance of doubt, it is pointed out that according to Article 111(2) EPC the Examining Division is bound by the present decision only to the extent that it has been decided that the subject-matter of Claim 1 as recited in paragraph III above is novel when compared with the prior art known from D2 and the claim meets the requirements of Articles 84 and 123(2) EPC.

6. Regarding the request for a refund of the appeal fee, as explained in the Board's communication, the reason for the Examining Division's refusal (lack of novelty) was clearly set out in two communications of the Examining Division, to which the Appellant (then Applicant) replied. The statement in the final paragraph of the letter dated 21 November 1991 that the Applicant "would welcome the opportunity to discuss the case with the Examiner at an informal interview ..." does not constitute a request for oral proceedings under Article 116 EPC. In the opinion of the Board, the Examining Division acted quite properly within its discretion, as explained in point 9 of the decision in case T 300/89 (OJ EPO 1991, 480). Thus the requirements of Article 113(1) EPC have been satisfied. The Board cannot see any procedural violation which would justify the reimbursement of the appeal fee according to Rule 67 EPC.

ORDER

For these reasons, it is decided that:

1. The decision under appeal is set aside.

2. The case is remitted to the Examining Division for further prosecution on the basis of the documents listed in paragraph II above, having regard to the remarks in paragraphs 4 and 5 above.