Abstract

We present results for VCSEL based links operating PAM-4 signaling using a commercial 0.13µm CMOS technology. We perform a complete link analysis of the Bit Error Rate, Q factor, random and deterministic jitter by measuring waterfall curves versus margins in time and amplitude. We demonstrate that VCSEL based PAM–4 can match or even improve performance over binary signaling under conditions of a bandwidth limited, 100meter multi-mode optical link at 5Gbps. We present the first sensitivity measurements for optical PAM-4 and compare it with binary signaling. Measured benefits are reconciled with information theory predictions.

Figures (7)

(a) and (b). Left, Fig. 1(a) experimental setup. Right, Fig. 1(b). L-I-V characteristic measured for the Emcore 10Gbps VCSEL used in experiments described in the text. The inset shows the approximate mapping of the PAM-4 signal levels onto this VCSEL. The horizontal dotted line is the approximate bias voltage applied to the VCSEL. The vertical dotted lines shows the approximate voltage where the PAM–4 swing maps onto the I-V VCSEL characteristic. The dotted sloping line represents a linear output power versus current relationship for this VCSEL.

Small signal response from a 2.5 and 10Gbps VCSEL. The bias current for the 2.5Gbps VCSEL was 14 mA and the peak at 8GHz is from the resonant frequency of the VCSEL. The bias current for the 10Gbps VCSEL was 6 mA.

(a) and (b). Top (a), BER at 4.9Gbps versus amplitude margins comparing PAM-4 and bottom (b), binary signaling when detected by the eye tool on the CMOS chip. Both eye patterns is shown for each case, again taken with a scope tool included on chip.