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Abstract

This system features the use of static logic for key contact sensing. The keyboard is a simple matrix construction, having four wires under the four columns and five wires under the five rows of keys. The nine ends of the wires are connected to the chip logic. When a key is depressed, it creates a short between one column and one row wire. The logic circuitry generates a five-bit code plus a strobe pulse for each key entry. The logic rejects any but single-key entries and provides only one key roll. The logic can accommodate keyboards with different noise specifications, merely by changing the frequencies which drive the logic.

Country

United States

Language

English (United States)

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This system features the use of static logic for key
contact sensing. The keyboard is a simple matrix construction, having
four wires under the four columns and five wires under the five rows
of keys. The nine ends of the wires are connected to the chip logic.

When a key is depressed, it creates a short between one column and
one row wire. The logic circuitry generates a five-bit code plus a
strobe pulse for each key entry. The logic rejects any but
single-key entries and provides only one key roll. The logic can
accommodate keyboards with different noise specifications, merely by
changing the frequencies which drive the logic.

The overall logic for the system is illustrated in Fig. 1. The inputs, denoted
row 1, ..., row 5, ... column 4, are derived from the 9 wires connected to the key
rows and columns, plus the frequency outputs generated by a 1.2288 MHz
master-frequency oscillator through gates 21.

C key blocks 10 and R key blocks 20 are described in detail in Fig. 2. Each
column wire from keyboard 2 is connected to a pair of P channel field-effect
transistors denoted P1 and P2. Each row wire is connected to a pair of N
channel devices denoted N1 and N2. Each pair comprises high and low-
impedance devices. The high-impedance device is always biased on and the
low-impedance device has its gate connected to control line "KEYSWT". Thus,
in Fig. 2 devices P2 and N2 are low-impedance de...