Artifact Details

Title

Catalog Number

Type

Date

Credits

Ferrante, Jeanne

Publisher

University Video Communications

Duration

00:37:00

Format

Betacam SP

Copyright Holder

Computer History Museum

Description

From University Video Communications' catalog:

"Current trends in computer architecture involve multiple levels of memory hierarchy and parallelism. Optimizing compilers for high-level languages use program transformations to achieve high performance on such machines. These transformations must take advantage of all levels of the processor/memory hierarchy to obtain this high performance. Future challenges to achieving high performance include better understanding of the guidance of program transformations and the interactions between individual transformations in terms of these multiple levels. Ferrante illustrates these challenges using tiling, a well-known compiler transformation, and its extension, hierarchical tiling, being developed by the Hierarchical Tiling Group at the University of California, San Diego."