2
Thin oxide growth The Deal-Grove model provides excellent agreement with experimental data except for thin (<20nm) SiO 2 grown in dry O 2. When using the D-G equations for thick oxides grown in O 2 on bare Si (X i =0), one needs to “assume” X i =25nm. Or equivalently, one can use  (  0) to correct the Deal-Grove model to compensate for the excess growth that occurs in the initial growth regime.  25nm D-G (τ= 0) D-G (τ= 40hr) 2

3
Models to explain the excess growth of thin oxidation An electric field exists across oxide that enhances diffusion (if diffusing species is O 2 -, but it is not.) during early states of oxidation. Thin micro-channels in oxide aid in the movement of O 2 to the Si surface. Mismatch in thermal expansion coefficients of oxide and Si causes stress in oxide and this stress may enhance the diffusivity of the oxidizing species. But NONE of these mechanism gained wide acceptance. The exact mechanism is still unknown. Mechanism for initial oxidation regime 3

6
High pressure increases the oxide growth rate, by increasing the linear and parabolic rate constants, which arises from the increased C* (=HP G ). Both B/A and B is proportional to P G, the gas pressure. Up to 25atm, to reduce temperature/thermal budget in thick oxide fabrication o  P=1atm leads to  T=-30 o C for the same oxidation rate. o Or, to grow a given oxide thickness at same temperature, time can be reduced. However, still not used in the VLSI fabrication, due to safety concerns at high pressure, as well as reduced film thickness uniformity. High gas pressure oxidation 6 Experiment shows that: For H 2 O oxidation, the growth rate is proportional to P G. For O 2 oxidation, the relationship is not linear. n=0.7 – 0.8 Here “i” indicate the value at 1atm. Wet oxidation Dry oxidation

7
Dependence on crystal orientation Oxidation rate depends on the availability of reaction sites on the silicon substrate. Oxidation on the crystal plane occurs at a higher rate because there are a higher number of surface atoms/chemical bonds than the plane. 7 Most IC made of silicon.

8
Dependence on crystal orientation Interface reaction rate constant K s (cm/sec) depends on crystal orientation. So the liner grown rate B/A depends on crystal orientation. (B/A) 111 = 1.68 (B/A) 100 (1.68  1.227/0.707=1.735, see previous slide) The parabolic rate constant B is NOT dependent on crystal orientation. So this effect decreases for high temperature and/or long time oxidation when oxide become thick. K S0 is a constant, roughly proportional to the number of available Si bonds for reaction per unit area. 8 Simulation, (100) Si, in H 2 O at 900  C for 30 min Figure 6-27

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Two dimensional oxidation Experiment shows that: Oxidation is slower for convex or concave corners. Concave corner is even slower than convex corner. The smaller the curvature radius is, the slower. More serious for low temperature oxidation, no effect for high temperature 1200 o C (when oxide can “flow”). 12 Figure 6-29 Experiment Drawing to show the structure

15
Effect of stress  n and  t are stress along normal and tangential direction. P is the hydrostatic pressure in the growing oxide. V R, V T, V D and V S (  0) are volume fitting parameters. Stress-independent viscosity Sheer stress in oxide Viscosity of SiO 2 15 (You are not required to remember or well understand those equations)

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B segregates into oxide, weakens SiO 2 bond structure, increases oxidant diffusivity D. Common Si dopants all tend to enhance oxidation rate of Si when present in the substrate in high concentrations. The effect is particularly important at lower temperatures and for thinner oxides, and is more important for N + doping than P + doping. The oxidation rate depends on: The dopant concentration in SiO 2 for diffusion controlled oxidation (B dominates). The dopant concentration at Si surface for reaction controlled oxidation (B/A dominates). Dopant dependence 16

21
Interface trapped charge (state) Q it Energy of those interface states are within the band gap, so Q it can be positive, negative or neutral, depending on bias voltage. (i.e. those states can be filled with electrons or holes) They originate from structural defects related to the oxidation process, metallic impurities, and bond-breaking processes (dangling bond  Si·). It has the same origin as Q f, so high Q f always means high Q it. 21 Low temperature hydrogen (“forming gas”, 10% H % N 2 ) anneal at o C after metallization process effectively neutralizes most interface-trapped charges.

22
Mobile ionic charge Q m Mobile ion charges (Q m ) are attributed to alkali ions such as Na, K, and Li, as well as negative ions and heavy metals. It can shift MOSFET threshold voltage and cause device stability problems. It can be anywhere in the oxide layer, can move at high temperature or bias voltage. They originate from processing materials, chemicals, ambient, or handling. Common techniques employed to minimize Q m include: o Cleaning the furnace tube in a chlorine ambient o Addition of cl-containing gas during oxidation o Gettering with phospho-silicate glass (PSG) to replace quartz tube o Using masking layers such as Si 3 N 4 to prevent the contaminants from getting into the oxide. It was a big problem in 1960s, nowadays no longer a serious issue. 22

23
Oxide trapped charge (state) Q ot Oxide-trapped charges (Q ot ) may be positive or negative, due to holes or electrons being trapped in the bulk of the oxide. It is caused by broken Si-O, Si-H or Si-OH bonds, due to ionization irradiation and other energetic processes during evaporation (generate x-ray for e-beam evaporation), sputtering (plasma), RIE and ion implantation. They can be annealed out by low-temperature (300 o C) treatment in H 2 or inert gas o C dry oxidation improves oxide structure and make it less susceptible to irradiation. Oxide can also be protected from irradiation by covering with Al 2 O 3 and Si 3 N 4 that are resistant to irradiation. Q ot received more attention in recent years because, as the device shrinks, the electric field within the oxide is increased. The high field may cause electrons to inject to the traps in the oxide (charge trapping), which shifts the threshold voltage. 23

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The ratio of the equilibrium concentration of the impurity in silicon to that in SiO 2 at the interface is called the equilibrium segregation coefficient. Two additional factors influence the redistribution process: o The diffusivity of the impurity in the oxide (if large, the dopant can diffuse through the oxide rapidly, thereby affecting the profile near the Si-SiO 2 interface). o The rate at which the interface moves with respect to the diffusion rate. Dopant re-distribution during oxidation 24