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Time-Triggered Protocol IP for Altera’s Cyclone FPGAs

TTTech Computertechnik is offering their Time-Triggered Protocol (TTP®) for Altera’s Cyclone® II and Cyclone III FPGAs. Aerospace customers using this combined solution will benefit from reduced system complexity and strictly deterministic communications for aerospace applications.

Traditional TTP IP solutions, utilized in the past in ASICs for major aerospace programs, can be now also implemented using Altera’s low-cost Cyclone II and Cyclone III FPGAs or HardCopy® II structured ASICs. Cyclone III devices are available in up to three temperature grades to support varying operating environments with junction temperature support from -40 °C to +125 °C.

TTP controller IP implemented with Cyclone II and Cyclone III devices enable seamless subsystem integration for complex safety-critical aircraft networks and systems. The TTP IP has been designed to meet aerospace requirements in compliance with DO-254/DO-178B Level A. It is ideal in modular and distributed control systems in aerospace projects such as in the Boeing 787 Dreamliner, the Airbus A380, and the Lockheed Martin F-16. TTP chip IP is available as synthesizable netlist and can be ported into Altera’s Cyclone II or Cyclone III FPGAs or its HardCopy II structured ASICs.