Four soft-core processors for embedded systems

Since 2000, the folks at Realtime Embedded have concentrated on helping companies develop embedded systems used in advanced products. Their four primary focus areas are FPGA, Linux, virtual hardware, and multicore processing systems. Realtime Embedded is involved in customer and financed research projects, in house and on site, spanning a wide range of industries.

Many of you may have already read my blog called How to design an FPGA from scratch, which I started to write 2006 and which Max Maxfield wrote about in EE Times for the first time in 2007.

My latest blog describes the work I have performed at Realtime Embedded over the course of the past year. In this blog, I investigate four soft-core processors and use the same setup as in my first blog called “learning by doing.” This means that each soft processor will be implemented in an FPGA and the whole design process will be documented. Click Here to visit my blog.

Why use soft-core processors?When designing an embedded system in a FPGA, we will most likely need some form of “controller” in our system. This controller can be a simple microcontroller or a fully-fledged microprocessor running the Linux operating system. But before we make this decision, let’s first consider the various options that are available to us.

One solution is to use an off-the-shelf (OTS) microprocessor mounted on the board and connecting to the FPGA using a standard bus like AMBA. In fact, this still appears to be the most commonly-used solution. There are times, however, where an OTS processor-based approach will not meet our requirements. An example would be an application that requires peripheral functionality that is not available in a discrete solution, or where board real estate is limited.

Another option is to embed a “hard” processor core on the chip. A hard processor core has dedicated silicon area on the FPGA. This allows it to operate with a core frequency similar to that of a discrete microprocessor. Examples of hard processor cores used in FPGAs are the PowerPC used in Virtex-4/5 and the ARM Cortex-A9 dual-core MCU used in the new Zynq-7000 All Programmable SoC from Xilinx.

Unfortunately, a hard processor core does not provide the ability to adjust it to better meet the needs of the application, nor does it allow for the flexibility of adding a processor to an existing FPGA design or adding an additional processor to provide more processing capabilities.

A soft-core processor solution is one that is implemented entirely in the logic primitives of an FPGA. Because of this implementation, the processor will not operate at the same clock frequencies or have the same performance of a discrete solution. In many embedded applications, however, the high performance achieved by the previous two processing options is not required, and performance can be traded for expanded functionality, reduced cost, and flexibility.

All the major FPGA vendors have soft-core processors in their product offerings and there are also a number of companies and organizations developing soft-core processors that are platform independent and can be implemented in any FPGA design.

Choosing a soft-core processorWhen commencing an FPGA design project that will employ a soft-core processor, it can be hard to decide which processor to use. To help you with this decision and give you quick start guide, let’s take a closer look at four soft-core processor to see which one would be most suitable for your platform. Here are the four candidates we will investigate:

LEON3

MicroBlaze

Nios II

OpenRISC

PrerequisitesOur system will be built on a standard FPGA development board. We will use the CAE tools that are suggested by the processor provider and try to use license-free tools as much as possible. When there are no free tools available, we will use an evaluation license from the FPGA vendor. The system must be able to run a Linux operating system and a Real Time Operating System (RTOS). The performance of the processor cores will be measured by using the benchmark program CoreMark.

CPU core benchmarkingAlthough it doesn’t reflect how you would use a processor in a real application, sometimes it’s important to isolate the CPU’s core from the other elements of the processor and focus on one key element. For example, you might want to have the ability to ignore memory and I/O effects and focus primarily on the pipeline operation. CoreMark (www.coremark.org) is capable of testing a processor’s basic pipeline structure; it also provides the ability to test basic read/write operations, integer operations, and control operations.Installing LinuxWe will use the Linux distribution recommended by the processor vendor. An embedded system that is going to run Linux must include some specific hardware blocks. In a typical system we find the following:

I agree on all counts, I've seen projects ruined on a cost basis because of "cool" ideas. Engineers should take a biological approach to design, ie. no dead weight to coin a phrase. A lot of these things are great "ideas", but the application has to need them.

BTW, I didn't mean to imply that SmartFusion was identical in application to Zynq or the Arria SOCs. Obviously the SmartFusion is a microcontroller and doesn't need external RAM, nor is it going to boot "real" Linux (though I don't think that is even a good criteria for this sort of thing). Not to mention that the Actel parts are based on an entirely different market space and value proposition where this hard processor + FPGA fabric thing may actually make some sense.

First off, being a hardware guy let me say that I love FPGAs. I've had a really difficult time though justifying them for any but the absolute highest end special purpose commercial purposes. I think it is valuable to point out that both hard macro and soft core microprocessors still require external DRAM hanging off of the FPGA to implement a practical soft core processor that can say boot Linux. Does this really make it practical to freely synthesize additional cores after the chip level hardware is locked down? The entire for/against argument changes when you consider synthesizing microcontrollers that use the FPGAs integrated block rams.
Secondly, and I think this is the most important point. FPGAs are just expensive. I'd honestly like to see a table constructed showing say these four soft core processors and calculating based on FPGA cost in similar quantities to standalone uP, logic cells consumed and execution performance a cost in dollars per CoreMark or DMIP.
Even the hard macro based FPGAs seem to be quite pricey (take an honest look at Zync, Fusion and whatever Altera is calling their thing now). Also consider that in nearly every case the hard macro peripheral support is totally inferior to a modern uP SOC. Something like CAN or Gig Ethernet, video/graphic accelerators etc. are outrageously expensive to synthesize in these EPP type devices.
For prototyping SOCs I see the picture. As a very specialized PCIe attached coprocessor for your signal processing application or to implement custom high speed logic I see it. But I just don't the value proposition when it comes to replacing the function of a dsp or microprocessor in designs that by their very nature (using FPGAs) are custom already. There it is more of a hobby. Something that us engineers talk our employers into on really shaky arguments because we want to screw around with cool stuff. Show me that I'm wrong. Please!!!

You forgot at least one company
Micro-Semi-Actel SmartFusion ARM single Hard core
Probably the lowest power consumption/bit.
but have not checked specs recently.
Zync is impressive...I want a platform, just because of the raw potential.