Yes, it's BII with Tridents + Legato 3.
If this is your case, here's a small tip for Legato. Because Salas regs performance is so high, local decoupling capacitors can block the regs from reaching their full potential.
In my case, i'm not using the balanced to single ended converter and buffer section and i could safely remove the 100mF decoupling capacitors from the balanced I/V secton. I haven't tested thourouly, so i cannot tell about stability if you do the same to the BAL to SE and buffer chip.

Yes, it's BII with Tridents + Legato 3.
If this is your case, here's a small tip for Legato. Because Salas regs performance is so high, local decoupling capacitors can block the regs from reaching their full potential.
In my case, i'm not using the balanced to single ended converter and buffer section and i could safely remove the 100mF decoupling capacitors from the balanced I/V secton. I haven't tested thourouly, so i cannot tell about stability if you do the same to the BAL to SE and buffer chip.

Yep, I'm thinking of a BIII and a Legato 3 etc. Thanks for the tip on the decoupling cps, it would have taken me a little to trek that down....

I want to make a reg for my simplisitics njfet riaa that needs +45Vout, tx used is a R-Core dual secondary 2x18VAC so 36VAC, for Vref I used 6K8 for R303 a 5K trimmer & two red LEDs and mosfets as per BiB guide, dummy load is a Caddock MP820 heavily sinked 100R so 20W. Vref LEDs don't lit, CCS LEDs all lit, Vout 0VDC, I measured the VACat the input of the reg with the dummy load connected at the output of the reg DVM reads 39VAC, I need to reduce the input VAC to 36VAC as per BiB guide?