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Since 1987 - Covering the Fastest Computers in the World and the People Who Run ThemTue, 20 Mar 2018 00:17:45 +0000en-UShourly1https://wordpress.org/?v=4.9.460365857Changing the Phase of Memoryhttps://www.hpcwire.com/2012/06/26/changing_the_phase_of_memory/?utm_source=rss&utm_medium=rss&utm_campaign=changing_the_phase_of_memory
https://www.hpcwire.com/2012/06/26/changing_the_phase_of_memory/#respondTue, 26 Jun 2012 07:00:00 +0000http://www.hpcwire.com/?p=4422Researchers look to boost speed of phase change memory.

]]>One of the more promising solid state memory technologies on the horizon is Phase Change Memory (PCM). PCM has the potential to write data faster than current DRAM chips by charging atoms within a crystal. This has led some people to believe that the technology might enable the much-sought-after instantaneous computer boot-up. Ars Technicadiscussed the future prospects for PCM last week.

At the atomic level, PCM stores data in a compound of germanium, antimony and tellurium. When a voltage is applied to the atoms, they change into an ordered crystal. The data can then be deleted by melting the crystalline substance. To read the information, a computer determines the electrical resistance of the material.

An important attribute of phase change memory is that the technology is non-volatile. This means it does not require power to retain information like standard RAM offerings. Along with the possibility of replacing system memory, these chips might end up competing with NAND flash as well.

Some memory manufacturers are dabbling with PCM on a small scale. Micron offers phase change modules with densities up to 128 MB and Samsung inserted PCM into an unnamed cell phone, but ended up removing it later on.

Despite the benefits, PCM suffers from an inherent issue that has slowed its path to adoption. The biggest one is its write speed. Current DRAM technology can perform write operations within a 1-10 nanosecond window, which is faster than the time it takes for the germanium, antimony and tellurium compound in PCM to crystallize. Other crystalline compounds with faster reaction times have been researched, but they are not as stable as the current PCM design, slowly erasing themselves in low temperatures over time.

Recent research from the University of Cambridge has given hope to the new technology though. Stephen Elliott, Professor of Chemical Physics at the university, along with his colleagues, have discovered a method to improve PCM write speed.

By preparing the material with a 0.3-volt electrical current, crystallization occurred after receiving a 500-picosecond burst of 1 volt. Essentially, the low current made the material act like water at near-freezing temperatures. A few crystalline seeds formed, enabling the material to change at an accelerated rate when receiving additional voltage. The improvement was ten times faster than similar compounds that were tested and remained stable for 10,000 write-rewrite cycles.

The need for extra electrical current during the write cycle could become an Achilles heel for phase change memory, however, since that’s going to increase the overall power draw. It’s a relatively new development though, and further optimizations may be under development. If the price point and power consumption are competitive, PCM may indeed replace one or more current memory technologies.

]]>A Computerworld article last week reported on a reseacher’s prediction that shrinking the size of NAND flash memory for solid-state drives (SSDs) may cause the technology to lose significance altogether.

In a lecture delivered at this week’s Usenix Conference on File and Storage Technologies, Laura Grupp, a graduate student at the University of California, San Diego, argued that as flash memory is manufactured at smaller geometries, data errors and latency would increase. The idea behind shrinking the transistors is to boost capacity, which translates into lower cost per gigabyte. But that pushes performance and reliability in the opposite direction.

Grupp wrote about the phenomenon in a study titled The Bleak Future of NAND Flash Memory. “While the growing capacity of SSDs and high IOP rates will make them attractive for many applications, the reduction in performance that is necessary to increase capacity while keeping costs in check may make it difficult for SSDs to scale as a viable technology for some applications,” she wrote.

Grupp, along with John Davis of Microsoft Research and Steven Swanson of UCSD’s Non-Volatile Systems Lab, tested 45 types of NAND flash chips, spread across six vendors and multiple transistor geometries (between 25nm and 72nm). The researchers found that write speed for flash blocks had high variations in latency. In addition, they also discovered wide variations in error rates as the NAND flash wore out. Multi-level cell (MLC), and especially triple-level cell (TLC) NAND created the worst results, while single-level cell (SLC) performed the best.

Grupp, Swanson and Davis extrapolated the results to 6.5nm technology, which is the size NAND transistors are expected to be in 2024. At that size, the researchers estimate that read/write latency will double in multi-level flash, with triple-level suffering 2.5 times as much latency. Bit error rates are expected to increase as well, more than tripling those of current levels.

But since flash memory is a solid-state technology (versus the mechanical technology used in hard disks), SSDs will always have a natural advantage in speed and throughput. In general, reading and writing to an SSD is about 100 times faster than that of a hard drive.

Grupp concedes that even with 2024-level transistor sizes, SSDs will outperform their hard disk competition by a wide margin, 32,000 IOPS to 200 IOPS, respectively. But because of the latency and error rate issues, she believes that 6.5nm will be end of the line for flash memory.

Takewaway

For flash memory, there seems to be a choice of performance or capacity, but not both. This could have lasting impacts on data-intensive applications that lean heavily on IOPS performance. Without a replacement for NAND memory, performance could stall or even decline until another solid-state technology takes its place.