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Attributes

Field descriptions

Group_modifier_bit<x>, bit [x], for x = 0 to 31

Group modifier bit. In implementations where affinity routing is enabled for the Security state of an interrupt, the bit that corresponds to the interrupt is concatenated with the equivalent bit in GICD_IGROUPR<n>E to form a 2-bit field that defines an interrupt group:

Group modifier bit

Group status bit

Definition

Short name

0b0

0b0

Secure Group 0

G0S

0b0

0b1

Non-secure Group 1

G1NS

0b1

0b0

Secure Group 1

G1S

0b1

0b1

Reserved, treated as Non-secure Group 1

-

This field resets to 0.

For INTID m, when DIV and MOD are the integer division and modulo operations:

The corresponding GICD_IGRPMODR<n>E number, n, is given by n = (m-4096) DIV 32.

The offset of the required GICD_IGRPMODR<n>E is (0x3400 + (4*n)).

The bit number of the required group modifier bit in this register is (m-4096) MOD 32.

Accessing the GICD_IGRPMODR<n>E

When affinity routing is not enabled for the Security state of an interrupt in GICD_IGRPMODR<n>E, the corresponding bit is RES0.

When GICD_CTLR.DS==0, bits corresponding to Secure SPIs are RAZ/WI to Non-secure accesses.

Bits corresponding to unimplemented interrupts are RAZ/WI.

GICD_IGRPMODR<n>E can be accessed through the memory-mapped interfaces:

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