METHOD AND APPARATUS FOR HIGH SPEED STEPPER MOTOR STALL DETECTION - A detector device and a method for detecting a stall condition in a stepper motor, wherein the accumulated value of the back EMF is compared to a stall threshold when the stepper motor has exceeded a pre-determined rotational velocity threshold, the accumulated value of the back EMF representing a condition of the stepper motor, specifically a failure of the accumulated back EMF value to exceed the stall threshold indicating a stall condition of the stepper motor.

2009-07-09

20090174359

CONTROL OF A TRIAC FOR THE STARTING OF A MOTOR - A method and a circuit for controlling a triac intended to be series-connected with a resistive element of positive temperature coefficient or a capacitive element, and a winding for starting an asynchronous motor, for supply by an A.C. voltage, the present invention including the steps of: detecting a voltage representative of the voltage across the series connection of the element and of the triac; comparing this detected voltage with respect to a threshold; and blocking a turning back on of the triac when the threshold has been exceeded.

2009-07-09

20090174360

Method And Device For Reducing The Influence Of A DC Component In A Load Current Of An Asynchronous Three-Phase Motor - A method for reducing the influence of a DC component in a load current of an asynchronous three-phase motor, in which the voltages of two of the three phases are controlled by adjusting firing angles of semiconductor devices of the type turning-off at zero-crossing of the current therethrough comprises the steps carried out for each said controlled phase: detecting turn-off times of the semiconductor devices, calculating a value of a change of firing angle of the semiconductor devices needed for changing the length of the time period between two subsequent turn-off times for compensating for the influence of a DC component, and determining the firing angle of said semiconductor devices in dependence of the result of this calculation.

2009-07-09

20090174361

Energy Harvesting In RFID Systems - Methods, systems, and apparatuses for providing power to devices that are part of RFID systems are described. Energy is harvested at portable/mobile devices, stored and conditioned to provide on-going power as needed for various circuits/components. The energy may be generated in a variety of ways, including using a vibratory energy harvesting device, a magnetic energy harvesting device, and an optical energy harvesting devices.

2009-07-09

20090174362

METHOD AND APPARATUS FOR PROVIDING SUPPLEMENTAL POWER TO AN ENGINE - A method and apparatus provides supplemental power to an engine. The method and apparatus includes a pair of conductive leads for connecting the supplemental power to an engine electrical system, a batter, a relay connected to the conductive leads, a shunt cable connecting the batter to the relay and a processor for controlling the relay to selectively apply electrical power to the engine electrical system. The method and apparatus includes safety features to reduce the risk of injury to the operator and damage to the apparatus and/or engine electrical system.

2009-07-09

20090174363

Vehicle System Including a Plurality of Wheeled Vehicles Docked for Vending and Recharging - A system employing wheeled vehicles, such as strollers. A plurality of the wheeled vehicles is provided, each having a docking element. A vehicle station has a docking port for each of at least some of the wheeled vehicles. Each docking port has a charging device and is shaped to engage a docking element of an engaged wheeled vehicle. At least two display screens are provided on the wheeled vehicle, one for an occupant and one for an operator. One or more screen drivers is provided for the display screens.

2009-07-09

20090174364

POWER TRANSMISSION CONTROL DEVICE, POWER TRANSMITTING DEVICE, NON-CONTACT POWER TRANSMITTING SYSTEM, AND ELECTRONIC INSTRUMENT - A power transmission control device used for a non-contact power transmission system includes an operation mode switching terminal that receives an operation mode switch control signal that switches a mode between an automatic mode and a switch mode, a power transmitting device starting normal power transmission in the automatic mode after installation of a power-receiving-side instrument that includes a power receiving device in an area in which power transmitted via non-contact power transmission can be received has been automatically detected, the normal power transmission supplying power to a load of the power-receiving-side instrument, and the power transmitting device starting the normal power transmission in the switch mode after an operation trigger switch has been turned ON, an operation trigger terminal that receives an operation trigger signal that occurs due to an operation of the operation trigger switch, and a power-transmitting-side control circuit that controls power transmission to the power receiving device and changes an operation mode of the power transmitting device based on the operation mode switch control signal.

2009-07-09

20090174365

NETWORK-CONTROLLED CHARGING SYSTEM FOR ELECTRIC VEHICLES - A system for network-controlled charging of electric vehicles comprises charge transfer devices networked as follows: charge transfer devices and electric vehicle operators communicate via wireless communication links; charge transfer devices are connected by a local area network to a data control unit, which is connected to a server via a wide area network. The server stores consumer profiles and utility company power grid load data. A charge transfer devices comprises: an electrical receptacle for receiving an electrical connector for recharging an electric vehicle; an electric power line connecting the receptacle to a local power grid; a control device on the electric power line, for switching the receptacle on and off; a current measuring device on the electric power line, for measuring current flowing through the receptacle; a controller for operating the control device and monitoring the output from the current measuring device; a local area network transceiver connected to the controller, for connecting the controller to the data control unit; and a communication device connected to the controller, for wireless communication between the operator of the electric vehicle and the controller.

2009-07-09

20090174366

Multiple Function Switching Regulator for Use in Mobile Electronic Devices - Multiple Function Switching Regulator for Use in Mobile Electronic Devices A mobile electronic device operable to employ a rechargeable battery as a power source includes a peripheral port suitable for connecting an external device to the mobile electronic device and a power management device operable in a first mode as a battery charger to recharge the battery from an external power source and further operable in a second mode as a boost converter to power the external device from battery supplied power where the boost converter and the battery charger are provided by a single switching-converter.

2009-07-09

20090174367

METHOD AND SYSTEM FOR OPERATING A PORTABLE ELECTRONIC DEVICE IN A POWER-LIMITED MANNER - Improved techniques to manage operation of a portable electronic device having a substantially depleted battery when power is available from an external, power-limited source are disclosed. In one embodiment of the invention, the substantially depleted battery can be initially charged while a power-intensive operation is delayed. Once the battery has adequate charge to assist the external, power-limited source in powering the portable electronic device, the power-intensive operation can be performed. In this manner, power consumption of a portable electronic device can be managed so that reliable operation is achieved without exceeding limits on power being drawn from an external, power-limited source.

2009-07-09

20090174368

METHOD FOR BATTERY CHARGING MANAGEMENT - A method for managing the charge of a battery comprising at least one rechargeable electrochemical cell is provided, in which the charging circuit applies a trickle charge current to said battery and, when the temperature of the battery is below a first threshold temperature, an overcharge current for keeping the battery within its nominal temperature range even if the battery is employed in a cold environment. An electronic system for a battery implementing the method and a battery employing such system are also disclosed

2009-07-09

20090174369

Battery Management System - A battery management system which can output a battery state enabling optimum charge and discharge control to be performed even when a temperature variation occurs among individual single cells. A plurality of temperature sensors measure temperature values of a battery. A measurement unit measures a voltage and a current of the battery. A maximum/minimum temperature selection unit in a calculation unit determines a maximum temperature and a minimum temperature from the temperature values measured by the temperature sensors. An available power calculation unit calculates respective values of maximum available charge and discharge powers or maximum available charge and discharge currents of the battery corresponding to the maximum temperature and the minimum temperature based on the voltage and the current of the battery. A selection unit selects and outputs smaller maximum available charge and discharge powers or smaller maximum available charge and discharge currents from the respective values of the maximum available charge and discharge powers or the maximum available charge and discharge currents of the battery corresponding to the maximum temperature and the minimum temperature, which are calculated by the calculation unit.

2009-07-09

20090174370

POWER SOURCE SENSING AND BATTERY CHARGING - A battery type detection approach is disclosed. In one embodiment, a method of detecting a battery type can include: receiving a signal from a battery module in a portable computing device; determining if the signal is in a first state for at least a first predetermined time before transitioning to a second state; determining if the signal transitions from the second state to the first state after a second predetermined time, and identifying the battery type in response thereto; and asserting an indication of the battery type when a third predetermined time period after the transition from the second state to the first state has occurred.

2009-07-09

20090174371

CHARGING CONTROL DEVICE FOR VEHICLE USE - A charging control device includes a control unit and a switching circuit. The control unit has an input end connected to a vehicle battery for receiving a battery voltage signal therefrom. The switching circuit includes at least two switch units, each of which is connected between an alternator and the vehicle battery and includes a conducting unit. The conducting unit includes a silicon controlled rectifier (SCR) connected to the control unit and the alternator. The control unit controls the SCR of each switch unit to switch from a non-conducting state to a conducting state with reference to the battery voltage signal such that each switch unit permits supply of electricity from the alternator to the vehicle battery when the battery voltage signal is lower than a predetermined threshold, and interrupts supply of the electricity from the alternator to the vehicle battery when otherwise.

2009-07-09

20090174372

Analog Output Circuit, Data Signal Line Driving Circuit, Display, and Potential Writing Method - In one embodiment of the present invention, a voltage source is disclosed including a lower output impedance is connected to a capacitive load via a switch element and a voltage source including a higher output impedance is connected to the capacitive load via a switch element. Until a potential of an output terminal attains a reference potential, a comparator keeps the switch element in an ON state so that the voltage source writes a potential onto the capacitive load. When the potential of the output terminal exceeds the reference potential, the comparator causes the switch element to be in an ON state so that the voltage source writes a potential onto the capacitive load so as to have a predetermined potential.

2009-07-09

20090174373

CLAMP CIRCUIT AND COMBINATIONAL CIRCUIT THEREOF - A clamp circuit comprises a first transistor, a second transistor and a voltage-dividing circuit. The first transistor has a source terminal connected to a reference voltage, and has a drain terminal grounded through a current source. The second transistor has a gate terminal connected to the gate and drain terminals of the first transistor, and has a drain terminal grounded. The voltage-dividing circuit is connected to an input voltage end, an output voltage end and a source terminal of the second transistor for providing a clamping voltage.

2009-07-09

20090174374

DYNAMIC MULTIPHASE OPERATION - An output regulator includes a plurality of switch arrays. A controller enables selected ones of the plurality of switch arrays in response to a sense signal. The sense signal is based on an output of the output regulator. The controller generates drive signals to control the selected ones of the plurality of switch arrays. The controller adjusts first selected pulses in an output phase of the selected ones of the plurality of switch arrays based on a first pulse width. The controller adjusts second selected pulses in the output phase of the selected ones of the plurality of switch arrays based on a second pulse width greater than or less than the first pulse width.

2009-07-09

20090174375

Sepic fed buck converter - A Single Ended Primary Inductance Converter (SEPIC) fed BUCK converter includes: a first switch configured to open or close according to a first signal; a SEPIC portion coupled to the first switch and coupled to an energy source, the SEPIC portion comprising a first set of one or more passive components; a BUCK converter portion coupled to the first switch, the BUCK converter portion comprising a second set of one or more passive components. While the first switch is closed, the SEPIC portion is configured to store energy from an energy source in at least some of the first set of passive components and deliver energy to the BUCK portion, and the BUCK converter portion is configured to deliver energy to a load and to store energy in at least some of the second set of passive components. While the first switch is open, the SEPIC portion is configured to deliver at least some of its stored energy to the load, and the BUCK converter portion is configured to deliver at least some of its stored energy to the load.

2009-07-09

20090174376

DC-DC converter - A Single Ended Primary Inductance Converter (SEPIC) fed BUCK converter includes: a first switch configured to open or close according to a first signal; a SEPIC portion coupled to the first switch and coupled to an energy source, the SEPIC portion comprising a first set of one or more passive components; a BUCK converter portion coupled to the first switch, the BUCK converter portion comprising a second set of one or more passive components. While the first switch is closed, the SEPIC portion is configured to store energy from an energy source in at least some of the first set of passive components and deliver energy to the BUCK portion, and the BUCK converter portion is configured to deliver energy to a load and to store energy in at least some of the second set of passive components. While the first switch is open, the SEPIC portion is configured to deliver at least some of its stored energy to the load, and the BUCK converter portion is configured to deliver at least some of its stored energy to the load.

2009-07-09

20090174377

MULTIPHASE TRANSFORMER FOR A MULTIPHASE DC-DC CONVERTER - A multiphase DC-DC converter is provided that includes a multiphase transformer, the multiphase transformer including a plurality of input voltage terminals and an transformer output voltage terminal, each input voltage terminal associated with a corresponding phase. Each phase is assigned to an input voltage terminal of the plurality of input voltage terminals to minimize a ripple current at the input voltage terminals of the multiphase transformer.

2009-07-09

20090174378

Hybrid Filter for High Slew Rate Output Current Application - An active linear regulator circuit in parallel with a filter capacitor of a switching voltage regulator injects current to a load only when the switching regulator and capacitor cannot supply adequate current to follow high frequency load transients in a manner which is compatible with adaptive voltage positioning (AVP) requirements. control of current injection and determination of the insufficiency of current from the switching regulator and capacitors is achieved by impedance matching of the linear regulator to the switching regulator. The linear regulator thus operates at relatively low current and duty cycle to limit power dissipation therein. By matching impedances and increasing the bandwidth of the switching regulator, filter capacitor requirements can be reduced to the point of being met entirely by packaging and/or on-die capacitors which may be placed close to or at the point of load to reduce parasitic inductance, as can the linear regulator.

2009-07-09

20090174379

DC-DC CONVERTER - A dual-mode switching voltage regulator has a duty cycle that varies with the input and output voltages so as to dynamically compensate for changes in the operating conditions. The switching voltage regulator uses input and output voltages/currents to optimize the duty cycle of the signals applied to a pair of switches disposed in the regulator. In the PFM mode, a control block senses the time that a first switch used to discharge an inductor is turned off. If the control block senses that the first switch is opened too early, the control block increases the on-time of a second switch used to charge the inductor. If the control block senses that the first switch is opened too late, the control block decreases the on-time of the second switch.

2009-07-09

20090174380

FIXED FREQUENCY RIPPLE REGULATOR - A ripple regulator for providing a pulse width modulation (PWM) signal for regulating an output voltage of a power converter switching stage. The regulator including a ripple circuit for providing a ripple voltage; a comparison circuit for comparing the ripple voltage to an output of an error amplifier; and a PWM circuit producing the PWM signal and receiving an output of the comparison circuit and a clock signal input, the clock signal input determining a first edge of the PWM signal and the output of said comparison circuit determining a second edge of the PWM signal.

2009-07-09

20090174381

CONTROLLER FOR A POWER SUPPLY - A controller for controlling a load output. In various embodiments, the controller may include a closed loop. In some embodiments, the closed loop may have a least one controllable characteristic. In one embodiment, the controller may be configured to control the at least one controllable characteristic in response to changes in the load.

2009-07-09

20090174382

Method and Apparatus to Remove Energy from DC Loads - A DC output power converter or DC switch device that includes methods and apparatus to reverse the current in the connected load, thereby draining the load's energy until the voltage in the load is brought to a (near) zero potential and held there.

2009-07-09

20090174383

FREQUENCY COMPENSATION BASED ON DUAL SIGNAL PATHS FOR VOLTAGE-MODE SWITCHING REGULATORS - A frequency compensation method for voltage-mode switching regulators is disclosed. A lowpass filter and a bandpass filter are employed in the two signal paths into the dual inputs of PWM comparators. In one embodiment, two zeros are generated to compensate for the L-C output filter poles. Stable operation, low output voltage ripple and fast load transient response are achieved; while the power consumption of error amplifier and the area for implementing on-chip passive components are greatly reduced.

2009-07-09

20090174384

SWITCHING REGULATOR AND METHOD OF CONTROLLING THE SAME - A disclosed switching regulator converts an input voltage to an output voltage of a predetermined level and outputs the output voltage. The disclosed switching regulator includes a switching transistor configured to be turned on and off according to a control signal; an inductor configured to be charged by the input voltage when the switching transistor is turned on; a mode switching circuit configured to generate a switching signal for switching a control mode of the switching transistor between a PWM control mode and a VFM control mode; and a control circuit configured to control the switching transistor in the PWM control mode or the VFM control mode depending on the switching signal from the mode switching circuit so that the output voltage is maintained at the predetermined level.

2009-07-09

20090174385

Integrated soft start circuits - Various circuits, including DC/DC converters can include an integrated soft-start circuit. The integrated soft-start circuit includes a PMOS transistor configured to receive a reference signal and control the current to a bipolar junction transistor when the reference signal is in a first state. First and second NMOS transistors are included in the soft-start circuit, and receive the reference signal to turn off (to release from reset) when the reference signal is in the first state. A capacitor coupled in parallel with one of the NMOS transistors controls the soft-start signal. Various different transistors types can be used depending on the desired implementation.

2009-07-09

20090174386

Power Supply Start-Up and Brown-Out Inrush Management Circuit - A power supply device including a diode bridge, a converter module, and an inrush control module. The diode bridge is adapted to rectify an input voltage. The converter module is coupled to the diode bridge and is adapted to convert the input voltage into a direct current regulated output voltage. The inrush control module is connected to the diode bridge and is adapted to gradually activate a transistor and to limit an inrush current peak value based upon a zero crossing being detected in the input voltage. A method for limiting the inrush current peak value is also disclosed.

2009-07-09

20090174387

Semiconductor Device - A disclosed semiconductor device includes a first power terminal to which a high voltage is applied; a clamping circuit electrically connected to the first power terminal; and an internal circuit electrically connected to the clamping circuit and driven by a voltage lower than the high voltage. The clamping circuit includes a bipolar transistor. The emitter of the bipolar transistor is electrically connected to the first power terminal. The collector of the bipolar transistor is grounded. The base of the bipolar transistor is electrically connected to the collector of the bipolar transistor.

2009-07-09

20090174388

Dual power switch and voltage regulator using same - The present invention discloses a dual power switch and a voltage regulator using the dual power switch. The dual power switch comprises a PMOS power switch and an NMOS power switch connected in parallel and operating according to corresponding predetermined conditions, respectively.

2009-07-09

20090174389

MULTI-PHASE POWER SUPPLY CONTROLLER AND METHOD THEREFOR - In one embodiment, a multi-phase power supply controller is configured to an operating status signal and responsively inhibit the PWM controller from forming at least one PWM drive signal of a plurality of PWM drive signals.

2009-07-09

20090174390

Position Detector - A method for diagnosing a position detector used in determining the position of a control means. The position detector includes a resistance track, and a first terminal in connection with its first end, and a second terminal in connection with second end of the resistance track, and a slide electrically connected to the resistance track. The slide is arranged to move in relation to the control by the effect of a position change. Additionally, the position detector includes a slide terminal in connection with the slide, an electricity supply, a voltage measurer and a signal processing unit for diagnosing measurement data. In the method, a supply voltage is arranged in the slide terminal, the output voltage of the first terminal is measured, the output voltage of the second terminal is measured, and at least a first and a second output voltage are arranged to the signal processing unit.

2009-07-09

20090174391

ZERO CURRENT DETECTOR FOR A DC-DC CONVERTER - A zero current detector for a DC-DC converter includes a first transistor having a drain, a gate, and a source for sensing the voltage of a first terminal of a power transistor; a second transistor having a drain, a gate, and a source for sensing the voltage of a second terminal of a power transistor; and a third transistor having a coupled gate and drain for receiving a reference current that is coupled to the gates of the first and second transistors and a source coupled to the source of the first transistor, wherein an output signal is provided by the drains of the first and second transistors. A load is coupled to the drains of the first and second transistors. The zero current detector also includes a fourth transistor having a current path coupled between the source of the second transistor and the second terminal of the power transistor and a gate for receiving a control signal.

APPARATUS, SYSTEM, AND METHOD DETERMINING VOLTAGE, CURRENT, AND POWER IN A SWITCHING REGULATOR - An apparatus, system, and method are disclosed for measuring voltage, current, and power in a power supply. The apparatus consists of a voltage measuring module which measures the peak voltage through an inductor in a switching power supply stage of the power supply for a portion of the switching period. A current measuring module measures the peak current in the switching power supply stage for a portion of the switching period. The measured currents and voltages are proportional to the voltage and current at a point in the power supply where a power measurement is desired. The voltage and current values are multiplied along with a constant to provide an accurate measure of the power at a point in the power supply. The constant generally includes a combination of a calibration constant, an RMS conversion factor, a voltage conversion factor, and a current conversion factor.

2009-07-09

20090174394

Electrical test lead with a replaceable inline fuse - An electrical test lead for use with a multi-meter has a fuse assembly adapted to releasably hold a fuse in-line of the electrical wire connecting ends of the electrical test lead. The fuse assembly may be permanently attached to the electrical test leads or may be releasably attached at one or both ends thereof to electrical test lead sections. The fuse assembly includes a fuse holder that is preferably clear to see the replaceable fuse therein in order to determine whether the fuse has blown. The electrical test lead has a fuse assembly holding a replaceable fuse electrically connected to and situated between a first test lead section terminating in a test lead plug that is adapted to be received in a test lead receptacle of a multi-meter and a second test lead section terminating in one of an electrical test probe and a test lead receptor adapted to receive a test lead tool.

2009-07-09

20090174395

METHODS AND APPARATUS FOR ANGULAR POSITION SENSING USING MULTIPLE QUADRATURE SIGNALS FROM FREQUENCY INDEPENDENT SINUSOIDS - A sensor minimizes effects of sensor element misalignment with respect to a magnet. In one embodiment, a sensor comprises a magnet, first, second, third, and fourth sensor elements positioned in relation to the magnet, and a signal processing module to process output signals from the first, second, third, and fourth sensor elements and generate first and second differential signals for minimizing effects of positional misalignment of the first, second, third, and fourth sensor elements with respect to the magnet by maximizing a quadrature relationship of the first and second differential signals.

2009-07-09

20090174396

INDUCTIVE DISPLACEMENT DETECTOR - A detector for measuring relative position along a measurement path comprising: a passive, laminar electrical intermediate device extending along the measurement path wherein the extent of the said electrical intermediate device in an axis normal to the measurement path varies along the measurement axis; at least one laminar transmit winding and at least two laminar receive windings wherein the said at least two laminar receive windings are displaced from each other along the measurement path wherein each laminar receive winding is substantially electrically balanced with respect to the at least one laminar transmit winding; arranged such that the mutual inductance between at least one laminar transmit winding and at least two laminar receive windings indicates the relative position of the electrical intermediate device.

Reel shaft of barcode printer - A reel shaft sensor is provided for a barcode printer and is applied to a reel shaft of the barcode printer. The reel shaft sensor device includes a plurality of magnetic elements and at least one magnetic sensor. The reel shaft has an end to which a connection member is mounted for coupling the interior of a housing of the barcode printer. The magnetic element is arranged inside the connection member and the magnetic sensor is installed inside the housing of the barcode printer and corresponding in position to the connection member. The magnetic sensor detects a magnetic signal from the magnetic elements that rotates with the reel shaft to determine the rotational speed and angular position of the reel shaft. The device is a small-size, magnetism operating shaft sensor.

2009-07-09

20090174399

Method and System for Generating and Receiving Torsional Guided Waves in a Structure Using Wiedemann and Inverse Wiedmann Effect - A method is shown for magnetostrictive testing of structures using magnetostrictive techniques. A torsional guided wave is generated in the structure either directly, or through a magnetostrictive strip dry coupled or bonded to the structure. A permanent magnetic field is created by either permanent magnets or DC current for a permanent bias in a bias direction in the magnetostrictive strip and/or structure. By pulsing the magnetic field with an AC current pulse, a torsional guided wave will flow through the structure in the same direction as the permanent bias. By saturating the permanent magnetic field, a maximum torsional guided wave is reflected from defects in the structure to given an improved signal to noise ratio.

2009-07-09

20090174400

Arrangement for Non-Contact Defined Movement of at Least One Magnetic Body - The invention relates to an arrangement for the non-contact defined movement of at least one magnetic body, free to move in at least one dimension. A simple arrangement of this type, taking up a reduced volume, of universal application, for both positioning and orientation and also for energy generation and transmission, can be achieved, by means of arranging the body with a magnetic moment in the primary magnetic field of at least one permanent magnet which moves in a defined manner, said body having a secondary magnetic field extending from the body, aligned with the primary magnetic field. At least one magnetic field sensor is provided to record the secondary magnetic field in any position of the body.

2009-07-09

20090174401

MAGNETIC DETECTION CIRCUIT - A magnetic detection element is employed. An output voltage from the magnetic detection element is amplified by an amplifying circuit. A switch circuit is connected between the magnetic detection element and the amplifying circuit. The switch circuit reverses the polarity of the output voltage from the magnetic detection element selectively and inputs an output signal to the amplifying circuit. A comparator compares the output signal from the amplifying circuit and a reference value to output a comparison result. First and second storage circuits are provided to receive output signal from the comparator. An electric power control unit controls at least the electric power to be provided to the magnetic detection element. First and second gated signals are provided to the first and second storage circuits respectively. A signal based on the first and second gated signals is supplied to the electric power control unit.

FIELD MAP ESTIMATION FOR SPECIES SEPARATION - A method for mapping field inhomogeneity for forming a magnetic resonance image is provided. A magnetic resonance excitation is applied. A plurality of k-space echoes signals is acquired. A periodic cost function is calculated from the acquired plurality of k-space echo signals. A period of the calculated periodic cost function is divided into multiple regions. A search algorithm is used to locate a local minimum in each region. Located local minimums are chosen to provide global smoothness.

2009-07-09

20090174404

Split-echo with fractional temporal-interpolation - An MRI to form an image of a patient includes at least one emitting coil which produces RF pulses and gradients. The MRI includes a controller in communication with the emitting coil for obtaining a steady-state image of the patient, where gradient areas balance to zero for each time repetition (TR) interval, and for causing the emitting coil to produce the RF pulses without interruption during the time repetition interval. The MRI includes at least one receiving coil in communication with the controller which receives the RF pulses and provides the RF pulses to the controller for the controller to obtain the image. A method to form an image of a patient with an MRI. A computer program embodied on a computer readable medium to form an image of a patient with an MRI.

2009-07-09

20090174405

MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - A magnetic resonance imaging apparatus includes a generation unit configured to generate a magnetic field, a reconstruction unit configured to reconstruct an image for a subject on the basis of a magnetic resonance signal radiated from the subject in the magnetic field, a presumption unit configured to presume a distribution of an image quality deterioration degree occurring in the image on the basis of a precision at which the generation unit generates the magnetic field, and a creation unit configured to create a display image showing the distribution of the image quality deterioration degree on the image.

2009-07-09

20090174406

NMR Probe - An NMR probe is provided that prevents homogeneity of the static magnetic field from being reduced in a sensitive area of an RF coil used for measuring an NMR signal. The RF coil is wound around a bobbin, and mounted on the NMR probe. In the NMR probe, a substance having a magnetic susceptibility of the same polarity as that of the RF coil is disposed on a surface of the bobbin which is not contacted by the RF coil. Alternatively, the bobbin is formed with grooves, and the RF coil is wound around the grooves. The bulk susceptibility of the bobbin or RF coil winding is adjusted such that the difference between the product of the depth of the groove and bulk susceptibility of the bobbin and the product of winding thickness and bulk susceptibility of the RF coil winding is 5 percent or less.

2009-07-09

20090174407

CRYOGENIC COOLING OF MRI/NMR COILS USING INTEGRATED MICROFLUIDIC CHANNELS - The present invention includes an assembly with a magnet for magnetic resonance having a substrate with an imaging surface and an opening within the substrate adjacent the imaging surface. The present invention enhances the sensitivity and reduces the acquisition time of magnetic resonance imaging (MRI) and nuclear magnetic resonance (NMR) spectroscopy by cooling the coil using microfluidic channels through which a cryogenic fluid is pumped. Various embodiments have been detailed for clinical imaging or detection in which the integrated coil/microfluidic cryo-cooling system is outside the patient body or in vivo imaging or detection in which the integrated coil/microfluidic cryo-cooling system is inside the patient.

2009-07-09

20090174408

RECEIVING DEVICE FOR A MAGNETIC RESONANCE IMAGING SYSTEM - A receiving device for an MRI (magnetic resonance imaging) system has multiple receiving coils. In the same imaging acceleration direction, a junction region is formed between adjacent receiving coils. An additional receiving coil is arranged on the junction region. The additional receiving coil covers at least partially a line of strong phase variation in sensitivity at the boundary of said junction region. This receiving device alleviates the problem of poor sensitivity to MRI signals in the junction region in the imaging acceleration direction, so as to improve the imaging quality in the junction region, and thus improving the overall imaging quality.

2009-07-09

20090174409

DOWNHOLE SENSOR INTERROGATION EMPLOYING COAXIAL CABLE - The present invention is directed to methods and systems for oil field downhole sensing and communication during drilling and/or production, wherein such methods and systems utilize coaxial cable to transmit electromagnetic (EM) energy, continuously or as a pulse, to passive downhole sensors.

2009-07-09

20090174410

METHOD AND APPARATUS FOR CONTROLLING BATTERY - An apparatus for controlling a battery includes a capacitor for charging a voltage when the apparatus is on and discharging a voltage when the apparatus is off, a discharging circuit for discharging the voltage charged in the capacitor; a first switching unit for connecting or disconnecting the capacitor to/from a predetermined power source for the purpose of charging of the capacitor; a second switching unit for connecting or disconnecting the capacitor to/from the discharging unit; a voltage measuring unit for measuring a voltage charged in the capacitor; and a controller for calculating a power-off duration time according to the measured voltage. This apparatus may continuously calculate a power-off duration time of a battery pack.

2009-07-09

20090174411

ABNORMAL VOLTAGE DETECTOR APPARATUS FOR DETECTING VOLTAGE ABNORMALITY IN ASSEMBLED BATTERY - An abnormal voltage detector apparatus is provided for an assembled battery including a plurality of battery blocks connected in series to each other. In the abnormal voltage detector apparatus, a detecting part detects whether or not each of the battery blocks is in a voltage abnormality state by comparing either one of a voltage of each battery block and each battery measuring voltage, that is a voltage lowered from the voltage of each battery block, with a predetermined reference voltage, generates each of abnormality detecting signals containing information about a detected result, calculates a time ratio of a time interval, for which the assembled battery is in a voltage abnormality state, to a predetermined time interval, based on the abnormality detecting signals, and detects a voltage abnormality of the assembled battery based on a calculated time ratio.

2009-07-09

20090174412

Detection Systems - An IMS system or the like has dopant contained in a way such that it is only released when needed. The dopant could be contained in a device (

2009-07-09

20090174413

Method and Apparatus to Verify the Proper Connection of Loads before Applying Full DC Power - A DC power source or DC switching device that uses a test signal to verify the proper connection of the load (or loads) at its output prior to applying full power to the output. This method and apparatus inserts a low power or low energy test signal at the output terminals of a DC power source and measures the test signal's effect on connected external loads to access the condition and proper connection of these loads before applying full power to the DC output power port. If the test signal detects that a load is connected with a reverse polarity, is shorted, malfunctioning or can otherwise cause damage, it will inhibit the application of full power to the output terminals until the situation is corrected.

2009-07-09

20090174414

Testing system for electricity safety and a testing method therefor - A system for testing the safety of electricity includes steps as following. First step is inserting a testing apparatus into a socket of utility power. Second step is providing a first amplifier and rectifier unit for measuring a first voltage wave as no-loading. Third step is providing a signal capturing unit at driver circuit for capturing an instant load cycle current wave. Fourth step is providing a second amplifier and rectifier unit for simulating a second voltage wave according to the instant cycle current wave. At least, a processing unit provides for comparing the first voltage wave with the second voltage wave. Therefore, the above-mentioned method is provided for determining the quality of household electricity wire and further improving the electricity safety.

2009-07-09

20090174415

Method for Calibrating a Real-Time Load-Pull System - A calibration procedure for a real-time load-pull system whereby the signal passes through at least one of the tuners of said real-time load-pull system. A calibration standard is connected to the test ports and an electromagnetic wave signal passes through one of the tuners before passing through the wave sensing structure. After having passed the wave sensing structure the electromagnetic wave signal interacts with the calibration element. This results in a reflected and eventually a transmitted electromagnetic wave signal that pass through the wave sensing structures of the system. The sensed electromagnetic wave signals are measured by means of a receiver. The procedure is repeated with different calibration standards. Then a line element is connected to the test ports and, one after the other, a set of calibration standards, a power meter and a harmonic phase reference generator are connected to the output tuner, each time sending a signal and measuring the wave signals. The measured data is used to calculate the error coefficients of the real-time load-pull system.

2009-07-09

20090174416

METHODS AND SYSTEMS FOR DETECTING A CAPACITANCE USING SWITCHED CHARGE TRANSFER TECHNIQUES - Methods, systems and devices are described for detecting a measurable capacitance using charge transfer techniques. According to various embodiments, a charge transfer process is performed for two or more times. During the charge transfer process, a pre-determined voltage is applied to the measurable capacitance, and the measurable capacitance is then allowed to share charge with a filter capacitance through a passive impedance that remains coupled to both the measurable capacitance and to the filter capacitance throughout the charge transfer process. The value of the measurable capacitance can then be determined as a function of a representation of a charge on the filter capacitance and the number of times that the charge transfer process was performed. Such a detection scheme may be readily implemented using conventional components, and can be particularly useful in sensing the position of a finger, stylus or other object with respect to an input sensor.

2009-07-09

20090174417

SWITCHED CAPACITOR MEASUREMENT CIRCUIT FOR MEASURING THE CAPACITANCE OF AN INPUT CAPACITOR - A switched capacitor measurement circuit is provided for measuring the capacitance of an input capacitor with a parallel parasitic resistor. The circuit comprises a switching arrangement, a reference capacitor, a steered current sink and an operational amplifier with an output, a non-inverting input connected to a reference voltage source and an inverting input connected to a first terminal of the input capacitor. The current sink is steered to compensate for a charge current due to the parasitic resistor. Still further, the circuit comprises a digital adder and an analog-to-digital converter with an analog input connected to the output of the operational amplifier and a digital output connected to a first input of the digital adder. A second input of the digital adder receives a negative digital error signal and the output of the digital adder provides a digital capacitance measurement signal corrected for an error current which is integrated across the reference capacitor in the gain mode due to the slewing of the operational amplifier.

2009-07-09

20090174418

Method and Device for Electrically Determining the Thickness of Semiconductor Membranes by Means of an Energy Input - A method and device for determining the thicknesses of semiconductor membranes uses electrical measurements. Energy is coupled into the membrane in a defined manner and the membrane thickness is determined from the distribution or diffusion of the energy. A change of state of the membrane is detected by measuring electroconductivity of measuring resistances at least one of which is on the membrane. The electroconductivity varies according to the temperature and the mechanical strain of the membrane, which both depend on the thickness of the membrane.

TEST APPARATUS, PROBE CARD, AND TEST METHOD - There is provided a test apparatus for testing a device under test. The test apparatus includes a plurality of drivers that respectively output a plurality of test signals to a same terminal of the device under test so as to supply, to the same terminal of the device under test, a multiple-valued signal that is generated by combining together the plurality of test signals, and a plurality of probe pins that are provided in a one-to-one correspondence with the plurality of drivers. Here, each of the plurality of probe pins has a top end portion to be electrically connected to the same terminal of the device under test so as to supply a signal output from a corresponding one of the plurality of drivers to the same terminal of the device under test while the test apparatus is testing the device under test, and the top end portion of each probe pin is kept electrically open while the test apparatus is not testing the device under test.

2009-07-09

20090174421

Vertical Probe and Methods of Fabricating and Bonding the Same - Disclosed is a vertical probe and methods of fabricating and bonding the same. The probe is comprised of a contactor equipped with two tips, a connector electrically linking with a measuring terminal of a measurement system, And a bump connecting the contactor to the connector and buffing physical stress to the contactor.

2009-07-09

20090174422

Probe Card and Manufacturing Method Thereof - A probe card usable at a higher temperature and a manufacturing method thereof are provided. Each of the junction interfaces of the contact probes and the electrode pads is made from the same metal material, wherein each of the junction interfaces is irradiated with ions in vacuum to remove impurities, followed by positioning so as to associate each of the junction interfaces while maintaining a vacuum state. Therefore, mutual bonding of the bonds in the respective junction interfaces is achieved to associate the junction interfaces with one another at normal temperature, where it is not necessary to form a melting layer having a low melting point between the contact probes and the electrode pads in such a case as using the melting layer to join them. Accordingly, if a metal material having a high melting point is used for the contact probes and the electrode pads, the contact probes and the electrode pads do not melt until high temperature is reached, which makes it possible to provide a probe card usable at a higher temperature.

2009-07-09

20090174423

Bond Reinforcement Layer for Probe Test Cards - A probe card assembly includes a substrate and a plurality of probes bonded to a surface of the substrate. The probe card assembly also includes a reinforcing layer provided on the surface of the substrate. The reinforcing layer is in contact with a lower portion of each of the probes, where a remaining portion of each of the probes is free from the reinforcing layer. The reinforcing layer may be a composite reinforcing layer that includes multiple layers of material to achieve a particular result. According to one embodiment of the invention, the reinforcing layer includes a powder layer disposed on the substrate and an adhesive layer formed on the powder layer. The composite reinforcing layer may be compliant to allow the probes to flex and move as intended, without limiting deflection capability. The composite reinforcing layer may be removable to allow access to probes for repair.

2009-07-09

20090174424

Apparatus for testing semiconductor device package and multilevel pusher thereof - A semiconductor package testing apparatus comprises a test substrate that electrically tests a semiconductor package chip; a socket having an electrical contact between the test substrate and the semiconductor package; an insert block inserted into the socket, wherein the semiconductor package is mounted to the insert block; and a pusher that brings the socket into contact with the semiconductor package by compressing an upper part of the semiconductor package, wherein the pusher is multilevel-controlled to compress the semiconductor package by a predefined pressure according to a thickness of the semiconductor package.

2009-07-09

20090174425

TEST CIRCUIT FOR A SEMICONDUCTOR INTEGRATED CIRCUIT - A test circuit includes an output control section for generating a plurality of output buffer control signals in response to a plurality of data masking signals when a test mode signal is activated in read operation; and a data output buffer for masking some of data input and output pins in response to the plurality of output buffer control signals.

BURN-IN-BOARD ARCHITECTURE AND INTEGRATED CIRCUIT DEVICE TRANSFER METHOD - The present invention implements a mechanism using an inter-connection layer to couple a plurality of integrated circuit devices to a printed circuit board, thereby eliminating the need for sockets to hold the integrated circuit devices on the printed circuit board. The mechanism of the present invention is operative for integrated circuit devices packaged in a ball grid array, a quad flat pack or a leadless quad flat pack. The present invention also provides a mechanism to efficiently transfer a plurality of integrated circuit devices from an integrated circuit device delivery tray to a burn-in board in a single process without requiring an autoloader, resulting in increased transfer reliability and both cost and space savings.

2009-07-09

20090174428

PROGRAMMABLE ELEMENT, AND MEMORY DEVICE OR LOGIC CIRCUIT - A multi-terminal programmable element. The programmable element includes a source electrode and a drain electrode on a base. The programmable element includes reference voltage contact that is not in contact with the source or drain electrode. The base includes a transition-metal oxide with oxygen vacancies for drifting under an applied electric field. Further, materials of the source electrode and the base are selected such that an interface of a source and/or drain electrode material and the transition metal oxide base material forms an energy barrier for electron injection from the electrode into the base material. The energy barrier has a height that depends on an oxygen vacancy concentration of the base material. Four non-volatile states are programmable into the programmable element.

2009-07-09

20090174429

Programmable logic device structure using third dimensional memory - A Programmable Logic Device (PLD) structure using third dimensional memory is disclosed. The PLD structure includes a switch configured to couple a polarity of a signal (e.g., an input signal applied to an input) to a routing line and a non-volatile register configured to control the switch. The non-volatile register may include a non-volatile memory element, such as a third dimension memory element. The non-volatile memory element may be a two-terminal memory element that retains stored data in the absence of power and stores data as a plurality of conductivity profiles that can be non-destructively sensed by applying a read voltage across the two terminals. New data can be written to the two-terminal memory element by applying a write voltage across the two terminals. Logic and other active circuitry can be positioned in a substrate and the non-volatile memory element can be positioned on top of the substrate.

2009-07-09

20090174430

LOGIC ELEMENT, AND INTEGRATED CIRCUIT OR FIELD PROGRAMMABLE GATE ARRAY - A complementary logic element including first and second transistor elements. The first and second gate electrodes of the two transistor elements are electrically parallel to form a common gate. Both the coupling layers of the first and the second transistor element include a resistance switching material, a conductivity of which may be altered by causing an ion concentration to alter if an electrical voltage signal of an appropriate polarity is applied. The first and second transistor elements also include an ion conductor layer that is capable of accepting ions from the coupling layer and of releasing ions into the coupling layer. The coupling layers and ion conductor layers are such that the application of an electrical signal of a given polarity to the gate enhances the electrical conductivity of the first coupling layer and diminishes the electrical conductivity of the second, or vice versa.

2009-07-09

20090174431

METHOD AND APPARATUS FOR UNIVERSAL PROGRAM CONTROLLED BUS ARCHITECTURE - An integrated circuit including a programmable logic array with a plurality of logic cells and programmable interconnections to receive input signals and to perform logical functions to transmit output signals. The integrated circuit may also include megacells comprising a plurality of functional blocks receiving inputs and transmitting outputs. The integrated circuit may also include a programmable interconnections subsystem to cascade the megacells. The megacells are coupled to the programmable logic array.

2009-07-09

20090174432

System for Providing a Complementary Metal-Oxide Semiconductor (CMOS) Emitter Coupled Logic (ECL) Equivalent Input/Output (I/O) Circuit - A system for providing a CMOS I/O circuit design that may replace existing bipolar I/O circuitry, and thus behave in substantially the same manner as bipolar I/O circuitry. Thus, an I/O circuit using a standard CMOS process is made that mimics operation of an ECL I/O circuit created using bipolar transistors. The CMOS input circuitry can receive input signals from an ECL output circuit, so as to mimic traditional ECL input circuitry. The CMOS output circuitry can output signals to an ECL input circuit, so as to mimic traditional ECL output circuitry. The CMOS I/O circuitry is designed to mimic the temperature dependent signals level, as present within traditional ECL I/O circuitry.

DESIGN METHOD AND ARCHITECTURE FOR POWER GATE SWITCH PLACEMENT - A design method places power gates or switch cells using unoccupied locations of logic cell rows. Two types of such switch cells, filler switches and sealer switches, may be provided using the unoccupied locations. In one embodiment, virtual ground voltage references to the logic cells are routed to their associated switch cells. Because conventional standard cell design and placement techniques achieve only a placement density or utilization between 70-80% (i.e., unoccupied space constitutes between 20 to 30% of the available space in each row of logic cells), by placing the power gate cells in the unoccupied space, the method does not increase the silicon real estate requirement even though the power gate cells are introduced into the design. Optimization techniques may be applied to achieve proper sizing and distribution of power gate cells, so as to avoid a performance penalty due to the power gate cells. In one embodiment, fine-grained power gating is achieved by selectively providing non-power-gated logic cells among power-gated logic cells.

2009-07-09

20090174435

Monolithically-Integrated Graphene-Nano-Ribbon (GNR) Devices, Interconnects and Circuits - The invention discloses new and advantageous uses for carbon/graphene nanoribbons (GNRs), which includes, but is not limited to, electronic components for integrated circuits such as NOT gates, OR gates, AND gates, nano-capacitors, and other transistors. More specifically, the manipulation of the shapes, sizes, patterns, and edges, including doping profiles, of GNRs to optimize their use in various electronic devices is disclosed.

2009-07-09

20090174436

INPUT SIGNAL LEVEL DETECTION APPARATUS AND METHOD - A method and an input signal level detection apparatus that correctly detect a level of an input signal while consuming low power apparatus including: a full-wave rectifier outputting a full-wave rectified waveform by performing a full-wave rectification on a first signal corresponding to an input signal, and on a second signal having a phase difference of 180 degrees from the first signal; a common voltage detector detecting a common voltage of the first signal and the second signal; and a level detection unit detecting a level of the input signal, based on a subtraction result obtained by subtracting the common voltage from the full-wave rectified waveform.

2009-07-09

20090174437

Semiconductor Device and Method for Controlling Thereof - A semiconductor device includes a circuit section having an output impedance which changes in accordance with a switching signal for switching between drive capabilities, and transforming an input signal into an output signal in accordance with the output impedance, a reference voltage generating section generating a reference voltage in accordance with the switching signal and the input signal, and a comparing section comparing a voltage of the output signal to the reference voltage.

2009-07-09

20090174438

Data Trigger Reset Device and Related Method - A data trigger reset device for an electronic device is provided in order to avoid system errors due to out-of-sequence reset on electronic devices of an electronic system. The data trigger reset device includes a voltage converter and a voltage comparator. The voltage converter receives an input signal and then converts the input signal to generate a data voltage signal. The voltage comparator is coupled to the voltage converter and is used for comparing the data voltage signal with a reference voltage to generate a reset signal for resetting the electronic device.

2009-07-09

20090174439

MULTIFUNCTIONAL OUTPUT DRIVERS AND MULTIFUNCTIONAL TRANSMITTERS USING THE SAME - A multifunctional output driver capable of transmitting signals of different interfaces in different modes is provided, in which first and second current sources are provided, and first to fourth switching devices are coupled between the first and second current sources, and the first and second current source and the first to the fourth switching devices act as a current steering circuit. In a first transmission mode, the first and second switching devices are turned off, and the third and fourth switching devices and the first current source act as a current mode logic circuit to provide an output signal compatible with a first transmission interface according to an input signal from a pre-driver. In a second transmission mode, the current steering circuit outputs an output signal compatible with a second transmission interface according to the input signal from the pre-driver.

2009-07-09

20090174440

FREQUENCY-HOPPING PULSE-WIDTH MODULATOR FOR SWITCHING REGULATORS - A frequency-hopping pulse-width modulator is disclosed, which facilitates a switching regulator to use smaller-size inductive and capacitive elements, to have an improved power efficiency at light load, as well as predictable spectrum at different load levels. The improved modulator automatically determines the switching frequency of a switching regulator according to the load current delivered by the switching regulator from a number of pre-defined frequencies, which are all multiples of a fundamental frequency. By designing the maximum switching frequency of frequency-hopping pulse-width modulator in the MHz range, a switching regulator is able to use smaller-size inductive and capacitive elements. Light-load efficiency of the switching regulator with the frequency-hopping pulse-width modulator is also greatly improved as switching frequency of such switching regulator is reduced with decreased load current. More importantly, spectrum of a switching regulator with the frequency-hopping pulse-width modulator is as predictable as spectrum of a switching regulator with a conventional pulse-width modulator operated at the fundamental frequency.

2009-07-09

20090174441

Peak Power Reduction Methods in Distributed Charge Pump Systems - A distributed charge pump system uses a delay element and frequency dividers to generate out of phase pump clock signals that drive different charge pumps, to offset peak current clock edges for each charge pump and thereby reduce overall peak power. Clock signal division and phase offset may be extended to multiple levels for further smoothing of the pump clock signal transitions. A dual frequency divider may be used which receives the clock signal and its complement, and generates two divided signals that are 90° out of phase. In an illustrative embodiment the clock generator comprises a variable-frequency clock source, and a voltage regulator senses an output voltage of the charge pumps, generates a reference voltage based on a currently selected frequency of the variable-frequency clock source, and temporarily disables the charge pumps (by turning off local pump clocks) when the output voltage is greater than the reference voltage.

2009-07-09

20090174442

Ramp generator and image sensor including the same - A ramp signal generator is provided. The ramp signal generator may include a ramp signal generation unit configured to generate a ramp signal based on an externally-supplied driving voltage and a ramp signal correction unit configured to feed back and compare the ramp signal with a reference signal and correct a driving voltage by generating a corrected voltage from a comparison value. The ramp signal generation unit may generate a corrected ramp signal where the slope changes based on a corrected driving voltage.

2009-07-09

20090174443

Hard reset and manual reset circuit assembly - A simple inexpensive hard reset and manual reset circuit assembly that provides a delay time during reset for enabling other matched electronic devices to have sufficient time to reach ready status. The circuit assembly includes a power source, a first resistor, a first electric control switch, which has a control end and two bypasses being respectively connected to a reset terminal and a grounding terminal, a second resistor, a second electric control switch, which has a control end and two bypasses being respectively connected to the control end of the first electric control switch and the grounding terminal, a third resistor, a first capacitor, a second capacitor, a manual switch, which has two opposite ends respectively connected to the second capacitor and the grounding terminal, and a fourth resistor, which has two opposite ends respectively connected to the power source and the second end of the second capacitor.

2009-07-09

20090174444

Power-on-reset circuit having zero static power consumption - A power-on-reset (POR) circuit having a zero or substantially zero current state while the supply voltage is in a predetermined, valid range is disclosed. The POR circuit includes a state machine, an oscillator, and output circuitry that are electrically coupled to one another and to a supply voltage. Output from the output circuitry is also provided to the integrated circuit to which the POR circuit is coupled. The state machine includes a plurality of sequential circuits such as latches, flip-flops, and the like that are electrically coupled in a cascade, to provide a ripple counter. The output circuitry is structured and arranged to reset or initialize all of the logic elements on the chip by generating a POR output logic HI (1) signal by Boolean operation of the logic circuitry signal of the state machine for all Boolean states except one. The oscillator is disabled when the POR output logic signal is LO (0), which causes the POR circuit to enter a zero or substantially zero current state.

2009-07-09

20090174445

Semiconductor devices, methods of operating semiconductor devices, and systems having the same - A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing the data output from the memory core and outputting serialized data to the controller via the data port. The first selection signal is generated by the controller based on at least one of the voltage signal and the data output to the controller via the data port.

2009-07-09

20090174446

SYSTEMS AND METHODS FOR CALIBRATING THE LOOP BANDWIDTH OF A PHASE-LOCKED LOOP (PLL) - A method for calibrating the loop bandwidth of a phase-locked loop (PLL) is described. At least one resistor in the PLL filter is tuned in accordance with the frequency of an input reference signal. One or more capacitors in the PLL filter are tuned in accordance with the frequency of the input reference signal. Output pulses of one or more voltage controlled oscillators (VCO) are counted. A first charge pump current associated with a target loop bandwidth is counted in accordance with the counted output pulses. A Programmable charge pump current is tuned to the calculated first charge pump current.

2009-07-09

20090174447

SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF CONTROLLING THE SAME - A semiconductor integrated circuit is disclosed. The disclosed semiconductor integrated circuit of the present invention includes a DLL (Delay Locked Loop) controller that controls whether to activate a DLL at the entry of a power down mode, in response to a result of detecting whether a range of phase change of an external clock signal is within a predetermined range, and a DLL block that provides a result of comparing a reference clock signal with a feedback clock signal to the DLL controller and also provides a delay locked clock signal that is periodically updated, in response to the reference clock signal, under the control of an activated output signal from the DLL controller.

2009-07-09

20090174448

DIFFERENTIAL COMMUNICATION LINK WITH SKEW COMPENSATION CIRCUIT - A system and method is presented for reducing skew between the positive and negative components of a differential signal in a high speed communications link. The communications link includes a signal generator producing and transmitting complementary positive and negative signals over separate transmission lines and a receiver receiving the complementary signals. The communication link further includes a skew compensation circuit having a skew detector, a controller, and separate delay and buffer elements for both the positive and negative component of the differential signal. The controller separately controls each of the delay or buffer elements in response to the detected skew between differential signal components.

2009-07-09

20090174449

DRIVING CIRCUIT SLEW RATE COMPENSATION METHOD - An apparatus for compensating slew rate of a driving circuit includes: a first circuit, for receiving an edge transition from the driving circuit and generating a first pulse proportional to an actual slope of the edge transition; a second circuit, for receiving an ideal edge transition of the driving circuit and generating a second pulse proportional to an ideal slope of the ideal edge transition; a comparison circuit, coupled to the first circuit and the second circuit, for comparing an extreme value of amplitude of the first pulse with an extreme value of amplitude of the second pulse to produce a comparison signal; and a control circuit, coupled to the comparison circuit, for increasing or decreasing the slew rate of the driving circuit according to the comparison signal.

2009-07-09

20090174450

Programmable high-speed cable with boost device - An HDMI cable carries high speed encoded data which are transmitted differentially over data channels, along with a clock. High-frequency loss and differential skew within a differential signal may be compensated by analog circuits embedded in the cable. These embedded circuits are tuned at production for best performance by observing the quality of the recovered analog signal. The embedded circuits are powered by a combination of power sources, both carried within the cable, and harvested from the high-speed signals themselves.

2009-07-09

20090174451

Method of stitching scan flipflops together to form a scan chain with a reduced wire length - The scan flipflops on a semiconductor chip are stitched together to form one or more scan chains, located in one or more standard cell placement regions, after the optimal physical location of each scan flip-flop has been determined. As a result, the total length of the scan chain wires is substantially reduced, thereby reducing on-chip wiring congestion, flip-flop load capacitance, and flipflop power dissipation.

2009-07-09

20090174452

DEVICE AND METHOD FOR HANDLING METASTABLE SIGNALS - A method and device for managing metastable signals. The device includes: a first latch and a second latch, a multiple switching point circuit, connected between an output node of the first latch and an input node of the second latch, wherein the multiple switching point circuit includes at least one pull up transistor and at least one pull down transistor that are selectively activated in response to a feedback signal provided from the second latch and in response to a an output signal of the first latch such as to define at least a low switching point that is lower than a high switching point of the multiple-switching point circuit; wherein a switching point of an inverter within the first latch is between the high and low switching points.

2009-07-09

20090174453

System and Method of Conditional Control of Latch Circuit Devices - A circuit device includes a first input to receive a reset control signal and a second input coupled to an output of a latch. The circuit device also includes a logic circuit adapted to conditionally reset the latch based on a state of the output in response to receiving the reset control signal.

2009-07-09

20090174454

CLOCK CIRCUIT FOR A MICROPROCESSOR - A wireless communication device is described having a transmitter that generates electromagnetic interference when operating in a transmit mode. The wireless communication device comprises a clock circuit including a first clock element configured to generate a first clock output, and a second clock element configured to generate a second clock output. Also included is a controller configured to switch between the first clock output and the second clock output when the transmitter is operating in the transmit mode.

2009-07-09

20090174455

EXPLICIT SKEW INTERFACE FOR MITIGATING CROSSTALK AND SIMULTANEOUS SWITCHING NOISE - Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock signals delayed from the clock signal such that one or more of the clock signals have a delay different from the delays of the other clock signals. The receiver circuit further includes a plurality of data input latches configured to receive a plurality of data elements over two or more different points in time. This configuration at least partially reduces crosstalk and simultaneous switching output noise.

2009-07-09

20090174456

DC Offset Correcting Device And DC Offset Correcting Method - A signal generator generates a test signal including a positive signal and a negative signal which have the same amplitude. The signal generator corrects a DC level of the test signal based on a DC offset correcting signal supplied thereto, and supplies the corrected test signal to a frequency converter. An amplitude detector detects the amplitudes of the positive and negative signals of the test signal processed by the frequency converter. A level compressor converts in level the amplitudes of the positive and negative signals which are detected by the amplitude detector, with a gain variable depending on an input level thereto. A comparator compares the amplitudes of the positive and negative signals which are converted in level by the level compressor, with each other. An offset adjuster supplies the DC offset correcting signal depending on a compared result from the comparator to the signal generator.

2009-07-09

20090174457

IMPLEMENTING LOW POWER LEVEL SHIFTER FOR HIGH PERFORMANCE INTEGRATED CIRCUITS - A low power level shifter circuit for high performance integrated circuits includes an input inverter operating in a domain of a first voltage supply and receiving an input signal and a design structure on which the subject circuit resides is provided. An output stage operating in a domain of a higher second voltage supply includes a first output inverter connected to the input inverter and a second output inverter connected in series with the first output inverter. The second output inverter provides a level shifted output signal having a voltage level corresponding to the second voltage supply. A series connected finisher transistor and finisher control transistor are connected between the second voltage supply and an input to the first output inverter. The finisher control transistor is activated responsive to the input signal. A path control transistor controls a path between the first voltage supply and the input inverter. The path control transistor being activated responsive to the level shifted output signal.