Active area display blanking; includes both horizontal and vertical blanking.

8

+12V

Regulated +12 volts DC; can drive 300mA.

9

PRAS*

RAM row-address strobe from TMG pin 19.

10

GR

Graphics mode enable from IOU pin 2.

11

SEROUT*

Serialized character generator output from pin 1 of the 74LS166 shift register.

12

NTSC

Composite NTSC video signal from VID hybrid chip.

13

GND

Ground reference and supply.

14

VIDD7

From 74LS374 video latch; causes half-dot shift high.

15

CREF

Color reference signal from TMG pin 3; 3.58 MHz.

Note:
The signals at the DB-15 on the Apple IIc are not the same as
those at the DB-15 end of the Apple III, Apple IIGS, and Macintosh II.
Do not attempt to plug a cable intended for one into the other.

Note:
Several of these signals, such as the 14 MHz, must be buffered
within about 4 inches of the back panel connector--preferably inside a
container directly connected to the back panel.