Cyclone V GX FPGAs: Transceiver Overview

Not all low-cost transceivers are created equally. Altera's Cyclone® V FPGA family has a flexibility that helps you fully utilize all available transceiver resources and keep designs in a smaller and lower cost device. The Cyclone V FPGAs provide the most flexibility in implementing independent protocols, implementing proprietary protocols with hardened building block, all at the lowest power possible.

By providing the market's lowest cost, lowest power FPGAs, Altera's Cyclone V FPGA family extends the Cyclone FPGA series. Altera's transceiver leadership is re-affirmed with actual shipment of working transceiver I/O within an FPGA design. Watch the video below to see Cyclone V FPGAs in action.

Cyclone V FPGA Video: Transceiver I/O Operation

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The Cyclone V FPGA series offers two variants to meet your design needs, the Cyclone V GX FPGAs with transceivers up to 3.125 G and Cyclone V GT FPGAs with transceivers up to 6.144 G.

Key Transceiver Features

Up to twelve transceivers supporting data rates from 600 Mbps to 3.125 Gbps or 6.144 Gbps

Figure 1 shows the block diagram of the Cyclone V FPGA transceivers, both physical medium attachment (PMA) and physical coding sublayer (PCS). The blocks within the PCS can be bypassed, depending on your requirements.