Hello, we are developing our new product based on FX3 SuperSpeed controller. We will use Sync ADMUX boot option to download firmware from our master microcontroller to FX3. Referring to "AN76405 FX3 Boot Options" document I have some problems understanding the sequence for firmware download. I referred to firmware download example in this document. There are some functions (IORD_REG16(), IOWR_REG16(), IORD_SCK16() and IOWR_SCK16()) that I need some explanation what that functions do. I assume that IORD_REG16() and IOWR_REG16() reads or writes data at specified address like shown in "AN73304-ADMuxBoot" document at "Sync ADMUX Read Cycle Timing". Is that correct? If no, how do I have to set this functions to do the right job? And what does IORD_SCK16() and IOWR_SCK16() functions have to do? Thank you for your answers, Rok

I already studied the description at the bottom of page 24 but it confuses me so that is why I am asking for help.

So please confirm me if I am right: IORD_REG16() and IOWR_REG16() functions read from and write to specified register a 16 bit word in a sequence that is shown at page 6 in document "AN73304-ADMuxBoot".

But what does IORD_SCK16() and IOWR_SCK16() functions do? Does they write and read in same sequence like IORD_REG16() and IOWR_REG16()? But from what address?

The IOxx_REG16 functions do operations on registers. And the IOxx_SCK16 functions do operations on sockets. For example, in the sck_bootloader_write function given in the app note, you can see that after a bunch of register reads and writes, the data passed to the function (in the pointer "p") is written to FX3 using IOWR_SCK16(). For IOxx_REG16, the address bus (A[6:0]) will be the register's offset as given in Section 10.2 of the Programmer's Manual. And A[7] will be '1'. For IOxx_SCK16, A[6:0] will be the socket's address and A[7] == 0. See the app note or Chapter 10 of the Programmer's Manual for more details. Also look at datasheet.html in [SDK_INSTALL_PATH]\library\sync_admux.cydsn\documentation.

First, I have a question about PMODE pins. PMODE pins should be F00, so if I set jumpers J96(2-3), J97(2-3) and J98(open), is this correct for Sync ADMUX boot? All four SW25 switches are all ON.

My second question is about start sequence. I reffered to AN73305-ADMuxBoot where it says that at startup I you should keep polling PP_IDENTIFY register. Which register is this? I cannot find this register in FX3 Programmers Manual. Also there is no PP_IDENTIFY register in example firmware download code so what should I do about it?

I have read PP_IDENTIFY / RD_MAILBOX registers, 0x81 and 0x42575943 is been reading back. NOW, read / write register success. but read / write socket have problem .When writing the command('C' 'Y' 0X02 0X01) one time or two times , the PP_SOCK_STAT_L register always is 1.I should wirting the command('C' 'Y' 0X02 0X01) three times , the PP_SOCK_STAT_L register is 5 .When reading the response through the socket 2 one time , the result is 0x0. When reading the response through the socket 2 twice , the result is 'W' 'B', 0x01 0x02 . As far as i know , the right response is ‘W' 'B' 0x* 0x0.