Comments

Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
and create a configurable property for each defaulting to 96 and 64
(respectively) so that device modelers can set the value appropriately
for their SoC. Other ARM processors also set their maximum number of
used IRQs appropriately.
Set the maximum theoretically number of GIC interrupts to 1020 and
update the save/restore code to only use the appropriate number for
each SoC.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
---
Changes from v5
Clarify the commit message
Rename GIC_NIRQ to GIC_MAXIRQ and change usage slightly
Makes num-irq to uint32_t in all cases
Clarify the error message
Clarify documentation on the num-irq qdev property use in all files
Changes from v4
None
Changes from v3
Increase maximum number of GIC interrupts to 1020
Remove SoC/implementation specific GIC_NIRQ #defs
Added properties code to arm11mp
Changed error handling for too many interrupts
Redid save/load handling
Changes from v2
Skipped
Changes from v1
Increase the number of a9mp interrupts to 192
Add a property defaulting to 96
Add a num_irq member in the gic state structure
Use the num_irq value as appropriate
Add num_irq argument to gic_init()
Add num_irq to various CPU calls to gic_init
hw/a9mpcore.c | 13 +++++++--
hw/arm11mpcore.c | 17 ++++++++----
hw/arm_gic.c | 68 +++++++++++++++++++++++++++++-----------------------
hw/armv7m_nvic.c | 30 ++++++++++++++++++-----
hw/realview_gic.c | 7 ++++-
5 files changed, 87 insertions(+), 48 deletions(-)