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So, the voltage isn't the whole story. Just to clarify, RAM is volatile storage, which means it needs a "constant" stream of power to keep the data, unlike SSDs (non-volatile) which obviously keep all their data even after you turn the system off.

A 20% voltage difference, but (because of many other things not related to voltage, i.e. modulating the refreshes) a 30% decrease in active power and a 90% decrease in standby power.

DDR4 uses about 330mW when active, but even ancient LPDDR2 uses just 200mW when active (page 11). LPDDR3 uses about 50% more than LPDDR2, though when active (page 10). So that would put LPDDR3 at about the same active power consumption as DDR4, but I believe LPDDRx still holds a sizeable advantage in standby power consumption.

Micron states the advantage of LPDDR3 over DDR4 very directly in this PDF:

DDR4 is "suitable for Windows 8 Connected Standby" (the same rating they give to power-hungry DDR3L; additional source with mW on pg 10).

LPDDR3 is "ideal for Windows 8 Connected Standby"

Windows' Connected Standby is a low-power connected state that requires certain low-power states that only certain hardware can achieve; RAM is just one part (it also deals with WiFi chipsets and other stuff that I can't remember right now, haha).

The difference between LPDDR3 and DDR3L isn't just in measured power consumption. Micron's testing shows that DDR3L will give ~11 days of standby, while LPDDR3 yields ~55 freaking days of standby. That's a 5x increase in standby!

This image is about as close as I got to a direct comparison using Samsung's materials. In summary, DDR4 may actually be more power efficient than LPDDR3 under load, but is handily beaten in standby power draw.

In the depths of Google I found a paper comparing coding schemes to optimize IO energy through DRAM. The useful part of this paper is that its analysis employs both LPDDR3 and DDR4. If you look to this chart, you can see normalized proportional power draw between DDR4 and LPDDR3. You can very clearly see that background power draw of DDR4 makes up ~50% of total RAM power usage, while the LPDDR3 background power draw is only ~17%.

The paper specifically notes that

DDR4 background energy is a big contributor to the overall DDR4 energy due to the lack of fast power down mode.

I suspect that Apple didn't even really consider DDR4 over LPDDR due to size concerns. Strapping two DIMMs onto the logic board would necessitate either a fatter chassis or compromise in other componentry to make room on an already packed board

LPDDR3 and DDR4 use about the same energy under load, however LPDDR RAM can ramp down into a low power state faster and consume far less energy while there

I watched it to the end with dissapointment that they didn't even Consider the differences between LPDDR v DDR, voltage is not everything and yes they were not aware of the memory Controller limitations.
Their difference of 5% does not even Cover the real World only 70% of DDR3 Power usage and 10% of standby usage when compared to DDR3.
The conclusion regarding planned obsolecence is also not really to my taste.
Apples answer regarding Power usage was maybe to highlevel for most techies, but this is almost always the case when a Company makes an public Statement :)

I think the issue here is that Intel's 15w chips only support 2 ram dimms. With DDR4 capable of 16gb/dimm, that means 32gb max, which you can see on Intel's ARK page. However, DDR3/LPDDR3 is limited to 8gb/dimm max (at least for non ECC RAM). I think this is the reason some was forced to have 16gb max. Not sure what held them back with the 45w quad core 15" models though.

they lose charge over time when not powered up and if they are without power long enough, they can lose data.

The data stored in flash memory cells will degrade whether or not the drive has power. Unlike SRAM, there's no always-on feedback mechanism to preserve the data while the flash has power. Some SSDs that use flash known to have poor data retention will periodically scan for data degradation and refresh the data as needed, but this needs to be programmed into the SSD controller firmware; it's not inherent to the flash chips. Any such background refreshing will use up some of the SSDs write endurance, the same as if the data had been modified.

Ask over at /r/ece - this is the kind of thing where you need a data sheet or actual reported numbers. That's the easy part though the more important part is finding someone who knows how much a laptop would typically spend in each power state etc.

With DIMMs that big you need buffered RAM (aka not mobile BGA form-factor) and a motherboard with a beefier memory controller and power delivery, so it's still totally out of the question in a MBP. Shit, there are only a couple manufacturers that even make 16GB unbuffered DIMMs let alone 64

It wouldn't work. Since there's no SPD chip on soldered down memory, the memory controller/phy relies on a predetermined set of registers for its address map, timing parameters, etc. The firmware would still assume that the 16Gb modules are there.

There are lots of different ways to do it, so I'm not sure the method that apple uses. They could blow e-fuses on the board during production tests, or they could check the logic board's seeprom for a unique code. Those are the simplest ways at least.

I actually researched this a while back for a discussion on here (but I no longer have the sauce). The main difference in power usage comes from the lower power state lpddr3 is able to enter that ddr4 cannot. When in that low power state lpddr3 uses about 5% of the power that ddr4 uses. Otherwise they are basically identical in power usage.