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Abstract

A fabrication procedure is described for providing iridium silicide P channel gate electrodes in complementary metal-oxide semiconductor (CMOS) field-effect transistors. This process may be used for bulk CMOS and for CMOS devices in the silicon-on-sapphire (SOS) technology.

Country

United States

Language

English (United States)

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CMOS Field Effect Transistors with P Channel Devices using Silicides

A fabrication procedure is described for providing iridium silicide P channel
gate electrodes in complementary metal-oxide semiconductor (CMOS) field-
effect transistors. This process may be used for bulk CMOS and for CMOS
devices in the silicon-on-sapphire (SOS) technology.

2. Using a first mask and photoresist, delineate islands for P and N channel
areas by photolithography and etch islands part way through, as indicated in Fig. 1.

3. Oxidize the unetched portion of the isolation area completely to achieve
oxide isolation of the adjacent device islands, identified as N channel and P
channel islands in Fig. 2

4. Etch off the masking dielectric material over the device islands and
regrow a gate insulator of silicon dioxide and silicon nitride.

5. Using a second mask and photoresist, cover the gate area of the N
channel island and all of the surface over the P channel island. Ion implant
arsenic or phosphorous to form N channel sourcedrain N+ regions, as indicated
in Fig. 2, and then remove the photoresist.

6. Using a third mask and photoresist, cover the gate area of the P channel
island and all of the surface of the N channel island. Ion implant boron to form
P/+/ channel source-drain Pregions, as indicated in Fig. 3, and then remove the
photoresist.

7. Drive in both P/+/ and N/+/ implants.

8. Using a lift-off mask as a fourth mask for metallization for the P channel
gate electrode, co-deposit by dual electron-beam evaporation, either iridium
monosilicide (IrSi), or iridium trisilicide (IrSi(3) as indicated in Fig. 4. The
selection of the particular silicide depends to some extent upon the subsequent
thermal processing used, with the trisilicide providing higher temperature stability,
up to above 1000 degrees C. An additional intermediate silicide (Ir(4)Si(7)) may
also be us if desired. The...