DDR3 configuration in u-boot

JEDEC speed bin

Sunxi devices typically use DRAM clock speeds not exceeding 533MHz, which means that the JEDEC DDR3-1066F speed bin is the most common set of timings that they are expected to be targeting for. The DDR3-1333 and DDR3-1600 chips, which are rated for higher clock speeds, may or may not support down binning to DDR3-1066F (this information has to be checked in the datasheets). That's because the DDR3-1066F compatible chips need to support 13.125 ns timings for tRP/tRCD, while the DDR3-1333H chips are only required to support 13.5 ns. So the DDR3-1066F speed bin has a bit tighter timings than DDR3-1333H. This difference between 13.125 ns and 13.5 ns is relatively important, because when the delays are converted from nanoseconds to cycles and rounded up, it is a matter of having 7 cycles delay instead of 8!

It is quite common to have DDR3-1333H or DDR3-1600K chips, which support DDR3-1066F timings too. This may look like an explicit note "backward compatible to 1066 CL-7" in the datasheets of such chips. Or the tRP/tRCD timing information may be sometimes specified as "13.5 (13.125) ns" in the table.

The u-boot *_defconfig file for an Allwinner A10/A13/A20 device may use the following configuration option to indicate that the DRAM chip is in fact compatible with DDR3-1066F timings (and with DDR3-1333H for the DRAM clock speeds >533MHz):

+S:CONFIG_DRAM_TIMINGS_DDR3_1066F_1333H=y

In the unlikely case if the DDR3-1066F speed bin is not supported by the DRAM chip, a slower DDR3-1066G speed bin has to be assumed.