^The Athlon XP uses a double data rate (DDR) front side bus meaning that the actual data transfer rate of the bus is twice its physical clock rate. The FSB's true data rate, 200, 266, 333 or 400 MT/s, is used in the tables and the corresponding physical clock rates are 100, 133, 166 or 200 MHz, respectively. The multipliers in the tables above apply to the physical clock rate, not the true data transfer rate.

^For traditional processors, including all K7 processors, the multiplier is the value multiplied to the frequency of the FSB to get the clock rate of the processor. K8 processors, including the Socket 754 Athlon XP-M, have a memory controller integrated on the CPU die, replacing the traditional concept of FSB. The memory controller runs at the same frequency as the CPU itself, and is able to run the system memory at 200 MHz (using PC-3200 memory sticks) or at lower frequencies (when using slower PC-1600, PC-2100 or PC-2700 RAM). Between CPU and chipset, HyperTransport is used, running at 800 MHz on Socket 754. The multipliers here apply to the 200 MHz system clock frequency, not the HyperTransport frequency.