NEW for Dec. 2009:
Class E design notes!!!!!! Easy formulas to get you started are foundhere...

New
for May 2010:
Some detailed notes on the
derivation of the formulas for Class-E design.

Related
to the HF
Tesla coil work, the Class-E RF power amplifier seeks to maximise
the efficiency of the amplifier by optimising the times when the
amplifier switching element turns on or off. By using a low-Q
resonant network in the drain circuit, we can take advantage of
“ringing” by switching the transistor when the drain-source
voltage is at a minimum.

This
project starts with a modified form of the circuit given in J. F.
Davis and D. B. Rutledge, “A low-cost class-E power amplifier with
sine-wave drive,” IEEE MTT-S Int. Microwave Symp. Dig., vol.
2, pp. 1113-1116, Jun. 1998. This paper is a good starting point for
learning about this amplifier type.

The
schematic of my modified version is designed for use at 4.5MHz. Some
of the modifications are to reduce high-frequency ringing that takes
place near the switching transients. I have also used my favourite
MOSFET: the 2SK2698. Some aspects of the input and output matching
are different, given the different transistor impedances. All in all,
though, the drain impedance of about 13 ohms reported in Rutledge's
paper was nearly spot-on, given the drain current/voltage selected
for this example.

This
circuit is modified slightly with the addition of the series
resistor-capacitor branch on the left. This helps in reducing VHF
ringing in the gate circuit. I have also included a reverse diode to
ground in the drain circuit to help the internal avalanche diode to
reduce undershoot.

The
resonant matching network serves the triple purpose of “smoothing”
the ragged drain voltage waveform, optimising the impedance match
between the load and the transistor drain as well as reducing
second-harmonic distortion. Let's look at some SPICE simulations

SPICE
simulations of Class-E amplifier

Given
a 4.5 MHz signal at the input, we can ''measure'' the voltage at test
point TP1:

The
smooth sinusoid is the generator waveform. Notice how the gate
voltage waveform is rather bumpy and asymmetrical. This type of
behaviour seems to be usual and has been reported by Davis and
Rutledge (ibid). There are significant high frequency components that
appear.

The
voltage measured on the drain at TP2, as well as the current through
the drain of the MOSFET are

Notice
the high negative current spike that appears at transistor turn-on.
It is not immediately clear why so much current should flow here but
it could be a consequence of the 450pF capacitor discharging residual
voltage at the beginning of the turn-on cycle. Most important, we
notice that the drain voltage is a small fraction of its peak value
when the transistor is switched on or off. This is why the transistor
dissipation is so small compared to the total power. Here is where we
get the efficiency!

After
the resonant matching network, we get a fairly clean sine wave
output.

This
can be seen from the output spectrum.

The
second harmonic is well suppressed. The third, however, sits at a
level a bit less than -30dBc. Could be improved with a low-pass
filter stage in the output matching network. We can taks a wider view
of the spectrum to look for VHF ringing.

There
are a large number of harmonics visible. However, they are all below
-40dBc (with the exception of the third harmonic). This is good given
the “brutal” look of the drain voltage.

Efficiency
as a function of frequency

We
will use the so-called power-added-efficiency, which takes into
account the DC (drain) efficiency as well as the RF input to the
amplifier:

PAE
= PRFout / (Pdc+ PRFin)

By
keeping everything the same and shifting the frequency up and down by
5% yields

Frequency
(MHz)

Power
output (watts)

Transistor
dissipation (W)

Efficiency
%

4.28

269

59.5

82

4.5

309

20.3

94

4.73

199

8.18

96

Below
the ideal frequency, the drain loading begins to look capacitive. The
drain voltage lags a bit and causes a bit more overlap with the drain
current (and hence, transistor dissipation). Slightly raising the
frequency above the design frequency reduces the output power, but
the dissipation in the switching element is not adversely effected.
In fact, the simulation indicates that the dissipation will decrease.
However, the overall efficiency is about the same as for 4.5MHz.

Construction
and testing

The
circuit for the first generation practical prototype is somewhat
different than that shown at the beginning of this page.

This
circuit uses the IXYS IXDD414 MOSFET driver as a “driver amplifier”
for the MOSFET. A low-level (i.e. 5-V 100mA) input is all that is
needed to generate full power on the output. The resistor in the gate
circuit is to reduce the possibility of VHF oscillation during
switching.

Using
the toner
transfer method, a printed circuit board is easily constructed
using the mirror-image plot of the full-size etching pattern.