finsim bug? 1

Finsim is a verilog compiler. Evidently it special cases registers
that are 32 bits or bigger. This isn't noticeable until you try
something wonky like a negative repeat. This isn't really a bug, it's
undefined verilog behavior. Rats.

I don't have access to IEEE.1364 (verilog standard), so I can't say for
sure what it's supposed to do. In all fairness, it's probably undefined
behavior, in which case this isn't entirely a bug, but I would argue that
the behavior should be consistent.