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Solution

The ML605 boards shipped with 1 GB DIMMs require application of the following solution. This allows the 1 GB DIMMs to work as the 512 MB DIMM. All previous and future designs will work across boards built with 512 MB and 1 GB DIMMs.

The solution needed is to tie the Row Address 13 pin to a logic high on designs using MPMC or MIG.

The 512 MB DIMMs are MT4JSF6464HY-1G1B1The 1 GB DIMMs on the newer ML605 boards are MT4JSF12864HZ-1G4D1

Note: The Row Address 13 pin is not connected to the memory devices on the 512 MB DIMMs, so it has no effect on boards shipped with 512 MB DIMMs.When the Row Address 13 pin is driven high on the 1 GB DIMMs, it makes half of the memory available, that is, the resulting memory is half the original size.

The next procedure describes how to modify any existing and/or future EDK designs so that they can operate with 1 GB DIMMs. The concept is the same for any MIG based design.

DIMM0

1. Add the following to the port section of the MHS file:PORT fpga_0_DDR2_SDRAM_DIMM0_DDR2_RowAddr_pin_13 = fpga_0_DDR2_SDRAM_DIMM0_DDR2_RowAddr_pin_13, DIR = O

Note: The solution above allows the designs for 512 MB DIMM to work for 1 GB DIMM, it makes half of the memory unavailable. To access full 1 GB memory, the Base Address of MPMC instance needs to be modified to 1 GB memory size.