Here is the abstract you requested from the dpc_2018 technical program page. This is the original abstract submitted by the author. Any changes to the technical content of the final manuscript published by IMAPS or the presentation that is given during the event is done by the author, not IMAPS.

At present 3d stacking of dice employs thermocompression flip chip bonding employing Sn capped micro - pillar bumps originally developed at Motorola ( Ref below ) for single Gallium Arsenide Power Amplifiers in Mobile phones and since then has spread to applications where fine pitch flip chip interconnects are needed e,g. for 2.5 d modules using fine pitch Si interposers.
It is now also being applied to build die stacks up to 8 dice high w/ no change in the micro pillar bump design or bonding profile. This causes a reduction in throughput.
Alternative bond profile and materials for TC Flip Chip assembly of 3d stacks was developed based on transient thermal modeling. Experimentally determined kinetics data for intermetallic formation were used to simulate and optimize the bonding process resulting in a significant reduction in cycle time.