The M25P128 is built using 2-bits-per-cell flash technology, which stores two bits of information in each memory cell to double the density compared to traditional production technologies. As a result, designers building products with the 128-Mbit serial flash device can save board space and reduce production costs, according to the company.

Using a high-speed serial interface in place of a parallel memory bus also reduces board space through the decreased number of signals in the 4-wire serial peripheral interface (SPI). Die size also shrinks, allowing smaller packages to be used compared to standard flash products. In addition the system’s CPU or ASIC can also have a lower pin count.

The M25P128 is available in the 8-mm x6-mm MLP8 package, as well as in S016; both use ST’s ECOPACK Pb-free technology for RoHS-compliance.

Operating over a supply voltage range of 2.7-V to 3.6-V, the M25P128 is specified for the -40° to +85°C operating-temperature range. Data retention is over 20 years, and the device guarantees more than 10,000 Erase/Program cycles per sector. Software features include both bulk erase and sector erase, flexible Page Program instructions, write protection, and a JEDEC standard 16-bit electronic signature to allow easy device identification.

Further information on the serial flash range, including VHDL and Verilog
models, is available at www.st.com/serialflash. Programming support is widely available.

Samples of the M25P128 are available now, with volume production planned for the
first quarter of 2006. Pricing is approximately $4.20 in volume.