Having clarified the basic biasing conditions, let us focus on stability and AC performance. The stability of the global feedback loop does not need any special attention (in this article, not as general design practice!), as AC open-loop gain is defined the same way as for prior art two-stage topologies - namely by the input stage transconductance and the Miller compensation capacitor C3 [1, 2, 3]. However the stability of the local Miller compensation loop should be considered, as additional transistors (the folded cascodes in the second stage, Q14 and Q15 in figure 6) are now included within this loop. These necessarily contribute some delay and phase shift, which could impact stability margins.

I have stated above that folded cascodes reduce stability margins by a small amount only; this applies solely to the global feedback loop (and hence to the folded cascodes of the input stage), which, for audio power amplifiers, typically has a unity loop gain frequency in the order of 1 MHz or less. However the bandwidth of the local Miller loop of the second stage can extend into the 100 MHz region, and here the effects of an additional common-base stage are not negligible.

The additional delay and phase shift typically manifests itself as gain peaking in the 10–100 MHz region. Generally associated with this is a peak in second stage output impedance, which interacts as an LC resonant network with the input capacitance of the output power buffer. As the latter can be substantially dependent on output voltage and output current, a potential instability mechanism may only be triggered under certain load and signal conditions.

To largely eliminate these effects I've found the use of feed-forward capacitors in the emitter followers of the second stage to be the most dependable and powerful technique [10, 11]. C4 and C5 implement these capacitors. They bypass Q8 and Q9 such that, at high frequencies, the local Miller loop consists of a cascaded common-emitter (Q10 or Q11) and common-base transistor (Q14 or Q15) only. Such a transistor arrangement has excellent stability margins within the local Miller compensation loop, and no significant gain peaking is observed. At low frequencies, where the impedance of the feed-forward capacitors is large, the emitter followers are fully in the signal path, and improve amplifier performance (in particular low frequency open-loop gain and distortion).

As suitable measurement equipment to quantify gain peaking above the 10 MHz region (i.e., a network analyzer) is not routinely found in audio engineering laboratories, the value of these feed-forward capacitors will in most cases be determined by simulation. The smallest value which still minimises gain peaking is usually the most suitable - typically around 100 pF. It should however be appreciated that,with the standard SPICE transistor models, characterisation of transistor behaviour near the cut-off frequency fT may be rather inaccurate. If experimental verification reveals a remaining instability mechanism in the Miller compensation loop, the choice of a larger feed-forward capacitor should be considered.

I have promised that the novel amplifier topology will bring absence of slew rate limitations in the transimpedance stage; this was, admittedly, a bit cheating at first. To support very high slew rates the output current of the second stage must be able to dynamically exceed the quiescent current by a substantial amount (at least as long as we apply a reasonable upper limit for quiescent current, for practical reasons). This however is not the case for the new push-pull transimpedance stage, because the output current of the folded cascodes is limited by their bias voltage sources and emitter resistors.

Fortunately there is an easy fix for this; with the use of capacitor C6 (in figure 6) greatly increased transient output currents are made possible. This capacitor acts as a high-frequency level shifter, such that the common-emitter transistor of one half of the transimpedance stage (e.g. Q11) can dynamically increase the collector current of the folded cascode in the other half (Q14). Thereby the operation mode of the transimpedance stage is changed to class AB. There is no primary limit for the value of this capacitor; however its presence means that high-frequency power supply ripple modulates the quiescent current of the folded cascodes. Hence its value should not be chosen larger than necessary. Usually 1 nF is perfectly adequate, and 10 nF should suffice to support even very high slew rates.

It must be appreciated that this slew rate enhancement capacitor cannot increase the second stage output current at low frequencies. It is still necessary to choose a sufficiently high quiescent current to drive the output power buffer. However, as typically the required drive currents increase towards high frequencies (due to the capacitive portion of the input impedance of the output power buffer), the slew rate enhancement capacitor will nonetheless reduce the need for high quiescent currents.

Above I suggested that the emitter resistors of the current mirror (R5 and R6 in figure 6) should have a large value to minimise the noise contribution of the current mirror. However at some point large emitter resistor values will introduce a detectable pole to the open-loop gain of the amplifier, and under some conditions also present a large-signal limitation.4 The capacitors connected in parallel with the emitter resistors (C1 and C2) avoid this, while preserving the improvement from the emitter resistors at audio frequencies. Typical values for these capacitors range from 1 pF to 1 nF.

4 The large-signal limitation follows from increased transient output currents in the current mirror,which occur during signals with fast rate of change.With such transient currents the current mirror output may be pushed into saturation, as the voltage across the emitter resistors of the current mirror momentarily increases.

Hi, sorry for my english.
About the power supply rejection, in this old Luxman:
http://www.eserviceinfo.com/download.php?fileid=48149
can be see the use of differents supplies for each stage of the power amp in a cheap and good way, the effect in the sound quality are very good.

I have always worked to get rid of all the power supply noise so that the high level of power supply noise rejection that was required was not so great. In addition, the tolerance of components needed to filter out power supply noise are far less critical than those needed for good amplifier PSRR design. Probably a combination of the two methods would be the best choice. Of course, optimizing for the minimum cost was never the highest priority for our group, nor for our customers. Somebody else can always make something cheaper and not quite as good.