On Mon, 13 Aug 2001, Ralf Baechle wrote:
> Looks fine at the first view. I'll apply it but duplicate it for mips64
> also.
Please wait for a while, until I resolve modutils interoperability as
pointed out by Keith.
> The whole mechanism has it's problems though. On the Origin certain
> accesses like an attempt to write to a non-existant serial interface
> take down the machine though. I don't have an explanation nor did Kanoj
> seem to.
The MIPS architecture defines the bus error exception event for data
reads and instruction fetches only. Writes are asynchronous so errors on
them cannot be reported exactly -- some MIPS documentation recommends
using a general-purpose interrupt line for such events.
Both bus error exceptions and error interrupts are system-specific and
might not work unless designed to. The Origin might be an example. Does
it crash for reads/fetches from the affected address space, either?
--
+ Maciej W. Rozycki, Technical University of Gdansk, Poland +
+--------------------------------------------------------------+
+ e-mail: macro@ds2.pg.gda.pl, PGP key available +