24 September 2007

Clock buffers consume more than 50 % of dynamic power. Hence it isgood design idea to turn off the clock when it is not needed.Automaticclock gating is supported by modern EDA tools. They identify thecircuits where clock gating can be inserted.

Specific clock gating cells are required in library to be utilized bythe synthesis tools. Availability of clock gating cells and automaticinsertion by the EDA tools makes it simpler method of low powertechnique. Advantage of this method is that clock gating does notrequire modifications to RTL description.