High-speed verification and hybrid prototyping solution for Verilog designs in an affordable, desktop form factor

Connect, Build & Go gets you up and running in less than a day

Build automation connects designs to the host and provides a C API for easy integration of SystemC/C/C++ models and test benches

Dynamic debugging enables iterations in minutes, instead of hours or days, by eliminating the requirement to re-instrument and re-synthesize

The folks at Bluespec, who bill themselves as "The Synthesizable Modeling Company," have just today announced Semu, a software solution that delivers emulation speeds at simulation prices: affordable, easy-to-use desktop emulation with low-cost Xilinx FPGA-based development cards.

Semu, which is pronounced "see-mu" (symbolizing the attributes of both simulation and emulation), speeds up long functional verification runs by up to 10,000X to quickly flush out tough corner cases on complex IP blocks and subsystems using application-driven data sets and pseudo-random testing. By easily integrating RTL IP into SystemC/C/C++ Virtual Platforms, Semu also enables cost-effective hybrid prototyping for high-speed, hardware-accurate pre-silicon software development.

Desktop emulation: a new categoryTraditional emulation, with its large capacities, serves the needs of verification and emulation teams doing full-system validation. Meanwhile, individual ASIC and FPGA developers, including architects, modelers, designers, and even verification engineers, have been limited primarily to simulation and – for the adventurous – home-grown FPGA-based solutions. For these users, Semu brings together the power of FPGAs and C to deliver Desktop Emulation, a high-speed verification and hybrid prototyping solution targeted to their capacity, budget and productivity needs.

Generates a host-based C API to easily connect models and test benches to the design-under-test (DUT) – interfaces can be at both signal and transactional (TLM) levels

Connects designs to the host, seamlessly including transactors and PCIe-based co-emulation link

Dynamic debug eliminates re-instrumentation & re-synthesis: debug iterations in minutes, not hours or daysSemu provides dynamic visibility and hardware breakpoint capability against 100% of the register state in a design at any time to give a debug experience that feels more like software than hardware. Dynamic debug eliminates the requirement to frequently re-instrument and re-synthesize, so debug iterations can be performed in minutes, not hours or days.

Product detailsSemu is a software package that runs on a Linux PC and provides an easy-to-use GUI for project configuration, build, run and debug. Semu includes ready-to-use Verification IP (VIP) templates that users can leverage to bring up designs quickly. Semu will initially support Verilog designs up to 2 Million gates when used with a Xilinx ML605 board. Support for additional Xilinx FPGA-based boards will soon provide higher capacities up to 14 Million gates.

Bluespec: Simplifying complexity, while delivering extreme flexibilitySemu integrates dynamic debug, design-specific transactors, high-performance co-emulation, and the power of FPGAs all within a simple GUI and C APIs for Verilog designers. Bluespec's synthesizable modeling is the key technology that enables bringing such complex, extremely flexible systems as Semu to market. Furthermore, it enables delivering the rich roadmap of transactors, verification IP, and next generation debug planned for Semu.

Pricing and availability Semu is available now at pricing that starts at $9,500 for a time-based license and maintenance.

For more details you can Bluespec's vice president of marketing, George Harper, directly -- George can be reached at (781) 250-2200 or via email at info@bluespec.com (tell him "Max says Hi!").

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