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Semiconductor Design

Breker Verification Systems solves challenges across the functional verification process for large, complex semiconductors. This includes streamlining UVM-based testbenches for IP verification, synchronizing software and hardware tests for large system-on-chips (SoCs), and simplifying test sets for hardware emulation and post-fabricated silicon. The Breker solutions are designed to layer into existing environments.

Silvaco was founded the same year I entered the EDA industry (1984) fresh from University. I first met them at the Design Automation Conference in Albuquerque, New Mexico, and have been an active observer of their growth ever since. In fact, Silvaco is now the largest privately held EDA company and is growing at a rapid pace. In 2014 Silvaco hired
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Successful projects leverage the investment in comprehensive methodology and resource planning, covering design and analysis flows – that planning effort is especially important for functional verification.

The emergence of complex SoC designs for advanced automotive applications has led to a major focus on verification planning, as reflected in the ISO26262 standard. This standard defines requirements for automotive product verification, specifically:
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Today I had the pleasure to speak with Tom Fitzpatrick, TPC Chair for the DVCon conference and exhibition slated for February 25-28 in the heart of Silicon Valley - San Jose. Tom lives in Massachusetts, a place where I used to live and work at Wang Labs, back in the day before the PC and WordPerfect software ended Wang's fortunes. We swapped stories about the first Personal Computers, and computer languages starting from BASIC all the way up to Python.

In an ANSYS seminar held at DesignCon 2019, Dr. Larry Williams, ANSYS Director of Technology, outlined how 5G design innovation can be accelerated through simulation. He posited that 5G will become a general-purpose technology that affects an entire economy, drastically alter societies and unleash a cascade of complementary innovations (*).

For starters, advanced simulation can help 5G in the analysis of advanced antennas, data processing,
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5G is in the news again. Sprint has mounted a legal challenge against ATT, claiming that ATT is misleading people into believing that they already are offering 5G. While ATT is about to start testing of 5G, they have also sent out updates that causes customer phones to
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IC physical design (PD) teams face several challenges while dealing with tapeout schedules. With shrinking process nodes and stringent PPA targets, the complexity of physical design flows and EDA design tools has increased multifold. In addition the amount of design data that needs to be managed has also increased exponentially. Managing the design data gains even more importance when the design
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I started out my engineering career by doing transistor-level circuit design and we used a proprietary SPICE circuit simulator. One thing that I quickly realized was that the accuracy of my circuit simulations depended entirely on the model files and parasitics. Here we are 40 years later and the accuracy of SPICE circuit simulations still depend on the model files and parasitics, but with the added task of using 3D field solvers to get accurate parasitic values, and even the use of 3D TCAD tools to model the complex physics of nm IC designs using FinFET transistors.

During the 1940s when aerospace engineers were attempting to break the sound barrier for the first time, they were confronting a slew of new technical issues that had never been dealt with before, and in some cases never seen before.
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