How does a monitor interacts to my ZC706/702 with onboard ADV7511?

My RTL generates a 1080P video. On ZC702, the monitor was able to receive the video with no hassle.

However on ZC706, the monitor is unable to receive the same video and goes to Sleep mode few seconds after I program the FPGA.

However after I manually connect my PC to the monitor via the m-DP, display windows, then switch video source back to HDMI, I can see the FPGA video. I am positive the hsync/vsync/de/video are carrying good data, resolution and timing.

I understand a bit of EDID. Does the ZC706 tell the monitor resolutions via iic/adv7511 or does the monitor detect resolution by the signal on the ADV7511?

Thanks and RegardsBalkrishan--------------------------------------------------------------------------------------------Please mark the post as an answer "Accept as solution" in case it helped resolve your query.Give kudos in case a post in case it guided to the solution.

Thanks and RegardsBalkrishan--------------------------------------------------------------------------------------------Please mark the post as an answer "Accept as solution" in case it helped resolve your query.Give kudos in case a post in case it guided to the solution.

Re: How does a monitor interacts to my ZC706/702 with onboard ADV7511?

The ADV7511 has a whole bunch of registers for control and status via I2C. Handling things like hot plug detect, for example, happen at the application level. You can also control the timing of the clock relative to the data. I'd start poking around with these types of things to see what's going on.

I'd also go grab an existing design to get an idea for how the registers are programmed for a given board:

Re: How does a monitor interacts to my ZC706/702 with onboard ADV7511?

When I started I wanted to clean up the path between ZC7020 and PQ2415 so I used the AN-1270 codes with 1080P mode as sync/data generator. And I use A9 and an axi_iic (as main_iic) for the control.

I used si570 on ZC702 as clock and managed to adjust the clock to achieve a 60fps down to 15 fps on PQ2415, all without any hassles. The video shows on PQ2415 immediately after FPGA is programmed, without A9 running. That made me complacent that the HDMI interface is as simple and that register programming is optional.