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Abstract

The solder joints 5 between semiconductor chip 6 and substrate 7 creep under sustained load. A dummy pad configuration can be made to improve the creep resistance. In cross section, the dummy pads 8 appear as shown in the figure.

Country

United States

Language

English (United States)

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Dummy Pads for Increased Creep Resistance

The solder joints 5 between semiconductor chip 6 and substrate 7 creep
under sustained load. A dummy pad configuration can be made to improve the
creep resistance. In cross section, the dummy pads 8 appear as shown in the
figure.

The semiconductor chip 6 has an insulator coating 9, such as SiO(2), with
openings therein having contact metallurgy 10. The solder joints 5 are joined to
metallurgy 10 and substrate metallurgy 11 and via conductor 14 for electrical
conduction between the chip 6 and substrate 7. The dummy pad 8 is physically
joined to metallurgy 12 formed on the SiO(2) layer 9 and directly to the substrate 7. There is no electrical connection between active devices in the chip to the
substrate wiring through the dummy pads.

The simplest case is where the dummy pads 8 have the same solder as the
solder joints 5 and are produced during normal chip processing.

The more complex case would be where the dummy pad 8 is of a different
composition than the solder joint 5, produced, for example, by a dual solder
evaporation process. Dummy pads 8 are then composed of highly creep
resistant materials, such as (63 Sn, 37 Pb) or (96 Sn, 2.5 Ag, 1.0 Sb, 0.5 Cd)
alloys.

The dummy pads can be of different geometries, sizes and numbers than
shown, with varying degrees of improvement expected.