I'm trying to interface SN8000x with my stm32f429 custom board using SPI, since my board uses SPI6 I had to make some changes in the code, while digging through it I could find a statement in wwd_spi.c

I reviewed the reference manual for the STM32F4XX processors and it seems that you are correct. DMA_FLAG_TCIF3 specifically refers to Stream 3 for either of the 2 DMAs. Same with DMA_FLAG_TCIF4 is for Stream 4 of either DMAs.

From the documentation for DMA_LIFCR and DMA_HIFCR:

"CTCIFx: Stream x clear transfer complete interrupt flag

Writing 1 to this bit clears the corresponding TCIFx flag in the DMA_LISR/DMA_HISR register"

In conjunction with this from DMA_LISR and DMA_HISR:

"TCIFx: Stream x transfer complete interrupt flag

This bit is set by hardware. It is cleared by software writing 1 to the corresponding bit in the

It looks Hari and Felix are both right, DMA_FLAG_TCIF4 and DMA_FLAG_TCIF3 should be swapped. I've checked the values of DMA_FLAG_TCIF4 and DMA_FLAG_TCIF3 definition in case they were swapped on purpose, they match the bits for DMA_HISR and DMA_LISR in the STM reference manual so they should be used as is. I'll alert our guys on this, thanks for finding this.