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To represent a binary number as its NUMBERING equivalent hexadecimal number AND CODING Start from the right and group 4 bits at a SYSTEMS time, replacing each 4-bit binary number with its hex equivalent Convertingbetween Binary Ex. Represent binary 100111110101 in hex and Hex 1001 1111 0101 = 9 F 5 To convert from hex to binary Each hex digit is replaced with its 4-bit binary equivalent Ex. Convert hex 29B to binary 2 9 B = 0010 1001 1011 Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 7

14.
Two voltage levels can be represented DIGITAL PRIMER as the two digits 0 and 1 Signals in digital electronics have twoBinary Logic distinct voltage levels with built-in tolerances for variations in the voltage A valid digital signal should be within either of the two shaded areas 5 4 Logic 1 3 2 1 Logic 0 0 Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 13

20.
Decoders DIGITAL PRIMER Decoders are widely used for address decoding in computer designLogic Design Address DecodersUsing Gates (cont’) Address decoder for 9 (10012) Address decoder for 5 (01012) The output will be 1 if and The output will be 1 if and only if the input is 10012 only if the input is 01012 Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 19

23.
CPU (Central Processing Unit) INSIDE THE Execute information stored in memory COMPUTER I/O (Input/output) devices Provide a means of communicating with Internal CPUOrganization of Memory Computers RAM (Random Access Memory) – temporary storage of programs that computer is running The data is lost when computer is off ROM (Read Only Memory) – contains programs and information essential to operation of the computer The information cannot be changed by use, and is not lost when power is off – It is called nonvolatile memory Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 22

26.
Address bus INSIDE THE For a device (memory or I/O) to be COMPUTER recognized by the CPU, it must be assigned an address Internal The address assigned to a given device mustOrganization of be unique Computers The CPU puts the address on the address bus, (cont’) and the decoding circuitry finds the device Data bus The CPU either gets data from the device or sends data to it Control bus Provides read or write signals to the device to indicate if the CPU is asking for information or sending it information Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 25

27.
The more data buses available, theINSIDE THECOMPUTER better the CPU Think of data buses as highway lanesMore about More data buses mean a more Data Bus expensive CPU and computer The average size of data buses in CPUs varies between 8 and 64 Data buses are bidirectional To receive or send data The processing power of a computer is related to the size of its buses Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 26

28.
The more address buses available, theINSIDE THE larger the number of devices that canCOMPUTER be addressedMore about The number of locations with which aAddress Bus CPU can communicate is always equal to 2x, where x is the address lines, regardless of the size of the data bus ex. a CPU with 24 address lines and 16 data lines can provide a total of 224 or 16M bytes of addressable memory Each location can have a maximum of 1 byte of data, since all general-purpose CPUs are byte addressable The address bus is unidirectional Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 27

29.
For the CPU to process information, INSIDE THE the data must be stored in RAM or COMPUTER ROM, which are referred to as primary memoryCPU’s Relation ROM provides information that is fixed to RAM and and permanent ROM Tables or initialization program RAM stores information that is not permanent and can change with time Various versions of OS and application packages CPU gets information to be processed first form RAM (or ROM) if it is not there, then seeks it from a mass storage device, called secondary memory, and transfers the information to RAM Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 28

30.
RegistersINSIDE THECOMPUTER The CPU uses registers to store information temporarilyInside CPUs Values to be processed Address of value to be fetched from memory In general, the more and bigger the registers, the better the CPU Registers can be 8-, 16-, 32-, or 64-bit The disadvantage of more and bigger registers is the increased cost of such a CPU Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 29

32.
ALU (arithmetic/logic unit)INSIDE THE Performs arithmetic functions such as add,COMPUTER subtract, multiply, and divide, and logic functions such as AND, OR, and NOTInside CPUs (cont’) Program counter Points to the address of the next instruction to be executed As each instruction is executed, the program counter is incremented to point to the address of the next instruction to be executed Instruction decoder Interprets the instruction fetched into the CPU A CPU capable of understanding more instructions requires more transistors to design Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 31

33.
Ex. A CPU has registers A, B, C, and D and it has an 8-bitINSIDE THE data bus and a 16-bit address bus. The CPU can accessCOMPUTER memory from addresses 0000 to FFFFH Assume that the code for the CPU to move a value to Internal register A is B0H and the code for adding a value toWorking of register A is 04HComputers The action to be performed by the CPU is to put 21H into register A, and then add to register A values 42H and 12H ... Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 32

35.
Ex. (cont’)INSIDE THE The actions performed by CPU are as follows:COMPUTER 1. The program counter is set to the value 1400H, indicating the address of the first instruction code to Internal be executedWorking of 2.Computers The CPU puts 1400H on address bus and sends it (cont’) out The memory circuitry finds the location The CPU activates the READ signal, indicating to memory that it wants the byte at location 1400H 以動畫表示 This causes the contents of memory location 1400H, which is B0, to be put on the data bus and brought into the CPU ... Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 34

36.
Ex. (cont’)INSIDE THE 3.COMPUTER The CPU decodes the instruction B0 The CPU commands its controller circuitry to bring Internal into register A of the CPU the byte in the nextWorking of memory locationComputers The value 21H goes into register A (cont’) The program counter points to the address of the next instruction to be executed, which is 1402H Address 1402 is sent out on the address bus to fetch the next instruction ... Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 35

37.
Ex. (cont’)INSIDE THE 4.COMPUTER From memory location 1402H it fetches code 04H After decoding, the CPU knows that it must add to Internal the contents of register A the byte sitting at theWorking of next address (1403)Computers After the CPU brings the value (42H), it provides (cont’) the contents of register A along with this value to the ALU to perform the addition It then takes the result of the addition from the ALU’s output and puts it in register A The program counter becomes 1404, the address of the next instruction ... Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 36

38.
Ex. (cont’)INSIDE THE 5.COMPUTER Address 1404H is put on the address bus and the code is fetched into the CPU, decoded, and Internal executedWorking of This code is again adding a value to register AComputers The program counter is updated to 1406H (cont’) 6. The contents of address 1406 are fetched in and executed This HALT instruction tells the CPU to stop incrementing the program counter and asking for the next instruction Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 37

43.
General-purpose microprocessors MICRO- Must add RAM, ROM, I/O ports, andCONTROLLERS timers externally to make them functional AND Make the system bulkier and much more EMBEDDED expensivePROCESSORS Have the advantage of versatility on the amount of RAM, ROM, and I/O portsMicrocontroller Microcontroller vs. General- The fixed amount of on-chip ROM, RAM, Purpose and number of I/O ports makes them idealMicroprocessor for many applications in which cost and (cont’) space are critical In many applications, the space it takes, the power it consumes, and the price per unit are much more critical considerations than the computing power Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 5

44.
An embedded product uses a MICRO- microprocessor (or microcontroller) toCONTROLLERS do one task and one task only AND There is only one application software that EMBEDDED is typically burned into ROMPROCESSORS A PC, in contrast with the embeddedMicrocontrollers system, can be used for any number offor Embedded applications Systems It has RAM memory and an operating system that loads a variety of applications into RAM and lets the CPU run them A PC contains or is connected to various embedded products Each one peripheral has a microcontroller inside it that performs only one task Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 6

46.
Many manufactures of general-purpose MICRO- microprocessors have targeted theirCONTROLLERS microprocessor for the high end of the AND embedded market EMBEDDED There are times that a microcontroller isPROCESSORS inadequate for the task x86 PC When a company targets a general- Embedded purpose microprocessor for the Applications embedded market, it optimizes the processor used for embedded systems Very often the terms embedded processor and microcontroller are used interchangeably Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 8

47.
One of the most critical needs of an MICRO- embedded system is to decreaseCONTROLLERS power consumption and space AND EMBEDDED In high-performance embeddedPROCESSORS processors, the trend is to integrate more functions on the CPU chip and let x86 PC designer decide which features he/she Embedded wants to use Applications In many cases using x86 PCs for the (cont’) high-end embedded applications Saves money and shortens development time A vast library of software already written Windows is a widely used and well understood platform Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 9

49.
Meeting the computing needs of the MICRO-CONTROLLERS task at hand efficiently and cost AND effectively EMBEDDED SpeedPROCESSORS Packaging Power consumption Criteria for The amount of RAM and ROM on chip Choosing aMicrocontroller The number of I/O pins and the timer on chip How easy to upgrade to higher- performance or lower power-consumption versions Cost per unit Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 11

50.
Availability of software development MICRO- tools, such as compilers, assemblers,CONTROLLERS and debuggers AND EMBEDDED Wide availability and reliable sourcesPROCESSORS of the microcontroller The 8051 family has the largest number of Criteria for diversified (multiple source) suppliers Choosing a Intel (original) AtmelMicrocontroller (cont’) Philips/Signetics AMD Infineon (formerly Siemens) Matra Dallas Semiconductor/Maxim Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 12

51.
Intel introduced 8051, referred as MCS-OVERVIEW OF 51, in 19818051 FAMILY The 8051 is an 8-bit processor The CPU can work on only 8 bits of data at a time 8051Microcontroller The 8051 had 128 bytes of RAM 4K bytes of on-chip ROM Two timers One serial port Four I/O ports, each 8 bits wide 6 interrupt sources The 8051 became widely popular after allowing other manufactures to make and market any flavor of the 8051, but remaining code-compatible Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 13

57.
Register are used to store informationINSIDE THE 8051 temporarily, while the information could be Registers a byte of data to be processed, or an address pointing to the data to be fetched The vast majority of 8051 register are 8-bit registers There is only one data type, 8 bits Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 2

61.
Notes on programmingINSIDE THE Value (proceeded with #) can be loaded 8051 directly to registers A, B, or R0 – R7 MOV A, #23H MOV MOV R5, #0F9H If it’s not preceded with #,Instruction Add a 0 to indicate that it means to load from a memory location (cont’) F is a hex number and not a letter If values 0 to F moved into an 8-bit register, the rest of the bits are assumed all zeros “MOV A, #5”, the result will be A=05; i.e., A = 00000101 in binary Moving a value that is too large into a register will cause an error MOV A, #7F2H ; ILLEGAL: 7F2H>8 bits (FFH) Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 6

62.
ADD A, source ;ADD the source operandINSIDE THE ;to the accumulator 8051 The ADD instruction tells the CPU to add the source byte to register A and put the result in register A ADD Source operand can be either a register or immediate data, but the destination must alwaysInstruction be register A “ADD R4, A” and “ADD R2, #12H” are invalid since A must be the destination of any arithmetic operation MOV A, #25H ;load 25H into A MOV R2, #34H ;load 34H into R2 ADD A, R2 ;add R2 to Accumulator There are always ;(A = A + R2) many ways to write the same program, MOV A, #25H ;load one operand depending on the ;into A (A=25H) registers used ADD A, #34H ;add the second ;operand 34H to A Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 7

63.
In the early days of the computer, 8051 programmers coded in machine language, ASSEMBLY consisting of 0s and 1sPROGRAMMING Tedious, slow and prone to error Assembly languages, which provided Structure of mnemonics for the machine code instructions, Assembly plus other features, were developed Language An Assembly language program consist of a series of lines of Assembly language instructions Assembly language is referred to as a low- level language It deals directly with the internal structure of the CPU Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 8

64.
Assembly language instruction includes 8051 a mnemonic (abbreviation easy to remember) ASSEMBLY the commands to the CPU, telling it what thosePROGRAMMING to do with those items optionally followed by one or two operands Structure of the data items being manipulated Assembly A given Assembly language program is Language a series of statements, or lines Assembly language instructions Tell the CPU what to do Directives (or pseudo-instructions) Give directions to the assembler Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 9

65.
An Assembly language instruction 8051 ASSEMBLY consists of four fields:PROGRAMMING [label:] Mnemonic [operands] [;comment] ORG 0H ;start(origin) at location Structure of 0 MOV R5, #25H ;load 25H into R5 Assembly MOV R7, #34H ;load 34H into R7 Directives do not Language MOV A, #0 ;load 0 into generate any machine A ADD A, R5 ;add contents ofand are used code R5 to A ;now A = A + only by the assembler R5 Mnemonics ADD A, R7 ;add contents of R7 to A produce ;now A = A + R7 opcodes ADD A, #12H ;add to A value 12H ;now A = A + 12H HERE: SJMP HERE ;stay in this loop END ;end of asm may be at the end of a Comments source file The label field allows line or on a line by themselves the program to refer to a The assembler ignores comments line of code by name Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 10

66.
The step of Assembly language ASSEMBLINGAND RUNNING program are outlines as follows: AN 8051 1) First we use an editor to type a program, PROGRAM many excellent editors or word processors are available that can be used to create and/or edit the program Notice that the editor must be able to produce an ASCII file For many assemblers, the file names follow the usual DOS conventions, but the source file has the extension “asm“ or “src”, depending on which assembly you are using Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 11

67.
2) The “asm” source file containing the ASSEMBLING program code created in step 1 is fed toAND RUNNING an 8051 assembler AN 8051 The assembler converts the instructions into PROGRAM machine code (cont’) The assembler will produce an object file and a list file The extension for the object file is “obj” while the extension for the list file is “lst” 3) Assembler require a third step called linking The linker program takes one or more object code files and produce an absolute object file with the extension “abs” This abs file is used by 8051 trainers that have a monitor program Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 12

68.
4) Next the “abs” file is fed into a program ASSEMBLING called “OH” (object to hex converter)AND RUNNING which creates a file with extension “hex” AN 8051 that is ready to burn into ROM PROGRAM This program comes with all 8051 assemblers (cont’) Recent Windows-based assemblers combine step 2 through 4 into one step Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 13

69.
EDITOR PROGRAM ASSEMBLING myfile.asmAND RUNNING AN 8051 ASSEMBLER PROGRAM PROGRAM myfile.lst Other obj filesSteps to Create myfile.obj a Program LINKER PROGRAM myfile.abs OH PROGRAM myfile.hex Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 14

71.
The program counter points to the PROGRAMCOUNTER AND address of the next instruction to be ROM SPACE executed As the CPU fetches the opcode from the Program program ROM, the program counter is Counter increasing to point to the next instruction The program counter is 16 bits wide This means that it can access program addresses 0000 to FFFFH, a total of 64K bytes of code Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 16

72.
All 8051 members start at memory PROGRAMCOUNTER AND address 0000 when they’re powered ROM SPACE up Program Counter has the value of 0000 Power up The first opcode is burned into ROM address 0000H, since this is where the 8051 looks for the first instruction when it is booted We achieve this by the ORG statement in the source program Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 17

75.
A step-by-step description of the PROGRAMCOUNTER AND action of the 8051 upon applying ROM SPACE power on it 1. When 8051 is powered up, the PC has Executing 0000 and starts to fetch the first opcode Program from location 0000 of program ROM Upon executing the opcode 7D, the CPU fetches the value 25 and places it in R5 Now one instruction is finished, and then the PC is incremented to point to 0002, containing opcode 7F 2. Upon executing the opcode 7F, the value 34H is moved into R7 The PC is incremented to 0004 Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 20

76.
(cont’) PROGRAMCOUNTER AND 3. The instruction at location 0004 is ROM SPACE executed and now PC = 0006 4. After the execution of the 1-byte Executing instruction at location 0006, PC = 0007 Program 5. Upon execution of this 1-byte instruction (cont’) at 0007, PC is incremented to 0008 This process goes on until all the instructions are fetched and executed The fact that program counter points at the next instruction to be executed explains some microprocessors call it the instruction pointer Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 21

77.
No member of 8051 family can access PROGRAMCOUNTER AND more than 64K bytes of opcode ROM SPACE The program counter is a 16-bit registerROM Memory Byte Byte ByteMap in 8051 0000 0000 0000 Family 0FFF 8751 AT89C51 3FFF DS89C420/30 7FFF DS5000-32 Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 22

78.
8051 microcontroller has only one data8051 DATATYPES AND type - 8 bitsDIRECTIVES The size of each register is also 8 bits It is the job of the programmer to breakData Type down data larger than 8 bits (00 to FFH, or 0 to 255 in decimal) The data types can be positive or negative Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 23

79.
The DB directive is the most widely8051 DATATYPES AND used data directive in the assemblerDIRECTIVES It is used to define the 8-bit data When DB is used to define data, theAssembler numbers can be in decimal, binary, hex, The “D” after the decimalDirectives ASCII formats number is optional, but using “B” (binary) and “H” ORG 500H (hexadecimal) for the others is required DATA1: DB 28 ;DECIMAL (1C in Hex) DATA2: DB 00110101B ;BINARY (35 in Hex) DATA3: DB 39H ;HEXThe Assembler will ORG 510H Place ASCII in quotation marksconvert the numbers DATA4: DB “2591” The;ASCII NUMBERS ASCII Assembler will assigninto hex code for the numbers or characters ORG 518H DATA6: DB “My name is Joe” Define ASCII strings larger ;ASCII CHARACTERS than two characters Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 24

80.
ORG (origin)8051 DATA The ORG directive is used to indicate theTYPES AND beginning of the addressDIRECTIVES The number that comes after ORG can be either in hex and decimalAssembler If the number is not followed by H, it is decimalDirectives and the assembler will convert it to hex (cont’) END This indicates to the assembler the end of the source (asm) file The END directive is the last line of an 8051 program Mean that in the code anything after the END directive is ignored by the assembler Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 25

81.
EQU (equate)8051 DATATYPES AND This is used to define a constant withoutDIRECTIVES occupying a memory location The EQU directive does not set asideAssembler storage for a data item but associates adirectives constant value with a data label (cont’) When the label appears in the program, its constant value will be substituted for the label Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 26

82.
EQU (equate) (cont’)8051 DATATYPES AND Assume that there is a constant used inDIRECTIVES many different places in the program, and the programmer wants to change its valueAssembler throughout By the use of EQU, one can change it once anddirectives the assembler will change all of its occurrences (cont’) Use EQU for the counter constant COUNT EQU 25 ... .... MOV R3, #COUNT The constant is used to load the R3 register Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 27

83.
The program status word (PSW)FLAG BITS ANDPSW REGISTER register, also referred to as the flag register, is an 8 bit registerProgram Status Only 6 bits are used Word These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow) – They are called conditional flags, meaning that they indicate some conditions that resulted after an instruction was executed The PSW3 and PSW4 are designed as RS0 and RS1, and are used to change the bank The two unused bits are user-definable Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 28

86.
The flag bits affected by the ADDFLAG BITS ANDPSW REGISTER instruction are CY, P, AC, and OV Example 2-2 ADD Show the status of the CY, AC and P flag after the addition of 38H and 2FH in the following instructions.Instruction And PSW MOV A, #38H (cont’) ADD A, #2FH ;after the addition A=67H, CY=0 Solution: 38 00111000 + 2F 00101111 67 01100111 CY = 0 since there is no carry beyond the D7 bit AC = 1 since there is a carry from the D3 to the D4 bi P = 1 since the accumulator has an odd number of 1s (it has five 1s) Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 31

87.
Example 2-3FLAG BITS AND Show the status of the CY, AC and P flag after the addition of 9CHPSW REGISTER and 64H in the following instructions. MOV A, #9CH ADD ADD A, #64H ;after the addition A=00H, CY=1Instruction And Solution: PSW (cont’) 9C 10011100 + 64 01100100 100 00000000 CY = 1 since there is a carry beyond the D7 bit AC = 1 since there is a carry from the D3 to the D4 bi P = 0 since the accumulator has an even number of 1s (it has zero 1s) Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 32

88.
Example 2-4FLAG BITS AND Show the status of the CY, AC and P flag after the addition of 88HPSW REGISTER and 93H in the following instructions. MOV A, #88H ADD ADD A, #93H ;after the addition A=1BH, CY=1Instruction And PSW Solution: (cont’) 88 10001000 + 93 10010011 11B 00011011 CY = 1 since there is a carry beyond the D7 bit AC = 0 since there is no carry from the D3 to the D4 bi P = 0 since the accumulator has an even number of 1s (it has four 1s) Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 33

89.
There are 128 bytes of RAM in the REGISTER 8051BANKS AND Assigned addresses 00 to 7FH STACK The 128 bytes are divided into threeRAM Memory different groups as follows: Space 1) A total of 32 bytes from locations 00 to Allocation 1F hex are set aside for register banks and the stack 2) A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable read/write memory 3) A total of 80 bytes from locations 30H to 7FH are used for read and write storage, called scratch pad Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 34

91.
These 32 bytes are divided into 4 8051 REGISTER banks of registers in which each bank BANKS AND has 8 registers, R0-R7 STACK RAM location from 0 to 7 are set aside for bank 0 of R0-R7 where R0 is RAM locationRegister Banks 0, R1 is RAM location 1, R2 is RAM location 2, and so on, until memory location 7 which belongs to R7 of bank 0 It is much easier to refer to these RAM locations with names such as R0, R1, and so on, than by their memory locations Register bank 0 is the default when 8051 is powered up Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 36

95.
The stack is a section of RAM used by 8051 the CPU to store information REGISTER temporarilyBANKS AND This information could be data or an STACK address Stack The register used to access the stack is called the SP (stack pointer) register The stack pointer in the 8051 is only 8 bit wide, which means that it can take value of 00 to FFH When the 8051 is powered up, the SP register contains value 07 RAM location 08 is the first location begin used for the stack by the 8051 Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 40

96.
The storing of a CPU register in the 8051 stack is called a PUSH REGISTERBANKS AND SP is pointing to the last used location of STACK the stack As we push data onto the stack, the SP is Stack incremented by one (cont’) This is different from many microprocessors Loading the contents of the stack back into a CPU register is called a POP With every pop, the top byte of the stack is copied to the register specified by the instruction and the stack pointer is decremented once Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 41

99.
The CPU also uses the stack to save 8051 REGISTER the address of the instruction just BANKS AND below the CALL instruction STACK This is how the CPU knows where to resume when it returns from the called CALL subroutineInstruction And Stack Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 44

100.
The reason of incrementing SP after 8051 REGISTER push isBANKS AND Make sure that the stack is growing STACK toward RAM location 7FH, from lower to upper addressesIncrementing Ensure that the stack will not reach theStack Pointer bottom of RAM and consequently run out of stack space If the stack pointer were decremented after push We would be using RAM locations 7, 6, 5, etc. which belong to R7 to R0 of bank 0, the default register bank Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 45

101.
When 8051 is powered up, register 8051 REGISTER bank 1 and the stack are using the BANKS AND same memory space STACK We can reallocate another section of RAM to the stackStack and Bank 1 Conflict Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 46

104.
Repeating a sequence of instructions a LOOP AND certain number of times is called a JUMP loopINSTRUCTIONS Loop action is performed by DJNZ reg, Label Looping The register is decremented If it is not zero, it jumps to the target address referred to by the label A loop can be repeated a Prior to the start of loop the register is loaded maximum of 255 times, if with the counter for the number of repetitions R2 is FFH Counter can be R0 – R7 or RAM location ;This program adds value 3 to the ACC ten times MOV A,#0 ;A=0, clear ACC MOV R2,#10 ;load counter R2=10 AGAIN: ADD A,#03 ;add 03 to ACC DJNZ R2,AGAIN ;repeat until R2=0,10 times MOV R5,A ;save A in R5 Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 2

105.
If we want to repeat an action more LOOP AND JUMP times than 256, we use a loop inside aINSTRUCTIONS loop, which is called nested loop We use multiple registers to hold the Nested Loop count Write a program to (a) load the accumulator with the value 55H, and (b) complement the ACC 700 times MOV A,#55H ;A=55H MOV R3,#10 ;R3=10, outer loop count NEXT: MOV R2,#70 ;R2=70, inner loop count AGAIN: CPL A ;complement A register DJNZ R2,AGAIN ;repeat it 70 times DJNZ R3,NEXT Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 3

106.
Jump only if a certain condition is met LOOP AND JZ label ;jump if A=0 JUMP MOV A,R0 ;A=R0INSTRUCTIONS JZ OVER ;jump if A = 0 MOV A,R1 ;A=R1 JZ OVER ;jump if A = 0 Conditional ... Jumps OVER: Can be used only for register A, not any other register Determine if R5 contains the value 0. If so, put 55H in it. MOV A,R5 ;copy R5 to A JNZ NEXT ;jump if A is not zero MOV R5,#55H NEXT: ... Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 4

109.
The unconditional jump is a jump in LOOP AND which control is transferred JUMP unconditionally to the target locationINSTRUCTIONS LJMP (long jump) Unconditional 3-byte instruction Jumps First byte is the opcode Second and third bytes represent the 16-bit target address – Any memory location from 0000 to FFFFH SJMP (short jump) 2-byte instruction First byte is the opcode Second byte is the relative target address – 00 to FFH (forward +127 and backward -128 bytes from the current PC) Department of Computer Science and Information Engineering HANEL National Cheng Kung University, TAIWAN 7