Sandy Bridge: More Details, More Questions

At various sessions at the Intel Developer Forum today, Intel gave out a number of more details on its forthcoming "Sandy Bridge" family of chips, the second in its 32nm high-k/metal gate generation. But in part because the discussion was pretty much limited to architecture, not specific products, I'm left with questions about what the next year's products will actually look like, and of course, how they will perform relatively to this year's products and the ones in the pipeline from competitor AMD.

At various sessions at the Intel Developer Forum today, Intel gave out a number of more details on its forthcoming "Sandy Bridge" family of chips, the second in its 32nm high-k/metal gate generation. But in part because the discussion was pretty much limited to architecture, not specific products, I'm left with questions about what the next year's products will actually look like, and of course, how they will perform relatively to this year's products and the ones in the pipeline from competitor AMD.

Here are some things we do know. The first client products are now slated to be on the market in early 2011, which if Intel follows its usual cadence would mean an introduction at the Consumer Electronics Show in January. Sandy Bridge was initially designed with four CPU cores with 8 threads and "up to 12 graphics processing engines," but the company has confirmed that there will be a dual-core/four thread version as well at about the same time. I wouldn't be surprised to see the quad-core versions first (as Intel's existing quad-core designs are based on the 45nm Nehalem design). In addition, it has been reported - but Intel hasn't confirmed - that there will be versions with 6 graphics engines as well, most likely for lower-end laptops.

Here's the basic architectural diagram of the chip:

At a panel of architects, Intel Vice President Stephen Smith introduced Senior Principal Engineers Opher Kahn and Bob Valentine from the company's Israel operations, who mainly worked on the core architecture and the integration of all the features, along with Tom Piazza, Intel Fellow, from the company's Oregon operations, who worked on the graphics section.

At the panel, Intel showed a Sandy Bridge wafer (above) as well as the first desktop motherboard designed for it:

(More photos after the jump)

And a look at how it stacks up against the previous generations in terms of size. Note that Westmere includes a 32-nm CPU core and a 45-nm Graphics core in the package, while Sandy Bridge integrates the two.

And here's a view for sizing:

Valentine talked about how the "tick/tock" model always leads to new shrinks every couple of years, so there are always ideas about new things that can be incorporated in each chip. Kahn talked about how the idea for the new "ring interconnect" originally came from work on higher-end servers, but ended up working well to help spin new versions of the chip. He noted that the ring design has over 1000 wires, but makes it easy to do things like remove two cores to create the dual-core version.

While the basic CPU cores are similar to those used in Nehalem and Westmere, they do have some changes, starting with the addition of Advanced Vector Extension (AVX) commands, 256-bit commands designed for floating point calculations. But the bigger changes deal with how the cache now offers four times the bandwidth and is shared by the CPU and graphics cores.

Some things to note: The Sandy Bridge design initially only includes support for 2 channels of DDR3 memory (contrasted with three in the initial Nehalem designs), with the architects saying that was the mainstream part of the market. It also includes PCI Express, and Embedded Display Port, which they said they chose because it is low-power and cost less than alternatives like HDMI.)

Of course, systems will still require a chipset, and that could easily support other standards. Indeed, you need a chipset for peripheral support for things like USB, and Intel has not yet committed whether the first system designs (sometimes referred to as "Cougar Point") will include USB 3.0 or its LightPeak optical interconnect.

In the architectural panel, Piazza answered a number of questions on the graphics. He said the goal was not only getting much improved performance (Intel has said it will be 25 times the power of integrated graphics from a couple of years ago), but also keeping the power down. He said team enabled a number of new ways of doing this, including using the new Turbo mode, which can send power to the graphics engines as well as the core for short periods of time. He also talked about how using the internal cache helps, particularly with the improved bandwidth of lower latency of the cache.

He confirmed that the new chip will not support Direct X 11, saying "there are no Direct X 11 exclusive games" out today, though he indicated Intel intends to support new APIs in the future. But he said it would support Direct Compute (in an implementation on top of Direct X 10) and OpenCL. This likely accounts for some of the improvements in things like transcoding video.

While some of the initial reports the graphics are quite good, Intel itself hasn't released any actual performance numbers other than showing some demos against early integrated platforms where it looks quite good. However, in tests with a purported early version, Anandtech shows it equaling a $50 discrete board.

I'm interested in seeing performance against discrete boards in desktops, but I'll be more interested in seeing an actual head to head with laptops running dual-core versions of SandyBridge and AMD's upcoming Ontario or Zacate chips in its Brazos platform. AMD held a press reception tonight across from IDF at which it was showing a prototype motherboard of a Zacate-based system, and it was running high-end games pretty well.

On higher-end laptops, it sounds like Intel could be ahead with its quad-core version, but the bulk of the market seems to be dual-core systems. And it will be interesting to see how it compares with today's systems with hybrid or switchable graphics. Even more important will be differences in battery life, and again Intel was not sharing any numbers. My guess is that will come later.

In any case, a year from now, the new notebooks on the market are almost certain to have much better graphics than what standard notebooks have today. That's great for everyone.

In the server market, Sandy Bridge will be offered in a number of different versions aimed at the Xeon server market starting with a basic version for a single-socket machine, then followed by " "SandyBridge-EP" for two-socket servers. In later years, the high-end multiprocessor "EX" version will follow, but recall that the company's "Westmere-EX" was only disclosed recently and won't be in systems until 2011. Valentine did say that the ring architecture was particularly suited for multiprocessor system designs, including 4 processor and above systems.

The different server versions will have different levels of graphics, cache, and scalability, depending on their markets.Again, in these markets, the chips will go up against the current Westmere Generation of Xeon chips, as well as new chips based on AMD's upcoming Bulldozer chips, which have a very different architecture, in which each block of two integer units share a combined floating point unit.,

As usual, we'll have to wait to see what performance - and particularly performance per watt looks like when the final systems ship.

Finally, of course, we all know what the follow up to Sandy Bridge will be. I expect next year's IDF will focus on the 22nm shrink of Sandy Bridge, known as "Ivy Bridge," which Intel CEO Paul Otellini this morning said was on track for the end of 2011 (and likely to be in systems in early 2012), as part of the company's "tick/tock" cadence.

Michael J. Miller's Forward Thinking Blog: forwardthinking.pcmag.com
Michael J. Miller is chief information officer at Ziff Brothers Investments, a private investment firm. From 1991 to 2005, Miller was editor-in-chief of PC Magazine, responsible for the editorial direction, quality and presentation of the world's largest computer publication.
Until late 2006, Miller was the Chief Content Officer for Ziff Davis Media, responsible for overseeing the editorial positions of Ziff Davis's magazines, websites, and events. As Editorial Director for Ziff Davis Publishing since 1997, Miller took an active role in...
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