Abstract

This paper demonstrates the use of a single-chipFPGA for the extraction of highly accurate backgroundmodels in real-time. The models are basedon 24-bit RGB values and 8-bit grayscale intensityvalues. Three background models are presented, allusing a camcorder, single FPGA chip, four blocksof RAM and a display unit. The architectures havebeen implemented and tested using a Panasonic NVDS60Bdigital video camera connected to a CeloxicaRC300 Prototyping Platform with a Xilinx VirtexII XC2v6000 FPGA and 4 banks of onboard RAM.The novel FPGA architecture presented has the advantagesof minimizing latency and the movement oflarge datasets, by conducting time critical processeson BlockRAM. The systems operate at clock ratesranging from 57MHz to 65MHz and are capableof performing pre-processing functions like temporallow-pass filtering on standard frame size of 640X480pixels at up to 210 frames per second.

Additional Information:

This paper demonstrates the use of a single-chip
FPGA for the extraction of highly accurate background
models in real-time. The models are based
on 24-bit RGB values and 8-bit grayscale intensity
values. Three background models are presented, all
using a camcorder, single FPGA chip, four blocks
of RAM and a display unit. The architectures have
been implemented and tested using a Panasonic NVDS60B
digital video camera connected to a Celoxica
RC300 Prototyping Platform with a Xilinx Virtex
II XC2v6000 FPGA and 4 banks of onboard RAM.
The novel FPGA architecture presented has the advantages
of minimizing latency and the movement of
large datasets, by conducting time critical processes
on BlockRAM. The systems operate at clock rates
ranging from 57MHz to 65MHz and are capable
of performing pre-processing functions like temporal
low-pass filtering on standard frame size of 640X480
pixels at up to 210 frames per second.