MIPS16

MIPS16 - compact code for MIPS CPUs

MIPS code for a given program tends to be 30% larger than for a CISC architecture like x86.

For some small applications, that's a problem.

It's easy to believe that MIPS code is bigger because MIPS is a RISC, and RISC instructions do less work than CISC instructions, so you need more of them to do the same job. It's easy to believe, but wrong. Compilers are dumb and don't use complicated instructions much, so in fact an x86 and MIPS version of a program will have a very similar number of instructions. But all MIPS instructions are (exactly) 4 bytes long, whereas the average size of the mostly-simple x86 instructions in a program is likely about 3 bytes and a bit.

So MIPS16 is an alternative encoding for a subset of the MIPS instruction set into fixed-size 16-bit instruction codes. (It's not quite that simple: there are a few unique-to-MIPS16 instructions). It's very easy to call between MIPS16 and real fullsize-MIPS instructions, because the change to "MIPS16 mode" is accomplished by jumping to an odd address (all MIPS16 instructions appear to have odd addresses).

MIPS16 programs are not 50% of the size. The compromises required to make the instructions so small are painful, and this time you really do need more instructions to encode the same program. In particular, the MIPS16 instruction set does most of its work on only 8 of the 32 general-purpose registers.

The original MIPS16 instruction set was defined in the 1990s by LSI Logic. It's been augmented and regularised by MIPS Technologies, and the more recent extended instruction set is called MIPS16e.