a PDP-11/40 with MMU and EIS, boots
UNIX 6th edition
from an IDE disk. Written in
SFL.
The POP-11 sources are open source, the SFL-to-Verilog converter
unfortunately not.
See also a
proceedings paper on POP-11 submitted for the Asia and South Pacific
Design Automation 2004 conference.
Naohiko's motivation is to 'Reincarnate Historic Systems on FPGA with
Novel Design Methodology' and use this in teaching, see his presentation
given on the
ICCD 2009
(
abstract,
slides and
proceedings).

currently a PDP-11/34 but soon a
11/44, boots RT-11,
RSTS V4
and 2.9 BSD from an IDE disk via an RK11 emulation.
Written in Verilog. This project evolved independantly of the w11
on an essentially parallel time scale. See also
SD Times Article
archived on
2013-02-02
.

This is a private hobbyist website
no impressum or privacy protection statement required
see
GitHub terms
Note to US readers: This content is provided by an EU citizen.
Trumps US-EU relation assessment varies between foe (15.07.2018)
and true love (25.07.2018).
Unclear what prevails, read content at our own risk.