Translation Basics with the LSF Family

Hello, and welcome to "The Logic Minute." In this video, the fourth installment of the LSF family series, we will explain the basics for translation with the LSF family of bidirectional multi-voltage level translators.
Shown on the right is a typical application schematic with an LSF device being used to translate signals between two external devices. Some important terms are common across both up and down translation. The B-side is sometimes referred to as the high side, since VCCB must always be larger than VCCA for the translator to operate properly. And the A-side refers to all devices connected to the A ports. Pull-up resistors can appear on either, both, or neither side, depending on the specific application.
This device works with both push-pull and open drain transmitters. The amount of leakage current into a receiver can affect pull-up resistor selection, which we will go into details on in a later video.
LSF translators use four port N-channel FETs to carry out the translation. The gate bias voltage is essential to how the LSF translators operate, and the details for how it works are contained in the bias circuit video. In every device using a translator, there will be a device outputting a signal, which we will refer to as the transmitter, and there will be a device receiving the translated signal, which we will refer to as the receiver. It's important to note that the transmitter and receiver can and often do change sides during operation.
This circuit represents a typical input for a CMOS logic device, such as an FPGA, microcontroller, or logic gate. A standard CMOS input is high impedance, because it connects directly to the gates of two or more FETs. These inputs also commonly have clamp diodes, shown here with a positive clamp diode in red and the negative clamp diode in blue. Even in devices that do not have added clamp diodes, there is typically a diode to ground as part of the device's ESD protection structure. The important thing to take away from this is that there is always a path for leakage current on all CMOS inputs.
CMOS inputs don't have an associated symbol, because they are the standard type of CMOS input. This circuit represents a typical push-pull output stage for a CMOS logic device, such as an FPGA, microcontroller, or logic gate. It can either drive an output up to VCC through the P-FET, shown in red, or down to ground through the N-FET, shown in blue. There isn't a symbol to identify a push-pull output, as it's assumed to be the standard output type for CMOS devices.
An open drain output is basically just a push-pull output with the P-channel MOSFET removed or disabled. Because of this, the output can only be driven low or put into a high impedance state. The underlined diamond symbol is used to denote an open drain output. Please click on the links below to jump to the video of interest, and thank you for watching.

Description

October 17, 2017

Some concepts and terms are common to all types of translation with the LSF, and these are discussed in this video.