UncategorizedComments Off on High-performance TCP Stack for Cell Processors

Oct302008

Express Logic, maker of the well-known ThreadX real time operating system (RTOS), announced that they have customized their NetX TCP stack to run on the Cell “SPE” coprocessor (of which current Cell processors have 8). Sony apparently wanted better performance than they could get from Linux, and the ThreadX stack acheived 8.5 Gbps with 3KB packets. There’s an IEEE “Hot Interconnects” paper on the subject.

Apparently Apple has hired Mark Papermaster, an executive in IBM’s Power Architecure server division. However, almost before anybody could speculate as to why (Xserve? iPhone chip design?), IBM filed a lawsuit against Papermaster to prevent Apple from hiring him. With litigation flying, one can assume that he’s not welcome at IBM any more either.

Freescale has a large number of embedded sytem-on-chip (SoC) processors, with chips currently built around 4 different cores (e200, e300, e500, and e600). However, they’ve now announced that they will also build customer-specific products (CSPs), mixing and matching their own cores and devices as well as integrating custom logic from customers and third parties. Freescale’s move once more positions them against IBM, which in embedded Power Architecture has focused exclusively on CSPs (after selling off its Power “standard products” to AMCC years ago).

UncategorizedComments Off on Wind River To Implement Virtualization for PowerPC

Jul132008

Wind River will release a technology preview of their new virtualization solution in August, supporting x86 and PowerPC processors. It will allow customers to run Linux, VxWorks, Windows, and other RTOSes simultaneously on the same system, even on a single core. The value? “Take advantage of the multi-core trend; integrate more features into their devices while leveraging existing code; isolate different functional system components; and consolidate hardware.”

AMCC recently announced the 460GTx processor, which runs at speeds from 800 MHz 1.4 GHz and integrates four gigabit ethernet controllers. It is expected to be available in 4Q 2008 for US$100-150. Additional details include power consumption of 8 to 10 watts, depending on configuration.

Freescale’s marketing folks have outdone themselves this time. While their core-to-chip numbering is mostly intelligible (e.g. 85xx chips use the e500 core), “PowerQUICC” generations have been a little more confusing. Now, in addition to PowerQUICC, they’ve introduced a new product line named “QorIQ” (pronounced “Core IQ”). Within the QorIQ line, there are five “platforms”, P1 through P5. Each platform encompasses multiple processors, so QorIQ P1 includes P1010, P1011, and P1020. Platforms 1 through 3 use and e500v2 (and maybe v1?) core, but P4 uses the new e500mc core, which can scale up to 8 cores on the P4080 processor. P5 is still a mystery.

As part of the QorIQ brand announced at Freescale Technology Forum this week, Freescale announced the e500mc core. The new P4080 processor contains eight 1.5GHz e500mc cores, while older e500v2 cores could be found in at most dual-core configurations. According to e500mc Linux patches also released this week, e500mc lacks SPE (the SIMD instruction set found on e500v1 and v2), but notably includes hardware hypervisor support, a first for embedded PowerPC.

An AMD fellow presented to Stanford, promoting a vision of co-processor accelerators driven by a general-purpose core (which would also handle legacy and single-threaded tasks). However, although this is the basic design of the PowerPC-based Cell processor, he thinks an AMD x86 core surrounded by AMD/ATI graphics processing units (GPUs) is a better architecture.

Apparently the US Department of Defense is indeed discussing the P.A. Semi acquisition with both Apple and the Federal Trade Commission (which must approve the deal). Lots of comments from unnamed sources, but the 1682M chip is called a “very important and unique component,” which is a nice compliment even if it about to be end-of-lifed.