July 7th
–
9th
2010

Workshop Information

The Compilers for Parallel Computing Workshop is a venue for researchers in the area of parallel compilation to meet and present their latest research activities and results. The workshop is held every 18 months.

The workshop covers all areas of parallelism and optimization; from embedded systems through large scale parallel systems and computational grids. Thus, topics of interest include, but are not limited to:

Parallel processing and automatic parallelization

Optimizations for exploiting the memory hierarchy

Optimizations for exploiting Instruction Level Parallelism

Optimizations for power consumption

Profile directed and feedback assisted compilation

High level specification and MatLab compilation

Architectural models and performance prediction

Just-in-time compilation

Dynamic and runtime optimization

Program analysis frameworks and tools

Backend code generation and optimization

Runtime systems

In principle, any topic that is of interest to a compiler designer is of interest for this workshop. To enable participation by as wide a range of research groups as possible, we will restrict contributions to a maximum of two papers per group.

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