Manage Bus-to-Vector Conversions

This example shows how to find and manage implicit bus-to-vector conversions.

Blocks that do not accept buses may implicitly convert buses to vectors. When a bus is treated as a vector, bus elements become inaccessible.

Some buses cannot convert to vectors. For more information, see Bus to Vector.

Identify Implicit Bus-to-Vector Conversions

Open and simulate model ex_bus_to_vector.

To accept the bus, the Gain blocks implicitly convert the bus to a vector.

To identify buses treated as vectors before simulation, use function Simulink.BlockDiagram.addBusToVector.

[blocks] = Simulink.BlockDiagram.addBusToVector('ex_bus_to_vector')

### Processing block diagram 'ex_bus_to_vector'
### Number of blocks left that are connected to a bus being used as a vector: 2
### Done processing block diagram 'ex_bus_to_vector'
blocks =
1x2 struct array with fields:
BlockPath
InputPort
LibPath

To identify buses treated as vectors during simulation, set the Bus signal treated as vector configuration parameter to warning or error. The default setting for Bus signal treated as vector is none, which generates no warning or error message when a block implicitly converts a bus to a vector.

Explicitly Define Bus-To-Vector Conversions

To insert Bus to Vector blocks where blocks implicitly convert buses to vectors, use function Simulink.BlockDiagram.addBusToVector with reportOnly set to false. When you use function Simulink.BlockDiagram.addBusToVector with reportOnly set to false, the function saves the model. To create a writable copy of model ex_bus_to_vector, this example uses the save_system function.

By specifying acceptable bus-to-vector conversions with Bus to Vector blocks, you can more easily identify unexpected conversions. Having configuration parameter Bus signal treated as vector set to warning or error alerts you when an unexpected bus-to-vector conversion occurs.

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