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Abstract

The implementation of IBM System 370 architecture through the use of co-microprocessors was realized on the Personal Computer (PC) XT/370. One of the problems encountered in a system utilizing co-processors is developing an efficient method of passing data and control from one processor to the other. A brief description of the scheme used to accomplish this follows. In the case of the PC XT/370, two Motorola 68000-like processors share the processor load; one being the master, and the other being the slave. The master processor is internally microcoded to interpret 72 of the most frequently used 370 instructions. If the master should encounter an instruction that it does not have in its repertoire, it passes a parameter list through a common storage interface to the slave processor.

Country

United States

Language

English (United States)

This text was extracted from a PDF file.

This is the abbreviated version, containing approximately
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The implementation of IBM System 370 architecture through the use of co-
microprocessors was realized on the Personal Computer (PC) XT/370. One of
the problems encountered in a system utilizing co-processors is developing an
efficient method of passing data and control from one processor to the other. A
brief description of the scheme used to accomplish this follows. In the case of the
PC XT/370, two Motorola 68000-like processors share the processor load; one
being the master, and the other being the slave. The master processor is
internally microcoded to interpret 72 of the most frequently used 370 instructions.
If the master should encounter an instruction that it does not have in its
repertoire, it passes a parameter list through a common storage interface to the
slave processor. The slave, in the case of this implementation, is an "Off the
Shelf" 68000 with an added feature of an extra address pin (25 bits of
addressing). The slave receives a parameter list (which includes the 370
instruction, register contents, effective addresses, etc.) emulates its part of the
instruction, and passes the results back to the master through the calling
parameter list. The slave also performs other less performance-sensitive
functions, like PSW (Program Status Word) swapping, interrupt handling,
communicating with I/O, system timers, etc. In this scheme, only one processor
is executing instructions at any given instance in time. For example, after the
parameter list is passed to the slave processor, the master processor is put to
sleep by asserting its BGACK signal (see Motorola documentation on the
MC68000). Conversely, the slave processor is awoken by deactivating its
BGACK signal. The details on how this switch occurs by controlling the BGACK
signals are explained later. The parameter most commonly passed f...