Abstract

Fundamental physical properties limiting the performance of spin field effect transistors are compared to those of ordinary (charge-based)field effect transistors. Instead of raising and lowering a barrier to current flow these spin transistors use static spin-selective barriers and gate control of spin relaxation. The different origins of transistor action lead to distinct size dependences of the power dissipation in these transistors and permit sufficiently small spin-based transistors to surpass the performance of charge-basedtransistors at room temperature or above. This includes lower threshold voltages, smaller gate capacitances, reduced gate switching energies, and smaller source-drain leakage currents.

Received 29 January 2006Accepted 28 February 2006Published online 18 April 2006

Acknowledgments:

We acknowledge stimulating conversations with T. F. Boggess. This work was supported by DARPA/ARO DAAD19-01-1-0490, DARPA MDA972-01-C-0002, the NSF through Grant No. ECS 03-22021, and the Natural Sciences and Engineering Research Council of Canada.