Electronic Design Automation (EDA) Software

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Development Project of Free & Open Audio Power Amplifier Core Circuit System - based MATRIX 1.4 Platform.
MATRIX 1.4 discovered by HERU HIMAWAN TEJO LAKSONO & MUJIONO IRKHAS from Indonesia. MATRIX 1.4 is free & open technology developed & released under the therms of GNU General Public License V. 3 (GPL3).

lilpM32 is a MIPS-like processor designed in Logisim, assembler program and documentation for them.
Complete assembler and fully functional instruction set with I/O and subroutines features allow to write full-blown complicated programs.

Xschem is a schematic capture program, it allows to create a hierarchical representation of circuits with a top down approach . By focusing on interconnections, hierarchy and properties a complex system (IC) can be described in terms of simpler building blocks. A VHDL, Verilog or Spice netlist can be generated from the drawn schematic, allowing the simulation of the circuit. Key feature of the program is its drawing engine written in C and using directly the Xlib drawing primitives; this gives top speed performance, even on very big circuits. I have succesfully managed to simulate complete VLSI projects with this tool, both digital (Verilog / VHDL) and analog (Spice).
The user interface is built with the Tcl-Tk toolkit, tcl is also the extension language used to send commands to the program. Schematics can be printed in SVG, PNG, PDF, formats. XSCHEM runs on Linux or other Unix-likes with Xorg server and on Windows with the Cygwin layer and required tools installed.

ChronoSVG generates a timing diagram, as used in electrical devices documentations, from a simple and intuitive ASCII source file. The output file is in SVG format, and makes use of CSS to defer the styling details to presentation time.

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Provide a modern open-source set of tools to assist in the planning, construction, and operation of a Low Band (40m, 80m, and 160m) DX amateur radio station. Initial goal is to provide cross-platform functionality of ON4UN's set of tools for Microsoft 95 that can be run on many other systems.
(This project is not connected with ON4UN.)

The aim of the UVE project is to create software that automatically generates a verification testbench (TB) written in SystemVerilog (SV) and integrating the UVM methodology.
UVE makes the rapid development of a verification environment a simple process. The generated TB is directly able to perform random actions on the DUV (design under verification). For this UVE provides a graphical user interface, a code generator, compilation scripts and a library of verification IPs (VIP). One of the main innovations of UVE is a list of TODOs in the TB code which help in finalizing the TB. This is especially useful for developers not familiar with SV and/or UVE, but also experienced developers profit from that easy to use task list.
Moreover, the graphical interface lets the user observe the structure of the generated testbench. Files can be accessed easily by double clicking on the graphical view. Simulation can be launched directly from the tool.

openCarac aims to automatize the characterization of electronic circuits using your favourite Spice simulator and provide output files in HTML, LaTeX (c) and GNU Octave (c) scripts.
openCarac is natively compatible with various simulators including:
- Ngspice (c), http://ngspice.sourceforge.net
- Gnucap (c), http://gnucap.org/dokuwiki/doku.php?id=gnucap:start
- Xyce (c), http://xyce.sandia.gov
It comes with an API which permits to add other features and extend openCarac compatibility; openCarac is also TCL package and comes with functions that can be called in any TCL script.
Adding a GUI is the next step in openCarac development, it will be available in a future release.

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