The objective of this research is to design millimeter-wave wireless transceivers that can handle the data rate of tens of Gb/s, while maintaining an energy efficiency of around 1 pJ/bit. Such a highly efficient wireless transceiver is an essential building block in the wireless network-on-chip (WiNoC) architecture. In future multi-core VLSIs that contain hundreds of cores, the conventional network-on-chip (NoC) architecture will not only consume a significant amount of power, but also entail multiple hops for data to transmit from one core to another. WiNoC is a competitive alternative which can provide direct one-hop links for distant cores. Moreover, to cope with the demand of “green” computing, we’re seeking innovative methodologies to reduce the power consumption of the mm-wave transceivers.