Intel talks about Nehalem, Larrabee & 32nm

On Monday afternoon, Intel allured us with more details of Nehalem, Tukwila and Larrabee on a conference call ahead of next month's Intel Developer Forum in Shanghai, China.

We talked to Stephen Smith, Intel’s Vice President and Director of Digital Enterprise Group Operations, and Ronak Singhal, a Principal Engineer in Intel’s Digital Enterprise Group, about the announcements made. Over the course of this article, we'll discuss what Intel has talked about and how we believe the announcements will impact the market over time.

Tukwila

The Intel Itanium part that we covered when Intel announced several new whitepapers at the International Solid State Circuits Conference in San Francisco last month. It's now been confirmed to have four cores per die, with multi-threading support included as well. This means the chip can churn through two threads per core or eight threads in total.

It’s built on Intel’s 65nm process and features 30MB of cache, dual integrated memory controllers, Intel’s latest QuickPath architecture and two billion transistors. Intel claimed the new Itanium had six times the bandwidth of previous products, which should only be a good thing in the mission-critical environments it'll be deployed in.

Dunnington

We first heard about Dunnington a few weeks ago when Sun Microsystems left an interesting piece of powerpointery on its website. We learned back then that it would be a six-core chip featuring 3MB of L2 cache per pair of cores and then a 16MB L2 cache that's shared across all cores.

Intel confirmed this part’s existence and revealed that it will be available in the second quarter of this year and will only be available as a Xeon product. six core part that will be available in Q2 will be Xeon class only. It’ll feature a total of 1.9 billion transistors, which means it's just short of Tukwila's transistor count – however it will utilise Intel’s smaller 45nm Hi-K fabrication process and feature 16MB of L3 cache. Dunnington will be exclusively for multi processor environments and be compatible with the current “Caneland” platform that launched late last year.