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Spartan-3A DSP FPGA-DSP48 - Why does the Spartan-3A HDL Libraries Guide not have an instantiation template for the DSP48A in the ISE 9.1.03i release?

Description

Why does the Spartan-3A HDL Libraries Guide not have an instantiation template for the DSP48A?

The DSP48A template is marked as "To Be Determined" for ISE 9.1.03i. For this release, you can use the template below. The Spartan-3A HDL Libraries Guide will be updated for a future design tools release and should be used at that time.

Solution

1

Verilog Instantiation Template:

// DSP48A : In order to incorporate this function into the design,// Verilog : the following instance declaration needs to be placed// instance : in the body of the design code. The instance name// declaration : (DSP48A_inst) and/or the port declarations within the// code : parenthesis may be changed to properly reference and// : connect this function to the design. All inputs// : and outputs must be connected.

2

VHDL Instantiation Template:

-- DSP48A : In order to incorporate this function into the design,-- VHDL : the following instance declaration needs to be placed-- instance : in the body of the design code. The instance name-- declaration : (DSP48A_inst) and/or the port declarations after the-- code : "=>" declaration maybe changed to properly reference and-- : connect this function to the design. All inputs and outputs-- : must be connected.

-- Library : In addition to adding the instance declaration, a use-- declaration : statement for the UNISIM.vcomponents library needs to be-- for : added before the entity declaration. This library-- Xilinx : contains the component declarations for all Xilinx-- primitives : primitives and points to the models that will be used-- : for simulation.

-- Copy the following two statements and paste them before the-- Entity declaration, unless they already exist.

Library UNISIM;use UNISIM.vcomponents.all;

-- <-----Cut code below this line and paste into the architecture body---->