Use PSpice To Verify Feedback Amplifier Stability

Feedback systems have a wide range of applications including different types of amplifiers, signal conditioners, power supplies, and voltage regulators. Obtaining their reliable stability sometimes becomes a serious challenge for engineers, which can be simplified by using a computer simulation. Let’s dig into this task by first looking at a model of a negative feedback amplifier and its gain equation (Fig. 1).

1. Shown is a model of a negative feedback amplifier, along with equations in terms of its gain. A portion of the output signal of the amplifier with a gain AOL returns back to its input in inverted polarity by a feedback network with the gain β. When β = 0, the amplifier has no feedback. When βAOL is much greater than 1, the feedback determines the amplifier’s gain. The negative feedback improves the amplifier’s performance, but may cause its instability and oscillation.

AOL and β, as well as their product βAOL, which is called the loop gain, are complex functions of frequency. They both have magnitude and phase properties. For negative feedback, βAOL maintains a phase shift of 180˚ at dc. Function 1/β, which is also called noise gain, is equivalent to VO/VI for non-inverting configurations of amplifiers.

At a certain frequency, βAOL + 1 may become equivalent to zero (βAOL = –1) and VO/VI β→ ∞. As a result, the negative feedback turns to the positive. In turn, the system gets unlimited gain, and due to power-supply limitations, it starts to oscillate or becomes stuck near the power-rail level. Close to this point, the system becomes marginally stable and exhibits significant gain peaking, ringing, and distortion of the output signal.

Feedback Stability Theory states that the system is stable if, as the frequency increases, the magnitude of βAOL reaches 0 dB before the phase shift reaches ±180˚ (±360˚ in total). There are two measures of stability: phase margin and gain margin. Phase margin is the difference between 180˚ and the phase angle of βAOL at the frequency, where its magnitude decreases to 0 dB. Gain margin is the amount of the gain magnitude below 0 dB at the frequency, where the phase delay reaches 180˚.

Bode Plot

A Bode plot graphically represents the gain and/or the phase of complex values versus frequency. It shows magnitude in decibels and the phase in degrees on the linear y-axis and frequency on the logarithmic x-axis. It’s a powerful tool for estimating a feedback system’s stability.

the loop gain (βAOL) can be plotted as the difference in decibels between the AOL and β graphs (Fig. 2b).

2. In these Bode plots for open-loop gain (AOL) and 1/β (a), loop gain (βAOL) can be plotted as the difference in dB between the AOL and β graphs (b).

In this example of an unstable system, the AOL curve is shown with a pole at the frequency (fp) and the 1/β curve is shown with a zero at the frequency (fz). The zero creates an additional pole on the loop-gain curve and the phase shift reaches 180˚ before βAOL reaches 0 dB.

There are two ways to look at system stability when using Bode criteria:

Use a 1/β plot over AOL plot: The feedback system is unconditionally stable if 1/β intersects AOL at a slope no greater than 20 dB/decade. The system will have a marginal stability and may oscillate if this slope is 40 dB/decade or greater.

Use the loop gain: The feedback system is unconditionally stable if the loop gain intersects the 0-dB point at a slope no greater than 20 dB/decade. The system will have a marginal stability and likely will start to oscillate if this slope is 40 dB/decade or greater. This approach is often more convenient than plotting 1/β over AOL, because the βAOL plot can be easily obtained directly from PSpice simulation.

Each pole adds an additional 90˚ in the phase shift (phase plots in Figs. 2a and 2b). A single-pole system is unconditionally stable because it may have a total phase shift of 270˚ maximum. That gives 90˚ of phase margin, and the feedback never becomes positive. Unfortunately we mostly have to deal with potentially unstable multi-pole systems and use frequency-response correction to ensure system stability.

A check for the closing rate on the Bode plot is a simple first-order stability test, but it’s also important to verify the phase margin for the loop gain on the phase plot. To ensure reliable stability and to prevent significant gain peaking, the phase margin should exceed 45˚. A good compromise between minimum gain peaking and fast setting time is a phase margin of 60˚.

Three methods can be used to obtain open-loop Bode plots via PSpice or other Spice-based simulators: using precise bias points; injecting ac signal in the loop using a large inductor and capacitor; and directly injecting the ac signal in the feedback loop.

Using Precise Bias Points

Theoretically, obtaining the loop gain of a feedback amplifier involves:

Breaking the feedback loop at the point with the lowest impedance

Inserting an ac sweeping voltage source in series with a dc bias voltage source between the “input” of the open loop and ground

Choosing the level of the dc bias to keep the system in the linear region

Unfortunately, it’s impossible in real life because the input signal is multiplied by the amplifier’s high open-loop gain. Even with a very precise dc bias source, any fluctuations will bring the output signal to saturation.

Nevertheless, this method usually can be realized with PSpice. First, the bias point analysis should be run with the closed loop. Then the display bias voltages on the schematic page are displayed with the maximum number of digits.

By default, PSpice displays four digits in the results. Set display options for 10 significant digits. In OrCad Capture, for example, open the “PSpice” down menu, next open “Bias Points” and “Preferences…,” and then set the “Display Precision” box for 10 significant digits.

For instance, an equalization amplifier is shown with bias points enabled and set to 10 digits after the bias point simulation (Fig. 3). The amplifier’s gain is boosted at high frequencies by capacitor C1 in its feedback network, prompting concern about the amplifier’s stability.

3. This equalization amplifier has its bias points display set to 10 after simulation.

In Figure 3, the loop’s lowest impedance is the output of V1. The connection of V1 output to R3 becomes a good point to break the loop. Its precise bias value should be copied to the clipboard. It can be used as a dc attribute of an added voltage source in the next simulation. Then take the following steps:

Break the loop at the chosen point and place the voltage source VINS1 between ground and the “input” of the open loop (Fig. 4).

Set the dc attribute of VINS1 to the value copied from the clipboard and the ac attribute of VINS1 to 1 V.

If there are other ac sources in the schematic, set their ac attributes to 0.

4. A voltage source is placed between ground and the input of the open loop.

Now the bias-point analysis can be run again. (Also check the value at U1’s output.) It’s acceptable if U1’s output voltage is within several hundred millivolts from the original value. Otherwise, in rare cases, several digits of the VINS1 dc attribute may need adjustment, followed by running the analysis again, until there’s an approximate initial value at U1’s output.

Finally, ac analysis can be run, and the Bode plot graphs can be obtained in the “probe window” (Fig. 5) as:

βAOL as a difference in dB between the output of U11 and positive terminal of VINS1:

DB(V(U11:OUT))-DB(V(VINS1:+))

AOL as a difference in dB between the output U11 and its negative input:

DB(V(U11:OUT))-DB(V(U11:-))

1/β as a difference in dB between the positive terminals of VINS1 and the negative input of U11:

DB(V(VINS1:+))-DB(V(U11:-))

To obtain the phase portion of the loop plot in the same probe window, add a new y-axis to the Plot menu and place a trace:

P(V(U11:OUT))-P(V(VINS1:+))

5. Bode plots can be achieved via the probe window, such as in this example for an equalization amplifier.

Appropriate Bode plots also can be obtained for other components of Equation 1 (Fig. 1, again):

AOL magnitude graph: DB(V(U11:OUT))-DB(V(U11:-))

AOL phase graph: P(V(U11:OUT))-P(V(U11:-))

1/β magnitude graph: DB(V(VINS1:+))-DB(V(U11:-))

1/β phase graph: DB(V(VINS1:+))-DB(V(U11:-))

From the probe windows, it’s determined via the cursor function that the amplifier’s phase margin is 55.62˚, which means it’s reliably stable.

Inject An AC Signal In The Loop Using Large L And C

Another PSpice method involves inserting a large inductor (Lins) in the amplifier’s feedback loop (Fig. 6). It opens the loop for the ac signal, but keeps it closed for dc. A voltage source (VINS21) injects an ac signal in the loop using a large capacitor (CINS). Note that very large values for LINS and CINS are perfectly acceptable to PSpice simulations in this case.

6. This PSpice method inserts a large inductor (LINS) and large capacitor (CINS) in the amplifier’s feedback loop.

After ac simulation, the magnitude portion of the loop-gain plot can be obtained by plotting the difference in dB between the upper and lower terminals of the inductor. The phase portion of the plot will be the phase difference between the same terminals. In addition, as in the previous example, all other graphs of Equation 1 are obtainable. Results will be exactly the same as those from the first method (Fig. 5, again).

Inject An AC Signal Directly Into The Feedback Loop

To create the simulation circuit for this method, a floating ac source (VINS31) is inserted directly in the feedback loop (Fig. 7). This keeps the loop closed for the dc signal. The ac attribute for the source may have any value, since it doesn’t affect the simulation. However, 1 V is considered a convenient value in this scenario.

To minimize the possibility of an error, the breaking point in the loop with the lowest impedance was chosen. VINS31 injects an ac signal in the loop, creating an ac voltage (V_inj-) on its negative terminal with the respect to ground. This voltage is multiplied by βAOL in the loop and can be measured with respect to ground as V_inj+ on the positive terminal of VINS31.

After ac simulation, it’s possible to obtain the loop gain βAOL by plotting the ac voltage difference in dB between positive and negative terminals:

DB(V(VINS31:+))-DB(V(VINS31:-))

This simulation also gives us exactly the same results as in previous examples (Fig. 5, again).

Overall, it’s the simplest and often the most convenient method, particularly if additional ac analysis is planned for later in the design process. VINS31can be kept in the PSpice schematic without having to change the schematic for a different type of analysis-simply set ac and dc attributes to zero. In this case, VINS31doesn’t affect the circuit or the simulations because it represents a shorted point.

For example, direct injection is used to estimate the stability of a 0.75-V, 1.5-A linear regulator (Fig. 8). Based on the simulation results we will correct the loop frequency response if necessary.

8. Direct injection is used to estimate stability of a 0.75-V, 1.5-A linear regulator.

The regulator contains an op amp (U1) and an output emitter follower (Q1). Together they’re configured as a non-inverting amplifier with the gain of one. The 0.75-V reference voltage source is connected to the amplifier’s positive input.

The regulator powers a circuit board with number of ICs and bypass capacitors, a 100-µF electrolytic capacitor, and several ceramic capacitors that equal 10 µF in total capacitance. The output network of the regulator is formed by the electrolytic capacitor (Cel) in series with its ESR resistor (Resr), the total value of ceramic capacitors (C_cer), and the load resistor (R_Load). This network adds two poles and one zero to its open-loop Bode plot and creates an uncertainty on the loop stability.

To obtain the Bode plot, an ac source (V_ins) was inserted in the low impedance point of the loop, between R4 and R5. After simulation, the probe window shows the magnitude of the βAOL:

9. The Bode plot created for the linear regulator in Figure 8 indicates that it’s unstable.

Measurements indicate that the βAOL intersects the x-axis with the slope of 40 db/decade or more, the negative phase margin of –35˚, and the negative gain margin of –15. This indicates an unstable linear regulator that requires a frequency correction.

There are many compensation methods. Figure 10 presents one possible solution. The compensation network consists of a 3.3k resistor R_corr in series with a 47-pF capacitor and C_corr between the negative input of U1 and the base of Q1. Together with R4 this network creates an additional zero in AOL and ensures the reliable stability.

10. This schematic shows a corrected version of the linear regulator in Figure 8, thanks to the use of compensation.

Simulation results of the compensated network show that βAOL provides a stable 20-dB/decade rate of closure, 11 dB of gain margin, and 67˚ phase margin (Fig. 11). This indicates that the linear regulator is reliably stable with the chosen correction.

11. The βAOL Bode plot of the corrected regulator in Figure 10 reveals that the device is reliably stable.

Acknowledgement

The author wishes to thank Phil Perkins, LTXC Corp. fellow and the author of a number of technical publications, for reviewing this article and making important recommendations.