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Languages for HW and SW Development Ondrej Cevan

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Languages for HW and SW development HDL Format and Syntax • Boolean Description Using VHDL • The keyword ENTITY defines the interface of the circuit block, in this case: and_gate • The keyword PORT defines the inputs and outputs. • The keyword ARCHITECTURE describes the operation inside the block. • The BEGIN and END contain a description of the operation • The keyword CONFIGURATION maps architecture with entity • operation processed whenever a signal change occurs on “a” or “b” input pin

Languages for HW and SW development System Level Design • language for System Level Design must be able to describe the whole system, consisting of SW and HW • support for concurrency, synchronization, exception handling, concept of time, complex functionality • support for simulation and verification at every design level, support for ordinary Prog.L. syntax (C++) • HDL & Prog.L. merge into System Description Language => SystemC, SystemVerilog • SLD enables to develop SW for specific HW not produced yet

Languages for HW and SW development Conclusion • basic differences in concurrency support and the purpose (el. circuit vs. machine code) • HW developers should have deeper understanding of how the code can be translated into HW • with growing complexity of the computation systems the demand for high-level languages for SW and HW development grows too • modern tools are very effective in translating high-level abstractions into low-levels (levels closer to silicon) • trend: merging HW and SW development process => SystemC (more in the following presentation)