ReRAM Is Memory Focus at IEDM

Advanced memory research is focused on ReRAM, MRAM, and vertically stacked memory, to judge from the advance program of the International Electron Devices Meeting 2013. However, there is at least one NAND paper due to be presented that could grab attention.

Research papers on novel forms of nonvolatile memory, grouped under the term resistance RAM (ReRAM), will dominate the memory topic at this year's International Electron Devices Meeting, set to take place at the Washington Hilton Hotel Dec. 7 to 9.

Whereas in previous years IEDM featured a great many papers on flash memory and DRAM devices, both these categories are conspicuous by their near absence from the advance program for the 2013 IEDM.

The change to a focus on ReRAM, magnetic RAM, and 3D memory research reflects the conventional wisdom that NAND and NOR flash memory will not scale far beyond 20 nm and that other nonvolatile memory structures must be found, explored, and understood.

IEDM 2013 does include numerous papers on phase-change memory, a form of resistance memory that has made it to commercial production with a 1 Gbit component implemented in a 45 nm process by Micron Technology. However, these papers mainly take the form of modeling and reliability studies, or detail the introduction of complexity to deal with pre-existing limitations of the technology.

However, there is one NAND flash memory presentation that is likely to be well attended. The Session 3.6 paper, written by engineers from SK Hynix is on NAND flash memory cells made using a process with minimum geometry at about 14 to 16 nm and using an air-gap between bitlines to reduce bitline-to-bitline interference. The abstract of the paper states that the use of the air-gap reduces bitline crosstalk to the level of the company's 2Y process generation and reduces the effect of process variation on threshold voltage. The result is a mid-1Xnm MLC NAND flash memory with "superior manufacturability and acceptable reliability," the abstract claims.

While IEDM is an academic research conference, this result supports the likelihood that the industry will continue to scale NAND flash to about 15 nm geometry before jumping back to coarser and easier to manufacture processes for 3D-NAND memories. (See: Intel outlines 3-D NAND transition.)

Good queston. Although, according to Chua, there is a functional relationship between charge and flux (magnetic flux), which is the time integral of current and the time integral of voltage. The slope of this function is what he calls memristance. By this definition, a normal resistor is also a memristor. It just has a constant memristance (slope = 1). When memristance is constant, it is just defining Ohm's law.

These are theoretical electrical components. There will never be a real-world device, from HP or anyone else, that is purely a memristor, just as there will never be a device that is purely a capacitor or inductor. So, in that sense, if the application of current causes a change in resistance, then the term memristor could apply, just as we give the term resistor to a device even if it also ehibits some capacitance.

It is interesting to find several more Arxiv papers on the discussion of memristor. I'm wondering whether they have tried to a journal, or just posted there. The memristor paper machine guys might need to answer the questions before their continuing using such a word, even it is really mysterious to them.

It is also interesting to find the pour of memristor neural networks papers from the biology guys.

I have just finished reading a Nature Nanotech paper by HP in 2008, another key paper by HP on memristor.

The experiments there cannot even be regarded as a normal "design of experiments" concept, but such a paper can finally pass the peer-review process, and now with high citations. Any well-trained physicist will not accept the method and the superficial analysis described in this paper.

The resistive switching is a good concept for device development. Some very good results have been shown. There could be good future for ReRAM.

The "memristor", most of us even do not know what it is, should be kept as it was in 1970s, until a sound physical model has been shown. Any mathematicl modelling for a physical concept must be based on basic physical principles.

In my opinion, the misleading "memristor" concept will not help but hurt the development of ReRAM devices. Before the HP works, there were already some excellent pioneer works on resistive switching.

I just read several papers on this. It is interesting to find that even the whole paper is talking about a phenomenon which can be explained by the known classical semiconductor physics principles, there is always a "memristor" word in the title. For example, the papers from one group from the University of Michigan, who recently announced the release of a chip based on such a concept (a so-called Crossbar comapny).

"Memristor" looks like a new thing from "resistor, capacitor and inductor", but unfortunately I can find nothing new in these papers. They talked the same thing in the textbooks. I'm wondering whether they really understand what "memristor" means before they put this new word in their papers.

What is called "resistance switching" is a sort of phenomena. Under certain conditions, "resistance switching" behavior can be brought about in various metal/insulator/metal structures after a soft-breakdown of the insulating material has occurred. Such effects could offer the potential for nonvolatile memory applications (ReRAM or RRAM). "Resistance switching" phenomena are well known since decades /1/ and are in no way related to the concept of "memristor/memristive" systems. Nevertheless, there is ongoing research because there are still a lot of questions with respect to the underlying physical mechanisms. Understanding into the probabilistic nature of the "resistance switching" operation is, for example, crucial to get grip on reliability issues of ReRAM devices.

What is called "memristor" is a sort of hypothetical concept. "Memristors" are conceptually defined by a unique set of characteristic mathematical state equations – based on the mathematical framework proposed by L. Chua /2/. Thus, solid state memory devices should only be labeled "memristors" if one is able to propose a reasonable physical model that satisfies these state equations.

Any scientific evidence that "memristors" might exist in physical reality is missing so far. HP's "memristor" model which was presented in 2008 in the NATURE paper "The missing memristor found" /3/ is, e.g., based on severe electrochemical misconceptions: one cannot derive the characteristic dynamic state equations of a "memristor" on base of HP's dopant drift model, i.e., no memory devices can operate in accordance with the model because the model is by itself in conflict with fundamentals of electrochemistry /4/. Thus, up to now nobody has invented or found a memory device which operates like a genuine nonvolatile "memristor".

Moreover, the nonvolatile "memristor" concept raises some severe questions when viewed from the perspective of non-equilibrium thermodynamics /4, 5/. Nonvolatile information storage requires the existence of energy barriers that separate distinct memory states from each other. "Memristors" whose resistance (memory) states depend only on the current (like the HP memristor) or voltage history would thus be unable to protect their memory states against unavoidable fluctuations and therefore permanently suffer information loss:the proposed hypothetical concept provides no physical mechanism enabling such systems to retain memory states after the applied current or voltage stress is removed. Such elements can therefore not exist, as they would always be susceptible to a so-called "stochastic catastrophe" /5/. It is therefore pointless to tinker with this concept in order to describe physical phenomena like "resistance switching" effects.