Receiving over I2S2 from STA321MP affects I2S3 clock when sending over it

I'm trying to send data over I2S3 while simultaenously receiving data from I2S2. Yes, I know about the full duplex ability, but my plan is to receive two stereo channels while send out one stereo channel.

My board is STM32F439I-EVAL2. I have an external STEVAL-MKI126V2 board, which I want to use without a Windows-controlled board such asSTEVAL-MKI138V1, so I need to provide the clock myself. I have removed R265 and disconnected CN5 as suggested by the documentation for disconnecting the other hardware from PC9. (I have not yet tried what happens if I let the controller board drive the clock.)

I'm trying to send a 12.288MHz clock over MCO2 output to STA321MP and I almost succeed in that with HSE=25M, I2SN=258, I2SR=5 and MCO2DIV=3 giving me
12285814. So this might be part of my problem, the frequency isn't exact. (I can hit it more exactly, but I figured it might be a good idea to have the desired frequencies vary from the optimal one for MCO and I2S3CK by the same amount.)

However, my actual problem is this: when I start receiving the properly timed signal from STA321MP, I2S3 clock signal starts getting glitches, as seen in the picture below (channel 5), even though I don't see how receiving from I2S2 would affect sending on I2S3 in this way:

When I remove the wire from MCO to XTI, it looks normal, though of course the I2S2 channel clock is way too slow (11 kHz instead of 48):

Watching from the oscilloscope there don't seem to be visible glitches in the I2S3 SCK, though the bottoms and the tops of the signal aren't very flat and there is some effect when I disconnect/reconnect the MCO wire. Of course, singular glitches are very difficult to observe with an oscilloscope, even if they do appear relatively often.

Perhaps my jump wires are too long and catch too much interference, maybe this could be a purely noise floor/electrical matter? Or is there something configuration-wise that could cause this happen? Or perhaps lack of understanding how the I2S clocks work in when data is both being received and sent via different I2S blocks..

I2S2 (the receiving one) is configured as 16 bit extended 48K Phillips I2S with SlaveRX, while the sending I2S3 is configured with plain 16 bit and MasterTX. Neither is configured to send master clock, though fiddling with that helps nothing.

Thanks for help, any insight is appreciated :). I have 12.288 crystals ordered, but it'll be long next week when they arrive.