AES E-Library

AES E-Library

Noise Power Modulation in Dithered and Undithered High-Order Sigma-Dela Modulators

Dithering and noise power modulation in low- and and high-order oversampled sigma– delta modulators is investigated. Previous publications have presented theoretical analyses of quantizer distortion and noise power modulation in undithered and dithered LPCM quantizers and low-order sigma–delta modulators. However, simulations on practical implementations tend to document only distortion and idle tones and pay no attention to noise power modulation. Consequently there has been some dissension on the requirements for dithering of higher order sigma–delta modulators. Functional simulations of individual error moments in register transfer level models of dithered and undithered sigma–delta modulators are discussed, including first-order and realistic high-order examples. The fundamental difference between 1-bit and multibit quantization is addressed, and two modern techniques for improving 1-bit performance—dynamic dithering and trellis noise shaping—are investigated. Baseband noise power modulation performance is emphasized and shown explicitly for each example since the baseband, although containing only a small portion of the total noise power, is the practical region of interest for oversampled devices. This discussion should provide a pragmatic context in the debate on dither requirements and how to analyze and achieve good noise power modulation performance.