Synopsys ports DesignWare IP to SMIC 40-nm process

LONDON – EDA software provider Synopsys Inc. (Mountain View, Calif.) has announced its DesignWare family of circuit designs is being ported to a low-leakage 40-nm process technology in use at Semiconductor Manufacturing International Corp. (Shanghai, China). The low-leakage 40LL process is aimed at SoCs for mobile markets.