Cray tips its hand in M petaflops bid

San Jose, Calif. -- Cray Inc. has tipped details of its road map through 2010 as it prepares a strategic bid for a $200+ million government contract to build a petaflops computer. The troubled supercomputer icon's plans shine a light on the future of high-end systems and suggest that Advanced Micro Devices Inc. may keep ahead of Intel Corp. in server CPU design for the rest of the decade.

Cray described Cascade, a cluster-in-a-box planned for 2010 that will deliver a mix of scalar, FPGA and hybrid vector/massively multithreaded processors. The Cascade plan will vie with proposals from IBM Corp. and Sun Microsystems Inc. to win funding from the Defense Advanced Research Projects Agency (Darpa).

The U.S. companies are locked in a global race with Japan's NEC and three Chinese vendors to deliver the first computer to break the petaflops barrier. The Chinese competitors are Lenovo, which last year purchased the PC division of IBM; Galactic Computing (Shenzhen), a startup led by U.S. supercomputer designer Steve Chen; and Dawning Information Industry Co Ltd. (Beijing).

Proposals are due within weeks from Cray, IBM and Sun for Darpa's High Productivity Computing Systems project. HPCS aims to accelerate development of multipetaflops systems that would be radically easier to program than today's supercomputers.

"I don't know if this is a make-or-break deal for Cray, but it certainly will be critical to their long-term viability," said supercomputer expert Jack Dongarra, a distinguished professor in the Computer Science Department at the University of Tennessee.

High-performance technical computing "is our only focus," said Steve Scott, Cray's chief technology officer. "We are very serious about it. So the HPCS Phase 3 funding is a big deal for our company. It allows us to 'think out of the box' about systems a few years ahead of what we are used to."

AMD's leadLast summer, Cray undertook a months-long evaluation of whether it would continue with AMD or switch to Intel as its strategic processor supplier through 2010. After reviewing both companies' road maps, Cray judged AMD's technically superior and thus decided to stay put.

"We were serious about switching to Intel if that made more sense, [but] we really like what AMD is doing," said Scott. "We are very happy with the AMD processor cores and systems interfaces. They have been leading Intel for a few years, and we see that likely to continue."

That word comes just as Intel has disclosed its Core microarchitecture in a bid to close the gap with AMD on performance and power (see story, page 1).

From Cray's perspective, one of AMD's crown jewels is HyperTransport, the gigahertz coherent interconnect on AMD's CPUs. Last fall, just a week after Cray made its decision to stick with AMD, Intel announced that introduction of its CSI processor interconnect would be delayed a year (search www.eetimes.com for article ID: 60404677). Though Intel has been sketchy on the details, CSI is believed to refer to Coherent Scalable Interconnect, a HyperTransport-like point-to-point inter- connect for directly linking processors that contain embedded memory controllers. Intel had suggested it would use the technology on both its Itanium and Xeon processors in 2007.

Intel still plans to use CSI on its Itanium CPUs, probably next year, said a senior computer engineer who asked not to be identified.

Meanwhile, the HyperTransport Consortium is weeks away from launching HT 3.0, which is expected to at least double the bandwidth of that interconnect while lowering latency and leaving the underlying protocol largely unaltered. "The spec is in progress, and we are absolutely on schedule," for a mid-2006 release, said consortium chairman David Rich.

Other factors beyond HyperTransport figured in AMD's favor when Cray made its decision, Scott said. They included AMD's use of an integrated memory controller, which reduces memory latency to about 53 nanoseconds, and its elimination of the north bridge chip, saving board space, power and cooling.

But Intel CTO Justin Rattner counters that embedding a memory controller creates a more power-hungry CPU. "We come down on the side of keeping the memory controller in the chip set," he said.

In its new architecture, Intel has ratcheted up its front-side processor bus to a surprising 1.33 GHz. "Intel did a better job than I thought with Core," said Nathan Brookwood, principal of market watcher Insight64 (Saratoga, Calif.). "AMD's performance advantage will narrow as the year progresses. They may even lose [it]."