Intel is preparing their Skylake-EP Xeon E5 processor lineup for launch in 2017. The new platform will support several SKUs designed for the sever market which will house a high amount of cores for faster performance on the HPC front.

The chip that has just leaked is a beast in terms of technical specifications. Part of the Skylake-EP lineup which launches next year, the Xeon E5-2699 V5 (ES) has been leaked over at a Chinese retail site. This processor has a base clock of 2.10 GHz and it has a pretty PCB since it’s designed for the latest LGA 3647 socket. The more interesting thing about this processor is its core count which shatters everything that Intel has done before.

According to the leak, the Skylake-EP Xeon E5-2699 V5 chip houses 32 cores and 64 threads. This is a pretty huge core count increase from the last generation. The Xeon E5-2699 V4 chip had 22 cores and 44 threads. The chip is still not labeled correctly so there’s a slight possibility that the clock speeds may increase. But since this is a chip with lots of cores stacked inside it, the clock speeds won’t be much higher.

The Skylake-EP Xeon E5 V5 chips come with 3647 LGA pins.

It’s really interesting that Intel is preparing such a chip when their slides showed no plans for a 32 core chip on the Xeon E5 V5 line. The maximum core count was hinted at 28 cores but this move could be to directly tackle the AMD Naples core which would also house 32 Zen cores and 64 threads. Intel usually has Xeon E5’s spec’d with lower cores compared to the E7’s which have 2 to 4 extra cores. The other possibility is that Intel is going to offer Skylake-EP (Xeon E5) and Skylake-EN (Xeon E7) with the same number of cores. The difference would be that Skylake-EN can be supported on 8S+ platforms.

Intel announced general availability of Skylake-EP chips in mid of 2017. This is around 7-8 months from now and we expect a launch around Computex 2017. Intel has made several HPC focused optimizations in Skylake-EP chips, some of which include Advanced Vector Instructions-512 to boost floating point calculations and encryption algorithms. Intel has also integrated Omni Part architecture in these chips for high speed network and interconnects.

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The Purley platform is a scalable and unified platform that would support 2S, 4S and 8S+ chips in the Skylake-EP and Skylake-EN lineup. It will feature the Storm Lake Gen 1 architecture. This is Intel’s next generation Omni-Path interconnect that will be featured on Purley. The Lewisburg PCH will be powering the entire platform. The new fabric can deliver up to 100 GB/s interconnect speed with 56% lower latency compared to the current generation Infini-band Inter connect. It allows up to 48 ports with the new Switch Chip architecture.

Intel’s LGA 3647 Socket is Massive and So Are The Skylake-EP Chips

The new platform also comes with an updated socket. The socket has been upgraded to feature 3647 pins that gives it the LGA 3647 name. The socket is surrounded by 12 DDR4 DIMM slots. This is due to support for next-generation hexa-channel memory and Intel’s Optane DIMMs for faster latency solutions. Overall, Purley will be expanding Intel’s server platform wit a range of new features.

Skylake Xeon V5 will be going up against AMD’s Zen based Naples platform next year. Intel has for long reigned dominant in the server market. However, AMD is confident that their chips will feature performance parity with their rivals after a very long time. You can learn more about AMD’s Naples platform here.