The is a Low-Power CMOS LSI microcircuit designed for Tone Operated Voice Privacy in communication systems. This half-duplex device consists of a Fixed Frequency Voice Band Inverter interfaced with a Continuous Tone Controlled Squelch System (CTCSS) Encoder/ Decoder, whose allocated tone is used for voice privacy and audio squelch operation. Frequency Inversion is achieved by modulating the input audio with a fixed carrier frequency to exchange the high and low frequencies of the voice band, making the resulting audio output unintelligible to receivers not equipped with a compatible system. The on-chip CTCSS Dencoder is capable of encoding and decoding any one of 38 sub-audio tones in the range to 250.3Hz, these Xtal derived tones are selected a 6-bit binary word that can be loaded to the device in either a serial or parallel format. The Privacy function is exclusive only to units using the same tone set, other intercepted signals remain "as transmitted." A 'Press to Listen' facility allows monitoring of the channel prior to transmitting. This device has separate, switched Rx and Tx voice, and tone audio paths. Voice paths use switched capacitor bandpass filters for the attenuation of subaudio tones and unwanted modulation products. 6dB/octave pre- and de-emphasis filtering in the Tx path maintains natural sounding audio from this device when embodied in communication transceivers. The FX375, which is available in DIL and SMT packages, can be simply controlled by switches, or interfaced to a µProcessor. External requirements are a single 5-volt supply, an external 4.0MHz Xtal or clock input and signal coupling components.

Xtal/Clock: The input to the clock oscillator inverter. An external 4MHz Xtal or clock input to be applied at this pin. See Figure 2.

Xtal: The 4MHz output of the clock oscillator inverter. See Figure 2.

Load/Latch: This input regulates the operation of the eight input latches D4, D5, Rx/Tx and Private Enable for both parallel and serial input load modes. Rx/Tx and Private Enable inputs can be used independently in either mode by the use of Load/Latch and Control inputs configured as shown in Table 3, the data format ­ D5), remains as set. This input has an internal 1M pullup resistor.

The Rx/Tx tone programming and function inputs. Programmed as shown in Table 2 these inputs will select the CTCSS tone frequency and parallel or serial loading function. Notone, when set in receive, enables the Rx Audio Output and forces the Rx Tone Decode Output to a logic '0,' in transmit the Tx Tone Output is held at VBIAS (Notone). These inputs each have an internal 1M pullup resistor. or LS package styles are used Pin 5 (Serial Enable 2) should be externally connected to VSS.

Tx Tone Output : This is the buffered, programmed CTCSS tone sinewave output in Tx. During Rx and Notone operation this output is held at VBIAS. See note "g," page 7 with reference to capacitive load limits of this output. VBIAS : This bias pin is set internally VDD/2. It must be externally decoupled using a capacitor, of 1.0µF (minimum) to VSS, see Figure 2. Filter Output : The Input Audio Bandpass Filter output, this pin must be connected to the Balanced Modulator Input via a capacitor, C6, and decoupled to VSS by C10, see Figure 2. Balanced Modulator Input : The input to the Balanced Modulator, this pin must be connected to the Filter Output via a capacitor, C6, see Figure 2. Rx Audio Output : Outputs the received audio from a buffered output stage and is held at VBIAS when in Tx. Tx Audio Output : The output of the audio path in the Tx mode and is held at VBIAS when in Rx. Rx Audio Input : The Audio input pin for the Rx mode. Input signals should be a.c. coupled via an external capacitor, C4, see Figure 2. Tx Audio Input : This is the voice input pin for the Tx mode. Signals should be a.c. coupled via an external capacitor, C3, see Figure 2. PTL : The "Press To Listen" function input, in the receive mode a logic '0' enables the Rx Audio Output directly, overriding tone squelch but not intercepting a private conversation. In the transmit mode a logic '0' reverses the phase of the Tx Tone Output for "squelch tail" reduction (see Table 1), this function, in Tx, should be accurately applied by a timing circuit to ensure correct system operation. Control : This input, with Load/Latch, selects the operational mode of Rx/Tx and Private Enable functions, see Table 3. Rx/Tx : Selects the receive or transmit mode (Rx = '0') and can be loaded by serial or parallel means, as described in Table 3. Private Enable : This input selects either Private or Clear modes (Clear = '1', Private ='0'), and can be loaded by serial or parallel means, as described in Table In Rx this input could be taken from the Rx Tone Decode Output. This input has an internal 1M pullup resistor. Rx Tone Input : The received tone input to the on-chip CTCSS decoder and should be a.c. coupled via capacitor C5, see Figure 2. VDD : Positive supply rail. A single +5V power supply is required.

5962F9467602VPA : Radiation Hardened, Ultra High Speed Current Feedback Amplifier. Radiation Hardened, Ultra High Speed Current Feedback Amplifier The is a radiation hardened high speed, wideband, fast settling current feedback amplifier. Built with Intersil's proprietary, complementary bipolar UHF-1 (DI bonded wafer) process, it is the fastest monolithic amplifier available from any semiconductor manufacturer. These devices are QML approved.

M65667SP : Picture-in-picture Signal Processing. Notice:This is not a final . Some parametric limits are subject to change. The is a NTSC PIP (Picture in Picture) signal processing LSI, whose sub and main-picture inputs are composite and Y/C separated signals, respectively. The built-in field memory (96k-bit RAM) ,V-chip data slicer and analog circuitries lead the PIP system low cost and small size.

CY8C9520 : I/O Expander with EEPROM The CY8C95xx is a multi-port I/O expander with on-board user-available EEPROM and several PWM outputs. All devices in this family operate identically but differ in I/O pins, number of PWMs, and internal EEPROM size. The CY8C95xx operates as two I2C slave devices. The first device is a multi-port I/O expander (single I2C address.

ADG1334 : Quad SPDT ±15 V/+12 V Switch The ADG1334 is a monolithic CMOS device comprising of four independently selectable SPDT switches designed on a CMOS process. When the switches are on, each switch conducts equally well in both directions and has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies.

stg3692 : Package A free-form text of the package type. Status The current status of a product: Preview: Product proposal has been announced. Evaluation: The period in which customer samples become available. Active: Product is in volume production., NRND: Not Recommended for New Design, Product is fully available to support existing customers but is not recommended.