Hello. And welcome to the TI Precision Lab introducing AC and DC Specifications. Precision Labs is a comprehensive online curriculum for analog engineers. More videos can be found by going to TI.com/PrecisionLabs. In this video, we'll define offset error, gain error, common mode rejection ratio, and power supply rejection ratio. We will also give a brief introduction to the AC specifications of signal to noise ratio and total harmonic distortion.
Let's start with the basic calculation for offset and gain error. The key to understanding this is to know that the ADC transfer function is not perfectly linear. So a linear fit curve is applied to the function. For this calculation, the most commonly used type of curve fit is an endpoint linear fit. With this type of curve fit, the first and last points on the ADC transfer function define the straight line.
Recall that a straight line has the equation y equals mx plus b. Also the slope can be calculated by taking the change in y divided by the change in x. Sometimes this is referred to as the rise over run.
The offset is the Y-axis intercept. That is, the offset is the value of the transfer function when x equals 0. This value can be calculated by rearranging the equation y equals mx plus b and solving for b where b is the offset.
The gain error is the percentage difference between the ideal slope and the measured slope. The gain error and offset error are often referred to as DC errors, as they can be measured with DC input signals plot.
Let's take a closer look at offset error. Here we introduce the concept of common mode rejection and power supply rejection. The common mode voltage is the average voltage applied to both inputs. As this input changes, it will introduce an error source that can be modeled as an offset voltage source on the ADC input VCM error. The magnitude of this error source can be determined using the common mode rejection ratio, or CMRR, specification.
CMRR is usually specified in decibels and can be calculated by taking negative 20 times the log of the change in common mode error divided by the change in common mode voltage. This equation can be rearranged to solve for the change in common mode error based on the change in common mode voltage.
Power supply rejection, or PSRR, also generates an error source in series with the ADC input. Power supply rejection error is a function of the change in the power supply voltage. Variations or noise on the power supply will reflect back to the input as an error source. The equation for power supply rejection is the same form as the common mode rejection. But in this case, it is based on power supply variations. Again, this can be rearranged to solve for the change in power supply rejection error based on the change in supply voltage. We will take a closer look at CMRR and PSRR in the next few slides.
This slide shows an example of an ADC's common mode rejection specification. A simple way to test common mode rejection is to connect the two inputs together and sweep the common mode voltage. Remember that common mode voltage is the average of the voltage on the two inputs. So when the inputs are tied together the input signal is the common mode voltage.
In this example, if we want to sweep the common mode voltage from 5 volts to 2 and 1/2 volts, the change in common mode voltage is 2 and 1/2 volts. Substituting these numbers into the common mode rejection equation, we can see that the common mode error is 25 microvolts.
Power supply rejection looks at the air introduced by a change in the power supply voltage. This shift can be a DC change in the supply voltage, or it may be a noise signal. For this example, let's consider a 200-millivolt peak to peak 200-kilohertz noise signal on the supply. Normally, the specification listed in the datasheet table is the PSRR for DC changes in the power supply voltage. For the PSRR over frequency, a bully plot may be shown in the characteristic curves section.
In this example, we can find that the PSRR is 58 dB at 200 kilohertz. Using the PSRR Equation introduced earlier, we can determine the error introduced by the power supply rejection. Plugging the 200-millivolt peak to peak and 58 dB into the equation yields a noise of 252 microvolts peak to peak.
Let's move on to the next specification. This slide shows the general equation for a data converter's signal to noise ratio or SNR. In general, the signal to noise ratio is a measurement of how clean or noise-free a signal is. A high SNR indicates that the signal is very large in comparison to the noise, whereas a low SNR indicates that the noise is high relative to the signal.
For this specification, both the noise and signal are measured and volts RMS. So you need to take 20 times the log of the ratio to convert it to decibels. The ideal SNR in decibels can be calculated by taking 6.02 times n plus 1.76 where n is the number of bits of resolution of the ADC. A 10-bit converter, for example, would have 6.02 times 10 plus 1.76 or 61.96 decibels.
This relationship was derived by integrating the quantization noise and applying the signal to noise relationship. This relationship is true for an ideal converter where the only error source considered is quantization noise. No practical data converter will ever have a better signal to noise than what is given by this equation, because practical converters have other noise sources.
Another common AC specification is total harmonic distortion or THD. In order to understand THD, it is important to understand nonlinearity. Nonlinearity is a measurement of how much a transfer function deviates from its ideal straight line. The transfer function shown on the left-hand side of the slide shows an ideal linear transfer function and a nonlinear transfer function. The ideal transfer function follows a straight line in the form y equals mx plus b, whereas the nonlinear transfer function will have higher order terms causing deviations from the line.
The nonlinear example shown is exaggerated to make the nonlinearity easy to see. Notice how the nonlinear function tracks well for low-input voltage levels and deviates as the input increases. In short, the gain for higher-input signals is larger than it should be. This has the effect of stretching out the top half cycle of the sine wave. This stretching of the top half cycle is called distortion and will create harmonics in the frequency spectrum.
This slide shows the frequency spectrum for the digitized sine wave at the right. The harmonics are a result of the distortion on the top half cycle of the waveform. Harmonic distortion will always occur at integer multiples of the fundamental frequency. In this case, the fundamental is at 1 kilohertz, and there are harmonics at 2 kilohertz, 3 kilohertz, 4 kilohertz, and so on.
Sometimes, it is useful to differentiate between even and odd harmonics, as different circuit non-idealities may generate one type of harmonic. Even harmonics are even multiples of the fundamental frequency. And odd harmonics are odd multiples of the fundamental. For example 2 kilohertz and 4 kilohertz are even harmonics, whereas 3 kilohertz and 5 kilohertz are odd harmonics. If the digitized signal perfectly tracked the input signal, there would not be any harmonics.
The THD calculation is given here as a percentage as well as in decibels. The IEEE standard for ADC testing specifies that nine harmonics should be used in the THD calculations. THD is the square root of the sum of the harmonic voltages squared divided by the RMS signal voltage squared. This quantity is multiplied by 100 to convert to a percentage, or 20 times the log is taken to convert to decibels.
THD plus N is similar to THD, except that it includes the total RMS noise in the calculation. SINAD is short for signal to noise and distortion. Mathematically, SINAD is simply the reciprocal of the THD plus N calculation. In decibels, taking the reciprocal will just change the sign of the number. Note that SINAD or THD plus N will always be worse than either the THD or SNR, because SINAD is really a combination of the two error sources.
That concludes this video. Thank you for watching. Please try the quiz to check your understanding of this video's content. 您好。 歡迎收看 TI 精密實驗室， 本次介紹的主題為 AC 與 DC 規格。 精密實驗室為 適合類比工程師的 全方位線上課程。 如需更多影片 請造訪 TI.com/PrecisionLabs。 在這支影片中， 我們將定義偏移誤差、 增益誤差、共模拒斥比及 電源供應拒斥比。 我們也會 簡單介紹 訊噪比的 AC 規格 與總諧波 失真。 我們先從偏移與增益誤差的 基本計算開始說明。 錯誤.
了解基本計算的 關鍵在於 必須清楚 ADC 轉換函數並非完全線性。 因此我們在函數 採用線性擬合曲線。 此計算中最常用的 曲線擬合類型為 端點線性擬合。 透過這種曲線 擬合，便可以 在ADC 轉換函數的 第一與最後一個點定義直線。 若您還記得， 直線的方程式為 y 等於 mx 加 b。 我們也可將 y 改變幅度除以 x 改變幅度， 來算出斜率。 有時候我們將其稱為 執行的上升程度。 偏移是 Y 軸 的截距。 也就是說，偏移是 X 等於 0 時的 轉換函數值。 我們可重新排列 y 等於 mx 加 b 等式 並算出 b， 得到的 b 值 就是偏移。 增益誤差是 理想斜率 與測量斜率間的 百分比差異。 增益誤差和 偏移誤差又常稱為 DC 誤差， 因為可透過 DC 輸入訊號圖來進行測量。 我們來仔細 看看偏移誤差。 接下來我們介紹 共模拒斥比及電源 供應拒斥的概念。 共模電壓是 施加在兩個輸入 上的平均電壓。 當輸入改變， 便會造成誤差來源， 我們可將此誤差來源 視為 ADC 輸入 VCM 誤差的偏移電壓來源。 此誤差來源的 幅度可透過 共模拒斥比規格， 又稱 CMRR， 來加以判定。 CMRR 通常以 分貝為單位， 計算方式是 將負 20 乘上 共模誤差 變化除以共模電壓 變化之 對數。 我們可將此 等式重新排列， 以共模電壓 變化來求得 共模誤差 變化。 電源供應拒斥 又稱為 PSRR， 也可產生與 ADC 輸入 串聯的誤差來源。 電源供應拒斥誤差 是電源供應電壓 變化的 函數。 電源供應的 變化或雜訊 會以誤差來源形式 反應回輸入上。 電源供應 拒斥等式與 共模拒斥的 形式相同。 但使用的是 電源供應變化。 我們同樣可將其 重新排列， 以供應電壓變化來 求出電源供應拒斥誤差。 接下來幾張投影片中，我們會 更仔細地 討論 CMRR 和 PSRR。 本投影片為 ADC 共模拒斥規格範例。 規格.
測試共模拒斥 有一種簡單方式， 可將兩個輸入 連接在一起， 然後對共模電壓進行掃頻。 請記得共模 電壓是兩個輸入 上的電壓 平均值。 因此當輸入 連接在一起時， 輸入信號便為 共模電壓。 在此例中， 若想對 5 伏特 到 2.5 伏特共模 電壓進行掃頻， 共模電壓的 變化為 2.5 伏特。 將這些數值代入 共模拒斥等式後， 可看到 共模誤差為 25 微伏特。 電源供應拒斥 所觀察的是 電源供應電壓 變化帶來的空氣。 此偏移可能是供應 電壓的 DC 變化， 也可能是雜訊訊號。 本例中我們 考慮電源供應上有 峰間 200 毫伏特 200 kHz 雜訊訊號。 一般來說，產品說明書 表格中所列的規格 為電源供應電壓中的 DC 變化 PSRR。 特性曲線區 會出現圖表， 以表達 PSRR 與 頻率間的關係。 以此例而言， 我們可看到 PSRR 在 200 kHz 時為 58 dB。 利用先前介紹的 PSRR 等式， 可以判定電源 供應拒斥所造成的 誤差。 若將 200 峰間 毫伏特與 58 dB 訊號 插入等式，可得到 雜訊為 252 峰間微伏特。 接著我們繼續 下一個規格。 此投影片說明 資料轉換器訊噪比， 也就是 SNR，的一般等式。 一般來說， 訊噪比是用來 表示訊號純度或 無雜訊程度的測量值。 高 SNR 代表訊號與 雜訊相比 非常大， 低 SNR 則 代表雜訊 相對於訊號來說比較高。 以此規格來說， 雜訊和訊號都是以伏特為單位， 所測量出的均方根值。 因此我們需將 20 乘以訊噪比的對數， 然後轉換成分貝數。 理想 SNR 分貝數的 計算方式是將 6.02 乘上 n 再加上 1.76， 其中 n 為 ADC 解析度的 位元數。 例如 10 位元轉換器 會是 6.02 乘以 10 再加 1.76， 得到結果為 61.96 分貝。 這個關係式是把 量化雜訊加以積分後， 再套入訊噪比 關係所得到。 此關係式適用 只將量化雜訊 視為誤差 來源的 理想轉換器。 實際上任何 資料轉換器 得到的訊噪比都 不會比此等式結果好， 因為實際轉換器 會有其他雜訊來源。 另一種常見 AC 規格 為諧波失真， 或稱為 THD。 為了了解 THD，我們 必須了解 非線性規格。 非線性是測量 轉換函數 偏移理想 直線的程度。 在投影片左手邊的 是轉換函數， 顯示理想的線性 轉換函數和非線性 轉換函數。 理想的轉換 函數會依循 y 等於 mx 加 b 的 直線形式， 非線性轉換函數則 有更高階的數項 ，進而導致偏離直線。 顯示的非線性範例， 經過放大， 讓我們能更清楚的觀察非線性。 請注意非線性 函數在低輸入電壓位準 吻合情況非常好， 但當輸入信號增強， 便開始出現偏離。 簡而言之，高輸入 輸入訊號的增益 大於應有的增益。 這樣會造成 正弦波上半週期 向上拉伸的效果。 這種上半週期的拉伸 稱為失真， 會在頻譜中 產生諧波。 此張投影片顯示 右側數位化正弦波 的頻譜。 諧波是波形 上半週期失真 的結果。 諧波失真都是 出現在基頻的 整數倍處。 在這個範例中， 基頻是1 kHz， 諧波 則在 2 kHz、 3 kHz、4 kHz 等地方出現。 有時將奇數 與偶數諧波加以區分 是很實用的作法， 因為每種不同電路的 非理想性可能 就會產生一種諧波。 偶數諧波 是基頻的 偶數倍。 奇數諧波則是 基頻的奇數倍。 例如 2 kHz 與 4 kHz 為 偶數諧波，而 3 kHz和 5 kHz 則是 奇數諧波。 如果數位化 訊號可與 輸入信號完美吻合， 就不會出現任何諧波。 這裡的 THD 計算 以百分比及 分貝為表示。 ADC 測試標準 採用的是 IEEE 標準， 內容闡明 THD 計算中必須 使用 9 個諧波。 THD 是將各諧波 電壓平方後之和 除以 RMS 訊號 電壓平方， 再取其平方根。 此數值再乘上 100， 即可轉換成百分比， 或者取其對數再乘以 20 倍， 轉換成分貝數。 THD 加上 N 類似 THD，只是它的 計算式中包含 總 RMS 雜訊。 SINAD 是訊號 與雜訊和失真比的縮寫。 在數學上， SINAD 僅是 THD 加上 N 的倒數。 但以分貝來說， ，取倒數 只會改變數值 的正負符號。 請注意，SINAD 或 THD 加 N 一定 比 THD 或 SNR 差， 這是因為 SINAD 實際上 合併了兩個誤差 來源。 本影片內容至此結束。 謝謝收看。 請接受測驗， 看看您是否理解 本影片的內容。