The Intel LBR on some recent processor is capableof filtering branches by type. The filter is configurablevia the LBR_SELECT MSR register.

There are limitation on how this register can be used.

On Nehalem/Westmere, the LBR_SELECT is shared by the two HT threadswhen HT is on. It is private to each core when HT is off.

On SandyBridge, the LBR_SELECT register is private to each threadwhen HT is on. It is private to each core when HT is off.

The kernel must manage the sharing of LBR_SELECT. It allowsmultiple users on the same logical CPU to use LBR_SELECT aslong as they program it with the same value. Across siblingCPUs (HT threads), the same restriction applies on NHM/WSM.

This patch implements this sharing logic by leveraging themechanism put in place for managing the offcore_responseshared MSR.

We modify __intel_shared_reg_get_constraints() to causex86_get_event_constraint() to be called because LBR maybe associated with events that may be counter constrained.