Abstract

A block phase estimator (102) includes a phase averaging circuit (80). A first embodiment of the phase averaging circuit (80) includes a phase differencing circuit (82) coupled to an averager input (80), a first modulo circuit (84) coupled to the phase differencing circuit (82), a filter (86) coupled to the first modulo circuit (86), and a summation circuit (88) having a positive input and a negative input, the positive input being coupled to the averager input (80), the negative input being coupled to the filter (86). The phase averaging circuit (80) further includes a second modulo circuit (89) coupled to the summation circuit (88). An alternative embodiment of the phase averaging circuit (fig. 11) includes a delay line (112) having a plurality of taps (114) coupled to an averager input (116) and a plurality of first subtractor circuits (118), a first input of each first subtractor circuit (118) being coupled to the averager input (116), a second input of each first subtractor circuit (118) being coupled to a corresponding tap (114) of the plurality of taps (114).