This project examines the manufacturability of n-type industrial silicon heterojunction cells and develops methods to improve energy yield and increase the attractiveness of this type of cell to manufacturers. The research performed will help to improve cell efficiency by 2% and reduce the cost of the cells by improving electrical yield based on a range of new processing improvements. The project also aims to demonstrate the feasibility of using thinner cells to increase the lifetime of the wafer and achieve a 26% record efficiency. The knowledge gleaned from this research is expected to help improve the manufacturing of silicon heterojunction cells in the near to mid-term.

Approach

The project will make silicon heterojunction cells on the wafers sawn from n-type silicon ingots from different vendors and analyze their performance as a function of bulk defects, resistivity of the wafers, and sawing defects. Based on the analysis results, the research team will propose the best methods to reduce the variation of wafer quality. This includes optimization of pre-process annealing, damage removal, texturization, cleaning, using additional light diffusions, and dry plasma treatment of the wafers prior to amorphous silicon deposition. The project will also demonstrate the feasibility of using thinner cells to increase the bulk lifetime of the wafers and use the developed methods to achieve 26% record efficiency.

Innovation

The project will focus on improvements to industrial silicon heterojunction cell technology that can be transferred to production lines in 1-3 years. Silicon heterojunction cell research over the past several years will be consolidated to further develop several key technologies, achieve 1-2% higher efficiency for both large-area industrial cells and small-area record cells in order to attract industry partners to transfer the developed technologies into production.