Question:

The following type of program was executed while running the V850/SA1 at 20 MHz.
The waveform at P20 was observed, but the waveform was not inverted every 50 ns as expected but was inverted every 400 ns.
The disassembly results show that P2.0 = ~P2.0 is converted to one NOT1 instruction and nothing extra is executed. Why?

while(1)
{
P2.0 = ~P2.0;
:
:
P2.0 = ~P2.0;
}

Answer:

There are two reasons for this. One reason is that the NOT1 instruction itself combines three operations (read, modify, and write) for port 2 when it is executed. The second reason is that three clock cycles are required to access port 2.

Remark
In almost all V850 Series products, the internal memory access speed (number of clock cycles) is noted at the start of the "Bus Access" section in the User's Manual.
And for some devices, the speed for accessing on-chip peripherals is also described in the User's Manual.
Some devices include a VSWC register that is used to specify wait times when accessing on-chip peripherals, in which case the number of waits must be set according to the operating frequency.