Proceedings Paper
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Presently, various aspects of CMOS technology scaling present additional challenges in CMOS image sensor design. Designers require optical as well as electrical models of the CMOS based pixels and the pixel arrays in order to translate given design objectives to proper choices of technology, pixel architecture, array structure, design layout, etc. Toward this end, we present a one-dimensional analysis and a working model of CMOS photodiode emphasizing on the effect of the finite epitaxial thickness and the presence of electric field at the interface between the epitaxial layer and the substrate bulk.