The demo shows the face recognition on a brand new S32V234 processor (at the back of the board below the fan), which was released in June 2015. The S32V234 is aimed to the automotive industry, for vision processing, such as surround view, back camera view, lane departure warning system, pedestrian detection etc. For this purpose, it consists of massive computational power.

Functional Block Diagram

The algorithm which runs as a demo is a face detection example (FSL created, written for APEX-2). The same algorithm is used for example for road sign recognition, which is one of future possible use-cases of S32V234. For better interaction, the face recognition was chosen instead of road sign detection. The data from camera goes through ISP block (Freescale IP), where the data from camera are extracted and converted to RGB format, which is used for further processing. Then, the data goes to APEX blocks, where face detection is performed using Local Binary Patterns algorithm. The detection goes in several iterations (levels = sizes of head), where both APEX cores run in parallel. When one level is done, the APEX starts new processing and ARM core extracts the result of the detection. 8 levels are used in this demo. At the end, the data are smoothed using Kalman filter and tracking is applied to recognize multiple faces. The algorithm itself uses pre-trained LBP data from OpenCV library, no Freescale training algorithm is now available.

Value Propositions

The processor targets the high computational ability while maintaining low power consumption. For such purpose, multiple functional blocks are used: Four ARM Cortex-A53 cores, One ARM Cortex-M4, Two CogniVue APEX-2 vision coprocessors (massively parallel unit for image processing), Freescale ISP (Image Signal Processor) used for pre-