We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Firefox,
Internet Explorer 11,
Safari. Thank you!

AR# 23725

Description

A PCI burst read request of OPB BRAM occurs at the same time an remote OPB master is trying to read from a PCI device. The OPB master request is retried on the OPB, and the IPIF fetches the data from the OPB BRAM for the PCI master. The OPB BRAM read is very fast, and the IPIF has data presented at the IPIC before the bridge clean up is done and the data is accepted, so the IPIC is throttled a few clock cycles. The throttling causes the IPIF to terminate the OPB BRAM read. The bridge needs more data so the request to the IPIF remains asserted and IPIF reissues the read request. It is in this reissued read request that the OPB Address is corrupt to the value of all zeros.

Solution

This problem has been fixed in the latest EDK 8.2i Service Pack, available at: