Note: If a device is not supported by coreboot v2, try [[Supported_Chipsets_and_Devices#Devices_supported_in_coreboot_v1|checking coreboot v1]] for support. Do '''not''' attempt to use coreboot v3 &mdash; this is an early development version which is not ready for production use, yet.

+

'''coreboot v4''' is the current stable coreboot tree recommended for productive use and for porting new boards.

+

* If a device is not supported by coreboot v4, try [[Supported_Chipsets_and_Devices/v1|checking coreboot v1]] or [[Supported_Chipsets_and_Devices/v3|coreboot v3]] for support.

+

* In general it is '''not''' recommended to use coreboot v3 &mdash; this was an experimental development tree which is gradually being merged into v4.

+

* Also, coreboot v1 should be avoided (if v4 can be used instead for your board), as it has been unmaintained for a long time. However, it is definitely desirable to port boards from v1 to v4 whereever possible.

See also [[Supported Motherboards]].

See also [[Supported Motherboards]].

−

== Devices supported in coreboot v3 ==

+

== Devices supported in coreboot v4 ==

−

−

<div style="color: #ff0000">coreboot v3 is an alpha-stage development version of coreboot and is not meant for production use, yet!</div>

{| border="0" valign="top"

{| border="0" valign="top"

Line 20:

Line 21:

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| AMD

| AMD

−

| Geode&nbsp;LX

+

| Fam14h - G-Series

| style="background:lime" | OK

| style="background:lime" | OK

−

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 82443BX&nbsp;(440BX)

−

| style="background:orange" | WIP

−

−

|}

−

−

| valign="top"|

−

−

'''Southbridges'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Southbridge

−

! align="left" | Status

−

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| AMD

| AMD

−

| CS5536

+

| Fam12h - Llano

−

| style="background:lime" | OK

−

−

|- bgcolor="#dddddd" valign="top"

−

| Intel&reg;

−

| 82371EB&nbsp;(PIIX4E)

−

| style="background:orange" | WIP

−

−

|}

−

−

| valign="top"|

−

−

'''Super I/Os'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Super&nbsp;I/O

−

! align="left" | Status

−

−

|- bgcolor="#eeeeee" valign="top"

−

| Fintek

−

| F71805F

−

| style="background:orange" | WIP

−

−

|- bgcolor="#dddddd" valign="top"

−

| Winbond&trade;

−

| W83627HF

| style="background:lime" | OK

| style="background:lime" | OK

−

−

|}

−

−

| valign="top"|

−

−

'''CPUs'''

−

−

{| border="0" style="font-size: smaller"

−

|- bgcolor="#6699dd"

−

! align="left" | Type

−

! align="left" | CPU

−

! align="left" | Status

−

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

−

| Generic

−

| i586

−

| style="background:orange" | WIP

−

−

|- bgcolor="#dddddd" valign="top"

| AMD

| AMD

−

| Geode LX

+

| Fam10h

−

| style="background:lime" | OK

−

−

|}

−

−

|}

−

−

== Devices supported in coreboot v2 ==

−

−

{| border="0" valign="top"

−

| valign="top"|

−

−

'''Northbridges'''

−

−

{| border="0" style="font-size: smaller" valign="top"

−

|- bgcolor="#6699dd"

−

! align="left" | Vendor

−

! align="left" | Northbridge

−

! align="left" | Status

−

−

|- bgcolor="#eeeeee" valign="top"

−

| AMD

−

| Fam10

| style="background:lime" | OK<sup>16</sup>

| style="background:lime" | OK<sup>16</sup>

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

Line 131:

Line 47:

| LX

| LX

| style="background: lime" | OK

| style="background: lime" | OK

+

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

−

| IBM

−

| CPC710

−

| style="background:#dddddd" | ?

−

|- bgcolor="#dddddd" valign="top"

−

| IBM

−

| CPC925

−

| style="background:#dddddd" | ?

−

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

| E7501

| E7501

| style="background:#eeeeee" | ?

| style="background:#eeeeee" | ?

−

|- bgcolor="#eeeeee" valign="top"

+

|- bgcolor="#dddddd" valign="top"

| Intel&reg;

| Intel&reg;

| E7520

| E7520

| style="background:#eeeeee" | ?

| style="background:#eeeeee" | ?

−

|- bgcolor="#eeeeee" valign="top"

+

|- bgcolor="#dddddd" valign="top"

| Intel&reg;

| Intel&reg;

| E7525

| E7525

| style="background:#eeeeee" | ?

| style="background:#eeeeee" | ?

−

|- bgcolor="#eeeeee" valign="top"

+

|- bgcolor="#dddddd" valign="top"

+

| Intel&reg;

+

| 3100

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Intel&reg;

+

| 5000P

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Intel&reg;

+

| 82443BX&nbsp;(440BX)

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

| Intel&reg;

| Intel&reg;

| 82810

| 82810

| style="background:yellow" | WIP<sup>9</sup>

| style="background:yellow" | WIP<sup>9</sup>

−

|- bgcolor="#eeeeee" valign="top"

+

|- bgcolor="#dddddd" valign="top"

| Intel&reg;

| Intel&reg;

| 82830

| 82830

| style="background:lime" | OK

| style="background:lime" | OK

−

|- bgcolor="#eeeeee" valign="top"

+

|- bgcolor="#dddddd" valign="top"

| Intel&reg;

| Intel&reg;

−

| 82443BX&nbsp;(440BX)

+

| 82855

−

| style="background:yellow" | WIP<sup>11</sup>

+

| style="background:yellow" | WIP

−

|- bgcolor="#eeeeee" valign="top"

+

|- bgcolor="#dddddd" valign="top"

| Intel&reg;

| Intel&reg;

−

| 82855PM

+

| EP80579 (Tolapai)

−

| style="background:red" | WIP<sup>2</sup>

+

| style="background:lime" | OK

−

|- bgcolor="#eeeeee" valign="top"

+

|- bgcolor="#dddddd" valign="top"

| Intel&reg;

| Intel&reg;

−

| 3100

+

| 945

| style="background:lime" | OK

| style="background:lime" | OK

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

−

| Motorola

+

| Intel&reg;

−

| MPC107

+

| SCH US15W (Poulsbo)

−

| style="background:#dddddd" | ?

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| SiS

| SiS

| SiS761GX

| SiS761GX

| style="background:lime" | OK

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| VIA

| VIA

Line 194:

Line 117:

| VIA

| VIA

| K8M890

| K8M890

−

| style="background:yellow" | WIP

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| VIA

+

| CN400

+

| ?

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| VIA

| VIA

| CN700

| CN700

| style="background:lime" | OK<sup>14</sup>

| style="background:lime" | OK<sup>14</sup>

+

|- bgcolor="#dddddd" valign="top"

+

| VIA

+

| CX700

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| VIA

+

| VX800

+

| style="background:yellow" | WIP

+

|}

|}

Line 247:

Line 183:

| SB600

| SB600

| style="background: lime " | OK

| style="background: lime " | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| RS780/RS785

+

| style="background: lime " | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| SB700/SB7x0

+

| style="background: lime " | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| SR56x0

+

| style="background: lime " | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| SB5100

+

| style="background: lime " | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| AMD

+

| SB800

+

| style="background: lime " | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Broadcom

+

| BCM21000

+

| style="background:lime" | OK

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| Broadcom

| Broadcom

Line 255:

Line 215:

| BCM5785

| BCM5785

| style="background:lime" | OK

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

| 6300ESB (ESB6300)

| 6300ESB (ESB6300)

| style="background:#eeeeee" | ?

| style="background:#eeeeee" | ?

+

|- bgcolor="#eeeeee" valign="top"

+

| Intel&reg;

+

| 3100

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

| 82371EB&nbsp;(PIIX4E)

| 82371EB&nbsp;(PIIX4E)

−

| style="background:yellow" | WIP<sup>6</sup>

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

| 82801AA/AB&nbsp;(ICH/ICH0)

| 82801AA/AB&nbsp;(ICH/ICH0)

−

| style="background:lime" | OK<sup>10</sup>

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

| 82801BA/BAM&nbsp;(ICH2/ICH2-M)

| 82801BA/BAM&nbsp;(ICH2/ICH2-M)

−

| style="background:lime" | OK<sup>10</sup>

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

| 82801CA/CAM&nbsp;(ICH3-S/ICH3-M)

| 82801CA/CAM&nbsp;(ICH3-S/ICH3-M)

−

| style="background:lime" | OK<sup>10</sup>

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

| 82801DB/DBL/DBM<br/>(ICH4/ICH4-L/ICH4-M)

| 82801DB/DBL/DBM<br/>(ICH4/ICH4-L/ICH4-M)

−

| style="background:lime" | OK<sup>10</sup>

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

| 82801EB/ER&nbsp;(ICH5/ICH5R)

| 82801EB/ER&nbsp;(ICH5/ICH5R)

−

| style="background:lime" | OK<sup>10</sup>

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| Intel&reg;

+

| 82801GX&nbsp;(ICH7)

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

Line 293:

Line 262:

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Intel&reg;

| Intel&reg;

−

| 3100

+

| EP80579 (Tolapai)

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| Intel&reg;

+

| SCH US15W (Poulsbo)

| style="background:lime" | OK

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| NVIDIA

| NVIDIA

| CK804

| CK804

−

| style="background:lime" | OK

+

| style="background:lime" | OK<sup>17</sup>

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| NVIDIA

| NVIDIA

| MCP55

| MCP55

−

| style="background:lime" | OK

+

| style="background:lime" | OK<sup>17</sup>

+

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Ricoh

| Ricoh

| RL5C476

| RL5C476

| style="background:#eeeeee" | ?

| style="background:#eeeeee" | ?

+

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| SiS

| SiS

| SiS966(L)

| SiS966(L)

| style="background:lime" | OK

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| VIA

| VIA

Line 326:

Line 303:

| VIA

| VIA

| VT8237A

| VT8237A

−

| style="background:red" | WIP

+

| style="background:lime" | OK

−

|- bgcolor="#dddddd" valign="top"

+

|- bgcolor="#eeeeee" valign="top"

| VIA

| VIA

| VT8237S

| VT8237S

−

| style="background:red" | WIP

+

| style="background:lime" | OK

−

|- bgcolor="#dddddd" valign="top"

+

|- bgcolor="#eeeeee" valign="top"

−

| Winbond&trade;

+

| VIA

−

| W83C553

+

| VT82C686

−

| style="background:#dddddd" | ?

+

| style="background:yellow" | WIP

+

|}

|}

Line 350:

Line 328:

| ASUS

| ASUS

| A8000

| A8000

−

| style="background:lime" | <sup>12</sup>, <sup>13</sup>

+

| style="background:lime" | OK<sup>12</sup>, <sup>13</sup>

+

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| Fintek

| Fintek

| F71805F/FG

| F71805F/FG

| style="background:lime" | OK

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Fintek

+

| F71859

+

| style="background:yellow" | OK<sup>19</sup>

+

|- bgcolor="#dddddd" valign="top"

+

| Fintek

+

| F71863F/FG

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Fintek

+

| F71872F/FG

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Fintek

+

| F71889

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Fintek

+

| F81865F

+

| style="background:yellow" | WIP

+

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| ITE

| ITE

| IT8661F

| IT8661F

−

| style="background:yellow" | OK <sup>1</sup>

+

| style="background:yellow" | OK<sup>5</sup>

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| ITE

| ITE

| IT8671F

| IT8671F

−

| style="background:yellow" | OK <sup>1</sup>

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| ITE

| ITE

| IT8673F

| IT8673F

−

| style="background:yellow" | OK <sup>1</sup>

+

| style="background:yellow" | OK<sup>5</sup>

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| ITE

| ITE

| IT8705F

| IT8705F

−

| style="background:yellow" | OK <sup>1</sup>

+

| style="background:yellow" | OK<sup>5</sup>

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| ITE

| ITE

| IT8712F

| IT8712F

−

| style="background:lime" | OK <sup>8</sup>

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| ITE

| ITE

Line 382:

Line 382:

| ITE

| ITE

| IT8718F

| IT8718F

−

| style="background:yellow" | OK <sup>1</sup>

+

| style="background:yellow" | OK<sup>5</sup>

+

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| Intel&reg;

| Intel&reg;

| 3100

| 3100

−

| style="background:lime" | OK <sup>15</sup>

+

| style="background:lime" | OK<sup>15</sup>

+

|- bgcolor="#dddddd" valign="top"

+

| Intel&reg;

+

| EP80579 (Tolapai)

+

| style="background:lime" | OK<sup>15</sup>

+

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| NSC

| NSC

Line 394:

Line 400:

| NSC

| NSC

| PC87309

| PC87309

−

| style="background:yellow" | OK <sup>5</sup>

+

| style="background:yellow" | OK<sup>5</sup>

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| NSC

| NSC

Line 407:

Line 413:

| PC87366

| PC87366

| style="background:#eeeeee" | ?

| style="background:#eeeeee" | ?

+

|- bgcolor="#eeeeee" valign="top"

+

| NSC

+

| PC87382

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| NSC

+

| PC87384

+

| style="background:lime" | OK

+

|- bgcolor="#eeeeee" valign="top"

+

| NSC

+

| PC87392

+

| style="background:lime" | OK

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| NSC

| NSC

Line 423:

Line 441:

| PC97317

| PC97317

| style="background:#eeeeee" | ?

| style="background:#eeeeee" | ?

+

+

|- bgcolor="#dddddd" valign="top"

+

| ServerEngines

+

| PILOT

+

| style="background:yellow" | OK<sup>18</sup>

+

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| SMSC&reg;

| SMSC&reg;

Line 446:

Line 470:

| SMSC&reg;

| SMSC&reg;

| FDC37M60x

| FDC37M60x

−

| style="background:lime" | OK<sup>3</sup>,<sup>12</sup>

+

| style="background:lime" | OK<sup>12</sup>

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| SMSC&reg;

| SMSC&reg;

| LPC47B27x

| LPC47B27x

−

| style="background:lime" | OK<sup>7</sup>,<sup>12</sup>

+

| style="background:lime" | OK<sup>12</sup>

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| SMSC&reg;

| SMSC&reg;

Line 487:

Line 511:

| LPC47N217

| LPC47N217

| style="background:#dddddd" | ?

| style="background:#dddddd" | ?

+

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| VIA

| VIA

Line 495:

Line 520:

| VT82C686(A/B)

| VT82C686(A/B)

| style="background:yellow" | OK<sup>5</sup>

| style="background:yellow" | OK<sup>5</sup>

+

+

|- bgcolor="#dddddd" valign="top"

+

| Winbond&trade;

+

| W83627DHG

+

| style="background:lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Winbond&trade;

+

| W83627UHG

+

| style="background:lime" | OK

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| Winbond&trade;

| Winbond&trade;

−

| W83627EHG/EHF

+

| W83627EHG/HF/EHF/THF

−

| style="background:#dddddd" | ?

+

| style="background:lime" | OK

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| Winbond&trade;

| Winbond&trade;

−

| W83627HF

+

| W83697HF/HG

−

| style="background:#dddddd" | ?

+

| style="background:lime" | OK

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| Winbond&trade;

| Winbond&trade;

−

| W83627THF

+

| W83627THF/THG

−

| style="background:#dddddd" | ?

+

| style="background:lime" | OK

|- bgcolor="#dddddd" valign="top"

|- bgcolor="#dddddd" valign="top"

| Winbond&trade;

| Winbond&trade;

Line 543:

Line 577:

| VIA

| VIA

| style="background:lime" | OK

| style="background:lime" | OK

−

|- bgcolor="#dddddd" valign="top"

−

| PowerPC

−

| MPC74xx

−

| style="background:#dddddd" | ?

−

|- bgcolor="#dddddd" valign="top"

−

| PowerPC

−

| PPC4xx

−

| style="background:#dddddd" | ?

−

|- bgcolor="#dddddd" valign="top"

−

| PowerPC

−

| PPC7xx

−

| style="background:#dddddd" | ?

−

|- bgcolor="#dddddd" valign="top"

−

| PowerPC

−

| PPC970

−

| style="background:#dddddd" | ?

|- bgcolor="#eeeeee" valign="top"

|- bgcolor="#eeeeee" valign="top"

| Emulated

| Emulated

Line 577:

Line 595:

| Elan SC520

| Elan SC520

| style="background: lime" | OK

| style="background: lime" | OK

+

|- bgcolor="#dddddd" valign="top"

+

| Intel&reg;

+

| EP80579 (Tolapai)

+

| style="background: yellow" | OK<sup>20</sup>

|}

|}

Line 582:

Line 604:

<small>

<small>

−

<sup>1</sup> Serial output should work for all ITE Super I/Os (but is only tested on the IT8671F and IT8712F). The rest ''could'' work, but is completely untested.<br />

−

<sup>2</sup> Work in progress.<br />

−

<sup>3</sup> Serial output on serial port 1 is tested and works, the rest probably not yet (tested on FDC37M602).<br />

<sup>4</sup> The W83977EF works fine with the W83977TF code (the pre-RAM serial part at least).<br />

<sup>4</sup> The W83977EF works fine with the W83977TF code (the pre-RAM serial part at least).<br />

<sup>8</sup> [http://www.linuxbios.org/pipermail/linuxbios/2007-May/021623.html Works fine] mostly, but support for more obscure features (floppy, game port, MIDI, IR) might need more work.<br />

<sup>9</sup> Works mostly, but currently there are some limitations as to which RAM DIMMs can be used.<br />

<sup>9</sup> Works mostly, but currently there are some limitations as to which RAM DIMMs can be used.<br />

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<sup>10</sup> These southbridges should all be supported by the (experimental) new code in src/southbridge/intel/i82801xx/ now. Please test this code and use this code for all new ICH* based boards. There's still some old code for the southbridges, but that should not be used anymore.<br />

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<sup>11</sup> Sort of works, but the settings are hardcoded for the Tyan S1846. This will be fixed soonish.<br />

<sup>12</sup> All these Super I/O chips should be supported by the "smscsuperio" driver. Only the ASUS A8000 is tested, though. The floppy disk controller, the parallel port, the serial ports (COM1 + COM2), and the keyboard should work for all chips. More advanced stuff may need more work, though.<br />

<sup>12</sup> All these Super I/O chips should be supported by the "smscsuperio" driver. Only the ASUS A8000 is tested, though. The floppy disk controller, the parallel port, the serial ports (COM1 + COM2), and the keyboard should work for all chips. More advanced stuff may need more work, though.<br />

In general it is not recommended to use coreboot v3 — this was an experimental development tree which is gradually being merged into v4.

Also, coreboot v1 should be avoided (if v4 can be used instead for your board), as it has been unmaintained for a long time. However, it is definitely desirable to port boards from v1 to v4 whereever possible.

4 The W83977EF works fine with the W83977TF code (the pre-RAM serial part at least).5 Pre-RAM serial output works fine, but nothing else, yet.9 Works mostly, but currently there are some limitations as to which RAM DIMMs can be used.12 All these Super I/O chips should be supported by the "smscsuperio" driver. Only the ASUS A8000 is tested, though. The floppy disk controller, the parallel port, the serial ports (COM1 + COM2), and the keyboard should work for all chips. More advanced stuff may need more work, though.13 The ASUS A8000 Super I/O seems to be a rebranded SMSC DME1737.14 Working, but not widely tested, yet. Works with single DIMM DDR2.15 The Intel 3100/EP80579 UARTs and watchdog timer are integrated as a Super I/O-like device; only the UARTs have been tested so far.16 Two implementations: Rev B-C supported in coreboot, Rev D-E support via AGESA17 MCP55 and CK804 are supported, but no open documents are available from NVIDIA.18 Partially supported, but not all features implemented.19 Only support for serial port 1 implemented, everything else is unsupported so far due to lack of datasheet.20 Working, but not widely tested, yet. Works with single DIMM DDR2.