The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.

A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.

Accurate analog mixed-signal full-chip power signoff with the support of transistor-level EMIR technology in the Voltus-Fi solution

Tight integration with the XtractIM and PowerDC technologies for chip-package-board total power signoff co-analysis, including 2.5D silicon-interposer and 3DIC technologies

Supported by major foundries and IP providers, including certification and reference flows on leading 7nm FinFET as well as 22nm FD-SOI nodes

The Cadence® Voltus™ IC Power Integrity Solution is a standalone, cloud-ready, full-chip, cell-level power signoff tool that provides accurate, fast, and high-capacity analysis and optimization technologies on a power delivery network (PDN) or the power grid of a chip. The Voltus tool is of particular value to designers by providing better understanding of the power grid strength, as well as debugging, verifying, and fixing IC chip power consumption, IR drop, and electromigration (EM) constraints and violations (EMIR). Typical use of the tool may include, but is not limited to:

Analysis of the full-chip resistance network, including instance-based effective resistance (Reff) and resistance of the least-resistance path (Rlrp) analysis

Calculation and analysis of power consumption, including leakage, internal, and switching power

Analysis and optimization of EM and IR drop, including full-chip signal EM (SEM)

Analysis of the impact of power on design closure, from chip to package to PCB

Analysis and optimization of ESD protection circuitry

Analysis of advanced FinFET features such as self-heating effect (SHE) and statistical EM budgeting (SEB)/failure-in-time(FIT) calculations

Massively Parallel Execution for Large Capacity and High Performance

At the heart of the Voltus solution is its massively parallel execution algorithms that can run either multi-threaded on one single machine or distributed on multiple machines in a private- or public-cloud environment. The parallel execution applies to all major steps of a power signoff run—not only to the instance power calculation, grid network parasitic extraction, GUI display, etc., but also, more importantly, to the matrix solving in the highly coupled grid network simulation. Its unique correct-by-construction in SPICE-like matrix formation guarantees that the Voltus distributed-processing (Voltus-DP) solution has:

Consistent and accurate results, regardless of the number of machines allocated

Near-linear scalability in performance, memory footprint, and capacity as the number of CPUs/machines increases

Advanced Power Grid Simulation Technologies

To meet today’s design requirements, the Voltus solution supports various kinds of power grid network simulation methodologies and flows:

Beneficial as a standalone power signoff tool, the Voltus IC Power Integrity Solution delivers even more significant productivity gains when used in a highly integrated “full-flow” environment with other key products, including the Cadence Innovus™ Implementation System and the Cadence Tempus™ Timing Signoff Solution, providing the industry’s fastest design closure technology. Such integration enables the interaction among P&R implementation, timing, and IR drop analysis that pulls the potential power signoff issues ahead into the design implementation stage. This allows early prevention, fixing, or optimization, avoiding often difficult and costly design fixes or changes at the signoff stage. Such popular features include:

Early rail analysis (ERA) on an incomplete P&R design, as early as the floorplanning stage

IR drop aware placement-driven hotspot fixing

Timing-aware IR drop hotspot fixing with Tempus ECO

Signal EM violation identification and fixing

Power grid optimization, including metal trimming and power gate switch trimming

IR drop-aware Tempus STA in clock jitter analysis

De-coupling cap analysis and optimization

Power-gate switching analysis, including in-rush current and turn-on time

When used with the Cadence Voltus-Fi Custom Power Integrity Solution, a transistor-level EMIR tool delivering foundry-certified SPICE-level accuracy and power grid macro modeling, the resulting platform accelerates IC power signoff and overall design closure on an analog mixed-signal design:

An integrated solution in the Cadence Virtuoso® platform with the Quantus™ QRC Extraction Solution for parasitic extraction and Spectre® for EMIR simulation

Power-grid-view (PGV) macro modeling to enable a transistor block/IP analyzed in the Voltus solution for full-chip power signoff

Chip-Package-Board Co-Analysis

When used with Cadence Sigrity™ technologies, Voltus-Sigrity Package Analysis (Voltus-Sigrity PA) enables the accurate co-analysis of a power grid network on a chip-package-PCB system:

Package model from the Sigrity XtractIM™ tool for chip power signoff by the Voltus solution and die model from the Voltus solution for package power signoff from the Sigrity PowerDC™ tool

Power distribution on the chip from the Voltus solution for thermal distribution analysis by the PowerDC tool

IDT produces industry-leading products across a wide range of nodes and applications, and we were pleased to see the Voltus technology delivers up to a 10X performance improvement across various test cases ranging from 180nm to 28nm designs.

As the global leader in many-core processors, it is critical that Tilera selects the best design signoff technologies to achieve optimum performance-per-watt in our products while meeting aggressive time-to-market requirements.

Customer Support

Get the most out of your investment in Cadence technologies through a wide range of training offerings. We offer instructor-led classes at our training centers or at your site. We also offer self-paced online courses. Overview