2.4.4 Exclusive-OR Cell

We are now using multiletter
symbols, but there should be no doubt that A1' means anything other than
NOT(A1). We can implement a two-input XOR using a MUX and an inverter as
follows (2 gates):

XOR(A1, A2)=MUX[NOT(A1), A1, A2],(2.33)

where

MUX(A,
B, S)=A·S+B·S'.(2.34)

This implementation
only buffers one input and does not buffer the MUX output. We can use inverter
buffers (3.5 gates total) or an inverting MUX so that the XOR cell does
not have any external connections to source/drain diffusions as follows
(3 gates total):

XOR(A1, A2)=NOT[MUX(NOT[NOT(A1)], NOT(A1), A2)].(2.35)

We can also implement a two-input
XOR using an AOI21 (and a NOR cell), since

XOR(A1, A2)=A1·A2'+A1'·A2=[(A1·A2)+(A1+A2)'
]'

=AOI21[A1,
A2, NOR(A1, A2)],(2.36)

(2.5 gates). Similarly
we can implement an exclusive-NOR (XNOR, equivalence) logic cell using an
inverting MUX (and two inverters, total 3.5 gates) or an OAI21 logic cell
(and a NAND cell, total 2.5 gates) as follows (using the MUX function of
Eq. 2.34):