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GENERATION OF CLOCK SIGNALS FOR SWITCHED CAPACITOR NETWORKS

Publishing Venue

Motorola

Related People

Michael Gay: AUTHOR

Abstract

An arrangement (300) for generation of clock signals for switched capacitor networks, particularly in CMOS integrated circuits in smartcards, has a coil (310) for receiving AC power; and a rectifier (M1-M4) having inputs coupled to the coil for converting received alternating power to DC power, wherein the inputs of the rectifier are coupled to outputs of the arrangement whereby signals at the inputs to said rectifier serve as clock signals for switched capacitor networks. The arrangement allows simple and effective generation of clock signals which are well suited to use in switched capacitor networks in CMOS integrated circuits in contact-less smartcards (400), and may be arranged so that excursion of signals at the inputs of the rectifier is constrained to remain within a limit with respect to one of the rectified outputs of the rectifier, whereby conduction in parasitic devices associated with the arrangement may be inhibited.

Copyright

Motorola Inc. 09/24/2001

Country

United States

Language

English (United States)

This text was extracted from a WORD97 document.

This is the abbreviated version, containing approximately 26% of the total text.

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TITLE GENERATION OF CLOCK SIGNALS FOR SWITCHED CAPACITOR NETWORKS

Author: Michael Gay

Abstract

An arrangement (300) for generation of clock signals for switched capacitor networks, particularly in CMOS integrated circuits in smartcards, has a coil (310) for receiving AC power; and a rectifier (M1-M4) having inputs coupled to the coil for converting received alternating power to DC power, wherein the inputs of the rectifier are coupled to outputs of the arrangement whereby signals at the inputs to said rectifier serve as clock signals for switched capacitor networks. The arrangement allows simple and effective generation of clock signals which are well suited to use in switched capacitor networks in CMOS integrated circuits in contact-less smartcards (400), and may be arranged so that excursion of signals at the inputs of the rectifier is constrained to remain within a limit with respect to one of the rectified outputs of the rectifier, whereby conduction in parasitic devices associated with the arrangement may be inhibited.

Body

This invention relates to the generation of clock signals, particularly for use in switched capacitor networks. Switched capacitor networks are frequently used in CMOS integrated circuits, such as those used for

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contact-less smartcards, to simulate resistors. In the field of this invention it is known that filtering and other precise functions commonly need to be implemented in contact-less smartcards. Filters inherently need time constants which might, for instance, be realised with resistors and capacitors. However, contact-less smartcards invariably use CMOS integrated circuits, which do not usually offer precise resistors, nor very precise capacitors.

These restrictions have led to the widespread use of switched capacitor filters in such circuits. A difficulty of using switched capacitor filters is that they require non-overlapping two-phase clocks.

Switched capacitor structures, furthermore, can advantageously be used to replace resistors connected to a circuit's supply lines. The design of these may be facilitated if clock signals exceeding the supply voltage are available.

A feature of contact-less smartcards, of course, is that power consumption must be minimised. The clock signals required for the switched capacitor structures in contact-less smartcards must therefore be realised as economically as possible in terms of current consumption.

A need therefore exists for generation of clock signals for switched capacitor networks wherein the abovementioned disadvantage(s) may be alleviated.

FIG. lA shows a centre-tap full-wave rectifier (of a type well-known per se) circuit arrangement 100, which might be used for generation of clock signals for switched capacitor networks,employing a centre-tapped coil 110 (which, it will be understood, would in practice