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Friday, February 1, 2013

The 13.5 nanometer Physical Cliff?

As
SPIE Extreme Lithography IV approaches will the EUV lithography
program fall off a physical cliff?

SPIE
is the International Society of Optics and Photonics. Its
membership is comprised of engineers who research the scientific
manipulation and applications of light. On
February 24-28 in San Jose, CA, a
large contingent of SPIE membership will meet to discuss current
progress on an exotic EUV (Extreme Ultra Violet) light source
scheduled for implementation in next generation, nanoscale computer
chip manufacturing. For
those outside the semiconductor industry, EUVL (Extreme Ultraviolet
Lithography) is a next generation, extremely short wavelength light
source (13.5 nanometers) providing improved lithographic capability
to print ever smaller, nanometer scale transistor circuit patterns on
computer chips.
The time and expense invested in the development of EUV lithography
spans many years and totals billions of dollars. Recently, a few
individuals (very few) have suggested to me that the physics
challenges of 13.5 nanometer EUV lithography might be insurmountable
and the continuing escalating expenditures to resolve EUV source
power, uptime and mask issues (to name a few), will further delay the
implementation of a work around
strategy to preserve Moore's law. Moore politics in the
semiconductor industry? The recently celebrated investments in ASML
by Intel, TSMC and Samsung collectively approximate $6 Billion, the
price of a new state of the art wafer fab. One might ask why not use
these funds to build another foundry and utilize existing 193
nanometer manufacturing technology to creatively double or triple
pattern DSA (Directed Self Assembly) device designs. This work
around scenario might be an alternative in the shorter term but the
economics and physics for this argument are not sustainable. At the
2011 EUVL Symposium, Rudy Peeters of ASML presented a compelling
illustration (page 5 of his presentation) of the cost reductions
attainable with EUV over 193 nanometer lithography. Given the same
product (in one of his examples), a 193 nanometer process would
entail as many as 5X the number of process steps with a >50%
increase in cost. EUV's superior image resolution and higher k1
value at 13.5
nanometers extends lithography performance and ultimately reduces
cost over time (k1 is a process evaluation coefficient that encapsulates process-related factors). These cost savings estimates are well within the
ball park so long as critical EUV performance issues are resolved
satisfactorily. Intel, TSMC and Samsung have invested heavily to
ensure EUV performs on time. With additional time and expensive fine tuning, ASML will ramp production and Moore's law will again enable a
new generation of semiconductor products, funding further R&D.

Is
there an impending physical cliff for 13.5 nanometer EUV technology
and beyond? Will complex physics issues limit EUV
viability? The semiconductor industry confidently says no and is
also in concurrent pursuit of BEUV (Beyond Extreme
Ultra Violet) lithography as a follow on
evolutionary path. BEUV 6.7 nanometer technology development will
require additional time and investment and will no doubt foment
additional engineering debate. Moore's law will be continually
pushed to its limits but the current critical focus is on the timely
delivery of HVM (High Volume Manufacturing) EUV
lithography, and 450mm process/metrology tools. As the EUV
program evolves, source designs will undergo modification and
upgrades to reach required performance specifications but the over
all program is moving forward. Semiconductor front end equipment
manufacturers who are not EUV/450mm capable in a timely fashion risk
the eventual loss of market share and possible forfeiture of future
viability in the semiconductor manufacturing industry.

The
key to success in the development of EUVL/BEUVL and related
semiconductor technologies is the pooling of knowledge and
distribution of R&D investment costs. The semiconductor
foundries and consortiums have the capital resource to pursue
technology development that can be cost prohibitive to a self funded
corporate R&D program. However, collaboration on advanced R&D
can be a delicate balancing act between managing intellectual property
concerns and promoting the general welfare of a capital intensive
industry. An excellent recent example of this concern is the
protracted dispute between Apple and Samsung over intellectual
property related to smart phone software. In spite of the on-going
litigation, Apple A5 and A6 processors are being manufactured in an
Austin, Texas wafer fab build by Samsung. Both companies benefit
from the arrangement and share a major portion of the smart phone
market place while making financial news headlines in the process.

Equally
important to the pooling of financial resources is the cross
linking of engineering groups collaborating on R&D programs.
This interaction reduces development time by eliminating concurrent,
redundant development programs and inefficient rediscovery of
existing knowledge. As an example, I often recount an experience in
which I visited a customer's corporate R&D facility to discuss a
deep UV photostabilization application for his process. We began our
discussion in the hallway outside his lab. After a few minutes our
discussion attracted the attention of another resident researcher who
happened by. Without introduction he stopped and silently listened
in on our conversation. Our discussion began at
320 nanometers, a popular wavelength for photostabilization. We soon
realized that a newly proposed process material would better stabilize
at a higher wavelength in the 340 nanometer range. We wondered out
loud where we might find a 340 nanometer range UV light source.
Hearing this, our silent companion beamed a broad smile and blurted
out, “I have what you're looking for. I
fabricated a cadmium vapor lamp for an experiment years ago and haven't used it
since then. I thought someone might need it one day. It's in my
desk, I'll go get it.” We all laughed to celebrate a very brief
but successful collaboration in which my customer discovered the
answer to his question was a few doors down the hall from his lab. I
didn't sell anything that day but planted the seeds for future
collaboration and sales activity. I often wondered what the
collaborative mean free path might have been in that laboratory, and
how long it might have taken for my two friends to discover their in
house problem and solution without my presence as a catalyst. A good
semiconductor industry statistician can probably provide an answer,
but that's another story.