A crash course in multicore at ARM TechCon 2013

Over the past few years, processor architectures on mobile and embedded consumer devices - most of them ARM-based - have not only increased in clock speed, but also made the step to multicore.

With the introduction of dual core processors for mobile devices in 2010 and quad core processors more recently, the available raw compute power increased significantly and with it, additional challenges, which have been covered well by Julio Diez Ruiz in “Overcoming the embedded CPU performance wall.”

Driven by the insatiable imaging and visual interface demands of consumer mobile and embedded users has led to the introduction of specialized graphics processor units. This has pushed developers to shift from relatively simple SMP configurations to the complexities of asymmetric heterogeneous architectures nd all the attendant hardware and software issues that raises.

In addition, scattered throughout the three days of classes are about a dozen other multicore programming classes of which my Editor’s Top Picks are:

“Can Existing Embedded Applications Benefit from Multicore Technology? (ATC-103 ), where Niall Cooling of Feabhas Ltd. ( an Embedded.com contributor ) looks at this question from a software developer's perspective, assessing the claims code examples he says seem to demonstrate the (same) massive performance improvements when using, say, 16 or 128 cores. But is this valid in more traditional embedded multicore designs?

“Writing Reliable Multicore Code ( ATC-121),” where Greg Davis (another Embedded.com contributor) looks at the top sources of runtime errors in multicore systems and how to avoid them with reliable code.

In addition to some recently published journal articles and conference presentations that I’ve included in this week’s ,Tech Focus Newsletter here are my Editor’s Top Picks of some other content you should be interested in: