XpressRICH4-AXI is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. The XpressRICH4-AXI IP is compliant with the PCI Express 4.0, and 3.1/3.0 specifications, as well as with the PHY Interface for PCI Express (PIPE) specification and the AMBA® AXI™ Protocol Specification. The IP can be configured to support endpoint, root port, and dual-mode topologies, allowing for a variety of use models, and exposes a configurable, flexible AMBA AXI interconnect interface to the user. The provided Graphical User Interface (GUI) Wizard allows designers to tailor the IP to their exact requirements, by enabling, disabling, and adjusting a vast array of parameters, including number, type, and width of AXI interfaces, PIPE interface width, low power support, SR-IOV, ECC, AER, etc. for optimal throughput, latency, size and power. Users may optionally enable a built-in DMA engine for handling data transfers between the PCIe domain and the AXI domain. XpressRICH4-AXI IP is verified using multiple PCIe VIPs and testsuites, and is proven in production silicon in hundreds of designs using a variety of commercial and proprietary PCIe PHYs. PLDA XpressRICH4-AXI PCIe IP is the #1 choice for ASIC, SoC and FPGA designers looking for an enterprise-class PCIe interface solution with a high-performance, reliable, and scalable AMBA 3 AXI/AMBA 4 AXI interconnect.

Engineered for both ASIC/SoC and FPGA implementations. Allows seamless migration from FPGA prototyping design to ASIC/SoC production design with same RTL. Fully timing closed on leading edge FPGA from Altera and Xilinx.