Title (fr)

Publication

Application

Priority

JP 9801273 W 19980324

JP 7029397 A 19970324

JP 9022597 A 19970324

Abstract (en)

[origin: EP0909037A1] A method by which a test pattern to be applied onto an IC for testing can be compressed efficiently. The method comprises determining the number phi of data transitions of the pattern at every pin of the IC and the entropy H of the data, distributing the test pattern among a block wherein the phi is smaller than a threshold phi M( phi < phi M), a block wherein the phi is larger than the threshold phi M( phi > phi M) and the H is larger than a threshold HM(H<HM), and a block wherein the H is larger than the threshold HM(H>HM)(411), compressing the block wherein phi < phi M by the run-length compressing method, compressing the block wherein phi > phi M and H<HM by the run-length compressing method after Burrows Wheeler conversion, and compressing the block wherein H>HM by the LZ compressing method.