CY8C95xx | Cypress Semiconductor

CY8C95xx

The CY8C95xxA is a multi-port IO expander with on board user available EEPROM and several PWM outputs. All devices in this family operate identically but differ in IO pins, number of PWMs,and internal EEPROM size.

The CY8C95xxA operates as two I2C slave devices. The first device is a multi port IO expander (single I2C address to access all ports through registers). The second device is a serial EEPROM. Dedicated configuration registers can be used to disable the EEPROM. The EEPROM uses 2-byte addressing to support the 28 Kbyte EEPROM address space. The selected device is defined by the most significant bits of the I2C address or by specific register addressing.

The IO expander's data pins can be independently assigned as inputs, outputs, quasi-bidirectional input/outputs or PWM ouputs. The individual data pins can be configured as open drain or collector, strong drive (10 mA source, 25 mA sink), resistively pulled up or down, or high impedance. The factory default configuration is pulled up internally.

The family errata documents operation deviation of device compared to the family datasheet. If certain feature doesn't work as expected it is documented in the errata document. It is very critical that user refers to corresponding errata document as it will document critical issues and workarounds for the device.

The General PSoC Programming web page is central location that details all aspects of programming related to all available PSoC devices like Software, Engineering Programmers, Programming Specifications and Production Programming Vendors.

Traditional MCU peripherals and many high level functions are available as preconfigured User Modules in PSoC Designer. The User Module datasheets are accessible directly from PSoC Designer by right clicking on the component. These are also available on the following Cypress website.

This documents the known problems with the current release of PSoC Designer and solutions for them. This document is a software equivalent of device errata. It is very critical that user refers to this document as part of the design activity. This can be downloaded from download page.

PSoC Designer release notes document new features in the release, potential issues that can impact design migration to new version of software, installation requirements and defects fixed since last release. This document is accessible in PSoC Designer under Help → Documentation → Release Notes, or from the Home Page.

It may provide working examples to use these features. They will provide guidelines on variety of design tradeoffs with these features. Many of the application notes provides PSoC Designer component to simplify reuse of key solution provided in the application note. Application note webpage provides useful information on application note content, related material on cypress website. Many application note webpage also have related video to quickly understand key concepts covered by application note.

PSoC 1 application notes helps you understand use various PSoC 1 and PSoC Designer features. They also provide guidance on how to solve variety of system design challenges using PSoC.

It enables user to get started with PSoC. They are simplified version of application notes. If target topic doesn't require theoretical discussion and only needs working project then it is provided as code example.

PSoC 1 code examples demonstrate system level use conditions of various components and different configuration tradeoffs.

Cypress's PSoC® programmable system-on-chip architecture gives you the freedom to not only imagine revolutionary new products, but the capability to also get those products to market faster than anyone else.
Featured Kit:
The CY8CKIT-001 PSoC® Development Kit (DVK) provides a common development platform where you can prototype and evaluate different solutions using any one of the PSoC 1, PSoC 3, or PSoC 5 architectures. In addition, the kit includes several example projects with step-by-step instructions to enable you to easily get started developing PSoC solutions. This kit includes PSoC 1 (CY8C28xxx), PSoC 3 and 5 Family Processor Modules

The CapSense Family is Cypress’s market leading Capacitive Sensing solution that has replaced more than 3 Billion sensors with a Capacitive touch interface over the last many years.
Featured Kit:
The Universal CapSense Controller Kit CY3280-28xxx will provide customers with hardware to understand capacitive sensing and a software tool to set up and tune their project with minimal iterative code updates. The kits will also provide a platform for internal and external CapSense Plus™ training sessions, products evaluation, hardware/software validation.

PSoC 1 devices require an In-Circuit Emulator (ICE) to perform debugging using the CY3215-DK In-circuit Emulation Development Kit. Cypress Semiconductor provides multiple POD foot options (PDIP, QFN, SSOP, SOIC). The POD kits are listed under the CY3210- XXXX or CY3250 – XXXX naming conventions. Visit the or click on the Title above to know more.
Featured Kit: The CY2315 DK software interface allows the user to run, halt, and single step the processor code. It also allows the user to set complex event points. Event points can start and stop the trace memory on the ICE, as well as break the program execution.
In addition to the CY3213 DK, different Emulation Pods are available to support the range of devices in the PSoC 1 family. They plug into (or are soldered onto) the user's circuit board to provide the physical interface. Pods are available for low-cost expansion of the ICE-Cube capability.