Expanding MEMS with low-cost SOI wafers

The industrial use of silicon on insulator (SOI) substrates is quickly spreading. While this material brings new functionality for microelectronics applications  radiation-hard, high voltage circuits or low voltage and low consumption ICs  it has also shown itself to be of major importance in the MEMS industry. From the first piezoresistive sensors developed back in the 80s, to more advanced inertial sensors and optical devices which have seen the light in the last couple of years, SOI opens new market opportunities for MEMS devices.

Historically, the first MEMS devices were the piezoresistive pressure sensing elements. Their manufacturing is mainly based on the creation of a membrane on the bulk of a silicon substrate by an anisotropic chemical etching. Resistive elements are then added to the membrane that register mechanical strain.

The use of SOI wafers with piezoresistive devices started in the mid 1980s by Kulite and was followed by other companies such as Honeywell and Tronic's Microsystems. Dielectric isolation dramatically enhanced sensor performance while reducing size. Thanks to the creation of strain gauges on the top of the oxide layer of the SOI wafer, electrically insulation from the bulk substrate reduced electrical losses due to changes in temperature. Therefore, the operating temperature range is widened, the upper limit being pushed from 125°C up to more than 250°C. Moreover, junction noise disappears and the dynamic range could be enlarged to 120 dB.

In the late 1980s, a new technological approach appeared in the MEMS industry: surface micromachining. This technique defines MEMS structures in a layer of appropriate material over a substrate. This more advanced approach requires a substrate comprising, in addition to the mechanically active layer, an intermediate layer to be selectively etched  a "sacrificial layer". MEMS structures are defined by a vertical plasma etching of microstructures in the active layer followed by chemical etching of the sacrificial layer. The disappearance of the sacrificial layer allows a local release of the microstructures, which then become movable.

The first approach etched the structures in a polycrystalline silicon layer deposited on an oxide. The principal disadvantages of this approach were in the low thickness  around 15 microns maximum thickness after epitaxy  and the non-homogeneous mechanical characteristics of the deposited polysilicon layer.

Early in the 1990s, the CEA-LETI in France chose to start from an active layer made of single-crystal silicon on top of an oxide sacrificial layer. SOI was therefore chosen. The thickness of the top silicon layer is grown by epitaxy up to 80 microns thick and then the microstructures are etched in this very thick layer of single crystal silicon. This technology provided decisive features for the production of sensors, including:

very low stressed structures made of single crystal silicon

high signal to noise ratio

high resonant Q factor

strong resistance to mechanical fatigue

thick structures with very high aspect ratio

connection of the active layer to the bulk of the substrate.

Therefore, this technology leads to one of the best trade-offs between miniaturization and performance. This technology was first licensed and industrialized in 1997 by Tronic's Microsystems for the production of acceleration sensors. It has then become a generic manufacturing technology and it is now used to produce inertial and pressure sensors, as well as optical devices. Many patents protect the technology and the resulting devices. More recently, the technology has been licensed and is currently being transferred to Motorola for the mass production of low g accelerometers.

For accelerometers, the micro-structure includes a seismic mass which can move in a plane parallel to the substrate. This mass is linked to a frame by two or four flexible beams. A set of electrodes is attached to the seismic mass in addition to the fixed electrodes. The displacement of the mass, due to the acceleration, induces a capacitance variation between the two sets of electrodes.

Using comb structures for detection, other inertial sensors can be manufactured such as gyroscopes. Tronic's Microsystems is currently providing the technology to one of its customers for the development of a gyroscope where performance with enhanced miniaturization is required.

Good linearity

The EPI-SOI surface micromachining has also been used for the achievement of a miniature membrane based pressure sensing element. The pressure transducer is composed of membranes that are formed by a circular wet etching of the sacrificial oxide layer from a central hole in a 4 micron thick single-crystalline top silicon layer from SOI wafers. After this release, the hole is then hermetically sealed. Once more, the membrane deformation, due to pressure variation, induces a capacitance change between the membrane and an electrode implanted in the substrate. The excellent mechanical properties of the single crystal silicon induces linearity of the generated signal. Precision and linearity are better than one percent and the electronic signal processing can enhance these features.

Thanks to high-aspect ratio plasma micromachining techniques, it is possible to manufacture very tiny structures. In the case of the pressure sensors, the sensing element outer dimensions are 0.9 mm x 1.1 mm. Therefore more than 5,500 sensing elements can be processed on a 100 mm wafer. As a result, this sensor is well suited for low price and high volume production applications and very well suited for medical implants thanks to its size, very low power consumption and good linearity.

In the last two years micromachining on thicker SOI substrates has been applied to optical switching applications. The main advantage of using the SOI substrates here again consists in the nature of the single crystal silicon layer. The absence of internal mechanical stresses in the material gives the structures the rigidity, flatness and the mechanical behavior required for movable and reflective parts such as micro-mirrors. Another advantage also lies in the simplification of the process compared to other approaches especially for 3D mirrors.

The optical switches can be either bi-stable (MEMS 2D) between two positions or analogic and controlled (3D MEMS) for a random multi-position access in 3 dimensions. A major family of optical MEMS on SOI that is currently emerging for the switching matrix of higher complexity is based on movable micro-mirrors with one or two rotational axis: the 3D Optical MEMS. When a voltage is applied, the reflecting surface of the mirror can turn through a certain angle thus deflecting a collimated beam coming from an optical fiber some other fiber in a random access operation.

These examples show how SOI is contributing to microelectronics in many different ways. As the production volume of SOI wafers increases, a sharp decrease in price is expected. MEMS applications will benefit from this trend.

The advanced technology of surface micromachining on thick SOI leads to the best trade-off between high performances and miniaturization. Industrial products, such as acceleration sensors or optical switches using SOI substrates are already on the market. Moreover, an increasing use of this material can be forecast for future industrial sensors, such as gyroscopes, resonant strain gauges or seismic detectors, in which a high resonant Q factor is the key parameter. SOI technologies are destined for a wide industrial use in production of high performance and low cost MEMS.