One of the difficulties with building faster computers were the limitations of the system bus on the motherboard. Many Apple II peripheral cards, such as the Disk II controller card which went into the computers' expansion slots were dependent on 1 MHz operation. Apple wanted to maintain hardware backwards compatibility throughout the product line and it was not economically feasible to engineer a work-around for this bottleneck. The other restriction was the limited availability of faster 65xx series of microprocessors which the Apple II family used. Western Design Center (WDC), the designer of the 65C02 (14 MHz) and 65C816 (14 MHz) microprocessors had difficulty procuring faster units, a cause of frustration and delays for both the original Apple IIGS and for the Apple IIc Plus. Some[who?] speculate that the lack of a wide availability of faster microprocessors from WDC is one of the reasons behind the demise of the Apple II.[citation needed]

In the early-mid 1980s, as the available list of Apple II application software grew and these applications became more processor intense, users wanted to have faster machines. Third-party hardware manufacturers came up with some innovative ways to bypass the 1 MHz limit. Initially, accelerator expansion cards recreated the combination of CPU and memory logic of the Apple II onto the card itself. These cards went even further by copying the Apple II ROM code into the card's fast RAM, essentially creating an Apple II on a card. Virtually all of these cards ran at a speed of 3.58 MHz, derived by dividing the 7 MHz signal on the expansion bus by a factor of 2. Incremental 1.7 MHz "half" speeds were available through further division. Later Apple II accelerators used separate on-board crystal oscillators to control speed timing and implemented complex caching techniques with small amounts of fast cache memory to do the acceleration. This type of design likewise allowed for easy upgradeability and was the primary method used in Apple IIGS accelerators.

The Apple II accelerator market was fiercely competitive and could be looked upon as somewhat of a soap opera. Microcomputer Technologies (M-c-T) was an early player with their cache based SpeedDemon card. The company later split up and some of the partners set up Zip Technologies who developed the Zip Chip, while other employees created a company called Bits and Pieces, manufacturers of the Rocket Chip. Zip Technologies successfully sued Bits and Pieces for patent infringement and consequently forced them out of business. As a result, Applied Engineering was forced to discontinue their new TransWarp II accelerator due to their licensing of technology from the Rocket Chip. After the dust settled, Zip Technologies remained the lone player in the 8-bit Apple II accelerator market with Apple Computer licensing Zip's caching technology for the Apple IIc Plus.

Number Nine Apple Booster (1982) was one of the first accelerators for the Apple II series of computers. This card is the original version of Saturn's Accelerator II (thus the Accelerator II PCB shares both Saturn Systems' and NNCC's logos.) At $598, the Saturn was much cheaper than the NNCC, but little information about the board is available today.

Microcomputer Technologies (M-c-T) SpeedDemon card was the one of early Apple II accelerator which used the newer 65c02 microprocessor, and the first to implement caching technology. This allowed the card to use small amounts of memory, making the card less expensive to produce and eliminated the need to waste clock cycles in order to refresh the dynamic RAM that other cards used. Other accelerators which did not use caching operated at 3.56 MHz most of the time but had to slow down to 1 MHz for this refresh cycle. For peripheral cards that required 1 MHz "slow" operations, the Speed Demon always slowed access to slot #6 to 1 MHz, while an on-card jumper controlled the slot #4 and #5 slowdown. The SpeedDemon originally retailed for $295.

Saturn System's Accelerator II was the original accelerator for the Apple II series of computers. The card accelerated the Apple II and the Apple II Plus using a faster MOS 6502 microprocessor and on-board high speed RAM. When the accelerator card was activated, software would execute within the CPU and memory on the card, not utilizing those components on the motherboard. The card used a series of 8 DIP switches to configure slot access speeds as well as the speed of the card. Since the Accelerator was released before Apple Computer's introduction of the Apple IIe. The card would run in an Apple IIe, however software which required a 65C02 microprocessor or used auxiliary memory would not function properly; a problem which was solved with the Accelerator //e, a complete redesign. Saturn Systems changed their name during the early 1980s to Titan Technologies due to trademark complications.

The Accelerator //e was released in 1984 by Titan Technologies, an upgraded version of the original Saturn Accelerator, in response to the introduction of the Apple IIe. The card maintained the 64 KB of RAM of the original card and added the newer 65c02 microprocessor. This card solved the Auxiliary RAM incompatibility problem of the older card, however it did not speed up this second bank of RAM which was common on the Apple IIe.

Applied Engineering was the last company to offer a slot-based Apple II accelerator card, the TransWarp. This new card offered complete slot configurability via DIP switches and speed control via both DIP switches and software. A user could hold down the ESC key upon bootup, to disable the card for speed sensitive applications. In an Apple II Plus, the TransWarp emulated the 16k language card. The TransWarp ran at the same 3.58, 1.7 and 1 MHz speeds as other accelerators of its time, however, it included a whopping 256 KB of on-board RAM. According to the March 1986 Apple Assembly Line (volume 6, number 6) this is how the TransWarp utilized the RAM:

TransWarp's 256K RAM is effectively divided into four 64K banks. When you power-up your Apple with TransWarp installed, all of the ROM from $D000 through $FFFF is copied into one of the high-speed RAM banks. The rest of this bank is not used. A second bank is used in place of the motherboard RAM. The third and fourth banks are used in place of the first and second banks of AUXMEM, if you have a RAM card such as RAMWORKS installed in the AUX slot. If you have a large RAMWORKS in the auxiliary slot of a //e, any additional banks beyond two will still be usable but at "only" 1 MHz.[1]

The same issue of the publication determined that the TransWarp was faster than either the McT SpeedDemon or Titan Accelerator //e when running the same applications, even though all three cards ran at the same 3.58 MHz native speed. The TransWarp was released during the early-mid 1980s with an original retail price of $279. Applied Engineering offered a unique $89 upgrade to the 16-bit 65802 microprocessor, for people who were able to use its advanced features.

The TransWarp II was a completely redesigned accelerator from Applied Engineering (AE). The company scrapped the on-board RAM design of the original TransWarp in favor of a licensed cache based implementation like Zip Technology used. However, instead of using a hybrid chip, Applied Engineering chose to implement the design on a card. Unfortunately, since the design was licensed from Bits and Pieces, makers of the Rocket Chip, and not from Zip Technologies, Applied Engineering was forced to stop selling the TransWarp II not long after its introduction, due to Zip winning a patent infringement lawsuit against Bits and Pieces for Zip's implementation of caching technology.

Applied Engineering's TransWarp III was supposed to be the TransWarp II's replacement after that product's abrupt discontinuation. Because of a dwindling Apple II market in the early 1990s, the TransWarp III never saw the light of day. Some believe that images in advertisements announcing the TransWarp III in Apple II related magazines were complete mock-ups and that the product never existed. The ads touted faster speeds and easy upgradeability when faster 65c02 microprocessors became available.

Zip Technologies, introduced the 4 MHz Zip Chip Model 4000 (also: Zip Chip II - 4) at AppleFest in May 1989(?). This was a revolutionary design. Rather than building an accelerator on an expansion card, Zip used a hybrid chip design known as System in Package (SiP), and used this chip module to directly replace the microprocessor in the Apple II. They took a 65C02 core and combined it with control logic and 8 KB of cache ram into a very compact 40-pin DIP package, not much bigger than the original 65C02 CPU it replaced. By creating this ultra compact, slotless accelerator, the entire untapped market of tens of thousands of Apple IIc computers became available. Within the Zip Chip, all settings were software controllable, including individual slot speeds which could be set at 1 MHz or "accelerated." The accelerator was a cache type, based on Zip Technology's US patent #4,794,523 and was capable of 10 different speed settings. Zip later introduced a Zip Chip Model 8000 (also: Zip Chip II - 8) which had identical features but operated at 8 MHz.

Bits and Pieces introduced the Rocket Chip soon after the Zip Chip was released. The product was nearly identical in look and function to Zip Technology's Zip Chip, however it operated at 5 MHz vs the Zip Chip Model 4000's 4 MHz, and the Rocket Chip II ran at a then blistering 10 MHz when it was released after the 8 MHz Zip Chip Model 8000. One unique feature of the Rocket Chip was its ability to slow the speed of an Apple II down to 0.05 MHz for "slow motion" operability. Although the Rocket Chip was faster in both instances than the Zip Chip, there were some rare software incompatibilities with the chip, while the Zip Chip didn't have any reported problems. These problems were perhaps due to Bits and Pieces pushing the physical limit of their 65C02 cores to squeeze out the extra speed in a game of one-upmanship with Zip Technologies. Zip Technologies ended up with the upper hand when they successfully sued Bits and Pieces for patent infringement and in turn forced the company out of business.

Apple Computer licensed the cache based accelerator design from Zip Technologies for their design of the Apple IIc Plus. This enabled the computer to run 4 times faster than its 1 MHz predecessor, the Apple IIc. Rather than using a monolithic System in Package design of the Zip Chip, which may have caused overhead clearance problems as well as added cost to the compact Apple IIc Plus, Apple economically separated the Zip Chip design into its individual components, using off the shelf static RAMchips for the 8 KB cache.

In October 2001, Michael J. Mahon, an enthusiast who frequents the Apple II usenetnewsgroupcomp.sys.apple2, proposed overclocking the Apple IIc Plus.[2] Over the next few years, newsgroup members reported speeds ranging between 8 MHz - 10 MHz simply by changing the 16 MHz crystal oscillator on the motherboard to a faster one (the Apple IIc Plus divides the oscillator frequency by four to attain the actual processor frequency). Some users with 120ns static RAM cache reported problems attaining 10 MHz while others with 100ns chips were more successful. Most were able to achieve 8 MHz.[3][4]