We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Firefox,
Internet Explorer 11,
Safari. Thank you!

AR# 19753

6.3/6.2 EDK - How to upgrade PPC405 from v1.00a to 2.00c in EDK

描述

Keywords: PPC, upgrade, PPC405, PowerPC, 2VP

Urgency: Standard

General Description:The PPC405 v1.00a was introduced when the EDK tools were still in their infancy. As more and more design support has been added to the tools, this has raised the bar for how cores should be designed. To satisfy this, new versions have been created. In EDK 6.2 release the advances in, and maturing of, the EDK tools have resulted in a stable version (v2.00c), which has all the necessary hooks. This has led to the decision to no longer support version v1.00a.

If you are using PPC405 v1.00a in a design today, Xilinx recommends you to follow the upgrade procedure described below. An alternative to this is to create your own pcore of the old version and continue to use it. Xilinx will not test or support PPC405 v1.00a in future EDK releases. For instructions on how to create your own pcore, please refer to (Xilinx Answer 19531). The v1.00a version of the core is located in your EDK 6.2.2 or older installation.

2. If you are using the instruction side and/or data side OCM interface, please refer to (Xilinx Answer 19558) and (Xilinx Answer 19559) on how to upgrade these interfaces. Be sure to note what the C_TIEISOCMDCRADDR and C_TIEDSOCMDCRADDR parameters are set to.

4. All the TIE* ports on the old instance should be removed, as that information is now provided through the C_TIE* parameters. If your MHS is not explicitly assigning some of the above parameters/ports or bus interfaces, you do not need to worry about them. The default assignments used in the MPD files are unchanged.