Editor:-
November 28, 2016 - a new blog -
Inside
SK Hynix's 3D NAND - on EE Times
compares the memory density Gb/mm2 per tile of various leading 3D
NAND die which are now available in the market.

Among other things the
author -
Jeongdong Choe,
Senior Technical Fellow - TechInsights
(a patent services company) - says "All of the 3D NAND players
have their own unique cell structure, including FG-based and CTF-based cells.
Which one would be better for 128 or higher stacked 3D NAND from the process
integration and reliability viewpoint may be revealed in a couple of years."a different approach to 3D SCM?

Andrew says his company's approach to 3-D memory is "designed to wring
every ounce of advantage out of Quantum Mechanical (QM) tunneling." ...read
the article69,000 flash dies per U in Nimbus's ExaFlash

Editor:-
September 9, 2016 - It was interesting to see in a recent
press
release (from Nimbus)
that 276,480 NAND dies are used to implement 4.5 petabytes of raw storage in a
4U system which was launched recently.former SanDisk CTO joins 3D fabless BeSang

Editor:- August 2, 2016 - today it was
announced
that Kevin Conley,
former CTO at SanDisk
has joined BeSang as a member of
advisory board where he will help guide the company to find SSD applications for
their 3D Super NAND nd 3D
Super NOR technologies - which unlike conventional through-silicon
vias 3D can "stack high-density, multi-memory layers sequentially on top
of other device layers in a single chip at low cost using proven material and
device technologies." Toshiba samples 64 layer 3D TLC

Editor:- July 27,
2016 - Toshiba
today said it is sampling 64 layer 3D TLC flash in a 32GB device and plans
production in the first half of 2017.

Editor's comments:- You can judge
the progress on this technology by the fact that in
March 2015 -
Toshiba was sampling 48 layer MLC.replacing DRAM with flash at battery scale

A strategic lesson to guide future designers is that even
while getting a 50% power consumption reduction (due to flash as RAM) it
is also feasible to increase application performance at the same time because
the software can work with a larger memory capacity (due to the lower
cost of flash
bytes).

Among other things Hunglin says - "With FLC, better
performance can be achieved by reporting to the operating system a larger than
physically implemented main memory. The operating system is thus less likely to
kill background apps, which is why the fast app switching is possible. The FLC
hardware does all the heavy lifting in the background and frees up the tasks of
the operating system." ...read
the article

Everspin says its 256Mb ST-MRAM product
breaks the record for the highest density commercial MRAM currently available in
the market.

Editor's comments:- One of the key questions with
MRAM's viability has always been - how does its denisty scaling compare with
flash? - given that it started behind the curve and can't afford to lose
comparative ground - if it is to get anywhere.

Now - 6 years later - the sampling
state of the art is 256Mb. That's 16x more density in 6 years. So you
can judge this for yourself.new funding for endurance stretching NVMdurance

Editor:- March
29 , 2016 - NVMdurance
recently announced
it has completed a $2.5 million Series A round of financing. Existing investors
New Venture Partners, ACT Venture Capital, Enterprise Ireland and NDRC have
invested bringing total funding to $2.77 million.

"This
financing builds on an exceptional year from NVMdurance which saw its first
customer announcement  with
Altera (now part of
Intel)" said Steve Socolof
of New Venture Partners LLC. "The NVMdurance software increases the number
of program-erase cycles in Altera's FPGA-based storage reference design by up to
7x times compared to existing NAND flash implementations."

Editor's
comments:- NVMdurance says the power behind its endurance stretching IP is
the use of offline machine learning software that automatically learns the
optimal parameter settings for the NAND device.

Over
the years I've reported
many
examples of this (erase) and also other methods of
data
destruction the rule of thumb has been:- the bigger the capacity of
the drive - the more time in seconds it takes (and more electrical energy
too).

A
press
release today from Foremay suggests a
fast and scalable sanitization route may come from what they call "crypto
erase" - which renders all data scrambled, scattered and useless.

It's
fast. Takes only a second to complete the crypto erase of a Foremay SED SSD with
capacity of up to 20TB.
new market opportunities and technical possibilities for flash as
volatile memory

Editor:- December 3, 2015- The split personality
of the future flash market - due to emerging uses of flash as replacements
for server
DRAM (a role which
de-emphasizes the non volatile characteristic of flash) is one of the ideas
discussed in my new home page blog on StorageSearch.com -
the big SSD
ideas of 2015.TrendFocus compares worldwide raw physical storage capacity of
flash and HDDs

The author Don Jeanette
concludes - "it is evident that there is not enough NAND supply to take
over all the storage requirements in the world at this point."

Editor's
comments:- that's true as far as it goes.

But in my classic
article - meet Ken
- and the enterprise SSD software event horizon (2013) - I explained why I
think that SSDs will easily replace all hard drives in the enterprise
much sooner than this type of capacity gap comparison would lead you to
think. (It's a system architecture and virtualization thing.)

Editor:-
September 14, 2015 - Crossbar
today
announced
it has completed a $35 million Series D funding round bringing total
investment to $85 million to date.

Crossbar plans to use the funds to
continue the commercial ramp of its
RRAM NVM memory
technology which is based on a simple device structure using CMOS friendly
materials and standard manufacturing processes. It can be stacked in 3D, making
it possible to combine logic and memory onto a single chip at the latest
technology node.

Crossbar is currently working with beta customers to
bring products to market in 2016. Intel, Micron 3D ReRAM

Editor:- August 24, 2015 -
Back in
JulyIntel and Micronunveiled
a new bulk material based resistive memory nvRAM platform which they called
3D
XPoint technology (later branded as Optane). At that time - the
technical information about the memory technology were vague and lacking in
detail.

More details emerged during the shows which immediately
followed (FMS and IDF) and here's a link with the
webcast.

Intel
says cost per bit is likely to be somewhere between DRAM and nand flash.

Latency
is said to be 1,000x faster than nand but slower than DRAM.

Storage
density? A single chip can store 128Gb.

Sampling? Later this year with
production in 2016.

Some of the many form factors and attach points
which might benefit from this new technology are PCIe SSDs and Memory Channel
SSDs.

As with any new memory technology it will take time and
experience to prove whether Optane memory has enterprise grade reliability. For
this reason and due to the need to establish a new software ecosystem - early
uses of the memory will probably be in experimental cloud appliances and
consumer gaming devices.

...Later:- Initially I had serious
doubts about the market readiness state of the Intel / Micron preannouncement
because it appeared to leapfrog previously known memory offerings. And
storage history has
taught us 2 valuable lessons about new memories.

the new memory is usually a small increment (2x, 4x etc) what was done
before - to minimize the risk of new problems creeping into the next scaled
geometry iteration, and

I've heard such "market breakthough stories"
from the anti-flash nvm world many times in the past 12 years - usually
precipated by a need for more investment cash.

Where can you find more
reliable information about ReRAM?

I've found a website which seems to
have a more measured and informed approach to what has been happening in ReRAM
land - and reading it may help you guess better when these advances might
really intersect with the mainstream SSD market.

Editor:- July 1, 2015 -Avalanche Technology
today
announced
it is sampling the industry's first STT-MRAM chips manufactured using
standard CMOS 300mm wafer processing.

Avalanche's new memory device
is a 64Mb chip with an industry standard SPI interface built on a 55nm node
geometry. Nantero gets $31 million funding for 300º C retention
nvram

Editor:- June 2, 2015 -
Nantero today
announced
a $31 million Series E financing round for its
NRAM technology which the company
says is scalable to below 5nm and which has >1,000 years retention at 85º
C or more than 10 years at 300º C.

Editor's comments:-
Nantero was founded 14 years ago, and the last time I wrote about them was in
2006.

But the size and educational sophistication of the SSD ecosystem
today means that designers
(and investors) can
appreciate the nuances of difference which might be useful in extreme boundary
applications.

Offering a scalability roadmap below the current
commercial limits of flash,
and ruggedness way beyond flash - Nantero's technology has attractive features
which might lure SSD designers out of their 40 year comfort zone of
trapped charges in semiconductor cells.Micron in production with 2D 3 bits per cell 16nm nand flash

Editor:-
June 2, 2015 - 2 years after sampling its
first
16nm nand flash - which was 2D with MLC nodes (2 bits per cell) -
Micron today
announced
it has progressed to the next evolutionary step and is now shipping 16nm
(which is still 2D) but is now 3 bits per cell (TLC).

In both cases
the products were 16GB memory chips.

Micron says it believes that
TLC will account for almost 50% of the total NAND gigabytes shipped in 2015.update on the readiness of non flash NVMs to participate in SSDs

"Demand for ST-RAM is coming from buffer storage applications, such
as high-end enterprise-class SSDs..."

ReRAM has already been promised for delivery in
military SSDs (Jan 2015 news) but
forthcoming advances in repairable vertical architecture could increase the
desnsity to the point where it's attractive as an intermediate level of memory
in servers too...

Some of these applications have been intuitively
obvious for some while - but this article gives a better idea of commercial
readiness and an indication of whether the next generation problems are being
tackled in a fast enough timeframe to be relevant to the
SSD market. ...read
the articleHow much 3D flash in 2015?

Editor:- May 5, 2015 -
TrendForceestimates
that 3D will make up just 7% of NAND flash's average annual output for
2015. who's who in ReRAM? - IHS article

Among
other things re ReRAM - Peter Clarke says - "It has been the subject of
much research over the last decade because it had been predicted that NAND
flash memory would fail to scale beyond critical dimensions of 20nm."

The
article tells you which companies are still in this technology and discusses
current memory densities and controllers. ...read
the article

Toshiba
samples 48-layer 3D nand

Editor:- March 26, 2015 - Toshiba today
announced
it is sampling the world's first 48-layer 3D stacked 2 bit nand
flash memory in 16GB
chips aimed at the high capacity SSD market.

Mass production is
anticipated to be in the first half of 2016.Intel and Micron promise 32 layer 3D nand SSDs by 2016

Editor:-
March 26, 2015 - Micron
today
announced
it is sampling a new 32 layer 3D nand flash memory using floating gate
cells - which has been designed in collaboration with Intel - and which
provides 32GB MLC (2 bits per cell) in a single chip.

A higher
density TLC (3 bits per cell) version with 48GB capacity will sample in the
next few months.

Both devices are expected to be available in SSDs
within the next year.3D InCites blog re Samsung's 3D TLC

Editor:- March 4,
2015 - What happens when you combine
3D
and
3
bits per cell in the same flash?

Phill LoPresti
President and CEO of Everspin said "With a leading worldwide foundry and
storage customer participating in Everspin's Series B investment round, the
entire industry spectrum is acknowledging ST-MRAM as the leading contender to
drive beyond the limits of current mainstream memory."

Editor's
comments:- Everspin's MRAM is
one
tier of the non volatile caching technology used in
Skyera's rackmount
SSD systems.

Western Digital
recently bought
Skyera - and my guess is that this investment in Everspin is to take out some of
the risk of future availability of these memory parts at a time when an assured
supply at higher volume may soon be needed.So you want x3 and 3D?

Editor:- January 23, 2015 -
Even if you already thought that
adaptive R/W
and DSP was an essential way for getting usable SSDs out of smaller 2D nand
flash - then there are even more reasons for using this technology on the
journey into 3D.

Among other
things in this paper:- DensBits says that the scope for inter-cell interference
grows from 8 identifiable routes in 2D to 26 for each cell in 3D.But
memory modem technology (DensBits's branding for their collection of adaptive
R/W DSP IPs) will (over and above everything it already does for 2D)
intelligently decouple read operations according to the severity of read
operations expected in the new 3D architectures - and even supports the notion
of TLC (x3) within 3D. (Which "needs state of art decoder and signal
processing".)

"...Our combined company will be a leading provider
of embedded MCUs and specialized memories" said T. J. Rodgers, Cypress's founding
president and CEO.SSDs are made of this

Editor:- October 14, 2014 -
Without memory - there would be no SSDs.

And while naturally the
emphasis in SSD thinking is mostly on - how can we do useful and affordable
things with SSDs? - despite how terribly flawed the
raw material is which we
have to work with (which leads you to
architecture,
controllers,
data integroty
and software) - it can
nevertheless be strategically useful for SSD specifiers to sometimes brace
themselves for a deep dive down into the cold details of how much better (or
worse) those raw memory characteristics are going to get - so you can
anticipate future developments.

"We're seeing excitement build
for a new class of memory:- persistent memory - which has the persistence
capabilities of storage and access performance similar to memory.

"Given this richness of media technologies, we now have the
ability to create systems and data center solutions which combine a variety of
memory types to accelerate applications, reduce power, improve server
consolidation, and more.

"We believe these trends will drive a
new set of software abstractions for these systems which will emerge as
software-defined memory  a software driven approach to optimizing memory
of all types in the data center." ...read
the article

Editor:-
September 25, 2014 - In its Q4 earning conference call today Micron said that about
66% to 75% of its nand flash had gone into client SSDs - with the remainder
being enterprise. However Micron also said its enterprise SSD revenue was up
79% quarter-on-quarter. ...full
transcript on SeekingAlpha.comSTT-MRAM? - update report

Among other things the article's author -
Rachel Courtland
Editor-in-Chief of IEEE Spectrum Magazine - says "STT-MRAM may be claiming
some of the enthusiasm once reserved for other alternative memories, such as
ferroelectric RAM, phase-change memory, and resistive RAM. But its success will
come down to manufacturing technology and how well it can compete on cost."
...read
the articleSanDisk and Toshiba collaborate on 3D nand fab

Editor:-
May 13, 2014 - SanDisk
and Toshiba today
announced
that they have begun work on demolishing and converting a 2D NAND fab at
Yokkaichi Operations, in Mie prefecture, Japan over to 3D capability with a
view to enabling 3D output in 2016. Samsung starts 3D nand production at new fab in China

Editor:-
May 9, 2014 - Samsungannounced
that its new memory fabrication line in Xi'an China - which will make 3D
V-NAND - has begun full-scale manufacturing operations.

50% of global
NAND flash is made or processed in China.I just wanted solid-state memory at a cost per bit as low as a
CD-ROM or a DVD - said Contour Semiconductor's founder - whose company
yesterday named a new CEO

Editor:- April 23, 2014 - Contour Semiconductor
is a new (long time in development) company which I only learned about this
week via a couple of my linkedin contacts.

You might want to learn
more about them too.

Why's that?

"Contour's new chip
technology has the potential to be every bit as disruptive to the solid state
flash market as flash was to hard disks drives" says Saul Zales who
was
named
Contour's new CEO in a press release yesterday.

Saul Zales is well
qualified to judge those markets - as his background includes flash or SSD
related business development at some well known SSD companies - namely
Fusion-io and
Intel.3D NAND flash challenges - an industry roundtable discussion

Among the many practical
considerations discussed in this article was the question of - "how is the
semi industry preparing for the transition to 3D memory?"

On the
issue of scalability limits and market pacing - the article reveals that
vertical scalability currently appears feasible in roadmaps upto about 100 cell
stack layers.

But the rate of 2D shrinks in successive 3D designs
will slow down from the recent historic average of 20% per generation to 5% -
due to the problems of registration which accumulate up as you add more
layers. ...read
the articlenew technology report - How 3D NAND flash Stacks Up

Editor:-
January 15, 2014 - "In the 2D planar era, the basic underlying floating
gate technology (with a few exceptions) was essentially the same amongst all the
NAND flash manufacturers, however in the 3D era (which has recently begun) all
NAND flash memory
manufacturers are developing different 3D architectures" said Gregory Wong, President, Forward Insights
in a recent email introducing a new market report ($5,499) called
How 3D
NAND Stacks Up (outline pdf) - which is co-authored with
NaMLab (Nano-electronic Materials
Laboratory) - in Dresden, Germany.

The new report describes the
various different approaches to 3D NAND design and provides an independent view
of the technical challenges which memory vendors have to solve to deliver
viable competing memories at different geometries.Half Micron's nand flash now used in SSDs

SSDs accounted for 48% of trade volume in nand flash (of which
2/3 was consumer
SSDs)

in addition to traditional demand from the mobile market (phones etc)-
the company had identified
industrial
embedded applications in automotive markets as a business opportunity which
itself was taking around 10% of flash volume

the big volume ramp for 3d nand flash was anticipated to be in the 2nd
half of 2015

Crocus petitions for dismissal of core STT patents

Editor:-
October 30, 2013 - Within the
SSD market all
those other types of of non volatile memory appear as mere driblets
compared to a sea of flash
memory - but that could change one day so it's worthwhile cementing sound
patent foundations.

Editor:-
October 4, 2013 - In a
market
forecast yesterday IHS
iSuppli said - "by 2017 65% of all NAND flash memory chips
shipped worldwide will be produced using 3-D manufacturing processes, up from
less than 1% this year."

Editor's comments:- the
transition towards a new way of making flash memory (by vertical stacking of
deposition layers at the chip level) currently looks like a more viable way of
increasing flash densities in the long term - compared to shrinking the geometry
of cells - which is already straining the ingenuity of circuit designers to
counteract and manage
the impact of intrinsic defects in the materials which become more significant
as the stored charge for each virtual data bit gets smaller.

Editor:-
August 13, 2013 -
Samsung today
announced
it has started production of 2.5" SATA SSDs aimed at the enterprise market
- which use the company's new
128Gb
3D Vertical NAND flash memories. Samsung says its 3D flash is
intrinsically more reliable, faster and uses less power than traditional 2D
flash at the same (10nm class) line geometries.

Editor's
comments:- As SSDs - and compared spec by spec to any other SSDs - the new
V-NAND SSDs aren't remarkable - 960GB capacity and 35K
write endurance
- which is what the market (in this case -
cloud storage array
makers want).

But Samsung's new V-NAND SSDs are simply the first step
in the journey towards characterizing this new technology and to achieve
customer acceptance.

Samsung says its 3D technology could deliver
upto 24 cell layers vertically, using special etching technology that connects
the layers electronically by punching holes from the highest layer to the
bottom.

When that happens - each wafer will be able to deliver an
order of magnitude more storage capacity from the same number of wafer starts -
using the same line resolution as traditional (planar) flash cells. (If you
think about the difference it made when the market went from SLC to MLC and then
again to TLC - the eventual market impact will be bigger than all those
combined.) But getting the chips and production equipment proven and economic
for double digit 3D cells will take years from where we are now.

Adding
each vertical layer takes additional processing time. In some ways it's like
adding more layers to your pizza - except that - the successive layers of
topping have to match up very precisely. (Around 2,000x more precisely than the
state of the art in metal additive technology - to give you an idea of the
difficulty and the elapsed time element.)Crossbar has silicon for 3D RRAM

Editor:- August 5,
2013 - Crossbar today emerged
from stealth by
announcing
a working silicon demonstration of its 3D stacking technology which the company
says will enable the commercial use of RRAM in much higher capacity drives
than before. Micron samples 16nm nand

Editor:- July 16, 2013 -
Micron today
announced
it will be in full production of 16nm nand flash (128Gb MLC memory devices)
in Q4 this year - and is designing SSDs around this process geometry - to ship
in 2014.Crocus gets funding for x8 multibit magnetic semiconductor memory

Editor:-
April 8, 2013 -
Crocus Technology
today
announced it has
been awarded a contract from IARPA
to develop an 8-bit per cell memory based on its Magnetic Logic Unit
technology.

This will greatly reduce the energy consumed per
written-bit compared to any other memory technology, including DRAM, Flash,
SRAM and MRAM.

Douglas
Lee, VP, product development at Crocus compared the 8 bits per cell
which the company thinks it can get from its MLU technology with the
state-of-the-art in nand flash - which is 3-4 bits per cell and also compared
to alternative magnetic semiconductor technologies like MRAM - which is
still only 1 bit per cell storage (SLC).2017 could be 1st billion dollar year for non-flash nvm

The
MR10Q010 (1Mb in a 16 pin SOIC) has a quad SPI serial interface instead of the
single line interface offered in earlier MRAM devices. This makes it more
attractive for applications which need the simplicity of no wear-out
non volatile memory and
fast write performance in low capacity and small footprint applications.Proton gets funds to rejuvenate flash

Editor:-
December 20, 2012 - Micron
today
announced
that revenues from sales of its NAND flash products were 4% lower in the
quarter ended November 29, 2012 than they had been a year ago.

Sales
volume of the company's nand flash decreased by 9% - but average selling
prices increased 5%. Overall Micrion reported a net loss in the quarter of $275
million on sales of $1.8 billion.

In a
conference
call Micron said that SSD shipments had grown 20% compared to the previous
quarter. SSDs are 17% of Micron's nand business and the company estimates that
35% of the nand flash it supplies to trade customers end up in SSDs. MLC
was about 80% to 85% of nand flash wafer production with SLC and TLC making up
the rest.experimental technique eliminates flash endurance limit

The
technique - which StorageSearch.com does not think is feasible to scale for
commercially competitive memory densities - involves designing addressable
heaters in the memory array which can pulse upto 800 degrees C for a few
milliseconds. This thermal "refreshing cycle" anneals the chip
material and heals common wear-out defects while also enabling the cells to be
run faster.

"Afterward, we realized that there was no new physics
principle invented here, and we could have done this 10 years ago" said
Hang-Ting Lue,
the project director at MacronixMicron in volume production of 1Gb PCM

Editor:- July
18, 2012 - Micron
today
announced
it was the 1st company to be in volume production of Phase Change Memory
(PCM).

The company's 45nm memories have upto 1Gb in a multichip
package.

Editor's comments:- PCM fans will get excited about
this.

But before we get carried away on a tidal wave of PCM SSD
speculation let's recall the reason we still use flash to implement the bulk
storage capacity in nearly all SSDs (despite flash's many
defects and
complex ramifications).

PCM
can be viable as an alternative to battery backed
RAM in the
cache part of a
flash SSD. Some SSD oems have already done that. But PCM's storage density
is too low to replace flash in mainstream SSD applications for at least the next
3 years.

You can read more about various nvm technologies which were
going to make flash obsolete (including details of the 1st PCM PCIe SSD which
was unveiled a year ago) in my article
flash SSD's past phantom
demonsSTT secures $36 million A round for OST-MRAM

STT says
"the company is poised to create the next generation of memory
applications combining the non-volatility of flash with the read and write
performance of DRAM and SRAM into one, seamless product."Rambus gets into the nv memory IP market

A spokesperson for
the Moneta SSD design team - Professor
Steven Swanson said "...Moneta gives us a window into the future of
what computer storage systems are going to look like, and gives us the
opportunity now to rethink how we design computer systems in response."

Swanson says he hopes to build the 2nd generation of the Moneta
storage device in the next 6 to 9 months and says the technology could be ready
for market in just a few years as the underlying phase-change memory technology
improves.

Editor's comments:- in a white paper
Protoype
PCM Storage Array (pdf) the team outlines the design and architecture of
their PCM SSD prototype and also compares aspects of performance with entry
level PCIe flash SSDs from
Fusion-io. In a
recent article
I warned that you should not pay too much heed to comparative PCIe SSD
benchmarks - because from different arbitrary selected angles they can "prove"
different arbitrary performance rankings. I wouldn't be surprised if some
investors take fright that a PCM SSD scored higher than a Fusion-io SSD in some
of the published graphs. But for those who understand SSD architecture it
doesn't reveal anything new.

In my view this prototype clearly
demonstrates the strengths and weaknesses of PCM as an SSD technology.

PCM SSD strengths vs flash

The granularity of writes
in PCM is smaller and faster - which means that small R/W operations have higher
IOPS. If you have apps where that is important you can simply buy
SSDs with various
ratios of integrated RAM cache. That would give you small block IOPS
better than PCM - end of story. PCM has higher
endurance
than SLC - which means that the
SSD controller
overhead applied to endurance can be lighter than in most flash systems. Hence
potentially faster latency through to the media.

PCM SSD
weaknesses vs flash

The prototype PCIe SSD card provides capacity
which is similar to RAM SSD
density - but with a large block R/W throughput which is much lower than
flash arrays. This
implementation used 16MB PCM chips.

Flash allows higher capacity writes
to a single chip - and this gives better peak performance results than PCM when
exploited in parallel architecture arrays. You can't get those flash peak
performance numbers from a PCM array in the same board footrpint - because many
PCM chips have to be written to concurrently to achieve the same capacity R/W
as a single flash chip. That means with today's technologies - flash SSDs
have a higher proportion of ready to write memory chips in the same chip count
population as PCM SSDs.

Editor:-
January 11, 2011 - Forward Insights
and its research collaborators have compiled an in-depth, independent analysis
which analyzes the options for various
non volatile memory
technologies which could become viable in storage after floating gate NAND flash
hits fundamental scaling limitations

What's after
NAND? (pdf outline) is the product of experts in floating gate and charge
trap flash, and resistive and emerging memory technologies. This new report
(price $10k) evaluates 3D NAND and cross point memory concepts from Hynix,
Intel, Macronix, Micron, Samsung, SanDisk, Toshiba and Unity and concludes with
a roadmap till the end of the decade. Toshiba integrates ECC into raw flash

Editor's comments:- as discussed in my recent article -
bad block
management in flash SSDs good blocks and less good blocks have always
coexisted in flash memory. But as device geometries shrink (to increase
capacity and speed) the margin of error between usable and non usable cells has
shrunk too. In practical terms this means that the raw media quaility of new
flash chips has declined in the past decade from under 1% defects, then 2%, 5%
and I've seen projections as high as 10% for emerging MLC.
read longer version of
commentsnew book - Inside NAND Flash

The publishers say that
SSD designers must
understand flash technology in order to exploit its benefits and countermeasure
its weaknesses. The new book is a comprehensive guide to the NAND world -
from circuits design (analog and digital) to
reliability. new Samsung phone flash

This
comparison
table on Freescale's web site suggests 10x faster write cycle - and
upto 30xendurance
(10 million cycles) than traditional flash. The technology is shipping in some
embedded microprocessors.Macronix research pushes flash density

Editor:- June
16, 2010 - Macronix
today
announced
its research results related to its patented BE SONOS (barrier engineering)
charge-trapping technology which could make terabit NAND flash feasible.

Editor:- April 28, 2010 - Samsung Electronics
today
announced
shipments of a 512Mb PRAM MCP which is is backwards compatible with 40nm
NOR flash memory in both
its hardware and software functionality allowing mobile handset designers the
convenience of retrofitting the 3x faster writing PRAM into exisiting
designs based on NOR.

Editor's
comments:- NASA has had a lot of
mentions
by SSD and storage vendors in articles and news here on the mouse site. Some of
the application contexts have been ground based - but many have also been in
space.

FYI the spacecraft image shown here isn't from NASA - it's from
my
1990s
unfinished online SF novel. One of many which I may resume when the
SSD market slows down and becomes
more
predictable. (That's an excuse you can borrow and use yourself.)

.

.

"The three largest
markets for NAND Flash are smartphones, SSDs and tablets in that order."

"If these new memories
really are as good as the claims, why are we not seeing them in production
applications today? The answer appears to be inertia" - says
Brian Bailey, Technology
Editor - Semiconductor Engineering

Dave Lazovsky,
CEO of Intermolecular expands on
this by saying - NAND flash is a $30B industry that has tens of billions of
dollars in capital infrastructure that would need to be retooled. The big 4
players represent 95% of the market and they have a lot of existing investment.
The entire cost equation is CapEx, so they need to milk the tail of the revenues
as long as they can."

"....nobody really
knows how long NAND can keep scaling. So we have to keep trying and we have
to be innovative. But we are aggressively working on the future NAND, future
technologies beyond NAND...."

This article which reviews the architecture of power
line disturbance data integrity mitigation schemes in every major type of SSD
will help you understand why some SSDs which (work perfectly well in one type
of application) might fail in others... even when the changes in the
operational environment appear to be negligible.