The microserver phenomenon is just emerging, but it has all the earmarks of a disruptive market shift. The concept was invented to more closely match hardware capabilities with evolving datacenter workloads and energy usage. A near insatiable demand for Web-based serving and content delivery and a plethora of big data applications, combined with the escalating costs of power and cooling, has forced CPU makers to rethink their priorities. Calxeda, Marvell, Intel, and others recognized these trends forming years ago and started designing ultra-low-power parts aimed at these high-growth application areas.

High performance computing is somewhat on the periphery of this phenomenon. The HPC user’s obsession with performance, especially floating point performance, is rather at odds with these FLOP-challenged chips. And for the initial crop of ARM-based servers, there is the additional limitation of 32-bit computing, which cuts across both HPC and enterprise computing.

Calxeda’s EnergyCore processor, for example, is a quad-core ARM chip of Cortex A9 vintage, the same 32-bit architecture that powers the latest dual-core iPad (sans the PowerVR GPU). And although the Calxeda chip is marginally faster than the iPad chip, its top speed is just 1.4 GHz. With less than half the clock frequency and half the number of cores of a midrange Xeon CPU, the EnergyCore has about 1/10 the overall performance of a Sandy Bridge E5-2600.

The upside, of course, is power usage. While that same 8-core Sandy Bridge part has a 100-watt TDP, the EnergyCore SoC maxes out at less than less than 4 watts. And that includes a high performance on-chip fabric switch, which eliminates the need for a lot of network cabling and energy-sucking switches. The chip also incorporates a management engine that does high-level functions like intelligent node routing and power optimization.

When you add in 4 GB of RAM, a complete Calxeda server is only 5 watts. A four-node, 16-core reference board designed by Calxeda consumes just 20 watts and is 10 inches long.

The catch is that the application has to parallelize rather well. According to the chipmaker, what would have taken 400 servers of a conventional x86 setup now requires 1,600 Calxeda-based servers, albeit with just 1/10 the power requirement, 1/20 the rack footprint, and less than half the up-front costs. That level of savings is attracting a lot of attention from users with cluster apps that can scale reasonably well but don’t require scads of single-threaded performance or raw FLOPS.

That represents a large number of Web and enterprise workloads, but there is also a rather nice subset of HPC applications that can take advantage of this platform. According to Calxeda vice president of marketing Karl Freund, a lot of data-heavy HPC applications are fair game for ARM clusters. Any MapReduce/Hadoop-type application or really any code that is I/O- or memory-bound, rather than compute-bound, is a “great fit” says Freund.

It includes a number of big data-ish apps like financial and risk modeling, seismic codes, and various type of signal processing workloads. Freund also thinks there’s a case to be made here for genomic analysis. In these applications, performance tends to be constrained by the bottleneck at external storage and/or main memory, so you don’t need a fast clock on the CPU; it’s going to be waiting for data regardless of its GHz rating.

In fact, for data-bound codes, the slower the chip the better the performance per watt. That’s the essential design point of these ARM server chips, since they are geared for throughput processing on embarrassingly parallel workloads. And in many cases, you don’t need that much floating point horsepower either.

Even for traditional HPC science simulations, where floating point performance is often critical, the Calxeda solution might be the way to go. Although Freund admits that their CPU is not designed for FP performance, the hardware does include an FPU with both single and double precision FP support, not to mention a NEON SIMD engine with even better single precision performance. But it is by no means a high-end floating point microprocessor in the fashion of a Xeon or an Opteron.

Even in HPC though, that’s not always necessary. In conversations with users at Sandia National Labs, Freund related that only about 5 percent of the aggregate cycles on the labs’ simulation codes were double precision floating point operations. That suggests the Calxeda offering might be able to effectively negotiate a simulation code, slowing down on the floating point curves and making up time on the integer straightaways.

Another consideration is the movement toward heterogenous computing in HPC, where GPUs and to a lesser extent, FPGAs, are being employed as computational accelerators. Where applications can take advantage of such acceleration, a low-power ARM, rather than a big Xeon or Opteron, may be all that’s necessary for a host-side CPU. Freund says at least one customer is toying with the idea of hooking a Calxeda-based server to an FPGA for just such an arrangement.

To date, the company has attracted five OEMs that have designed servers around the EnergyCore SoC. HP and Boston Limited have demonstrated their Calxeda gear in public. HP’s offering, the Redstone Development Platform (4U 288 nodes), is not a commercial product, per se. It’s being distributed to select customers for testing and evaluation only. The Boston Limited platform, known as Viridis (2U 48 nodes), is also in the pre-commercial stage and is likewise being distributed to “interested parties.” And although Dell’s “Copper” microserver is officially powered by Marvell’s ARM server chip, the server maker is also in cahoots with Calxeda on other designs.

The remaining two Calxeda OEMs will remain nameless for the time being. However, according to Freund, three of the five system vendors should begin shipping Calxeda-powered servers in volume by Q4 of this year.

In the meantime, Sandia and MIT have signed up as beta sites for running some HPC codes through Calxeda hardware. A set of HPC libraries and packages have already been ported to the platform, including various flavors of MPI, BLAS, ScaLAPACK, Ganglia (monitoring) and Condor (checkpointing). Language support, including C, Fortran, Perl, Python, and Ruby is there as well.

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