A position is available in a private company located in Abu Dhabi, United Arab Emirates for someone who has 8+ years of experience developing cryptographic primitives. The period of employement is between 1 to 2 years and the salary will be based on the experience of the applicant.

We describe an implementation of the protocol of Damgard, Pastro, Smart and Zakarias (SPDZ/Speedz) for multi-party computation in the presence of a dishonest majority of active adversaries. We present a number of modifications to the protocol; the first reduces the security to covert security, but produces significant performance enhancements; the second enables us to perform bit-wise operations in characteristic two fields. As a bench mark application we present the evaluation of the AES cipher, a now standard bench marking example for multi-party computation. We need examine two different implementation techniques, which are distinct from prior MPC work in this area due to the use of MACs within the SPDZ protocol. We then examine two implementation choices for the finite fields; one based on finite fields of size $2^8$ and one based on embedding the AES field into a larger finite field of size $2^{40}$.

Description: In this PhD thesis I propose coprocessors architectures for high performance computations\r\nof asymmetric primitives like RSA, Elliptic Curves and Pairing. Coprocessors have\r\nbeen implemented in FPGA, and propose the lowest latency ever showed in public litterature on such targets. The novelty of these architectures is the usage of the Residue\r\nNumber System (RNS), an alternate way to represent big numbers. The work presented\r\nhere confirms with experimentation the theoretical advantages of this system previously emphasized by [14, 13, 43]. Together with this theoretical advantage RNS computation can be efficiently parallelized, and getting highly regular and parallelized architectures to reach high frequency while computing modular operations in few cycles is possible, whatever is the size of the numbers. For example, a scalar multiplication on a generic 160 elleptic curve can be executed in 0.57 ms on an Altera Stratix, and in 4 ms on a 512 bits curve, compared with classical representations which hardly do the same in twice this time with comparable technologies (except for particular curves). For Pairing the results are even more interesting, since a 4 times division of the latency had been reached by the time [35] was published, and the first time a Pairing over large characteristic fields was executed in less than 1 ms on a FPGA. Eventually, I demonstrate the ability RNS to provide original solutions to protect computations against side channel and perturbation threats. I propose 2 countermeasures to thwart faults and power analysis which can be used on every primitives\r\nrelying on big number modular arithmetic. These countermeasures are designed to be efficiently adapted on the RNS coprocessors.[...]