Fast floating point library with hardware multiplier and enhanced core instructions support for all the new ATmega chips

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AVR specific extensions for:

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Transparent, easy accessing of the EEPROM & FLASH memory areas, without the need of special functions like in other AVR compilers

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Bit level access to I/O registers

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Interrupt support

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Support for placing bit variables in the General Purpose I/O Registers (GPIOR) available in the new chips (ATtiny2313, ATmega48/88/168, ATmega165/169/325/3250/329/3290/645/6450/649/6490, ATmega1280/1281/2560/2561/640, ATmega406 and others)

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Compiler optimizations:

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Peephole optimizer

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Advanced variables to register allocator, allows very efficient use of the AVR architecture

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Common Block Subroutine Packing (what our competition calls “Code Compressor”), replaces repetitive code sequences with calls to subroutines. This optimizer is available as Standard in CodeVisionAVR, at no additional costs, not like in our competitor’s products.

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Common sub-expression elimination

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Loop optimization

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Branch optimization

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Subroutine call optimization

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Cross-jumping optimization

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Constant folding

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Constant literal strings merging

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Store-copy optimization

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Dead code removing optimization

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4 memory models: TINY (8 bit data pointers for chips with up to 256 bytes of RAM), SMALL (16 bit data pointers for chips with more than 256 bytes of RAM), MEDIUM (for chips with 128k of FLASH) and LARGE (for chips with 256k or more FLASH). The MEDIUM and LARGE memory models allow full FLASH addressing for chips like ATmega128, ATmega1280, ATmega2560, etc, the compiler handling the RAMPZ register totally transparently for the programmer. This feature is available as Standard in CodeVisionAVR, at no additional costs, not like in our competitor’s products.