PIPELINING

Pipelining
is an implementation technique where multiple
instructions are overlapped in execution. The computer pipeline is divided
in
stages. Each stage completes a part of an instruction in parallel.
The stages are connected one to the next to form a pipe - instructions
enter at one end, progress through the stages, and exit at the other end.

Pipelining does not decrease the time for individual instruction
execution. Instead, it increases instruction throughput. The
throughput
of the instruction pipeline is determined by how often an instruction exits
the pipeline.

Because the pipe stages are hooked together, all the stages
must be ready to proceed at the same time. We call the time
required to move
an instruction one step further in the pipeline
a machine cycle
.
The
length
of the machine cycle is determined by the
time required for the slowest pipe stage.

The pipeline designer's
goal is to balance the length of each pipeline stage
. If the stages are perfectly balanced, then
the time per instruction on the pipelined machine is equal to

Time per instruction on nonpipelined machine
Number of pipe stages

Under these conditions, the speedup from pipelining equals
the number of pipe stages. Usually, however, the stages will not be perfectly
balanced; besides, the pipelining itself involves some overhead.

We will describe the principles of pipelining using
DLX
and a simple version of its pipeline. Those principles apply to more
complex
instruction sets
than DLX , although the
resulting pipelines are
more complex.