Abstract

A detailed analysis of the cross-like Hall cells integrated in regular bulk CMOS technological process is performed. To this purpose their main parameters have been evaluated. A three-dimensional physical model was employed in order to evaluate the structures. On this occasion, numerical information on the input resistance, Hall voltage, conduction current, and electrical potential distribution has been obtained. Experimental results for the absolute sensitivity, offset, and offset temperature drift have also been provided. A quadratic behavior of the residual offset with the temperature was obtained and the temperature points leading to the minimum offset for the three Hall cells were identified.