parameterization: use c++ template parameters. initiation interval can have a big impact on resource sharing (they present an example of this at the end of section 6)

time division multiplexing: In pipelines with feedback loops registers cannot be inserted freely without introducing pipeline stalls - these recurrences (feedback loops) limit throughput. The inner loop had a 15 cycle recurrence, so c-slowing (or time division multiplexing) over 15 separate datasets accommodated the recurrence without any pipeline stalls. HLS reports the recurrences to the designer.

FPGA optimizations: bit-width optimization (18-bit fixed point using c++ template classes). efficient use of DSP48 blocks - create a template parameterized function of a multiplication followed by a subtraction (can be mapped into a single DSP48)

Papers

Pico uses partial loop unrolling with software pipelining. Need a way to specify loop transformations (tiling, fusion, interchange) in the source code. Programming with ALPHA language based on the polyhedral model, using MMAlpha software. Mentions WraPit project. Loop nests are written as a recurrence equation.
Future work: scheduling with a multi-dimensional time function to support loop tiling.