* An industry-wide issue was found in the way many modern microprocessor
designs have implemented speculative execution of Load & Store
instructions (a commonly used performance optimization). It relies on the
presence of a precisely-defined instruction sequence in the privileged
code as well as the fact that memory read from address to which a recent
memory write has occurred may see an older value and subsequently cause an
update into the microprocessor’s data cache even for speculatively
executed instructions that never actually commit (retire). As a result, an
unprivileged attacker could use this flaw to read privileged memory by
conducting targeted cache side-channel attacks. (CVE-2018-3639)