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Address:

School of Computer Science

Klaus Advanced Computing Building

Georgia Tech

266 Ferst Drive

Atlanta, GA 30332-0765

Voice: (+1) (404) 385 2169

Fax: (+1) (404) 385 2295

E-mail: santosh at cc.gatech.edu

Santosh Pande's primary interest is in investigating static and dynamic compiler optimizations on evolving architectures. His research philosophy involves tackling practical problems which are relevant and important to the current issues in systems research and propose foundational solutions to them for good impact. Currently, his research is focussed on software security: solving the problems of software debloating (project Demand Driven Linking) and model based program analysis and optimizations (project MIR). His past work in security provided solutions to many important problems such as: preventing information leakage on address bus and side channel attack, secret sharing of values for obfuscation and recovery, dynamic monitoring of control flow and memory integrity, and secure program patitioning on smart cards. His current research is also focussed on developing compiler optimizations related to high performance clusters to accelerators to embedded and configurable systems to improve execution speed, code size, efficiency and power consumption and on Compiler/OS interactions for high performance scheduling. In past, his work in this area has resulted in several techniques for efficient compilation given limited memory sizes, limited addressing modes and data paths on embedded processors. He has also developed unified framework for mapping loops on configurable processors combining issues of parallelism, data re-use and reconfiguration overheads for modern processors such as Xilinx 6200 and Virtex series.

He has published over 100 papers in journals and conferences which include ACM Programming Language Design and Implementation (PLDI), OOPSLA (Object Oriented Programming for Systems, Languages and Applications), PPoPP (Principles and Practice of Parallel Programming), IEEE Real Time Systems Symposium (RTSS) and TOPLAS (ACM Trans. on Prog. Lang. and Systems), Journal of Parallel and Distributed Computing (JPDC) and IEEE Transactions on Parallel and Distributed Systems (TPDS). He has also done extensive compiler development in real world and founded a start-up called Coreopsys Software Labs, Inc. He has also managed and delivered large scale software projects to the funding agencies such as DARPA. He holds a patent jointly with
Infineon, Inc. in both North America and Europe on secure application
partitioning on smartcards. He has released several software systems in the
open source prominent amongst these are GLIMPSES and AUTOPORT. Over the years, his research is supported by NSF, DARPA, ONR, IBM, Sony, Toshiba, Samsung and Greenhills Software.

Looking for motivated PhD students: I am looking for strong, driven students who are interested in the topic of dynamic program analysis, verification and optimization related to my new projects (sponsored by Office of Naval Research (ONR)). Please send me e-mail in case you are interested and we can discuss more.

Demand driven Debloating: Reduction of attack surface of linked components/libraries that provide a back-door to an application. Many novel dynamic analyses and optimizations are thought of that lead to precise but low overhead techniques that allow dynamic determination and optimization of needed components in a demand driven manner.

MIR (Model based IR): Goal is to facilitate efficient model checking and/or optimization tackling the problem of state space explosion, by developing new analyses and representations that combine abstract and concrete properties of software.