From dicing to packing: Examining the packaging process

Packaging

Despite the many advances in assembly manufacturing since the IC was invented, the basic process has not changed significantly. This article reviews the steps used to assemble an IC at a foundry: wafer dicing, die bonding, wire bonding, encapsulation, lead finish, marking, singulation/lead forming, and packing.

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IC devices are fabricated on a variety of materials, most often in wafer form. Wafers typically arrive from a fabrication site in single or multiwafer carriers that protect them during shipment.

At some foundries, upon arrival, wafers are manually inspected under magnification for any defects that may have occurred after fabrication, either during electrical wafer probe or in shipment. Unfortunately, manual inspection, often known as “first optical inspection,” can also produce defects. Since defects drive low yields and higher costs, this preliminary step is often skipped.

Wafer dicing

Because die thickness can impact several downstream process steps, a wafer is first thinned to the appropriate thickness – from 2-25mils – before dicing.

Wirebond clamp and head assembly for a PBGA.

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During wafer dicing, the thinned wafers are mounted, with their active surfaces exposed, onto the center of release tape fixed to a steel ring. Automated equipment batch-processes the wafers centered on the release tape from magazine to magazine, placing them in the middle of the steel ring. From this point, the output magazine from the taping machine is sent to the input of the wafer saw.

The wafer saw, consisting of a blade embedded with diamond particles that rotates at a very high speed, passes through the wafer at boundaries between die known as saw streets, which are established during wafer fabrication. The dicing machine is programmed to drive the saw blade through the saw streets at a defined spindle speed, saw rate, and depth, separating the wafer into individual die.

A variety of sawing techniques can be used during the dicing step, including multigang arbors that can cut multiple swathes through the wafer, thus accelerating the process; variable depth passes that can enhance yield but may slow processing; and dual in-line arbors that allow multidepth passes to happen in a single pass. Other packaging styles call for dicing to singulate individually finished packaged die, a near-end rather than a beginning processing step in IC assembly.

Throughout the dicing step, a continual rinse of deionized water flushes the surface of the wafer, which remains free of saw debris that can interfere with processing and cause defects.

Die bonding

From the wafer saw process, die travel to die bonding, depending on their end use. The separated die are lifted off the release tape and fastened to a carrier frame of copper, alloy 42, palladium, ceramic, or an organic laminate substrate, depending on the type of package to be assembled. In this article, we use leaded copper packages most often as representative examples.

In today's high-volume manufacturing (HVM) factories, a frame can be single-site processed as a discrete unit throughout assembly or as a matrix of hundreds of units, batch-processed to achieve economies of scale. The frame material can differ, but in most HVM factories, units are processed in batches to achieve quality control and cost goals.

CABGA on a saw frame prior to singulation.

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An automated mechanism removes the die from the release tape by pushing it up and into a collected vacuum pick-up tool, which holds it and places it on the frame. During this process, the die is oriented to identify the first bonding location, a metallized pad on the surface of the die where it can be electrically connected to the package. The die-attach machine then dispenses a paste, film, or solder adhesive in a pattern that holds the die to the frame.

The frames, which are approximately 2 in. x 8 in. and may hold a few to several hundred individual die, are placed into magazines and cured before being moved to the next step, wire bonding. Individual magazines are placed in a clean, dry, air or nitrogen oven and then heated, allowing the paste (or other material) to cure and complete the adherence of the die to the frame. Curing temperatures, which may be as high as 200°C, and duration times, ranging from one minute to one hour, depend on the product, the materials being used, and the product's end-use. This is a bulk-processing step in which multiple magazines are placed in an oven at one time.

Wire bonding

At this point, the die is ready to be electrically connected to the frame. This is accomplished by thermosonically bonding a wire (typically gold) to the die. Wire bonding uses sophisticated equipment and software with a high degree of 3-D positional accuracy. Modern automated equipment can bond 11 wires/sec, depending on wire length, wire loop height, die-to-bond finger spacing, etc. The number of wire bonds/device can range from one to thousands, depending on die size and end use.

Wafer mapping at die attach.

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The frame moves from the magazine onto a heated plate, which aids in the bonding process, and the wire is threaded through a capillary that guides it to the surface of the die. The die is then vibrated ultrasonically, the metallurgy of the wafer determining time, frequency, and pressure applied. The wire is then drawn out and over the die and welded to the leadframe.

The die is now connected to the leads or pads that connect it to its end-use product. Alternatively, the die can be flipped active-side down and solder-welded directly to a frame or substrate. This is known as flip-chip bonding.

After wire bonding, epoxy underfill material, which improves long-term reliability, flows under the IC through capillary action and cures in a manner similar to die bond curing. While wire bonding is by far the most prevalent form of interconnection employed in the assembly of ICs today, input/output (I/O) densities and parasitic considerations are driving the need for flip chip bonding in many high-end applications.

After wire bonding, another sample optical inspection should be performed. Line operators look for missing or nonsticking wires, and perform several destructive tests on a representative sample of units. Individual nonconforming units are marked for removal at a later process step.

Encapsulation

After wire bonding, it is important to protect the IC package by applying molded encapsulation. A commonly used process is transfer molding, in which high temperature and pressure liquefies epoxy resin forced through a mold chase over the die and die frame and into the cavity on the frame where the die was placed earlier. The hardened epoxy forms the body of the final package.

In addition to transfer molding, the IC can also be encapsulated (or coated) in a liquid epoxy, which is cured to form a solid covering around the IC. In this case, the encapsulant only serves to protect the die and wires; it does not form the package body.

Controlling time, pressure, and flow are critical issues in the encapsulation step. Miscalculations can cause several problems such as wire sweep (wires pushed together causing a short circuit within the component), or partial molding and mold voiding, which are pockets (or bubbles) that form in the mold during the process.

Second optical inspection after saw.

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Laminate packages built on an organic substrate are also encapsulated in a process known as overmolding. As in a leadframe-packaged device, the die is attached to a laminate substrate. Unlike a leadframe package, where the molding process defines the package outline, the epoxy forms a “mold cap” that becomes the top half of a sandwich, with the laminate substrate forming the bottom half and the die in between. Similar sets of processing concerns exist for a laminate package, forcing attention to detail during the molding process to ensure a high-quality component.

Another die-protecting option is ceramic packaging, which uses the same initial process steps of dicing, die bond, and wire bond. In ceramic packages, however, instead of a molded cover, a cap of either ceramic or metal is welded or sealed over the die, encasing it in a sealed environment.

Lead finish

During lead finish, the copper leadframe is cleaned and plated with tin/lead solder. The frame, placed in-line on a conveyer, passes through a series of electrolytic baths, during which tin and lead molecules are attracted and attached to the device by an electrical charge given to the leadframe. The process controls concentrations of the deposits, which vary according to the product specifications.

Die epoxy dispense.

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Laminate packages are not typically plated. Two interconnect structures predominate laminate packages today: land pad and solder ball. In the case of a land pad, gold-plated copper pads are exposed on the bottom surface of the package. When the component is attached to a circuit card, solder paste coats the connection point on the card, which adheres to the land pad opening on the component. The circuit card is then heated to the melting point of the solder paste and the component is soldered in place.

Alternatively, spheres of 67/33 tin/lead are soldered to the land pads during solder ball attach. I/O density determines sphere size. Solder balls and flux are deposited on all pad locations on the strip in an automated two-pass operation. The equipment optically inspects the part to determine if all of the balls are in place. The strip then moves to a conveyer that transports it through a furnace that raises the solder to its melting point, wetting it to the pad.

Organic laminate can warp in this process, requiring strict control of the furnace environment to ensure minimum deformation of the substrate. The measure of the reflow condition to a reference plane is defined as coplanarity. A coplanar component is effectively flat, allowing it to sit on the circuit board and make contact. Tolerances to a few mils are maintained to allow for downstream processing of the component.

Marking

After lead finishing and ball attach, the part is marked. Marking or branding after molding, an often overlooked step, is important in the overall assembly process because it marks the part for quality assurance, date-coding the assembly and defining references to wafer and assembly lots. The mark can go on the bottom of the assembly, leaving the top available for a marketing brand.

Basic methods for marking use laser or ink. Laser marking is predominantly used in the industry today because of its high-quality repeatability. Ink marking suffers from cosmetic defects and rework concerns that can drive low yields.

Singulation and lead forming

The next step in the process for laminate packages is singulation, which is the process of excising single components from a strip or matrix. The leadframe package typically undergoes one more step before singulation, that of lead forming.

MQFP leadframe.

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Trim/form/singulate processes are combined to excise the component from the manufacturing strip. The copper leads, now plated with solder, are formed to allow placement of the part on a circuit card. Typically, the lead is formed straight, gull, or “J” bend. A straight lead is bent 90° to the die orientation, allowing for through-hole soldering. The lead is passed through a hole in the circuit card and is soldered in place to complete the connection. The solder plate on the lead eases this process. The gull-shaped lead is a surface-mounted part placed on the circuit card surface without a hole and soldered in place. A “J”-leaded part takes a straight lead and bends it under the package to form a J. Both gull and J structures are designed to take up strain induced by mounting the component on a circuit card. Care must be taken during the forming operation not to overly stress the lead, cracking the finish and causing corrosion. Once the lead is formed, the part is excised from the manufacturing strip.

Coplanarity is very important here. As the leads are formed, they become moveable objects. Flatness is critical for circuit card placement, so maintaining flatness across 256 (or more) leads is a delicate process that requires high-tolerance machinery. Only a 3mils difference in flatness is allowed in most process specifications.

Packing

The IC is now virtually complete. Final ality inspection and packing into shipment tubes, trays, or automated tape is all that remains. The completed component has traveled through as many as 150 steps, some highly automated. The total process could take from 2-5 days, depending on materials, product design, and purpose.

Saw singulation for CABGA.

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Not discussed here are the many inspection and cleaning steps designed to meet yield targets of greater than 99%. The industry, while essentially following the same basic process steps, has made tremendous improvements in the consistency and quality of the product that it assembles. Today's assembly facilities are nearly perfect, losing less then 50ppm to manufacturing defects, a quality rate that is critical for price-conscious customers.

This article is very helpful!
But if the “first article inspection” is skipped, how do we detect defects before going to assembly process?
Wouldn’t the defective assembled parts be more costly and drive lower yields and incur greater costs?
Where and in what process would the first real inspection for the wafer be?

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