Rice's silicon memristor aims to beat HP

PORTLAND, Ore. — Memristors made from pure silicon could enable resistive random access memory (ReRAM) that are simpler and cheaper to manufacture than Hewlett-Packard Co.'s titanium-based formulation, according to researchers at Rice University. In collaboration with fabless chip design house PrivaTran Inc. the team demonstrated a proof-of-concept ReRAM that packs only 1-kbit, but which they claim can be scaled beyond the densities of flash.

"Our memristors are made out of silicon instead of titanium like HPs," said Tour. "In its patent application, HP listed many oxides, but not silicon-oxide, which we have now turned into a bit cell for resistive RAMs."

Silicon oxide is the most common insulator today, used in all CMOS chips. Since its initial characterization in the 1960s, engineers have intentionally deposited silicon oxide in thicknesses that prevent its breakdown. However, by carefully crafting the voltage pulses going through it, thin layers of silicon dioxide can be made to change their resistance from near infinite to near zero, according to Rice and PrivaTran (Austin, Texas). SanDisk Corp. in fact has used this phenomenon to create write-once memories, but now Rice and PrivaTran claim to have made the process reversible, thereby enabling pure silicon ReRAMs.

Last year, Rice professor James Tour's lab demonstrated how thin-films of carbon—graphene—could be made into a memristor-like bit cell that could double the typical memory densities of flash, But during characterization of that prototype, Tour noticed that the bit cell, which had been using silicon oxide as an insulator, seemed to work even without the graphene. Careful observations of the phenomena by Tour and fellow professors Douglas Natelson and Lin Zhong led to the discovery of a reversible "soft" breakdown of silicon oxide, allowing its use as a bit cell.

"We had noticed in our work with graphene that the silicon oxide was breaking down, but we did not understand the mechanism—now we do," said Tour. "By applying the right voltage pulses we can cause a reversible soft breakdown in silicon oxide where oxygen atoms move out leaving a silicon filament between the source and drain electrodes, allowing current to flow--turning it into a memistor that can be used as a bit cell. All you need besides the silicon oxide is a crossbar and a vertical diode to build 3D resistive RAMs."

According to Tour, the silicon filaments are composed of sub-five-nanometer nanocrystals, which should allow the bit cells to scale beyond the densities of flash which loose functionality beyond 20 nanometer sizes. In their prototype, the crossbar electrodes were made from polysilicon, enabling the entire memory array to be cast in silicon. In characterizing the all-silicon memories, the researchers found that they could switch in under 100 nanoseconds and could withstood 10,000 read/erase/write cycles, similar to flash memories, but with the possibility of going to much higher densities than flash.

Funding for the research was provided by the Army Research Office, National Science Foundation, Air Force Office of Scientific Research and the Navy Space and Naval Warfare Systems Command Small Business Innovation Research (SBIR) and Small Business Technology Transfer programs. Jun Yao and Zhengzong Sun, doctoral candidates at Rice, performed much of the lab work.

It's time to add a new word in the dictionary - "Memristors". It is great to know that Rice University could prove the concept design of ReRAM using silicon instead of titanium. But I'm not certain reading this article whether Rice could really achieved the performance what HP might have achieved using titanium. 10,000 read/erase/write cycles is quite low compared to the current Flash parts, correct? Again a question come to my mind: there are other new memory technologies such as MRAM/FeRAM etc are also going through commercialization cycle. Which one is going to win? Any thoughts?

The mechanism sounds similar to that described in Axon TC's "Programmable Metallization Cell" in which AgS forms a conductive path in a chalcogenide matrix. Axon claims 5 ns symmetric access times and is compatible with voltage and geometric scaling. I'm looking forward to this technology coming out of stealth.
Wonder what Rice plans to do with it? Research in the resistive memory segment is showing a lot of promise, is simple, the arrays can be stacked for increased density, have good to excellent duration (some are nearly non-wearing) and are scalable in both voltage and geometry. Industry roadmaps are made of things like this...,

A better and more exciting application for this technology is to enable the re-birth of analog computing. Imagine a filter that can be reconfigured or tuned in the field or during manufacturing. A great as digital processing is today, it could not match the performance of an analog solution. Think about an integrator and differentiator circuits alone. This would also provide the concept of non-volatile analog memory...WOW my mind is spinning wildly!!!

I'm not sure if this is the same mechanism as Axon's GeS devices but a quick check of the US Patent Office site reveals that there are already several issued patents on oxide-based devices, including silicon oxide. Are these guys late to the party or am I missing something here?

I think using this in analog computing is a great idea! Could we build an array of programmable resistors? We could then make use of those programmable resistors in analog circuits. Pardon me...I don't understand the device physics of Memristor quite yet and my comment could sound absurd to the experts in this field. But just trying to draw some more ideas from experts interested in "analog computing" topic.