Summary

Posted: Oct 26, 2018

Role Number: 200004303

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.
The GPU Memory Hierarchy Design Verification Engineer will be responsible for the pre-silicon RTL verification of cache hierarchy and related units in a low power GPU design. This includes deep understanding of the micro-architectural details of these units, interactions between the units, and the connection of the uarch to the larger architectural intent of the GPU. A strong computer architecture background, experience in cache and memory subsystem verification, and a solid foundation in verification methodology will be used to close testing coverage with high confidence.

Key Qualifications

The ideal candidate will have relevant 3+ years of experience including:

Expertise with verification language such as SystemVerilog/UVM/OVM, Verilog/VHDL; Specman experience is ideal.

Apple Footer

Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (Opens in a new window) .