Amanero – Buffalo II DSD with Foobar

Works with the re-clocking of the bit-clock mod (can’t take it out now :-))

No need to change any wiring to the Buffalo II DAC. Supports PCM and DSD with the same connections (This likely only works with the Sabre32 DAC because the designer decided to support both PCM and DSD with the same connections). There is also an issue with channels being “swapped”. See update at the end of post.

Used foobar with asio4all and foo_dsd_asio (kludgy but works)

DSD file from 2L (DSD64 which is 2.8MHz)

How do I know it is playing DSD?

foobar says so:

And of course, the display says so :-) :

I coded “DSD” long, long ago but this is the first time it shows up :-):-). The code reads the status register in the DAC and reports whether the stream is SPDIF, PCM or DSD. So according to the Sabre32 DAC it is receiving a DSD stream. If I measure the DSD pin in the Amanero board, it should read 3.3v.

The sample rate says “44,099 Hz” (44.1KHz) because this is the frequency of the DSD stream divided by 64, which is the same as the bit clock for 44.1KHz PCM. I think I should revise the code and show 2.8224 MHz instead.

Well, there is no going back now… Many thanks for posters at the Amanero thread in diyaudio for getting foobar to work with the Amanero board which does not yet support ASIO. And also Javier over at rockgrotto. The kludgy part is having asio4all output to the Amanero board and having foo_dsd_asio output to asio4all.

FOOBAR2000 SETUP

There is an excellent and detailed guide at rockgrotto. Here I just give the outline on how to set up foobar.

Note: there is a DSDIFF Decoder 1.4 plug-in in the foobar website which is not used in this configuration.

In foobar -> preferences you will see the following (I also downloaded the HDCD decoder, but it is not necessary for DSD):

Double click on ASIO4ALL to launch the control panel. If you don’t see the control panel it is minimized on your task bar. Configure ASIO4ALL by selecting the Amanero board. ASIO4All will work with all the output devices in Windows 7 since they all conform to the WDM driver architecture. Click on the little icon to highlight it.

Now configure foo_dsd_asio by selecting ASIO4ALL as the ASIO driver (if the Amanero board supported ASIO, it would show up here). This is the kludgy part: output to Asio4All which outputs to the actual device.

Note also that the SACD plug-in can also convert from PCM to DSD. There is a discussion here about that feature: [link] and also at the code repository [link]. You can convert PCM material to DSD64 or DSD128 on the fly. In my aging ThinkPad T60, the conversion on the fly takes 20% or processor load. Below it is set for no PCM to DSD conversion.

Select the output device for DSD:

Configure the SACD plug-in for DSD. If you configure for PCM it will convert DSD to PCM:

Here it is converingt DSD to PCM. Here is setting for PCM conversion at 88.2 KHz:

And in this setting, the DAC would be receiving PCM (“I32″ means PCM input set for 32-bit I2S)

OBSERVATIONS

DPLL

The DPLL is alive and well when using DSD. It must lock to the incoming clock. The unlocks are there but they don’t “sound” the same: rather than a “skip” of the music, they sound like a “hiss”, like a burst of white noise, when the DPLL looses lock.

For DSD-64 files (2.8224Mbit/s) settings “Lowest” and “Low” do not work. Once in a while you will get a burst of “hiss”. Had to use “Lowest-Medium”.

After having stable play of DSD with “Low-Medium”, I then played a 192K track and it experienced unlock. Switching back to the DSD, it also experienced unlocks (hiss). After upsetting the DPLL, it seems to take some time to stabilize again. This means that for multi-format, multi-sample-rate, the only practical setting for the DPLL is “BEST”

Input connections in BII

The reason why both I2S and DSD works is due to the way the inputs to the Sabre32 chip are configured in BII. For this to work on BIII, they inputs need to be configured the same way as in BII and the switch to input remapping enabled. In addition, the output of the USB interface board must corresponds to the BII input arrangement both in I2S and DSD mode.

The Amanero board pin assignment is compatible with the way BII assigns its inputs in I2S and DSD as such:

I2S DATA becomes DSD1 in DSD mode

I2S CLK becomes DSD clock in DSD mode

I2S FSCLK becomes DSD2 in DSD mode

Seems to be a “standard” way of configuring I2S and DSD outputs. The EXA device also has similar configuration [link]

Here is the input configuration of BII with DSD input (click for larger)

Here is the input configuration of BII with I2S input

UPDATE (11/17/12)

The DSD channels are swapped with respect to the PCM channels [link] and both channel arrangements are “standard”. This means that this “automatic” switching works, but the DSD channels (or PCM channels) need to be swapped. The wiring can obviously be swapped with a relay, but then it is not “automatic” anymore, and you now have a relay in the signal path.

The solution is to swap the DSD channels in the foobar player. I’ve documented the procedure here: [link]

Share this:

Related

Thanks for your kind words about the guide, I’m very glad it was of help. I’ll update it now to include the PCM to DSD convertor included in 0.6.1’s foo_dsd_proxy.

Also thanks for confirming that your mod also works with DSD, wonder if now that jitter from the CPLD can be reduced by this mod it’ll make sense to use lower noise clocks and maybe double their frequency for those using full sync mode (256fs for 192K).

Are you planning to try external power at any time? there are some at rockgrotto considering separate PS for the clocks.

That was a very detailed guide. I’ve never used foobar before so it was very useful at least for me. I still like iTunes for its simplicity and the fact that the rest of the family can share all the songs through iTunes match. But foobar is much more capable, including playing DSD.

Regarding using faster clocks. The Amanero CPLD would have to use different firmware plus the fact that there is a propagation delay within the CPLD the different signals are not aligned. They may work with the higher speed clocks but the alignment problem would be worse.

Right now I am happy with the low noise regulators in the board (the are among the lowest you could find). I rather focus on identifying noise problems and finding ways to deal with them (such as shielding). This would benefit the system as a whole. Perhaps board version II (just speculating) would have other improvements. You know how it is with this hobby: there is always a next version :-)

I don’t think the firmware change should any problem, Domenico is quite open to suggestions. What has worried me is this lack of alignment you mention, is this “as is” or after your mod? can or does it it affect negatively the digital signal, ie degrading it?

Foobar can be extensively customized and reach a functionality level equal or better than iTunes but it requires a bit of effort no everyone is ready to make or has the knowledge/skills to do it, the learining curve is quite a bit steeper. The advantage would be that it is a far less “intruding”, needs less resources and allows the user for much more flexibility and freedom.

I attempted to understand and explain the timing issue in a previous post:

There are some timing considerations we need to think about with regard to this manner of reclocking. The master clock coming out of the CPLD is synchronized with the other I2S signals (Bit clock, LR clock and Data). If one uses the master clock coming out straight from the oscillators, the LR clock, bit clock and data signals would have a certain amount of propagation delay just for the fact that they have gone through the CPLD device. I am not exactly sure how much is the propagation on the output signals, but based on the CPLD datasheet, it may be in the order of 10 (or 10s) nano-seconds. So the I2S signals are delayed 10s of nsec in comparison with the master clock right at the output of the oscillators.

When the bit clock is reclocked with the oscillator clock, the new reclocked bit clock will be further delayed because it would have likely missed the rising edge of the oscillator clock (In the flip flop, the output reflects the input only during the rising edge of the master clock) and would have to wait for the next rising edge of the clock signal.

How much is the bit clock delayed?

As discussed, the flip flop aligns the new bit clock to the rising edge of the oscillator clock. The oscillator clock is ahead (timing wise) of the master clock to which the bit clock is synchronized. The bit clock would have likely missed the rising edge of the oscillator clock and needs to wait for the next rising edge of the oscillator clock. The resulting new bit clock is thus delayed ONE PERIOD time of the oscillator clock. (It could be half a clock period depending how the signals are synchronized to the master clock: rising or falling clock edge)

One period for a 22.5792 MHz clock is 44 nsec. The bit clock for 44.1 KHz material is 354 nsec. The potential maximum delay of the new bit clock is a small percentage of the width of the bit clock which in this case is 44/354=12%. There should be no problems as also reported working by the poster above.

However, for higher sample frequencies, the delay becomes a larger percentage of the bit clock width. If we look at 172K material, the bit clock period is 88 nsec and the delay in the new reclocked bit clock is 50%. Perhaps this will still work. Increasing the sample rate further, say 352K sample rate, the delay is the same as the width of the bit clock. This will result in completely missing the first bit of the data signal.

I found no problems with sample rates up to 192K. with 352K, I did not get any sound (whereas with the Musiland, I was able to get 352K sample rate working). I am not sure if this is due to reclocking the bit clock or Amanero not supporting 352K in Windows. (I will have to test without the reclocking to see which is the case)

Now if we use a faster oscillator, the alignment problem may get worse (I haven’t thought through it yet…).

The right way to do reclocking is something like Ian’s FIFO reclocker….

Thank you for a great and detailed walk through of SACD with the Amanero with the Buffalo DAC. For listening to SACD/DSD on a PC, I wonder how that is accomplished? I assume either having downloaded DSD files from some online store, or playing/ripping with a PS3, because I guess there’s not PC drive that reads DSD, is there?

hi from jacques of hifi808.com … I have hooked the amanero to the buffalo 2 but I gey VERY low ouput volume from the dac ( much much lower than spdif ) and sometimes a 3second white noise….. can someone help please ?

There is a nice diagram here: http://www.audiodesignguide.com/DAC32/index2.html
– First you need to separate all the data lines by cutting the traces shorting some of the data lines together in the diyinhk board.
Your pin understanding in Amanero is correct.