Around 15 months ago, AMD announced that it would be building 64-bit ARM based SoCs for servers in 2014. Less than a month into 2014, AMD made good on its promise and officially announced the Opteron A1100: a 64-bit ARM Cortex A57 based SoC.

The Opteron A1100 features either 4 or 8 AMD Cortex A57 cores. There's only a single die mask so we're talking about harvested die to make up the quad-core configuration. My guess is over time we'll see that go away entirely, but since we're at very early stages of talking about the A1100 there's likely some hedging of bets going on. Each core will run at a frequency somewhere north of 2GHz. The SoC is built on a 28nm process at Global Foundries.

Each pair of cores shares a 1MB L2 cache, for a total of up to 4MB of L2 cache for the chip. All cores share a unified L3 cache of up to 8MB in size. AMD designed a new memory controller for the Opteron A1100 that's capable of supporting both DDR3 or DDR4. The memory interface is 128-bits wide and supports up to 4 SODIMMs, UDIMMs or RDIMMs. AMD will be shipping a reference platform capable of supporting up to 128GB of Registered DDR3 DIMMs off of a single SoC.

Also on-die is an 8-lane PCIe 3.0 controller (1 x8 or 2 x4 slot configurations supported) and an 8-port 6Gbps SATA controller. AMD assured me that the on-chip fabric is capable of sustaining full bandwidth to all 8 SATA ports. The SoC features support for 2 x 10GbE ports and ARM's TrustZone technology.

AMD will be making a reference board available to interested parties starting in March, with server and OEM announcements to come in Q4 of this year.

It's still too early to talk about performance or TDPs, but AMD did indicate better overall performance than its Opteron X2150 (4-core 1.9GHz Jaguar) at a comparable TDP:

AMD Opteron A1100 vs. X2150

CPU Core Configuration

CPU Frequency

SPECint_rate Estimate

SPECint per Core

Estimated TDP

AMD Opteron A1100

8 x ARM Cortex A57

>= 2GHz

80

10

25W

AMD Opteron X2150

4 x AMD Jaguar

1.9GHz

28.1

7

22W

AMD alluded to substantial cost savings over competing Intel solutions with support for similar memory capacities. AMD tells me we should expect a total "solution" price somewhere around 1/10th that of a competing high-end Xeon box, but it isn't offering specifics beyond that just yet. Given the Opteron X2150 performance/TDP comparison, I'm guessing we're looking at a similar ~$100 price point for the SoC. There's also no word on whether or not the SoC will leverage any of AMD's graphics IP.

The Opteron A1100 is aimed squarely at those applications that either need a lot of low power compute or tons of memory/storage. AMD sees huge demand in the memcached space, cold storage servers and Apache web front ends. The offer is pretty simple: take cost savings on the CPU front and pour it into more DRAM.

Early attempts at ARM based server designs were problematic given the lack of a 64-bit ARM ISA. With ARMv8 and the Cortex A53/A57 CPUs, that's all changed. I don't suspect solutions like the Opteron A1100 to be a knockout success immediately, but this is definitely the beginning of something very new. Of all of the players in the ARM enterprise space, AMD looks like one of the most credible threats. It's also a great way for AMD to rebuild its enterprise marketshare with a targeted strike in new/growing segments.

AMD's Andrew Feldman included one of his trademark reality check slides in his Opteron A1100 presentation today:

Lower cost, high volume CPUs have always won. That's how Intel took the server market to begin with. The implication here is that ARM will do the same to Intel. Predicting 25% of the server market by 2019 may be feasible, but I'm not fond of making predictions for what the world will look like 5 years from now.

The real question is what architecture(s) AMD plans to use to get to a leadership position among ARM CPUs and a substantial share of the x86 CPU market. We get the first hint with the third bullet above: "smaller more efficient x86 CPUs will be dominant in the x86 segment".

124 Comments

I saw part of this a week ago in the AMD center on this site when reading the Kaveri article. I was hoping you could buy these already. Ubuntu has an ARM distro already, but not for any hardware I plan to own. These specs are perfect for what I want to do.

This wouldn't be a comment about AMD if I didn't gripe, so here it is: how hell do you release integrated 10 GbE in ARM servers a before x86? All AMD needs to do is include 10GbE into the x86 Opteron platform to have some reason to purchase. Intel won't because they're still making too much money in add-on cards. With Netgear selling a 10GbE switch for around 1K we are now just waiting on AMD and Intel to integrate copper ports. Reply

it the perfect reason at last to finally buy AMD IF and only IF they do include as standard these 2x integrated 10 GbE in their 64bit ARM SOC and you can actually make a full ARM PC for their regular current x64 high end systems price...

im not impressed with the usual DDR3 or DDR4 data throughput potential as AMD have always provided far lower ram speed throughput and slower L1/L2 than was needed to maximize the given cores potential, if it right that they are using "one" single channel though and not at least two 128bit channels?(half the Wide IO 512bit spec)"The memory interface is 128-bits wide and supports up to 4 SODIMMs, UDIMMs or RDIMMs."

by the end of 2014/15 id expect Samsung to be thinking about using their integrated 512bit Wide IO/Widcon to get an easy x4 the potential of the best DDR3, and OC there's its sibling HMC going into production end of 2014 for an estimated x7 times DDR4 throughput at lower power etcReply

I would be very interested to know what kind of LAN performance AMD can get with ARM driving the ports in Linux. Two 10G ports can generate a ton of interrupts and depending on the app/configuration could consume the lion's share of the CPUs, especially if you need to configure to small packet sizes. It's easier to drive full speed with jumbo frames, but this isn't the best configuration for a lot of uses. I can't wait to see how they do.Reply

Interrupt handling I don't think will be the issue. If the AMD chips are anything like the Calxeda (which were A7 based and had a single 10GbE) the 10GbE will have a lot of 'offload engine' silicon.

Just to point out something, you can't even saturate a 10GbE on X86_64 if the packet size is too small. If memory serves, you can only get around 2 million packets per second on 10GbE on a powerful X86_64 running linux anyway. I think there have been some multi-threading patches as well as other things to improve this, but I don't think an ARM is going to do too much worse at standard packet sizes than an X86_64 box.

That limitation is a limitation of the Linux kernel. You can do 80 million packets per second (64 byte packets) on Linux with a single measly 8-core Xeon Processor E5-2600 @ 2.0 GHz. That's with dual 40gbps NICs. The way the Linux kernel handles networking is so 1990's.Reply

I am sure they will get to this. I can so see this as a platform for a NAS or SAN server. With the PCI slot for a RAID card or JABOD and the up to 128 GB it is a perfect fit for storage. It is also a great option as a development system for ARM developers. It would also be a good system for VOIP as well. Seems like we will see ARM for storage and possibly front end web servers and X86 for VMs and database servers.AMD should donate come of these to FreeBSD, FreeNAS, and OpenNAS.Reply