Verifone Placement paper

1.a logic ckt is given and asked to identify the configuration. Ans: XOR.
2.Multi vibrator with nor gates is given Ans: astable multi sqr wave opt.
3.4 stage ripple counter with delay(f/f) 10msec. How much time it takes for a state to change. 4*10=40.
4. Impedence of a p’lel resonant circiut at resonance:R.
5.Serial to parellel conversion is done by ans:shift register.
6. If the address bus id 20bits.then the memory space is 1Mb.
7. Filtering can be done with:capacitor,iductor,both,none.
8. The config that is worst effected by low CMMR
Ans : Non inverting amplifier.
9. Two progs are given. one satrts counting frm 0 to MAX and the other stars frm MAX to 0. which one executes fast.may be Max to 0.Think of.it should be.
Another 6 qstns are there. simple.

Networks:
1. The fctn of datalink layer is:bit stuffing.
2. Which of the following is not fctn of datalink layer: Encription.
3. Voltage levels of rs232x:+12,-12.
4. Which of the following is not used for client/server.
5. RPC,TCP/IP,MESSAGEQs None ans:may be none.

Database:
1. which of the following is true. ans:the primary key in DataBAse design is very important.
2. SQL is a Non procedural query langauge.
3.
4
5.Compiler/algo/ds:
1.Data structure used to impliment a menu: doubly linked circular linked list.
2. some regular expression is given:WaW’.may be it is context free grammar.
3.,4,5.OS :
1.the feature of real time os is: fast context swithing.
2.os impliments protection with the help of hardware(like virtual addressing in 386/286 etc).

C:
Some small c progs are given asked to tell the function/errors etc.
One of the qstn(last in the paper) is an invalid statement.
Finish of all these very fast and think about those others. they are simple only.

Interview:
Depends on the member.(Mr.Deep if he comes asks archirect of 586/486/386/286
etc. otherwise DS,OS,C,TCP/IP . they hv taken 21(18btechs+3mtechs).