Noted on this, I will update you through this thread.
However is there any possibility of the following:
> I don't know if there's a way to split the interrupt request for each bce's Rx and Tx,
> which means a total of four IRQs, and eventually four cores (or 4 CPUs)
> for the transactions. With this way, the IDLE processors would be utilized.
What I mean here is, for the two interfaces:
one IRQ for bce0 Rx
one IRQ for bce0 Tx
one IRQ for bce1 Rx
one IRQ for bce1 Tx
Thanks,
Won
________________________________
From: Jeremy Chadwick <koitsu at FreeBSD.org>
To: Won De Erick <won.derick at yahoo.com>
Cc: freebsd-hardware at freebsd.org
Sent: Thursday, November 13, 2008 3:46:02 PM
Subject: Re: IRQ31 and IRQ32 on HPDL585 running FreeBSD 7.0 are consuming HIGH CPU usage
On Wed, Nov 12, 2008 at 11:38:15PM -0800, Won De Erick wrote:
> I am conducting a CPU utilization testing with my box(HP DL 585 running FreeBSD 7.0), and come up with the results below:
>> 52 root 1 -68 - 0K 16K CPU11 b 123:53 100.00% irq32: bce1
> 51 root 1 -68 - 0K 16K CPU10 a 119:28 89.06% irq31: bce0
>> irq31 and irq32 are consuming high CPU usage, which i think the cause of hard reset.
There was a ***major*** bce(4) cleanup that just happened. Your 7.0 box
will not have these changes. Please upgrade your box to RELENG_7
(a.k.a. 7.1-PRERELEASE), csup'd recently (today preferably), and try
your tests again:
http://lists.freebsd.org/pipermail/freebsd-stable/2008-November/046482.html
--
| Jeremy Chadwick jdc at parodius.com |
| Parodius Networking http://www.parodius.com/ |
| UNIX Systems Administrator Mountain View, CA, USA |
| Making life hard for others since 1977. PGP: 4BD6C0CB |
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