Samsung's research arm has officially opened an artificial intelligence centre in Cambridge, to be followed by two others in Toronto and Moscow later this month, as part of a plan that will see it hiring 1,000 AI-focused researchers by 2020.

Apparently eager to ride the wave of interest in artificial intelligence and deep learning systems, Samsung has announced it is more than doubling the number of AI-focused research centres it operates around the world: Its current Seoul and Silicon Valley facilities, the latter of which was only opened back in January this year, are to be joined by facilities in Moscow, Toronto, and the UK's historically-important technology hub Cambridge.

'Samsung has a long history of pursuing innovation and we are excited to be bringing that same passion and technology leadership to AI,' claimed Hyun-suk Kim, president and head of Samsung Research, at the opening ceremony of the Samsung AI Centre - Cambridge. 'With the new AI Centres and recruitment of leading experts in the field, our aim is to be a game changer for the AI industry.'

The Cambridge facility is to be headed by Andrew Blake, who formerly acted as director of Microsoft's Cambridge Laboratory and is recognised as a pioneer in AI-related theory and algorithms. 'This new Centre signifies our commitment to the advancement of AI, Blake claims. 'Our research will help us to better understand human behaviour while exploring areas like emotion recognition, and further expand the boundaries of user-centric communication to develop AI technologies that ultimately improve people’s lives.'

The opening comes as Samsung's semiconductor division announces its latest roadmap update: 7nm Low Power Plus (7LPP) production to begin in the second half of this year and to enter mass production of key intellectual properties (IPs) by the first half of 2019; 5nm Low Power Early (5LPE); 4nm Low Power Early (4LPE) and 4nm Low Power Plus (4LPP); and 3nm Gate-All-Around (3GAAE) and 3G Gate-All-Around Plus (3GAAP), using what the company describes as a 'next-generation device architecture' designed to overcome the scaling issues around FinFET technology.