Help text

Some parallel ports are known to have excessive delays between
changing the parallel port control register and good data being
available on the parallel port data/status register. This option
forces a small delay (1.0 usec to be exact) after changing the
control register to let things settle out. Enabling this option may
result in a big drop in performance but some very old parallel ports
(found in 386 vintage machines) will not work properly.