Our client is a well established design consultancy with an opportunity for an Analog IC Layout Engineer to join their design centre based near the coast in Devon.

In this position you will be working on full custom layouts for Analog cells, sub blocks and IP blocks in deep sub micron technologies (from 65nm, 40nm down to 28nm) and will be responsible for creating floor plans for Analog cells, sub Blocks, IP blocks and chip level designs.

The successful Analog IC Layout engineer will have experience in CMOS and/or BiPolar and BiCMOS including strong experience in LVS, DRC, parasitic extraction and the associated design tools; Cadence and Mentor, Analog layout and verification tools. Experience of DFM effects and impact on layout is ideal.

Excellent communication skills are required along with the ability to work well within a team. For Senior engineers, the ability to mentor more junior engineers is important.

If your looking for a change of scene in the new year and a chance to move closer to the coast for a more enjoyable way of life in a stunning part of the UK then this could be the opportunity for you.