... The Cortex-M3 supports a number of exceptions, including a fixed numberof system exceptions and a number of interrupts, commonly called IRQ.
The number of interrupt inputs on a Cortex-M3 microcontroller dependson the individual design.
Interrupts generated by peripherals are connected to the inte ...

... The Cortex-M3 processor has a fixed memory map as shown in the figure below. This makes it easier to port software from one Cortex-M3 product to another. The memory map definition allows great flexibility so that manufacturers can differentiate their Cortex-M3-based product from others. Some ...

... The Cortex-M3 processor has registers R0 through R15 and a number of special registers. R0 through
R12 are general purpose, but some of the 16-bit Thumb instructions can only access R0 through R7 (low registers),
whereas 32-bit Thumb-2 instructions can access all these registers. Special regis ...

... **The programmer’s model:**
The processor implements the ARM v7-M architecture. This includes the entire 16-bit Thumb instruction set and the base Thumb-2 32-bit instruction set architecture. The processor cannot execute ARM instructions. The Thumb instruction set is a subset of the ARM instruction ...