File Operations in verilog Test-Bench

External files are called in test-benches for reading in vectors and storing results of simulations for further analysis. Most of the key operations involved in handling external files are discussed below with examples.

How to Open a file to write text.write_file = $fopen(“readme.txt”, w); The highlighted text in blue is used to show the command which will tell Verilog compiler to write to the text file readme.txt after erasing all the data from it. Other similar option wb.

$fopen, $fclose, $fdisplay, $fscanf are discussed on this page with examples

Reading text in specified format from opened file. ( Supported in Verilog-2001)Read the data in specified format (hexadecimal, binary or octal) and store it in a register. read_data = $fscanf(read_file, “%format”, register_to_store_data);

How to Open a file to append text.append_file = $fopen(“readme.txt”, a); The highlighted text in blue is used to show the command which will tell Verilog compiler to open the text file readme.txt and append more text at the end of the file.Other similar option ab. How to Open a file to both read and write text.rw_file = $fopen(“readme.txt”, r+); The highlighted text in blue is used to show the command which will tell Verilog compiler to open the text file readme.txt to enable both reads and writes to it. Other similar option r+b or rb+. How to Close or release an open file.$fclose(readme.txt);Writing text into the opened file.Write to file starting at a new line.