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Abstract

A method for providing a full screen erase of a plasma display panel which does not require special erase circuitry operates as follows. Referring to the drawing, a conventional DC voltage regulator, shown within the dotted line 10, has associated input and output circuitry. Assuming that transistor 11 is off, the panel has been written and V(O) is supplying the nominal sustain voltage through diode 15 to the base of transistor 17. Upon the application of a positive erase pulse 19 to the base of transistor 11, the output voltage V(O) drops and the wall charge voltage of all cells decreases to the point where the combination of the sustain signal and the wall voltage is insufficient to support a discharge. This condition causes a total panel erase.

Country

United States

Language

English (United States)

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Non Selective Gas Panel Erase

A method for providing a full screen erase of a plasma display panel which
does not require special erase circuitry operates as follows. Referring to the
drawing, a conventional DC voltage regulator, shown within the dotted line 10,
has associated input and output circuitry. Assuming that transistor 11 is off, the
panel has been written and V(O) is supplying the nominal sustain voltage through
diode 15 to the base of transistor 17. Upon the application of a positive erase
pulse 19 to the base of transistor 11, the output voltage V(O) drops and the wall
charge voltage of all cells decreases to the point where the combination of the
sustain signal and the wall voltage is insufficient to support a discharge. This
condition causes a total panel erase. Upon termination of the erase pulse 19, as
V(O) returns to its nominal sustain value, discharge reoccurs, producing a wall
voltage across the cells which is insufficient to cause them to discharge in the
absence of a write pulse.

This method of erasing has the following advantages over the conventional
erase method: Phasing is no longer required between the erase pulse and the
sustain voltage, the erase pulse is now a logic level instead of a specially derived
voltage pulse, and the panel does not have to be preconditioned to some specific
voltage level before the erase signal can be applied. The resultant circuitry is
substantially simpler than the logic control circuitry normally required...