IBM Hawks PCM for Storage

PORTLAND, Ore. -- IBM recently demonstrated how to integrate phase change memory (PCM) into a solid-state memory hierarchy, and it has shown its first PCIe-based prototype board for storage systems. It's looking like speed and the ancient Greek heroes are on PCM's side.

In a presentation at the 2014 Non-Volatile Memory Workshop, IBM described its architecture, compared it to flash-based solid-state drives (SSDs), and proposed a server system that eliminated the hard-disk drive (HDD) in favor of a memory hierarchy using both flash-based arrays and PCM-based arrays. In comparisons, the PCM-based arrays handily beat flash.

"The comparison was between flash SSD and our PCM PCIe card -- it was a comparison at the system level of the two storage devices," Ioannis Koltsidas, a member of the IBM storage systems research staff, told EE Times. Working with the University of Patras in Greece, which helped name the card Theseus after a hero in Greek mythology, the researchers compared the PCM-based PCIe card with two flash SSDs -- an enterprise-grade flash SSD and a consumer-grade flash SSD. "We found the times for the two flash SSDs to be 12x and 275x longer than for the PCM PCI-e card."

Though PCM memory chips have been around since 2012, there have been very few deployments and quite a few complaints about reliability. Nevertheless, IBM appears to be gung ho about the possibilities of PCM-based memories, one would assume, after the bugs are worked out.

PCM (blue) can fit into many slots in the memory hierarchy for servers and storage systems, according to IBM.

The biggest advantage of PCM over flash is that its performance is higher than flash, though not as high as DRAM, plus it enjoys the nonvolatility of flash. Also, PCM normalized input/output (I/O) throughput is on the rise at a time when HDD I/O operations per second are waning. Today flash is filling the gap, but PCM could take over that job. Flash is also facing scalability problems and can only be rewritten about 10,000 times at the most. PCM's scalability is on the rise, and it can be rewritten at least 10 million times -- or, with forward error correction, at least 10 trillion times.

PCM uses a chalcogenidic alloy sandwiched between two electrodes. A high current turns the chalcogenidic alloy amorphous (representing a 0), whereas a medium current turns it crystalline (representing a 1), and a low current allows its state to be read out. Programming times for 0s and 1s are 70 nanoseconds and 120 nanoseconds, respectively. IBM's tests used PCM memories fabricated at a relaxed feature size of 90 nanometers and a clock frequency of 66 megaHertz.

IBM has been achieving industry-leading density and performance (speed) in our current high-end Flash product portfolio. If you would like to read some published papers please email me at cia at zurich.ibm.com

Resistion, I recall from you many previous posts on this subject that you have a wealth of facts in your head. So here is an unreasonable, simple minded question... How many shrinks will it take PCM assuming 90nm is the current state of affairs in order to reach densities on par with today's flash?