High-level hardware modeling via simulation is an essential step in
hardware systems design and research. Despite the importance of
simulation, current model creation methods are error prone and are
unnecessarily time consuming. To address these problems, we have
publicly released the Liberty Simulation Environment (LSE), Version
1.0, consisting of a simulator builder and automatic visualizer based
on a shared hardware description language. LSE's design was motivated
by a careful analysis of the strengths and weaknesses of existing
systems. This has resulted in a system in which models are easier to
understand, faster to develop, and have performance on par with other
systems. LSE is capable of modeling any synchronous hardware
system. To date, LSE has been used to simulate and convey ideas about
a diverse set of complex systems including a chip multiprocessor
out-of-order IA-64 machine and a multiprocessor system with detailed
device models.