The Navigator Design Suite takes a new approach to solving FPGA IP and control software connectivity. Most modern FPGA-processing applications require development of specialized FPGA IP to run on the hardware, and software to control the FPGA hardware from a host computer.

Even when "turnkey" solutions are delivered with complete FPGA IP and software libraries, as developers add their own custom-processing IP, new software needs to be created to control the custom IP functions.

Problems often arise when the IP and software development tools treat application development as two separate tasks. Changes to FPGA IP and control software can quickly get out of sync, complicating new application development or even breaking the formally functioning turnkey components.

The Navigator Design Suite was designed from the ground up to work with Pentek's Quartz™ (Xilinx UltraScale+ RFSoC) and Jade™ (Xilinx Kintex UltraScale) architectures and provide a better solution to the complex task of IP and software creation.

Xilinx's Alliance Program

As a Certified Member of Xilinx's Alliance Program, Pentek has passed a comprehensive 320-point review of our technical, business, quality, and support processes and have committed engineers who completed the same rigorous training used by Xilinx Field Application Engineers worldwide. Pentek continues to demonstrate years of expertise with Xilinx devices and implementation techniques and consistently delivers high-quality products and services utilizing Xilinx programmable platforms.

Because the typical processing application requires both custom FPGA IP design and the creation of host software for control, Navigator Design Suite was designed from the ground up with the goal of synchronizing the two tasks. This streamlines the process of embedded application development."

- Bob Sgandurra, Director, Product Manager of Pentek

As FPGAs become larger and IP more complex, the need for IP design tools to manage this growing complexity has never been greater. The Xilinx Vivado® Design Suite includes IP Integrator, the industry's first plug-and-play IP integration design environment.

Built around a graphical block diagram interface, IP Integrator allows IP developers to leverage existing IP by importing it into their block diagram design. Pentek's Navigator FDK (FPGA Design Kit), was designed with this exact purpose.

As shown in the above screen shot, Navigator IP blocks work directly in Xilinx Vivado.

Each Navigator FDK provides the complete IP for a specific Quartz™ (Xilinx UltraScale+ RFSoC) or Jade™ (Xilinx Kintex UltraScale) data acquisition and processing board. When the design is opened in Vivado's IP Integrator, the developer can access every component of the Pentek design, replacing or modifying blocks as needed for the application. All blocks use industry standard AXI4 interfaces providing a well-defined format for custom IP to connect to the rest of the design. Each Navigator/Quartz or Navigator/Jade design includes User Blocks in the data-flow path, ideal for inserting custom processing IP.

This screen shot shows Navigator IP blocks which are selectable from a pull-down menu.

The Navigator FDK includes complete documentation, test benches and full VHDL source for developers who desire complete access to the IP. In addition to the IP specific to the supported Quartz or Jade board, Navigator also includes processing blocks for some of the most commonly used algorithms.

The companion product to the Navigator FDK is the Pentek Navigator BSP (Board Support Package). While Navigator FDK provides a streamlined path for creating or modifying new IP for the Pentek hardware, the Navigator BSP enables complete operational control of the hardware and all IP functions in the FPGA.

Similar to the FDK, the BSP allows software developers to work at a higher level, abstracting many of the details of the hardware through an intuitive API. The API allows developers to focus on the task of creating the application by letting the API, the hardware and IP-control libraries below it to handle many of the board-specific functions. Developers who want full access to the entire BSP library, enjoy complete C-language source code as well as full documentation.

New applications can be developed on their own or by building on one of the included example programs. All Quartz™ (Xilinx UltraScale+ RFSoC) and Jade™ (Xilinx Kintex UltraScale) boards are shipped with a full suite of build-in functions allowing operation without the need for any custom IP development. Many users find these functions ideal for addressing their application requirements.

Optimized BSP and IP Development

For users who need to develop applications that include custom IP, the combination and compatibility of Navigator FDK and Navigator BSP streamline development.

When new IP is introduced into the design, it has the potential of changing how the hardware looks to the host, possibly breaking the software. Navigator FDK and BSP were designed together to closely match the FPGA IP blocks and the BSP functions that control them. As developers modify IP they can easily find the corresponding BSP functions and modify them in parallel.

Navigator FDK uses AXI4 for all IP block interfaces. When developers create their own IP blocks using AXI4, they are immediately compatible with the Pentek-supplied IP. Following the Navigator BSP style guide, users can similarly create BSP modules for compatibility with the Navigator BSP library.

Optimized BSP and IP Development

The SPARK® family are fully-integrated development systems for Pentek's software-defined radio (SDR) and data acquisition and I/O boards. The SPARK series was created to save engineers and system integrators the time and expense associated with building and testing a development system that ensures optimum performance of Pentek boards.

Pricing and Availability

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