Plunify

Plunify

Plunify was started in 2009 by two passionate engineers with the sole purpose of optimizing chip design performance, starting with FPGA applications. With the ever-increasing complexities of FPGA devices and design flows, cheap compute power can be intelligently harnessed to optimize designs and accelerate product time-to-market.

PRODUCTS & SERVICES OVERVIEW

In Time

InTime optimizes FPGA timing and performance with FPGA tools settings through machine learning techniques. The goal is to achieve this with minimal code changes.

In Time Service

A timing closure & optimization service that guarantees results in days rather than weeks or months. This service is powered by InTime software

PLUNIFY CLOUD

Plunify Cloud is a platform that simplifies the technical and security management aspects of accessing a cloud infrastructure for FPGA designers.

Timing Closure & Optimization

Top 3 ways to optimize timing and performance

RTL & Constraints

Require senior or experienced engineers to solve

Risky at late stage, re-do hardware verification

May introduce bugs

Synthesis/P&R Settings

Placement seeds are useless if the timing slack is too large

Settings have dependencies with one another, resulting in worse results

Device Type

Use better speed grades or larger device types at the disadvantage of increased costs

May impact design

Timing Closure & Optimization

All these methods can work in conjunction, however, the most common method is just RTL/Constraints