SPIE Advanced Lithography 2013 – day 1

Day 1 of the SPIE Advanced Lithography Symposium began, as always, with the plenary session. Bill Arnold, former lithography manager at AMD and now CTO at ASML, gave a “state of the union” address – he is this year’s SPIE president. (Congratulations, Bill – I voted for you!) The 10th Zernike Award for achievements in microlithography went to Dave Markle, a well-deserved honor (full disclosure: I nominated Dave, so my opinion may be biased). And SPIE inducted some of its newest members into the ranks of SPIE Fellow: Yan Borodovsky of Intel, Alain Diebold of the University of Albany, Kafai Lai of IBM, Bryan Rice of SEMATECH North (is there a SEMATECH south?), and Martin Richardson of the University of Central Florida. Congratulations to all.

The first plenary talk was by Bill Siegle on a topic very dear to me – the history of lithography. Bill spent many years at IBM and AMD, and keeps his hands in the industry as a member of the ASML board of advisors. (I was glad to see that he kept his ASML promotion to a bare minimum – only a couple of slides.) I especially liked his description of an internal step-and-repeat tool development project at IBM in the early 70s – the 5XLFS. It was a “dismal failure” and “generated a lot of scrap”. The industry was finally reaching the point where process equipment was best supplied externally rather than internally. The first commercial stepper, the GCA DSW 4800, could “predict the weather” due to its high sensitivity to barometric pressure. He provided many good lessons from this history, but I like #6 best: It’s impossible to predict 10 years ahead. I agree, but somehow it doesn’t stop me from trying.

Howard Ko of Synopsys gave a benign talk on the evolution of EDA (electronic design automation), and Chuck Szmanda gave an interesting talk on patent law (cheers to the selection committee for picking an unconventional plenary topic).

By 11am the technical sessions had begun. I went to see my good friend Mark Smith give a great talk (yes, I am biased) with an even better title: “Optimization of a Virtual EUV Photoresist”. There are so many ways to play on that title, but I’ll just say that I love virtual photoresists. They don’t smell.

The most important talk of the day (IMHO) was given by Sam Sivakumar of Intel. He presented results on working 22-nm SRAM devices (the first?) manufactured with EUV on the NXE:3100. EUV was used on two levels (a “line-like” layer and a “hole-like” layer, whatever that means) and the manufacturing performance of the 22-nm SRAM test vehicle was compared to standard 193-nm manufacturing. The devices worked well (though I didn’t understand the meaning of the device characteristics plots that he presented, since they had no axes labels), and this was an important milestone. Of course, the throughput was extremely low, but the point of the exercise was to test everything else about the manufacturing readiness of EUV. Wafer defect was only about 10 – 20X higher than the mature 193-nm process (not unexpected at this stage of development), and no killer mask defects were present. Sam showed a slide that said one undetected adder defect on the reticle could cost Intel $5M/day, so this is important. Overall, Intel seemed happy with the results.

But let’s keep things in perspective. This is a 22-nm SRAM test vehicle, which for Intel means the gate level is at a 90-nm pitch. Thus, the device is not sensitive to reticle defects that are beyond today’s inspection sensitivity but will be critical before EUV goes into production. Further, this test does not stress the EUV RLS triangle of death (the ugly trade-off between Resolution, Line-edge roughness, and Sensitivity that currently would kill any hope of economic manufacturing with EUV). This work had to happen, and I applaud Intel for publishing it (I hope Samsung and the other NXE:3100 owners will do the same). But it is not an existence proof for the manufacturability of EUV “if only we had a source”. It will take much more.

For the rest of the day I hopped from room to room trying to learn everything I could about line-edge roughness (LER)/linewidth roughness (LWR). I am happy to see that there are many more papers on that topic this year. On this first day the emphasis of most of them seemed to be on the importance of post-processing for LWR reduction. But here is my dilemma: 1) low-frequency LER causes an increase in CD non-uniformity, especially for contacts but for short-width gates as well; 2) this problem will be devastating to EUV lithography if low-frequency LER isn’t reduced significantly; and 3) LER post-processing won’t help with this problem since it does not (cannot) reduce low-frequency LER. Point #3 is where there may be some controversy (meaning that not everyone has come to see things my way). So here is my challenge to all those promoting the use of LER post-processing: prove to me that I am wrong by either convincing experimental evidence that low-frequency LER is reduced or a convincing proposed mechanism, and preferably both. Actually, I need both, and I haven’t seen it yet.

Finally, a soap-box moment (something that many of you know I am fond of). When is it OK to describe your idea as “new” when giving a paper? Here is a new theory, a new mechanism, a new approach, a new design. My advice: probably never. If your idea is truly new, then astute attendees of your talk will realize it. It’s OK to tell them why the problem you are working on is important, or why a solution to that problem is important. But don’t tell then that your work is important – that is a judgment they should make for themselves. I know that this advice is opposed to what every marketing professional will tell you, but we are not marketing people, we are scientists and engineers. And besides embracing the important ethic of humility, it is much safer not to claim that your idea is new for the simple reason that it probably isn’t. There is very little new under the sun, even though novelty is what advances science and why we are all at conferences like this one. None of us are familiar with everything in the literature, and an explicit claim of novelty can result in a swift rebuttal by someone pulling out an obscure (or not so obscure) reference to prove you wrong. Let the audience judge the novelty of your idea, and when you’re confronted with an old reference that did the same thing as you, you can be happy for the education and the knowledge that someone else has validated your idea.

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Chris Mack

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Chris Mack is a leading expert in lithography and is an adjunct faculty member in the Computer Engineering and Chemical Engineering Departments of the University of Texas at Austin. He can be reached at lithoguru.com.