Descriptions

A new incremental ADC is proposed which extends the order of a
conventional incremental ADC from N to (2N-1) by way of a two-step
operation. For a given conversion time, the duration of each step can be
optimized. For an Nth-order IADC, the performance is equivalent to that
of a (2N-1)-order converter. However, it only needs the same circuitry
as the Nth-order one. The new IADC is hence more accurate, and also
much more power-efficient than the conventional ones.