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URN

etd-0811108-164706

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Author

Hsin-Chu Chen

Author's Email Address

No Public.

Department

Computer Science and Enginerring

Year

2006

Semester

2

Degree

Master

Type of Document

Master's Thesis

Language

English

Page Count

42

Title

The Design of Way-Prediction Scheme in Set-Associative Cache for Energy Efficient Embedded System

Keyword

embedded system

cache

way-prediction

way-prediction

cache

embedded system

Abstract

Embedded System develops rapidly, functions turn into more complicate, and multi-media applications are growing daily and they consume more electrical power. Therefore, how to improve stand-by time will become a very important issue. Related researches indicate that the power consumption of processor cache is accounted for a big proportion. Way-prediction and LRU (Least Recently Used) algorithms improve hit rate and would help in reducing the number of tag comparisons, and therefore save energy consumption.In this thesis, we use MRU (Most Recently Used) table to record the most used block for each index and use Modified Pseudo LRU (MPLRU) Replacement algorithm for reducing hardware complexity and cache miss rate.Experiments show our prediction hit rate reach 90.15%, thus save 64.12% energy. The experimental results are obtained by using Wattch cache simulator for SPEC95 benchmarks.