Prototype using FPGAs has long been used in this
industry as one of ASIC design verification methods.
However, although FPGAs are an excellent technology, they are difficult
to use for non-expert users, so they have tended to be avoided.
Accverinos has acquired the necessary know-how for designing
and using FPGA prototype system through the process of developing
many products. With this know-how, we provide many types of support
in order that the customer can implement verification in a production
environment, which is the greatest merit of prototype systems.

RTL designed for ASICs does not operate at high speed on FPGA

Development service

Accverinos provides the following supports and
services.

Circuit design . . . using Verilog, VHDL, and C to provide the source
code.
Customize . . . . base systems B-1 and
B-10 can be modified in accordance with
customer's requirements.
In addition, depending upon quantity, full-custom verification environment
can be provided, from high level system design phase.

·
When developing RF-IC, integrated verification must be performed
with the peripheral logic. In this case, a prototype system
that connects to RF-IC at high speed is required.

· At Accverinos has a track record of providing
high speed serial interface technologies. For developing RF-IC
prototype system, we propose FPGA module containing baseband
circuit and RF-IC module. Both modules can be connected with
a high speed serial interface to be used with RF-IC verification.

Example of connection of RF-IC module and FPGA module

Integration of the
C language design environment and the verification
environment

We
offer to seamlessly connect ASIC design by the C language and
production verification

·
For example, if the verification of signal processing algorithm
is performed with an environment close to the production model,
we can get more accuracy and the shorter development cycle.

· Accverinos provides interface libraries including
DDR memory, USB and other devices for "Catapult C Synthesis"
from Mentor. By using these libraries, DUT created with "Catapult
C Synthesis" can be simply connected to device libraries
on B-10 base system.

· With this service, hardware knowledge such as FPGA
or memory devices becomes unnecessary as much as possible,
and the verification close to the production model can be
performed.

Mentor Graphics and Accverinos
offer the high speed verification solution to system
level development engineers.
In other words, engineers can immediately start their
development.
We plan to provide such paltforms in which data from
Catapult can be seamlessly implemented to the Accverinos
® verification board which works at over 100MHz.
We will provide libraries for peripheral circuits with
the operation guaranteed hardware.