Product Details

The ADSP-BF549 processors were specifically designed to meet the needs of convergent automotive multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. For applications that require additional external memory, the ADSP-BF549 family provides product variants specifically designed to interface to either Standard DDR1 or 1.8V Low-Power DDR memory devices.

IP protection has become a necessary part of today’s embedded applications. The ADSP-BF54x provides a security scheme that balances flexibility and upgradeability with performance through the inclusion of a firmware based solution including OTP memory to enable users to implement private keys for secure access to program code.

The ADSP-BF549 provides peripheral flexibility to complement its high performance processing. These rich system level peripherals are well suited for Advanced Vehicle Infotainment and multimedia applications where multiple standards are prevalent and system performance is required.

To enhance connectivity, a High Speed USB On-the-Go (HS USB OTG) module with Integrated PHY has been integrated along with an 8/16-bit Host DMA Interface. These system level peripherals, along with standard serial connections provided by multiple on-chip SPORT, SPI, UART, TWI, and CAN interfaces, provide glue-less interfaces to multiple off chip devices including consumer and communication products, Bluetooth, and other application specific interfaces. This level of integration is perfect for the emerging and constantly changing products and standards in the car infotainment and multimedia segments.

For interfacing off chip to storage media including hard drives, CD/DVD-drives, and NAND Flash products, the ADSP-BF549 has implemented a SD/SDIO controller, ATAPI-6 controller, and an 8/16-bit NAND flash controller.

Many multimedia enhancements have also been included on the ADSP-BF549 to offload processor MIPS through hardware integration, expand display capabilities, and shorten customer development time. The multiple Enhanced Parallel Peripheral Interfaces that support ITU-R BT.656 Video Formats now can also drive 18/24-bit LCD displays. A Hardware acceleration block, the Pixel Compositor, has been developed to execute overlay, color conversion and alpha blending. This block significantly reduces processor core overhead associated with software RGB-YUV color conversion and alpha blending.

For human interface capability, the ADSP-BF549 provides a 32-bit up/down counter that can sense 2-bit quadrature or binary codes as typically emitted by industrial drives or manual thumb wheels. An 8x8 Keypad interface is also included.

EVAL-BF548-EZLITE Circuit Diagram

Product Details

The ADSP-BF548 EZ-KIT Lite® provides developers with a cost-effective method for initial evaluation of the ADSP-BF54x Blackfin® Processors via a USB-based, PC-hosted tool set. With this EZ-KIT Lite, users can learn more about the Analog Devices (ADI) ADSP-BF548 hardware and software development, and quickly prototype a wide range of applications.

The EZ-KIT Lite includes an ADSP-BF548 Blackfin Processor desktop evaluation board along with an evaluation suite of the VisualDSP++® development and debugging environment, including the C/C++ compiler, assembler, and linker. The evaluation suite of VisualDSP++ is designed to be used with the EZ-KIT Lite only.

EMULATOR-USB & HP USB ICE Circuit Diagram

Product Details

Analog Devices’ cost-effective Universal Serial Bus (USB)-based emulator and High performance (HP) Universal Serial Bus (USB)-based emulator each provide an easy, portable, non-intrusive, target-based debugging solution for Analog Devices JTAG processors and DSPs. These powerful USB-based emulators perform a wide range of emulation functions, including single-step and full speed execution with pre-defined breakpoints, and viewing and/or altering of register and memory contents. With the ability to automatically detect and support multiple I/O voltages, the USB and HP USB emulators enable users to communicate with all of the Analog Devices JTAG processors and DSPs using either a full speed USB 1.1 or high speed USB 2.0 port on the host PC. Applications and data can easily and rapidly be tested and transferred between the emulators and the separately available VisualDSP++ development and debugging environment(sold separately).

The plug-and-play architecture of USB allows the emulators to be automatically detected and configured by the host operating system. It can also be connected to and disconnected from the host without opening the PC or turning off the power to the PC. A 3-meter cable is included to connect the emulators to the host PC, thus providing abundant accessibility to hard to reach targets.

The HP USB-based emulator also supports the Background
Telemetry Channel (BTC), a non-intrusive method
for exchanging data between the host and target
application without affecting the target system's
real-time characteristics.

The Loader and Utilities manual describes the command-line utilities for converting executable files into images that can be programmed into flash memory, and executed on the target processor as a standalone application without debugger involvement. The manual covers all Blackfin and SHARC processors supported by CrossCore Embedded Studio. The utilities described include ELF conversion utilities and utilities for encryption and cryptographic signing.

The Linker and Utilities manual describes the command-line linker utility, which assembles ELF executable files from previously-compiled object files. The manual covers the syntax and semantics of the Linker Description Files (LDFs) which guide this process, and gives examples for Blackfin and SHARC processors. Related utilities covered in this manual are the archiver elfar, for library (.dlb) creation and management, the memory initializer meminit, and the utilities elfdump, elfpatch and elfsyms.

The Software Licensing Guide describes the licensing mechanism used by CrossCore Embedded Studio. It explains the different kinds of license and the conditions and implications of license expiry. It describes how to activate and validate licenses, and how to administer a corporate domain license.

The Compiler and Library Manual for Blackfin Processors describes how to use the Compiler for processors with Blackfin and Blackfin+ cores (ADSP-BFxxx processors). It covers command-line switches, language compliance, language extensions, built-in function and optimization, among other topics. It provides reference material for the functions in the accompanying C and C++ standard libraries, and the DSP library.

The Assembler and Preprocessor manual covers the assemblers for the Blackfin and SHARC processors supported by CrossCore Embedded Studio. It gives the syntax for the directives supported by the assemblers and the standalone preprocessor, and covers their command-line switches.

The Lightweight TCP/IP (lwIP) Stack for CrossCore Embedded Studio is and implementation of this widely accepted TCP/IP stack for embedded platforms supporting most of the networking protocols in the TCP/IP suite.

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Design Resources

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.

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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.