SAN JOSE, Calif.—(BUSINESS WIRE)—January 25, 2007—
Mixel Inc. today announced availability of the MXL-LVDS-SR-4CH
Serializer and the companion MXL-LVDS-DS-4CH De-Serializer IPs. These
LVDS SerDes IPs are new additions to Mixel's existing family of SerDes
products which includes 2nd generation, high performance, Giga-bit
SerDes technology supporting a wide range of applications such as
XAUI, SATA, PCI-Express, Fibre Channel, SONET-OIF, and backplane. Both
IPs support 4-data channels and one clock channel and achieve 5Gbps
throughput performance at low power consumption. On the parallel
interface, the number of bits per channel can be programmed to 7 or
10-bits. The IPs conform to TIA/EIA-644 standard and are
silicon-proven in 0.18um process technology.

"These LVDS SerDes IPs offer the highest data rate available for
Flat Panel Display applications at excellent Jitter performance" said
Ashraf Takla, Mixel President and CEO. "The low jitter performance,
the programmable features such as the multiplication ratio, and the
selectable pre-emphasis make for a compelling solution," he added.

The MXL-LVDS-SR-4CH Serializer and the companion MXL-LVDS-DS-4CH
De-Serializer offer many features to reduce power and improve
performance. The transmitter employs selectable pre-emphasis to enable
transmission over long haul with low Bit Error Rate. The number of
parallel bits can be programmed to 7 or 10-bits. The receiver and
transmitter were designed with special care to ensure matching between
data and clock channels for maximum receiver margin. The design is
modular and desensitized to process variations.

The MXL-LVDS-SR-4CH and MXL-LVDS-DS-4CH are silicon-proven in
0.18um process technology and soon will be offered in smaller feature
sizes.