Start the FFT computation. This signal should be asserted either on the last input data sample or anytime after sending all input data. Internal FFT engine will start FFT computation when fft_din_start is sampled high on the clock edge. FFT output will be available after fixed latency

FFT1024c supports two different modes of input data/output data streaming.

Natural order: In natural order the input buffer addressing is controlled internally. On reset the internal address is set to 0 corresponding to the first fft/ifft input point.

In external address mode, (in_addr_mode ==1), the input data is stored inside internal buffer at the location indicated by din_addr.

The FFT or IFFT radix operations start when fft_din_start pulse is sampled high. The FFT data output will be streamed out after fixed latency. The fft_dout_start pulse is asserted on the first output data sample.

Similar to input address mode, output address mode can also be controlled internally or externally by providing dout_addr.

Interface timing Diagram

Figure 2. FFT1024c Timing Diagram

Synthesis Details

The 10-bit version of the core size starts at less than 50K ASIC gates. The smaller version of the core (-4) exhibit a latency of 1250 clocks, larger (-8) has 420 clock latency. Ultra-compact (-1) version of the core is also available for MIMO designs with large amount of data streams. Representative area/resources figures for a 10-bit implementation are shown below. All versions of the core require a 1024 x (2 x bit width) x 2 bits of memory.

Configuration

Technology

Area / Resources

Clock

Latency

FFT1024-4-10

TSMC 90 nm

50K gates

250 MHz

1250

FFT1024-8-10

TSMC 90 nm

100K gates

250 MHz

420

FFT1024-4-10

Xilinx Virtex 4

80 MHz

1250

FFT1024-8-10

Xilinx Virtex 4

80 MHz

420

FFT1024-2-16

TSMC 90 nm

18K gates

200 MHz

5200

Export Permits

US Bureau of Industry and Security has assigned the export control classification number 5E002 to the core. The core is eligible for the license exception ENC under section 740.17(A) and (B)(1) of the export administration regulations. See the licensing basics page,
for links to US government sites and more details.