NAMC-psTimer

AMC Fast Timing System with ps resolution

The NAMC-psTimer is designed timing systems for large installations such as the European XFEL (X-Ray Free Electron Laser) in Hamburg, Germany, but it can be used in a single stand-alone setup as well. Clocks and triggers are programmed and generated by a master module and distributed in a multi-star topology. All triggers within the entire timing system are synchronized with a jitter of approximately 10ps.

In addition to the distribution of triggers and clocks the system is able to distribute data words and tables through its fiber distribution network. A precision 1.3GHz clock with modulated data is used on the fiber links. Receivers can recover both clock and data. Synchronized dividers are used to generate local clocks at the receivers. The receiver has 23 programmable outputs:

Trigger with delay

Immediate or delayed trigger events

Gates between trigger events

Slow clocks

Two different slow data protocols

Fast data protocol

Key features

Technical details

Documentation

Block diagram

Order code

Applications/Solutions

can be used as a transmitter or receiver module

delivers precision clocks on TCLKA and TCLKB

provides triggers, gates, clocks or data on M-LVDS ports 17 - 20

3x RJ45 outputs at front panel with 2 triggers and one precision clock as LVDS signals

trigger position: 0 .. 160ms delay, 1ns resolution

trigger width: 0 .. 160ms, 10ns resolution

up to 255 trigger event numbers

precision clocks: 2.5 .. 650MHz

optional RTM with up to 9 additional triggers

optional RTM with up to 9 fiber links

clock and trigger jitter: ~10ps RMS

transmitter is implemented on a piggyback with 3 channels with or without drift compensation (order option)

Optional RTMs:

up to 9 drift compensated transmitter outputs on SFP modules.

9 triggers and clocks on LVDS (RJ45 plugs) and LEMO connectors. Three of these outputs will provide a ps shift of the falling and leading edges.

can be used as a transmitter or receiver module

delivers precision clocks on TCLKA and TCLKB

provides triggers, gates, clocks or data on M-LVDS ports 17 - 20

3x RJ45 outputs at front panel with 2 triggers and one precision clock as LVDS signals

trigger position: 0 .. 160ms delay, 1ns resolution

trigger width: 0 .. 160ms, 10ns resolution

up to 255 trigger event numbers

precision clocks: 2.5 .. 650MHz

optional RTM with up to 9 additional triggers

optional RTM with up to 9 fiber links

clock and trigger jitter: ~10ps RMS

transmitter is implemented on a piggyback with 3 channels with or without drift compensation (order option)

Optional RTMs:

up to 9 drift compensated transmitter outputs on SFP modules.

9 triggers and clocks on LVDS (RJ45 plugs) and LEMO connectors. Three of these outputs will provide a ps shift of the falling and leading edges.