The momentum behind EUV patterning is accelerating. Today, most foundries are forecasting implementation of EUV for holes and line/space by 2018-2020. Implementation of EUV in contact, via and critical metal lines could reduce cycle time by at least one month yielding significant benefits from a throughput standpoint as well as shorter learning cycles for new technology readiness.

Semiconductors have been scaling continuously for the past 50 years, evolving to perform faster, with less power consumption and lower cost. Line width is poised to fall below 20nm and the number of transistors will soon exceed several ten million per 1mm2.