Tensilica DSP core does 100 GMACs at 1W

PALO ALTO, Calif. Ė Tensilica described a new integer DSP core for next-generation cellular applications that when made in a 28nm process can compute 100 GMACs/second at less than a Watt. The BBE64 core is a new instruction set architecture based on the companies' current Xtensa LX4 core.

"We are trying to build a world-leading DSP core, arguably the fastest DSP core yet," said Chris Rowen, Tensilica founder and chief technologist in a talk at the Hot Chips event here.

The BBE64 combines SIMD and VLIW concepts and lets designers configure processors for a range of handset and base stations uses. Rowen said the core run at data rates of "a few hundred MHz" could process 2x2 MIMO LTE Advanced signals at 1 Gbit/second across 100 MHz of spectrum.

The core is a new design and instruction set architecture layered on top of the existing Xtensa LX4 announced in February. Tensilica began work on the architecture in early 2010 and now has design kits for it sampling to key customers.

The company has completed the BBE64 programming model and generated RTL based on it. The core could support designs up to more than a million logic gates, compared to the LX4 which could be implemented in as few as 8,000 gates, Rowan said.

Although the BBE64 is a single core, it uses many instances of low-level blocks such as adders, shifters, arithmetic-logic units and multiple-accumulate units. Competing cores use simpler pipelines but multiple instances of cores on a chip.

The BBE64 is currently limited to integer math. A floating point version has "been defined, but has not been designed yet," Rowan told EE Times.

Currently, Texas Instruments ships chips using an array of eight DSP cores that computes 320 GMACs/second and 160 GFlops. TI uses a single core that handles both integer and floating point math.

Using separate integer and floating point cores would cost extra die area and power, one TI engineer said. Integer math lacks the accuracy of floating point calculations and would require programmers to make complex conversions, he said.

Tensilica is playing catch up with DSP core designer Ceva in the burgeoning cellular sector. Ceva commands as much as 90 percent of the business for licensed DSP cores in cellphone baseband processors, according to Will Strauss, principal of Forward Concepts (Tempe, Ariz.). Ceva became the largest cellular baseband provider last fall, surpassing Qualcomm and others, he said.

Instead of quoting "100 GMACs at 1W", it would be more interesting to see figures (perf & power) from usecase pov -- audio/speech algos (which are less data-hungry) and video/imaging algos (which are more data hungry). Then only we can understand how viable is the chip from product pov.