C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL

C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals

C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases

C23C8/08—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases only one element being applied

C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL

C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL

C23C30/00—Coating with metallic material characterised only by the composition of the metallic material, i.e. not characterised by the coating process

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/02041—Cleaning

H01L21/02057—Cleaning during device manufacture

H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers

H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/02041—Cleaning

H01L21/02101—Cleaning only involving supercritical fluids

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/02104—Forming layers

H01L21/02107—Forming insulating materials on a substrate

H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates

H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer

H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon

H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/02104—Forming layers

H01L21/02107—Forming insulating materials on a substrate

H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates

H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer

H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon

H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC

H01L21/02137—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising alkyl silsesquioxane, e.g. MSQ

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/02104—Forming layers

H01L21/02107—Forming insulating materials on a substrate

H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates

H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/02104—Forming layers

H01L21/02107—Forming insulating materials on a substrate

H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer

H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment

H01L21/02343—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a liquid

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer

H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers

H01L21/3105—After-treatment

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer

H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers

H01L21/3105—After-treatment

H01L21/31058—After-treatment of organic layers

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer

H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers

H01L21/312—Organic layers, e.g. photoresist

H01L21/3121—Layers comprising organo-silicon compounds

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer

H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer

H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers

H01L21/314—Inorganic layers

H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass

H—ELECTRICITY

H01—BASIC ELECTRIC ELEMENTS

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer

H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers

H01L21/314—Inorganic layers

H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass

H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof

H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer

H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers

H01L21/314—Inorganic layers

H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass

H01L21/31604—Deposition from a gas or vapour

H01L21/31633—Deposition of carbon doped silicon oxide, e.g. SiOC

Abstract

A method of passivating silicon-oxide based low-k materials using a supercritical carbon dioxide passivating solution comprising a silylating agent is disclosed. The silylating agent is preferably an organosilicon compound comprising organo-groups with five carbon atoms such as hexamethyldisilazane (HMDS) and chlorotrimethylsilane (TMCS) and combinations thereof. The silicon oxide-based low-k material, in accordance with embodiments of the invention, is maintained at temperatures in a range of 40 to 200 degrees Celsius, and preferably at a temperature of about 150 degrees Celsius, and at pressures in a range of 1,070 to 9,000 psi, and preferably at a pressure of about 3,000 psi, while being exposed to the supercritical passivating solution. In accordance with further embodiments of the invention, a silicon oxide-based low-k material is simultaneously cleaned and passivated using a supercritical carbon dioxide cleaning solution.

The present invention relates to the field of micro-device processing. More particularly, the present invention relates to passivating low dielectric materials with supercritical processing solutions.

BACKGROUND OF THE INVENTION

Semiconductor fabrication generally uses photoresist in etching and other processing steps. In the etching steps, a photoresist masks areas of the semiconductor substrate that are not etched. Examples of the other processing steps include using a photoresist to mask areas of a semiconductor substrate in an ion implantation step or using the photoresist as a blanket protective coating of a processed wafer or using the photoresist as a blanket protective coating of a MEMS (micro electro-mechanical system) device.

State of the art integrated circuits can contain up to 6 million transistors and more than 800 meters of wiring. There is a constant push to increase the number of transistors on wafer-based integrated circuits. As the number of transistors is increased there is a need to reduce the cross-talk between the closely packed wire in order to maintain high performance requirements. The semiconductor industry is continuously looking for new processes and new materials that can help improve the performance of wafer-based integrated circuits.

Materials exhibiting low dielectric constants of between 3.5-2.5 are generally referred to as low-k materials and porous materials with dielectric constant of 2.5 and below are generally referred to as ultra low-k (ULK) materials. For the purpose of this application low-k materials refer to both low-k and ultra low-k materials. Low-k materials have been shown to reduce cross-talk and provide a transition into the fabrication of even smaller integrated circuit geometries. Low-k materials have also proven useful for low temperature processing. For example, spin-on-glass materials (SOG) and polymers can be coated onto a substrate and treated or cured with relatively low temperature to make porous silicon oxide-based low-k layers. Silicon oxide-based herein does not strictly refer silicon-oxide materials. In fact there are a number of low-k materials which have silicon oxide and hydrocarbon components and/or carbon, wherein the formula is SiOxCxHz, referred to herein as hybrid materials and designated herein as MSQ materials. It is noted, however, that MSQ is often designated to mean Methyl Silsesquioxane, which is an example of the hybrid low-k materials described above. Some low-k materials such as carbon doped oxide (COD) or fluoridated silicon glass (FSG), are deposited using chemical vapor deposition techniques, while other low-k materials, such as MSQ, porous-MSQ, and porous silica, are deposited using a spin-on process.

While low-k materials are promising materials for fabrication of advanced micro circuitry, they also provide several challenges they tend be less robust that more traditional dielectric layer and can be damaged by etch and plasma ashing process generally used in pattern dielectric layer in wafer processing, especially in the case of the hybrid low-k materials, such as described above. Further, silicon oxide-based low-k materials tend to be highly reactive after patterning steps. The hydrophillic surface of the silicon oxide-based low-k material can readily absorb water and/or react with other vapors and/or process contaminants which can alter the electrical properties of the dielectric layer itself and/or diminish the ability to further process the wafer.

What is needed is a method of passivating a low-k layer especially after a patterning steps. Preferably, the method of passivating the low-k layer is compatible with other wafer processing steps, such as processing steps for removing contaminants and/or post-etch residue after a patterning step.

SUMMARY OF THE INVENTION

The present invention is directed to passivating silicon-oxide based low-k materials using a supercritical passivating solution. Low-k materials are usually porous oxide-based materials and can include an organic or hydrocarbon component. Examples of low-k materials include, but are not limited to, carbon-doped oxide (COD), spin-on-glass (SOG) and fluoridated silicon glass (FSG) materials. In accordance with the embodiments of the present invention, a supercritical passivating solution comprises supercritical carbon dioxide and an amount of a passivating agent that is preferably a silylating agent. The silylating agent can be introduced into supercritical carbon dioxide neat or with a carrier solvent, such as N, -dimethylacetamide (DMAC), gamma-butyrolacetone (BLO), dimethyl sulfoxide (DMSO), ethylene carbonate (EC) N-methylpyrrolidone (NMP), dimethylpiperidone, propylene carbonate, alcohol or combinations thereof, to generate the supercritical passivating solution. In accordance with a preferred embodiment of the invention, the silylating agent is an organosilicon compound, and silyl groups (Si(CR3)3) attack silanol (Si—OH) groups on the surface of the silicon oxide-based low-k dielectric material and/or in the bulk of the silicon oxide-based low-k dielectric material to form surface capped organo-silyl groups during the passivating step.

In accordance with further embodiments of the invention, a silicon oxide-based low-k material is passivated with a supercritical passivating solution comprising supercritical carbon dioxide and an organosilicon compound that comprises organo-groups with 5 carbon atoms or fewer. In accordance with a preferred embodiment of the invention the organo-groups, or a portion thereof, are methyl groups. For example, suitable organosilicon compounds useful as silylating agents in the present invention include, but are not limited to, hexamethyldisilazane (HMDS) and chlorotrimethylsilane (TMCS), trichloromethylsilane (TCMS) and combinations thereof. Alternatively, a source of (CH3) radicals can be used to as a silylating agent.

During a supercritical passivating step, a silicon oxide-based low-k material, in accordance with the embodiments of the invention, is maintained at temperatures in a range of 40 to 200 degrees Celsius, and preferably at a temperature of approximately 150 degrees Celsius, and at pressures in a range of 1,070 to 9,000 psi, and preferably at a pressure of approximately 3,000 psi, while a supercritical passivating solution, such as described above, is circulated over the surface of the silicon oxide-based low-k material.

In accordance with still further embodiments of the invention, the surface of the silicon oxide-based low-k material is dried or retreated prior to the passivating step. In accordance with this embodiment of the invention, the silicon oxide-based low-k material is dried, or retreated by exposing the low-k materials to a supercritical solution of supercritical carbon dioxide or supercritical carbon dioxide with one or more solvents including but not limited to ethanol, methanol, n-hexane and combinations thereof. While a supercritical processing solution with methanol and ethanol primarily remove water from low-k materials, a supercritical processing solution with n-hexane is believed to remove hydroxyl groups from low-k materials and facilitate the ability of a silylating agent, or agents, to silylate the low-k materials in the passivation processing step.

In accordance with yet further embodiments of the invention, a dielectric surface is passivated during a cleaning processing step, wherein a post-etch residue is simultaneously removed from the dielectric surface using a supercritical cleaning solution comprising a passivating agent, such as described above. The post-etch residue can include a photoresist polymer or a photoresist polymer with an anti-reflective dye and/or an anti-reflective layer.

In accordance with the method of the present invention, a patterned low-k dielectric layer is formed by depositing a continuous layer of a low-k dielectric material, etching a pattern in the low-k material and removing post-etch residue using a supercritical solution comprising supercritical carbon dioxide and a silicon-based passivating agent.

After a low-k material is patterned by treating the low-k material to an etch and/or ash process, the low-k material can show a marked increase in the k-values as a result of degeneration of the material and/or removal of a portion of the organic component, in the case of low-k hybrid materials; increases in k-values that are greater than 1.0 have been observed. The method of passivation, in accordance with the present invention has the ability to restore or recover a portion of the of the k-value lost in the patterning steps. In fact it has been observed that low-k materials passivated, in accordance with the embodiments of the present invention can be restored to exhibit k-values near, or at, k-values of the original and un-patterned material.

Further details of supercritical systems suitable for treating wafer substrates to supercritical processing solutions are further described in U.S. patent application Ser. No. 09/389,788, filed Sep. 3, 1999, and entitled “REMOVAL OF PHOTORESIST AND PHOTORESIST RESIDUE FROM SEMICONDUCTORS USING SUPERCRITICAL CARBON DIOXIDE PROCESS” and U.S. patent application Ser. No. 09/697,222, filed Oct. 25, 2000, and entitled “REMOVAL OF PHOTORESIST AND RESIDUE FROM SUBSTRATE USING SUPERCRITICAL CARBON DIOXIDE PROCESS”, both of which are hereby incorporated by reference.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A-C show schematic representations of organosilicon structures used as silylating agents in a supercritical processing step, in accordance with the embodiments of the invention.

FIG. 1D shows schematic representations of silylating agents reacting with silanol groups in a low-k material, in accordance with the embodiments of the invention.

FIG. 1E illustrates steric hindrance between a silanol-group and a silyl-group on a surfaces of a low-k material, which can lead to incomplete silylating of the surface.

FIG. 2 shows a simplified schematic of a supercritical wafer processing apparatus, in accordance with the embodiments of the invention.

FIG. 3 shows a detailed schematic diagram of a supercritical processing apparatus, in accordance with the embodiments of the invention.

FIG. 4 is a plot of pressure versus time for a supercritical cleaning, rinse or curing processing step, in accordance with the method of the present invention.

FIG. 5 is a schematic block diagram outlining steps for treating a silicon oxide-based low-k layer, in accordance with the embodiments of the present invention.

FIG. 6 shows infrared absorption spectra for a silicon-based low-k material before and after treatment with a passivating agent, in accordance with embodiments of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

In semiconductor fabrication, a dielectric layer is generally patterned using a photoresist mask in one or more etching and ashing steps. Generally, to obtain the high resolution line widths and high feature aspect ratios, an anti-reflective coating is required. In earlier processes, anti-reflective coating (ARC) of titanium nitride (TiN) were vapor deposited on the dielectric layer and the TiN anti-reflective coatings would not be removed after patterning but rather remain a part of the device fabricated. With new classes of low dielectric layers that can be made to be very thin, TiN anti-reflective coatings are not preferred because anti-reflective coatings can dominate over the electrical properties of the dielectric layer. Accordingly, polymeric spin-on anti-reflective coatings with an anti-reflective dye that can be removed after a patterning step are preferred. Regardless of the materials that are used in the patterning steps, after patterning the dielectric layer these materials are preferably removed from the dialectic layer after the patterning process is complete.

Porous low-k materials are most commonly silicon-oxide based with silanol (Si—OH) groups and/or organo components as described above. These low-k materials can become activated and/or damaged, which is believed to be in-part is due to depletion of an organic component during etch and/or ash steps. In either case of activation and/or damage, additional silanol groups are exposed which can readily adsorb water and/or contaminants and/or chemicals that are present during other processing steps. Accordingly, partial device structures with exposed low-k dielectric layers are difficult to handle and maintain contaminant free, especially after patterning steps. Further, activation and/or damage the bulk of the low-k material can result in increased k-values. It has been observed low-k materials that are activated and/or damaged can exhibit increases in k-values by 1.0 or more.

The present invention is directed to a method of and system for passivating porous low-k dielectric materials. The method of the present invention preferably passivates a layer of patterned low-k layer by end-capping silanol groups on the surface and/or in the bulk of the low-k material to produce a patterned low-k material which is more hydrophobic, more resistant to contamination and/or less reactive. In accordance with the embodiments of the present invention, a passivation processing step is carried out separately from a supercritical post-etch cleaning process or, alternatively, is carried out simultaneously with a supercritical post-etch cleaning process.

Referring now to FIG. 1A, in accordance with the embodiments of the invention, a supercritical passivating solution comprises a silane structure 10 which can have all organo groups, such as in the case with hexamethyldisilazane (HMDS) or a combination of organo and halide groups (F, Cl, Br and etc.) which are attached to any one of the positions 1-4.

Now referring to FIG. 1B, in accordance with further embodiments of the invention, a supercritical passivating solution comprises a pent-valent organosilicon compound 20, wherein the silicon atom is coordinated to 5 ligands in the positions 1, 2, 3, 4 and 5 in a tiganolbipyramidal configuration. Typically such compounds 20 are anions with one or more of the positions 1-5 being coordinated with halide atom, such as in the case with a difluorotrimethylilicate anion. When the structure 20 is an anion, the compound 20 also includes a suitable cation, such as sodium, potassium or any other inorganic or organic cation (not shown).

Now referring FIG. 1C, in accordance with yet further embodiments of the present invention, a supercritical passivating solution comprises a silazane structure 30, which can be described as an amine structure with two organosilyl groups coordinated to the nitrogen of the amine, such as in the case of hexamethyldisilazane (HMDS).

FIGS. 1D shows schematic representations of hexamethyldisilazane (HMDS) reacting with silanol groups on a surface of a low-k material in reaction sequence (1) and trimethyldisilazane (TMDS) reacting with silanol groups on a surface of the low-k material in reaction sequence (2). Note that trimethyldisilazane (TMDS) is a product in the reaction sequence (1), which can then further react with silanol groups on a surface of the low-k material in accordance with reaction sequence (2). Hence, hexamethyldisilazane (HMDS) provides is a excellent silylating agent for use in accordance with the method of the present invention.

FIG. 1E illustrates steric hindrance between a silanol group 53 and silyl-group 55 on a surface 51 of a low-k material. Note that the silanol group 53 is extremely large and can actually provide a protective barrier for the silanol group 53. Accordingly, it is not general possible to completely silylate an entire surface or bulk of a low-k material. However, when the low-k material is pre-treated with a supercritical processing solution comprising supercritical carbon dioxide and n-hexane, it is believed that a greater percent of the silanol groups 53 are replace with silyl-groups 55 on the surface 51.

It will be clear to one skilled in the art that a supercritical passivating solution with any number of silylating agents and combinations of silylating agents are within the scope of the present invention. Further, the silylating agent or agents used can be can be introduced into supercritical carbon dioxide neat or along with a carrier solvent, such as N, N-dimethylacetamide (DMAC), gamma-butyrolacetone (BLO), dimethyl sulfoxide (DMSO), ethylene carbonate (EC) N-methylpyrrolidone (NMP), dimethylpiperidone, propylene carbonate, alcohol or combinations thereof to generate the supercritical passivating solution. Also, as explained previously the passivating agent or agents used in the present invention can be used in supercritical cleaning processes to remove post-etch residues from a surface of a patterned low-k material.

The present invention is particularly well suited for removing post-etch photopolymer from a wafer material and even more specifically is well suited to remove a post-etch photopolymer and/or a polymeric anti-reflective coating layer from a low-k silicon oxide-based layer, including low-k layers formed from porous MSQ and porous SiO2 (e.g., Honeywell's NANOGLASS®), while simultaneously passivating a silicon oxide-based layer. For the purpose of simplicity, supercritical processing solutions are referred to herein as either a supercritical cleaning and/or a supercritical passivating solution.

The apparatus 200 comprises a carbon dioxide source 221 that is connected to an inlet line 226 through a source valve 223 which can be opened and closed to start and stop the flow of carbon dioxide form the carbon dioxide source 221 to the inlet line 226. The inlet line 226 is preferably equipped with one or more back-flow valves, pumps and heaters, schematically shown by the box 220, for generating and/or maintaining a stream of supercritical carbon dioxide. The inlet line 226 also preferably has a inlet valve 225 that is configured to open and close to allow or prevent the stream of supercritical carbon dioxide from flowing into a processing chamber 201.

Still referring to FIG. 2, the process camber 201 is preferably equipped with one or more pressure valves 209 for exhausting the processing chamber 201 and/or for regulating the pressure within the processing chamber 201. Also, the processing chamber 201, in accordance with the embodiments of the invention is coupled to a pump and/or a vacuum 211 for pressurizing and/or evacuating the processing chamber 201.

Again referring to FIG. 2, within the processing chamber 201 of the apparatus 200 there is preferably a chuck 233 for holding an/or supporting a wafer structure 213. The chuck 233 and/or the processing chamber 201, in accordance with further the embodiments of the invention, has one or more heaters 231 for regulating the temperature of the wafer structure 213 and/or the temperature of a supercritical processing solution within the processing chamber 201.

The apparatus 200, also preferably has a circulation line or loop 203 that is coupled to the processing chamber 201. The circulation line 203 is preferably equipped with one or more valves 215 and 215′ for regulating the flow of a supercritical processing solution through the circulation line 203 and through the processing chamber 201. The circulation line 203, is also preferably equipped with any number back-flow valves, pumps and/or heaters, schematically represent by the box 205, for maintaining a supercritical processing solution and flowing the supercritical process solution through the circulation line 203 and through the processing chamber 201. In accordance with a preferred embodiment of the invention, the circulation line 203 has an injection port 207 for introducing chemistry, such as a passivating agents and solvents, into the circulation line 203 for generating supercritical processing solutions in situ.

FIG. 3 shows a supercritical processing apparatus 76 in more detail than FIG. 2 described above. The supercritical processing apparatus 76 is configured for generating and for treating a wafer with supercritical cleaning, rinse and curing solutions. The supercritical processing apparatus 76 includes a carbon dioxide supply vessel 332, a carbon dioxide pump 334, the processing chamber 336, a chemical supply vessel 338, a circulation pump 340, and an exhaust gas collection vessel 344. The carbon dioxide supply vessel 332 is coupled to the processing chamber 336 via the carbon dioxide pump 334 and carbon dioxide piping 346. The carbon dioxide piping 346 includes a carbon dioxide heater 348 located between the carbon dioxide pump 334 and the processing chamber 336. The processing chamber 336 includes a processing chamber heater 350. The circulation pump 340 is located on a circulation line 352, which couples to the processing chamber 336 at a circulation inlet 354 and at a circulation outlet 356. The chemical supply vessel 338 is coupled to the circulation line 352 via a chemical supply line 358, which includes a first injection pump 359. A rinse agent supply vessel 360 is coupled to the circulation line 352 via a rinse supply line 362, which includes a second injection pump 363. The exhaust gas collection vessel 344 is coupled to the processing chamber 336 via exhaust gas piping 364.

It will be readily apparent to one skilled in the art that the supercritical processing apparatus 76 includes valving, control electronics, filters, and utility hookups which are typical of supercritical fluid processing systems.

Still referring to FIG. 3, in operation a wafer (not shown) with a residue thereon is inserted into the wafer cavity 312 of the processing chamber 336 and the processing chamber 336 is sealed by closing the gate valve 306. The processing chamber 336 is pressurized by the carbon dioxide pump 334 with the carbon dioxide from the carbon dioxide supply vessel 332 and the carbon dioxide is heated by the carbon dioxide heater 348 while the processing chamber 336 is heated by the processing chamber heater 350 to ensure that a temperature of the carbon dioxide in the processing chamber 336 is above a critical temperature. The critical temperature for the carbon dioxide is 31° C. Preferably, the temperature of the carbon dioxide in the processing chamber 336 is within a range of range of from 40° C. to about 200° C., and preferably at or near to 150° C., during a supercritical passivating step.

Upon reaching initial supercritical conditions, the first injection pump 359 pumps the processing chemistry, such as a silylating agent, from the chemical supply vessel 338 into the processing chamber 336 via the circulation line 352 while the carbon dioxide pump further pressurizes the supercritical carbon dioxide. At the beginning of the addition of processing chemistry to the processing chamber 336, the pressure in the processing chamber 336 is preferably about 1,070 to 9,000 psi and preferably at or near 3,000 psi. Once a desired amount of the processing chemistry has been pumped into the processing chamber 336 and desired supercritical conditions are reached, the carbon dioxide pump 334 stops pressurizing the processing chamber 336, the first injection pump 359 stops pumping processing chemistry into the processing chamber 336, and the circulation pump 340 begins circulating the supercritical cleaning solution comprising the supercritical carbon dioxide and the processing chemistry. Preferably, the pressure within the processing chamber 336 at this point is about 3000 psi. By circulating the supercritical processing solution, supercritical processing solution is replenished quicky at the surface of the wafer thereby enhancing the rate of passivating the surface of a low-k dielectric layer on a wafer.

When a wafer (not shown) with a low-k layer is being processed within the pressure chamber 336, the wafer is held using a mechanical chuck, a vacuum chuck or other suitable holding or securing means. In accordance with the embodiments of the invention the wafer is stationary within the processing chamber 336 or, alternatively, is rotated, spun or otherwise agitated during the supercritical process step.

After the supercritical processing solution is circulated though circulation line 352 and the processing chamber 336, the processing chamber 336 is partially depressurized by exhausting some of the supercritical process solution to the exhaust gas collection vessel 344 in order to return conditions in the processing chamber 336 to near the initial supercritical conditions. Preferably, the processing chamber 336 is cycled through at least one such decompression and compression cycle before the supercritical processing solutions are completely exhausting the processing chamber 336 to the exhaust into the collection vessel 344. After exhausting the pressure chamber 336 a second supercritical process step is performed or the wafer is removed from the processing chamber 336 through the gate valve 306, and the wafer processing continued second processing apparatus or module (not shown).

FIG. 4 illustrates an exemplary plot 400 of pressure versus time for a supercritical process step, such as a supercritical cleaning/passivating process step, in accordance with the method of the present invention. Now referring to both FIGS. 3 and 4, prior to an initial time T0, the wafer structure with post-etch residue thereon is placed within the processing chamber 336 through the gate valve 306 and the processing chamber 336 is sealed. From the initial time T0 through a first duration of time T1, the processing chamber 336 is pressurized. When the processing chamber 336 reached critical pressure Pc (1,070 psi) then a processing chemistry including a silylating agents is injected into the processing chamber 236, preferably through the circulation line 352, as explained previously. The processing chemistry preferably includes hexamethyldisilazane (HMDS), chlorotrimethylsilane (TMCS), trichloromethylsilane (TMCS) and combinations thereof which are injected into the system. Several injections of process chemistries can be performed over the duration of time T1 to generate a supercritical processing solution with the desired concentrations of chemicals. The processing chemistry, in accordance with the embodiments of the invention, can also include one more or more carrier solvents, ammine salts, hydrogen fluoride and/or other sources of fluoride. Preferably, the injection(s) of the process chemistries begin upon reaching about 1100-1200 psi, as indicated by the inflection pint 405. Alternatively, the processing chemistry is injected into the processing chamber 336 around the second time T2 or after the second time T2.

After processing chamber 336 reaches an operating pressure Pop at the second time T2 which is preferably about 3,000 psi, but can be any value so long as the operating pressure is sufficient to maintain supercritical conditions, the supercritical processing solution is circulated over and/or around the wafer and through the processing chamber 336 using the circulation line 325, such as described above. Then the pressure within the processing chamber 336 is increases and over the duration of time the supercritical processing solution continues to be circulated over and/or around the wafer and through the processing chamber 336 using the circulation line 325 and or the concentration of the supercritical processing solution within the processing chamber is adjusted by a push through process, as described below.

Still referring to FIG. 4, in a push-through process, over the duration of time T3 a fresh stock of supercritical carbon dioxide fed into the processing chamber 336, while the supercritical cleansing solution along with process residue suspended or dissolved therein is simultaneously displaced from the processing chamber 336 through the vent line 364. After the push-through step is complete, then over a duration of time T4, the processing chamber 336 is cycled through a plurality of decompression and compression cycles. Preferably, this is accomplished by venting the processing chamber 336 below the operating pressure Pop to about 1,100-1,200 psi in a first exhaust and then raising the pressure within the processing chamber 336 from 1,100-1,200 psi to the operating pressure Pop or above with a first pressure recharge. After, the decompression and compression cycles are complete, then the processing chamber is completely vented or exhausted to atmospheric pressure. For wafer processing, a next wafer processing step begins or the wafer is removed form the processing chamber and moved to a second process apparatus or module to continue processing.

The plot 400 is provided for exemplary purposes only. It will be understood by those skilled in the art that a supercritical processing step can have any number of different time/pressures or temperature profiles without departing from the scope of the present invention. Further any number of cleaning and rinse processing sequences with each step having any number of compression and decompression cycles are contemplated. Also, as stated previously, concentrations of various chemicals and species within a supercritical processing solution can be readily tailored for the application at hand and altered at any time within a supercritical processing step. In accordance with the preferred embodiment of the invention, a low-k layer is treated to 1 to 10 passivation steps in approximately 3 minute cycles, as described above with reference to FIGS. 3-4.

FIG. 5 is a block diagram 500 outlining steps for treating a substrate structure comprising a patterned low-k layer and post-etch residue thereon using a supercritical cleaning and passivating solution. In the step 502 the substrate structure comprising the post-etch residue is placed and sealed within a processing chamber. After the substrate structure is placed into and sealed within processing chamber in the step 502, in the step 504 the processing chamber is pressurized with supercritical CO2 and processing chemistry is added to the supercritical CO2 to generate a supercritical cleaning and passivating solution. Preferably, the cleaning and passivating chemistry comprises at least one organosilicon compound.

After the supercritical cleaning and passivating solution is generated in the step 504, in the step 506 the substrate structure is maintained in the supercritical processing solution for a period of time sufficient to remove at least a portion of the residue from the substrate structure and passivate surfaces exposed after the reside is removed. During the step 506, the supercritical cleaning and passivating solution is preferably circulated through the processing chamber and/or otherwise agitated to move the supercritical cleaning solution over surfaces of the substrate structure.

Still referring to FIG. 5, after at least a portion of the residue is removed from the substrate structure in the step 506, the processing chamber is partially exhausted in the step 508. The cleaning process comprising steps 504 and 506 are repeated any number of times, as indicated by the arrow connecting the steps 508 to 504, required to remove the residue from the substrate structure and passivate the surfaces exposed. The processing comprising steps 504 and 506, in accordance with the embodiments of the invention, use fresh supercritical carbon dioxide, fresh chemistry or both. Alternatively, the concentration of the cleaning chemistry is modified by diluting the processing chamber with supercritical carbon dioxide, by adding additional charges of cleaning chemistry or a combination thereof.

Still referring to FIG. 5, after the processing steps 504, 506 and 508 are complete, in the step 510 the substrate structure is preferably treated to a supercritical rinse solution. The supercritical rinse solution preferably comprises supercritical CO2 and one or more organic solvents, but can be pure supercritical CO2.

Still referring to FIG. 5, after the substrate structure is cleaned in the steps 504, 506 and 508 and rinsed in the step 510, in the step 512 the processing chamber is depressurized and the substrate structure is removed from the processing chamber. Alternatively, the substrate structure is cycled through one or more additional cleaning/rinse processes comprising the steps 504, 506, 508 and 510 as indicated by the arrow connecting steps 510 and 504. Alternatively, or in addition to cycling the substrate structure through one or more additional cleaning/rinse cycles, the substrate structure is treated to several rinse cycles prior to removing the substrate structure from the chamber in the step 512, as indicated by the arrow connecting the steps 510 and 508.

As described previously, the substrate structure can be dried and/or pretreated prior to passivating the low-k layer thereon by using a supercritical solution comprising supercritical carbon dioxide and one or more solvents such as methanol, ethanol, n-hexane and/or combination thereof. Also, as mentioned previously pretreating the low-k layer with supercritical solution comprising supercritical carbon dioxide and n-hexane appears to improve the coverage of the silyl-groups on surface of the low-k layer. Also, it will be clear of one skilled in the art that a wafer comprising a post-etch residue and/or a patterned low-k dialectic layer can be treated to any number cleaning and passivating steps and/or sequences.

It will be understood by one skilled in the art, that while the method of passivating low-k material has been primarily described herein with reference to a post-etch treatment and/or a post-etch cleaning treatment, the method of the present invention can be used to directly passivate low-k materials. Further, it will be appreciated that when treating a low-k material, in accordance with the method of the present invention, a supercritical rinse step is not always necessary and simply drying the low-k material prior treating the low-k material with a supercritical passivating solution can appropriate for some applications.

EXPERIMENTAL RESULTS

Using a supercritical processing system, such as described in detail above in reference to FIGS. 2 and 3, samples with a low-k layer formed form MSQ materials were treated with a silylating agent under several conditions. Under a first set of conditions, a sample with a layer of the low-k layer material was treated with a solution of hexane and approximately 6 percent TMCS. The sample was then annealed at approximately 100° C. for approximately 1.0 hr. Under a second set of conditions a sample with a layer of the low-k material was treated with a supercritical carbon dioxide passivating solution with approximately 1.0 percent TMCS at approximately 3,000 psi. Under yet a third set of conditions, a sample with a layer of the low-k material was treated with a supercritical dioxide passivating solution with approximately 1.0 percent TMCS at approximately 3,000 psi at 100° C. After treatment of the samples under the conditions described above, Fourier Transform Infrared Spectra of an untreated samples and each of the treated sample were collected. A comparative plot of the Fourier Transform Infrared Spectra collected are shown in FIGS. 6A-B.

FIG. 6A plots the infrared spectra region from approximately 0 to 4,000 wave numbers. The peak 611 corresponds to the C—H stretching of the Si(CH3)3 groups, which has considerably increased for all of the samples treated with the silylating agent. The peak 661 corresponds to C—H bending of the Si(CH3)3 groups, which has also considerably increased for all of the samples treated with the silylating agent. FIG. 6B shows comparative plots of an expanded region of the infrared spectra shown in FIG. 6A, from approximately 2,800 wave numbers to 3,100 wave numbers to more clearly illustrate the increase in the peak 661 for the treated samples.

Still referring to FIG. 6A, the a broad peak 663 corresponding to O—H stretching, which is negligible in the in the treated samples, but is pronounced in the untreated sample. From spectra shown in FIGS. 6A-B, it is clear that TMCS is an effective silylating agent for the passivation of low-k material surfaces in both wet bench conditions and under supercritical processing conditions.

The present invention has the advantages of being capable of passivating a low-k surface and being compatible with other processing steps, such as removing post-etch residues (including, but not limited to, spin-on polymeric anti-reflective coating layers and photopolymers) for patterned low-k layers in a supercritical processing environment. The present invention also has been observed restore or partially restore k values of materials lost after patterning steps and has been shown to produce low-k layers that are stable over time.

While the present invention has been described in terms of specific embodiments incorporating details to facilitate the understanding of the principles of construction and operation of the invention, such references herein to specific embodiments and details thereof is not intended to limit the scope of the claims appended hereto. It will be apparent to those skilled in the art that modifications may be made in the embodiments chosen for illustration without departing from the spirit and scope of the invention. Specifically, while supercritical CO2 is the preferred medium for cleaning, other supercritical media alone or in combination with supercritical CO2 and combinations of hydrogen fluoride adducts are contemplated.

Claims (24)

1. A method of treating a patterned surface of a low-k dielectric layer comprising:

a removing post-etch residue from the patterned surface of the low-k dielectric layer using a supercritical processing solution comprising supercritical CO2 and an amount of a silylating agent comprising organic groups; and

b. removing the supercritical solution from the patterned surface of the low-k dielectric layer, wherein the patterned surface of the low-k dielectric layer is at least partially passivated with the organic groups from the processing solution, thereby at least partially restoring a k-value of the low-k dielectric layer to a pre-patterned value.

13. The method of claim 1, wherein the low-k surface comprises a material selected from the group consisting of a carbon doped oxide, a spin-on-glass (SOG) and fluoridated silicon glass (FSG).

14. A method of treating a dielectric, comprising:

a) removing post-etch residue from a surface of the dielectric using a supercritical cleaning solution, the dielectric having a k-value that is greater than an initial k-value; and

b) treating the surface of the dielectric with a passivating agent in a supercritical cleaning solution to form a passivated dielectric with restoring a restored k-value being substantially near the initial k-value.

15. The method of claim 14, wherein the post-etch residue comprises a polymer.

16. The method of claim 15, wherein the polymer is a photoresist polymer.

23. The method of claim 22, wherein the organosilicon compound is selected from the group consisting of hexamethyldisilazane (HMDS), chlorotrimethylsilane (TMCS) and trichloromethylsilane (TCMS).

24. A method of forming a patterned low-k dielectric layer, the method comprising:

a. depositing a continuous layer of a low-k dielectric material with an initial k-value;

b. forming a photoresist mask over the continuous layer of the low-k dielectric material;

c. patterning the continuous layer of low-k dielectric material through the photoresist mask, thereby forming a post-etch residue and causing the low-k dielectric layer to have a k-value greater that of the initial k-value; and

d. removing the post-etch residue using a supercritical solution comprising supercritical carbon dioxide and an organosilicon passivating agent, wherein the surface of the low-k dielectric material is passivated with organic groups from the organosilicon passivating agent thereby restoring the k-value to a k-value that is substantially near that of the initial k-value.

Semiconductordevice including a coupled dielectric layer and metal layer, method of fabrication thereof, and passivating coupling material comprissing multiple organic components for use in a semiconductor device