RISC-V Blog

The Proceedings of the 5th RISC-V Workshop, hosted at Google’s Quad campus in California in November, 2016 are now available from: https://riscv.org/2016/12/5th-risc-v-workshop-proceedings/ The goal of the workshop was to bring the RISC-V community together to share information about recent activity in the various RISC-V projects underway around the globe and build consensus on the future evolution [...]

The RISC-V ISA has been featured in the latest edition of the Microprocessor Report in and item "RISC-V OFFERS SIMPLE, MODULAR ISA" written by David Kanter of The Linley Group. Concluding Summary On the basis of early developments, the RISC-V ISA appears promising. It offers all the basic RISC features witha few twists that simplify [...]

PRESS RELEASE Bristol, UK, 14th April 2015 –T&VS, a leader in software test and hardware verification solutions,today announced an extension of its CPU verification capability. T&VS provides expertise to help companies ensure their hardware and software based products are reliable, safe and secure. At the heart of most products is a CPU core which will implement [...]