Summary

Posted: Oct 30, 2018

Role Number: 200004010

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product
In this highly visible role, you will be at the center of a chip design effort collaborating with many disciplines, with a critical impact on getting functional products to millions of customers quickly. You will be responsible for pre-silicon verification, silicon bring-up and debug of a CPU. The role includes verification tasks, bring-up planning, diagnostic generation, system lab testing, and failure analysis and debug of logic, timing and power-related bugs.

Key Qualifications

You should have 5+ years of processor pre- and post-silicon verification experience. Strong understanding of processor architecture and micro-architecture. Good understanding of operating systems, firmware and device drivers Experience in crafting tests to target specific portions of processor functionality. Excellent skills in triage and root-cause of silicon failures. Excellent teamwork and communication. Ability to work with multiple teams in delivering a solution. Strong programming skills

Description

Work with architects and verification engineers to leverage CPU debug features and prepare tests for debug of functionality issues on silicon. Work with CPU verification and design engineers to debug logical and physical issues on silicon. Craft diags either through manual or semi-automated means to help root-cause bugs in a system setting. The diags can span simple ones that fit in the L2 cache to more complex OSes and applications that run from DRAM. Deliver silicon bring up test plans and provide feedback and insights to leverage and enhance the debug architecture of the CPU

Education & Experience

BS/MSEE

Additional Requirements

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