I have just come on line to find my dream has been interpreted by T-1000 !!

I saw this device as not being a transformer but as two separate chokes sharing a common core. Our load consisting of LED's is teed off L1 creating a partial saturation. L2 is our recovery coil.

I have a simple question. When I look at LED's that are fitted to all sorts of appliances around my home, if I look at them through the corner of my eye they appear to be flashing very rapidly !! Is this the case, do LED's flicker at high frequency as a matter of normal operation ? Or do they flicker because the drive to them is pulsed ? If the answer is yes to the former then maybe there is an interaction between the LED's and the drive pulse ??

I am using the diagram (don't know if its the latest) as can be found in this thread on page 9 in post #204 from Groundloop:

Then in this diagram the potentiometer R11 is not there to adjust the duty cycle directly but to control the integration threshold of the inverting integrator formed by the 1st error amplifier (pins 1 & 2) and C7.

The 2nd error amplifier (pins 15 & 16) is configured as a voltage comparator and will be activated only when the voltage on pin 15 is pulled below ground by R7.Such negative voltage is impossible with ideal diodes connected as a load in such direction and with a non-inductive CSR (R5).

Diodes can briefly conduct backwards due to parasitic capacitances and the step recovery effect (SRD and DSRD) ...a non-ideal diode behavior. In any case, the C5 will integrate out any such brief reverse current pulses.

We do work also on this magical transformer now and then, at least i do, and i know Grumage did some testing and he made his squeal...

Squealing has the potential to modulate the permeability of the core via the Villari effect, but for this to happen the acoustic wavelengths should approximate the size of this small ferrite E-core. Smaller wavelengths mean higher frequency.

Then in this diagram the potentiometer R11 is not there to adjust the duty cycle directly but to control the integration threshold of the inverting integrator formed by the 1st error amplifier (pins 1 & 2) and C7.

Ok, good to know.

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The 2nd error amplifier (pins 15 & 16) is configured as a voltage comparator and will be activated only when the voltage on pin 15 is pulled below ground by R7..

Ok, so i could simulate this by applying a negative voltage to R7

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Such negative voltage is impossible with ideal diodes connected as a load in such direction and with a non-inductive CSR (R5).

Diodes can briefly conduct backwards due to parasitic capacitances and the step recovery effect (SRD and DSRD) ...a non-ideal diode behavior. In any case, the C5 will integrate out any such brief reverse current pulses.

Ok, but there are no such things as ideal diodes, right? So it could exploit that together with an inductive CSR (R5).

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Squealing has the potential to modulate the permeability of the core via the Villari effect, but for this to happen the acoustic wavelengths should approximate the size of this small ferrite E-core. Smaller wavelengths mean higher frequency.

Yes, i have to increase the frequency to check it out if something abnormal happens, but will be needed the leds first.

Yes, but exploiting non-ideal characteristics of diodes is considered a poor design and hard to replicate with different diodesException could be made for the brief reverse conduction during the DSR effect (as in your nanopulser) as well as the Zener effect and Avalanche reverse breakdown of some diodes in some cases.

May I suggest an extension or variation of ND's initial experiment (post 311) to attempt electrostatic excitation of a coil, however in this approach with electrostatic plates at the 1/4 wave points driven out of phase.

L2 can also be treated as a transmission line with appropriate terminations, resistive, capacitive, open or shorted line. We know that in a transmission line containing one complete wave, there are two nodes where voltage peaks of opposite polarity, we wish to drive the voltage nodes.

Your extensive knowledge and expertise will be a great help to this thread.

Best wishes, Grum.

Dear Grum

I have never been overboard but have been spending some time away building a new lab while I ponder this thread from time to time. There appear to be many new and knowledgeable individuals posting here, and that is refreshing.

Cheers ION

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Just because it has a patent application or is patented does not always mean it really works.

I am hesitant in asking you for one because I feel I do not have the skills required to solder all of those fine points. Maybe I can convince my brother to do it for me, or, just hire someone to do it for me and save me my precious bench time. Time is what we all need more of. hehehe

@all

Before I publish a resonance procedure, I am working on mapping the Akula E-core image to demystify that question once and for all and hopefully this will free up that question if it conforms to your vision. One little confusion at the start can send you on side angles for months. Months that we need to save.

About Wesley, he indicated he has not communicated with Akula since 1.5 months and does not know when his next discussion with him will happen. Maybe a Russian friend can ask some questions on their forum to see if Akula will respond about the coil. I would not risk doing this myself with a translation program to avoid the risk of offending anyone there. Something like wanting to ask "Hey you guys, how are things moving along!" Instead the program could produce "Hey you guys. Shove it!" hahahahahahaaha

The 4.7k resistor from pin 2 to ground is to keep the voltage of pin 2 at about 2.5V, below the threshold voltage of the sawtooth that appears at pin 5.

Cheers,

Black Bird

Ok, i put a 3.9K resistor from pin 2 to ground so that i have 2.5V on pin 2.Then i put again my 20K pot-meter center tap and a normal tap between pins 2 and 3, but same thing happens as without the 3.9K to ground.I can vary the d.c. between 56% and 100%. by manipulating the 20K and the Original 5K pot-meters.

You could do that, if you want to verify that the 2nd error amplifier/comparator functions properly.If the test is successful, then the output duty cycle should decrease almost to 0% immediately.

Ok, negative variable voltage on pin 15 via R7, but at the slightes negative value (milivolts) the d.c. flips to 100% (from the 56% it was).Increasing the negative voltage to -0.8V does this previous 56% d.c. return, and increasing further (-5V), does not change it.It seems that the signal is more unstable with this negative voltage applied.Manipulating the Original 5K pot-meter does not increase the d.c. range, it stays variable between 56% minimum till 100%.

Adding the 3.9K from pin 2 to ground and additional adding the 20K pot-meter between pins 2 and 3 (Black Birds solution) does not make any changes.

Ok, negative variable voltage on pin 15 via R7, but at the slightes negative value (milivolts) the d.c. flips to 100% (from the 56% it was).

That's good behavior, but you have misread (inverted) the duty cycle on the output transistor of the TL494 (pins 10 & 11)You should have written:"... at the slightest negative value (mllivolts) the DU.C. flips to 0% (from the 44% it was)."

When pin 13 is connected to the reference line (pin 14), the output transistor (pins 10 & 11) cannot be ON for longer than 48% of the whole cycle. That's stated on the first page of TL494's application note.

Manipulating the Original 5K pot-meter does not increase the d.c. range, it stays variable between 56% minimum till 100%.

The TL494 output DU.C. range is limited to from 0% to 48% when pin 13 is connected to the reference line (pin 14)

The function of the R11 pot is not to vary the output DU.C. directly or widen its range.The 1st error amplifier of the TL494 (pins 1 & 2) is configured to react only to quickly falling edges at R5 (via R7), see the diagram below. The R11 pot determines how steep these falling edges need to be in order to activate this error amplifier.

Activation (high level on pin 3) of either one of these error amplifiers will immediately decrease the duty cycle of TL494's outputs.

Ok, i put a 3.9K resistor from pin 2 to ground so that i have 2.5V on pin 2.Then i put again my 20K pot-meter center tap and a normal tap between pins 2 and 3, but same thing happens as without the 3.9K to ground.I can vary the d.c. between 56% and 100%. by manipulating the 20K and the Original 5K pot-meters.

Never it goes below 56% d.c.

Regards Itsu

Isn't the waveform inverted? I mean, if you are measuring it at the collector, this would really be (100-56)= 44%. On the other extreme, 96% or so would correspond to 4%.

OK, but bottomline is that putting a negative steady voltage on R15 via R7 does not change the d.c.It stays fixed at 56% (after the use of the pull up resistor R16 to invert it).Indeed the not used pin 8 output has (much smaller output) pulses varying between 0% and 43.9% when using Back Birds solution.

So only with enough steep pulses (determined by the R11 pot) this d.c. can be changed, right?So how can i test this? Can i put some pulses on pin 15 (via R7) which mimic these "quickly falling edges at R5"?

And, can i by removing the short between pins 13 and 14 achieve more then 48% d.c.?

Added for Black Birds new post: it does not matter where i measure, directly at pin 11 or at the junction of R17 and R16, the signal has a d.c. of 56% varying to 100% when using your solution. Measuring pin 8 which does NOT have a pull up resistor shows 44% going to 0% with your solution active.

OK, but bottom line is that putting a negative steady voltage on pin 15 via R7 does not change the du.c. It stays fixed at 56%...

But you just wrote that the DU.C. changes to 100% (although you should have written 0% when writing about TL494's outputs) when pin 15 is between 0V and -0.3V.Any input below -0.3V or above VCC-2V is out of legal bounds.

Indeed the not used pin 8 output has (much smaller output) pulses varying between 0% and 43.9% when using Back Birds solution.

The TL494 is considered ON when its output transistor is conducting. There are two such output transistors internally: between pins 10 & 11 and between pins 8 & 9.What's connected to these internal output transistors is secondary...and so is the voltage at those pins.

But you just wrote that the DU.C. changes to 100% (although you should have written 0% when writing about TL494's outputs) when pin 15 is between 0V and -0.3V.Any input below -0.3V or above VCC-2V is out of legal bounds.

So to me, the bottom line is that the output DU.C. of the TL494 changes to 0% after its pin 15 is brought below ground (within legal limits of the chip).The TL494 is considered ON when its output transistor is conducting. There are two such output transistors internally: between pins 10 & 11 and between pins 8 & 9.What's connected to these internal output transistors is secondary...and so is the voltage at those pins.

Verpies,

So if I understand you correctly, the second error amplifier is not in use because in the Akyla0083 circuit the plus input pin 16 is groundedand the minus input pin can never go below zero volt because of the positive bias from the VREF voltage output.

And, the first error amplifier is not in use because there can be no pulses through the 22nF capacitor because the input to the 210 Ohmresistor is DC because of the 10uF capacitor. The DC voltage over the 10uF capacitor will vary with the load current.

But you just wrote that the DU.C. changes to 100% (although you should have written 0% when writing about TL494's outputs) when pin 15 is between 0V and -0.3V.Any input below -0.3V or above VCC-2V is out of legal bounds.

right, i mean it does not regulate, but yes it suddenly flips from 56% (44%) to 100% (0%) which is not what i want.I want to have a variable d.c. which cannot been created by the negative steady dc on pin 15.

right, i mean it does not regulate, but yes it suddenly flips from 56% (44%) to 100% (0%) which is not what i want. wI want to have a variable d.c. which cannot been created by the negative steady dc on pin 15.

Oh, so you do not want to merely change the DU.C to whatever. You want to obtain intermediate values of the DU.C. between zero and max.

With pin 13 connected to pin 14 you can only vary it between 0% and 48%.To vary it that way you can remove R8 and C15, short pins 2 & 3. After these alterations, the TL494 will respond to the R11 pot with intermediate DU.C. values.

P.S.Shorting R9 and R10 will give you more adjustment range on the R11 pot but can damage the chip. The right way to increase the adjustment range is to remove R9, short R10 and connect the R11 pot to pin 12.

So how can i test this? Can i put some pulses on pin 15 (via R7) which mimic these "quickly falling edges at R5"?

Yes. Using the unmodified circuit from this schematic, remove one side of R7 and connect the Rigol SG to it. Set it to "Ramp" 500Hz, HighL=+5.0V, LowL=+0.5V and the Symmetry to 90%.Remove the power MOSFET or IGBT for these tests.

Verify with the scope that the LowL setting really gives you +500mV because there is a bug in some firmwares about this setting. We do not want to go below 0V because the 2nd error amplifier will get activated, as you have found out.

Vary the Symmetry setting to adjust the steepness of the falling edge applied to R7.

Monitor pin 3 with a scope. Depending on the R11 setting and the steepness of the falling edge applied to R7, you will observe positive pulses on pin 3.There will be some settings that will result in rapid oscillations on pin 3.