Product Details

The ADSP-21262 is the first member of the third-generation of SHARC® programmable DSPs. A range of applications such as high-quality audio and automotive entertainment systems, voice recognition, medical appliances and measurement devices benefit from the ADSP-21262’s integration of large on-chip memory with a wide variety of peripherals—thereby speeding time to market and keeping costs low.

The ADSP-21262 is based on the SHARC DSP core that supports execution of 32-bit fixed-point and 32/40-bit floating-point arithmetic formats. With its core running at 200MHz (5 ns instruction cycle time), the ADSP-21262 is capable of executing complex Fast Fourier Transform (FFT) operations—1024-point complex FFT in 46us, more than 2.6x faster than comparatively priced processors. In audio applications, the single-instruction, multiple data (SIMD) mode effectively doubles the processor performance.

The ADSP-21262 is designed with the highest level of integration, including 2 Mbit of on-chip dual-ported SRAM and 4 Mbit of mask programmable ROM memory. This large on-chip dual-ported memory enables sustained processor and I/O performance, without the need for external memory. System I/O is achieved through six full-duplex serial ports, four timers, a 16-bit parallel port, a serial peripheral interface (SPI), 22 zero-overhead Direct Memory Access (DMA) channels delivering fast data transfers without processor intervention and an innovative Digital Applications Interface (DAI) offering complete software control through its Signal Routing Unit (SRU).

Digital Applications Interface (DAI) for Simplified I/O System Development
The ADSP-21262 introduces the Digital Applications Interface (DAI), an architecture that enables complete software programmability of various peripherals. The flexibility and ease-of-use of the SHARC programming model, combined with the DAI, allow manufacturers to deploy one hardware configuration into multiple product offerings with different I/O requirements.

Connections are made using the flexible Signal Routing Unit (SRU), a matrix routing group of pins that provides configurable and flexible connectivity between all DAI components and the SRU. The peripherals connected through the DAI are: a precision clock generator (PCG), an input data port (IDP), six SPORTS (serial ports), six flag inputs, six flag outputs, three timers and the SRU. The IDP provides an additional input path to the DSP core, configurable as 8 channels of receive serial data or as 7 channels of receive serial data and a single channel of up to a 20-bit wide parallel data. This level of integration enables the designer to take full advantage of a wide variety of peripherals without sacrificing the overall system performance.

CROSSCORE Development Tools
3rd Generation SHARC DSP members are supported by ADI’s CROSSCORE brand of award winning development tools. The CROSSCORE components include the VisualDSP++™ software development environment, EZ-KIT Lite™ evaluation systems, and emulators.

VisualDSP++ is an integrated software development environment, allowing for fast and easy development, debug, and deployment. The EZ-KIT Lite evaluation system provides an easy way to investigate the power of the ADI family of DSPs and begin to develop applications. Emulators are available for PCI and USB host platforms for rapid on-chip debugging. Additional development tools and algorithms are available from an extensive third-party development community.

EVAL-SHRCUSB-EZEXT Circuit Diagram

Product Details

The SHARC® USB EZ-Extender daughter board allows developers to connect to the Parallel Port on the ADSP-21262 and ADSP-21364 EZ-KIT Lite® and to the Asynchronous Memory Bus on the ADSP-21369 EZ-KIT Lite. The EZ-Extender has peripherals that support USB 2.0

Applications and information about the use and connection of the various interfaces on the SHARC USB EZ-Extender are available from Analog Devices.

EVAL-21262-EZLITE Circuit Diagram

Product Details

The ADSP-21262 EZ-KIT Lite provides developers with a cost-effective method for initial evaluation of the ADSP-21262 SHARC Processor architecture for audio applications via a USB-based PC-hosted tool set. With this EZ-KIT Lite, users can learn more about ADI’s ADSP-21262 hardware and software development and quickly prototype applications.

The EZ-KIT Lite includes an ADSP-21262 Processor desktop evaluation board along with an evaluation suite of the VisualDSP++ development and debugging environment with the C/C++ compiler, assembler, and linker. VisualDSP++ development and debugging software, along with the USB-based debugger interface, enables users to perform standard debugging functions (such as read and write memory, read and write registers, load and execute executables, set and clear breakpoints, and single-step assembly, C, and C++ source code).

Resources

EMULATOR-USB & HP USB ICE Circuit Diagram

Product Details

Analog Devices’ cost-effective Universal Serial Bus (USB)-based emulator and High performance (HP) Universal Serial Bus (USB)-based emulator each provide an easy, portable, non-intrusive, target-based debugging solution for Analog Devices JTAG processors and DSPs. These powerful USB-based emulators perform a wide range of emulation functions, including single-step and full speed execution with pre-defined breakpoints, and viewing and/or altering of register and memory contents. With the ability to automatically detect and support multiple I/O voltages, the USB and HP USB emulators enable users to communicate with all of the Analog Devices JTAG processors and DSPs using either a full speed USB 1.1 or high speed USB 2.0 port on the host PC. Applications and data can easily and rapidly be tested and transferred between the emulators and the separately available VisualDSP++ development and debugging environment(sold separately).

The plug-and-play architecture of USB allows the emulators to be automatically detected and configured by the host operating system. It can also be connected to and disconnected from the host without opening the PC or turning off the power to the PC. A 3-meter cable is included to connect the emulators to the host PC, thus providing abundant accessibility to hard to reach targets.

The HP USB-based emulator also supports the Background
Telemetry Channel (BTC), a non-intrusive method
for exchanging data between the host and target
application without affecting the target system's
real-time characteristics.

Software

EVAL-21262-EZEXT Circuit Diagram

Product Details

The SHARC® EZ-Extender™ daughter board allows developers to connect a number of Analog Devices analog-to-digital (ADC) High Speed Converter (HSC) evaluation boards to the ADSP-21262 EZ-KIT Lite™. SHARC EZ-Extender also provides developers a breadboard area and the ability to access all of the pins on the ADSP-21262 EZ-KIT Lite's expansion interface.

Applications and information about the use and connection of the various interfaces on the SHARC EZ-Extender are available from Analog Devices.

The Compiler Manual for SHARC Processors describes how to use the Compiler for processors with SHARC and SHARC+ cores (ADSP-21xxx and ADSP-SC5xx processors). It covers command-line switches, language compliance, language extensions, built-in functions, and optimization, among other topics.

The Loader and Utilities manual describes the command-line utilities for converting executable files into images that can be programmed into flash memory, and executed on the target processor as a standalone application without debugger involvement. The manual covers all Blackfin and SHARC processors supported by CrossCore Embedded Studio. The utilities described include ELF conversion utilities and utilities for encryption and cryptographic signing.

The Linker and Utilities manual describes the command-line linker utility, which assembles ELF executable files from previously-compiled object files. The manual covers the syntax and semantics of the Linker Description Files (LDFs) which guide this process, and gives examples for Blackfin and SHARC processors. Related utilities covered in this manual are the archiver elfar, for library (.dlb) creation and management, the memory initializer meminit, and the utilities elfdump, elfpatch and elfsyms.

The Software Licensing Guide describes the licensing mechanism used by CrossCore Embedded Studio. It explains the different kinds of license and the conditions and implications of license expiry. It describes how to activate and validate licenses, and how to administer a corporate domain license.

The Assembler and Preprocessor manual covers the assemblers for the Blackfin and SHARC processors supported by CrossCore Embedded Studio. It gives the syntax for the directives supported by the assemblers and the standalone preprocessor, and covers their command-line switches.

Technical Articles

Design Resources

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.

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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.