Commit Message

use only 4K space from available 1GB PCIe aperture to access
end points configuration space by dynamically moving AFI_AXI_BAR
base address and always making sure that the desired location
to be accessed for generating required config space access falls
in the 4K space reserved for this purpose. This would give more
space for mapping end point device's BARs on some of Tegra platforms
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
V3:
* added a new soc_data entry 'use_4k_conf_space' to decide whether to use first 4K chunk (T20, T186)
* or last 4K chunk (T30, T124, T132 and T210) of the available 256MB region
V2:
* restored tegra_pcie_conf_offset() after extending it to include bus number
* removed tegra_pcie_bus_alloc() and merged some of its contents with tegra_pcie_add_bus()
* replaced ioremap() with devm_ioremap()
drivers/pci/host/pci-tegra.c | 125 ++++++++++++++-----------------------------
1 file changed, 40 insertions(+), 85 deletions(-)