Intel and Nikon Technologists Assess Status and Future of Lithography

Dr. Mark Phillips, Intel Fellow and Director of Lithography Hardware and Solutions, shared his expert view of recent developments in lithography at the LithoVision 2017 symposium. Phillips opened his presentation by reviewing several of his key messages from the previous year’s event: EUVL will remain expensive per wafer pass, even at full productivity; 193 immersion will continue to be used wherever possible to keep wafer costs in control; and total edge placement error (EPE) is the biggest technical challenge to future scaling (Figure 1A).

Figure 1A. Phillips opened his presentation by reviewing several key messages from his 2016 update (left image). Figure 1B. He highlighted improved intrinsic performance with product reticles and wafers.

Phillips then provided updates on a number of critical areas of lithography. He reported that the latest generation of 193i tools improve intrinsic performance in mix-and-match overlay and focus uniformity, especially with product reticles and wafers (Figure 1B). Overlay is helped by Nikon Super Distortion Matching (SDM), which adjusts high-order distortion terms to improve matching to other scanners having limited adjustment capabilities like EUV scanners (Figure 2A). He also noted that the multiple wavelength capability in the Multiple Solid-state Light Sources (MSLS) used for the enhanced Nikon FIA alignment system is beneficial for on-product metrology including techniques such as diffraction-based overlay (DBO). Additionally, the high power light source enables dark field alignment to improve contrast and suppress signals from adjacent structures.

Autofocus operation is key to focus uniformity, and Phillips explained how new autofocus optics and dense measurement on the wafer reduce sensitivity to the device layer stack–an increasingly important factor. As frequently noted in the industry now, wafer stress-related distortion can affect focus, meaning that wafer chuck flatness plays a significant role. Phillips commented that the Nikon S630/S631 systems have a specialized low friction coating to maintain low-stress wafer chucking and holder durability over time. Phase shift focus monitor data collected on the same tool, with the same wafer holder demonstrated stable wafer holder flatness after more than four years in production (Figure 2B).

Figure 2A. SDM enables high-order k21 and k20 matching to other scanners having limited adjustment capabilities like EUV scanners (left image). Figure 2B. Nikon wafer holder flatness is stable after more than four years in production.

Phillips also reported initial results from the Nikon Inline Alignment Station (iAS), which is a pre-measurement module that provides feed forward alignment results for all shots on every wafer. iAS allows dense alignment sampling, parallelizing dense alignment metrology without causing chip to chip offsets. Phillips highlighted iAS throughput capabilities, reporting that a 98 point/wafer sample plan was measured at a rate of 253 wafers per hour on the first iAS unit shipped (Figure 3A). Such rich alignment data sets require improved offline software tools that are tightly integrated with tool hardware capabilities and customer manufacturing methods. An example of this is 5DA software, jointly developed by KLA-Tencor and Nikon (Figure 3B). The software uses alignment data, alignment images and signals, and dense overlay data as inputs. It is tightly integrated with scanner functionality, including the dense sampling from the iAS, alignment signal analysis, and algorithms, all in a way that supports customers’ modes of operation.

Figure 3A. A 98 point/wafer sample plan was measured at a rate of 253 wafers per hour on the first iAS unitshipped (left image). Figure 3B. 5D Wafer Alignment Guide takes the user through all steps of wafer alignment optimization.

Edge placement error continues to be a central challenge, and metrology to support the tight EPE budget on product wafers is a key factor in continued scaling. An important part of reducing EPE is on-product focus metrology. Users wish to minimize the use of valuable scribe-line real estate for metrology marks, preferring to utilize features in the product area. Phillips reported progress with such focus metrology using current software that incorporates machine learning instead of rigorous coupled-wave analysis modeling, with standard OCD metrology structures or device features, and allows dense oversampling or in-line metrology.

Phillips emphasized the increase in metrology data density, and warned that the need for data accuracy is driving changes (Figure 4A). He mentioned the heightened complexity of signals including overlay signals with variable wavelengths, polarization and illumination; higher volumes of signals like multiple targets/target designs per layer; and recipe robustness and site-level metrics to quantify process variables. He stressed that vendors are aggressively pursuing site level quality metrics. These changes necessitate tools to analyze rich data sets and determine optimal targets and recipe parameters. Phillips also identified a number of metrology automation requirements in order to enable faster data collection and consumption, in addition to recipe implementation/management (Figure 4B).

Figure 4A. Phillips emphasized the increase in metrology data density, and warned that the need for data accuracy is driving changes (left image). Figure 4B. A number of metrology automation requirements were identified as well.

In closing, Phillips said that 193 immersion tools continue to evolve to support cost-effective patterning and offer enough EPE performance for EUV/193i complementary patterning (Figure 5A). This is helped by the new offline Nikon software suite.

At a complementary presentation at the SPIE Advanced Lithography Conference, Tomonori Dosho, Nikon Corporation Development Section Chief Researcher, provided further details of how Nikon is using sophisticated metrology solutions and rich data sets to enhance on-product performance. For 3D NAND technology, the number of layer stacks is increasing at a rapid rate and wafers are experiencing additional stresses. Greater wafer warpage due to film stress and planarization processes drive problematic grid error as well as alignment mark shape error (Figure 5B). While various predictive analysis methods exist and have been reported elsewhere, the simplest solution is to measure the grid errors after they’ve been induced by process steps. The problem with that has hitherto been the extra time required for such measurements. Dosho-san reported that the Nikon iAS now makes that possible.

Pre-measurement, dense sampling, and high order grid correction of the wafer is performed by the iAS before scanner processing (Figure 6A). After iAS pre-measurement, the scanner simply performs a final sparse sampling and linear grid correction on the wafer stage. This successful combination optimizes on-product overlay using all-shot alignment, without any impact to scanner throughput. The iAS module is integrated in the next-generation Nikon immersion scanner, but can also be retrofit to a number of existing scanner models, with minimal effect on the fab footprint.

Figure 6A. A comparison of traditional processing vs. the new process flow incorporating the iAS (left image). Figure 6B. Several iAS correction methods are available to compensate for various deformation signatures.

Various alignment modes are possible with the iAS such as Standard, Plus Edge Dense (increased edge sites), Scrambled, and Plus Intra-shot (increased sites within-shot). This enables adaptability for a variety of types of wafer grid error. In addition, there are a number of correction modes including Linear, High-order Global, Local Area, and Die-by-Die correction methods (Figure 6B) that compensate for different types of deformation. The inline Alignment Station has demonstrated excellent wafer chucking repeatability, successfully handling flat/process wafers of various shapes and deformity levels with non-linear 3σ consistently ≤ 0.4 nm.

Figure 7. iAS all shot alignment and high order correction improves on-product overlay by more than 60%.

iAS collects and analyzes shot-by-shot data to dramatically improve on-product overlay performance without an impact to scanner productivity. A comparison of 16-point linear correction, vs. 40-point high order correction, compared with all shot iAS alignment and high order compensation, showed that on-product overlay was reduced by more than 60% from x =9.2 nm and y=9.7 nm, down to x and y = 2.6 nm (Figure 7). Data intensive, feed forward lithography solutions such as iAS will enable customers to simultaneously achieve next-generation performance and productivity objectives.