09/21/2017 A study led by UChicago researchers describes an innovative method to make stacks of semiconductors just a few atoms thick. The technique offers scientists and engineers a simple, cost-effective method to make thin, uniform layers of these materials, which could expand capabilities for devices from solar cells to cell phones.

09/19/2017 GLOBALFOUNDRIES and Soitec today announced that they have entered into a five-year agreement to ensure the volume supply of state-of-the-art fully depleted silicon-on-insulator (FD-SOI) wafers.

09/19/2017 Semiconductor Research Corporation (SRC), today announced that Samsung Electronics Company Ltd. (Samsung), one of the world's largest chipmakers, has signed an agreement to join SRC's research consortium. Samsung will participate in two SRC platforms – the New Science Team (NST) project and the Global Research Collaboration (GRC) program.

09/18/2017 GLOBALFOUNDRIES today announced the availability of a new set of enhanced RF SOI process design kits (PDKs) to help designers improve their designs of RF switches and deliver differentiated RF front-end solutions for a wide range of markets including front-end modules for mobile devices, mmWave, 5G and other high-frequency applications.

09/15/2017 Researchers and exhibitors will showcase their work during a comprehensive conference program of technical papers, panels, special sessions, short courses/tutorials, and an exhibition that will spotlight premier work in the fields of microelectronics, semiconductor packaging and circuit design.

09/15/2017 Cadence Design Systems, Inc. today announced that John Wall, corporate vice president of finance and corporate controller of Cadence, has been appointed senior vice president and chief financial officer of Cadence, effective October 1, 2017.

09/14/2017 Despite a slightly down first quarter, the semiconductor industry achieved near record growth in the second quarter of 2017, posting a 6.1 percent growth from the previous quarter, according to IHS Markit.

TWITTER

WEBCASTS

Conventional planar flash memory technology is approaching critical scaling limitations that are driving the transition to 3D solutions. 3D NAND is expected to scale in height, from 16-bit-tall strings to string heights of more than 128 bits. Meanwhile NAND makers will find ways of placing these strings closer to each other through more aggressive lithography.

Success in electronics manufacturing increasingly relies on the materials used in production and packaging. More than 50 different elements from the periodic table are now used in semiconductor manufacturing, and the list grows even longer when you consider the requirements of flexible/printed electronics, LEDs, compound semiconductors, power electronics, displays, MEMS and bioelectronics. In this webcast, experts will focus on changing material requirements, the evolving material supply chain, recent advances in process and packaging materials and substrates, and the role new materials such as carbon nanotubes will play in the future.

MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. We will explore the latest trends in MEMS devices – including sensor fusion, biosensors, energy harvesting – new manufacturing challenges and potential equipment and materials solutions to those challenges.

TECHNOLOGY PAPERS

The power amplifier (PA) – as either a discrete component or part of an integrated front end module (FEM) – is one of the most integral RF integrated circuits (RFICs) in the modern radio. In Part 2 of this white paper series, you will learn different techniques for testing PAs via an interactive white paper with multiple how-to videos.September 06, 2017Sponsored by National Instruments

The power amplifier (PA) – as either a discrete component or part of an integrated front end module (FEM) – is one of the most integral RF integrated circuits (RFICs) in the modern radio. Download this white paper to learn the basics of testing RF PAs and FEMs via an interactive white paper with multiple how-to videos.May 22, 2017Sponsored by National Instruments

Consistent equipment performance, avoiding unscheduled downtime, reducing defects and preventing excursions is key to reducing cost and improving die and line yield in semiconductor manufacturing. The fully automated InnerSense SmartWafer (SMW2) system addresses these key metrics. The SMW2 system is effectively being used as a predictive monitor for handler PM’s, a leading indicator for mechanical defects and can detect, predict and prevent most mechanical related excursions, including wafer damage that can lead to subsequent wafer breakage. The SMW2 system can further improve tool availability by improving post PM recovery and tool matching.January 24, 2017Sponsored by InnerSense