Alexander, TX

Benjamin G. Alexander, Austin, TX US

Patent application number

Description

Published

20110055839

Multi-Core/Thread Work-Group Computation Scheduler - Execution units process commands from one or more command queues. Once a command is available on the queue, each unit participating in the execution of the command atomically decrements the command's work groups remaining counter by the work group reservation size and processes a corresponding number of work groups within a work group range. Once all work groups within a range are processed, an execution unit increments a work group processed counter. The unit that increments the work group processed counter to the value stored in a work groups to be executed counter signals completion of the command. Each execution unit that access a command also marks a work group seen counter. Once the work groups processed counter equals the work groups to be executed counter and the work group seen counter equals the number of execution units, the command may be removed or overwritten on the command queue.

03-03-2011

20110161734

PROCESS INTEGRITY IN A MULTIPLE PROCESSOR SYSTEM - Disclosed are a method, a system and a computer program product of operating a data processing system that can include or be coupled to multiple processor cores. In one or more embodiments, an error can be determined while two or more processor cores are processing a first group of two or more work items, and the error can be signaled to an application. The application can determine a state of progress of processing the two or more work items and at least one dependency from the state of progress. In one or more embodiments, a second group of two or more work items that are scheduled for processing can be unscheduled, in response to determining the error. In one or more embodiments, the application can process at least one work item that caused the error, and the second group of two or more work items can be rescheduled for processing.

06-30-2011

20110161975

REDUCING CROSS QUEUE SYNCHRONIZATION ON SYSTEMS WITH LOW MEMORY LATENCY ACROSS DISTRIBUTED PROCESSING NODES - A method for efficient dispatch/completion of a work element within a multi-node data processing system. The method comprises: selecting specific processing units from among the processing nodes to complete execution of a work element that has multiple individual work items that may be independently executed by different ones of the processing units; generating an allocated processor unit (APU) bit mask that identifies at least one of the processing units that has been selected; placing the work element in a first entry of a global command queue (GCQ); associating the APU mask with the work element in the GCQ; and responsive to receipt at the GCQ of work requests from each of the multiple processing nodes or the processing units, enabling only the selected specific ones of the processing nodes or the processing units to be able to retrieve work from the work element in the GCQ.

06-30-2011

20110161976

METHOD TO REDUCE QUEUE SYNCHRONIZATION OF MULTIPLE WORK ITEMS IN A SYSTEM WITH HIGH MEMORY LATENCY BETWEEN PROCESSING NODES - A method efficiently dispatches/completes a work element within a multi-node, data processing system that has a global command queue (GCQ) and at least one high latency node. The method comprises: at the high latency processor node, work scheduling logic establishing a local command/work queue (LCQ) in which multiple work items for execution by local processing units can be staged prior to execution; a first local processing unit retrieving via a work request a larger chunk size of work than can be completed in a normal work completion/execution cycle by the local processing unit; storing the larger chunk size of work retrieved in a local command/work queue (LCQ); enabling the first local processing unit to locally schedule and complete portions of the work stored within the LCQ; and transmitting a next work request to the GCQ only when all the work within the LCQ has been dispatched by the local processing units.

06-30-2011

20130014124

REDUCING CROSS QUEUE SYNCHRONIZATION ON SYSTEMS WITH LOW MEMORY LATENCY ACROSS DISTRIBUTED PROCESSING NODES - A method for efficient dispatch/completion of a work element within a multi-node data processing system. The method comprises: selecting specific processing units from among the processing nodes to complete execution of a work element that has multiple individual work items that may be independently executed by different ones of the processing units; generating an allocated processor unit (APU) bit mask that identifies at least one of the processing units that has been selected; placing the work element in a first entry of a global command queue (GCQ); associating the APU mask with the work element in the GCQ; and responsive to receipt at the GCQ of work requests from each of the multiple processing nodes or the processing units, enabling only the selected specific ones of the processing nodes or the processing units to be able to retrieve work from the work element in the GCQ.

01-10-2013

20130254776

METHOD TO REDUCE QUEUE SYNCHRONIZATION OF MULTIPLE WORK ITEMS IN A SYSTEM WITH HIGH MEMORY LATENCY BETWEEN PROCESSING NODES - A method efficiently dispatches/completes a work element within a multi-node, data processing system that has a global command queue (GCQ) and at least one high latency node. The method comprises: at the high latency processor node, work scheduling logic establishing a local command/work queue (LCQ) in which multiple work items for execution by local processing units can be staged prior to execution; a first local processing unit retrieving via a work request a larger chunk size of work than can be completed in a normal work completion/execution cycle by the local processing unit; storing the larger chunk size of work retrieved in a local command/work queue (LCQ); enabling the first local processing unit to locally schedule and complete portions of the work stored within the LCQ; and transmitting a next work request to the GCQ only when all the work within the LCQ has been dispatched by the local processing units.

09-26-2013

Clayton Michael Alexander, Victoria, TX US

Patent application number

Description

Published

20140319103

WELDING ASSEMBLY FOR GAS SHIELDED ARC WELDING - A welding assembly includes an adapter, a diffuser, and a nozzle. The adapter includes an inner portion, a discharge portion, and an engagement portion. The discharge portion defines an outer periphery and at least one aperture. The diffuser defines a contact end, a diffusion end and an outer periphery. The contact end is engaged with the discharge portion of the adapter. The nozzle includes a discharge end, an engagement, end and an inner surface. The engagement end defines a groove and engages with the engagement portion of the adapter. The groove and the outer periphery of the diffuser defines at least one discharge passage within the engagement end of the nozzle. The inner portion of the adapter is in fluid communication with the inner surface of the nozzle through the aperture the discharge passage. Shielding gas is directed toward tip portion of the contact tip through the discharge passages.

10-30-2014

Clayton S. Alexander, Arlington, TX US

Patent application number

Description

Published

20090017436

Integrated instructional management system and method - A method for generating a lesson plan for a course is provided that includes associating a plurality of standard objectives with the course. A plurality of learning activities are provided for selection. Each learning activity is associated with at least one standard objective for the course. A selection of at least a subset of the learning activities is received. The lesson plan is generated based on the selected learning activities.

01-15-2009

20110151422

INTEGRATED INSTRUCTIONAL MANAGEMENT SYSTEM AND METHOD - A method for generating a lesson plan for a course is provided that includes associating a plurality of standard objectives with the course. A plurality of learning activities are provided for selection. Each learning activity is associated with at least one standard objective for the course. A selection of at least a subset of the learning activities is received. The lesson plan is generated based on the selected learning activities.

06-23-2011

Patent applications by Clayton S. Alexander, Arlington, TX US

David C. Alexander, Austin, TX US

Patent application number

Description

Published

20090198035

POLYETHER POLYAMINE AGENTS AND MIXTURES THEREOF - Provided herein are polyamine precursors useful in the manufacture of epoxy resins. Use of a polyamine precursor according to the invention provides an epoxy resin formulation having an increased working time over prior art amines used for curing epoxies. Increased working times translate to the ability to manufacture composites which could not be made using conventional epoxy curing agents, such as composite blades for wind-driven turbines. Such polyamines are also useful in polyurea formulations for lengthening reaction time, thus allowing more flow of applied polyurea coatings prior to gellation.

Donnie Wayne Alexander, Princeton, TX US

Patent application number

Description

Published

20100065508

Method and apparatus of submersible intake equipment - An apparatus having flotation ballasts, a flotation platform and on the flotation platform, an intake equipment, such as a screen, check valve and/or pump intake and a coupling for a discharge pipe. In an embodiment of the present invention comprises, there are a plurality of substantially symmetrical flotation ballasts, each having a ballast chamber. The composition of the flotation ballast may be made of a material having a density appropriate for the fluid in which it is to be submerged. The method includes the steps of using an apparatus as herein described to ascend and descend intake equipment.

03-18-2010

20110174703

Method and apparatus of submersible intake equipment - An apparatus having flotation ballasts, a flotation platform and on the flotation platform, an intake equipment, such as a screen, check valve and/or pump intake and a coupling for a discharge pipe. In an embodiment of the present invention comprises, there are a plurality of substantially symmetrical flotation ballasts, each having a ballast chamber. The composition of the flotation ballast may be made of a material having a density appropriate for the fluid in which it is to be submerged. The method includes the steps of using an apparatus as herein described to ascend and descend intake equipment.

07-21-2011

Emily H. Alexander, Alpine, TX US

Patent application number

Description

Published

20110267465

System and Method for Acquiring Images of Medication Preparations - A system for holding a camera for acquiring images of preparations includes a rail that can be mounted above a preparation surface. A camera carrier couples a camera with the rail such that the camera is movable relative to the rail and such that the camera can acquire images of preparations on the preparation surface.

11-03-2011

Gregory W. Alexander, Pflugerville, TX US

Patent application number

Description

Published

20090070561

LINK STACK MISPREDICTION RESOLUTION - Illustrative embodiments provide a method for improved link stack misprediction resolution using a rename structure for tracking the link stack processing, in order to quickly resolve link stack corruption from mispredicted function returns. The method comprises establishing a set of physical data structures forming a common pool and an operation control table. Maintaining, within the common pool, a plurality of entries for a plurality of speculative instructions and a plurality of non-speculative instructions. And determining one speculative instruction to be a bad prediction speculative entry, identifying related entries to form a collection, and discarding the collection.

03-12-2009

20090204798

Simplified Implementation of Branch Target Preloading - A system for using complex branch execution hardware and a hardware based Multiplex (MUX) to multiplex a fetch address of a future branch and a branch fetch address to one index hash value used to index a branch target prediction table for execution by a processor core, to reduce branch mis-prediction by preloading.

08-13-2009

20090210627

METHOD AND SYSTEM FOR HANDLING CACHE COHERENCY FOR SELF-MODIFYING CODE - A method for handling cache coherency includes allocating a tag when a cache line is not exclusive in a data cache for a store operation, and sending the tag and an exclusive fetch for the line to coherency logic. An invalidation request is sent within a minimum amount of time to an I-cache, preferably only if it has fetched to the line and has not been invalidated since, which request includes an address to be invalidated, the tag, and an indicator specifying the line is for a PSC operation. The method further includes comparing the request address against stored addresses of prefetched instructions, and in response to a match, sending a match indicator and the tag to an LSU, within a maximum amount of time. The match indicator is timed, relative to exclusive data return, such that the LSU can discard prefetched instructions following execution of the store operation that stores to a line subject to an exclusive data return, and for which the match is indicated.

08-20-2009

20090210650

METHOD FOR SERIALIZING TRANSLATION LOOKASIDE BUFFER ACCESS AROUND ADDRESS TRANSLATION PARAMETER MODIFICATION - Embodiments of the invention include a method of synchronizing translation changes in a processor including a translation lookaside buffer, the method including setting a control bit to enable blocking of all fetch requests that miss the translation lookaside buffer without changing a translation state of the current process; if there is at least one pending translation, then waiting for completion of the at least one pending translation; and resetting the control bit. A processor and a computer program product are provided.

08-20-2009

20090216952

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR MANAGING CACHE MEMORY - A method for managing cache memory including receiving an instruction fetch for an instruction stream in a cache memory, wherein the instruction fetch includes an instruction fetch reference tag for the instruction stream and the instruction stream is at least partially included within a cache line, comparing the instruction fetch reference tag to a previous instruction fetch reference tag, maintaining a cache replacement status of the cache line if the instruction fetch reference tag is the same as the previous instruction fetch reference tag, and upgrading the cache replacement status of the cache line if the instruction fetch reference tag is different from the previous instruction fetch reference tag, whereby the cache replacement status of the cache line is upgraded if the instruction stream is independently fetched more than once. A corresponding system and computer program product.

08-27-2009

20100064121

DUAL-ISSUANCE OF MICROPROCESSOR INSTRUCTIONS USING DUAL DEPENDENCY MATRICES - A dual-issue instruction is decoded to determine a plurality of LSU dependencies needed by an LSU part of the dual-issue instruction and a plurality of non-LSU dependencies needed by a non-LSU part of the dual-issue instruction. During dispatch of the dual-issue instruction by the microprocessor, the dual dependency matrices are employed as follows: a Load-Store Unit (LSU) dependency matrix is written with the plurality of LSU dependencies and a non-LSU dependency matrix is written with the plurality of non-LSU dependencies; an LSU issue valid (LSU IV) indicator is set as valid to issue; an LSU portion of the dual-issue instruction is issued once the plurality of LSU dependencies of the dual issue instruction are satisfied; a non-LSU issue valid (non-LSU IV) indicator is set as valid to issue; and a non-LSU portion of the dual-issue instruction is issued once the plurality of non-LSU dependencies of the dual issue instruction are satisfied. The LSU dependency matrix and the non-LSU dependency matrix can then be notified that one or more instructions dependent upon the dual-issue instruction may now issue.

03-11-2010

20110153986

PREDICTING AND AVOIDING OPERAND-STORE-COMPARE HAZARDS IN OUT-OF-ORDER MICROPROCESSORS - A method and information processing system manage load and store operations executed out-of-order. At least one of a load instruction and a store instruction is executed. A determination is made that an operand store compare hazard has been encountered. An entry within an operand store compare hazard prediction table is created based on the determination. The entry includes at least an instruction address of the instruction that has been executed and a hazard indicating flag associated with the instruction. The hazard indicating flag indicates that the instruction has encountered the operand store compare hazard. When a load instruction is associated with the hazard indicating flag the load instruction becomes dependent upon all store instructions associated with a substantially similar flag.

06-23-2011

20110154107

TRIGGERING WORKAROUND CAPABILITIES BASED ON EVENTS ACTIVE IN A PROCESSOR PIPELINE - A method, information processing system, and processor work around a processing flaw in a processor. At least one instruction is fetched from a memory location. The at least one instruction is decoded. An opcode compare operation is compared with the at least one instruction and a set of values within at least one opcode compare register in response to the decoding. The instruction is marked with a pattern based on the opcode compare operation. The pattern indicates that the instruction is associated with a processing flaw.

06-23-2011

20110154116

PREDICTING AND AVOIDING OPERAND-STORE-COMPARE HAZARDS IN OUT-OF-ORDER MICROPROCESSORS - A method and information processing system manage load and store operations executed out-of-order. At least one of a load instruction and a store instruction is executed. A determination is made that an operand store compare hazard has been encountered. An entry within an operand store compare hazard prediction table is created based on the determination. The entry includes at least an instruction address of the instruction that has been executed and a hazard indicating flag associated with the instruction. The hazard indicating flag indicates that the instruction has encountered the operand store compare hazard. When a load instruction is associated with the hazard indicating flag the load instruction becomes dependent upon all store instructions associated with a substantially similar flag.

06-23-2011

20110154298

COLLECTING COMPUTER PROCESSOR INSTRUMENTATION DATA - A system and method for collecting instrumentation data in a processor with a pipelined instruction execution stages arranged in an out-of-order execution architecture. One instruction group in a Global Completion Table is marked as a tagged group. Instrumentation data is stored for processing stages processing instructions associated with the tagged group. Sample signal pulses trigger a determination of whether the tagged group is the next-to-complete instruction group. When the sample pulse occurs at a time when the tagged group is the next-to-complete group, the instrumentation data is written as an output. Instrumentation data present during sample pulses that occur when the tagged group is not the next-to-complete group is optionally discarded. Sample pulses are generated at a rate equal to the desired sample rate times the number of groups in the global completion table to better ensure occurrence of a next-to-complete tagged group.

06-23-2011

20110320782

PROGRAM STATUS WORD DEPENDENCY HANDLING IN AN OUT OF ORDER MICROPROCESSOR DESIGN - A computer implemented method of processing instructions of a computer program. The method comprises providing at least two copies of program status data; identifying a first update instruction of the instructions that writes to at least one field of the program status data; and associating the first update instruction with a first copy of the at least two copies of program status data.

12-29-2011

20110320789

Method and Apparatus for High Performance Cache Translation Look-Aside Buffer TLB Lookups Using Multiple Page Size Prediction - A computer processing system method and apparatus having a processor employing an operating system (O/S) multi-task control between multiple user programs and which ensures that the programs do not interfere with each other, said computing processing system having a branch multiple page size prediction mechanism which predicts a page size along with a branch direction and a branch target of a branch for instructions of a processing pipeline, having a branch target buffer (BTB) predicting the branch target, said branch prediction mechanism storing recently used instructions close to the processor in a local cache, and having a translation look-aside buffer TLB mechanism which tracks the translation of the most recent pages and supports multiple page sizes.

12-29-2011

20120265969

ALLOCATION OF COUNTERS FROM A POOL OF COUNTERS TO TRACK MAPPINGS OF LOGICAL REGISTERS TO PHYSICAL REGISTERS FOR MAPPER BASED INSTRUCTION EXECUTIONS - A computer system assigns a particular counter from among a plurality of counters currently in a counter free pool to count a number of mappings of logical registers from among a plurality of logical registers to a particular physical register from among a plurality of physical registers, responsive to an execution of an instruction by a mapper unit mapping at least one logical register from among the plurality of logical registers to the particular physical register, wherein the number of the plurality of counters is less than a number of the plurality of physical registers. The computer system, responsive to the counted number of mappings of logical registers to the particular physical register decremented to less than a minimum value, returns the particular counter to the counter free pool.

10-18-2012

20120265971

ALLOCATION OF COUNTERS FROM A POOL OF COUNTERS TO TRACK MAPPINGS OF LOGICAL REGISTERS TO PHYSICAL REGISTERS FOR MAPPER BASED INSTRUCTION EXECUTIONS - A mapper unit of an out-of-order processor assigns a particular counter currently in a counter free pool to count a number of mappings of logical registers to a particular physical register from among multiple physical registers, responsive to an execution of an instruction by the mapper unit mapping at least one logical register to the particular physical register. The number of counters is less than the number of physical registers. The mapper unit, responsive to the counted number of mappings of logical registers to the particular physical register decremented to less than a minimum value, returns the particular counter to the counter free pool.

10-18-2012

20130318330

PREDICTING AND AVOIDING OPERAND-STORE-COMPARE HAZARDS IN OUT-OF-ORDER MICROPROCESSORS - A method and information processing system manage load and store operations that can be executed out-of-order. At least one of a load instruction and a store instruction is executed. A determination is made that an operand store compare hazard has been encountered. An entry within an operand store compare hazard prediction table is created based on the determination. The entry includes at least an instruction address of the instruction that has been executed and a hazard indicating flag associated with the instruction. The hazard indicating flag indicates that the instruction has encountered the operand store compare hazard. When a load instruction is associated with the hazard indicating flag, the load instruction becomes dependent upon all store instructions associated with a substantially similar hazard indicating flag.

11-28-2013

20130339666

SPECIAL CASE REGISTER UPDATE WITHOUT EXECUTION - A method of changing a value of associated with a logical address in a computing device. The method includes: receiving an instruction at an instruction decoder, the instruction including a target register expressed as a logical value; determining at an instruction decoder that a result of the instruction is to set the target register to a constant value, the target register being in a physical register file associated with an execution unit; and mapping, in a register mapper, the logical address to a location represented by a special register tag.

12-19-2013

20130339667

SPECIAL CASE REGISTER UPDATE WITHOUT EXECUTION - A method of changing a value of associated with a logical address in a computing device. The method includes: receiving an instruction at an instruction decoder, the instruction including a target register expressed as a logical value; determining at an instruction decoder that a result of the instruction is to set the target register to a constant value, the target register being in a physical register file associated with an execution unit; and mapping, in a register mapper, the logical address to a location represented by a special register tag.

12-19-2013

20140059329

ALLOCATION OF COUNTERS FROM A POOL OF COUNTERS TO TRACK MAPPINGS OF LOGICAL REGISTERS TO PHYSICAL REGISTERS FOR MAPPER BASED INSTRUCTION EXECUTIONS - A computer system assigns a particular counter from among a plurality of counters currently in a counter free pool to count a number of mappings of logical registers from among a plurality of logical registers to a particular physical register from among a plurality of physical registers, responsive to an execution of an instruction by a mapper unit mapping at least one logical register from among the plurality of logical registers to the particular physical register, wherein the number of the plurality of counters is less than a number of the plurality of physical registers. The computer system, responsive to the counted number of mappings of logical registers to the particular physical register decremented to less than a minimum value, returns the particular counter to the counter free pool.

02-27-2014

20140281375

RUN-TIME INSTRUMENTATION HANDLING IN A SUPERSCALAR PROCESSOR - A method and a computer program for a processor simultaneously handle multiple instructions at a time. The method includes labeling of an instruction ending a relevant sample interval from a plurality of such instructions. Further, the method utilizes a buffer to store N more number of entries than actually required, wherein, N refers to the number of RI instructions younger than the instruction ending a sample interval. Further, the method also includes the step of recording relevant instrumentation data corresponding to the sample interval and providing the instrumentation data in response to identification of the sample interval.

09-18-2014

Patent applications by Gregory W. Alexander, Pflugerville, TX US

Harold Lee Alexander, Waco, TX US

Patent application number

Description

Published

20090007855

Animal Harness - An improved animal harness including a body strap for extending around the body of an animal behind its front legs, the body strap having a plurality of body strap peripheral openings centered on the body strap. The body strap has a closing means for securing a first end of the body strap to a second end of the body strap. The body strap is secured by a fastening means to a chest strap for extending around the chest of the animal, the chest strap having a plurality of chest strap peripheral openings being spaced apart a sufficient distance on the chest strap to allow adjustability of the animal harness. An upper edge of the chest strap forms an inverted arch beginning at a left chest strap position and terminating at a right chest strap position to accommodate the natural curvature of the animal's chest. In addition, a leash attachment means is attached to the body strap.

01-08-2009

Jason Alexander, Rockwall, TX US

Patent application number

Description

Published

20130297464

System, Method, and Computer-Readable Storage Medium For Identifying A Product - A system, method, and computer-readable storage medium for enabling the accurate identification of a product identified by a multiple product identifiers and offered by one or more merchants by using a product-data-identification mechanism via a computing device. The mechanism may enable accurate product-data identification by receiving a product identifier from a computing device, using the received product identifier to obtain one or more forms of data associated with the product identifier from one or more data sources, thereby enabling the mechanism to evaluate data from multiple sources to identify the most accurate product data associated with the product identifier. Data sources accessed by the mechanism may be scored according to the accuracy of their data, and a data system's score may affect how its data is evaluated by the mechanism.

11-07-2013

Jason L. Alexander, Rockwall, TX US

Patent application number

Description

Published

20130136343

Fraud Detection Using Image Analysis - In one embodiment, a method executed by at least one processor includes receiving an image associated with a user and analyzing, by the at least one processor, the image. The method also includes determining a set of colors of the image based on the analysis of the image and generating a representation of the image based on the determined set of colors. The method further includes comparing the representation of the image to one or more stored representations of a first set of images. The stored representations of the first set of images are based on sets of colors of the first set of images. The first set of images are associated with known users. The method also includes, in response to comparing the representation of the image to the one or more stored representations of the first set of images, determining that the user is a suspected fraudulent user.

05-30-2013

20130138427

Fraud Detection Using Text Analysis - In one embodiment, a method executed by at least one processor includes receiving text from submitted by a user. The method also includes determining a text score for the received text by comparing a first set of phrases included in the received text to a second set of phrases. The second set of phrases includes phrases from stored text. The stored text includes stored text known to be genuine and stored text known to be fraudulent. The method also includes determining that the received text is fraudulent based on the text score.

05-30-2013

Jerry M. Alexander, Allen, TX US

Patent application number

Description

Published

20090194584

ELECTRONIC HANDHELD BANK TRANSACTION REGISTER AND ASSOCIATED METHODOLOGY - An electronic, handheld transaction register device for indicating an account balance of a bank, or other, account that permits two or more parties to make transactions in the account independent of one another. When a transaction is made, a synchronization signal is generated and sent to the electronic, handheld transaction register device. Responsive to detection of the synchronization signal, a local transaction register is adjusted to reconcile the account. A display is generated, providing a user of the device with an up-to-date and accurate indication of the account balance.

08-06-2009

John D. Alexander, Richardson, TX US

Patent application number

Description

Published

20100002687

INTEGRATION OF VOIP ADDRESS DISCOVERY WITH PBXs - A system for verifying VoIP call routing information. The system may include an apparatus integrated with a private branch exchange (PBX). The apparatus may store at least one call attribute of a public switched telephone network (PSTN) call initiated to a destination telephone number. The apparatus may verify a destination Voice-over-Internet-Protocol (VoIP) call agent for the destination telephone number based on demonstrated knowledge of the PSTN call. The apparatus may route a new call either over a VoIP network to the destination VoIP call agent or over a circuit switched network based on whether the destination VoIP call agent is verified for the destination telephone number.

01-07-2010

Josh Alexander, Austin, TX US

Patent application number

Description

Published

20140068723

TWO-FACTOR AUTHENTICATION SYSTEMS AND METHODS - Systems and methods for authenticating defined user actions over a computer network. An authentication service receives an authentication request from an authenticating service to perform an action on behalf of a user. The authentication service then sends a permission request to a mobile device associated with the user, asking the user whether or not the action should be allowed. The user sends a permission response via the mobile device to the authentication service, granting or denying the action. The user may automate future similar responses so long as at least one automation criterion is met (e.g., the physical location of the mobile device), eliminating the need to manually provide a response to future permission requests. Information necessary to determine whether the automation criterion is met is stored locally on the mobile device.

03-06-2014

Julian A. Alexander, Daisetta, TX US

Patent application number

Description

Published

20090008608

Sodium/silicon "treated" water - A sodium, silicon and water composition characterized predominantly a by sodium to silicon ratio of less than 1.0 and an absence of significant metal hydride, the composition useful in a diluted product with approximately 100 parts de-ionized water, the product further useful in approximately 50/50 ratio with an amine in a gas treatment facility and as an additive to fuel, the invention including the process of making the concentrate and the concentrate defined by process as well as a process of making the diluted product and an amine combination.

01-08-2009

Kathleen Alexander, Dallas, TX US

Patent application number

Description

Published

20090271905

PROTECTIVE GLOVE FOR USE WITH HOT GLUE GUN ACTIVITIES - A protective glove, adapted to be worn by a user while using a hot glue gun, including a breathable main body portion, that closely approximates the size and shape of the palm and back portions of a hand; a breathable wrist portion that extends from the main body portion and is adapted to cover at least a portion of a user's wrist and hold comfortably against the wrist of the protective glove wearer, and non-stick, heat-resistant elements that extend along the underside finger tip and thumb areas of the protective glove and can also cover palm and backhand areas of the glove.

11-05-2009

Lael Andrew Alexander, Houston, TX US

Patent application number

Description

Published

20140058859

Point of Sale Multi-Functional Devices - Improvements in a point of sale multi-functional device are disclosed. The device can operate as a stand-along unit or as a tablet companion device. The features include but are not limited to readers of credit cards, bar codes, flatbed scanner. Connections for USB, HDMI, SIM cards, flash memory and earphones or external speakers. A power supply provides power to the device with sufficient capacity to operate as long as required for sales transactions. The unit utilizes an embedded wireless connection with WiFi, 3G, and 4G using cell phone type communication signal or equivalent to allow the device to communicate with the internet to complete the transaction without requiring the device to store any information locally. The tablet compatible device accepts a tablet where the tablet thereby provides the display, computational power, wireless connection to the internet or a network and control of the sales process.

02-27-2014

Lael Andrew Alexander, Sugerland, TX US

Patent application number

Description

Published

20120282914

SMART PHONE COMPANION LOOP - A smart phone companion loop is presented as a phone companion solution that extends the use of a mobile device to the loop tablet or compatible computing device by pairing functionality of both devices. The loop tablet operates as a standalone or parallel device, allowing user to operate applications and functionality from either of the paired devices. The loop tablet allows users to view smart phone applications on a larger screen setting wirelessly. Loop connectivity is the seamless integration of one or more paired mobile devices that communicate wirelessly and share total functionality when tethered or synced with bi-directional control and interface between looped devices with functional commands from both devices. Tablet and Cell phone will be ‘paired’ for security reasons. It may be possible to pair a tablet, car or computing device with multiple or more registered phones that operates under a standard or custom operating system.

11-08-2012

Lee Alexander, Missouri City, TX US

Patent application number

Description

Published

20130161130

LUBRICATOR PUMP ADJUSTER - A lubricator pump adjuster for use with a lubricator pump having a piston housed in a pump body and a rocker connected to the piston. The lubricator pump adjuster comprises a mounting fitting attachable to the pump body and a housing disposed on the mounting fitting. An actuator is disposed in the housing and connectable to the rocker, whereby activation of the actuator causes the rocker to move, thereby adjusting the stroke of the piston. The actuator is a rotary actuator with an output shaft. The lubricator pump adjuster includes a cam faced member attached to the output shaft, and a plunger in contact with the cam faced member that is connectable to the rocker. The cam faced member may include a spiral-ramped surface.

06-27-2013

Lloyd Alvin Alexander, Elm Mott, TX US

Patent application number

Description

Published

20090007855

Animal Harness - An improved animal harness including a body strap for extending around the body of an animal behind its front legs, the body strap having a plurality of body strap peripheral openings centered on the body strap. The body strap has a closing means for securing a first end of the body strap to a second end of the body strap. The body strap is secured by a fastening means to a chest strap for extending around the chest of the animal, the chest strap having a plurality of chest strap peripheral openings being spaced apart a sufficient distance on the chest strap to allow adjustability of the animal harness. An upper edge of the chest strap forms an inverted arch beginning at a left chest strap position and terminating at a right chest strap position to accommodate the natural curvature of the animal's chest. In addition, a leash attachment means is attached to the body strap.

01-08-2009

Marc D. Alexander, Cedar Park, TX US

Patent application number

Description

Published

20110225406

System and Method for Pre-Operating System Encryption and Decryption of Data - Systems and methods for reducing problems and disadvantages associated with traditional approaches to encryption and decryption of data are provided. An information handling system may include a processor, a memory communicatively coupled to the processor, an encryption accelerator communicatively coupled to the processor, and a computer-readable medium communicatively coupled to the processor. The encryption accelerator may be configured to encrypt or decrypt data in response to a command from the processor to perform an encryption or decryption task upon data associated with an input/output operation. The computer-readable medium may have instructions stored thereon, the instructions configured to, when executed by the processor: (i) monitor for input/output operations occurring prior to loading of an operating system into the memory; and (ii) in response to detection of an input/output operation, communicate a command to the encryption accelerator to perform an encryption or decryption task upon data associated with an input/output operation.

COMPOSITIONS AND METHODS FOR IMPROVING THE COMPATIBILITY OF WATER SOLUBLE HERBICIDE SALTS - Methods and compositions for improving the compatibility of aqueous herbicide solutions containing at least one of a water soluble salt of an aryloxyalkanoic acid, a water soluble salt of a pyridyloxyalkanoic acid, and a water soluble salt of glyphosate, and optionally ≦16% of one or more fertilizers, such as ammonium sulfate, by adding certain polymeric crystallization inhibitors are provided.

03-06-2014

20140371069

Short-Chain Alkyl Sulfonates in Pesticide Formulations and Applications - The present invention relates to pesticide formulations containing at least one pesticide active, a hydrotrope comprising a short-chain alkyl sulfonate, and an adjuvant, wherein the weight ratio of the pesticide active to the adjuvant is from about 1:1 to about 1:5. The present invention also relates to herbicide formulations containing at least one herbicidal active comprising glufosinate-ammonium, a hydrotrope comprising sodium octane sulfonate, and an adjuvant comprising a sodium salt of C8 ether sulfate, wherein the weight ratio of the herbicide active to the adjuvant is about 1:1. The present invention also further relates to methods of providing pesticide protection to an agricultural crop by applying the pesticide formulations of the present invention to the crop.

12-18-2014

Patent applications by Mark Alexander, Fort Worth, TX US

Mark Alexander, Forth Worth, TX US

Patent application number

Description

Published

20120040827

DISPERSANTS FOR AGRICULTURAL APPLICATIONS - An agrochemical formulation and its method of manufacture comprising an agrochemical active and a dispersant polymer comprising a copolymer of benzylmethacrylate, acrylic acid and 2-acrylamido-2-methyl propane sulfonic acid.

Mark A. Alexander, Austin, TX US

Patent application number

Description

Published

20090237056

Transient Processing Mechanism for Power Converters - Transient processing mechanisms for power converters. Error generation circuitry in a power converter may generate an error signal based on the difference between a power converter output voltage and a reference voltage. Transient detection circuitry may detect whether the error signal exceeds at least a first threshold. If the first threshold is exceeded, timing control logic may generate a low band correction pulse to adjust the power converter output voltage, and thereby adjust the error signal to a level within the first threshold. If the error signal exceeds a second threshold, the timing control logic may generate a high band correction pulse to adjust the power converter output voltage, and thereby adjust the error signal to a level within the second threshold. The timing control logic may initiate a low band blanking period following the low band correction pulse and high band blanking period following the high band correction pulse.

09-24-2009

20100244802

Power Converter with Transient Processing Capability - Transient processing mechanisms for power converters. Error generation circuitry in a power converter may generate an error signal based on the difference between a power converter output voltage and a reference voltage. Transient detection circuitry may detect whether the error signal exceeds at least a first threshold. If the first threshold is exceeded, timing control logic may generate a low band correction pulse to adjust the power converter output voltage, and thereby adjust the error signal to a level within the first threshold. If the error signal exceeds a second threshold, the timing control logic may generate a high band correction pulse to adjust the power converter output voltage, and thereby adjust the error signal to a level within the second threshold. The timing control logic may initiate a low band blanking period following the low band correction pulse and high band blanking period following the high band correction pulse.

09-30-2010

20130088294

Attenuating Non-Linear Noise in An Amplifier with Alternating DC -offset Correction - An amplifier may include two or more pulse-width modulators controlling respective sets of switches to produce an amplified version of a source signal. A positive DC-offset based on the source signal may be applied to the pulse-width modulator controlling one respective set of switches, and an equal value negative DC-offset may be applied to the pulse-width modulator controlling the other respective set of switches, to provide an effective offset between the respective points in time of the rising/falling edges of the different pulse-width modulated control signals. The addition of alternating positive and negative DC-offset values doesn't affect the output load, and doesn't degrade the signal. The DC-offsets may be added at a frequency selected to be beyond the signal baseband, and the value of the small input signal level may be determined using an RMS level comparator or similar measurement technique.

04-11-2013

20130088296

Attenuating Noise and Cross-Talk in an Audio System by Offsetting Outputs In Phase - An amplifier may include two or more pulse-width modulators (PWMs) controlling respective sets of switches to produce an amplified version of a source signal. The clocking for the amplifier may be controlled to delay signal processing within the PWMs relative to one another in time, thereby providing an effective time offset between the respective edge transitions of the controlling signals provided to the respective sets of switches. The PWMs may count down to zero from the next PWM duty-cycle value when a new data sample is detected, beginning a new count for each new sample, with the PWM outputting a pulse when the counter value is nonzero. A “data-sample-ready” signal may be decoded from a master counter, which may be clocked based on the high speed PWM clock, and the decode value may be adjusted to determine when the PWM should initialize to the next data sample.

04-11-2013

20130088297

PWM Re-Clocking Scheme To Reject Accumulated Asynchronous Jitter - An amplifier may use pulse-width modulators controlling respective sets of switches to produce an amplified version of a source signal. A phase locked loop in the amplifier may generate a differential clock signal. A first processing element operating according to a first supply voltage may generate a PWM signal representative of the source signal, and also generate a clock enable signal corresponding to the differential clock signal. A second processing element (PE2) may receive the differential clock signal, the PWM signal, and the clock enable signal, and level shift the PWM signal and the clock enable signal to operate according to a second supply voltage, and may generate a resampling clock signal from the differential clock signal according to the level shifted clock enable signal. The PE2 may provide a PWM output signal representative of the source signal by resampling the level shifted PWM signal with the resampling clock signal.

04-11-2013

Patent applications by Mark A. Alexander, Austin, TX US

Mark Andrew Alexander, Austin, TX US

Patent application number

Description

Published

20110261875

Multi-Edge Pulse Width Modulator with Non-Stationary Residue Assignment - An improved method for generating pulse width modulated signals, e.g., for use in audio amplifiers, power amplifiers, etc. An input digital value is received and divided by a number N, producing a quotient and a residue. A plurality N of edge modulation values may then be generated based on the quotient and the residue. Each of the N edge modulation values specifies an edge of the pulse width modulated signal to be generated. Generation of the N edge modulation values may comprise applying the residue to one or more of the N edge modulation values when the residue is greater than zero. The residue may be applied to different ones of the plurality N of edge modulation values during different iterations of the method in a non-stationary fashion. The pulse width modulated signal may then be generated based on the N edge modulation values.

10-27-2011

Michael Alexander, Ft. Worth, TX US

Patent application number

Description

Published

20110314536

System and Method for Testing Functionality of a Firewall - Described are computer-based methods and apparatuses, including computer program products, for testing functionality of a firewall. The testing the functionality of the firewall can include a method. The method can include selecting a plurality of valid message types, generating a percentage of valid and invalid messages from the plurality of valid message types, transmitting the plurality of valid and invalid messages to the firewall, receiving an indication of the firewall's handling of valid and invalid messages based on the transmitted message, and determining the functionality of the firewall from the received indication.

12-22-2011

Michael C. Alexander, Austin, TX US

Patent application number

Description

Published

20100287342

PROCESSING OF COHERENT AND INCOHERENT ACCESSES AT A UNIFORM CACHE - Each cacheline of a unified cache storing information is marked as incoherent if the information was acquired incoherently or marked as coherent if the information was acquired coherently. A subsequent incoherent read access to a cacheline can result in a cache hit and a return of the cached information regardless of whether the cacheline is marked as coherent or incoherent. However, a subsequent coherent read access to a cacheline marked as incoherent will be returned as a cache miss regardless of whether the cacheline includes information sought by the coherent read access. In response to a cache miss for a coherent read access, a global snoop is initiated so as to query all other target components within the same coherency domain. In contrast, a cache miss resulting from an incoherent read access is processed using a non-global snoop to a limited set of one or a few target components in the coherency domain.

11-11-2010

Michael G. Alexander, Austin, TX US

Patent application number

Description

Published

20130230248

ENSURING VALIDITY OF THE BOOKMARK REFERENCE IN A COLLABORATIVE BOOKMARKING SYSTEM - A method, system and computer program product for ensuring that the tags accurately describe a resource referenced by a bookmark in a collaborative bookmarking system. A user bookmarking an Internet resource that is referenced by a bookmark is detected. The user provides a description of the bookmark in the form of metadata, which includes tags, to be associated with the bookmark. The Internet resource is analyzed to determine its meaning. A second user bookmarking the same Internet resource that is referenced by the bookmark is detected. The second user provides a description of the bookmark in the form of metadata, which includes tags. The Internet resource is analyzed a second time to determine its meaning If the relatedness of these meanings is beyond a threshold limit, then the original bookmark metadata is invalidated and the invalidated tags are replaced with the tags provided by the second user.

09-05-2013

Rhonda Alexander, Austin, TX US

Patent application number

Description

Published

20140372158

Determining Optimal Decision Trees - The current subject matter relates to generation, modification, export, and/or import of decision trees, based on which optimal treatments (for example, offers) can be assigned to various records (for example, customers). A tree-generating application can receive constraints characterizing specifications for a decision tree desired by the user of the tree-generating application. The tree-generating application can generate a mathematical equation based on the constraints. The tree-generating application can receive, from a first database, historical data characterizing treatments provided to a plurality of representative customers having corresponding attributes. The tree-generating application can execute a simplex method of linear programming to search for the decision tree desired by the user from a plurality of decision trees stored in a second database stored in a second database. The tree-generating application can send the decision tree to a tree-using application. The tree-using application can use the decision tree to determine a treatment for a customer.

12-18-2014

Stephen Douglas Alexander, Houston, TX US

Patent application number

Description

Published

20100011544

DUAL MAGNETIC INTERLOCKING PIN SYSTEM - A dual magnetic interlocking pin system for attaching an item with a free moving magnet for providing a magnetic attraction strong enough to movably hold the free moving magnet adjacent a first outer plate.

01-21-2010

20100263172

METHOD FOR MAGNETICALLY ATTACHING AND DETACHING PORTABLE ITEMS - A method for removably attaching portable items which are usable with each other. The method comprises the steps of removably inserting a first magnetically attractable component into a first portable item, thereby forming a first magnetically attractable item; removably inserting a second magnetically attractable component into a second portable item, thereby forming a second magnetically attractable item; allowing the first magnetically attractable item to magnetically engage the second magnetically attractable item, thereby forming a detachable magnetic assembly, wherein the detachable magnetic assembly can magnetically engage a magnetic surface, enabling the detachable magnetic assembly to be removably secured to the magnetic surface, and enabling one of the first or second portable items to be removed from the detachable magnetic assembly while maintaining the other first or second portable item in engagement with the magnetic surface.

10-21-2010

20110191988

KITS FOR QUICK ATTACHING AND DISCONNECTING AN ITEM - Kits enabling one or more items to be attached or detached using an assembly with a magnet for providing a magnetic attraction strong enough to movably hold the magnet adjacent a first outer plate for a quick connecting and disconnecting of an item.

08-11-2011

Tony Alexander, Daisetta, TX US

Patent application number

Description

Published

20110179696

SYSTEMS AND METHODS FOR PROCESSING GLYCEROL - Systems and methods for processing glycerol into one or more products are provided. In at least one specific embodiment, the method can include decreasing a pH of a mixture comprising glycerol and fatty acids to produce an emulsion comprising a glycerol-rich portion and a fatty acids-rich portion. At least a portion of the glycerol-rich portion can be reacted with an acid comprising phosphorus at conditions sufficient to produce a reacted product comprising glycerophosphoric acid, glycerol, and a portion of the acid.

07-28-2011

20120317875

SYSTEMS AND METHODS FOR PROCESSING GLYCEROL - Systems and methods for processing glycerol into one or more products are provided. In at least one specific embodiment, the method can include decreasing a pH of a mixture comprising glycerol and fatty acids to produce an emulsion comprising a glycerol-rich portion and a fatty acids-rich portion. At least a portion of the glycerol-rich portion can be reacted with an acid comprising phosphorus at conditions sufficient to produce a reacted product comprising glycerophosphoric acid, glycerol, and a portion of the acid.

12-20-2012

20140106993

SYSTEMS AND METHODS FOR PROCESSING GLYCEROL - Systems and methods for processing glycerol into one or more products and uses thereof are provided. In one or more embodiments, a method for treating soil can include applying a partially oxidized reaction product to a soil. The partially oxidized reaction product can be prepared by decreasing a pH of a mixture that includes glycerol and fatty acids to produce a mixture that includes a glycerol-rich portion and a fatty acids-rich portion. The glycerol-rich portion can be reacted with at least one of an oxidant and a catalyst at conditions sufficient to produce the partially oxidized reaction product.

04-17-2014

Patent applications by Tony Alexander, Daisetta, TX US

William Alexander, Spicewood, TX US

Patent application number

Description

Published

20100109976

OPTICAL SIX-DEGREE OF FREEDOM TRACKING APPARATUS AND METHOD - An optical tracking system, and method therefor, tracks the movement of an object, such as a pilot's helmet, within an enclosed area, such as a cockpit. The system/method comprises a plurality of light sources fixedly mounted in predefined locations within the enclosed area and a light sensor mounted on the object. Each light source is modulated using a different frequency from the other light sources to make that light source uniquely identifiable. Modulated light from the various light sources is converted by the sensor into an electrical signal. This composite signal is subsequently separated into individual signals based on their unique modulations, and the light source for each signal is identified. The signals are thereafter processed to determine an azimuth and an elevation for the line-of-sight to each light source. The azimuth and elevation information may then be used to determine the position and orientation of the object.

05-06-2010

William C. Alexander, Spicewood, TX US

Patent application number

Description

Published

20100067272

Universal Power Converter - Methods and systems for transforming electric power between two or more portals. Any or all portals can he DC, single phase AC, or multi-phase AC. Conversion is accomplished by a plurality of bi-directional conducting and blocking semiconductor switches which alternately connect an inductor and parallel capacitor between said portals, such that energy is transferred into the inductor from one or more input portals and/or phases, then the energy is transferred out of the inductor to one or more output portals and/or phases, with said parallel capacitor facilitating “soft” turn-off, and with any excess inductor energy being returned back to the input. Soft turn-on and reverse recovery is also facilitated. Said hi-directional switches allow for two power transfers per inductor/capacitor cycle, thereby maximizing inductor/capacitor utilization as well as providing for optimum converter operation with high input/output voltage ratios. Control means coordinate the switches to accomplish the desired power transfers.

03-18-2010

20110292697

Power Transfer Devices, Methods, and Systems with Crowbar Switch Shunting Energy-Transfer Reactance - The present application discloses methods, circuits and systems for power conversion, using a universal multiport architecture. When a transient appears on the power input (which can be, for example, polyphase AC), the input and output switches are opened, and a crowbar switch shunts the inductance which is used for energy transfer. This prevents this inductance from creating an overvoltage when it is disconnected from outside lines.

12-01-2011

20120008353

Universal Power Converter - Methods and systems for transforming electric power between two or more portals. Any or all portals can be DC, single phase AC, or multi-phase AC. Conversion is accomplished by a plurality of bi-directional conducting and blocking semiconductor switches which alternately connect an inductor and parallel capacitor between said portals, such that energy is transferred into the inductor from one or more input portals and/or phases, then the energy is transferred out of the inductor to one or more output portals and/or phases, with said parallel capacitor facilitating “soft” turn-off, and with any excess inductor energy being returned back to the input. Soft turn-on and reverse recovery is also facilitated. Said bi-directional switches allow for two power transfers per inductor/capacitor cycle, thereby maximizing inductor/capacitor utilization as well as providing for optimum converter operation with high input/output voltage ratios. Control means coordinate the switches to accomplish the desired power transfers.

01-12-2012

20120014151

Power Conversion with Added Pseudo-Phase - Methods and systems for power conversion. An energy storage capacitor is contained within an H-bridge subcircuit which allows the capacitor to be connected to the link inductor of a Universal Power Converter with reversible polarity. This provides a “pseudo-phase” drive capability which expands the capabilities of the converter to compensate for zero-crossings in a single-phase power supply.

01-19-2012

20120020129

Universal Power Converter - Methods and systems for transforming electric power between two or more portals. Any or all portals can be DC, single phase AC, or multi-phase AC. Conversion is accomplished by a plurality of bi-directional conducting and blocking semiconductor switches which alternately connect an inductor and parallel capacitor between said portals, such that energy is transferred into the inductor from one or more input portals and/or phases, then the energy is transferred out of the inductor to one or more output portals and/or phases, with said parallel capacitor facilitating “soft” turn-off, and with any excess inductor energy being returned back to the input. Soft turn-on and reverse recovery is also facilitated. Said bi-directional switches allow for two power transfers per inductor/capacitor cycle, thereby maximizing inductor/capacitor utilization as well as providing for optimum converter operation with high input/output voltage ratios. Control means coordinate the switches to accomplish the desired power transfers.

01-26-2012

20120033464

Universal Power Converter - Methods and systems for transforming electric power between two or more portals. Any or all portals can be DC, single phase AC, or multi-phase AC. Conversion is accomplished by a plurality of bi-directional conducting and blocking semiconductor switches which alternately connect an inductor and parallel capacitor between said portals, such that energy is transferred into the inductor from one or more input portals and/or phases, then the energy is transferred out of the inductor to one or more output portals and/or phases, with said parallel capacitor facilitating “soft” turn-off, and with any excess inductor energy being returned back to the input. Soft turn-on and reverse recovery is also facilitated. Said bi-directional switches allow for two power transfers per inductor/capacitor cycle, thereby maximizing inductor/capacitor utilization as well as providing for optimum converter operation with high input/output voltage ratios. Control means coordinate the switches to accomplish the desired power transfers.

Photovoltaic Array Systems, Methods, and Devices with Bidirectional Converter - Devices, systems and methods for operating, monitoring and diagnosing photovoltaic arrays used for solar energy collection. The system preferably includes capabilities for monitoring or diagnosing an array, under some circumstances, by using a bidirectional power converter not only to convert the DC output of the array to output power under some conditions, but also, for diagnostic operations, applying a back-converted DC voltage to the array.

11-01-2012

20120279567

Solar Energy System with Automatic Dehumidification of Electronics - Methods and systems for photovoltaic power generation. Humidity control for the electronics in the power converter is provided by a dehumidifier which exploits the breathing of the electronics compartment due to the temperature rise caused when insolation increases at the start of a normal day.

11-08-2012

20130038129

Photovoltaic Array Systems, Methods, and Devices with Improved Diagnostics and Monitoring - Devices, systems and methods for operating, monitoring and diagnosing photovoltaic arrays used for solar energy collection. The system preferably includes capabilities for monitoring or diagnosing an array by automatically disconnecting portions of the array during normal service (when load is not maximum, and observing the resulting change in electrical characteristics. More intensive diagnostic procedures can be launched if needed. One embodiment provides for performing monitoring or diagnostic operations on the array in daylight or at night. Another embodiment allows monitoring or diagnostic operations to be performed on a portion of the array while other parts of the array continue to collect energy. Yet another embodiment provides a safety mode for an array for maintenance or during emergencies.

02-14-2013

20130063988

POWER CONVERSION WITH ADDED PSEUDO-PHASE - Methods and systems for power conversion. An energy storage capacitor is contained within an H-bridge subcircuit which allows the capacitor to be connected to the link inductor of a Universal Power Converter with reversible polarity. This provides a “pseudo-phase” drive capability which expands the capabilities of the converter to compensate for zero-crossings in a single-phase power supply.

03-14-2013

20130063994

POWER CONVERSION WITH ADDED PSEUDO-PHASE - Methods and systems for power conversion. An energy storage capacitor is contained within an H-bridge subcircuit which allows the capacitor to be connected to the link inductor of a Universal Power Converter with reversible polarity. This provides a “pseudo-phase” drive capability which expands the capabilities of the converter to compensate for zero-crossings in a single-phase power supply.

03-14-2013

20130069605

Power Transfer Devices, Methods, and Systems with Crowbar Switch Shunting Energy-Transfer Reactance - The present application discloses methods, circuits and systems for power conversion, using a universal multiport architecture. When a transient appears on the power input (which can be, for example, polyphase AC), the input and output switches are opened, and a crowbar switch shunts the inductance which is used for energy transfer. This prevents this inductance from creating an overvoltage when it is disconnected from outside lines.

03-21-2013

20130114303

PHOTOVOLTAIC ARRAY SYSTEMS, METHODS, AND DEVICES WITH BIDIRECTIONAL CONVERTER - Devices, systems and methods for operating, monitoring and diagnosing photovoltaic arrays used for solar energy collection. The system preferably includes capabilities for monitoring or diagnosing an array, under some circumstances, by using a bidirectional power converter not only to convert the DC output of the array to output power under some conditions, but also, for diagnostic operations, applying a back-converted DC voltage to the array.

05-09-2013

20130114311

Power Transfer Devices, Methods, and Systems with Crowbar Switch Shunting Energy-Transfer Reactance - The present application discloses methods, circuits and systems for power conversion, using a universal multiport architecture. When a transient appears on the power input (which can be, for example, polyphase AC), the input and output switches are opened, and a crowbar switch shunts the inductance which is used for energy transfer. This prevents this inductance from creating an overvoltage when it is disconnected from outside lines.

05-09-2013

20130114315

Power Transfer Devices, Methods, and Systems with Crowbar Switch Shunting Energy-Transfer Reactance - The present application discloses methods, circuits and systems for power conversion, using a universal multiport architecture. When a transient appears on the power input (which can be, for example, polyphase AC), the input and output switches are opened, and a crowbar switch shunts the inductance which is used for energy transfer. This prevents this inductance from creating an overvoltage when it is disconnected from outside lines.

05-09-2013

20130114316

Power Transfer Devices, Methods, and Systems with Crowbar Switch Shunting Energy-Transfer Reactance - The present application discloses methods, circuits and systems for power conversion, using a universal multiport architecture. When a transient appears on the power input (which can be, for example, polyphase AC), the input and output switches are opened, and a crowbar switch shunts the inductance which is used for energy transfer. This prevents this inductance from creating an overvoltage when it is disconnected from outside lines.

05-09-2013

20130307336

Photovoltaic Array Systems, Methods, and Devices with Improved Diagnostics and Monitoring - Devices, systems and methods for operating, monitoring and diagnosing photovoltaic arrays used for solar energy collection. The system preferably includes capabilities for monitoring or diagnosing an array by automatically disconnecting portions of the array during normal service (when load is not maximum, and observing the resulting change in electrical characteristics. More intensive diagnostic procedures can be launched if needed. One embodiment provides for performing monitoring or diagnostic operations on the array in daylight or at night. Another embodiment allows monitoring or diagnostic operations to be performed on a portion of the array while other parts of the array continue to collect energy. Yet another embodiment provides a safety mode for an array for maintenance or during emergencies.

11-21-2013

20130314096

Photovoltaic Array Systems, Methods, and Devices with Bidirectional Converter - Devices, systems and methods for operating, monitoring and diagnosing photovoltaic arrays used for solar energy collection. The system preferably includes capabilities for monitoring or diagnosing an array, under some circumstances, by using a bidirectional power converter not only to convert the DC output of the array to output power under some conditions, but also, for diagnostic operations, applying a back-converted DC voltage to the array.

11-28-2013

20140029320

Power Conversion with Added Pseudo-Phase - Methods and systems for power conversion. An energy storage capacitor is contained within an H-bridge subcircuit which allows the capacitor to be connected to the link inductor of a Universal Power Converter with reversible polarity. This provides a “pseudo-phase” drive capability which expands the capabilities of the converter to compensate for zero-crossings in a single-phase power supply.

Universal Power Conversion Methods - Methods and systems for transforming electric power between two or more portals. Any or all portals can be DC, single phase AC, or multi-phase AC. Conversion is accomplished by a plurality of bi-directional conducting and blocking semiconductor switches which alternately connect an inductor and parallel capacitor between said portals, such that energy is transferred into the inductor from one or more input portals and/or phases, then the energy is transferred out of the inductor to one or more output portals and/or phases, with said parallel capacitor facilitating “soft” turn-off, and with any excess inductor energy being returned back to the input. Soft turn-on and reverse recovery is also facilitated. Said bi-directional switches allow for two power transfers per inductor/capacitor cycle, thereby maximizing inductor/capacitor utilization as well as providing for optimum converter operation with high input/output voltage ratios. Control means coordinate the switches to accomplish the desired power transfers.

05-15-2014

20140319911

SYSTEMS AND METHODS FOR UNINTERRUPTIBLE POWER SUPPLIES WITH GENERATORS - Systems and methods where a power-packet-switching converter is used to interface a synchronous AC connection (e.g. to the utility power grid, or to a microgrid) to a DC source (e.g. a battery bank, or possibly a photovoltaic cell bank) and to a non-synchronous AC power source (e.g. a wind turbine or a motor-generator). The power-packet-switching converter not only provides voltage conversion and other functions (e.g. DC to AC, AC-AC with frequency change, 2-phase to 3-phase, power factor correction etc.), but also provides phase correction to convert asynchronous AC to synchronous AC.

10-30-2014

20140368038

SYSTEMS AND METHODS FOR UNINTERRUPTIBLE POWER SUPPLIES WITH BIDIRECTIONAL POWER CONVERTERS - Electrical power systems and methods using bidirectional power converters to provide, among other functions, uninterruptible power supplies for loads such as cell towers. The power-packet-switching power converter can be connected, for example, to a photovoltaic array, batteries, and a critical load such as a cell tower. An AC generator can also be connected in order to power the cell tower and/or to charge the batteries as needed. Green energy utilization is maximized, power conversion efficiency is increased, and system costs are decreased, by having only a single power conversion stage for all conversions.

12-18-2014

Patent applications by William C. Alexander, Spicewood, TX US

William Preston Alexander, Austin, TX US

Patent application number

Description

Published

20080229156

Method and Apparatus for Hardware Awareness of Data Types - A method, apparatus, and computer instructions in a processor for associating a data type with a memory location. The type is associated with a location by means of metadata that is generated and manipulated by hardware instructions that are typically generated by a compiler as it generates the other instructions that comprise the machine code version of a program. A determination is made as to whether a data value about to be stored is of the required data type for that location. The hardware indicates an error condition if the types do not match.