What do you need to know about HDX Ready System on a Chip (SoC)

Last week at Synergy we announced the HDX Ready SoC initiative. We listed a bunch of partners who will be participating in the program. We also showcased two vendors who are building their own HDX Ready SoC reference implementations.

I realize that trying to explain this during the keynote in just a few minutes is hard since we don’t get to dig deep into the technical details. So this is my opportunity to dig deeper and answer some of the questions you may have about this new initiative.

What is HDX Ready SoC initiative?

The whole idea here is to build a new class of high performance, low power, low cost devices that can achieve HDX Ready certification. To do this we have taken the SoC approach based on ARM processors. This is the same approach taken by many other devices like cellphones and tablets.

Inside the chip, there is an ARM processor, 3D accelerator, multimedia encoders/decoders, DMA, USB controller, pretty much everything you need on a computer. Only memory and storage are external to the device.

A device based on one of these reference implementations should have the SoC chip, the memory/flash and the physical connectors for USB, video and audio. This could fit in a wide range of form factors.

What is an HDX Ready SoC reference implementation?

Texas instruments and nComputing are building the chips that other partners can integrate into their devices. This is not exclusive and our HDX Ready SoC initiative is open to other SoC partners. The idea is that someone who wants to build an HDX-ready device does not have to go through all the complexity in designing the device and all the engineering work required to optimize its performance.

Having multiple reference implementations is good for customers. Here is the list of partners that are participating in the HDX Ready SoC program:

How come HDX Ready SoC is low cost? Custom chips are very expensive to develop.

True, custom chips are very expensive to develop. Modern SOCs however are built using a considerable percentage of existing IP (intellectual property) blocks. Parts like the CPU, the memory controller, the USB controller, some of the codecs, are common to many chips.

The SOC architects define a certain area of silicon in order to hit the desired cost point and layout these blocks for maximum efficiency. Additionally the designers introduce extra custom blocks that make the SOC particularly efficient for the desired application. In this case, high quality ICA and HDX rendering fully utilizing the high efficiency and the great user experience of HDX.

The designs from TI and nComputing include all the key blocks required for achieving HDX certification.

HDX on SoC is future proof! (Yeah right)

I sensed a lot of skepticism about the claim of future proof. I understand this since many devices out there aren’t future proof.

In the HDX Ready SoC configuration, we have our version of Receiver for ARM running on a Linux distribution. We will continue to add new versions of Receiver for ARM in the future on top of this platform.

Well, that does not prove future proof quite, I understand. But it is the foundation to be future proof. Having the ability to run Receiver in software gives us tremendous flexibility for the future.

One thing that separates HDX form our competitors is that we are about doing things smarter where our competitors are about doing things through brute force. By doing things more intelligently, it creates a lot of opportunities to innovate in software. The reason we required certain hardware components in the SoC is because certain operations like video decoding can’t be done in CPU. Those areas are well understood. It is also important to note that some of the codecs available in our SOCs are not yet very popular today but will become very popular in the future. When necessary new versions of receiver will turn-on these codec expanding the high definition experience of HDX and making the chips future proof.

Having Receiver in software in the end point means we can add new optimizations in the future. Looking at our HDX roadmap, I can say very confidently, that the HDX Ready SoC devices will have a long shelf life because they can be upgraded over the life of the end point, unlike other solutions.

What’s next?

We are working very hard to release a version of Receiver that will leverage the on board acceleration found on the SoC included in these devices. This is not necessarily a build you can use on any ARM device but we intend to keep it as simple as possible for you, the end user, to stay updated with the latest HDX features. Stay tuned, we should see these new devices become available next year.

3 Comments

Will the SoC implementation supports the HDX 3D Pro codec? Assuming that one day HDX could try to leverage RemoteFX for some operations, will the SoC be able to leverage these improvements (RemoteFX Code??) beyond just using the ARM?

Any info on how many ARM cores will be present in the SoC reference design? 2 or 4?