Super NES Programming/SNES Specs

CPU: Nintendo custom '5A22', believed to be produced by Ricoh; based around a 16-bit CMD/GTE 65c816 (a clone of the Western Design Center 65816). [Edit note: 65c816 was made by Western Design Center by William D. Mensch. CMD/GTE was a licensee] The CPU runs the 65c816-alike core with a variable-speed bus, with bus access times determined by addresses accessed, with a maximum theoretical effective clock rate around 3.58 MHz. The SNES/SFC provided the CPU with 128 KB of Work RAM.

The CPU also contains other support hardware, including:

for interfacing with controller ports;

for generating NMI interrupts on Vertical blanking interval;

for generating IRQ interrupts on screen positions;

Direct memory access unit, supporting two primary modes, general DMA (for block transfers, at a rate of 2.68MB/second) and Horizontal blanking interval DMA (for transferring small data sets at the end of each scanline, outside of the active display period);

Resolution: between 256x224 and 512x448. Most games used 256x224 pixels since higher resolutions caused slowdown, flicker, and/or had increased limitations on layers and colors (due to memory bandwidth constraints); the higher resolutions were used for less processor-intensive games, in-game menus, text, and high resolution images.

Maximum number of sprite pixels on one scanline: 256. The renderer was designed such that it would drop the frontmost sprites instead of the rearmost sprites if a scanline exceeded the limit, allowing for creative clipping effects.