What to Use

What to Do

Create the following diagram to download and run your FPGA VI to an FPGA target.

Customize the gray sections for your unique programming goals.

To specify the FPGA VI you want the host VI to communicate with, complete the following steps:

Select the Open FPGA VI Reference on the diagram.

Select a bitfile in the Properties group on the Configure tab.

When you run this host VI, LabVIEW opens a reference to the FPGA VI associated with the bitfile you selected and runs it on the FPGA you specify in the RIO address input.

Download the FPGA VI specified in the bitfile to the FPGA target and run the VI. The Download FPGA VI and Run FPGA VI nodes replace the code on the FPGA each time you run the FPGA VI, ensuring that the FPGA VI resets properly before each execution.

Interact with and send data to the FPGA by using FPGA Host Interface nodes. In this example, the host and the FPGA VI communicate in the following ways:

Read/Write FPGA Control—The VIs write to and read from controls and indicators on their panels.

DMA FIFO nodes—The VIs write to and read from a DMA FIFO on the FPGA.

Close every reference created with the Open FPGA VI Reference node with the Close FPGA VI node. If you don't close the reference, the FPGA VI runs until the host application stops running.

Troubleshooting

If the Properties group of the Configure tab doesn't contain the bitfile that corresponds to the FPGA VI you want to download and run, verify the following conditions are true about the FPGA VI:

It appears in the Files pane as part of the project.

It is marked as a top-level VI.

It has a build specification you can compile into a bitfile.

Examples

Search LabVIEW for the following installed examples: FPGA Host Interface.