Intel Gets on Its Way to 45 Nanometers

The chip maker has produced a 45-nanometer test chip, a sign that it's on track to roll out its next generation of manufacturing technology in the latter half of 2007.

Intel said it has reached an important milestone on the path to rolling out the next generation of chip manufacturing in 2007.

The chip giant said on Jan. 25 that it has completed a test chip using its forthcoming 45-nanometer process, dubbed P1266, which it expects to roll out in the second half of 2007.

The test chip, completed earlier this month, uses the same circuitry that Intel will put into production when it begins 45-nanometer manufacturing, scheduled for the second half of 2007, Intel representatives said.

Because the chipwhich contains static RAM memory cells and logic circuitsincludes the same circuitry Intel will put into production, its arrival signals the chip maker is keeping pace with its own internal targetsIntel historically rolls out a new manufacturing process every two yearsas well as Moore's Law.

The prediction by Intel founder Gordon Moore, says the number of transistors inside chips double about every two years, thus raising performance.

"We're pretty excited we've made such a large, dense structure with such a tiny SRAM cell and it's working early in the programprobably earlier than what we've done on earlier technology," said Mark Bohr, director of process architecture and integration at Intel in Hillsboro, Ore.

"So it's a very encouraging start to our 45-nanometer program. It makes me confident that we are on track for second half '07 [processor] shipments."

Intel and other chip makers generally us SRAM chips to test out new manufacturing processes. The company has added logic circuits to its SRAM process technology test chips before. But it did not disclose doing so until now.

Intel typically creates its test chip about year-and-a-half before it aims to begin full manufacturing on a given process.

"So far we're on track for doing the same thing on the 45-nanometer node," Bohr said. "This combination is showing not only a fully functional SRAM test chip, but also the logic [inside it] really demonstrates how far ahead we are of our competitors," Bohr said.

"Many of them are still trying to achieve this on their 65-nanometer technology."

Swapping manufacturing processes has become more difficult as the feature sizes inside each chip get smaller with each generation, chip makers said.

However, the move generally yields gains in performance, power consumption and reductions in chip size, meaning chip makers can crank out more processors per wafer than before.

The size reduction also cuts chip manufacturing costs, however, which can offset the billions of dollars it takes to develop new processes and construct or re-outfit manufacturing plants.

The 45-nanometer transition could also offer Intel, which has been battered by rival AMD in recent months, the ability to use its manufacturing might to fight back in the long term.

Intel's new process technology promises to increase the performance or cut the power consumption of its chips. The 45-nanometer process will yield a 2x improvement in transistor density, meaning Intel could pack double the amount of transistors into its chips or possibly make them smaller.

Those transistors, which are the building blocks of a processor, will also speed up by 20 percent and use 30 percent less energy while switching on and off at the 45-nanometer level, versus those used in its current 65-nanometer process.

The forthcoming process also offers a five-fold reduction in leakage power, or electricity wasted while transistors are idle, versus Intel's current state-of-the-art 65-nanometer process, Bohr said.

Thus Intel can bump up its chips' performance or reduce power consumption, both of which the company is aiming to do under its performance per watt mantra.

"The smaller [45-nanometer] transistors use less power as they switch on and off. That offers lower active power if we keep the same number of transistors or we can add more transistors to a chip, bumping performance or adding features within the same [power] budget," Bohr said.

"The name of the game going forward is to provide as much performance within a given power budgetwhether it's desktop, notebook or handheldas possible. With smaller, faster, lower power transistors there are a lot of interesting things you can do across the board."

Indeed, the new process technology would also help facilitate the addition of more processor core on each chip. At the moment, Intel is shipping dual-core or two-processor-in-one chips. However, it aims to offer multi-core chips starting in 2007 with a quad-core server chip dubbed Tigerton.

But despite the planned arrival of the 45-nanometer manufacturing process, targeted for mainstream processors in desktop, notebook and server categories, Intel is continuing with the development of a low-power 65-nanometer process, dubbed P1265.

Intel, which has shipped a million 65-nanometer chips since beginning 65-nanometer production last year, is typically first among chip makers to a new manufacturing generation.

The company has two 65-nanometer chip factories in operation, now, and plans to add two more by the end of the year.

Its rival AMD, meanwhile, began pilot production of 65-nanometer chips late last year at its Fab 36 manufacturing plant. It has said it's aiming to begin volume production of 65-nanometer chips in the second half of this year.

AMD has been working with IBM on 45-nanometer and below manufacturing processes as well.

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John G. Spooner, a senior writer for eWeek, chronicles the PC industry, in addition to covering semiconductors and, on occasion, automotive technology. Prior to joining eWeek in 2005, Mr. Spooner spent more than four years as a staff writer for CNET News.com, where he covered computer hardware. He has also worked as a staff writer for ZDNET News.

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