Summary

Posted: Apr 6, 2020

Role Number:200164042

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In this role, you will be responsible for all aspects of timing including working with the implementation and RTL teams on timing changes, helping with construction/modify timing flows, timing analysis, and timing closure.

Key Qualifications

The ideal candidate will have 5+ years of Implementation experience on high performance CPU designs including at least one project that includes ownership of timing analysis.

Working knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUs.

Deep knowledge in static timing tools and flows including how to handle multiple clock and power domains and other complex scenarios.

Prior experience owning the timing flow on a major CPU or similar project.

Good understanding of Physical Design tools and methodology including but not limited to:

physically aware synthesis and place & route tools and flows

extraction, STA, and other analysis flows

physical design verification (LEC, DVS, etc.)

Description

As the CPU Design Timing Engineer, you will be responsible for the timing closure of the project.
RESPONSIBILITIES INCLUDE BUT ARE NOT LIMITED TO
- Working with the CAD team to develop the timing flow that will be used on the project including scripting to improve analysis flows and engineer efficiency.
- Work extensively with CPU micro-architects and Implementation engineers to drive timing closure for the CPU.

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