Device Utilization and Performance

Getting Started

Free-of-charge demo and eval kits are available for download at http://www.tes-dst.com/support/index.php/support-home/download-eval-kits/guiliani (registration required).
The Guiliani SDK and complete documentation can be found at www. guiliani.de/en.

IP Quality Metrics

Basic

Year IP was first released

2012

Latest version of Quartus supported

13.1

Altera Customer Use

IP has been successfully implemented in production with at least one customer

Y

Deliverables

Customer deliverables include the following:

Design file (encrypted source code or post-synthesis netlist)

Simulation model for ModelSim Altera edition

Timing and/or layout constraints

Testbench or design example

Documentation with revision control

Readme file

Y

Any additional customer deliverables provided with IP

Guiliani SDK and PC Editor, example HMI project including source code

Parameterization GUI allowing end user to configure IP

Y

IP core is enabled for OpenCore Plus Support

Y

Source language

VHDL

Testbench language

VHDL

Software drivers provided

Y

Driver OS support

bare metal, Linux

Implementation

User Interface

AXI; Avalon-MM

IP-XACT Metadata included

N

Verification

Simulators supported

Modeltech ModelSim, Cadence NCSim

Hardware validated

Y. Altera Board Name NEEK, VEEK-MT, VEEK-MT C5 SoC

Industry standard compliance testing performed

Y

If yes, which test(s)?

Spyglass, Cadence HAL

If yes, on which Altera device(s)?

CIII, CIV, CV

If Yes, date performed

10/01/2012

Interoperability

IP has undergone interoperability testing

Y

Interoperability reports available

N

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