EECS 578: Computer-Aided Design Verification of Digital Systems

Overview: In this course we explore how large complex digital systems are verified to ascertain their functional and temporal correctness. Students who enroll can expect to gain proficiency in state-of-the-art informal as well as formal approaches to verification of large-scale systems. Many of these techniques, and the insights that inspired them, can also be adapted to the verification of other large-scale systems, e.g. complex software. Hands-on experience with a variety of verification tools (equivalence checkers, model checkers, SAT solvers, symbolic simulators, etc.) is an integral part of the course.