High-capacity 3D transparent memory a step closer to reality

October 4, 2012

Rice University researchers led by chemist James Tour have just written a paper in the journal Nature Communications that describes transparent, non-volatile, heat- and radiation-resistant memory chips created in Tour’s lab from silicon oxide sandwiched between electrodes of graphene, the single-atom-thick form of carbon.

More than four years ago, they discovered it was possible to make bits of computer memory from silicon and carbon, but make them much smaller and perhaps better than anything on the market today.

They have now been able to put those test chips onto flexible pieces of plastic, leading to paper-thin, see-through memories they hope can be manufactured with extraordinarily large capacities at a reasonable price.

Imagine heads-up windshields or displays with embedded electronics, or even flexible, transparent cellphones.

“The interest is starting to climb,” said Tour, Rice’s Rice’s T.T. and W.F. Chao Chair in Chemistry, a professor of mechanical engineering and materials science and of computer science. “We’re working with several companies that are interested either in getting their chips to do this kind of switching or in the possibility of making radiation-hard devices out of this.”

In fact, samples of the chips have been sent to the International Space Station (ISS), where memories created and programmed at Rice are being evaluated for their ability to withstand radiation in a harsh environment.

“Now, we’ve seen a couple of DARPA announcements asking for proposals for devices based on silicon oxide, the very thing we’ve shown. So there are other people seeing the feasibility of this approach,” Tour said.

Manufacturers who have been able to fit millions of such switches on small devices such as flash memory now find themselves bumping against the physical limits of their current architectures, which require three wires — or terminals — to control and read each bit.

Arrays of high-capacity, transparent 3D memory

But the Rice unit, requiring only two terminals, made it far less complicated. It meant arrays of two-terminal memory could be stacked in three-dimensional configurations that would vastly increase the amount of information a chip could hold.

And best of all, the mechanism that made it possible turned out not to be in the graphite, but the silicon oxide.

In the breakthrough 2010 paper that followed the 2008 discovery, the researchers led by then-graduate student Jun Yao found that a strong jolt of voltage through a piece of silicon oxide stripped oxygen atoms from a channel only 5 nanometers wide, turning it into pure silicon. Lower voltages would break the channel or reconnect it, repeatedly, thousands of times.

Yao’s revelation became the basis for the next-generation memories now being designed in Tour’s lab, where silicon oxides sandwiched between graphene layers are being attached to plastic sheets. There’s not a speck of metal in the entire unit (with the exception of leads attached to the graphene electrodes). And the eye can see right through it.

“Now we’re making these memories with about an 80 percent yield of working devices, which is pretty good for a non-industrial lab,” Tour said. “When you get these ideas into industries’ hands, they really sharpen it up.”

The idea of transparency came later. “Silicon oxide is basically the same material as glass, so it should be transparent,” Tour said. Graphene sheets, single-atom-thick carbon honeycombs, are almost completely transparent, too, and tests detailed in the new paper showed their ability to function as crossbar electrodes, a checkerboard array half above and half below the silicon oxide that creates a circuit where the lines intersect.

The research was supported by the David and Lucille Packard Foundation, the Texas Instruments Leadership University Fund, the National Science Foundation, and the Army Research Office.