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An Intelligent Synchronization Module (ISM) for an Uninterruptible Power
Supply (UPS) system for servicing a load is disclosed. The UPS system has
at least one of a first UPS group and a second separate and independent
UPS group, each of the first and second UPS groups having a master UPS.
The ISM has a processing circuit and a storage medium, readable by the
processing circuit, storing instructions for execution by the processing
circuit for: assigning the first UPS group the role of master group and
the second UPS group the role of slave group; and, passing phase
information relating to the master group to the slave group, thereby
enabling the master UPS of the slave group to effect synchronization with
the master group.

Inventors:

Colombi; Silvio; (Losone, CH); Borgeaud; Nicolas; (Breganzona, CH)

Correspondence Address:

CANTOR COLBURN, LLP
55 GRIFFIN ROAD SOUTH
BLOOMFIELD
CT
06002
US

Serial No.:

285587

Series Code:

11

Filed:

November 22, 2005

Current U.S. Class:

700/22

Class at Publication:

700/022

International Class:

G05B 11/01 20060101 G05B011/01

Claims

1. An Intelligent Synchronization Module (ISM) for an Uninterruptible
Power Supply (UPS) system for servicing a load, wherein the UPS system
has at least one of a first UPS group and a second separate and
independent UPS group, each of the first and second UPS groups having a
master UPS, the ISM comprising: a processing circuit; and a storage
medium, readable by the processing circuit, storing instructions for
execution by the processing circuit for: assigning the first UPS group
the role of master group and the second UPS group the role of slave
group; and passing phase information relating to the master group to the
slave group, thereby enabling the master UPS of the slave group to effect
synchronization with the master group.

2. The ISM of claim 1, wherein the first and second UPS groups are
connected to an Intelligent Static transfer Switch (ISS), the ISS
deciding where to switch the load, and wherein the storage medium further
stores instructions for execution by the processing circuit for:
synchronizing permanently the outputs of the first and second UPS groups,
thereby providing an intelligent static transfer switch function (F1).

3. The ISM of claim 1, wherein the UPS system has a Redundant Parallel
Architecture (RPA) with one of the UPS groups and a Centralized Static
Switch Module (CSSM), and wherein the storage medium further stores
instructions for execution by the processing circuit for: commanding the
CSSM of the UPS group, thereby providing a centralized bypass function
(F2).

4. The ISM of claim 1, wherein the UPS system has a first UPS group and a
second separate and independent UPS group, wherein the first and second
UPS groups are connected by a circuit breaker, and wherein the storage
medium further stores instructions for execution by the processing
circuit for: synchronizing temporarily the outputs of the first and
second UPS groups, thereby providing a load bus synchronization function
(F3).

5. The ISM of claim 1, wherein the UPS system has a first UPS group and a
second separate and independent UPS group, wherein the first and second
UPS groups are connected by a circuit breaker, and wherein the storage
medium further stores instructions for execution by the processing
circuit for: synchronizing permanently and load sharing the outputs of
the two separate and independent UPS groups, thereby providing a power
tie function (F4).

6. The ISM of claim 1, wherein the UPS system has a plurality of
paralleled UPS groups, and wherein the storage medium further stores
instructions for execution by the processing circuit for: controlling the
connection of each UPS within each UPS group relative to the load,
allowing an extension of the maximal distance between the first and the
last UPS in the UPS system, thereby providing a bus repeater function
(F5).7.

7. The ISM of claim 1, wherein: in response to phase information relating
to each UPS of each UPS group, a first signal representative of the
actual phase of the master group, and a second signal representative of a
synchronization command, are provided to the slave group.

8. An Uninterruptible Power Supply (UPS) system for servicing a load,
comprising: a first UPS group and a second UPS group separate from and
independent to the first UPS group, each of the first and second UPS
groups being configured to service the load; and an Intelligent
Synchronization Module (ISM) in signal communication between the two UPS
groups, the ISM being configured to assign the first UPS group the role
of master group and the second UPS group the role of slave group, and to
pass phase information relating to the master group to the slave group,
thereby enabling the slave group to effect synchronization with the
master group.

9. The UPS system of claim 8, wherein: each of the master and slave groups
have a master UPS; the ISM is configured to pass phase information
relating to the master group to the slave group, thereby enabling the
master UPS of the slave group to effect synchronization with the master
group.

10. The UPS system of claim 8, further comprising: an Intelligent Static
transfer Switch (ISS) disposed to electrically connect the first and/or
the second UPS group to the load, the ISS being configured to decide to
which UPS group to switch the load.

11. The UPS system of claim 9, wherein: the master UPS of the slave group
is configured to implement first and second synchronization algorithms to
synchronize the slave group with the master group.

12. The UPS system of claim 11, wherein: at power up and prior to
synchronizing the slave group to the master group, the master UPS of the
slave group is configured to synchronize the slave group to its own
mains.

13. The UPS system of claim 11, wherein: in response to the first
synchronization algorithm, the frequency and phase of the slave group are
shifted towards the reference of the master group until the frequency and
phase differences are each below defined thresholds.

14. The UPS system of claim 13, wherein: in response to the second
synchronization algorithm, the frequency and phase of the slave group are
further shifted to be in phase with the master group, thereby resulting
in the slave group being synchronized with the master group.

15. The UPS system of claim 14, wherein: the ISM is configured to
synchronize permanently the outputs of the master and slave groups,
thereby providing a synchronized intelligent static transfer switch
function (F1).

16. The UPS system of claim 11, wherein: the first synchronization
algorithm is configured to facilitate a slower synchronization of the
slave group to the master group compared to the second synchronization
algorithm.

17. The UPS of claim 11, wherein: the first synchronization algorithm
comprises a fast frequency observer block in logic communication with a
phase and frequency error computation block, which is in logic
communication with a slow phase control block, which is in logic
communication with an oscillator; and the first synchronization algorithm
input comprises the phase angle to synchronize to, and the output of the
same comprises angular frequency and phase angle parameters of an
oscillator.

18. The UPS of claim 11, wherein: the second synchronization algorithm
comprises a phase and frequency error computation block in logic
communication with fast phase control block, which is in logic
communication with an oscillator; and the first synchronization algorithm
input comprises the phase angle to synchronize to, and the output of the
same comprises angular frequency and phase angle parameters of an
oscillator.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Application
Serial No. 60/647,661, filed Jan. 27, 2005, which is incorporated herein
by reference in its entirety.

BACKGROUND OF THE INVENTION

[0002] The present disclosure relates generally to uninterruptible power
supplies (UPSs), and particularly to synchronization control systems for
control thereof.

[0003] UPSs are employed in a variety of applications where a constant
source of power is desired at a load. A typical UPS system involves an
inverter feed path, also generally referred to as the inverter, that is
operably connectable in parallel with a bypass feed path, also generally
referred to as the mains. The mains may be connected to a utility, but
may also receive power from some other supply not connected to a utility
electrical grid. The inverter may receive power from the same source as
the mains, but may also receive power from some other supply.

[0004] There are several types of UPSs depending on their operation mode.
Double conversion UPSs offer the maximal protection level as the load is
always fed by the inverter. On the other hand, with line-interactive
UPSs, the load is fed by the mains and the inverter is used to correct
the shape of the load voltage.

[0005] There are also several possible UPS configurations to supply a
critical load, such as Redundant Parallel Architecture (RPA), Dual
Independent Configuration, Load Bus Synchronization, and Power Tie, for
example. With the RPA concept, (N+M) UPSs are paralleled to supply a load
that can be fed by N UPSs only. This way, a redundancy of M units is
achieved. More and more, and for high availability, Dual Independent
Configurations are requested by customers. This requires the
synchronization of two independent UPS groups and the use of an
Intelligent Static Switch (ISS) that automatically switches the critical
load from one source to the other. Another concept is Load Bus
Synchronization where two independent UPS groups can be temporarily
synchronized in order to move the critical load from one side to the
other for maintenance purposes. An extension of the Load Bus
Synchronization concept is the Power Tie concept, where the two
independent UPS groups are permanently synchronized and their load shared
as if they were a unique UPS group in a RPA configuration. Finally, and
with consideration to the bypass configuration, it is desirable to be
able to choose between two different options, a centralized bypass or
decentralized bypass.

[0006] Accordingly, there is a need in the art for a control system and
apparatus that allows multiple configurations of UPSs in critical power
management systems.

BRIEF DESCRIPTION OF THE INVENTION

[0007] An embodiment of the invention includes an Intelligent
Synchronization Module (ISM) for an Uninterruptible Power Supply (UPS)
system for servicing a load, wherein the UPS system has at least one of a
first UPS group and a second separate and independent UPS group, each of
the first and second UPS groups having a master UPS. The ISM has a
processing circuit and a storage medium, readable by the processing
circuit, storing instructions for execution by the processing circuit
for: assigning the first UPS group the role of master group and the
second UPS group the role of slave group; and, passing phase information
relating to the master group to the slave group, thereby enabling the
master UPS of the slave group to effect synchronization with the master
group.

[0008] Another embodiment of the invention includes an Uninterruptible
Power Supply (UPS) system for servicing a load. The UPS system includes a
first UPS group and a second UPS group separate from and independent to
the first UPS group, each of the first and second UPS groups being
configured to service the load, and an Intelligent Synchronization Module
(ISM) in signal communication between the two UPS groups. The ISM is
configured to assign the first UPS group the role of master group and the
second UPS group the role of slave group, and to pass phase information
relating to the master group to the slave group, thereby enabling the
slave group to effect synchronization with the master group.

BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Referring to the exemplary drawings wherein like elements are
numbered alike in the accompanying Figures:

[0010] FIG. 1 depicts an exemplary block diagram of a double conversion
UPS system for use in accordance with an embodiment of the invention;

[0014] FIGS. 5-10 depict alternative exemplary configurations for
employing the ISM of FIG. 4 in accordance with an embodiment of the
invention; and

[0015] FIGS. 11-13 depict exemplary control algorithms for use in
accordance with embodiments of the invention.

DETAILED DESCRIPTION OF THE INVENTION

[0016] An embodiment of the invention provides an Intelligent
Synchronization Module (ISM) for allowing multiple configurations of an
Uninterruptible Power Supply (UPS) system that services at least one
load. In an embodiment, the UPS system has a first UPS group and a second
separate and independent UPS group, with each of the first and second UPS
groups having a master UPS. A function of the ISM is to assign the first
UPS group the role of master group and the second UPS group the role of
slave group, and to pass phase information relating to the master group
to the slave group, thereby enabling the master UPS of the slave group to
effect synchronization with the master group. In a more general sense,
the ISM is a control system that exchanges information, performs
synchronizations, and executes control algorithms and commands.

[0017] FIG. 1 shows an exemplary block diagram of a typical double
conversion UPS system 100. The UPS system 100 consists of two converter
blocks, a rectifier 130 and an inverter 140, and energy storage device
135 such as a battery for example. During normal operation, the rectifier
130 converts the mains input supply 112 to regulated DC to charge the
energy storage-battery bank 135 as well as supply power to the inverter
140. The inverter 140 converts the DC to a voltage and frequency
regulated AC output at all times. During a stored energy mode, that is,
during a condition where the mains input supply 112 is not available, the
inverter 140 draws power from the energy storage device 135, thereby
enabling continued supply the output or load 105. Bypass operation is
possible through a Static Switch Module (SSM) 120.

[0018] FIG. 2 expands on the schematic of FIG. 1 to show further detail of
the exemplary UPS system 100 that services the load 105. Here, the UPS
100 includes a bypass feed path 110 and an inverter feed path 115 that
are operable in parallel with each other during the transfer of power
from one path to the other. The power source 112 for the bypass feed path
110 may be a utility or other main power source, as discussed previously.
The power source 117 for the inverter feed path 115 may be the same as
that of the bypass feed path 110 (as illustrated in FIG. 1 for example),
or it may be a different power source (as illustrated in FIG. 2 for
example). The bypass feed path 110 is engagable with the load 105 via the
SSM 120, also herein referred to as a first switch 120, to deliver a
bypass current to the load 105, and the inverter feed path 115 is
engagable with the load 105 via a second switch 125 to deliver an
inverter current to the load 105. In an embodiment, the first switch 120
is a remote controllable SSM of a type known to one skilled in the art,
and the second switch 125 is a remote controllable contactor of a type
known to one skilled in the art. The inverter feed path 115 includes the
rectifier 130, the battery 135, and the inverter 140, and may also
include an output isolation transformer 145, and filtering capacitors
150. Disconnect switches (K4) 155, (K6) 160, (Q1) 165 and (Q2) 170 may be
employed for additional protection and/or control and/or maintenance. In
an embodiment, switches (K4) 155 and (K6) 160 are circuit breakers, and
switches (Q1) 165 and (Q2) 170 are manual disconnects. The leakage
inductance of isolation transformer 145 and the output capacitors 150 are
used together to filter the inverter output voltage (Uo) 200.

[0019] While FIG. 1 depicts a UPS 100 in one-line diagram form, it will be
appreciated that UPS 100 may have multiple phases, such as three phases
for example, and that any reference herein to a current or a voltage in
one phase is intended to be a reference to the current and voltage of
each phase.

[0020] In an embodiment, a control system 175, illustrated generally in
FIG. 1 and more specifically in FIG. 2, includes a processing circuit 180
and a storage medium 185, readable by the processing circuit 180, storing
instructions for execution by the processing circuit for controlling the
UPS 100 in a manner to be described in more detail below.

[0021] In an embodiment, input signals to control system 175 include
inverter bridge currents (Ib) 190, inverter load currents (IL) 195,
inverter output voltages (Uo) 200, load voltages (UL) 205, bypass load
currents (Ibyp) 210, and bypass input voltages (Ubyp) 215, that are
generated by any sensor suitable for the intended purpose. Another input
signal to control system 175 may be (aux) 220 that is provided by an
auxiliary contact (not specifically shown but represented also by
reference numeral 220) at second switch (K7) 125 and identifies the
on/off state of the main contacts of second switch 125. Further input
signals to control system 175 include a S.sub.sync signal and a
.phi..sub.other signal, which will be discussed in more detail below.

[0022] While reference is made to bypass feed path 110 and inverter feed
path 115, it will be appreciated by those skilled in the art that the
inverter load currents IL 195 are not the same as those currents flowing
through contactor K4 155.

[0023] In an embodiment, output signals from control system 175 include a
command signal (S1) 225 to first switch 120, a command signal (S2) 230 to
second switch 125, a command signal (S3) 235 to inverter 140, and a
command signal (S4) 237 to rectifier 130.

[0024] In one embodiment, output signals 225, 230, 235 and 237 may
originate from control system 175. However, in another embodiment, the
same output signals or any combination thereof may be analog, may
originate from another source (not shown), and may be monitored and used
by control system 175.

[0030] In accordance with an embodiment of the invention, the output
signals from control system 175 serve to synchronize a slave UPS group
with a master UPS group, which will be discussed in more detail below.

[0031] While FIG. 1 depicts certain switches (Q1, Q2, K4, K6, K7, SSM)
open and others closed, it will be appreciated that control system 175
may send appropriate control signals to change the state of these
switches. As such, it will be appreciated that the state of the switches
may differ from the state actually depicted in FIG. 1, but will be
discussed in context with reference to FIG. 1.

[0032] During inverter feed path 115 operation, the rectifier 130 converts
the input power supply 117 to regulated DC to charge the battery 135 as
well as supply power to the inverter 140. The inverter 140 converts the
DC to a voltage & frequency regulated AC output at all times. During
"stored energy" mode, that is, during an absence of power from power
supplies 112 and 117 (also referred to as mains failure), the inverter
140 draws power from the battery 135 and continues to supply output
power. Bypass operation that switches in the bypass feed path 110 is
possible through the first switch 120, which may be a Static Switch
Module (SSM) for example.

[0034] With an RPA (Redundant Parallel Architecture) concept, (N+M) UPSs
are paralleled to supply a load that can be fed by N UPSs only. This way,
a redundancy of M units is achieved. To realize the RPA configuration, a
communication between the UPSs is required to synchronize the output of
each inverter and to share the load among the inverters.

[0035] To realize a full digital control for single and parallel UPSs,
embodiments of the invention employ dedicated control algorithms and the
necessary hardware. In particular, a DSP (digital signal processor) based
mother board and a small board for the digital communication between the
units is employed. In an embodiment, this communication is made very
reliable by doubling the communication channels (redundancy) and by using
CRC (cyclic redundancy check) error controls.

[0036] This powerful and flexible control board scheme is used on various
kinds of LTPSs and power quality systems, such as single and parallel
units, with or without an output isolation transformer, with or without
an input active filter, and with or without a stand alone active filter,
for example. This adaptability is obtained through software
configurations.

[0037] To allow multiple configurations of uninterruptible power supply in
critical power management systems, embodiments of the invention employ an
Intelligent Synchronization Module (ISM) that ties one or two groups of
UPSs to realize one or more of the following five different functions:

F1) Intelligent Static Transfer Switch

[0038] Synchronize permanently the outputs of two separate and independent
UPS groups, where an Intelligent Static Switch (ISS) decides where to
switch the load;

F2) Centralized Bypass

[0039] Command the centralized bypass of a group of UPSs in a RPA
configuration;

F3) Load Bus Synchronization

[0040] Synchronize temporarily the outputs of two separate and independent
UPS groups;

F4) Power Tie

[0041] Synchronize permanently and load share the outputs of two separate
and independent UPS groups; and

F5) Bus Repeater

[0042] Allow an extension of the maximal distance between the first and
the last UPS.

[0043] With reference now to FIG. 3, the principle of the ISM 300 will be
discussed. In an embodiment, the ISM 300 is disposed between a first 310
and a second 320 group of UPSs 100 (separately illustrated as UPS 1, UPS
2, UPS 3 and UPS 4, for example, but having the configuration illustrated
in FIG. 2 and discussed above), and an ISS 330 that decides which UPS
group will service the load 105. For simplicity, FIG. 3 illustrates only
the communication lines 101 between ISM 300 and the two groups of UPSs,
however, it will be appreciated by one skilled in the art that the UPSs
also have power lines 102 connecting them to the ISS 330. Each UPS group
has a master UPS, such as UPS 1 for group A 310, and UPS 3 for group B
320, for example. The master UPS serves to control the synchronization of
the UPSs 100 within its group. The ISM 300 controls synchronization
between first 310 and second 320 UPS groups by providing control commands
to the appropriate control system 175 associated with the UPSs 100.

[0044] The ISM 300 has the function of assigning one of the UPS groups,
such as the first group 310 for example, the role of master group and the
other UPS group, such as the second group 320 for example, the role of
slave group. The ISM 300 also has the function of passing phase
information relating to the master group 310 to the slave group 320,
thereby enabling the master UPS (UPS 3) of the slave group 320 to effect
synchronization with the master group 310. To carry out this
synchronization process, the ISM 300 has a processing circuit 302, and a
storage medium 304, readable by the processing circuit 302, storing
instructions for execution by the processing circuit 302 for carrying out
the necessary control algorithms, which will be discussed in more detail
below.

[0045] Referring now to FIG. 4, an exemplary ISM 300, illustrated in block
diagram form, includes processing circuit 302, storage medium 304, a DSP
board 306, and a communication board 308 having increased capability able
to deal with four communication channels. As illustrated, the ISM 300 is
able to exchange information with the two independent UPS groups (group A
310, and group B 320), interpret the operator commands, and command the
power switches. As a result, the five aforementioned functions F1-F5 may
be realized by software configuration only. To maximize the reliability,
an embodiment of the ISM 300 has a redundant communication and a
redundant power supply, fed by the output of both UPS groups. In
addition, for very critical applications it is possible to use redundant
ISM modules 300 to assure a full redundancy of the control electronics.

[0046] The input signals to ISM 300 include phase information .phi.1
through .phi.P, or .phi.1 through .phi.Q, from each UPS group A and B,
where P represents the number of UPSs in group A and Q represents the
number of UPSs in group B. The output signals from ISM 300 include the
S.sub.sync signal and the .phi..sub.other signal. The .phi..sub.other
signal represents the actual phase of the master UPS group, and the
S.sub.sync signal represents a command signal for the slave UPS group to
synchronize with the master UPS group.

[0047] With reference now to FIG. 5, the Intelligent Static Transfer
Switch Function (F1) will be discussed.

[0048] FIG. 3 shows the principle of the use of ISM 300 in combination
with ISS 330, and FIG. 5 expands on this principle. For the configuration
illustrated in FIG. 5, four UPSs 100 (UPS 1, UPS 2, UPS 3 and UPS 4) are
organized in two groups A and B in a 2+2 configuration. The load 105 is
connected to the ISS 330, which continuously monitors the two input
sources A and B, which may be provided by a utility or other means as
discussed previously with reference to FIG. 2, and decides where to
switch the load depending on the quality of the two input sources and on
its configuration. Typically, if one source fails, the ISS 330 can be
programmed to either stay on the preferred input source or switch, even
if the two input sources are in phase opposition. Since an out-of-phase
condition is undesirable and dangerous for both the UPS system and the
critical load, it is important to keep the outputs of the two UPS groups
synchronized. The synchronization function is performed by the ISM 300,
which synchronizes one group (slave UPS group B for example) to the other
group (master UPS group A for example). The master UPS group is also
herein referred to as the sync Master. Through a front panel module 301
of the ISM 300, a user may select various working modes, thereby making
it possible to keep the two groups isolated, to force the sync master to
group A or B, and also to let the ISM 300 decide which one of the two
groups is the sync Master. The ISM 300 considers, among other things, the
availability and the state of the two inputs sources A and B. In
addition, the synchronization may be activated continuously or just under
certain phase error conditions.

[0049] Regarding FIGS. 5-10 generally, the lines connecting ISM 300 to the
UPSs 100 represent communication and control lines, while the lines
connecting the UPSs 100 to the input sources and the load represent power
distribution lines. Also, it will be appreciated by one skilled in the
art that graphical symbols suggestive of switches, while not specifically
identified by a reference numeral, do indeed represent power distribution
switches, such as circuit breakers or the like.

[0050] With reference now to FIG. 6, the Centralized Bypass Function (F2)
will be discussed.

[0051] As previously mentioned, there are several possible UPS
configurations that may be employed to supply a critical load. With the
RPA (Redundant Parallel Architecture) concept, (N+M) UPSs are paralleled
to supply a load that can be fed by N UPSs only. This way, a redundancy
of M units is achieved. In a RPA configuration, we have decentralized
bypasses, that is, each UPS 100 has its own bypass feed path 110 and
Static Switch Module (SSM) 120 (see FIG. 2 for example). This improves
the reliability of the global power system as a redundancy of M bypasses
is also achieved. The situation is even more favorable as these
decentralized bypasses are sized for more than the nominal power.

[0052] In some critical power management systems, a centralized bypass is
required, even if the global reliability is reduced. This feature may be
implemented in a RPA configuration using the ISM 300 as represented in
FIG. 6 for a group of three UPSs (UPS 1, UPS 2 and UPS 3). The ISM 300
exchanges information with all the UPSs and commands a Centralized Static
Switch Module (CSSM) 350, which serves as an external (centralized)
bypass to all UPSs. In addition, the ISM 300 measures the bypass voltages
and the load currents.

[0053] The implementation of a centralized bypass in a RPA system with the
ISM 300 may be realized in two ways. First, and with regard to cost
minimization, the internal bypass SSM 120 (see FIGS. 1 and 2 for example)
of each UPS 100 is removed, which is referred to as the modular concept.
Second, and with regard to increasing reliability of the RPA system, the
internal bypasses SSM 120 are used as a backup for the external bypass
provided by the CSSM 350.

[0054] In an embodiment that combines features of both the first and the
second implementations, which also strives for cost minimization, the
internal bypasses (SSMs) of each UPS may be used in combination with an
external centralized breaker that is commanded by the ISM 300. Here, the
centralized breaker may replace the CSSM 350.

[0055] With reference now to FIG. 7, the Load Bus Synchronization Function
(F3) and the Power Tie Function (F4) will be discussed.

[0056] FIG. 7 illustrates the principle of using the ISM 300 to realize a
Load Bus Synchronization Function (F3), that is, to synchronize
temporarily the outputs of two separate and independent UPS groups A and
B. In the embodiment of FIG. 7, four UPSs (UPS 1, UPS 2, UPS 3 and UPS 4)
are organized into two groups A and B. To carry out maintenance work on
one UPS group, all of the load 105, depicted as Load A and Load B, has to
be transferred to the other UPS group. Consider an example where
initially the two systems operate independently, that is, breaker S.sub.p
is open while breakers S.sub.A and S.sub.B are closed. If now UPS 3 needs
to be repaired, Load B has to be transferred to input source A. For this,
we have first to synchronize UPS group B to UPS group A, then close
breaker S.sub.p, and after a short while open the breaker S.sub.B. At
this time, Load B has been transferred to input source A and the UPS
group B can be switched off, disconnected from input source B via
switches illustrated, for maintenance. In an embodiment, breakers
S.sub.p, S.sub.A and S.sub.B, may be remotely controlled by means known
in the art.

[0057] FIG. 7 also illustrates the principle of using the ISM 300 to
realize a Power Tie Function (F4), that is, synchronizing permanently and
load sharing the outputs of two separate and independent UPS groups. As
previously discussed, FIG. 7 illustrates four UPSs organized into two
groups A and B. Assume for example that Load A is too high for UPS group
A, that UPS group A is not redundant, and that UPS group B is only
slightly loaded. To make the global system redundant we want to share the
global load (Load A plus Load B) between the two UPS groups A and B. For
this, we first have to synchronize group B (slave UPS group) to group A
(master UPS group), then close breaker S.sub.p, and finally load share
the global load. By employing an embodiment of the ISM 300 disclosed
herein, it is possible to realize the Load Bus Synchronization and the
Power Tie features in the configuration illustrated by implementing the
appropriate control algorithms via ISM 300. In addition, a system upgrade
that adds more UPSs may be accomplished in a simple and straightforward
manner. With reference now to FIG. 8, the Bus Repeater Function (F5) will
be discussed.

[0058] In an exemplary RPA configuration employing embodiments of the
invention, eight UPSs (only six being shown in FIG. 8) may be paralleled
within a maximal distance, which represents the distal limit achievable
by a given data transmission system. By employing an embodiment of the
invention, however, and for those applications where this maximal
distance is not enough, ISM 300 may be employed as a bus repeater to
control the desired synchronization function for those UPSs beyond the
maximal distance. This is illustrated in FIG. 8 by UPSs 4, 5 and 6 being
situated beyond the maximal distance from UPS 1.

[0059] In an alternative exemplary embodiment, the ISM 300 may also be
used to realize combined functions, such as Load Bus Synchronization
and/or Power Tie in combination with Centralized Bypass, which is
illustrated by FIG. 9.

[0060] In another alternative exemplary embodiment, the ISM 300 may also
be used to realize the combined functions of Load Bus Synchronization
and/or Power Tie in combination with Centralized Bypass with Redundant
ISM, which is illustrated in FIG. 10. To maximize system reliability,
especially when two functions are combined, it is possible to use more
then one ISM module 300. As an example, FIG. 10 shows the use of two ISM
modules 300 to implement the Load Bus Synchronization and/or Power Tie
Function combined together with the Centralized Bypass Function. In this
case, not only is the power supply of each ISM redundant, but the control
electronics of each ISM are also redundant.

[0061] Algorithms for implementing the Intelligent Static Transfer Switch
Function (F1) will now be discussed with reference to FIGS. 11-13.

[0062] Referring now to FIG. 11, a control algorithm 400 is depicted for
execution by the control system 175 of the master UPS of the slave UPS
group for implementing the aforementioned synchronization function. As
previously discussed, the ISM 300 and the UPSs 100 of both groups A and B
are all connected through redundant communication cables, thereby
enabling the ISM 300 to see the phase (Pi of all the UPSs of both groups
A and B. It is possible to keep the two groups isolated, to force the
synchronization master UPS group to be group A or B, and finally, based
on the availability and quality of the input mains, to let the ISM 300
decide which one of the two groups is going to be the master UPS group.
The slave UPS group will receive the command to synchronize onto the
master group, which is achieved by applying the S.sub.SYNC signal, and by
passing the actual phase information .phi..sub.other of the master group,
through to the slave group.

[0063] In and exemplary embodiment, the function of the ISM 300 is to
assign a group the role of master UPS group, and then to pass the phase
information to the slave UPS group. The flow diagram of FIG. 11 shows
this synchronization process 400. However, it is first noted that the
synchronization algorithm is to be executed by the master UPS of the
slave UPS group, and in the following discussion, reference will be made
to this master UPS. After power-up, the UPS will first synchronize to its
mains (process loop defined by reference numeral 410). When a S.sub.SYNC
signal is triggered, via an external command or an automatic command from
control system 175, the master UPS will start the synchronization process
to the master UPS group (process loop defined by reference numeral 420).
Process loop 420 first starts with a slow synchronization algorithm 430,
where the frequency and phase of the master UPS of the slave UPS group
will be moved close to the reference of the master UPS group. At the end
of process 430 and 440, that is, when frequency and phase differences are
smaller than the defined thresholds of .DELTA..sub..omega..sub.to1SLOW
and .DELTA..sub..phi..sub.to1SLOW, respectively, the fast synchronization
algorithm 450 will start and the UPS will then be stiff in phase with the
master UPS group, resulting in the two UPS groups A and B being
synchronized (illustrated by reference numeral 460).

[0064] The slow synchronization algorithm 430 is illustrated in FIG. 12
with the control variables illustrated. As depicted, algorithm 430
primarily consists of four modules: a fast frequency observer (FFO) 431,
which is basically a fast phase control; a phase & frequency error
computation module 432; a slow phase control 433 with its own control
parameters K.sub..phi.s and K.sub..omega.s; and, an oscillator (O) 434.

[0065] The slow synchronization algorithm 430 is used to move the phase of
the output of a slave UPS group, which is already supplying the load,
toward that of the master UPS group. This slow synchronization has to be
slow enough to guarantee the safety of the critical load. The input to
the slow synchronization algorithm 430 is .phi..sub.ISM.sub.--other,
which is the actual phase of the master UPS group. The outputs of the
slow synchronization algorithm 430 are the phase and frequency parameters
(.alpha..sub.0 and .omega..sub.0 of the oscillator 434, which refer to
the master UPS of the slave UPS group.

[0066] The fast synchronization algorithm 450 is illustrated in FIG. 13
with its control variables illustrated. As depicted, algorithm 450
primarily consists of three modules: a phase & frequency error
computation module 451; a fast phase control 452 with its own control
parameters; and, an oscillator (O) 453. This fast synchronization
algorithm 450 serves to keep the two UPS groups A and B synchronized.
Similar to the slow synchronization algorithm 430, the input to the fast
synchronization algorithm 450 is .phi..sub.ISM.sub.--.sub.other, which
again is the actual phase of the master UPS group, and the outputs are
the phase and frequency parameters .alpha..sub.0 and .omega..sub.0 of the
oscillator 434, which again refer to the master UPS of the slave UPS
group.

[0067] In an embodiment, the slow 430 and fast 450 synchronization
algorithms are implemented in firmware, having algorithms driven by
control equations, which will now be discussed with reference to FIGS. 12
and 13.

[0068] The FFO 431 depicted in FIG. 12 includes an internal oscillator
having a phase angle .phi..sub.OSC and an angular frequency
.omega..sub.OSC. This internal oscillator is controlled to track the
phase angle (.phi..sub.ISM.sub.--.sub.other. Once the oscillator is
synchronized to .phi..sub.ISM.sub.--.sub.other the oscillator angular
frequency .omega..sub.OSC is a measure for the unknown angular frequency
.omega..sub.ISM.sub.--.sub.other. This is why this block is called fast
frequency observer. The equations describing the above algorithm are:
.DELTA..phi..sub.OSC=.phi..sub.ISM.sub.--.sub.other-.phi..sub.OSC
Equa.-1 .DELTA..omega..sub.OSC=(.phi..sub.OSC-.DELTA..phi..sub.OSCold)/T.-
sub.E Equa.-2 .DELTA..phi..sub.OSCold=.DELTA..phi..sub.OSC Equa.-3
.DELTA..omega..sub.OSCcom=.DELTA..omega..sub.OSC*
K.sub..omega.FFO+.DELTA..phi..sub.OSC* K.sub..omega.FFO Equa.-4
.omega..sub.OSC=.omega..sub.OSC+.DELTA..omega..sub.OSCcom* T.sub.E
Equa.-5 .phi..sub.OSC=.phi..sub.OSC+.phi..sub.OSC* T.sub.E Equa.-6
.omega..sub.other=.omega..sub.OSC Equa.-7 where T.sub.E is the sampling
time (100 .mu.s) and K.sub..omega.FFO, K.sub..omega.FFO are the feedback
gains for the angular frequency and phase angle errors of the FFO 431.
Equation-2 is a simple numerical derivation of .omega.=d.phi./dt, where
the value of .DELTA..phi..sub.OSCold is the previous sampling (100 .mu.s
before) of .DELTA..phi..sub.OSC. Equations-5 and 6 implement the digital
oscillator of the FFO 431. In addition, the internal variables are
limited to their normal variation range (for example,
.DELTA..phi..sub.OSC between 0 and 2.pi.) as known by one skilled in the
art.

[0069] The phase & frequency error computation block 432, which is used
for the slow synchronization algorithm, may be described by following
difference equations:
.DELTA..phi..sub.ISM=.phi..sub.ISM.sub.--.sub.other-.alpha..sub.o
Equa.-8 .DELTA..omega..sub.ISM=.omega..sub.other-.omega..sub.o Equa.-9

[0070] Referring now to FIG. 13, the phase & frequency error computation
block 451, which is used for the fast synchronization algorithm, may be
described by following difference equations:
.DELTA..phi..sub.ISM=.phi..sub.ISM.sub.--.sub.other-.alpha..sub.o
Equa.-10 .DELTA..omega..sub.ISM=(.DELTA..phi..sub.ISM-.DELTA..phi..sub.IS-
Mold)/T.sub.E Equa.-11 .DELTA..phi..sub.ISMold=.DELTA..phi..sub.ISM
Equa.-12

[0071] The slow phase control block 433 (with reference to FIG. 12 and
Equations-8 and 9) may be described by the following equation:
.DELTA..omega.=.DELTA..phi..sub.ISM *
K.sub..phi.S+.DELTA..omega..sub.ISM* K.sub..omega.S Equa.-13

[0072] The fast phase control block 452 (with reference to FIG. 13 and
Equations-10 and 11) may be described by the following equation:
.DELTA..omega.=.DELTA..phi..sub.ISM *
K.sub..phi.F+.DELTA..omega..sub.ISM* K.sub..omega.F Equa.-14

[0073] The oscillator blocks 434 and 453 (with reference to FIGS. 12 and
13) may be described by following equations:
.omega..sub.o=.omega..sub.o+.DELTA..omega.* T.sub.E Equa.-15
.alpha..sub.o=.alpha..sub.o+.omega..sub.o* T.sub.E Equa.-16

[0074] In a classical digital PLL (phase lock loop) scheme, the
synchronization precision of 10 bits of digital phase information would
be too a low resolution for proper synchronization control. However, with
the slow and fast synchronization algorithms disclosed herein, a
synchronization precision of less than 1 .mu.s may be achieved.

[0075] Since only the digital phase information is sent on the
communication bus between the ISM and the UPS groups, it is possible to
optimize the bandwidth of the transmission. Also, since the slow
synchronization algorithm needs the frequency information (see FIG. 12
for example), this information may be extracted from the phase
information through an FFO (fast frequency observer) 431. In an
embodiment, the slow and fast synchronizations depicted in FIGS. 12 and
13 are implemented using the same algorithm, with the only difference
being the feedback gains obtained by assigning different poles to the
phase control. Accordingly, different feedback gains lead to different
synchronization speed and stiffness.

[0076] To determine an appropriate feedback gain, the static stiffness may
be defined with respect to the phase and frequency errors. Exemplary
relationships are as follows. For slow synchronization, the static
stiffness with respect to a frequency error is 16 Hz/sec correction for
an error of 1 Hz, and the static stiffness with respect to the phase
error is 18/(2.pi.).apprxeq.3 Hz/s correction for an error of 1 rad, for
example. For fast synchronization, the static stiffness with respect to
the frequency error is 20 Hz/s correction for an error of 1 Hz, and the
static stiffness with respect to the phase error is
100/(2.pi.).apprxeq.16 Hz/s correction for an error of 1 rad, for
example. By assigning different poles to the phase control, it is
possible to design a fast and a slow phase control, thereby obtaining two
sets of feedback gains.

[0077] As used herein, the following variable definitions apply:
.phi..sub.ISM.sub.--.sub.other=phase angle to synchronize to (phase angle
of the "supermaster") .omega..sub.other=angular frequency of the
"supermaster" (.phi.and .omega.are linked by .omega.=d.omega./dt)
.omega..sub.o=angular frequency of the oscillator (of the master of the
"superslave"group) .alpha..sub.o=phase angle of the oscillator (of the
master of the "superslave" group) .DELTA..phi..sub.ISM=phase angle error
(between the "supermaster" and "superslave" groups)
.DELTA..omega..sub.ISM=angular frequency error (between the "supermaster"
and "superslave"groups) .DELTA..omega.=angular frequency correction to be
applied to the oscillator K.sub..omega.S=feedback gain for the phase
angle error-slow synchronization K.sub..omega.S=feedback gain for the
angular frequency error-slow synchronization K.sub..omega.F=feedback gain
for the phase angle error-fast synchronization K.sub..omega.F=feedback
gain for the angular frequency error-fast synchronization.

[0078] While embodiments of the invention have been disclosed combinable
to provide only certain combinations of functions, it will be appreciated
that the possible combinations of ISM modules and functions are not
confined to only the above-described examples.

[0079] While embodiments of the ISM concept may have been described in
relation to a RPA configuration of a particular UPS system, it will be
appreciated that the same ISM concept may be applied to other single and
parallel UPS systems. It will also be appreciated that the ISM concept
presented herein may be applied to UPSs of any power level with or
without an isolation transformer.

[0080] As suggested in the aforementioned description of the various
embodiments, an embodiment of the invention may be embodied in the form
of computer-implemented processes and apparatuses for practicing those
processes. The present invention may also be embodied in the form of a
computer program product having computer program code containing
instructions embodied in tangible media, such as floppy diskettes,
CD-ROMs, hard drives, USB (universal serial bus) drives, or any other
computer readable storage medium, wherein, when the computer program code
is loaded into and executed by a computer, the computer becomes an
apparatus for practicing the invention. The present invention may also be
embodied in the form of computer program code, for example, whether
stored in a storage medium, loaded into and/or executed by a computer, or
transmitted over some transmission medium, such as over electrical wiring
or cabling, through fiber optics, or via electromagnetic radiation,
wherein when the computer program code is loaded into and executed by a
computer, the computer becomes an apparatus for practicing the invention.
When implemented on a general-purpose microprocessor, the computer
program code segments configure the microprocessor to create specific
logic circuits. The technical effect of the executable instructions is to
exchange information, perform synchronization, and execute control
algorithms and commands between two separate and independent UPS groups
thereby allowing multiple configurations of uninterruptible power supply
in critical power management systems.

[0081] As disclosed, some embodiments of the invention may include some of
the following advantages: an Intelligent Synchronization Module (ISM)
that allows multiple configurations of uninterruptible power supply (UPS)
in critical Power management systems; the availability of five different
functions F1-F5 that may be realized by software configuration only; the
ability to combine and realize more functions by a single ISM module; an
exemplary ISM may have a redundant communication and a redundant power
supply in order to maximize system reliability; the possibility of using
redundant ISM modules for very critical applications to assure a full
redundancy of the control electronics; an Intelligent Synchronization
Module (ISM) that ties one or two groups of UPSs to realize five
different functions F1-F5; for the function of "Intelligent Static
Transfer Switch" (F1), an embodiment of the ISM that synchronizes the
outputs of two separate and independent UPS groups; for the function of
"Centralized Bypass" (F2), an embodiment of the ISM that commands the
centralized bypass of a group of UPSs in a RPA configuration, where in a
first embodiment, the ISM doesn't use the internal UPS bypasses any more,
in a second embodiment, the internal bypasses of the UPSs are used as a
backup for the external centralized bypass, thereby providing the maximal
reliability even higher than the one of a RPA configuration, and in a
third embodiment, using the internal bypasses of each unit in combination
with an external centralized breaker commanded by the ISM; for the
function of "Load Bus Synchronization" (F3), an embodiment of the ISM
that synchronizes temporarily the outputs of two separate and independent
UPS groups; for the function of "Power Tie" (F4), an embodiment of the
ISM that synchronizes permanently and load shares the outputs of two
separate and independent UPS groups; for the function of "Bus Repeater"
(F5), an embodiment of the ISM that allows extension of the maximal
distance between the first and the last UPS in a RPA configuration; an
ISM that provides a flexible multi-functional product, where the five
aforementioned functions F1-F5 may be realized by software configuration
only; the ability to include in the ISM a redundant communication feature
and a redundant power supply; the ability to use redundant ISM modules
for very critical applications to assure a full redundancy of the control
electronics; an ISM capable of implementing more than one function at the
same time; the ability to combine functions via the ISM; slow and fast
synchronization algorithms that allow the ISM to synchronize two groups
of UPSs already supplying their critical load; the ability to send a low
resolution signal (10 bits) of digital phase information through the
communication bus connecting the ISM to the UPS groups, thereby enabling
the precision of the synchronization algorithms to be less than 1 .mu.s;
and, the ability to send only the digital phase information on the
communication bus, thereby enabling optimization of the bandwidth of the
transmission, and since the slow synchronization algorithm also needs the
frequency information, this information may be extracted from the phase
information through an FFO (fast frequency observer).

[0082] While the invention has been described with reference to exemplary
embodiments, it will be understood by those skilled in the art that
various changes may be made and equivalents may be substituted for
elements thereof without departing from the scope of the invention. In
addition, many modifications may be made to adapt a particular situation
or material to the teachings of the invention without departing from the
essential scope thereof. Therefore, it is intended that the invention not
be limited to the particular embodiment disclosed as the best or only
mode contemplated for carrying out this invention, but that the invention
will include all embodiments falling within the scope of the appended
claims. Also, in the drawings and the description, there have been
disclosed exemplary embodiments of the invention and, although specific
terms may have been employed, they are unless otherwise stated used in a
generic and descriptive sense only and not for purposes of limitation,
the scope of the invention therefore not being so limited. Moreover, the
use of the terms first, second, etc. do not denote any order or
importance, but rather the terms first, second, etc. are used to
distinguish one element from another. Furthermore, the use of the terms
a, an, etc. do not denote a limitation of quantity, but rather denote the
presence of at least one of the referenced item.