AC1 software interface

Board identification (base address + 15)

This read-only register returns the value 0DH, which indicates the presence of the AC1 card.

Status register (base address + 14)

AC1 I/O map

Register name

Base address offset

Bit reference

Data

Read/write

X axis LO byte

0

7 to 0

2’s complement 12 bit count 8000H to 7FFFH

Read only

X axis HI byte

1

15 to 8

2’s complement 12 bit count 8000H to 7FFFH

Read only

Y axis LO byte

2

7 to 0

2’s complement 12 bit count 8000H to 7FFFH

Read only

Y axis HI byte

3

15 to 8

2’s complement 12 bit count 8000H to 7FFFH

Read only

Z axis LO byte

4

7 to 0

2’s complement 12 bit count 8000H to 7FFFH

Read only

Z axis HI byte

5

15 to 8

2’s complement 12 bit count 8000H to 7FFFH

Read only

Timer LO count

6

7 to 0

16 bit binary count 0000H to FFFFH

Read only

Timer HI count

7

15 to 8

16 bit binary count 0000H to FFFFH

Read only

Not used

8-12

N/A

N/A

N/A

Command register

13

15 to 8

Relevant bit set to logic 1 to perform command

Read only

Status register

14

7 to 0

Bits set to logic 1 if condition TRUE

Read only

Board identification

15

15 to 8

8-bit board identification

Read only

Command register definitions

15

Not used

14

Not used

13

Not used

12

Not used

11

ACQUIRE data and latch timer count (sets BUSY true until complete)

10

REQUEST SET PROBE PRESENT

9

REQUEST RESET OVERTRAVEL

8

RESET TIMER

Status register definitions

7

Not used (set to logic 1)

6

BUSY

5

TIMER OVERFLOW

4

PROBE PRESENT

3

OVERTRAVEL

2

5 V FUSE BLOWN

1

-12 V FUSE BLOWN

0

+12 V FUSE BLOWN

This read-only register returns the status of the AC1 card.

AC1 status bits

BIT 7

Not used

BIT 6 - BUSY

This bit is set to “1” when the AC1 has been commanded to acquire data. It is reset to “0” when the data conversion is complete. This takes approximately 85 μs.

NOTE: The host PC should not attempt to read the probe axis deflections or the timer value while the BUSY bit is set to “1”. Any data read during this period will be invalid.

Bit 5 - TIMER OVERFLOW

This bit is set to “1” when the timer has overflowed. It is reset to “0” when the timer has been reset.

Bit 4 - PROBE PRESENT

This bit is set to “1” if an SP600/M/Q probe has been connected to the AC1 and the REQUEST SET PROBE PRESENT bit has been written to with a “1” (table in section Command register definitions earlier on this page). If the probe is disconnected from the AC1, then the bit automatically resets to “0”.

Bit 10 - REQUEST SET PROBE PRESENT

Writing a “1” to this bit causes the AC1 to sample the state of its probe identification circuitry. Upon writing to this bit, the PROBE PRESENT bit in the status register is set to “1” if an SP600/M/Q probe is present.

Bit 9 - REQUEST RESET OVERTRAVEL

Writing a “1” to this bit causes the AC1 to sample the state of its overtravel circuitry. Upon writing to this bit, the OVERTRAVEL bit in the status register is set to “0” if an overtravel unit is connected and
not overtravelled.

Bit 8 - RESET TIMER

Writing a “1” to this bit causes the AC1 to reset the AC1 timer to 0000H and resets the TIMER OVERFLOW flag to “0”.

Timer count LO and HI bytes (base address +7 and +6)

These read-only registers return the latched LO an HI byte of the AC1internal timer. The latched timer value is updated each time the axis defl ections are acquired.

NOTE: It is possible for the counter to have an offset of up to 1 μs from the time of writing to the RESET TIMER bit.

Axis deflection LO and HI bytes (base address +5 through to 0)

These read-only registers return the LO and HI byte of the X, Y and Z axis defl ections of the probe. The format of these values is 2’s complement 12 bit counts which can take any value between 8000
Hex and 7FF0 Hex. The defl ections are only updated when the ACQUIRE bit is written to.

NOTE: As the axis deflections are 12 bits long and the axis deflections are read in two 8 bit bytes, the data has been shifted to the left of the data word. The least significant 4 bits of the lower byte are always zero.