Introduction and Motivation Power consumption density has become

Introduction and Motivation • Power consumption/density has become a critical issue in high performance processor design • This issue is even more important on battery-powered embedded cores and systems • The embedded processing market is growing at a very fast pace • Application engineers must be able to accurately predict the energy usage for the core and the system when running their applications • This project is targeted to improve the power analysis capabilities of the ADI Blackfin family of processors and systems

Instruction-level Power Estimation Strategy • Develop an instruction-level energy model for the Blackfin processor (BF 533 @ 1. 2 V and 270 MHz, though our approach is retargetable) – • Core voltage operation between 0. 8 V and 1. 4 V from 0 to 756 MHz Leverage past work on instruction-level power profiling for embedded cores (Tiwari @ Princeton) – Instruction-level estimation can be effective on cores with simple pipelines • We then build energy estimates, working with individual basic blocks, and then weight blocks based on the dynamic call graph traversal during program execution

Instruction-level Power Estimation Strategy • We consider variability due a configurable memory hierarchy • We consider the impact of operand values and operand types on energy • We consider environmental effects on measurements • We will combine our instruction-level model with Visual. DSP++ to provide power/performance framework

Instruction-Level Energy Modeling Total Energy = Base Energy Cost + Inter-Instruction Effects • Base Energy Cost – The energy cost to execute an individual instruction • Capture Base Energy Costs Construct loops containing several instances of the same instruction (now automated) – Measure the average current drawn while executing this loop – The base energy cost is directly proportional to this current, multiplied by the number of cycles needed to complete each instance of the instruction –

Instruction-Level Energy Modeling Total Energy = Base Energy Cost + Inter-Instruction Effects • Inter-Instruction Effects – Energy contributions that are not considered in the base energy cost – Circuit state overhead • Added cost due to switching activity within the circuit when executing two different instructions in succession • Effect measured using a pair of different instructions in a loop and capturing the average current – Effects of resource constraints and delays • Common events - pipeline stalls, cache misses, write buffer stalls • These events increase the number of cycles required to complete an instruction • The average power per cycle often decreases, but the overall energy still increases due to the higher cycle count

Summary • Developed a retargetable method to produce an instruction-level energy model • Constructed an instruction-level energy model for the Blackfin processor and used it to estimate programs with less than 6% error • Developed a set of automated tools to drive test code generation and current measurements • Studied the energy effects of the memory hierarchy, changes in operand values, and environmental factors