ClearSpeed Moves to 64-Bit Generation

ClearSpeed, a specialized chip co-processor company designed to drastically accelerate applications used in supercomputer environments, has announced a shift to the 64-bit generation.

SAN JOSE, Calif.ClearSpeed, a specialized chip co-processor company designed to drastically accelerate applications used in supercomputer environments, has announced a shift to the 64-bit generation.
ClearSpeed announced the CSX600 co-processor here at the Fall Processor Forum, which approximately doubles the performance of the previous chip, the CS301. ClearSpeed officials said that they needed to shift to the 64-bit generation, as their customers regarded the 32-bit space as a niche market.

When ClearSpeed first launched, executives said that judicious use of the companys co-processors could be used to shrink Japans massive Whole Earth Simulator down to a server chassis or two.
Since then, however, the company has been busy trying to persuade video and graphics companies to port their libraries to take advantage of the ClearSpeed architecture. So far, the one success story has been the porting of GROMACS, an open-source molecular dynamics software application, to the architecture.

The new CSX600 chip provides a massive amount of processing power: 50 gigaflops, or 50 billion floating-point operations per second. The massive bandwidth is produced by an array of 250MHz 96 "processing elements," compared with 64 200MHz processing elements used in the CS301.
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