As the ITRS Critical Dimension Uniformity (CDU) specification shrinks, semiconductor companies need to maintain a
high yield of good wafers per day and a high performance (and hence market value) of finished products. This cannot be
achieved without continuous analysis and improvement of on-product CDU as one of the main drivers for process
control and optimization with better understanding of main contributors from the litho cluster: mask, process, metrology
and scanner.
In this paper we will demonstrate a study of mask CDU characterization and its impact on CDU Budget Breakdown
(CDU BB) performed for an advanced EUV lithography with 1D and 2D feature cases.
We will show that this CDU contributor is one of the main differentiators between well-known ArFi and new EUV CDU
budgeting principles. We found that reticle contribution to intrafield CDU should be characterized in a specific way:
mask absorber thickness fingerprints play a role comparable with reticle CDU in the total reticle part of the CDU budget.
Wafer CD fingerprints, introduced by this contributor, may or may not compensate variations of mask CD’s and hence
influence on total mask impact on intrafield CDU at the wafer level. This will be shown on 1D and 2D feature examples
in this paper.
Also mask stack reflectivity variations should be taken into account: these fingerprints have visible impact on intrafield
CDs at the wafer level and should be considered as another contributor to the reticle part of EUV CDU budget.
We observed also MEEF-through-field fingerprints in the studied EUV cases. Variations of MEEF may also play a role
for the total intrafield CDU and may be taken into account for EUV Lithography. We characterized MEEF-through-field
for the reviewed features, the results to be discussed in our paper, but further analysis of this phenomenon is required.
This comprehensive approach to characterization of the mask part of EUV CDU characterization delivers an accurate
and integral CDU Budget Breakdown per product/process and Litho tool.
The better understanding of the entire CDU budget for advanced EUVL nodes achieved by Samsung and ASML helps to
extend the limits of Moore's Law and to deliver successful implementation of smaller, faster and smarter chips in
semiconductor industry.