The New IEEE 1801-2015 UPF 3.0 Standard is Here

If you're responsible for the design of low power, energy efficient electronic systems and SoCs, you need to have a power management strategy and you need to know as soon as possible if it will meet the demands of your product and its target applications.

At the recent SNUG Silicon Valley event, Synopsys teamed up with Micron, a global supplier of high performance, low power memory technologies, to move the story ahead yet again. We presented a tutorial explaining the practical steps system designers can take to convert static spreadsheet-based power model information for DDR memories into dynamic UPF 3.0 power models that can be simulated together with their SoC architecture in Synopsys Platform Architect MCO, the industry's first architecture analysis tool to support UPF 3.0.

So how about the rest of the system? The purpose of today's newsletter article is to share the highlights of our SNUG tutorial's step-by-step approach, such that you can apply the same steps for your internal spreadsheet-based power models – and practical power management.

What is UPF 3.0?

Version 3.0 of the Unified Power Format (UPF 3.0) is text file format based on Tcl. It's designed to capture a power model of a component that can be activated by its corresponding simulation model within a virtual prototype. Because the format is standardized, UPF 3.0 models are interoperable and can be triggered from within any virtual prototyping environment that supports the new standard.

In UPF 3.0, power consumption is described as a high level state machine:

For example, for a CPU we can define three states for Off, Wait-For-Interrupt, and Active.

Similarly, for DDR memory we can define three states for Activate (in the case of a page miss), Read-Write (in the case of a page hit), and Idle (background memory refresh).

Each state is associated with a certain power consumption, and triggered by events observed in the virtual prototype. Power consumption over time shows energy efficiency.

In our tutorial we walked through the definition of a UPF 3.0 system-level power model, using info from Micron's DDR4 power calculator spreadsheet as the starting point, explained how to trigger it from a memory subsystem architecture simulation featuring the Synopsys DesignWare uMCTL2 DDR controller, and finally showed it working in an application case study where performance (the traditional focus of the architecture simulation) and power (added with UPF 3.0) are analyzed together to optimize the SoC system configuration.

Why Not Just Use the Spreadsheet?

The answer is the need to understand energy efficiency, or power consumption over time, while your system is executing real application workloads. Spreadsheets calculate power consumption at a given instant, based on your assumptions of system activity within that component, at that moment in time. At best these assumptions reflect the average utilization, but driving a more realistic scenario with the spreadsheet approach just isn't possible. On the other hand, architecture virtual prototypes simulate realistic application workloads to create a dynamic view of system activity and performance. Add the same power information from the spreadsheet to the top, and bingo, you get a realistic view of power consumption over time, and therefore energy efficiency.

Three Steps to UPF 3.0

1. Capture existing spreadsheet information for your component, using our DDR4 example.
Information on DDR4 power domains, power states, state transitions, and power expressions (consumption formulas) are captured in the Micron DRAM Power Calculator spreadsheet:

2. Express in the UPF 3.0 Power Model Format
Convert the spreadsheet information into UPF 3.0 format in a week or two:

For this example, Synopsys added the DDR4 power model to a case study demonstration platform featuring the existing architecture models of the Synopsys DesignWare uMCTL2 DDR memory controller and DDR4 memories. The architecture model provides all the real-world features to observe memory subsystem activity and trigger the appropriate DDR4 power model state transitions during simulation. No changes to the architecture models within the case study platform are required!

UPF 3.0 Power Analysis Results

Here we see the UPF 3.0 power model for DDR4 memory "in action", helping to analyze the impact of AXI to DDR address mapping on system performance, power, and energy.

Some Practical Advice for User IP

Our example highlights how the definition of a UPF 3.0 system-level power model, where the power formulas have already been specified in the Micron power calculator spreadsheet, are easily created and added to an existing performance model in Platform Architect MCO. Here are some practical considerations for defining UPF 3.0 power models for your own IP:

Consider the granularity of power state space

Power consumption data for each state – set as a budget or characterize?

Reduce the granularity of the power states, if you don't need the detail

IP power characterization will yield a significant quantity of raw data

Characterize power consumption across various IP configurations, silicon processes, implementation styles and for frequency, voltage and temperature etc.

Identify parameters that have the greatest impact to power consumption – these are referred to as the "power critical parameters" for the IP – focus on these when defining power model expressions

Power characterization data is maintained outside of the power model

Use standardized IEEE 1801 UPF 3.0 power expressions to access this data

The "data layer" format of the power characterization database is not part of UPF 3.0

Wrap-up

So what's the next step for your power management strategy? The standardization of IEEE 1801 UPF 3.0 is a practical step forward that makes early system-level power analysis and optimization much more deterministic and repeatable, regardless of the IP type. To learn more about Synopsys Platform Architect MCO, UPF 3.0, and the joint tutorial from Synopsys and Micron, visit www.synopsys.com/platformarchitect or contact us.