Continuing to ride the train of success that AMD has had in 2004, AMD
is announcing today the completion of design work on their first dual-core
Opteron processor and the beginning of the tape-out process for that core.
While the first dual core CPUs won't be available until the middle of next
year at the earliest, AMD sees the beginning of the first dual core tapeout
as a pretty monumental step in their microprocessor evolution.

AMD is not providing much information about the new dual core CPUs other than
a low-resolution die shot and a roadmap; luckily we can derive a decent amount
of information from the die shot, so let's get to it.

First, here's a shot of a current generation 130nm Opteron die:

You can see that the majority of the functional units are on
the left of the die and the L2 cache and the 128-bit memory interface are both
on the right of the die. Now let's take a look at the finalized design for
the first 90nm dual core Opteron die:

As we mentioned earlier, the image is relatively low-res so you
can't see much detail in it but you should be able to see two distinct cores.
Although AMD isn't commenting on any of the details of the implementation,
it appears as if the first dual core Opterons are basically two Opterons connected
together on a single die - meaning each core has its own L2 cache. Here's a
good idea of what you're probably seeing above:

The DDR memory interface appears to wrap around both L2 caches,
meaning that it looks like both cores have their own 128-bit memory interface;
whether or not both memory controllers will be enabled is another thing, but
if this is true we have a number of implications to talk about.

If dual core Opterons do indeed have two memory controllers,
the pincount of dual core Opterons will go up significantly - it will also
make them incompatible with current sockets. AMD is all about maintaining socket
compatibility so it is quite possible that they could only leave half of the
memory controllers enabled, in order to offer Socket-940 dual core Opterons.
AMD isn't being very specific in terms of implementation details, but these
are just some of the options.

AMD did mention that they will eventually start referring to
Opteron server configurations according to the number of sockets, not CPUs,
the platform is capable of supporting. For example, a 1 socket Opteron server
could either be a 1-way or a 2-way configuration, depending on whether a single
or dual core Opteron is used.

"Anyone got much more of a clue about when we'll see the 90nm Athlon 64?"

Roadmap clearly states second half 2005, which is *at least* 12-18 months from now. With the usualy roadmap optimism deducted, don't expect them until 2006. So you go buy some other CPU meanwhile. Always look at what you can buy now and what platform is more future proof, never sit and wait.Reply

Dual cores will have local access to RAM, which is good. On a dual Opteron today, on a non-NUMA aware OS, half the memory accesses for one CPU goes across the second CPU. Dual Opteron cores will therefore perform better than dual CPUs with no NUMA, but with NUMA, data is placed locally on each CPU and performance gets more even. Dunno which one wins overall, though.

On a dual Xeon, it doesn't matter as much, both single CPUs and dual cores in a dual core CPU will go past the NB anyway. Dual cores means sharing the bandwidth to the NB, just like in a dual Xeon today. Intels buses all share the FSB to the NB, always has. (Even AXP supported separate FSBs for each CPU to the NB, pity they never made nForce2 dual DDR for dual AXPs)Reply

Fred Weber said in an interview that dual core Opterons support 4 way. This is logical as the core will still need to talk L2 cache coherency via the HT protocols and there are only 3 bits for core IDs.Reply

Ok well 20 emails later, ok they are promising it. That's a good thing!! In spite of me eating crow :(

Concentrate on that being a good thing because I think they needed to do it very much, give dual core on at least the FX line. I kinda doubt it will happen in 2005, but I won't let that detract from it being a good move.Reply