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VHDL Program Format :

The various sections used in VHDL program are shown in figure below. These sections are,

1) LIBRARY declaration which contains the list of libraries used in the program. e.g. : ieee, std, work, etc.

2) ENTITY which declares the I/O pins of the circuit and

3) ARCHITECTURE which describes the detailed logical design aspects of the IC.

LIBRARY Declarations :

LIBRARY is a set of functions which are used in the program. The structure of the library is shown in figure. The LIBRARY code is normally written in the form of FUNCTIONS, PROCEDURES, or COMPONENTS and kept in the form of PACKAGES. To declare the LIBRARY two lines are required in the program, one is the name of the library and second is the USE clause, as shown in the syntax.

Since the libraries std and work are by default libraries, these libraries are need not to be declared. In the program the ieee library must be declared along with the STD_LOGIC (or STD_ULOGIC) data type used in the design.

The purpose of packages is :

1) std_logic_1164 package of ieee library declares a multi-level logic system and indicates the data types, text i/o, etc. for the VHDL design.