The Guide details how to use VIP components developed using SystemVerilog
testbench environments based on either the Open Verification Methodology
(OVM) or Verification Methodology Manual (VMM) interchangeably to lower
verification costs and improve design quality.

Accellera provides design and
verification standards for quick availability and use in the electronics
industry. The organization and its members cooperatively deliver
much-needed EDA standards that lower the cost of designing commercial IC
and EDA products. As a result of Accellera's partnership with the IEEE,
Accellera standards are transferred to the IEEE standards body for
formalization and ongoing change control.

On June 11, 2009, EDA industry organizations,
Accellera and The
SPIRIT Consortium,
announced that the organizations' Boards agreed to
a merger of the two entities. The union improves the
development of language-based and IP standards. Both organizations are
aligned on the path to formalize standards through the IEEE. For more
information about Accellera, please visit
www.accellera.org.

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