On 01/24/2013 05:00 PM, dinguyen@altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>> > mach-socfpga is another platform that needs to use> v7_invalidate_l1 to bringup additional cores. There was a comment that> the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S
> diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S
> -ENTRY(v7_invalidate_l1)> - mov r0, #0
Unfortunately, there's a patch in the Tegra tree for 3.9 that moves that
function from headsmp.S to reset-handler.S, so this patch will conflict.
How do you want to handle that?

On Fri 2013-01-25 10:24:17, Dinh Nguyen wrote:
> Hi Pavel,> On Fri, 2013-01-25 at 16:49 +0100, Pavel Machek wrote:> > Hi!> > > > > mach-socfpga is another platform that needs to use> > > v7_invalidate_l1 to bringup additional cores. There was a comment that> > > the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S> > > > If there are three copies of code, with fourth one needed for next> > platform, moving it into common code makes sense.> > > > But... The code was not identical before the merge. Are you sure that> > the differences do not hurt? At the very least, it should be mentioned> > in the changelog.> > Indeed, the addition of > > mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache> > was done by commit # 5b2acf384c8a8707d32a98106192ee7187e4446d> > This adds invalidate I-Cache as well as D-Cache, which I think should be> ok for most platforms. > > Hopefully, Stephen can test and verify.
Otherwise it works for me... and looks like a good idea.
Tested-by: Pavel Machek <pavel@denx.de>Reviewed-by: Pavel Machek <pavel@denx.de>
Thanks,
Pavel

On Thu 2013-01-24 20:42:08, Stephen Warren wrote:
> On 01/24/2013 05:00 PM, dinguyen@altera.com wrote:> > From: Dinh Nguyen <dinguyen@altera.com>> > > > mach-socfpga is another platform that needs to use> > v7_invalidate_l1 to bringup additional cores. There was a comment that> > the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S> > > diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S> > > -ENTRY(v7_invalidate_l1)> > - mov r0, #0> > Unfortunately, there's a patch in the Tegra tree for 3.9 that moves that> function from headsmp.S to reset-handler.S, so this patch will conflict.> How do you want to handle that?
Drop the patch from Tegra tree and merge this one there? Having three
copies of code is not nice to start with, no matter where it is...
Pavel

On Fri, Jan 25, 2013 at 10:24:17AM -0600, Dinh Nguyen wrote:
> Hi Pavel,> On Fri, 2013-01-25 at 16:49 +0100, Pavel Machek wrote:> > Hi!> > > > > mach-socfpga is another platform that needs to use> > > v7_invalidate_l1 to bringup additional cores. There was a comment that> > > the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S> > > > If there are three copies of code, with fourth one needed for next> > platform, moving it into common code makes sense.> > > > But... The code was not identical before the merge. Are you sure that> > the differences do not hurt? At the very least, it should be mentioned> > in the changelog.> > Indeed, the addition of > > mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache>
This becomes unnecessary since commit 612539e (ARM: 7296/1: proc-v7.S:
remove HARVARD_CACHE preprocessor guards) gets in.
Shawn
> was done by commit # 5b2acf384c8a8707d32a98106192ee7187e4446d> > This adds invalidate I-Cache as well as D-Cache, which I think should be> ok for most platforms. >

On 01/28/2013 03:45 AM, Pavel Machek wrote:
> On Thu 2013-01-24 20:42:08, Stephen Warren wrote:>> On 01/24/2013 05:00 PM, dinguyen@altera.com wrote:>>> From: Dinh Nguyen <dinguyen@altera.com>>>>>>> mach-socfpga is another platform that needs to use>>> v7_invalidate_l1 to bringup additional cores. There was a comment that>>> the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S>>>>> diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S>>>>> -ENTRY(v7_invalidate_l1)>>> - mov r0, #0>>>> Unfortunately, there's a patch in the Tegra tree for 3.9 that moves that>> function from headsmp.S to reset-handler.S, so this patch will conflict.>> How do you want to handle that?> > Drop the patch from Tegra tree and merge this one there? Having three> copies of code is not nice to start with, no matter where it is...
Well, I guess for other reasons rebasing the Tegra tree is useful for a
few dependencies, so I'll drop that part of the patch which moves
v7_invalidate_l1() from one file to another, so there shouldn't be any
conflicts, and you can feel free to take this series through whatever
tree you want.
I haven't tested this patch yet though, to see whether the slight
differences in the code in your patch mentioned in the other sub-thread
affect Tegra at all. Hopefully I can test this later today.

Hi Stephen,
On Mon, 2013-01-28 at 10:27 -0700, Stephen Warren wrote:
> On 01/28/2013 03:45 AM, Pavel Machek wrote:> > On Thu 2013-01-24 20:42:08, Stephen Warren wrote:> >> On 01/24/2013 05:00 PM, dinguyen@altera.com wrote:> >>> From: Dinh Nguyen <dinguyen@altera.com>> >>>> >>> mach-socfpga is another platform that needs to use> >>> v7_invalidate_l1 to bringup additional cores. There was a comment that> >>> the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S> >>> >>> diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S> >>> >>> -ENTRY(v7_invalidate_l1)> >>> - mov r0, #0> >>> >> Unfortunately, there's a patch in the Tegra tree for 3.9 that moves that> >> function from headsmp.S to reset-handler.S, so this patch will conflict.> >> How do you want to handle that?> > > > Drop the patch from Tegra tree and merge this one there? Having three> > copies of code is not nice to start with, no matter where it is...> > Well, I guess for other reasons rebasing the Tegra tree is useful for a> few dependencies, so I'll drop that part of the patch which moves> v7_invalidate_l1() from one file to another, so there shouldn't be any> conflicts, and you can feel free to take this series through whatever> tree you want.> > I haven't tested this patch yet though, to see whether the slight> differences in the code in your patch mentioned in the other sub-thread> affect Tegra at all. Hopefully I can test this later today.
Shawn Guo mentioned that the instruction to invalidate I-Cache is
unnecessary becauce of this commit: 612539e (ARM: 7296/1: proc-v7.S:
remove HARVARD_CACHE preprocessor guards)
So I'll send v2 without the extra instruction.
Thanks,
Dinh
>