The fully automated robotic twin wire arc spray applies an under-layer surface coating to parts after they have been cleaned and the precious metals recovered. The coating enhances surface roughness, increasing adhesion in the vacuum chamber, so that more material is deposited and fewer random particles end up on the product. This increases the process lifetime of shielding used in particulate-sensitive processes. Each part is individually programmed into the system for precise, consistent coating. After the part has been used and returned to Materion, the under-layer coating can be quickly and easily removed for cleaning. See a video of the process: http://materion.com/Businesses/MicroelectronicsandServices/Related-NSE/TwinWireArcSprayVideo.aspx

After cleaning, all parts pass through various inspections and testing for dimensional tolerances and complete cleanliness. Parts are returned to PVD users ready to be installed into thin film chambers for deposition.

FEATURED PRODUCTS

TECHNOLOGY PAPERS

View this paper to learn how Epicor ERP specifically aligns to the business needs of the electronics and high-tech industry, and hear how one electronics organization achieved improved operational controls, better inventory accuracy, and world class tools to meet supply chain requirements with Epicor ERP.July 01, 2015Sponsored by Epicor

Operational efficiency is a critical factor in the fluid processing industry. The synergy of fitting components and assembly technology to achieve this objective is the focus of Fit-LINE, Inc. Applying extensive polymer technology and injection molding expertise, the company has analyzed the design, tooling and manufacturing processes required to create high-performance solutions for demanding high-purity fluid processing applications. Through extensive R&D, testing and evaluation, Fit-LINE has isolated three variables that need to be addressed to ensure leak-free fitting assemblies.June 01, 2015Sponsored by Fit-LINE, Inc.

WEBCASTS

Jon Candelaria, Semiconductor Research Corp.’s director of interconnect and packaging sciences, will summarize a SEMICON West Semiconductor Technology Symposium Session focused on interconnects. He’ll describe the challenges for interconnect technology up to the end of the CMOS roadmap, and a few of the alternatives to address them. Next, he’ll discuss possible directions beyond the roadmap, as well as interconnectivity requirements and solution paths for emerging applications.

Increasing IoT business opportunities drive a need for new packaging techniques such as FOWLP, Embedded Component Packaging, etc. Such new assembly techniques allow more components and functionality to be integrated into an ever decreasing package space. In parallel the faster product cycle drives the need for faster production ramp to stay competitive. All these challenges highlight the need for a better methodology to determine root cause of assembly-related defects during the new package process qualification process. We will demonstrate a totally non-destructive fault localization method based on a lock-in thermography with examples in these areas.