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itwbennett writes "Unisys is primarily a services and consulting company with just a small amount of revenue coming from hardware, but they may be on to something new that could 'could give them a competitive advantage at a time when the big guns are a mess,' says Andy Patrizio. Unisys and Intel are are set to introduce on September 9 a new kind of secure computing platform designed to as a replacement platform for RISC systems running mission-critical cloud and big data workloads. 'It sounds funny to hear Intel talk about RISC migration since it is in the RISC business with the Itanium,' says Andy Patrizio, 'but at this point, what's left? HP was the driving force behind Itanium and it's in chaos right now. IBM has a healthy RISC business, so the target is obviously what's left of the Sun installed base.'"

True, but for the purposes of discussing the market, this is a valid statement. Just like the general purpose RISC CPUs - now just SPARC and POWER - run either UNIX or proprietary OSs or Linux/BSD, similarly, the only thing that Itanium runs is HP/UX, Debian and FreeBSD. Its standing is even worse than that of SPARC, in that there are other OSs such as OpenBSD that support the SPARC, whereas there is just one Linux and one BSD distro each supporting Itanium.

Except that Windows 2008, Redhat 5, and SUSE all run on Itanium as well. Just because they aren't releasing new code (in the case of Microsoft and Redhat, SUSE will continue to release new code indefinitely) doesn't mean it isn't still supported.

As was the i860. The i960 ended up being used in printers and other peripherals, but never really materialized as a general purpose CPU. Neither did the i860, which did find itself in a few supercomputers, such as Intel's Paragon. Are those 2 CPUs still made by Intel - I was under the impression that both were EOLed

EPIC architectures add several features to get around the deficiencies of VLIW:

- Each group of multiple software instructions is called a bundle. Each of the bundles has a stop bit indicating if this set of operations is depended upon by the subsequent bundle. With this capability, future implementations can be built to issue multiple bundles in parallel. The dependency information is calculated by the compiler, so the hardware does not have to perform operand dependency checking.

- A software prefetch instruction is used as a type of data prefetch. This prefetch increases the chances for a cache hit for loads, and can indicate the degree of temporal locality needed in various levels of the cache.

- A speculative load instruction is used to speculatively load data before it is known whether it will be used (bypassing control dependencies), or whether it will be modified before it is used (bypassing data dependencies).

- A check load instruction aids speculative loads by checking whether a speculative load was dependent on a later store, and thus must be reloaded.

The EPIC architecture also includes a grab-bag of architectural concepts to increase ILP:

- Predicated execution is used to decrease the occurrence of branches and to increase the speculative execution of instructions. In this feature, branch conditions are converted to predicate registers which are used to kill results of executed instructions from the side of the branch which is not taken.

- Delayed exceptions, using a not a thing bit within the general purpose registers, allow speculative execution past possible exceptions.

- Very large architectural register files avoid the need for register renaming.

The Itanium architecture also added register renaming and rotating register files, a tool useful for software pipelining since it avoids having to manually unroll and rename registers.

Actually, the last item above - introducing register renaming and rotating register files - makes Itanium squarely a RISC CPU. Some of the VLIW techniques, such as long instruction words and enhanced MIMD techniques were also adapted by some RISC CPUs, such as the Alpha 21264, as well as POWER (don't remember which generation). The whole idea of VLIW was to dump things to the compiler so that the clock speed could be enhanced as a result of the simpler circuitry. In reality, that never materia

At any rate, the above, if one takes Itanium to be the implementation definition for EPIC, since Intel came up w/ the term, is that EPIC is not VLIW, but something in b/w VLIW and RISC. I do think it's a redundant architecture, and makes the point that RISC was actually the sweet spot on the spectrum between having all the complexity in hardware (CISC) vs having it all in the compiler (VLIW). However, as others have pointed out, Itanium managed to kill 3 architectures - PA-RISC, MIPS V and Alpha - before it

It's called VLIW (Very Long Instruction Word), not EPIC.EPIC is a buzzword which was used in marketing Itanium.

VLIW is a long instruction word containing a few (typically 1 to 4) shorter instructions that are to be executed in parallel (usually, they're homogeneous, but that's not necessarily the case).Since it has few bits to code each short instruction, and the extra instructions executed in parallel requires having more registers, it is very RISC-like.

Are you tired of freedom? Does using open standards that are flexible and adoptable and freeing you from the chain of locked ecosystems? Is your uptime and performance too high?

Unisys: We have the way out.

With cheap plastic servers combined with an inflexible proprietary ecosystem you too can be trapped today! Fulky phb compliant with fancy brochure ware with hot business slang no one completely understands fully included for free.

Okay, I read it. So how would that be different from all the other companies that make Xeon based servers - companies like HP, Dell, IBM, Oracle, Cisco and a whole host of other companies? I mean from Intel's POV, not Unisys'

Moreover, they still make the ClearPath IX computers which have an ancestry back to the UNIVAC 1107 from the early 60's. It retains features that are now considered anachronisms like 9-bit chars and a non-zero null address.

Uhhh, that is factually incorrect. Unisys was a comparatively recently formed entity, as a result of a merger between Burroughs and Sperry/UNIVAC.
Burroughs dates back to 1904, and UNIVAC was a product of the corporation formed from the outfit that built ENIAC, which was just a little before my time.;)

My first systems programming job was with Burroughs, back in the 1970s, and I got involved with Sperry in 1981. Their systems were totally different from each other (in those days, a contractor like myself

I worked for Unisys and one of its predecessors for 24 years. At the time Unisys was created -- Burroughs did a hostile takeover of Univac -- the combined company had some 130,000 employees; and about half of its business was with the U.S. military. Now the company has about 22,800 employees and seems to have no military business. I stuck with the company even when they started treating salaried software professionals as if they were hourly assembly-line workers. I stuck with them when they imposed an 18-month salary freeze that did not apply to executive bonuses. I left when it was obvious that any manager who brought new work to our site would be fired.

Unisys' existing mainframes already use Intel Xeon chips with FPGA coprocessors implementing their original mainframe ISA. So whatever they're about to unleash upon the world is likely to be a rehash of some current product. This sounds like pure marketing buzz.

Unisys is actually interesting because they're the last large vendor still selling a sign-magnitude machine and maintaining an accompanying C compiler, albeit they only adhere to the original C89 standard. But then again, so does Microsoft.

A char is 9 bits, short is 18 bits, int is 36 bits, long is 36 bits, and long long is 72 bits. unsigned has the same range as positive signed values. Addresses are in words, not byte offsets like on Intel.

Full C conformance actually requires a fair bit of costly emulation, so by default its disabled. For example, conversion from signed to unsigned is well-defined in C, but to get the specified behavior on a signed-magnitude implementation the compiler must emit code to compute the value, whereas on twos-complement the bit value is identical.

I'd say it came from their speed in switching to x86 and cheap Unixes. Sun had the strongest ties to hardware so they had the most difficulty staying with Solaris and Sparc. IBM was already focused on consulting so they had the least difficulty. HP had different divisions with different interests so on average they were in the middle somewhere.

Reminding all whipper-snappers here that UNISYS is the nice patent troll society who wanted everyone to pay royalties for using the GIF image format [wikipedia.org] because they claimed a patent on LZW compression. This was after GIF had become popular. This led to the development of the PNG open format. The patents have all expired in 2004 but that doesn't make UNISYS a nice company.