This paper describes an architecture made up software tools and intellectual property cores (IPCores) interconnected by buses set through simple and clear rules, which is achieved the implementation of system embedded on chip (SoC); in addition, basic templates are provided to allow a rapid design. Its structure gives it an inherent educative value. The VHDL code that implements this architecture is highly portable. The master core developed as special state machine, has the ability to perform basic data flow and processing, similar to microprocessor but without the high consumption of logic resources of it.