Imec: FinFET beat planar for bigger SRAMs

June 17, 2011 - Planar CMOS slightly outperforms FinFETs for single SRAM cells, but FinFETs "clearly outperform" and "are superior to planar" for bigger (>128KB) SRAMs, according to new research from imec.

As part of its INSITE program, imec compared one planar and two FinFET technologies on figures of merit, for both single-memory and (for the first time) full SRAM arrays — and both FinFET varieties came out on top for medium/large SRAM arrays. They are also less sensitive to device mismatches, which means power needs can be more aggressively scaled.

Electrical variations in CMOS transistors are an increasing issue as devices are scaled down, due to random fluctuations in dopant density in the channel, source, and drain, and packed transistors can behave significantly differently. Designing SRAM memory cells is particularly challenging for each new node, given the high numbers of such devices. FinFET devices, meanwhile, offer lower leakage and variability, and enable better short channel control. Still, it’s not an exact science to extrapolate yield and performance of SRAMs from a single device or even cell, much less make a bet on what to use at the product level.

After testing, imec now says it has concluded that FinFET metrics are in line with or slightly underperform planar CMOS in single-SRAM cells. But for medium or large SRAM arrays (>128-512KB), FinFETs "clearly outperform planar cells," being less sensitive to mismatches, enabling more aggressive power-supply scaling (an extra 200mV lower, for undoped SOI FinFET), and lower VCCmin than planar. Undoped SOI FinFETs allow a 90% yield at 0.7V in 32Mbit SRAM arrays, moving to Gbit arrays for higher voltages, imec says.

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