Aldec Boosts VHDL Simulation Performance

The folks at Aldec have just announced the release of their mixed language advanced verification platform, Riviera-PRO 2012.10. The release delivers numerous stability and performance improvements, support for the latest versions of industry-standard SystemVerilog verification libraries, new language constructs, new debugging tools, and improved interfaces to other industry leading EDA tools.

Riviera-PRO delivers a 20% VHDL simulation performance gain over previous releases. “We keep developing and delivering not only new productivity features, but also innovative core engine optimizations to boost simulation performance in VHDL and SystemVerilog to support the complexity and capacity of today’s designs,” said Mariusz Dykierek, Aldec R&D Project Manager. “Easy-to-use debugging tools and a powerful mixed language simulation engine are in high demand. Aldec continues to help our customers reduce design cost and time and bring their products to market quickly.”

AvailabilityRiviera-PRO 2012.10 is available today. Click Here to download the latest release. Current customers with valid maintenance receive the release at no additional cost.

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