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SIGINT / ELINT

Signals intelligence, or SIGINT, refers to general information gathering via the interception of signals. SIGINT encompasses both the interception of communications-based signals (COMINT) and non-communications-based signals (ELINT).

A simple but effective SIGINT solution can be comprised of just a few components, including an Antenna, RF Front-End Hardware, an ADC for digitization, and storage for the digitized data. At small bandwidths and sample rates such a system can be pretty simple, but as signal bandwidths and sample rates increase the link between the ADC and Storage becomes more and more difficult to implement.

Figure 1: A Simple SIGINT Receiver

Thankfully FPGAs are well suited for receiving and transmitting large bandwidths of data, and provide an effective bridge between ADC and storage. With an architecture like that shown below, an FPGA can receive multiple GHz worth of bandwidth from an ADC and turn it right around to a storage device, presuming you can find storage capable of managing the multi-GB/sec rates coming from the FPGA. A Host is included for simple storage control and data offloading and analysis, which is often done offline.

Figure 2: A Simple SIGINT Implementation

Annapolis has helped many customers field simple SIGINT systems like this, and with our OpenVPX EcoSystem™ we provide all the components necessary for easy and seamless integration.

If designing in CoreFire Next or Open Project Builder, the ADC and Storage board support cores (shown below) are already developed and tested for you on any WILDSTAR baseboard architecture. You just need to drag, drop, and connect cores to implement your datapath, and our CoreFire Next or Open Project Builder cores take care of the build process for you, providing a software application that lets you run your design in the FPGAs as soon as the FPGA build is complete.

Figure 3: CoreFire Next Sample ADC and Storage Cores

More complicated SIGINT systems are also well suited to the Annapolis OpenVPX EcoSystem. Consider the following block diagram, where instead of simple data storage we’re now interested in tuning into a smaller portion of the band with a Digital Down Converter (DDC), implementing an Energy Detector, then generating Pulse Descriptor Words (PDWs) for the detected pulses and disseminating them to users.

Figure 4: Performing SIGINT Functionality in FPGAs

Instead of implementing storage now we want network output, so the WILD Data Storage board is replaced with a WILD OpenVPX Switch board, providing up to 4Tb/s of non-blocking switching capacity to internal and external devices/users.

DDC functionality is easily constructed in CoreFire Next or Open Project Builder. Programmable Direct Digital Synthesis (DDS) blocks, like shown below, are provided as “macro” objects and can be used in mixing any band of the ADC to DC, with precision limited only by your adjustable phase accumulator width.

Figure 5: DDS Macro for Mixing

Filtering and downsampling can be implemented easily with various CoreFire Next DSP cores, including the Channelizer and FIRs shown below.

Figure 6: Some Common DSP Cores

And getting your data onto the network is easy too, just construct your Ethernet packets in CoreFire Next or Open Project Builder using our vast core library and connect the datapaths to the pre-made and tested 40GbE XLAUI cores shown below.

Figure 7: 40GbE Cores to P1, P4, P5, and Mezzanine

CoreFire Next and Open Project Builder will speed your FPGA development process, with application services available for programs that need it. Our OpenVPX EcoSystem provides all the HW necessary for your SIGINT needs and greatly reduces your integration risk, as the interoperability of Annapolis products is guaranteed.

Contact us today to learn how Annapolis can help you to be successful with your new or continuing project needs!