Another Tool in the Box to Deliver Better Energy Efficiency

An increasingly interesting approach now evolving in the industry is the use of adaptive voltage scaling (AVS), which is a powerful technique to optimize supply voltages and minimize energy consumption in modern high-performance microprocessors.

The ever-increasing computing capabilities offered by microprocessors, of course, means ever-greater power consumption and energy usage by every board in a data communications facility or datacenter. In addition, and apart from energy costs and environmental considerations, there is the issue of cooling, which is becoming an increasingly difficult issue for power system architects.

A common way today to minimize microprocessor power consumption is the use of dynamic voltage scaling (DVS). This is usually implemented via an open-loop approach where pre-determined combinations of frequency and supply voltage are stored in a lookup table. When demand for computing power is low, a low microprocessor clock frequency is required, so the supply voltage can also be lower.

But DVS is not an ideal fix, and even though it offers much better efficiency than a fixed voltage supply, it does not realize the full potential of voltage scaling. Voltage margins are necessary to guarantee safe operation when considering static and dynamic regulation of the power supply, in addition to variations in silicon processes and operation with different environmental conditions.

However, an increasingly interesting approach now evolving in the industry is the use of adaptive voltage scaling (AVS), which is a powerful technique to optimize supply voltages and minimize energy consumption in modern high-performance microprocessors. It employs a real-time closed-loop approach to adapt the supply and meet the minimum voltage required for the actual clock frequency and workload of the individual processor.

In addition, it adjusts to compensate automatically for process and temperature variations in the processor. Leading-edge high-performance microprocessors will change workload and operating conditions within nanoseconds. Therefore, real-time regulation of the microprocessor supply puts a high demand on the control-loop bandwidth and requires close monitoring of computing hardware performance in the feedback loop.

AVS is implemented at the board level and includes components in the microprocessor and the board-mounted power supply (BMPS). Both the microprocessor and the BMPS must be designed to support it, including the necessary functional blocks or interfaces. The feedback loop is controlled by a microcontroller on the processor chip that communicates with the BMPS control circuitry via command protocol. The microcontroller needs to integrate the necessary IP and hardware to handle procedures for scaling the supply voltage automatically to the required clock frequency and demand for processing capability.

Digital power devices such as DC/DC conversion products with digital control and digital interfaces are ideal and can enable the regulation of bandwidth required to benefit fully from AVS. This has been further enabled with the introduction of the PMBus V1.3 Power System Management Protocol Specification, which provides a standardized method of communication to power conversion and power management devices and includes a dedicated bus to control processor voltages statically and dynamically.

All in all, AVS technology, enabled by enhanced intelligence and the latest power management communication protocols, should be seen as another important tool in the power designer's kit to help reduce energy usage.

As a sometime Test Engineer, I have dealt with AVS and similar schemes, and there are particular issues in both Design and Test that have to be dealt with. First of all, the regulator should be designed for efficiency with a view of the use-scenario of the product. If it spends 1% of its time pulling maximum voltage, it probably doesn't make sense to maximize the efficiency then, if it means a loss of efficiency during the other times. So a reasonable use-scenario is important to take best advantage of this technology. For many battery-operated devices, it is probably most important to be efficient during "idle" modes. Or maybe not.
The other issue is in Test. When testing power-use, we usually make a tacit assumption that the supply voltage is constant and only the current varies in the VxI=W calculation. That may even be a reasonable incremental approximation in battery devices with slow Vbat changes, but it is not valid for AVS or situations where Rbat is significant; then the problem becomes non-linear, non-time-invariant, and special care has to be used in data acquisition: multiplying Vavg with Iavg does not give Wavg then. Since "averaging" is just low-pass filtering, a data acquisition system can't use low sample-rates and aggressive anti-aliasing filtering; you have to use fa$t sampling, followed by multiplication, THEN filtering+decimation... See http://www.eetimes.com/messages.asp?piddl_msgthreadid=45315&piddl_msgid=302942#msg_302942 for some discussion on this.