It is interesting that you mention skill sets. I asked about the amount of domain experience they had. The answer was that their dataflow analysis tools helped their engineers understand things very quickly and to locate areas where optimization were possible.

100 tapeouts is quite a track record, we don't know how successful they were but let's assume they were OK.
Limited to ASIC implementations, Algo have arrived in time to meet a shrinking market, and while they may be just in time, you can see they may need a lot of investment of time and money to revise their tried and tested process to target FPGAs.
Their jobs listing is interesting, it seems very uninspiring, even undemanding. I guess they want regular guys that they can mold, not high flyers that might start re-inventing stuff!
I wish them well, this has been a mountain waiting to be climbed.